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2012-08-27target-mips: allow microMIPS SWP and SDP to have RD equal to BASEEric Johnson1-1/+9
2012-08-27target-mips: add privilege level check to several Cop0 instructionsEric Johnson1-0/+9
2012-08-27mips-linux-user: Always support rdhwr.Richard Henderson1-0/+4
2012-08-27target-mips: Streamline indexed cp1 memory addressing.Richard Henderson1-2/+1
2012-08-27Fix order of CVT.PS.S operandsRichard Sandiford1-1/+1
2012-08-27Fix operands of RECIP2.S and RECIP2.PSRichard Sandiford1-2/+2
2012-08-24target-mips: Fix some helper functions (VR54xx multiplication)Stefan Weil1-46/+29
2012-08-23target-mips: Enable access to required RDHWR hardware registersMeador Inge1-2/+3
2012-08-09MIPS: Correct FCR0 initializationNathan Froyd1-0/+1
2012-06-07build: move other target-*/ objects to nested Makefile.objsPaolo Bonzini1-1/+2
2012-06-07build: move libobj-y variable to nested Makefile.objsPaolo Bonzini1-1/+3
2012-06-07build: move obj-TARGET-y variables to nested Makefile.objsPaolo Bonzini1-0/+1
2012-06-04Kill off cpu_state_reset()Andreas Färber1-0/+3
2012-06-04target-mips: Let cpu_mips_init() return MIPSCPUAndreas Färber2-4/+12
2012-06-04target-mips: Use cpu_reset() in do_interrupt()Andreas Färber1-1/+2
2012-06-04target-mips: Use cpu_reset() in cpu_mips_init()Andreas Färber1-1/+1
2012-05-19mips: Fix BC1ANY[24]F instructionsRichard Sandiford1-4/+4
2012-05-12target-mips: Remove commented-out function declarationAndreas Färber1-1/+0
2012-05-03target-mips: Remove unused inline functionStefan Weil1-6/+0
2012-05-01Merge branch 'qom-cpu-rest.v1' of git://github.com/afaerber/qemu-cpuBlue Swirl4-2/+148
2012-04-30target-mips: Start QOM'ifying CPU initAndreas Färber2-1/+9
2012-04-30target-mips: QOM'ify CPUAndreas Färber4-1/+139
2012-04-28target-mips: Move definition of uint_fast{8, 16}_t to osdep.hAndreas Färber1-7/+0
2012-04-15target-mips: Fix type cast for w64 (uintptr_t)Stefan Weil1-1/+1
2012-04-14Use uintptr_t for various op related functionsBlue Swirl1-10/+8
2012-04-07Replace Qemu by QEMU in commentsStefan Weil1-1/+1
2012-04-07Replace Qemu by QEMU in internal documentationStefan Weil1-2/+2
2012-03-24target-mips: Add compiler attribute to some functions which don't returnStefan Weil2-3/+4
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-1/+1
2012-03-14target-mips: Don't overuse CPUStateAndreas Färber5-274/+274
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber2-3/+3
2012-03-08Spelling fixes in comments (it's -> its)Stefan Weil1-1/+1
2012-02-28target-mips: Clean includesStefan Weil1-7/+0
2011-12-14Fix spelling in comments, documentation and messagesStefan Weil1-1/+1
2011-12-02fix spelling in target sub directoryDong Xu Wang2-2/+2
2011-10-01softmmu_header: pass CPUState to tlb_fillBlue Swirl1-4/+3
2011-09-06mips: Support the MT TCStatus IXMT irq disable flagEdgar E. Iglesias1-0/+4
2011-09-06mips: Add MT halting and waking of VPEsEdgar E. Iglesias2-4/+129
2011-09-06mips: Initialize MT state at resetEdgar E. Iglesias1-0/+26
2011-09-06mips: Default to using one VPE and one TC.Edgar E. Iglesias1-1/+1
2011-09-06mips: Enable VInt interrupt mode for the 34KfEdgar E. Iglesias1-1/+1
2011-09-06mips: Correct VInt vector generationEdgar E. Iglesias1-3/+3
2011-09-06mips: Correct IntCtl write mask for VIntEdgar E. Iglesias1-1/+1
2011-09-06mips: Hook in more reg accesses via mttr/mftrEdgar E. Iglesias3-11/+225
2011-09-06mips: Synchronize CP0 TCSTatus, Status and EntryHiEdgar E. Iglesias1-44/+106
2011-09-06mips: Handle TC indexing of other VPEsEdgar E. Iglesias1-105/+161
2011-08-20Use glib memory allocation and free functionsAnthony Liguori2-3/+3
2011-08-07Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl3-5/+5
2011-07-30exec.h cleanupBlue Swirl3-61/+57
2011-07-20Fix unassigned memory access handlingBlue Swirl2-4/+6
2011-06-26Remove exec-all.h include directivesBlue Swirl4-4/+1
2011-06-26Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl2-22/+24
2011-06-26exec.h: fix coding style and change cpu_has_work to return boolBlue Swirl1-1/+1
2011-06-26cpu_loop_exit: avoid using AREG0Blue Swirl1-2/+2
2011-05-15target-mips: Fix warning caused by unused local variableAurelien Jarno1-8/+6
2011-05-12Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori1-2/+2
2011-05-08target-mips: Do not check CPU_INTERRUPT_TIMER.Richard Henderson1-4/+0
2011-05-08Fix typos in comments (interupt -> interrupt)Stefan Weil1-1/+1
2011-05-06Fix typo in code and commentsStefan Weil1-1/+1
2011-04-20Remove unused function parameter from cpu_restore_stateStefan Weil1-2/+2
2011-04-20Remove unused function parameters from gen_pc_load and rename the functionStefan Weil1-2/+1
2011-04-17target-mips: clear softfpu exception state for comparison instructionsAurelien Jarno1-16/+25
2011-04-17target-mips: fix c.ps.* instructionsAurelien Jarno1-4/+4
2011-04-17target-mips: don't hardcode softfloat exception bitsAurelien Jarno1-15/+20
2011-04-17target-mips: simplify FP comparisonsAurelien Jarno1-36/+36
2011-04-17softfloat: rename float*_eq() into float*_eq_quiet()Aurelien Jarno1-16/+16
2011-04-17target-mips: use new float*_unordered*() functionsAurelien Jarno1-98/+70
2011-04-10Fix conversions from pointer to tcg_target_longStefan Weil1-1/+1
2011-04-03Fix trivial "endianness bugs"Stefan Weil1-1/+1
2011-03-13inline cpu_halted into sole callerPaolo Bonzini1-11/+0
2011-02-09[PATCH] [MIPS] Clear softfpu exception state for round, trunc, ceil and floorChris Dearman1-0/+16
2011-01-24target-mips: fix save_cpu_state() callsAurelien Jarno1-6/+6
2011-01-18mips: Break TBs after mfc0_countEdgar E. Iglesias1-2/+6
2011-01-02softfloat: Rename float*_is_nan() functions to float*_is_quiet_nan()Peter Maydell1-4/+4
2010-12-27target-mips: fix host CPU consumption when guest is idleAurelien Jarno2-3/+23
2010-12-22target-mips: fix translation of MT instructionsNathan Froyd3-28/+16
2010-10-30target-xxx: Use fprintf_function (format checking)Stefan Weil3-9/+8
2010-10-13mips: avoid write only variablesBlue Swirl1-0/+29
2010-09-18MIPS: fix yield handlingBlue Swirl1-1/+3
2010-08-06mips: Add support for VInt and VEIC irq modesEdgar E. Iglesias2-0/+50
2010-07-31Correctly identify multiple cpus in SMP systemsHervé Poussineau2-4/+2
2010-07-31Remove unused constantHervé Poussineau1-4/+0
2010-07-25mips: more fixes to the MIPS interrupt glue logicAurelien Jarno4-15/+21
2010-07-24mips: Correct MIPS interrupt glue logic for icountEdgar E. Iglesias2-14/+0
2010-07-17target-mips: fix xtlb exception for loongsonAurelien Jarno1-2/+4
2010-07-11target-mips: add loongson 2E & 2F integer instructionsAurelien Jarno1-0/+271
2010-07-03remove exec-all.h inclusion from cpu.hPaolo Bonzini1-1/+0
2010-07-03move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini2-7/+7
2010-07-03remove unused stuff from */exec.hPaolo Bonzini2-9/+6
2010-07-01target-mips: add Loongson support prefetchAurelien Jarno1-35/+43
2010-07-01target-mips: split load and storeAurelien Jarno1-155/+183
2010-06-30target-mips: fix DINSU instructionAurelien Jarno1-1/+1
2010-06-29target-mips: enable movn/movz on loongson 2E & 2FAurelien Jarno1-1/+2
2010-06-29MIPS: Initial support of fulong mini pc (CPU definition)Huacai Chen2-0/+39
2010-06-09target-mips: Fix compilationStefan Weil1-1/+1
2010-06-09target-mips: add microMIPS exception handler supportNathan Froyd2-6/+16
2010-06-09target-mips: microMIPS ASE supportNathan Froyd4-5/+2531
2010-06-09target-mips: mips16 cleanupsNathan Froyd1-7/+17
2010-06-09target-mips: refactor c{, abs}.cond.fmt insnsNathan Froyd1-83/+81
2010-06-09target-mips: move FP FMT comments closer to the definitionsAurelien Jarno1-14/+14
2010-06-09target-mips: define constants for magic numbersNathan Froyd1-142/+295
2010-06-08target-mips: break out [ls][wd]c1 and rdhwr insn generationNathan Froyd1-47/+59
2010-05-05target-mips: Remove duplicate CPU log.Richard Henderson1-6/+0
2010-04-09target-mips: Fix format specifiers for fpu_fprintfStefan Weil1-14/+20
2010-04-08target-mips: Fix one more format specifier for cpu_fprintfStefan Weil1-1/+3
2010-04-08remove TARGET_* defines from translate-all.cPaolo Bonzini1-0/+2
2010-03-17Large page TLB flushPaul Brook1-3/+4
2010-03-13target-mips: update address space definitionsAurelien Jarno1-4/+4
2010-03-12Target specific usermode cleanupPaul Brook2-2/+14
2010-03-12Remove cpu_get_phys_page_debug from userspace emulationPaul Brook1-4/+2
2010-03-12Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson1-0/+4
2010-03-04target-mips: use newer logical opsAurelien Jarno1-8/+4
2010-03-02target-mips: use setcond when possibleAurelien Jarno1-77/+20
2010-02-23target-mips: fix ROTR and DROTR by zeroNathan Froyd1-0/+4
2010-02-23target-mips: fix CpU exception for coprocessor 0Nathan Froyd1-1/+1
2010-02-23target-mips: remove useless sign extensionAurelien Jarno1-2/+0
2010-02-06target-mips: don't call cpu_loop_exit() from helper.cAurelien Jarno3-8/+22
2010-01-19kill regs_to_env and env_to_regsPaolo Bonzini1-8/+0
2009-12-17target-mips: No MIPS16 support for 4Kc, 4KEc coresStefan Weil1-3/+3
2009-12-16target-mips: 4Kc, 4KEc cores do not support MIPS16Stefan Weil1-3/+3
2009-12-13target-mips: fix user-mode emulation startupNathan Froyd2-8/+8
2009-12-13target-mips: set Config1.CA for MIPS16-aware CPUsNathan Froyd1-9/+18
2009-12-13target-mips: add copyright notice for mips16 workNathan Froyd2-1/+1
2009-12-13target-mips: add mips16 instruction decodingNathan Froyd1-9/+1063
2009-12-13target-mips: add enums for MIPS16 opcodesNathan Froyd1-0/+112
2009-12-13target-mips: split out delay slot handlingNathan Froyd1-55/+79
2009-12-13target-mips: add gen_base_offset_addrNathan Froyd1-24/+16
2009-12-13target-mips: make gen_compute_branch 16/32-bit-awareNathan Froyd1-7/+8
2009-12-13target-mips: move ROTR and ROTRV inside gen_shift_{imm, }Nathan Froyd1-139/+148
2009-12-13target-mips: change interrupt bits to be mips16-awareNathan Froyd2-24/+44
2009-12-13target-mips: add new HFLAGs for JALX and 16/32-bit delay slotsNathan Froyd1-19/+28
2009-11-30target-mips: use physical address in lladdrAurelien Jarno3-28/+61
2009-11-30target-mips: add a function to do virtual -> physical translationsAurelien Jarno2-0/+25
2009-11-30target-mips: split code raising MMU exception in a separate functionAurelien Jarno1-46/+53
2009-11-30target-mips: factorize load/store code in op_helper.cAurelien Jarno1-152/+100
2009-11-22target-mips: fix physical address type in MMU functionsAurelien Jarno2-11/+11
2009-11-22target-mips: make CP0_LLAddr register CPU dependentAurelien Jarno5-4/+49
2009-11-22target-mips: rename CP0_LLAddr into lladdrAurelien Jarno4-16/+16
2009-11-14target-mips: fix indentationAurelien Jarno2-3/+3
2009-11-14mips: fix cpu_reset memory leakBlue Swirl3-56/+54
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori5-27/+28
2009-10-01Get rid of _t suffixmalc5-28/+27
2009-09-30target-mips: make sure constants are in the second argumentAurelien Jarno1-7/+7
2009-09-30mips: Fix spelling in commentStefan Weil1-2/+2
2009-09-30target-mips: unmatched brackets in if 0Michael S. Tsirkin1-1/+0
2009-09-28target-mips: log instructions start in TCG codeAurelien Jarno1-0/+4
2009-09-23target-mips: remove MAX_OP_PER_INSTR workaroundAurelien Jarno1-2/+1
2009-09-21Add 'static' to please SparseBlue Swirl1-1/+1
2009-09-14target-mips: fix single-steppingNathan Froyd1-3/+18
2009-09-12Fix sys-queue.h conflict for goodBlue Swirl1-2/+2
2009-08-25target-mips: fix conditional moves off fp condition codesNathan Froyd1-5/+5
2009-08-24cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd1-0/+1
2009-07-27rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela1-1/+1
2009-07-27change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION}Juan Quintela1-1/+1
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl4-8/+4
2009-07-12target-mips: remove useless code in gen_st_cond()Aurelien Jarno1-1/+0
2009-07-12Fix MIPS SCPaul Brook1-2/+2
2009-07-09MIPS atomic instructionsPaul Brook2-24/+64
2009-07-09MIPS usermode TLS registerPaul Brook1-0/+5
2009-07-03target-mips: fix MADD and MSUB/MSUBU instructionsNathan Froyd1-3/+3
2009-06-13Fix a warning: uint_fast8_t is not 8 bits on OpenBSD/Sparc64Blue Swirl1-2/+6
2009-05-21Convert machine registration to use module init functionsAnthony Liguori1-9/+0
2009-05-19Hardware convenience libraryPaul Brook1-3/+0
2009-05-13Include assert.h from qemu-common.hPaul Brook1-1/+0
2009-05-13Replace gcc variadic macro extension with C99 versionBlue Swirl1-3/+3
2009-05-04target-mips: proper sign extension for 'SUBU rd, zero, rt'Aurelien Jarno1-0/+1
2009-05-04target-mips: fix comments about SUB/DSUBAurelien Jarno1-2/+2
2009-04-24qemu: introduce qemu_init_vcpu (Marcelo Tosatti)aliguori1-0/+1
2009-04-24qemu: per-arch cpu_has_work (Marcelo Tosatti)aliguori1-2/+8
2009-04-20Enable access to SYNCI_Step register in usermode emulation.pbrook1-0/+2
2009-04-17Revert "target-mips: fix call to check_*() functions"aurel321-24/+12
2009-04-17target-mips: simplify exception generationaurel321-4/+0
2009-04-16target-mips: fix revision r7126aurel321-1/+1
2009-04-16target-mips: fix call to check_*() functionsaurel321-12/+24
2009-04-16target-mips: optimize gen_flt3_ldst()aurel321-4/+4
2009-04-16target-mips: optimize gen_flt_ldst()aurel321-4/+2
2009-04-16Stop translation after a syscall instruciton.pbrook1-0/+1
2009-04-15target-mips: mark zero register as unused.aurel321-0/+1
2009-04-15target-mips: variable names consistencyaurel322-766/+768
2009-04-13target-mips: fix commits 7040 and 7042aurel321-2/+6
2009-04-12target-mips: fix commit 7046aurel321-2/+2
2009-04-11target-mips: don't map zero register as a TCG globalaurel321-1/+1
2009-04-11target-mips: optimize gen_ldst()aurel321-22/+64
2009-04-11target-mips: optimize gen_arith_imm()aurel321-106/+161
2009-04-10target-mips: fix commit r7076aurel321-2/+1
2009-04-10target-mips: optimize gen_movcf_d()aurel321-1/+1
2009-04-10target-mips: optimize a few tcg_temp_free()aurel321-3/+3
2009-04-08target-mips: optimize gen_farith()aurel321-56/+47
2009-04-08target-mips: optimize gen_flt3_arith()aurel321-18/+16
2009-04-08target-mips: optimize gen_flt3_ldst()aurel321-9/+4
2009-04-08target-mips: optimize gen_arith()aurel321-158/+290
2009-04-08target-mips: optimize decode_opc()aurel321-13/+17
2009-04-08target-mips: optimize gen_cp1()aurel321-15/+5
2009-04-08target-mips: optimize gen_cp0()aurel321-27/+5
2009-04-06target-mips: use the TCG_CALL_PURE and TCG_CALL_CONST for some helpersaurel321-4/+4
2009-04-05Add new command line option -singlestep for tcg single stepping.aurel321-4/+3
2009-03-29target-mips: optimize gen_movcf_*()aurel321-51/+23
2009-03-29target-mips: optimize gen_movci()aurel321-15/+17
2009-03-29target-mips: optimize gen_compute_branch1()aurel321-107/+57
2009-03-29target-mips: don't map FP registers as TCG global variablesaurel321-35/+30
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