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author | Paolo Bonzini <pbonzini@redhat.com> | 2020-05-05 12:01:48 -0400 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2020-05-05 12:01:48 -0400 |
commit | 74e79380f900368bf7f8c9aaac5ac1aba962d63e (patch) | |
tree | 5787e383ce750fa712abe1d7c03e3912e1c4ee2b | |
parent | a3307eb5dbdba6b657a0d9b19eb9bc0c05d04add (diff) | |
download | kvm-unit-tests-74e79380f900368bf7f8c9aaac5ac1aba962d63e.tar.gz |
VMX: use xAPIC mode on all processors
Results are undefined if xAPIC/x2APIC mode is not homogeneous on all processors.
So far things seemed to have mostly worked, but if you end up calling xapic_icr_write
from an x2APIC-mode processor the write is eaten and the IPI is not delivered.
Reported-by: Cathy Avery <cavery@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r-- | lib/x86/smp.c | 16 | ||||
-rw-r--r-- | lib/x86/smp.h | 1 | ||||
-rw-r--r-- | x86/vmx.c | 2 |
3 files changed, 18 insertions, 1 deletions
diff --git a/lib/x86/smp.c b/lib/x86/smp.c index 7b1e0e1..2ac0ef7 100644 --- a/lib/x86/smp.c +++ b/lib/x86/smp.c @@ -130,3 +130,19 @@ void smp_init(void) atomic_inc(&active_cpus); } + +static void do_reset_apic(void *data) +{ + reset_apic(); +} + +void smp_reset_apic(void) +{ + int i; + + reset_apic(); + for (i = 1; i < cpu_count(); ++i) + on_cpu(i, do_reset_apic, 0); + + atomic_inc(&active_cpus); +} diff --git a/lib/x86/smp.h b/lib/x86/smp.h index 1453bb5..09dfa86 100644 --- a/lib/x86/smp.h +++ b/lib/x86/smp.h @@ -10,5 +10,6 @@ int cpus_active(void); void on_cpu(int cpu, void (*function)(void *data), void *data); void on_cpu_async(int cpu, void (*function)(void *data), void *data); void on_cpus(void (*function)(void *data), void *data); +void smp_reset_apic(void); #endif @@ -2081,7 +2081,7 @@ int main(int argc, const char *argv[]) hypercall_field = 0; /* We want xAPIC mode to test MMIO passthrough from L1 (us) to L2. */ - reset_apic(); + smp_reset_apic(); argv++; argc--; |