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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2014-12-10 20:29:25 +0200
committerThomas Gleixner <tglx@linutronix.de>2014-12-10 23:43:56 +0100
commitc528d8b32d130956b3c158394d854e948cfc3411 (patch)
treee0e5ece9b4e42955baeed4be70dbe912c070f732
parentba6579e27bb6308ebd03463092c75b4f8a904413 (diff)
downloadapic-master.tar.gz
x86, ioapic: Add proper legacy interrupt check to mp_map_pin_to_irq()HEADmaster
Since commit bfa644bfa9e3 (x86, irq: Convert IOAPIC to use hierarchy irqdomain interfaces) Intel MID platforms crashes on boot: Enabling APIC mode: Flat. Using 1 I/O APICs BUG: unable to handle kernel NULL pointer dereference at 00000018 IP: [<c107bdc6>] __irq_domain_alloc_irqs+0xff/0x250 The reason is that mp_map_pin_to_irq() assumes blindly that any non PCI interrupt is legacy, but thats wrong for MID platforms as they have no legacy interrupt support. alloc_irq_from_domain() and mp_init_irq_at_boot() have checks for this, but mp_map_pin_to_irq() is lacking one. Instead of copying the same code another time, move the check to an inline function and use it everywhere. [ tglx: Massaged changelog ] Fixes: bfa644bfa9e3 'x86, irq: Convert IOAPIC to use hierarchy irqdomain interfaces' Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: David Cohen <david.a.cohen@linux.intel.com> Link: http://lkml.kernel.org/r/1418236165-13961-1-git-send-email-andriy.shevchenko@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r--arch/x86/kernel/apic/io_apic.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index ed22b4cb6adc5..f60e06e499be1 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -149,6 +149,11 @@ static inline u32 mp_pin_to_gsi(int ioapic, int pin)
return mp_ioapic_gsi_routing(ioapic)->gsi_base + pin;
}
+static inline bool mp_is_legacy_irq(int irq)
+{
+ return irq >= 0 && irq < nr_legacy_irqs();
+}
+
/*
* Initialize all legacy IRQs and all pins on the first IOAPIC
* if we have legacy interrupt controller. Kernel boot option "pirq="
@@ -159,7 +164,7 @@ static inline int mp_init_irq_at_boot(int ioapic, int irq)
if (!nr_legacy_irqs())
return 0;
- return ioapic == 0 || (irq >= 0 && irq < nr_legacy_irqs());
+ return ioapic == 0 || mp_is_legacy_irq(irq);
}
static inline struct irq_domain *mp_ioapic_irqdomain(int ioapic)
@@ -960,7 +965,7 @@ static int alloc_irq_from_domain(struct irq_domain *domain, int ioapic, u32 gsi,
*/
if (!ioapic_initialized || gsi >= nr_legacy_irqs())
irq = gsi;
- legacy = irq >= 0 && irq < nr_legacy_irqs();
+ legacy = mp_is_legacy_irq(irq);
break;
case IOAPIC_DOMAIN_STRICT:
irq = gsi;
@@ -1031,8 +1036,8 @@ static int mp_map_pin_to_irq(u32 gsi, int idx, int ioapic, int pin,
return -ENOSYS;
if (idx >= 0 && test_bit(mp_irqs[idx].srcbus, mp_bus_not_pci)) {
- legacy = true;
irq = mp_irqs[idx].srcbusirq;
+ legacy = mp_is_legacy_irq(irq);
}
mutex_lock(&ioapic_mutex);