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authorRoman Li <roman.li@amd.com>2020-02-26 17:30:29 -0500
committerAlex Deucher <alexander.deucher@amd.com>2020-05-05 16:13:15 -0400
commit80797dd6f1a525d1160c463d6a9f9d29af182cbb (patch)
tree7b0bd90315cd133c0ca533945eaf185b44e236ab
parentb95e51eb9f2ee7b6d6c3203a2f75122349aa77be (diff)
downloadprintk-80797dd6f1a525d1160c463d6a9f9d29af182cbb.tar.gz
drm/amd/display: fix counter in wait_for_no_pipes_pending
[Why] Wait counter is not being reset for each pipe. [How] Move counter reset into pipe loop scope. Signed-off-by: Roman Li <roman.li@amd.com> Reviewed-by: Zhan Liu <Zhan.Liu@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 8489f1e56892c9..47431ca6986db7 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -834,11 +834,10 @@ static void disable_dangling_plane(struct dc *dc, struct dc_state *context)
static void wait_for_no_pipes_pending(struct dc *dc, struct dc_state *context)
{
int i;
- int count = 0;
- struct pipe_ctx *pipe;
PERF_TRACE();
for (i = 0; i < MAX_PIPES; i++) {
- pipe = &context->res_ctx.pipe_ctx[i];
+ int count = 0;
+ struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
if (!pipe->plane_state)
continue;