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| author | Roy Spliet <rspliet@eclipso.eu> | 2013-11-17 20:09:05 +0100 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2013-12-03 23:28:55 +1000 |
| commit | b1cd49763bb4b0dacb7795d1152cd4e6660ab7bc (patch) | |
| tree | 927c4a0559eb1c2db5b4546fbbefb937ee206364 | |
| parent | efffa9841cf42ae8350d421070cea962b063df8c (diff) | |
| download | mfd-fixes-b1cd49763bb4b0dacb7795d1152cd4e6660ab7bc.tar.gz | |
drm/nouveau/fifo: Hook up pause and resume for NV50 and NV84+
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c index 5f555788121c9..e6352bd5b4ff5 100644 --- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c @@ -33,6 +33,7 @@ #include <engine/dmaobj.h> #include <engine/fifo.h> +#include "nv04.h" #include "nv50.h" /******************************************************************************* @@ -460,6 +461,8 @@ nv50_fifo_ctor(struct nouveau_object *parent, struct nouveau_object *engine, nv_subdev(priv)->intr = nv04_fifo_intr; nv_engine(priv)->cclass = &nv50_fifo_cclass; nv_engine(priv)->sclass = nv50_fifo_sclass; + priv->base.pause = nv04_fifo_pause; + priv->base.start = nv04_fifo_start; return 0; } diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c index 0908dc834c84c..fe0f41e65d9b9 100644 --- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c +++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c @@ -35,6 +35,7 @@ #include <engine/dmaobj.h> #include <engine/fifo.h> +#include "nv04.h" #include "nv50.h" /******************************************************************************* @@ -432,6 +433,8 @@ nv84_fifo_ctor(struct nouveau_object *parent, struct nouveau_object *engine, nv_subdev(priv)->intr = nv04_fifo_intr; nv_engine(priv)->cclass = &nv84_fifo_cclass; nv_engine(priv)->sclass = nv84_fifo_sclass; + priv->base.pause = nv04_fifo_pause; + priv->base.start = nv04_fifo_start; return 0; } |