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authorPaul E. McKenney <paulmck@kernel.org>2023-07-02 16:31:29 -0700
committerPaul E. McKenney <paulmck@kernel.org>2023-07-02 16:31:29 -0700
commitf78aed35958ba9e0e90df68574be2c7cc40c1396 (patch)
tree4f75005bb23323db39d1ab51f6a74ea2fe09da5b
parent0f48be84b5fcf7035d69980fc73ff2cbb6baba36 (diff)
downloadperfbook-f78aed35958ba9e0e90df68574be2c7cc40c1396.tar.gz
treewide: Remove ignored first parameter of origpub macros
As they are no longer used thanks to \Cref, remove the first parameter from OriginallyPublished, RangeOriginallyPublished, ContributedBy, and QContributedBy. Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
-rw-r--r--SMPdesign/SMPdesign.tex6
-rw-r--r--SMPdesign/beyond.tex2
-rw-r--r--SMPdesign/partexercises.tex10
-rw-r--r--advsync/rt.tex16
-rw-r--r--appendix/questions/time.tex2
-rw-r--r--count/count.tex2
-rw-r--r--cpu/overheads.tex2
-rw-r--r--cpu/overview.tex18
-rw-r--r--datastruct/datastruct.tex4
-rw-r--r--debugging/debugging.tex8
-rw-r--r--defer/rcuapi.tex2
-rw-r--r--defer/rcufundamental.tex2
-rw-r--r--defer/rcurelated.tex4
-rw-r--r--defer/rcuusage.tex2
-rw-r--r--easy/easy.tex2
-rw-r--r--formal/axiomatic.tex2
-rw-r--r--formal/formal.tex2
-rw-r--r--future/cpu.tex10
-rw-r--r--future/tm.tex8
-rw-r--r--intro/intro.tex2
-rw-r--r--locking/locking.tex4
-rw-r--r--memorder/memorder.tex20
-rw-r--r--origpub.sty26
-rw-r--r--summary.tex2
-rw-r--r--together/applyrcu.tex2
-rw-r--r--toolsoftrade/toolsoftrade.tex2
26 files changed, 81 insertions, 81 deletions
diff --git a/SMPdesign/SMPdesign.tex b/SMPdesign/SMPdesign.tex
index c5206ead..130e9b4c 100644
--- a/SMPdesign/SMPdesign.tex
+++ b/SMPdesign/SMPdesign.tex
@@ -323,7 +323,7 @@ in the next section.
\centering
\resizebox{2.5in}{!}{\includegraphics{cartoons/r-2014-Data-one-fighting}}
\caption{Lock Contention}
-\ContributedBy{Figure}{fig:SMPdesign:Lock Contention}{Melissa Broussard}
+\ContributedBy{fig:SMPdesign:Lock Contention}{Melissa Broussard}
\end{figure}
\subsection{Data Locking}
@@ -412,7 +412,7 @@ a given hash bucket.
\centering
\resizebox{2.4in}{!}{\includegraphics{cartoons/r-2014-Data-many-happy}}
\caption{Data Locking}
-\ContributedBy{Figure}{fig:SMPdesign:Data Locking}{Melissa Broussard}
+\ContributedBy{fig:SMPdesign:Data Locking}{Melissa Broussard}
\end{figure}
% ./test_hash_spinlock.exe 1000 0/100 1 1024 1
@@ -447,7 +447,7 @@ shown in \cref{fig:SMPdesign:Data and Skew}.
\centering
\resizebox{\twocolumnwidth}{!}{\includegraphics{cartoons/r-2014-Data-many-fighting}}
\caption{Data Locking and Skew}
-\ContributedBy{Figure}{fig:SMPdesign:Data and Skew}{Melissa Broussard}
+\ContributedBy{fig:SMPdesign:Data and Skew}{Melissa Broussard}
\end{figure}
In many cases, algorithms can be designed to reduce the instance of
diff --git a/SMPdesign/beyond.tex b/SMPdesign/beyond.tex
index f83da114..e90298ce 100644
--- a/SMPdesign/beyond.tex
+++ b/SMPdesign/beyond.tex
@@ -4,7 +4,7 @@
\section{Beyond Partitioning}
\label{sec:SMPdesign:Beyond Partitioning}
-\OriginallyPublished{Section}{sec:SMPdesign:Beyond Partitioning}{Retrofitted Parallelism Considered Grossly Sub-Optimal}{4\textsuperscript{th} USENIX Workshop on Hot Topics on Parallelism}{PaulEMcKenney2012HOTPARsuboptimal}
+\OriginallyPublished{sec:SMPdesign:Beyond Partitioning}{Retrofitted Parallelism Considered Grossly Sub-Optimal}{4\textsuperscript{th} USENIX Workshop on Hot Topics on Parallelism}{PaulEMcKenney2012HOTPARsuboptimal}
%
\epigraph{It is all right to aim high if you have plenty of ammunition.}
{Hawley R. Everhart}
diff --git a/SMPdesign/partexercises.tex b/SMPdesign/partexercises.tex
index 27ec1024..98ce3d32 100644
--- a/SMPdesign/partexercises.tex
+++ b/SMPdesign/partexercises.tex
@@ -25,7 +25,7 @@ revisits the double-ended queue.
\centering
\includegraphics[scale=.7]{SMPdesign/DiningPhilosopher5}
\caption{Dining Philosophers Problem}
-\ContributedBy{Figure}{fig:SMPdesign:Dining Philosophers Problem}{Kornilios Kourtis}
+\ContributedBy{fig:SMPdesign:Dining Philosophers Problem}{Kornilios Kourtis}
\end{figure}
\Cref{fig:SMPdesign:Dining Philosophers Problem} shows a diagram
@@ -45,7 +45,7 @@ immediate right and left, but will not put a given fork down until sated.
\resizebox{\onecolumntextwidth}{!}{\includegraphics{cartoons/Dining-philosophers}}
}
\caption{Partial Starvation Is Also Bad}
-\ContributedBy{Figure}{fig:cpu:Partial Starvation Is Also Bad}{Melissa Broussard}
+\ContributedBy{fig:cpu:Partial Starvation Is Also Bad}{Melissa Broussard}
\end{figure*}
The object is to construct an algorithm that, quite literally,
@@ -64,7 +64,7 @@ shows, starvation of even a few of the philosophers is to be avoided.
\centering
\includegraphics[scale=.7]{SMPdesign/DiningPhilosopher5TB}
\caption{Dining Philosophers Problem, Textbook Solution}
-\ContributedBy{Figure}{fig:SMPdesign:Dining Philosophers Problem; Textbook Solution}{Kornilios Kourtis}
+\ContributedBy{fig:SMPdesign:Dining Philosophers Problem; Textbook Solution}{Kornilios Kourtis}
\end{figure}
\pplsur{Edsger W.}{Dijkstra}'s solution used a global semaphore,
@@ -114,7 +114,7 @@ It should be possible to do better than this!
\centering
\includegraphics[scale=.7]{SMPdesign/DiningPhilosopher4part-b}
\caption{Dining Philosophers Problem, Partitioned}
-\ContributedBy{Figure}{fig:SMPdesign:Dining Philosophers Problem; Partitioned}{Kornilios Kourtis}
+\ContributedBy{fig:SMPdesign:Dining Philosophers Problem; Partitioned}{Kornilios Kourtis}
\end{figure}
One approach is shown in
@@ -146,7 +146,7 @@ the acquisition and release algorithms.
\centering
\includegraphics[scale=.7]{SMPdesign/DiningPhilosopher5PEM}
\caption{Dining Philosophers Problem, Fully Partitioned}
-\QContributedBy{Figure}{fig:SMPdesign:Dining Philosophers Problem; Fully Partitioned}{Kornilios Kourtis}
+\QContributedBy{fig:SMPdesign:Dining Philosophers Problem; Fully Partitioned}{Kornilios Kourtis}
\end{figure}
This solution might seem like cheating to some, but such
diff --git a/advsync/rt.tex b/advsync/rt.tex
index e02da57a..b154030f 100644
--- a/advsync/rt.tex
+++ b/advsync/rt.tex
@@ -90,7 +90,7 @@ doesn't.
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/realtime-smash}}
\caption{Real-Time Response, Meet Hammer}
-\ContributedBy{Figure}{fig:advsync:Hard Real-Time Response; Meet Hammer}{Melissa Broussard}
+\ContributedBy{fig:advsync:Hard Real-Time Response; Meet Hammer}{Melissa Broussard}
\end{figure}
Unfortunately, a strict application of this definition would mean that
@@ -107,7 +107,7 @@ Ask the dinosaurs.
\resizebox{3in}{!}{\includegraphics{cartoons/realtime-lifesupport-nobomb}}
\caption{Real-Time Response:
Hardware Matters}
-\ContributedBy{Figure}{fig:advsync:Real-Time Response: Hardware Matters}{Melissa Broussard}
+\ContributedBy{fig:advsync:Real-Time Response: Hardware Matters}{Melissa Broussard}
\end{figure}
Then again, perhaps it is unfair to blame the software for what is clearly
@@ -138,7 +138,7 @@ it can alert the hospital staff.
\resizebox{\onecolumntextwidth}{!}{\rotatebox{90}{\includegraphics{cartoons/realtime-lazy-crop}}}
\caption{Real-Time Response:
Notification Insufficient}
-\ContributedBy{Figure}{fig:advsync:Real-Time Response: Notification Insufficient}{Melissa Broussard}
+\ContributedBy{fig:advsync:Real-Time Response: Notification Insufficient}{Melissa Broussard}
\end{figure*}
Unfortunately, this approach has the trivial solution fancifully depicted in
@@ -940,14 +940,14 @@ levels.
\centering
\resizebox{3.0in}{!}{\includegraphics{cartoons/1kHz}}
\caption{Timer Wheel at 1\,kHz}
-\ContributedBy{Figure}{fig:advsync:Timer Wheel at 1kHz}{Melissa Broussard}
+\ContributedBy{fig:advsync:Timer Wheel at 1kHz}{Melissa Broussard}
\end{figure}
\begin{figure}
\centering
\resizebox{3.0in}{!}{\includegraphics{cartoons/100kHz}}
\caption{Timer Wheel at 100\,kHz}
-\ContributedBy{Figure}{fig:advsync:Timer Wheel at 100kHz}{Melissa Broussard}
+\ContributedBy{fig:advsync:Timer Wheel at 100kHz}{Melissa Broussard}
\end{figure}
Unfortunately, timer wheels do not work well for real-time systems, and for
@@ -1123,7 +1123,7 @@ priority inversion.
\centering
\resizebox{3.4in}{!}{\includegraphics{cartoons/Priority_Boost_2}}
\caption{Priority Inversion and User Input}
-\ContributedBy{Figure}{fig:advsync:Priority Inversion and User Input}{Melissa Broussard}
+\ContributedBy{fig:advsync:Priority Inversion and User Input}{Melissa Broussard}
\end{figure}
Of course, priority inheritance does have its limitations.
@@ -2021,7 +2021,7 @@ unwise, as fancifully depicted by
\centering
\resizebox{3.2in}{!}{\includegraphics{cartoons/RealTimeNotRealFast}}
\caption{The Dark Side of Real-Time Computing}
-\ContributedBy{Figure}{fig:advsync:The Dark Side of Real-Time Computing}{Sarah McKenney}
+\ContributedBy{fig:advsync:The Dark Side of Real-Time Computing}{Sarah McKenney}
\end{figure}
On the other hand, failing to use real-time when it \emph{is} required
@@ -2033,7 +2033,7 @@ It is almost enough to make you feel sorry for the boss!
\centering
\resizebox{3.2in}{!}{\includegraphics{cartoons/RealFastNotRealTime}}
\caption{The Dark Side of Real-Fast Computing}
-\ContributedBy{Figure}{fig:advsync:The Dark Side of Real-Fast Computing}{Sarah McKenney}
+\ContributedBy{fig:advsync:The Dark Side of Real-Fast Computing}{Sarah McKenney}
\end{figure}
One rule of thumb uses the following four questions to help you choose:
diff --git a/appendix/questions/time.tex b/appendix/questions/time.tex
index 49961966..34e37891 100644
--- a/appendix/questions/time.tex
+++ b/appendix/questions/time.tex
@@ -24,7 +24,7 @@ the resulting time interval, the end, or somewhere in between?
\centering
\resizebox{2.6in}{!}{\includegraphics{cartoons/r-2014-What-time-is-it}}
\caption{What Time Is It?}
-\ContributedBy{Figure}{fig:app:questions:What Time Is It?}{Melissa Broussard}
+\ContributedBy{fig:app:questions:What Time Is It?}{Melissa Broussard}
\end{figure}
Worse yet, the thread reading the time might be interrupted or preempted.
diff --git a/count/count.tex b/count/count.tex
index c551d6a7..451938d7 100644
--- a/count/count.tex
+++ b/count/count.tex
@@ -354,7 +354,7 @@ additional CPUs.
\centering
\resizebox{3.2in}{!}{\includegraphics{cartoons/r-2014-One-one-thousand}}
\caption{Waiting to Count}
-\ContributedBy{Figure}{fig:count:Waiting to Count}{Melissa Broussard}
+\ContributedBy{fig:count:Waiting to Count}{Melissa Broussard}
\end{figure}
For another perspective on global atomic increment, consider
diff --git a/cpu/overheads.tex b/cpu/overheads.tex
index 7b67db14..1ee9c52f 100644
--- a/cpu/overheads.tex
+++ b/cpu/overheads.tex
@@ -648,7 +648,7 @@ exceedingly efficiently, and is the subject of
\resizebox{3in}{!}{\includegraphics{cartoons/Data-chasing-light-wave}}
\caption{Hardware and Software:
On Same Side}
-\ContributedBy{Figure}{fig:cpu:Hardware and Software: On Same Side}{Melissa Broussard}
+\ContributedBy{fig:cpu:Hardware and Software: On Same Side}{Melissa Broussard}
\end{figure}
In short, hardware and software engineers are really on the same side,
diff --git a/cpu/overview.tex b/cpu/overview.tex
index 6ac93f1a..1d233189 100644
--- a/cpu/overview.tex
+++ b/cpu/overview.tex
@@ -18,7 +18,7 @@ where the race always goes to the swiftest.
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/r-2014-CPU-track-meet}}
\caption{CPU Performance at its Best}
-\ContributedBy{Figure}{fig:cpu:CPU Performance at its Best}{Melissa Broussard}
+\ContributedBy{fig:cpu:CPU Performance at its Best}{Melissa Broussard}
\end{figure}
Although there are a few CPU-bound benchmarks that approach the ideal case
@@ -36,7 +36,7 @@ These changes are described in the following sections.
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/r-2014-Old-man-and-Brat}}
\caption{CPUs Old and New}
-\ContributedBy{Figure}{fig:cpu:CPUs Old and New}{Melissa Broussard}
+\ContributedBy{fig:cpu:CPUs Old and New}{Melissa Broussard}
\end{figure}
In the 1980s, the typical microprocessor fetched an instruction, decoded
@@ -68,7 +68,7 @@ allowing the pipeline to be kept full and the CPU to execute at full speed.
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/r-2014-branch-error}}
\caption{CPU Meets a Pipeline Flush}
-\ContributedBy{Figure}{fig:cpu:CPU Meets a Pipeline Flush}{Melissa Broussard}
+\ContributedBy{fig:cpu:CPU Meets a Pipeline Flush}{Melissa Broussard}
\end{figure}
However, branch prediction is not always so easy.
@@ -157,7 +157,7 @@ call them ``level-0 caches'', plus they can be quite a bit bigger than 4\,KB.
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/r-2014-memory-reference}}
\caption{CPU Meets a Memory Reference}
-\ContributedBy{Figure}{fig:cpu:CPU Meets a Memory Reference}{Melissa Broussard}
+\ContributedBy{fig:cpu:CPU Meets a Memory Reference}{Melissa Broussard}
\end{figure}
Although the large caches found on modern microprocessors can do quite
@@ -203,7 +203,7 @@ permit a given atomic operation to complete correctly.
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/r-2014-Atomic-reference}}
\caption{CPU Meets an Atomic Operation}
-\ContributedBy{Figure}{fig:cpu:CPU Meets an Atomic Operation}{Melissa Broussard}
+\ContributedBy{fig:cpu:CPU Meets an Atomic Operation}{Melissa Broussard}
\end{figure}
In contrast, when executing a non-atomic operation, the CPU can load
@@ -262,7 +262,7 @@ spin_unlock(&mylock);
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/r-2014-Memory-barrier}}
\caption{CPU Meets a Memory Barrier}
-\ContributedBy{Figure}{fig:cpu:CPU Meets a Memory Barrier}{Melissa Broussard}
+\ContributedBy{fig:cpu:CPU Meets a Memory Barrier}{Melissa Broussard}
\end{figure}
If the CPU were not constrained to execute these statements in the
@@ -286,7 +286,7 @@ reduce \IXh{memory-barrier}{overhead}, and have made substantial progress.
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/r-2022-Thermal-throttling}}
\caption{CPU Encounters Thermal Throttling}
-\ContributedBy{Figure}{fig:cpu:Encounters Thermal Throttling}{Melissa Broussard, remixed}
+\ContributedBy{fig:cpu:Encounters Thermal Throttling}{Melissa Broussard, remixed}
\end{figure}
One increasingly common frustrating experience is to carefully
@@ -323,7 +323,7 @@ work (and thus the heat) over multiple CPU cores.
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/r-2014-CPU-track-meet-cache-miss-toll-booth}}
\caption{CPU Meets a Cache Miss}
-\ContributedBy{Figure}{fig:cpu:CPU Meets a Cache Miss}{Melissa Broussard}
+\ContributedBy{fig:cpu:CPU Meets a Cache Miss}{Melissa Broussard}
\end{figure}
An additional multi-threading obstacle to CPU performance is
@@ -361,7 +361,7 @@ in \cref{fig:cpu:CPU Meets a Cache Miss}.
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/r-2014-CPU-track-meet-phone-booth}}
\caption{CPU Waits for I/O Completion}
-\ContributedBy{Figure}{fig:cpu:CPU Waits for I/O Completion}{Melissa Broussard}
+\ContributedBy{fig:cpu:CPU Waits for I/O Completion}{Melissa Broussard}
\end{figure}
A cache miss can be thought of as a CPU-to-CPU I/O operation, and as
diff --git a/datastruct/datastruct.tex b/datastruct/datastruct.tex
index e0db6748..b56492d1 100644
--- a/datastruct/datastruct.tex
+++ b/datastruct/datastruct.tex
@@ -1045,7 +1045,7 @@ via olfactory means.
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/2013-08-is-it-dead}}
\caption{Even Veterinarians Disagree!}
-\ContributedBy{Figure}{fig:datastruct:Even Veterinarians Disagree}{Melissa Broussard}
+\ContributedBy{fig:datastruct:Even Veterinarians Disagree}{Melissa Broussard}
\end{figure}
Because an animal's heart can stop for some seconds and then start up
@@ -1108,7 +1108,7 @@ scalable RCU-protected hash tables, as described in the following sections.
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/2014_Hash-table-hydra}}
\caption{Partitioning Problems}
-\ContributedBy{Figure}{fig:datastruct:Partitioning Problems}{Melissa Broussard}
+\ContributedBy{fig:datastruct:Partitioning Problems}{Melissa Broussard}
\end{figure}
\subsection{Resizable Hash Table Design}
diff --git a/debugging/debugging.tex b/debugging/debugging.tex
index b0b59b49..18fc21bb 100644
--- a/debugging/debugging.tex
+++ b/debugging/debugging.tex
@@ -381,14 +381,14 @@ This can work well, if properly organized.
\centering
\resizebox{2in}{!}{\includegraphics{cartoons/TortureTux}}
\caption{Validation and the Geneva Convention}
-\ContributedBy{Figure}{fig:debugging:Validation and the Geneva Convention}{Melissa Broussard}
+\ContributedBy{fig:debugging:Validation and the Geneva Convention}{Melissa Broussard}
\end{figure}
\begin{figure}
\centering
\resizebox{2in}{!}{\includegraphics{cartoons/TortureLaptop}}
\caption{Rationalizing Validation}
-\ContributedBy{Figure}{fig:debugging:Rationalizing Validation}{Melissa Broussard}
+\ContributedBy{fig:debugging:Rationalizing Validation}{Melissa Broussard}
\end{figure}
Some people might see vigorous validation as a form of torture, as
@@ -1173,7 +1173,7 @@ Congratulations!!!
\resizebox{3in}{!}{\includegraphics{cartoons/r-2014-Passed-the-stress-test}}
\caption{Passed on Merits?
Or Dumb Luck?}
-\ContributedBy{Figure}{fig:cpu:Passed-the-stress-test}{Melissa Broussard}
+\ContributedBy{fig:cpu:Passed-the-stress-test}{Melissa Broussard}
\end{figure}
Now the question is just how much testing is required in order to be
@@ -2709,7 +2709,7 @@ situations like the one fancifully depicted in
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/UseTheRightCannon}}
\caption{Choose Validation Methods Wisely}
-\ContributedBy{Figure}{fig:debugging:Choose Validation Methods Wisely}{Melissa Broussard}
+\ContributedBy{fig:debugging:Choose Validation Methods Wisely}{Melissa Broussard}
\end{figure}
A key choice is that of statistics.
diff --git a/defer/rcuapi.tex b/defer/rcuapi.tex
index 34791918..820b5f7b 100644
--- a/defer/rcuapi.tex
+++ b/defer/rcuapi.tex
@@ -4,7 +4,7 @@
\subsection{RCU Linux-Kernel API}
\label{sec:defer:RCU Linux-Kernel API}
-\OriginallyPublished{Section}{sec:defer:RCU Linux-Kernel API}{RCU Linux-Kernel API}{Linux Weekly News}{PaulEMcKenney2008WhatIsRCUAPI}
+\OriginallyPublished{sec:defer:RCU Linux-Kernel API}{RCU Linux-Kernel API}{Linux Weekly News}{PaulEMcKenney2008WhatIsRCUAPI}
This section looks at RCU from the viewpoint of its Linux-kernel API\@.\footnote{
Userspace RCU's API is documented
diff --git a/defer/rcufundamental.tex b/defer/rcufundamental.tex
index 1de494f1..17462aae 100644
--- a/defer/rcufundamental.tex
+++ b/defer/rcufundamental.tex
@@ -4,7 +4,7 @@
\subsection{RCU Fundamentals}
\label{sec:defer:RCU Fundamentals}
-\OriginallyPublished{Section}{sec:defer:RCU Fundamentals}{RCU Fundamentals}{Linux Weekly News}{PaulEMcKenney2007WhatIsRCUFundamentally}
+\OriginallyPublished{sec:defer:RCU Fundamentals}{RCU Fundamentals}{Linux Weekly News}{PaulEMcKenney2007WhatIsRCUFundamentally}
This section re-examines the ground covered in the previous section, but
independent of any particular example or use case.
diff --git a/defer/rcurelated.tex b/defer/rcurelated.tex
index bab3f244..8846825f 100644
--- a/defer/rcurelated.tex
+++ b/defer/rcurelated.tex
@@ -4,8 +4,8 @@
\subsection{RCU Related Work}
\label{sec:defer:RCU Related Work}
-\OriginallyPublished{Section}{sec:defer:RCU Related Work}{RCU Related Work}{Linux Weekly News}{PaulEMcKenney2014ReadMostly}
-\OriginallyPublished{Section}{sec:defer:RCU Related Work}{RCU Related Work}{Linux Weekly News}{PaulEMcKenney2015ReadMostly}
+\OriginallyPublished{sec:defer:RCU Related Work}{RCU Related Work}{Linux Weekly News}{PaulEMcKenney2014ReadMostly}
+\OriginallyPublished{sec:defer:RCU Related Work}{RCU Related Work}{Linux Weekly News}{PaulEMcKenney2015ReadMostly}
The first known mention of anything resembling RCU took the form of a bug
report from
diff --git a/defer/rcuusage.tex b/defer/rcuusage.tex
index 2d11b493..b85312e4 100644
--- a/defer/rcuusage.tex
+++ b/defer/rcuusage.tex
@@ -4,7 +4,7 @@
\subsection{RCU Usage}
\label{sec:defer:RCU Usage}
-\OriginallyPublished{Section}{sec:defer:RCU Usage}{RCU Usage}{Linux Weekly News}{PaulEMcKenney2008WhatIsRCUUsage}
+\OriginallyPublished{sec:defer:RCU Usage}{RCU Usage}{Linux Weekly News}{PaulEMcKenney2008WhatIsRCUUsage}
This section answers the question ``What is RCU?'' from the viewpoint
of the uses to which RCU can be put.
diff --git a/easy/easy.tex b/easy/easy.tex
index 6c20dfb6..d74f7453 100644
--- a/easy/easy.tex
+++ b/easy/easy.tex
@@ -290,7 +290,7 @@ containing only one element!
\centering
\resizebox{2.5in}{!}{\includegraphics{cartoons/r-2014-shaving-the-mandelbrot}}
\caption{Shaving the Mandelbrot Set}
-\ContributedBy{Figure}{fig:easy:Shaving the Mandelbrot Set}{Melissa Broussard}
+\ContributedBy{fig:easy:Shaving the Mandelbrot Set}{Melissa Broussard}
\end{figure}
In summary, we do not use algorithms simply because they happen to work.
diff --git a/formal/axiomatic.tex b/formal/axiomatic.tex
index 04adec21..42fd5fb0 100644
--- a/formal/axiomatic.tex
+++ b/formal/axiomatic.tex
@@ -4,7 +4,7 @@
\section{Axiomatic Approaches}
\label{sec:formal:Axiomatic Approaches}
-\OriginallyPublished{Section}{sec:formal:Axiomatic Approaches}{Axiomatic Approaches}{Linux Weekly News}{PaulEMcKenney2014weakaxiom}
+\OriginallyPublished{sec:formal:Axiomatic Approaches}{Axiomatic Approaches}{Linux Weekly News}{PaulEMcKenney2014weakaxiom}
%
\epigraph{Theory helps us to bear our ignorance of facts.}
{George Santayana}
diff --git a/formal/formal.tex b/formal/formal.tex
index 517358c9..4348aacb 100644
--- a/formal/formal.tex
+++ b/formal/formal.tex
@@ -7,7 +7,7 @@
\Epigraph{Beware of bugs in the above code; I have only proved it correct,
not tried it.}{Donald Knuth}
-\OriginallyPublished{Chapter}{chp:Formal Verification}{Formal Verification}{Linux Weekly News}{PaulEMcKenney2007QRCUspin,PaulEMcKenney2008dynticksRCU,PaulEMcKenney2011ppcmem}
+\OriginallyPublished{chp:Formal Verification}{Formal Verification}{Linux Weekly News}{PaulEMcKenney2007QRCUspin,PaulEMcKenney2008dynticksRCU,PaulEMcKenney2011ppcmem}
Parallel algorithms can be hard to write, and even harder to debug.
Testing, though essential, is insufficient, as fatal \IXpl{race condition}
diff --git a/future/cpu.tex b/future/cpu.tex
index 9092e310..b5315615 100644
--- a/future/cpu.tex
+++ b/future/cpu.tex
@@ -20,35 +20,35 @@ With that in mind, consider the following scenarios:
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/r-2014-CPU-future-uniprocessor-uber-alles}}
\caption{Uniprocessor \"Uber Alles}
-\ContributedBy{Figure}{fig:future:Uniprocessor \"Uber Alles}{Melissa Broussard}
+\ContributedBy{fig:future:Uniprocessor \"Uber Alles}{Melissa Broussard}
\end{figure}
\begin{figure}
\centering
\resizebox{2.6in}{!}{\includegraphics{cartoons/r-2014-CPU-Future-Multithreaded-Mania}}
\caption{Multithreaded Mania}
-\ContributedBy{Figure}{fig:future:Multithreaded Mania}{Melissa Broussard}
+\ContributedBy{fig:future:Multithreaded Mania}{Melissa Broussard}
\end{figure}
\begin{figure}
\centering
\resizebox{2.5in}{!}{\includegraphics{cartoons/r-2014-CPU-Future-More-of-the-Same}}
\caption{More of the Same}
-\ContributedBy{Figure}{fig:future:More of the Same}{Melissa Broussard}
+\ContributedBy{fig:future:More of the Same}{Melissa Broussard}
\end{figure}
\begin{figure}
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/r-2014-CPU-Future-Crash-dummies}}
\caption{Crash Dummies Slamming into the Memory Wall}
-\ContributedBy{Figure}{fig:future:Crash Dummies Slamming into the Memory Wall}{Melissa Broussard}
+\ContributedBy{fig:future:Crash Dummies Slamming into the Memory Wall}{Melissa Broussard}
\end{figure}
\begin{figure}
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/r-2021-CPU-future-astounding-accelerator}}
\caption{Astounding Accelerators}
-\ContributedBy{Figure}{fig:future:Astounding Accelerators}{Melissa Broussard, remixed}
+\ContributedBy{fig:future:Astounding Accelerators}{Melissa Broussard, remixed}
\end{figure}
\begin{enumerate}
diff --git a/future/tm.tex b/future/tm.tex
index 959b3cc0..9872f623 100644
--- a/future/tm.tex
+++ b/future/tm.tex
@@ -1408,7 +1408,7 @@ And vice versa.
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/TM-the-vision}}
\caption{The STM Vision}
-\ContributedBy{Figure}{fig:future:The STM Vision}{Melissa Broussard}
+\ContributedBy{fig:future:The STM Vision}{Melissa Broussard}
\end{figure}
\begin{figure}
@@ -1416,7 +1416,7 @@ And vice versa.
\resizebox{2.7in}{!}{\includegraphics{cartoons/TM-the-reality-conflict}}
\caption{The STM Reality:
Conflicts}
-\ContributedBy{Figure}{fig:future:The STM Reality: Conflicts}{Melissa Broussard}
+\ContributedBy{fig:future:The STM Reality: Conflicts}{Melissa Broussard}
\end{figure}
\begin{figure}
@@ -1424,7 +1424,7 @@ And vice versa.
\resizebox{3in}{!}{\includegraphics{cartoons/TM-the-reality-nonidempotent}}
\caption{The STM Reality:
Irrevocable Operations}
-\ContributedBy{Figure}{fig:future:The STM Reality: Irrevocable Operations}{Melissa Broussard}
+\ContributedBy{fig:future:The STM Reality: Irrevocable Operations}{Melissa Broussard}
\end{figure}
\begin{figure}
@@ -1432,7 +1432,7 @@ And vice versa.
\resizebox{2.7in}{!}{\includegraphics{cartoons/TM-the-reality-realtime}}
\caption{The STM Reality:
Realtime Response}
-\ContributedBy{Figure}{fig:future:The STM Reality: Realtime Response}{Melissa Broussard}
+\ContributedBy{fig:future:The STM Reality: Realtime Response}{Melissa Broussard}
\end{figure}
But for the moment, the current state of STM
diff --git a/intro/intro.tex b/intro/intro.tex
index f16f3acd..35abdf49 100644
--- a/intro/intro.tex
+++ b/intro/intro.tex
@@ -879,7 +879,7 @@ programming so difficult?''
\epigraph{Real difficulties can be overcome; it is only the imaginary
ones that are unconquerable.}{Theodore N.~Vail}
-\OriginallyPublished{Section}{sec:intro:What Makes Parallel Programming Hard?}{What Makes Parallel Programming Hard?}{a Portland State University Technical Report}{PaulEMcKenney2009ProgrammingHard}
+\OriginallyPublished{sec:intro:What Makes Parallel Programming Hard?}{What Makes Parallel Programming Hard?}{a Portland State University Technical Report}{PaulEMcKenney2009ProgrammingHard}
It is important to note that the difficulty of parallel programming
is as much a human-factors issue as it is a set of technical properties of the
diff --git a/locking/locking.tex b/locking/locking.tex
index 67c91ffb..c87e01f2 100644
--- a/locking/locking.tex
+++ b/locking/locking.tex
@@ -82,7 +82,7 @@ more serious sins.
\resizebox{2in}{!}{\includegraphics{cartoons/r-2014-Locking-the-Slob}}
\caption{Locking:
Villain or Slob?}
-\ContributedBy{Figure}{fig:locking:Locking: Villain or Slob?}{Melissa Broussard}
+\ContributedBy{fig:locking:Locking: Villain or Slob?}{Melissa Broussard}
\end{figure}
\begin{figure}
@@ -90,7 +90,7 @@ more serious sins.
\resizebox{2in}{!}{\includegraphics{cartoons/r-2014-Locking-the-Hero}}
\caption{Locking:
Workhorse or Hero?}
-\ContributedBy{Figure}{fig:locking:Locking: Workhorse or Hero?}{Melissa Broussard}
+\ContributedBy{fig:locking:Locking: Workhorse or Hero?}{Melissa Broussard}
\end{figure}
\section{Staying Alive}
diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index 57b05ba2..a414f369 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -3,9 +3,9 @@
% SPDX-License-Identifier: CC-BY-SA-3.0
\QuickQuizChapter{chp:Advanced Synchronization: Memory Ordering}{Advanced Synchronization: Memory Ordering}{qqzmemorder}
-\OriginallyPublished{Chapter}{chp:Advanced Synchronization: Memory Ordering}{Advanced Synchronization: Memory Ordering}{the Linux kernel}{Howells2009membartxt}
-\OriginallyPublished{Chapter}{chp:Advanced Synchronization: Memory Ordering}{Advanced Synchronization: Memory Ordering}{Linux Weekly News}{JadeAlglave2017LWN-LKMM-1,JadeAlglave2017LWN-LKMM-2}
-\OriginallyPublished{Chapter}{chp:Advanced Synchronization: Memory Ordering}{Advanced Synchronization: Memory Ordering}{ASPLOS '18}{Alglave:2018:FSC:3173162.3177156}
+\OriginallyPublished{chp:Advanced Synchronization: Memory Ordering}{Advanced Synchronization: Memory Ordering}{the Linux kernel}{Howells2009membartxt}
+\OriginallyPublished{chp:Advanced Synchronization: Memory Ordering}{Advanced Synchronization: Memory Ordering}{Linux Weekly News}{JadeAlglave2017LWN-LKMM-1,JadeAlglave2017LWN-LKMM-2}
+\OriginallyPublished{chp:Advanced Synchronization: Memory Ordering}{Advanced Synchronization: Memory Ordering}{ASPLOS '18}{Alglave:2018:FSC:3173162.3177156}
%
\Epigraph{The art of progress is to preserve order amid change and to preserve change amid order.}{Alfred North Whitehead}
@@ -178,7 +178,7 @@ Isn't that why we have computers in the first place, to keep track of things?
\centering
\resizebox{\textwidth}{!}{\includegraphics{memorder/Intel_Core2_arch}}
\caption{Intel Core 2 Architecture}
-\ContributedBy{Figure}{fig:memorder:Intel Core 2 Architecture}{Wikipedia user “I, Appaloosa” CC BY-SA 3.0, reformatted}
+\ContributedBy{fig:memorder:Intel Core 2 Architecture}{Wikipedia user “I, Appaloosa” CC BY-SA 3.0, reformatted}
\end{figure*}
Many people do indeed expect their computers to keep track of things,
@@ -201,7 +201,7 @@ as any of their CPUs start degrading.
\centering
\resizebox{\textwidth}{!}{\includegraphics{memorder/Intel_Core2_arch-simplified}}
\caption{Intel Core 2 Architecture Simplified}
-\ContributedBy{Figure}{fig:memorder:Intel Core 2 Architecture Simplified}{Wikipedia user “I, Appaloosa” CC BY-SA 3.0, reformatted}
+\ContributedBy{fig:memorder:Intel Core 2 Architecture Simplified}{Wikipedia user “I, Appaloosa” CC BY-SA 3.0, reformatted}
\end{figure*}
Another option is to recall the lessons of
@@ -260,7 +260,7 @@ residing in other CPUs' caches.
\centering
\resizebox{2.4in}{!}{\includegraphics{cartoons/r-2014-Out-of-order}}
\caption{CPUs Can Do Things Out of Order}
-\ContributedBy{Figure}{fig:memorder:CPUs Can Do Things Out of Order}{Melissa Broussard}
+\ContributedBy{fig:memorder:CPUs Can Do Things Out of Order}{Melissa Broussard}
\end{figure}
Although store buffers can greatly increase performance, they can cause
@@ -1075,7 +1075,7 @@ Again, CPU~0 coordinates the test, so does not record any values.
\resizebox{5in}{!}{\includegraphics{memorder/MoreThanOneValue-15CPU}}
}
\caption{A Variable With More Simultaneous Values}
-\ContributedBy{Figure}{fig:memorder:A Variable With More Simultaneous Values}{Akira Yokosawa}
+\ContributedBy{fig:memorder:A Variable With More Simultaneous Values}{Akira Yokosawa}
\end{figure*}
All CPUs eventually agree on the final value of~9, but not before
@@ -2860,7 +2860,7 @@ In contrast, the penalty for failing to use them when needed can be quite high.
\subsection{Address- and Data-Dependency Difficulties}
\label{sec:memorder:Address- and Data-Dependency Difficulties}
-\OriginallyPublished{Section}{sec:memorder:Address- and Data-Dependency Difficulties}{Address- and Data-Dependency Difficulties}{the Linux kernel}{PaulEMcKenney2014rcu-dereference}
+\OriginallyPublished{sec:memorder:Address- and Data-Dependency Difficulties}{Address- and Data-Dependency Difficulties}{the Linux kernel}{PaulEMcKenney2014rcu-dereference}
The low overheads of the address and data dependencies discussed in
\cref{sec:memorder:Address Dependencies,sec:memorder:Data Dependencies},
@@ -4483,7 +4483,7 @@ and model checking.
\section{Hardware Specifics}
\label{sec:memorder:Hardware Specifics}
-\OriginallyPublished{Section}{sec:memorder:Hardware Specifics}{Memory-Barrier Instructions For Specific CPUs}{Linux Journal}{PaulMcKenney2005i,PaulMcKenney2005j}
+\OriginallyPublished{sec:memorder:Hardware Specifics}{Memory-Barrier Instructions For Specific CPUs}{Linux Journal}{PaulMcKenney2005i,PaulMcKenney2005j}
%
\epigraph{Rock beats paper!}{Derek Williams}
@@ -5040,7 +5040,7 @@ Note that inserting an additional \co{ISB} instruction somewhere between
\centering
\resizebox{2in}{!}{\includegraphics{cartoons/r-2014-LDLAR}}
\caption{Half Memory Barrier}
-\ContributedBy{Figure}{fig:memorder:Half Memory Barrier}{Melissa Brossard}
+\ContributedBy{fig:memorder:Half Memory Barrier}{Melissa Brossard}
\end{figure}
\ARM's \ARMv8 CPU family~\cite{ARMv8A:2017}
diff --git a/origpub.sty b/origpub.sty
index 1319be79..779e8ce1 100644
--- a/origpub.sty
+++ b/origpub.sty
@@ -13,15 +13,15 @@
%%
%% Authors: Paul E. McKenney <paulmck@kernel.org>
-\newcommand{\OriginallyPublished}[5]{}
-\newcommand{\RangeOriginallyPublished}[6]{}
+\newcommand{\OriginallyPublished}[4]{}
+\newcommand{\RangeOriginallyPublished}[5]{}
\newcommand{\ListOriginalPublications}{
\begin{enumerate}
\input{origpub}
\end{enumerate}}
-\newcommand{\ContributedBy}[3]{\label{#2}}
-\newcommand{\QContributedBy}[3]{}
+\newcommand{\ContributedBy}[2]{\label{#1}}
+\newcommand{\QContributedBy}[2]{}
\newcommand{\ListContributions}{
\begin{enumerate}
\input{contrib}
@@ -29,14 +29,14 @@
%% Internal interfaces generated by scripts.
-\newcommand{\OrigPubItem}[5]{
- \item \Cref{#2} (``#3'') on page~\pageref{#2}
- originally appeared in #4~\cite{#5}.}
+\newcommand{\OrigPubItem}[4]{
+ \item \Cref{#1} (``#2'') on page~\pageref{#1}
+ originally appeared in #3~\cite{#4}.}
-\newcommand{\RangeOrigPub}[6]{
- \item \Cref{#2}--\ref{#3} (``#4'')
- on pages~\pageref{#2}--\pageref{#2}
- originally appeared in #5~\cite{#6}.}
+\newcommand{\RangeOrigPub}[5]{
+ \item \Cref{#1}--\ref{#2} (``#3'')
+ on pages~\pageref{#1}--\pageref{#2}
+ originally appeared in #4~\cite{#5}.}
-\newcommand{\ContribItem}[3]{
- \item \Cref{#2} (p~\pageref{#2}) by #3.}
+\newcommand{\ContribItem}[2]{
+ \item \Cref{#1} (p~\pageref{#1}) by #2.}
diff --git a/summary.tex b/summary.tex
index 4916d470..18379692 100644
--- a/summary.tex
+++ b/summary.tex
@@ -231,7 +231,7 @@ This book is nevertheless for that man.
\centering
\resizebox{3in}{!}{\includegraphics{cartoons/UseTheRightToolsBubble}}
\caption{The Most Important Lesson}
-\ContributedBy{Figure}{fig:summary:The Most Important Lesson}{Melissa Broussard}
+\ContributedBy{fig:summary:The Most Important Lesson}{Melissa Broussard}
\end{figure}
And this book is also for everyone else who would like to add low-level
diff --git a/together/applyrcu.tex b/together/applyrcu.tex
index dee027b9..b03e3b00 100644
--- a/together/applyrcu.tex
+++ b/together/applyrcu.tex
@@ -377,7 +377,7 @@ A more general version of this approach is presented in the next section.
\subsection{Correlated Fields}
\label{sec:together:Correlated Fields}
-\OriginallyPublished{Section}{sec:together:Correlated Fields}{Correlated Fields}{Oregon Graduate Institute}{PaulEdwardMcKenneyPhD}
+\OriginallyPublished{sec:together:Correlated Fields}{Correlated Fields}{Oregon Graduate Institute}{PaulEdwardMcKenneyPhD}
Suppose that each of Sch\"odinger's animals is represented by the
data element shown in
diff --git a/toolsoftrade/toolsoftrade.tex b/toolsoftrade/toolsoftrade.tex
index e9b779e7..e6625512 100644
--- a/toolsoftrade/toolsoftrade.tex
+++ b/toolsoftrade/toolsoftrade.tex
@@ -1567,7 +1567,7 @@ all of those accesses are loads.
\subsubsection{Shared-Variable Shenanigans}
\label{sec:toolsoftrade:Shared-Variable Shenanigans}
-\OriginallyPublished{Section}{sec:toolsoftrade:Shared-Variable Shenanigans}{Shared-Variable Shenanigans}{Linux Weekly News}{JadeAlglave2019WhoAfraidCompiler}
+\OriginallyPublished{sec:toolsoftrade:Shared-Variable Shenanigans}{Shared-Variable Shenanigans}{Linux Weekly News}{JadeAlglave2019WhoAfraidCompiler}
%
Given code that does \IXalt{plain loads and stores}{plain access},\footnote{
That is, normal loads and stores instead of C11 atomics, inline