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authorGreg Kroah-Hartman <gregkh@suse.de>2011-08-30 15:02:56 -0700
committerGreg Kroah-Hartman <gregkh@suse.de>2011-08-30 15:02:56 -0700
commitabe4aeaa8de9a5773046c893190601d2406f7c49 (patch)
tree326310130b70cfeaecea94bf5d2a9a0f3feb408a
parent6e830028503eee4cd77e4e440af90e6422c09155 (diff)
downloadlongterm-queue-2.6.33-abe4aeaa8de9a5773046c893190601d2406f7c49.tar.gz
.33 patches
-rw-r--r--queue-2.6.33/ipv6-add-gso-support-on-forwarding-path.patch42
-rw-r--r--queue-2.6.33/series4
-rw-r--r--queue-2.6.33/sparc-fix-array-bounds-error-setting-up-pcic-nmi-trap.patch48
-rw-r--r--queue-2.6.33/sparc32-unbreak-arch_write_unlock.patch60
-rw-r--r--queue-2.6.33/sparc64-remove-unnecessary-macros-from-spinlock_64.h.patch45
5 files changed, 199 insertions, 0 deletions
diff --git a/queue-2.6.33/ipv6-add-gso-support-on-forwarding-path.patch b/queue-2.6.33/ipv6-add-gso-support-on-forwarding-path.patch
new file mode 100644
index 0000000..0549118
--- /dev/null
+++ b/queue-2.6.33/ipv6-add-gso-support-on-forwarding-path.patch
@@ -0,0 +1,42 @@
+From 0aa68271510ae2b221d4b60892103837be63afe4 Mon Sep 17 00:00:00 2001
+From: Herbert Xu <herbert@gondor.apana.org.au>
+Date: Thu, 27 May 2010 16:14:30 -0700
+Subject: ipv6: Add GSO support on forwarding path
+
+From: Herbert Xu <herbert@gondor.apana.org.au>
+
+commit 0aa68271510ae2b221d4b60892103837be63afe4 upstream.
+
+Currently we disallow GSO packets on the IPv6 forward path.
+This patch fixes this.
+
+Note that I discovered that our existing GSO MTU checks (e.g.,
+IPv4 forwarding) are buggy in that they skip the check altogether,
+when they really should be checking gso_size + header instead.
+
+I have also been lazy here in that I haven't bothered to segment
+the GSO packet by hand before generating an ICMP message. Someone
+should add that to be 100% correct.
+
+Reported-by: Ralf Baechle <ralf@linux-mips.org>
+Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Apollon Oikonomopoulos <apoikos@gmail.com>
+Signed-off-by: Faidon Liambotis <paravoid@debian.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ net/ipv6/ip6_output.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/net/ipv6/ip6_output.c
++++ b/net/ipv6/ip6_output.c
+@@ -509,7 +509,7 @@ int ip6_forward(struct sk_buff *skb)
+ }
+ }
+
+- if (skb->len > dst_mtu(dst)) {
++ if (skb->len > dst_mtu(dst) && !skb_is_gso(skb)) {
+ /* Again, force OUTPUT device used as source address */
+ skb->dev = dst->dev;
+ icmpv6_send(skb, ICMPV6_PKT_TOOBIG, 0, dst_mtu(dst), skb->dev);
diff --git a/queue-2.6.33/series b/queue-2.6.33/series
index e8ffeb2..b95b770 100644
--- a/queue-2.6.33/series
+++ b/queue-2.6.33/series
@@ -2,3 +2,7 @@ usb-ftdi_sio-add-calao-reference-board-support.patch
usb-ehci-do-not-rely-on-port_suspend-to-stop-usb-resuming-in-ehci_bus_resume.patch
rt2x00-do-not-drop-usb-dev-reference-counter-on-suspend.patch
atm-br2684-fix-oops-due-to-skb-dev-being-null.patch
+sparc64-remove-unnecessary-macros-from-spinlock_64.h.patch
+sparc32-unbreak-arch_write_unlock.patch
+sparc-fix-array-bounds-error-setting-up-pcic-nmi-trap.patch
+ipv6-add-gso-support-on-forwarding-path.patch
diff --git a/queue-2.6.33/sparc-fix-array-bounds-error-setting-up-pcic-nmi-trap.patch b/queue-2.6.33/sparc-fix-array-bounds-error-setting-up-pcic-nmi-trap.patch
new file mode 100644
index 0000000..a0ee423
--- /dev/null
+++ b/queue-2.6.33/sparc-fix-array-bounds-error-setting-up-pcic-nmi-trap.patch
@@ -0,0 +1,48 @@
+From 4a0342ca8e8150bd47e7118a76e300692a1b6b7b Mon Sep 17 00:00:00 2001
+From: Ian Campbell <Ian.Campbell@citrix.com>
+Date: Wed, 17 Aug 2011 22:14:57 +0000
+Subject: sparc: fix array bounds error setting up PCIC NMI trap
+
+From: Ian Campbell <Ian.Campbell@citrix.com>
+
+commit 4a0342ca8e8150bd47e7118a76e300692a1b6b7b upstream.
+
+ CC arch/sparc/kernel/pcic.o
+arch/sparc/kernel/pcic.c: In function 'pcic_probe':
+arch/sparc/kernel/pcic.c:359:33: error: array subscript is above array bounds [-Werror=array-bounds]
+arch/sparc/kernel/pcic.c:359:8: error: array subscript is above array bounds [-Werror=array-bounds]
+arch/sparc/kernel/pcic.c:360:33: error: array subscript is above array bounds [-Werror=array-bounds]
+arch/sparc/kernel/pcic.c:360:8: error: array subscript is above array bounds [-Werror=array-bounds]
+arch/sparc/kernel/pcic.c:361:33: error: array subscript is above array bounds [-Werror=array-bounds]
+arch/sparc/kernel/pcic.c:361:8: error: array subscript is above array bounds [-Werror=array-bounds]
+cc1: all warnings being treated as errors
+
+I'm not particularly familiar with sparc but t_nmi (defined in head_32.S via
+the TRAP_ENTRY macro) and pcic_nmi_trap_patch (defined in entry.S) both appear
+to be 4 instructions long and I presume from the usage that instructions are
+int sized.
+
+Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
+Cc: "David S. Miller" <davem@davemloft.net>
+Cc: sparclinux@vger.kernel.org
+Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/sparc/kernel/pcic.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/sparc/kernel/pcic.c
++++ b/arch/sparc/kernel/pcic.c
+@@ -349,8 +349,8 @@ int __init pcic_probe(void)
+ strcpy(pbm->prom_name, namebuf);
+
+ {
+- extern volatile int t_nmi[1];
+- extern int pcic_nmi_trap_patch[1];
++ extern volatile int t_nmi[4];
++ extern int pcic_nmi_trap_patch[4];
+
+ t_nmi[0] = pcic_nmi_trap_patch[0];
+ t_nmi[1] = pcic_nmi_trap_patch[1];
diff --git a/queue-2.6.33/sparc32-unbreak-arch_write_unlock.patch b/queue-2.6.33/sparc32-unbreak-arch_write_unlock.patch
new file mode 100644
index 0000000..4853637
--- /dev/null
+++ b/queue-2.6.33/sparc32-unbreak-arch_write_unlock.patch
@@ -0,0 +1,60 @@
+From 3f6aa0b113846a8628baa649af422cfc6fb1d786 Mon Sep 17 00:00:00 2001
+From: Mikael Pettersson <mikpe@it.uu.se>
+Date: Mon, 15 Aug 2011 10:11:50 +0000
+Subject: sparc32: unbreak arch_write_unlock()
+
+From: Mikael Pettersson <mikpe@it.uu.se>
+
+commit 3f6aa0b113846a8628baa649af422cfc6fb1d786 upstream.
+
+The sparc32 version of arch_write_unlock() is just a plain assignment.
+Unfortunately this allows the compiler to schedule side-effects in a
+protected region to occur after the HW-level unlock, which is broken.
+E.g., the following trivial test case gets miscompiled:
+
+ #include <linux/spinlock.h>
+ rwlock_t lock;
+ int counter;
+ void foo(void) { write_lock(&lock); ++counter; write_unlock(&lock); }
+
+Fixed by adding a compiler memory barrier to arch_write_unlock(). The
+sparc64 version combines the barrier and assignment into a single asm(),
+and implements the operation as a static inline, so that's what I did too.
+
+Compile-tested with sparc32_defconfig + CONFIG_SMP=y.
+
+Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/sparc/include/asm/spinlock_32.h | 11 +++++++++--
+ 1 file changed, 9 insertions(+), 2 deletions(-)
+
+--- a/arch/sparc/include/asm/spinlock_32.h
++++ b/arch/sparc/include/asm/spinlock_32.h
+@@ -130,6 +130,15 @@ static inline void arch_write_lock(arch_
+ *(volatile __u32 *)&lp->lock = ~0U;
+ }
+
++static void inline arch_write_unlock(arch_rwlock_t *lock)
++{
++ __asm__ __volatile__(
++" st %%g0, [%0]"
++ : /* no outputs */
++ : "r" (lock)
++ : "memory");
++}
++
+ static inline int arch_write_trylock(arch_rwlock_t *rw)
+ {
+ unsigned int val;
+@@ -174,8 +183,6 @@ static inline int __arch_read_trylock(ar
+ res; \
+ })
+
+-#define arch_write_unlock(rw) do { (rw)->lock = 0; } while(0)
+-
+ #define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
+ #define arch_read_lock_flags(rw, flags) arch_read_lock(rw)
+ #define arch_write_lock_flags(rw, flags) arch_write_lock(rw)
diff --git a/queue-2.6.33/sparc64-remove-unnecessary-macros-from-spinlock_64.h.patch b/queue-2.6.33/sparc64-remove-unnecessary-macros-from-spinlock_64.h.patch
new file mode 100644
index 0000000..ed3d3bf
--- /dev/null
+++ b/queue-2.6.33/sparc64-remove-unnecessary-macros-from-spinlock_64.h.patch
@@ -0,0 +1,45 @@
+From a0fba3eb059e73fed2d376a901f8117734c12f1f Mon Sep 17 00:00:00 2001
+From: Mikael Pettersson <mikpe@it.uu.se>
+Date: Mon, 15 Aug 2011 10:10:31 +0000
+Subject: sparc64: remove unnecessary macros from spinlock_64.h
+
+From: Mikael Pettersson <mikpe@it.uu.se>
+
+commit a0fba3eb059e73fed2d376a901f8117734c12f1f upstream.
+
+The sparc64 spinlock_64.h contains a number of operations defined
+first as static inline functions, and then as macros with the same
+names and parameters as the functions. Maybe this was needed at
+some point in the past, but now nothing seems to depend on these
+macros (checked with a recursive grep looking for ifdefs on these
+names). Other archs don't define these identity-macros.
+
+So this patch deletes these unnecessary macros.
+
+Compile-tested with sparc64_defconfig.
+
+Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/sparc/include/asm/spinlock_64.h | 6 ------
+ 1 file changed, 6 deletions(-)
+
+--- a/arch/sparc/include/asm/spinlock_64.h
++++ b/arch/sparc/include/asm/spinlock_64.h
+@@ -210,14 +210,8 @@ static int inline arch_write_trylock(arc
+ return result;
+ }
+
+-#define arch_read_lock(p) arch_read_lock(p)
+ #define arch_read_lock_flags(p, f) arch_read_lock(p)
+-#define arch_read_trylock(p) arch_read_trylock(p)
+-#define arch_read_unlock(p) arch_read_unlock(p)
+-#define arch_write_lock(p) arch_write_lock(p)
+ #define arch_write_lock_flags(p, f) arch_write_lock(p)
+-#define arch_write_unlock(p) arch_write_unlock(p)
+-#define arch_write_trylock(p) arch_write_trylock(p)
+
+ #define arch_read_can_lock(rw) (!((rw)->lock & 0x80000000UL))
+ #define arch_write_can_lock(rw) (!(rw)->lock)