diff options
| author | Jorge Ramirez-Ortiz <jorge@foundries.io> | 2020-10-23 21:18:41 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2020-11-01 15:52:47 +0100 |
| commit | 74a039403c10e460ddd668f4e907689f64b70507 (patch) | |
| tree | 52c0a63ec6796e53a147548c7df496044883e775 | |
| parent | 33d1e52a5d42772342d971d7743b1d2cb0f5e993 (diff) | |
| download | u-boot-74a039403c10e460ddd668f4e907689f64b70507.tar.gz | |
mx6: peripheral clock from oscillator
In order to be able to run the I2C bus at 400Khz, the chip errata[1]
recommends that the peripheral clock runs out of the 24MHz oscillator.
Systems running I2C from OP-TEE before Linux executes - for example to
access a Secure Element [2] providing the cryptographic support - expect
this clock to be configured by the bootloader [3].
[1] IMX6SLCE Rev. 5, 02/2019, ERR007805.
[2] OP-TEE: support for NXP SE05X Plug and Trust (patch on the list).
[3] OP-TEE: check the imx_i2c.c driver (imx6 patch on the list).
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
| -rw-r--r-- | arch/arm/mach-imx/mx6/soc.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index a636107410..f43a2460f9 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -26,6 +26,9 @@ #include <imx_thermal.h> #include <mmc.h> +#define has_err007805() \ + (is_mx6sl() || is_mx6dl() || is_mx6solo() || is_mx6ull()) + struct scu_regs { u32 ctrl; u32 config; @@ -469,7 +472,7 @@ int arch_cpu_init(void) } /* Set perclk to source from OSC 24MHz */ - if (is_mx6sl()) + if (has_err007805()) setbits_le32(&ccm->cscmr1, MXC_CCM_CSCMR1_PER_CLK_SEL_MASK); imx_wdog_disable_powerdown(); /* Disable PDE bit of WMCR register */ |