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authorevan <evan@evan-vm.(none)>2012-12-14 15:44:05 +0800
committerLubomir Rintel <lkundrak@v3.sk>2019-07-22 19:40:02 +0200
commitaee5ce6ed1e7dbd703bd81667034d39d5cb16cea (patch)
tree37fb06b47e7ceda2933ca75973d807b613c1ecbf
parent3d9138ffe326f8cf1cf08854c198ef6a7a55b87f (diff)
downloadlinux-mmp3-dell-ariel-aee5ce6ed1e7dbd703bd81667034d39d5cb16cea.tar.gz
20121214 release to Morris.
modified: arch/arm/configs/qseven_defconfig modified: arch/arm/mach-mmp/include/mach/mfp-mmp2.h modified: arch/arm/mach-mmp/include/mach/pxa168fb.h modified: arch/arm/mach-mmp/mmp3.c modified: arch/arm/mach-mmp/onboard/lcd_mipi.c modified: arch/arm/mach-mmp/qseven.c modified: drivers/usb/otg/mv_otg.c modified: drivers/video/pxa168fb.c modified: include/drm/drm.h modified: scripts/Makefile.clean new file: sound/soc/codecs/88ce156-codec.c new file: sound/soc/codecs/88ce156-codec.h modified: sound/soc/codecs/Kconfig modified: sound/soc/codecs/Makefile modified: sound/soc/pxa/Kconfig modified: sound/soc/pxa/qseven.c modified: sound/soc/soc-core.c
-rw-r--r--arch/arm/configs/qseven_defconfig307
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-mmp2.h5
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168fb.h2
-rw-r--r--arch/arm/mach-mmp/mmp3.c2
-rw-r--r--arch/arm/mach-mmp/onboard/lcd_mipi.c74
-rw-r--r--arch/arm/mach-mmp/qseven.c226
-rw-r--r--drivers/usb/otg/mv_otg.c2
-rw-r--r--drivers/video/pxa168fb.c2
-rw-r--r--include/drm/drm.h2
-rw-r--r--scripts/Makefile.clean3
-rwxr-xr-xsound/soc/codecs/88ce156-codec.c1290
-rwxr-xr-xsound/soc/codecs/88ce156-codec.h82
-rw-r--r--sound/soc/codecs/Kconfig4
-rw-r--r--sound/soc/codecs/Makefile2
-rw-r--r--sound/soc/pxa/Kconfig3
-rw-r--r--sound/soc/pxa/qseven.c313
-rw-r--r--sound/soc/soc-core.c2
17 files changed, 2056 insertions, 265 deletions
diff --git a/arch/arm/configs/qseven_defconfig b/arch/arm/configs/qseven_defconfig
index cbaa325441905a..bc7ab459504755 100644
--- a/arch/arm/configs/qseven_defconfig
+++ b/arch/arm/configs/qseven_defconfig
@@ -1,6 +1,6 @@
#
# Automatically generated make config: don't edit
-# Linux/arm 3.0.8 Kernel Configuration
+# Linux/arm 3.0.31 Kernel Configuration
#
CONFIG_ARM=y
CONFIG_HAVE_PWM=y
@@ -107,7 +107,7 @@ CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
-CONFIG_ASHMEM=y
+# CONFIG_ASHMEM is not set
CONFIG_AIO=y
# CONFIG_EMBEDDED is not set
CONFIG_HAVE_PERF_EVENTS=y
@@ -270,15 +270,14 @@ CONFIG_PXA_32KTIMER=y
# CONFIG_MACH_FLINT is not set
# CONFIG_MACH_MARVELL_JASPER is not set
# CONFIG_MACH_TETON_BGA is not set
-#CONFIG_MACH_ABILENE=y
+# CONFIG_MACH_ABILENE is not set
CONFIG_MACH_QSEVEN=y
-#CONFIG_MACH_MK2 is not set
-#CONFIG_MACH_YELLOWSTONE=y
-#CONFIG_MACH_ORCHID=y
-#CONFIG_MACH_THUNDERSTONEM=y
-#CONFIG_MACH_EMEIDKB is not set
+# CONFIG_MACH_MK2 is not set
+# CONFIG_MACH_YELLOWSTONE is not set
+# CONFIG_MACH_ORCHID is not set
+# CONFIG_MACH_THUNDERSTONEM is not set
+# CONFIG_MACH_EMEIDKB is not set
CONFIG_CPU_MMP3=y
-CONFIG_SOC_LOCAL_TIMERS=y
# CONFIG_CORE_MORPHING is not set
#
@@ -315,9 +314,8 @@ CONFIG_ARM_THUMBEE=y
CONFIG_OUTER_CACHE=y
CONFIG_OUTER_CACHE_SYNC=y
CONFIG_CACHE_L2X0=y
-CONFIG_CACHE_L2X0_PREFETCH=y
+# CONFIG_CACHE_L2X0_PREFETCH is not set
CONFIG_CACHE_PL310=y
-CONFIG_CACHE_TAUROS3_PREFETCH_OFFSET=7
# CONFIG_CACHE_TAUROS2 is not set
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_ARM_DMA_MEM_BUFFERABLE=y
@@ -331,7 +329,7 @@ CONFIG_DISABLE_CWF=y
# CONFIG_DISABLE_CLEAN_INTERVENTION is not set
# CONFIG_CACHE_TAUROS3_WRITETHROUGH is not set
CONFIG_CACHE_TAUROS3_DISABLE_MEMORY_MAPPED_FUNCTIONS=y
-CONFIG_CACHE_TAUROS3_ENABLE_FULL_WRITE_LINE=y
+# CONFIG_CACHE_TAUROS3_ENABLE_FULL_WRITE_LINE is not set
CONFIG_IWMMXT=y
CONFIG_CPU_HAS_PMU=y
# CONFIG_ARM_ERRATA_430973 is not set
@@ -368,6 +366,7 @@ CONFIG_ARM_GIC=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_PCCARD is not set
# CONFIG_ARM_ERRATA_764369 is not set
+# CONFIG_PL310_ERRATA_769419 is not set
#
# Kernel Features
@@ -379,6 +378,7 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_SMP=y
CONFIG_SMP_ON_UP=y
CONFIG_HAVE_ARM_SCU=y
+CONFIG_HAVE_ARM_TWD=y
CONFIG_VMSPLIT_3G=y
# CONFIG_VMSPLIT_2G is not set
# CONFIG_VMSPLIT_1G is not set
@@ -386,7 +386,7 @@ CONFIG_PAGE_OFFSET=0xC0000000
# CONFIG_TEXT_OFFSET_OVERRIDE is not set
CONFIG_NR_CPUS=2
CONFIG_HOTPLUG_CPU=y
-# CONFIG_LOCAL_TIMERS is not set
+CONFIG_LOCAL_TIMERS=y
# CONFIG_PREEMPT_NONE is not set
# CONFIG_PREEMPT_VOLUNTARY is not set
CONFIG_PREEMPT=y
@@ -428,7 +428,7 @@ CONFIG_ALIGNMENT_TRAP=y
# CONFIG_USE_OF is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyS2,115200 panic_Debug rootdelay=5 root=/dev/mmcblk0p2 init='sbin/init -v' consoleblank=0 reserve_pmem=0x8000000 ip=dhcp fb_share"
+CONFIG_CMDLINE="debug loglevel=17 rootdelay=10 rootfstype=ext4 root=/dev/mmcblk1p1 rw console=ttyS2,115200 panic_debug reserve_pmem=0x8000000 "
CONFIG_CMDLINE_FROM_BOOTLOADER=y
# CONFIG_CMDLINE_EXTEND is not set
# CONFIG_CMDLINE_FORCE is not set
@@ -493,15 +493,7 @@ CONFIG_HAVE_AOUT=y
#
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
-#CONFIG_HAS_WAKELOCK=y
-#CONFIG_HAS_EARLYSUSPEND=y
-#CONFIG_WAKELOCK=y
-#CONFIG_WAKELOCK_STAT=y
-#CONFIG_USER_WAKELOCK=y
-#CONFIG_EARLYSUSPEND=y
-# CONFIG_NO_USER_SPACE_SCREEN_ACCESS_CONTROL is not set
-# CONFIG_CONSOLE_EARLYSUSPEND is not set
-#CONFIG_FB_EARLYSUSPEND=y
+# CONFIG_WAKELOCK is not set
CONFIG_PM_SLEEP=y
CONFIG_PM_SLEEP_SMP=y
CONFIG_PM_RUNTIME=y
@@ -770,27 +762,7 @@ CONFIG_XPS=y
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
# CONFIG_IRDA is not set
-CONFIG_BT=y
-CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=y
-CONFIG_BT_RFCOMM=y
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=y
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=y
-
-#
-# Bluetooth device drivers
-#
-# CONFIG_BT_HCIBTUSB is not set
-# CONFIG_BT_HCIBTSDIO is not set
-# CONFIG_BT_HCIUART is not set
-# CONFIG_BT_HCIBCM203X is not set
-# CONFIG_BT_HCIBPA10X is not set
-# CONFIG_BT_HCIBFUSB is not set
-# CONFIG_BT_HCIVHCI is not set
-CONFIG_BT_MRVL=y
+# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
CONFIG_WIRELESS=y
CONFIG_WIRELESS_EXT=y
@@ -807,10 +779,18 @@ CONFIG_CFG80211_DEFAULT_PS=y
# CONFIG_CFG80211_INTERNAL_REGDB is not set
CONFIG_CFG80211_WEXT=y
CONFIG_WIRELESS_EXT_SYSFS=y
-CONFIG_LIB80211=y
-# CONFIG_LIB80211_DEBUG is not set
-CONFIG_CFG80211_ALLOW_RECONNECT=y
-# CONFIG_MAC80211 is not set
+# CONFIG_LIB80211 is not set
+# CONFIG_CFG80211_ALLOW_RECONNECT is not set
+CONFIG_MAC80211=y
+CONFIG_MAC80211_HAS_RC=y
+CONFIG_MAC80211_RC_MINSTREL=y
+CONFIG_MAC80211_RC_MINSTREL_HT=y
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
+# CONFIG_MAC80211_MESH is not set
+# CONFIG_MAC80211_LEDS is not set
+# CONFIG_MAC80211_DEBUGFS is not set
+# CONFIG_MAC80211_DEBUG_MENU is not set
# CONFIG_WIMAX is not set
CONFIG_RFKILL=y
CONFIG_RFKILL_PM=y
@@ -830,7 +810,7 @@ CONFIG_RFKILL_INPUT=y
# Generic Driver Options
#
CONFIG_UEVENT_HELPER_PATH=""
-CONFIG_DEVTMPFS=y
+# CONFIG_DEVTMPFS is not set
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
CONFIG_FW_LOADER=y
@@ -839,6 +819,7 @@ CONFIG_EXTRA_FIRMWARE=""
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_SYNC is not set
CONFIG_CONNECTOR=y
CONFIG_PROC_EVENTS=y
# CONFIG_MTD is not set
@@ -858,8 +839,7 @@ CONFIG_BLK_DEV_LOOP=y
# CONFIG_SENSORS_LIS3LV02D is not set
CONFIG_MISC_DEVICES=y
# CONFIG_AD525X_DPOT is not set
-CONFIG_ANDROID_PMEM=y
-CONFIG_PMEM_OOMKILLER=y
+# CONFIG_ANDROID_PMEM is not set
# CONFIG_INTEL_MID_PTI is not set
# CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
@@ -878,7 +858,7 @@ CONFIG_UID_STAT=y
# CONFIG_BMP085 is not set
# CONFIG_WL127X_RFKILL is not set
# CONFIG_APANIC is not set
-#CONFIG_TC35876X=y
+# CONFIG_TC35876X is not set
# CONFIG_SD8XXX_RFKILL is not set
# CONFIG_C2PORT is not set
@@ -962,10 +942,30 @@ CONFIG_NETDEVICES=y
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set
-CONFIG_TUN=y
+# CONFIG_TUN is not set
# CONFIG_VETH is not set
CONFIG_MII=y
-# CONFIG_PHYLIB is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
# CONFIG_AX88796 is not set
CONFIG_SMC91X=y
@@ -986,18 +986,32 @@ CONFIG_SMC91X=y
# CONFIG_KS8851 is not set
# CONFIG_KS8851_MLL is not set
# CONFIG_FTMAC100 is not set
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_STMMAC_ETH is not set
+CONFIG_NETDEV_10000=y
CONFIG_WLAN=y
+# CONFIG_LIBERTAS_THINFIRM is not set
+# CONFIG_AT76C50X_USB is not set
# CONFIG_USB_ZD1201 is not set
# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_RTL8187 is not set
+# CONFIG_MAC80211_HWSIM is not set
# CONFIG_WIFI_CONTROL_FUNC is not set
# CONFIG_ATH_COMMON is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
# CONFIG_BCM4329 is not set
# CONFIG_BCMDHD is not set
# CONFIG_HOSTAP is not set
# CONFIG_IWM is not set
# CONFIG_LIBERTAS is not set
+# CONFIG_P54_COMMON is not set
+# CONFIG_RT2X00 is not set
+# CONFIG_RTL8192SE is not set
+# CONFIG_RTL8192CU is not set
+# CONFIG_WL1251 is not set
+# CONFIG_WL12XX_MENU is not set
+# CONFIG_ZD1211RW is not set
# CONFIG_MWIFIEX is not set
#
@@ -1017,8 +1031,8 @@ CONFIG_USB_NET_CDCETHER=y
CONFIG_USB_NET_CDC_EEM=y
CONFIG_USB_NET_CDC_NCM=y
# CONFIG_USB_NET_DM9601 is not set
-# CONFIG_USB_NET_SMSC75XX is not set
-CONFIG_USB_NET_SMSC95XX=y
+CONFIG_USB_NET_SMSC75XX=y
+# CONFIG_USB_NET_SMSC95XX is not set
# CONFIG_USB_NET_GL620A is not set
CONFIG_USB_NET_NET1080=y
# CONFIG_USB_NET_PLUSB is not set
@@ -1044,20 +1058,8 @@ CONFIG_USB_NET_ZAURUS=y
#
# CAIF transport drivers
#
-CONFIG_PPP=y
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=y
-CONFIG_PPP_SYNC_TTY=y
-CONFIG_PPP_DEFLATE=y
-CONFIG_PPP_BSDCOMP=y
-CONFIG_PPP_MPPE=y
-CONFIG_PPPOE=y
-CONFIG_PPPOL2TP=y
-CONFIG_PPPOLAC=y
-CONFIG_PPPOPNS=y
+# CONFIG_PPP is not set
# CONFIG_SLIP is not set
-CONFIG_SLHC=y
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
@@ -1108,49 +1110,26 @@ CONFIG_KEYBOARD_PXA27x=y
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_KBDE is not set
# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_TOUCHSCREEN_SSD2531 is not set
-# CONFIG_TOUCHSCREEN_VNC is not set
-# CONFIG_TOUCHSCREEN_TPO is not set
-# CONFIG_TOUCHSCREEN_FT5306 is not set
-# CONFIG_TOUCHSCREEN_ELAN is not set
-# CONFIG_TOUCHSCREEN_ADS7846 is not set
-# CONFIG_TOUCHSCREEN_AD7877 is not set
-# CONFIG_TOUCHSCREEN_AD7879 is not set
-# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
-# CONFIG_TOUCHSCREEN_BU21013 is not set
-# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
-# CONFIG_TOUCHSCREEN_DYNAPRO is not set
-# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
-# CONFIG_TOUCHSCREEN_EETI is not set
-# CONFIG_TOUCHSCREEN_FUJITSU is not set
-# CONFIG_TOUCHSCREEN_GUNZE is not set
-# CONFIG_TOUCHSCREEN_ELO is not set
-# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
-# CONFIG_TOUCHSCREEN_MAX11801 is not set
-# CONFIG_TOUCHSCREEN_MCS5000 is not set
-# CONFIG_TOUCHSCREEN_MTOUCH is not set
-# CONFIG_TOUCHSCREEN_INEXIO is not set
-# CONFIG_TOUCHSCREEN_MK712 is not set
-# CONFIG_TOUCHSCREEN_PENMOUNT is not set
-# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI is not set
-# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
-# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
-# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
-# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
-# CONFIG_TOUCHSCREEN_TSC2005 is not set
-CONFIG_TOUCHSCREEN_TSC2007=y
-# CONFIG_TOUCHSCREEN_TPK_R800 is not set
-# CONFIG_TOUCHSCREEN_W90X900 is not set
-# CONFIG_TOUCHSCREEN_ST1232 is not set
-# CONFIG_TOUCHSCREEN_TPS6507X is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
CONFIG_INPUT_MISC=y
-# CONFIG_INPUT_88PM8XXX_ONKEY is not set
# CONFIG_INPUT_AD714X is not set
-# CONFIG_INPUT_MAX77601_ONKEY is not set
# CONFIG_INPUT_ATI_REMOTE is not set
# CONFIG_INPUT_ATI_REMOTE2 is not set
# CONFIG_INPUT_KEYCHORD is not set
@@ -1224,7 +1203,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_RAMOOPS is not set
CONFIG_MMP3_SYSSET=y
# CONFIG_MMP_ZSP is not set
-# CONFIG_MMP3_HSI is not set
+CONFIG_MMP3_HSI=y
# CONFIG_LED_FLASH_ADP1650 is not set
# CONFIG_LED_FLASH_BD7704 is not set
# CONFIG_MXDCMMB is not set
@@ -1239,7 +1218,7 @@ CONFIG_I2C_CHARDEV=y
#
# I2C Algorithms
#
-# CONFIG_I2C_ALGOBIT is not set
+CONFIG_I2C_ALGOBIT=y
# CONFIG_I2C_ALGOPCF is not set
# CONFIG_I2C_ALGOPCA is not set
@@ -1286,7 +1265,7 @@ CONFIG_SPI_MASTER=y
# CONFIG_SPI_BITBANG is not set
# CONFIG_SPI_GPIO is not set
# CONFIG_SPI_OC_TINY is not set
-# CONFIG_SPI_PXA2XX is not set
+CONFIG_SPI_PXA2XX=y
# CONFIG_SPI_PXA2XX_PCI is not set
# CONFIG_SPI_XILINX is not set
# CONFIG_SPI_DESIGNWARE is not set
@@ -1331,7 +1310,6 @@ CONFIG_GPIOLIB=y
# CONFIG_GPIO_MAX732X is not set
# CONFIG_GPIO_PCF857X is not set
# CONFIG_GPIO_SX150X is not set
-# CONFIG_GPIO_WM8994 is not set
# CONFIG_GPIO_ADP5588 is not set
#
@@ -1367,6 +1345,7 @@ CONFIG_POWER_SUPPLY=y
# CONFIG_BATTERY_MAX17040 is not set
# CONFIG_BATTERY_MAX17042 is not set
# CONFIG_BATTERY_MAX17043 is not set
+# CONFIG_CHARGER_SMB347 is not set
# CONFIG_BATTERY_FAN4010 is not set
# CONFIG_CHARGER_ISP1704 is not set
# CONFIG_CHARGER_MAX8903 is not set
@@ -1467,6 +1446,8 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_W83627HF is not set
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_SENSORS_CM3623 is not set
+# CONFIG_SENSORS_ISL29043 is not set
+# CONFIG_SENSORS_CM3218 is not set
# CONFIG_SENSORS_CM3213 is not set
# CONFIG_SENSORS_LIS331DL is not set
# CONFIG_SENSORS_LSM303DLHC_ACC is not set
@@ -1474,6 +1455,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_L3G4200D_GYR is not set
# CONFIG_SENSORS_CWMI is not set
# CONFIG_SENSORS_CWGD is not set
+# CONFIG_SENSORS_LPS331AP is not set
# CONFIG_SENSORS_ROHM_BH1772 is not set
# CONFIG_SENSORS_APDS990X_MRVL is not set
# CONFIG_SENSORS_BMA250 is not set
@@ -1496,9 +1478,9 @@ CONFIG_BCMA_POSSIBLE=y
#
# CONFIG_BCMA is not set
CONFIG_MFD_SUPPORT=y
-CONFIG_MFD_CORE=y
+# CONFIG_MFD_CORE is not set
# CONFIG_MFD_88PM860X is not set
-#CONFIG_MFD_88PM80X is not set
+# CONFIG_MFD_88PM80X is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_MFD_ASIC3 is not set
# CONFIG_HTC_EGPIO is not set
@@ -1545,14 +1527,10 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y
# CONFIG_REGULATOR_MAX8649 is not set
# CONFIG_REGULATOR_MAX8660 is not set
# CONFIG_REGULATOR_MAX8952 is not set
-# CONFIG_REGULATOR_MAX77601 is not set
-# CONFIG_REGULATOR_WM8994 is not set
# CONFIG_REGULATOR_LP3971 is not set
# CONFIG_REGULATOR_LP3972 is not set
# CONFIG_REGULATOR_TPS65023 is not set
# CONFIG_REGULATOR_TPS6507X is not set
-# CONFIG_REGULATOR_VPMIC is not set
-# CONFIG_REGULATOR_88PM800 is not set
# CONFIG_REGULATOR_ISL6271A is not set
# CONFIG_REGULATOR_AD5398 is not set
# CONFIG_REGULATOR_TPS6524X is not set
@@ -1638,14 +1616,17 @@ CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
# CONFIG_VIDEO_NOON010PC30 is not set
# CONFIG_VIDEO_M5MOLS is not set
CONFIG_VIDEO_MVISP=y
+# CONFIG_VIDEO_MVISP_OV882X is not set
# CONFIG_VIDEO_MVISP_OV8820 is not set
+# CONFIG_VIDEO_MVISP_OV8825 is not set
+# CONFIG_ECS_DRIVER is not set
+# CONFIG_ECS_DRIVER_SUBDEV is not set
CONFIG_SOC_CAMERA=y
# CONFIG_SOC_CAMERA_ICPHD is not set
# CONFIG_SOC_CAMERA_M6MO is not set
-CONFIG_SOC_CAMERA_OV5642=y
+# CONFIG_SOC_CAMERA_OV5642 is not set
# CONFIG_SOC_CAMERA_OV5640 is not set
# CONFIG_SOC_CAMERA_OV2659 is not set
-# CONFIG_SOC_CAMERA_OV7690 is not set
# CONFIG_SOC_CAMERA_OV7692 is not set
# CONFIG_SOC_CAMERA_IMX074 is not set
# CONFIG_SOC_CAMERA_MT9M001 is not set
@@ -1724,27 +1705,13 @@ CONFIG_USB_GSPCA=m
# CONFIG_V4L_MEM2MEM_DRIVERS is not set
CONFIG_VIDEO_DISPLAY_DRIVERS=y
CONFIG_PXA168_V4L2_OVERLAY=y
-CONFIG_RADIO_ADAPTERS=y
-# CONFIG_I2C_SI4713 is not set
-# CONFIG_RADIO_SI4713 is not set
-# CONFIG_USB_DSBR is not set
-# CONFIG_RADIO_SI470X is not set
-# CONFIG_USB_MR800 is not set
-# CONFIG_RADIO_TEA5764 is not set
-# CONFIG_RADIO_SAA7706H is not set
-# CONFIG_RADIO_TEF6862 is not set
-CONFIG_RADIO_MRVL8XXX=y
-# CONFIG_RADIO_WL1273 is not set
-
-#
-# Texas Instruments WL128x FM driver (ST based)
-#
-# CONFIG_RADIO_WL128X is not set
+# CONFIG_RADIO_ADAPTERS is not set
#
# Graphics support
#
-# CONFIG_DRM is not set
+CONFIG_DRM=m
+CONFIG_DRM_VIVANTE=m
# CONFIG_ION is not set
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1767,8 +1734,6 @@ CONFIG_FB_CFB_IMAGEBLIT=y
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
-CONFIG_DRM=m
-CONFIG_DRM_VIVANTE=m
#
# Frame buffer hardware drivers
@@ -1780,7 +1745,6 @@ CONFIG_FB_PXA168=y
CONFIG_PXA688_PHY=y
# CONFIG_PXA688_CMU is not set
CONFIG_PXA688_VDMA=y
-# CONFIG_FB_TMIO is not set
# CONFIG_FB_UDL is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_FB_METRONOME is not set
@@ -1872,17 +1836,11 @@ CONFIG_SND_MMP_LEGACY_SOC=y
#
CONFIG_SND_MMP_SOC=y
# CONFIG_SND_MMP2_SOC is not set
-# CONFIG_SND_MMP_SOC_MMP3ASOC is not set
# CONFIG_SND_MMP_SOC_MK2 is not set
CONFIG_SND_MMP_SOC_QSEVEN=y
-# CONFIG_SND_WM8994_MASTER_MODE is not set
CONFIG_SND_SOC_I2C_AND_SPI=y
# CONFIG_SND_SOC_ALL_CODECS is not set
-# CONFIG_SND_SOC_88PM805 is not set
-# CONFIG_SND_SOC_WM_HUBS is not set
-# CONFIG_SND_SOC_WM8994 is not set
-CONFIG_SND_SOC_WM8731=y
-CONFIG_SND_SOC_HDMI=y
+CONFIG_SND_SOC_88CE156=y
# CONFIG_SOUND_PRIME is not set
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
@@ -1892,7 +1850,7 @@ CONFIG_HID=y
# USB Input Devices
#
CONFIG_USB_HID=y
-# CONFIG_HID_PID is not set
+CONFIG_HID_PID=y
# CONFIG_USB_HIDDEV is not set
#
@@ -1908,7 +1866,6 @@ CONFIG_HID_CHICONY=y
CONFIG_HID_CYPRESS=y
# CONFIG_HID_DRAGONRISE is not set
# CONFIG_HID_EMS_FF is not set
-# CONFIG_HID_ELECOM is not set
CONFIG_HID_EZKEY=y
# CONFIG_HID_KEYTOUCH is not set
CONFIG_HID_KYE=y
@@ -1923,7 +1880,6 @@ CONFIG_HID_LOGITECH=y
# CONFIG_LOGIRUMBLEPAD2_FF is not set
# CONFIG_LOGIG940_FF is not set
# CONFIG_LOGIWII_FF is not set
-# CONFIG_HID_MAGICMOUSE is not set
CONFIG_HID_MICROSOFT=y
CONFIG_HID_MONTEREY=y
# CONFIG_HID_MULTITOUCH is not set
@@ -1948,7 +1904,6 @@ CONFIG_HID_NTRIG=y
# CONFIG_HID_SMARTJOYPLUS is not set
# CONFIG_HID_TOPSEED is not set
# CONFIG_HID_THRUSTMASTER is not set
-# CONFIG_HID_WACOM is not set
# CONFIG_HID_ZEROPLUS is not set
# CONFIG_HID_ZYDACRON is not set
CONFIG_USB_SUPPORT=y
@@ -1982,8 +1937,8 @@ CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_EHCI_TT_NEWSCHED=y
CONFIG_USB_EHCI_PXA=y
CONFIG_USB_EHCI_PXA_U2O=y
-# CONFIG_USB_EHCI_PXA_U2H_HSIC is not set
-CONFIG_USB_EHCI_PXA_U2H_FSIC=y
+CONFIG_USB_EHCI_PXA_U2H_HSIC=y
+# CONFIG_USB_EHCI_PXA_U2H_FSIC is not set
# CONFIG_USB_OXU210HP_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
# CONFIG_USB_ISP1760_HCD is not set
@@ -2023,7 +1978,7 @@ CONFIG_USB_STORAGE=y
# CONFIG_USB_STORAGE_KARMA is not set
# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
# CONFIG_USB_STORAGE_ENE_UB6250 is not set
-CONFIG_USB_UAS=y
+# CONFIG_USB_UAS is not set
# CONFIG_USB_LIBUSUAL is not set
#
@@ -2060,7 +2015,6 @@ CONFIG_USB_UAS=y
# CONFIG_USB_TEST is not set
# CONFIG_USB_ISIGHTFW is not set
# CONFIG_USB_YUREX is not set
-# CONFIG_USB_VBUS_88PM80X is not set
CONFIG_USB_GADGET=y
# CONFIG_USB_GADGET_DEBUG is not set
# CONFIG_USB_GADGET_DEBUG_FILES is not set
@@ -2080,8 +2034,8 @@ CONFIG_USB_GADGET_DUALSPEED=y
# CONFIG_USB_G_NCM is not set
# CONFIG_USB_GADGETFS is not set
# CONFIG_USB_FUNCTIONFS is not set
-CONFIG_USB_FILE_STORAGE=m
-CONFIG_USB_MASS_STORAGE=m
+# CONFIG_USB_FILE_STORAGE is not set
+CONFIG_USB_MASS_STORAGE=y
# CONFIG_USB_G_SERIAL is not set
# CONFIG_USB_MIDI_GADGET is not set
# CONFIG_USB_G_PRINTER is not set
@@ -2096,9 +2050,8 @@ CONFIG_USB_MASS_STORAGE=m
# OTG and related infrastructure
#
CONFIG_USB_OTG_UTILS=y
-# CONFIG_USB_OTG_WAKELOCK is not set
# CONFIG_USB_GPIO_VBUS is not set
-CONFIG_USB_ULPI=y
+# CONFIG_USB_ULPI is not set
# CONFIG_NOP_USB_XCEIV is not set
CONFIG_USB_PXA_U2O_OTG=y
CONFIG_MMC=y
@@ -2172,7 +2125,6 @@ CONFIG_SWITCH=y
# CONFIG_SWITCH_GPIO is not set
# CONFIG_SWITCH_HEADSET is not set
# CONFIG_SWITCH_88PM80X_HEADSET is not set
-# CONFIG_SWITCH_HEADSET_HOST_GPIO is not set
# CONFIG_SWITCH_WM8994_HEADSET is not set
# CONFIG_ACCESSIBILITY is not set
CONFIG_RTC_LIB=y
@@ -2195,8 +2147,6 @@ CONFIG_RTC_INTF_ALARM_DEV=y
#
# I2C RTC drivers
#
-# CONFIG_RTC_DRV_88PM80X is not set
-# CONFIG_RTC_DRV_MAX77601 is not set
# CONFIG_RTC_DRV_DS1307 is not set
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
@@ -2262,6 +2212,7 @@ CONFIG_UIO_HDMI=y
# CONFIG_UIO_CODA7542 is not set
CONFIG_STAGING=y
# CONFIG_USBIP_CORE is not set
+# CONFIG_W35UND is not set
# CONFIG_PRISM2_USB is not set
# CONFIG_ECHO is not set
# CONFIG_BRCMUTIL is not set
@@ -2299,31 +2250,17 @@ CONFIG_MACH_NO_WESTBRIDGE=y
#
# CONFIG_ALTERA_STAPL is not set
CONFIG_CLKDEV_LOOKUP=y
-CONFIG_PM_DEVFREQ=y
-
-#
-# DEVFREQ Governors
-#
-CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
-CONFIG_DEVFREQ_GOV_PERFORMANCE=y
-CONFIG_DEVFREQ_GOV_POWERSAVE=y
-CONFIG_DEVFREQ_GOV_USERSPACE=y
-
-#
-# DEVFREQ Drivers
-#
-CONFIG_DDR_DEVFREQ=y
-CONFIG_VMETA_DEVFREQ=y
-# CONFIG_VMETA_DEVFREQ_DEFAULT_GOV_PERFORMANCE is not set
-# CONFIG_VMETA_DEVFREQ_DEFAULT_GOV_POWERSAVE is not set
-CONFIG_VMETA_DEVFREQ_DEFAULT_GOV_USERSPACE=y
-#CONFIG_VMETA_DEVFREQ_DEFAULT_GOV_SIMPLE_ONDEMAND is not set
+# CONFIG_PM_DEVFREQ is not set
#
# File systems
#
CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
+CONFIG_EXT2_FS_XATTR=y
+# CONFIG_EXT2_FS_POSIX_ACL is not set
+# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
CONFIG_EXT4_FS=y
# CONFIG_EXT4_USE_FOR_EXT23 is not set
CONFIG_EXT4_FS_XATTR=y
@@ -2731,4 +2668,4 @@ CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
CONFIG_CPU_RMAP=y
CONFIG_NLATTR=y
-# CONFIG_AVERAGE is not set
+CONFIG_AVERAGE=y
diff --git a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
index c28caebf6fe380..aa2f0975d789e2 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
@@ -390,6 +390,8 @@
#define TWSI4_SDA MFP_CFG_DRV(TWSI4_SDA, AF0, SLOW)
#define GPIO99_TWSI5_SCL MFP_CFG_DRV(GPIO99, AF4, SLOW)
#define GPIO100_TWSI5_SDA MFP_CFG_DRV(GPIO100, AF4, SLOW)
+#define GPIO41_TWSI5_SCL MFP_CFG_DRV(GPIO41, AF2, SLOW) /* for Ariel 2 */
+#define GPIO42_TWSI5_SDA MFP_CFG_DRV(GPIO42, AF2, SLOW) /* for Ariel 2 */
#define GPIO97_TWSI6_SCL MFP_CFG_DRV(GPIO97, AF2, SLOW)
#define GPIO98_TWSI6_SDA MFP_CFG_DRV(GPIO98, AF2, SLOW)
#define GPIO47_TWSI6_SCL MFP_CFG_DRV(GPIO47, AF3, SLOW)
@@ -486,6 +488,9 @@
/* HSIC1 RESET - Abilene A0 Board */
#define GPIO96_HSIC_RESET MFP_CFG_LPM(GPIO96, AF0, DRIVE_LOW)
+/* HSIC1 RESET - Wyse Ariel 2 Board */
+#define GPIO63_HSIC_RESET MFP_CFG_LPM(GPIO63, AF0, DRIVE_LOW)
+
/* BB Power Enable - Abilene Rev.5 */
#define GPIO63_BB_POWER_EN MFP_CFG(GPIO63, AF0)
diff --git a/arch/arm/mach-mmp/include/mach/pxa168fb.h b/arch/arm/mach-mmp/include/mach/pxa168fb.h
index 4a8f64590cf66c..71312855e4e748 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168fb.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168fb.h
@@ -222,6 +222,8 @@ struct pxa168fb_info {
/* gamma correction */
struct mvdisp_gamma gamma;
+ u32 sclk_src;
+ u32 sclk_div;
};
struct dsi_phy {
diff --git a/arch/arm/mach-mmp/mmp3.c b/arch/arm/mach-mmp/mmp3.c
index db2f25e28c7230..47f46d310dba64 100644
--- a/arch/arm/mach-mmp/mmp3.c
+++ b/arch/arm/mach-mmp/mmp3.c
@@ -132,8 +132,10 @@ void __init mmp3_reserve(void)
*/
BUG_ON(memblock_reserve(PLAT_PHYS_OFFSET, 0x1000));
+#ifdef CONFIG_ANDROID_PMEM
/*reserve memory for pmem*/
pxa_reserve_pmem_memblock();
+#endif
#ifdef CONFIG_SMP
c2_reserve_pa = memblock_alloc(C2_RESERVE_SIZE, PAGE_SIZE);
if (!c2_reserve_pa) {
diff --git a/arch/arm/mach-mmp/onboard/lcd_mipi.c b/arch/arm/mach-mmp/onboard/lcd_mipi.c
index 974cd4a2f42650..675520f655554a 100644
--- a/arch/arm/mach-mmp/onboard/lcd_mipi.c
+++ b/arch/arm/mach-mmp/onboard/lcd_mipi.c
@@ -38,15 +38,54 @@ static int is_qhd_lcd(void)
static struct fb_videomode video_modes_abilene[] = {
[0] = {
/* panel refresh rate should <= 55(Hz) */
- .refresh = 55,
- .xres = 1280,
- .yres = 800,
- .hsync_len = 2,
- .left_margin = 64,
- .right_margin = 64,
- .vsync_len = 2,
- .upper_margin = 8,
- .lower_margin = 8,
+ /* used for Wyse configuration same as Ariel 1 */
+
+ /* support resolution changes via IOCTL FBIOPUT_VSCREENINFO */
+ /* pixclock = 1000000000000 /
+ * ((xres+left_margin+right_margin+hsync_len)*(yres+upper_margin+lower_margin+vsync_len)*refresh)
+ */
+ //.pixclock = 6734,
+ .refresh = 60,
+#if 1 //for 1024x768 79.5MHz.
+ .xres = 1024,
+ .yres = 768,
+ .hsync_len = 136,
+ .left_margin = 84,
+ .right_margin = 100,
+ .vsync_len = 6,
+ .upper_margin = 13,
+ .lower_margin = 19,
+#endif
+#if 0 //for 1280X1024 108MHz.
+ .xres = 1280,
+ .yres = 1024,
+ .hsync_len = 112,
+ .left_margin = 48,
+ .right_margin = 248,
+ .vsync_len = 3,
+ .upper_margin = 1,
+ .lower_margin = 38,
+#endif
+#if 0 //for 1600x1200 162MHz.
+ .xres = 1600,
+ .yres = 1200,
+ .hsync_len = 192,
+ .left_margin = 64,
+ .right_margin = 304,
+ .vsync_len = 3,
+ .upper_margin = 1,
+ .lower_margin = 46,
+#endif
+#if 0 //for 1920x1080 148.5MHz.
+ .xres = 1920,
+ .yres = 1080,
+ .hsync_len = 44,
+ .left_margin = 88,
+ .right_margin = 148,
+ .vsync_len = 5,
+ .upper_margin = 4,
+ .lower_margin = 36,
+#endif
.sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
},
};
@@ -73,6 +112,10 @@ static struct fb_videomode video_modes_yellowstone[] = {
#ifdef CONFIG_MACH_THUNDERSTONEM
static struct fb_videomode video_modes_thunderstonem[] = {
[0] = {
+ /* pixclock = 1000000000000 /
+ * ((xres+left_margin+right_margin+hsync_len)*(yres+upper_margin+lower_margin+vsync_len)*refresh)
+ */
+ .pixclock = 16241,
.refresh = 60,
.xres = 1024,
.yres = 768,
@@ -108,6 +151,10 @@ static struct fb_videomode video_modes_orchid[] = {
#ifdef CONFIG_MACH_MK2
static struct fb_videomode video_modes_mk2[] = {
[0] = {
+ /* pixclock = 1000000000000 /
+ * ((xres+left_margin+right_margin+hsync_len)*(yres+upper_margin+lower_margin+vsync_len)*refresh)
+ */
+ .pixclock = 14833,
.refresh = 60,
.xres = 1024,
.yres = 768,
@@ -1142,8 +1189,10 @@ static struct pxa168fb_mach_info mipi_lcd_info = {
.id = "GFX Layer",
.num_modes = 0,
.modes = NULL,
- .sclk_div = 0xE0001108,
+ .sclk_div = 0xE0001108,\
.pix_fmt = PIX_FMT_RGB565,
+// .pix_fmt = PIX_FMT_RGB888PACK,
+ .dumb_mode = DUMB_MODE_RGB888,
.isr_clear_mask = LCD_ISR_CLEAR_MASK_PXA168,
/* don't care about io_pin_allocation_mode and dumb_mode
* since the panel is hard connected with lcd panel path and
@@ -1162,7 +1211,7 @@ static struct pxa168fb_mach_info mipi_lcd_info = {
.mmap = 1,
.vdma_enable = 1,
.sram_size = 30 * 1024,
- .max_fb_size = 0,
+ .max_fb_size = 1920 * 1200 * 8 + 4096,
.phy_type = DSI2DPI,
.phy_init = dsi_init,
#ifdef CONFIG_TC35876X
@@ -1333,8 +1382,11 @@ void __init abilene_add_lcd_mipi(void)
fb->num_modes = ARRAY_SIZE(video_modes_abilene);
fb->modes = video_modes_abilene;
+ fb->max_fb_size = 4000 * 1100 * 8 + 4096,
+/*
fb->max_fb_size = video_modes_abilene[0].xres *
video_modes_abilene[0].yres * 8 + 4096;
+*/
ovly->num_modes = fb->num_modes;
ovly->modes = fb->modes;
ovly->max_fb_size = fb->max_fb_size;
diff --git a/arch/arm/mach-mmp/qseven.c b/arch/arm/mach-mmp/qseven.c
index 143b7ba7e511c6..a82b72681df8ac 100644
--- a/arch/arm/mach-mmp/qseven.c
+++ b/arch/arm/mach-mmp/qseven.c
@@ -76,33 +76,45 @@ static unsigned long qseven_pin_config[] __initdata = {
GPIO52_UART3_TXD,
/* TWSI5 not connected in rev 1 carrier board*/
- GPIO99_TWSI5_SCL,
- GPIO100_TWSI5_SDA,
+ GPIO41_TWSI5_SCL,
+ GPIO42_TWSI5_SDA,
/* TWSI6 for HDMI */
- GPIO97_TWSI6_SCL,
- GPIO98_TWSI6_SDA,
+ GPIO47_TWSI6_SCL,
+ GPIO48_TWSI6_SDA,
+#if 0
/* TWSI2 for camera */
GPIO55_TWSI2_SCL,
GPIO56_TWSI2_SDA,
GPIO73_CAM_MCLK,
GPIO72_GPIO,
+#endif
/* TWSI3 for audio codec on carrier card rev 2*/
- GPIO95_TWSI3_SCL,
- GPIO96_TWSI3_SDA,
+// GPIO95_TWSI3_SCL,
+// GPIO96_TWSI3_SDA,
+ /* paul for Ariel2 */
+ GPIO71_TWSI3_SCL,
+ GPIO72_TWSI3_SDA,
+#if 0
HDA_RST_N_GPIO_79, /*Not connected in carrier rev 1 board*/
+#endif
/* TWSI4 touch controller on carrier card*/
TWSI4_SCL,
TWSI4_SDA,
+
+#if 0
TSI_INT_N, /*also smb_int_n in the card schema*/
+#endif
+#if 0
/*PWM3*/
GPIO53_PWM3,
/*PWM4 for Q7 board rev 1, not connected anywhere*/
GPIO54_PWM4,
+#endif
/* SSPA1 (I2S) */
GPIO25_I2S_BITCLK,
@@ -110,6 +122,16 @@ static unsigned long qseven_pin_config[] __initdata = {
GPIO27_I2S_DATA_OUT,
GPIO28_I2S_SDATA_IN,
+ /* HSIC1 reset pin (output) for Ariel 2*/
+ GPIO63_HSIC_RESET,
+
+ /* Headphone Detection GPIO 62 pin (Input) for Ariel 2*/
+ GPIO62_GPIO,
+
+ /* Microphone Detection GPIO 68 pin (Input) for Ariel 2*/
+ GPIO68_GPIO,
+
+#if 0
/*ULPI QSEVEN rev 1*/
ULPI_DATA_0_GPIO_66,
ULPI_DATA_1_GPIO_65,
@@ -124,6 +146,7 @@ static unsigned long qseven_pin_config[] __initdata = {
ULPI_DIR_GPIO_69,
ULPI_NXT_GPIO_68,
ULPI_STP_GPIO_67,
+#endif
/* SSP1 FOR NOR FLASH, NOT POPULTAED*/
SSP1_RXD_GPIO_43,
@@ -131,6 +154,10 @@ static unsigned long qseven_pin_config[] __initdata = {
SSP1_CLK_GPIO_45,
SSP1_FRM_GPIO_46,
+ /*HDMI_HPD_N for hdmi detect, y no hdmi_cec*/
+ GPIO59_GPIO,
+
+#if 0
/* SSP3 FOR CAN*/
GPIO74_SSP_CLK,
GPIO75_SSP_FRM,
@@ -149,7 +176,36 @@ static unsigned long qseven_pin_config[] __initdata = {
GPIO85_GPIO,
GPIO86_GPIO,
GPIO87_GPIO,
-
+#endif
+ /*LCD RGB*/
+ GPIO74_LCD_FCLK,
+ GPIO75_LCD_LCLK,
+ GPIO76_LCD_PCLK,
+ GPIO77_LCD_DENA,
+ GPIO78_LCD_DD0,
+ GPIO79_LCD_DD1,
+ GPIO80_LCD_DD2,
+ GPIO81_LCD_DD3,
+ GPIO82_LCD_DD4,
+ GPIO83_LCD_DD5,
+ GPIO84_LCD_DD6,
+ GPIO85_LCD_DD7,
+ GPIO86_LCD_DD8,
+ GPIO87_LCD_DD9,
+ GPIO88_LCD_DD10,
+ GPIO89_LCD_DD11,
+ GPIO90_LCD_DD12,
+ GPIO91_LCD_DD13,
+ GPIO92_LCD_DD14,
+ GPIO93_LCD_DD15,
+ GPIO94_LCD_DD16,
+ GPIO95_LCD_DD17,
+ GPIO96_LCD_DD18,
+ GPIO97_LCD_DD19,
+ GPIO98_LCD_DD20,
+ GPIO99_LCD_DD21,
+ GPIO100_LCD_DD22,
+ GPIO101_LCD_DD23,
};
static unsigned long mmc1_pin_config[] __initdata = {
@@ -164,6 +220,7 @@ static unsigned long mmc1_pin_config[] __initdata = {
GPIO137_GPIO, /*drive low to enable power to card*/
};
+#if 0
/* MMC2 is used for WIB card */
static unsigned long mmc2_pin_config[] __initdata = {
GPIO37_MMC2_DAT3,
@@ -174,14 +231,10 @@ static unsigned long mmc2_pin_config[] __initdata = {
GPIO42_MMC2_CLK,
/* GPIO used for power */
- /*GPIO57_GPIO | MFP_LPM_DRIVE_HIGH, /* WLAN_PD_N */
-#ifdef CONFIG_SD8XXX_RFKILL
- GPIO57_GPIO | MFP_LPM_DRIVE_LOW,
-#else
- GPIO57_GPIO | MFP_LPM_DRIVE_HIGH,
-#endif
+ GPIO57_GPIO, /* WLAN_PD_N */
WIFI_32K_CLK_OUT,
};
+#endif
static unsigned long mmc3_pin_config[] __initdata = {
GPIO108_MMC3_DAT7,
@@ -278,6 +331,7 @@ static void __init mmp_init_devfreq_vmeta(void)
mmp_set_devfreq_vmeta_info(&devfreq_vmeta_pdata);
}
#endif
+#if 0
static struct pxa27x_keypad_platform_data mmp3_keypad_info = {
.direct_key_map = {
@@ -334,8 +388,12 @@ struct tsc2007_platform_data tsc_2007_data = {
};
#endif
+#endif
+#if 0
static struct i2c_board_info qseven_twsi4_info[] = {
+ {
+ },
#if defined(CONFIG_TOUCHSCREEN_TSC2007)
{
.type = "tsc2007",
@@ -345,22 +403,30 @@ static struct i2c_board_info qseven_twsi4_info[] = {
},
#endif
};
+#endif
static struct i2c_board_info qseven_twsi3_info[] = {
{
- .type = "wm8731",
- .addr = 0x1a,
+ .type = "ce156",
+ .addr = 0x30,
},
};
/*FIXME*/
+#if 1 /* Enable for Ariel */
static struct i2c_board_info qseven_twsi2_info[] = {
{
},
};
+static struct i2c_board_info qseven_twsi5_info[] = {
+ {
+ },
+};
static struct i2c_board_info qseven_twsi6_info[] = {
{
},
};
+#endif
+
#ifdef CONFIG_REGULATOR_88PM867
#define PMIC_POWER_MAX MAR88PM867_VREG_MAX
@@ -459,6 +525,7 @@ static void qseven_regulators(void)
#endif /*CONFIG_REGULATOR_88PM867*/
+#if 0
static int qseven_pwm_init(struct device *dev)
{
int lvds_blen, lvds_pplen;
@@ -502,6 +569,7 @@ static struct platform_device qseven_lcd_backlight_devices = {
.platform_data = &qseven_lcd_backlight_data,
},
};
+#endif
#ifdef CONFIG_MMC_SDHCI_PXAV3
#include <linux/mmc/host.h>
@@ -556,10 +624,12 @@ static struct sdhci_pxa_platdata mmp3_sdh_platdata_mmc0 = {
.clk_delay_cycles = 0x1F,
};
+#if 0
static struct sdhci_pxa_platdata mmp3_sdh_platdata_mmc1 = {
.flags = PXA_FLAG_CARD_PERMANENT,
.pm_caps = MMC_PM_KEEP_POWER,
};
+#endif
static struct sdhci_pxa_platdata mmp3_sdh_platdata_mmc2 = {
.flags = PXA_FLAG_SD_8_BIT_CAPABLE_SLOT,
@@ -567,13 +637,11 @@ static struct sdhci_pxa_platdata mmp3_sdh_platdata_mmc2 = {
static int __init qseven_init_mmc(void)
{
- int sd_power_gpio = mfp_to_gpio(MFP_PIN_GPIO137);
+#if 0
+ /* No MMC power enable for Ariel 2 */
+ int sd_power_gpio = mfp_to_gpio(MFP_PIN_GPIO140);/* This Card detection on Ariel 2 */
int wlan_pd_n = mfp_to_gpio(MFP_PIN_GPIO57);
- int WIB_RESETn = mfp_to_gpio(GPIO58_GPIO);
-#ifdef CONFIG_SD8XXX_RFKILL
- add_sd8x_rfkill_device(wlan_pd_n, NULL,\
- &mmp3_sdh_platdata_mmc1.pmmc, mmp3_8787_set_power);
-#endif
+
if (gpio_request(sd_power_gpio, "sd card power")) {
printk(KERN_INFO "gpio %d request failed\n", sd_power_gpio);
return -1;
@@ -581,16 +649,20 @@ static int __init qseven_init_mmc(void)
gpio_direction_output(sd_power_gpio, 0);
gpio_free(sd_power_gpio);
+#endif
mfp_config(ARRAY_AND_SIZE(mmc3_pin_config));
mmp3_add_sdh(2, &mmp3_sdh_platdata_mmc2); /* eMMC */
mfp_config(ARRAY_AND_SIZE(mmc1_pin_config));
+#if 0 // disable
if (cpu_is_mmp3_b1())/*replaced with b1*/
mmp3_sdh_platdata_mmc0.quirks =
SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
+#endif
mmp3_add_sdh(0, &mmp3_sdh_platdata_mmc0); /* SD/MMC */
+#if 0
/* SDIO for WIFI card */
mfp_config(ARRAY_AND_SIZE(mmc2_pin_config));
mmp3_add_sdh(1, &mmp3_sdh_platdata_mmc1);
@@ -603,6 +675,7 @@ static int __init qseven_init_mmc(void)
mdelay(100);
gpio_direction_output(wlan_pd_n, 1);
gpio_free(wlan_pd_n);
+#endif
return 0;
}
#endif /* CONFIG_MMC_SDHCI_PXAV3 */
@@ -626,6 +699,85 @@ static struct mv_usb_platform_data mmp3_usb_pdata = {
};
#endif /*CONFIG_USB_PXA_U20*/
+
+#ifdef CONFIG_USB_EHCI_PXA_U2H_HSIC
+static int mmp3_hsic1_reset(void)
+{
+ int reset;
+ reset = mfp_to_gpio(GPIO63_HSIC_RESET);
+
+ if (gpio_request(reset, "hsic reset")) {
+ pr_err("Failed to request hsic reset gpio\n");
+ return -EIO;
+ }
+
+ gpio_direction_output(reset, 0);
+ mdelay(100);
+ gpio_direction_output(reset, 1);
+ mdelay(50);
+
+ gpio_free(reset);
+ return 0;
+}
+
+static int mmp3_hsic1_set_vbus(unsigned int vbus)
+{
+
+#if 0
+ static struct regulator *v_1p2_hsic;
+ printk(KERN_INFO "%s: set %d\n", __func__, vbus);
+#endif
+ if (vbus) {
+
+#if 0
+ if (!v_1p2_hsic) {
+ v_1p2_hsic = regulator_get(NULL, "V_1P2_HSIC");
+ if (IS_ERR(v_1p2_hsic)) {
+ printk(KERN_INFO "V_1P2_HSIC not found\n");
+ return -EIO;
+ }
+ regulator_set_voltage(v_1p2_hsic, 1200000, 1200000);
+ regulator_enable(v_1p2_hsic);
+ printk(KERN_INFO "%s: enable regulator\n", __func__);
+ udelay(2);
+ }
+#endif
+
+ mmp3_hsic1_reset();
+ } else {
+#if 0
+ if (v_1p2_hsic) {
+ regulator_disable(v_1p2_hsic);
+ regulator_put(v_1p2_hsic);
+ v_1p2_hsic = NULL;
+ }
+#endif
+ }
+
+ return 0;
+}
+
+static char *mmp3_hsic1_clock_name[] = {
+ [0] = "U2OCLK",
+ [1] = "HSIC1CLK",
+};
+
+static struct mv_usb_platform_data mmp3_hsic1_pdata = {
+ .clknum = 2,
+ .clkname = mmp3_hsic1_clock_name,
+ .vbus = NULL,
+ .mode = MV_USB_MODE_HOST,
+ .phy_init = mmp3_hsic_phy_init,
+ .phy_deinit = mmp3_hsic_phy_deinit,
+ .set_vbus = mmp3_hsic1_set_vbus,
+ .private_init = mmp3_hsic_private_init,
+};
+#endif
+
+
+
+
+#if 0
#ifdef CONFIG_USB_EHCI_PXA_U2H_FSIC /*Support for ulpi*/
static int mmp3_fsic_ulpi_phy_reset(void)
{
@@ -660,11 +812,12 @@ static struct mv_usb_platform_data mmp3_fsic_pdata = {
#endif
#endif
+#endif /* USB support */
#ifdef CONFIG_UIO_HDMI
static struct uio_hdmi_platform_data mmp3_hdmi_info __initdata = {
.sspa_reg_base = 0xD42A0C00,
/* Fix me: gpio 81 lpm pull ? */
- .gpio = mfp_to_gpio(GPIO81_GPIO),
+ .gpio = mfp_to_gpio(GPIO59_GPIO),
.edid_bus_num = 6,
};
#endif
@@ -831,8 +984,8 @@ static struct dmc_timing_entry khx1600c9s3k_table[] = {
static void set_ddr_dll(u32 val)
{
- u32 tmp;
#ifdef CONFIG_DDR_DEVFREQ
+ u32 tmp;
if (val <= 0xf) {
tmp = readl(ddr_info.hw_base[0] + 0x248);
writel((tmp & ~(0xf << 28)) | (val << 28), \
@@ -848,6 +1001,7 @@ static void qseven_update_ddr_info(void)
mmp3_pm_update_dram_timing_table(ARRAY_SIZE(khx1600c9s3k_table),
khx1600c9s3k_table);
}
+#if 0
static struct i2c_board_info qseven_i2c_camera[] = {
{
I2C_BOARD_INFO("ov5642", 0x3c),
@@ -978,6 +1132,7 @@ static struct mv_cam_pdata mv_cam_data = {
.enable_clk = pxa2128_cam_set_clk,
.get_mclk_src = get_mclk_src,
};
+#endif
static void __init qseven_init(void)
{
@@ -986,20 +1141,26 @@ static void __init qseven_init(void)
/* on-chip devices */
mmp3_add_uart(3);
+#if 1 /*Enable for Ariel*/
mmp3_add_twsi(2, NULL, ARRAY_AND_SIZE(qseven_twsi2_info));
+ mmp3_add_twsi(5, NULL, ARRAY_AND_SIZE(qseven_twsi5_info));
mmp3_add_twsi(6, NULL, ARRAY_AND_SIZE(qseven_twsi6_info));
+#endif
#ifdef CONFIG_REGULATOR_88PM867
qseven_power_supply_init();
mmp3_add_twsi(1, NULL, ARRAY_AND_SIZE(qseven_twsi1_mar88pm867_info));
#endif
+#if 0
#if defined(CONFIG_TOUCHSCREEN_TSC2007)
tsc2007_init_gpio_irq();
#endif
+#endif
+#if 0
mmp3_add_twsi(4, NULL, ARRAY_AND_SIZE(qseven_twsi4_info));
-
mmp3_add_keypad(&mmp3_keypad_info);
+#endif
mmp3_add_videosram(&mmp3_videosram_info);
@@ -1018,11 +1179,12 @@ static void __init qseven_init(void)
#endif
/* Change DLL reset timer to 256 cycles
set_ddr_dll(2);*/
-
+#if 0
/* backlight */
mmp3_add_pwm(3);
platform_device_register(&qseven_lcd_backlight_devices);
mmp3_add_thermal();
+#endif
#ifdef CONFIG_ANDROID_PMEM
pxa_add_pmem();
@@ -1045,15 +1207,18 @@ static void __init qseven_init(void)
/* audio sspa support */
mmp3_add_twsi(3, NULL, ARRAY_AND_SIZE(qseven_twsi3_info));
mmp3_add_sspa(1);
+#if 0
mmp3_add_sspa(2);
+#endif
mmp3_add_audiosram(&mmp3_audiosram_info);
/* sensor ov5642 and ccic support */
-
+#if 0
#if defined(CONFIG_VIDEO_MV)
platform_device_register(&qseven_ov5642);
mmp3_add_cam(0, &mv_cam_data);
#endif
+#endif
#ifdef CONFIG_USB_PXA_U2O
mmp3_device_u2o.dev.platform_data = (void *)&mmp3_usb_pdata;
@@ -1070,16 +1235,23 @@ static void __init qseven_init(void)
#endif
#endif
+#ifdef CONFIG_USB_EHCI_PXA_U2H_HSIC
+ mmp3_hsic1_device.dev.platform_data = (void *)&mmp3_hsic1_pdata;
+ platform_device_register(&mmp3_hsic1_device);
+#endif
+
+#if 0
#ifdef CONFIG_USB_EHCI_PXA_U2H_FSIC
mmp3_fsic_ulpi_phy_reset();
mmp3_fsic_device.dev.platform_data = (void *)&mmp3_fsic_pdata;
platform_device_register(&mmp3_fsic_device);
#endif
+#endif
#ifdef CONFIG_REGULATOR_88PM867
qseven_regulators();
#endif
- pxa_u3d_phy_disable();
+// pxa_u3d_phy_disable(); //paul disable due to Ariel2 disable USB3 Power
}
MACHINE_START(QSEVEN, "Qseven")
diff --git a/drivers/usb/otg/mv_otg.c b/drivers/usb/otg/mv_otg.c
index 50f83d74f92c7c..7d318b0160664c 100644
--- a/drivers/usb/otg/mv_otg.c
+++ b/drivers/usb/otg/mv_otg.c
@@ -47,7 +47,7 @@ MODULE_LICENSE("GPL");
static const char driver_name[] = "mv_otg";
static struct mv_otg *the_transceiver;
-static int otg_force_host_mode;
+static int otg_force_host_mode=1;
static struct wake_lock suspend_lock;
#ifdef CONFIG_PXA95x
static int dvfm_dev_idx;
diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c
index 6c0d2dd99c1790..3dab7e18adb103 100644
--- a/drivers/video/pxa168fb.c
+++ b/drivers/video/pxa168fb.c
@@ -893,7 +893,7 @@ static int pxa168fb_pan_display(struct fb_var_screeninfo *var,
static irqreturn_t pxa168fb_threaded_handle_irq(int irq, void *dev_id)
{
if (atomic_read(&framedone)) {
- wakeup_ddr_fc_seq();
+// wakeup_ddr_fc_seq(); //paul tmp
atomic_set(&framedone, 0);
}
diff --git a/include/drm/drm.h b/include/drm/drm.h
index 4be33b4ca2f898..e6fed6f70b9a69 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -35,7 +35,7 @@
#ifndef _DRM_H_
#define _DRM_H_
-
+#define __linux__
#if defined(__linux__)
#include <linux/types.h>
diff --git a/scripts/Makefile.clean b/scripts/Makefile.clean
index 686cb0d31c7c95..4a88be7b42c795 100644
--- a/scripts/Makefile.clean
+++ b/scripts/Makefile.clean
@@ -14,7 +14,8 @@ clean := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.clean obj
# The filename Kbuild has precedence over Makefile
kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
-include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile)
+## comment out below to fix make mrproper error
+## include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile)
# Figure out what we need to build from the various variables
# ==========================================================================
diff --git a/sound/soc/codecs/88ce156-codec.c b/sound/soc/codecs/88ce156-codec.c
new file mode 100755
index 00000000000000..5d097159d9438a
--- /dev/null
+++ b/sound/soc/codecs/88ce156-codec.c
@@ -0,0 +1,1290 @@
+/*
+ * ce156.c -- 88CE156 ALSA Soc Audio driver
+ *
+ * Copyright 2011 Marvell International Ltd.
+ *
+ * All rights reserved
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/initval.h>
+#include <sound/tlv.h>
+#include <asm/div64.h>
+
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+
+#include "88ce156-codec.h"
+
+#define AUDIO_NAME "ce156"
+#define CE156_VERSION "a0"
+//#define USE_DAPM_CTRL 1 /* disable for mic recording */
+
+#define CE156_DAPM_OUTPUT(wname, wevent) \
+{ .id = snd_soc_dapm_pga, .name = wname, .reg = SND_SOC_NOPM, \
+ .shift = 0, .invert = 0, .kcontrols = NULL, \
+ .num_kcontrols = 0, .event = wevent, \
+ .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD, }
+
+struct ce156_private {
+ enum snd_soc_control_type control_type;
+ void *control_data;
+};
+
+struct ce156_init_reg {
+ char name[30];
+ u8 reg_value;
+ u8 reg_index;
+};
+
+static struct ce156_init_reg ce156_init_list[] = {
+ {"SPK Input Sel", 0x06, CE156_SPK_INPUT_SEL},
+ {"HS1 Volume", 0x04, CE156_DAC_HS1_CTRL},
+ {"HS2 Volume", 0x04, CE156_DAC_HS2_CTRL},
+ {"SPK Volume", 0x24, CE156_DAC_SPKR_CTRL},
+ {"MIC1 Gain", 0x20, CE156_MIC1_PGA_GAIN},
+ {"MIC2 Gain", 0x20, CE156_MIC2_PGA_GAIN},
+ {"Line1 In Gain", 0x08, CE156_ADC1_PGA_GAIN},
+ {"Line2 In Gain", 0x08, CE156_ADC2_PGA_GAIN},
+};
+
+#define CE156_INIT_REG_NUM ARRAY_SIZE(ce156_init_list)
+
+static const u8 ce156_reg[] = {
+ 0x00, 0x00, 0x00, 0x00, /* Reg00 - Reg03 */
+ 0x00, 0x00, 0x00, 0x00, /* Reg04 - Reg07 */
+ 0x40, 0x00, 0x00, 0x00, /* Reg08 - Reg0b */
+ 0x00, 0x00, 0x00, 0x3f, /* Reg0c - Reg0f */
+ 0x3f, 0x3f, 0x3f, 0x44, /* Reg10 - Reg13 */
+ 0x00, 0x00, 0x00, 0x00, /* Reg14 - Reg17 */
+ 0xa1, 0x00, 0x08, 0x82, /* Reg18 - Reg1b */
+ 0x00, 0x00, 0x06, 0x00, /* Reg1c - Reg1e */
+ 0x00, /* filled */
+ 0x00, 0x00, 0x00, 0x00, /* Reg20 - Reg23 */
+ 0x00, 0x00, 0x00, 0x00, /* Reg24 - Reg27 */
+ 0x00, 0x00, 0xa0, 0x00, /* Reg28 - Reg2b */
+ 0x00, 0x00, 0x00, 0x00, /* Reg2c - Reg2f */
+ 0x00, 0x00, 0x00, 0x00, /* Reg30 - Reg33 */
+ 0x00, 0x00, 0x00, 0x00, /* Reg34 - Reg37 */
+ 0x20, 0x00, 0x00, /* Reg38 - Reg3a */
+ 0x00, /* filled */
+ 0x00, 0x00, 0x00, 0x00, /* filled */
+ 0x00, 0x00, 0x00, 0x00, /* Reg40 - Reg43 */
+ 0x00, 0x00, 0x00, 0x00, /* Reg44 - Reg47 */
+ 0x03, 0xff, 0x12, /* Reg48 - Reg4a */
+};
+
+static int ce156_read_reg_cache(struct snd_soc_codec *codec,
+ unsigned int reg)
+{
+ const struct snd_soc_codec_driver *codecdrv = codec->driver;
+ u8 *cache = (u8*)codecdrv->reg_cache_default;
+ if (reg < 0 || reg > codecdrv->reg_cache_size)
+ return -EIO;
+ return (int)cache[reg];
+}
+
+static unsigned int ce156_read_hw_reg(struct snd_soc_codec *codec,
+ unsigned int reg)
+{
+ u8 data[2] = {0};
+ unsigned int value;
+
+ data[0] = reg;
+
+ if (i2c_master_send(codec->control_data, data, 1) == 1) {
+ i2c_master_recv(codec->control_data, data, 1);
+ value = data[0];
+
+ pr_info("ce156_read ok, reg 0x%x = %x\n", reg, value);
+
+ return value;
+ }
+
+ printk(KERN_ERR "%s: read reg failed\n", __func__);
+ return -EIO;
+}
+
+static unsigned int ce156_read(struct snd_soc_codec *codec,
+ unsigned int reg)
+{
+/* need to be fixed here */
+ return ce156_read_hw_reg(codec, reg);
+ //return 0;
+}
+
+static void ce156_write_reg_cache(struct snd_soc_codec *codec,
+ unsigned int reg, unsigned int value)
+{
+ const struct snd_soc_codec_driver *codecdrv = codec->driver;
+ u8 *cache = (u8*)codecdrv->reg_cache_default;
+ if (reg < 0 || reg > codecdrv->reg_cache_size) {
+ printk(KERN_ERR "%s: out of reg's range address = 0x%x\n",
+ __func__, reg);
+ return;
+ }
+ cache[reg] = value & 0xff;
+ return;
+}
+
+static int ce156_write(struct snd_soc_codec *codec, unsigned int reg,
+ unsigned int value)
+{
+ u8 data[2];
+
+ data[0] = reg;
+ data[1] = value & 0x00ff;
+ //return 0;
+ ce156_write_reg_cache(codec, reg, value);
+ if (i2c_master_send(codec->control_data, data, 2) == 2) {
+ pr_info("ce156_write ok, reg = %x, value = %x\n", reg, value);
+ return 0;
+ }
+ else {
+ printk(KERN_ERR "ce156_write fail, try to write: reg %x, value %x\n\n",
+ reg, value);
+ return -EIO;
+ }
+}
+
+static int ce156_reg_cache_write(struct snd_soc_codec *codec, unsigned int reg)
+{
+ int reg_cache_value = ce156_read_reg_cache(codec, reg);
+ if(reg_cache_value != -EIO) {
+ return (ce156_write(codec, reg, (int)reg_cache_value));
+ }
+ return -EIO;
+}
+
+static int ce156_sync(struct snd_soc_codec *codec)
+{
+ ce156_write(codec, CE156_DAC_ANA_MISC, 0xa0);
+ ce156_write(codec, CE156_DAC_ANA_MISC, 0xa4);
+ ce156_write(codec, CE156_DAC_ANA_MISC, 0xa0);
+ return 0;
+}
+
+static int ce156_reg_init(struct snd_soc_codec *codec)
+{
+ int i;
+
+ for (i = 0; i < CE156_INIT_REG_NUM; i++)
+ ce156_write(codec,
+ ce156_init_list[i].reg_index,
+ ce156_init_list[i].reg_value);
+
+ return 0;
+}
+
+static int caps_charge = 2000;
+module_param(caps_charge, int, 0);
+MODULE_PARM_DESC(caps_charge, "CE156 cap charge time (msecs)");
+
+
+/* FIXME:
+ * how to define AUD155_RESET?
+ */
+static int ce156_reset(struct snd_soc_codec *codec)
+{
+ ce156_write(codec, CE156_CLKGEN2, 0x4);
+ ce156_write(codec, CE156_AUD_PWR_ENABLE, 0);
+
+ ce156_write(codec, CE156_CHARGEPUMP_REG, 0x7);
+ ce156_write(codec, CE156_CLKGEN1, 0x2);
+ ce156_write(codec, CE156_CLKGEN2, 0x7);
+ ce156_write(codec, CE156_AUD_PWR_ENABLE, 0x43);
+ return 0;
+}
+
+static int ce156_reg_setting(struct snd_soc_codec *codec)
+{
+ ce156_reset(codec);
+
+ ce156_reg_cache_write(codec, CE156_PLL1);
+ ce156_reg_cache_write(codec, CE156_PLL2);
+ ce156_reg_cache_write(codec, CE156_PLL_FRACT1);
+ ce156_reg_cache_write(codec, CE156_PLL_FRACT2);
+ //ce156_reg_cache_write(codec, CE156_PLL_FRACT3);
+ ce156_reg_cache_write(codec, CE156_ADC_RATE);
+ ce156_reg_cache_write(codec, CE156_I2S1);
+ ce156_reg_cache_write(codec, CE156_I2S2);
+ ce156_reg_cache_write(codec, CE156_ADC_RSVD);
+ ce156_reg_cache_write(codec, CE156_ADC_ANA_ENABLE);
+ ce156_reg_cache_write(codec, CE156_ADC_DIG_ENABLE);
+ ce156_reg_cache_write(codec, CE156_DAC_DIG_ENABLE);
+ ce156_sync(codec);
+ ce156_reg_cache_write(codec, CE156_HS_MIC_DET);
+ ce156_reg_cache_write(codec, CE156_MIC_CTRL);
+ ce156_reg_cache_write(codec, CE156_DAC_ANA_ENABLE);
+ ce156_reg_cache_write(codec, CE156_HS_INPUT_SEL);
+ ce156_reg_cache_write(codec, CE156_DAC_DWA_OFST);
+ ce156_reg_cache_write(codec, CE156_DAC_GAINLL);
+ ce156_reg_cache_write(codec, CE156_DAC_GAINRR);
+ ce156_sync(codec);
+ ce156_reg_cache_write(codec, CE156_SPK_INPUT_SEL);
+ ce156_reg_cache_write(codec, CE156_DAC_SPKR_CTRL);
+ ce156_reg_cache_write(codec, CE156_ADC1_PGA_GAIN);
+ ce156_reg_cache_write(codec, CE156_ADC2_PGA_GAIN);
+ ce156_reg_cache_write(codec, CE156_MIC1_PGA_GAIN);
+ ce156_reg_cache_write(codec, CE156_MIC2_PGA_GAIN);
+ ce156_reg_cache_write(codec, CE156_DAC_HS1_CTRL);
+ ce156_reg_cache_write(codec, CE156_DAC_HS2_CTRL);
+
+ ce156_write(codec, CE156_STATUS2, 0x40);
+
+ return 0;
+}
+
+int ce156_hw_init(struct snd_soc_codec *codec)
+{
+ ce156_reg_setting(codec);
+ printk(KERN_INFO "success set the ce156 reg!\n");
+ return 0;
+}
+EXPORT_SYMBOL_GPL(ce156_hw_init);
+
+static int ce156_dapm_event(struct snd_soc_codec *codec, enum snd_soc_bias_level level)
+{
+ switch (level) {
+ case SND_SOC_BIAS_ON:
+ printk(KERN_INFO "SND_SOC_BIAS_ON\n");
+ break;
+ case SND_SOC_BIAS_PREPARE:
+ printk(KERN_INFO "SND_SOC_BIAS_PREPARE\n");
+ ce156_hw_init(codec);
+ break;
+ case SND_SOC_BIAS_STANDBY:
+ printk(KERN_INFO "SND_SOC_BIAS_STANDBY\n");
+// ce156_hw_init(codec);
+ break;
+ case SND_SOC_BIAS_OFF:
+ printk(KERN_INFO "SND_SOC_BIAS_OFF\n");
+ /* ce156 power off sequence */
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+
+int ce156_set_sample_rate(struct snd_soc_dai *codec_dai,
+ int div_id, int div)
+{
+ struct snd_soc_codec *codec = codec_dai->codec;
+ u8 rate = ce156_read_reg_cache(codec, CE156_ADC_RATE) & 0xf0;
+ switch(div_id){
+ case SAMPLE_RATE_8000:
+ rate |= 0x0;
+ break;
+ case SAMPLE_RATE_12000:
+ rate |= 0x1;
+ break;
+ case SAMPLE_RATE_16000:
+ rate |= 0x2;
+ break;
+ case SAMPLE_RATE_24000:
+ rate |= 0x3;
+ break;
+ case SAMPLE_RATE_32000:
+ rate |= 0x4;
+ break;
+ case SAMPLE_RATE_48000:
+ rate |= 0x5;
+ break;
+ case SAMPLE_RATE_96000:
+ rate |= 0x6;
+ break;
+ case SAMPLE_RATE_11025:
+ rate |= 0x7;
+ break;
+ case SAMPLE_RATE_22050:
+ rate |= 0x8;
+ break;
+ case SAMPLE_RATE_44100:
+ rate |= 0x9;
+ break;
+ case SAMPLE_RATE_88200:
+ rate |= 0xa;
+ break;
+ default:
+ printk(KERN_INFO "sample rate set failed!\n");
+ return -EINVAL;
+ }
+ ce156_write(codec, CE156_ADC_RATE, rate);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(ce156_set_sample_rate);
+
+/* DAPM Widget Events */
+
+static int ce156_mixer_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+ u8 val;
+
+ switch (event) {
+ case SND_SOC_DAPM_POST_PMU:
+ pr_debug("after power up!\n");
+ val = ce156_read(codec,CE156_ADC_ANA_ENABLE);
+ if((val & 0xc0) == 0x40)
+ ce156_write(codec, CE156_ADC_ANA_ENABLE, (val & 0xf7));
+ else if((val & 0xc0) == 0x80)
+ ce156_write(codec, CE156_ADC_ANA_ENABLE, (val & 0xfb));
+ else if((val & 0xc0) == 0xc0)
+ ce156_write(codec, CE156_ADC_ANA_ENABLE, (val & 0xcf));
+ break;
+
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+
+/*
+ * A lot registers are belong to RSYNC domain. It requires enabling RSYNC bit
+ * after updating these registers. Otherwise, these updated registers won't
+ * be effective.
+ */
+static int ce156_rsync_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+
+ /*
+ * In order to avoid current on the load, mute power-on and power-off
+ * should be transients.
+ * Unmute by DAC_MUTE. It should be unmuted when DAPM sequence is
+ * finished.
+ */
+ ce156_write(codec, CE156_DAC_ANA_MISC, 0xa4);
+ ce156_write(codec, CE156_DAC_ANA_MISC, 0xa0);
+
+ return 0;
+}
+
+
+static const char * ce156_mic1mux_source_sel[] = {
+ "MIC1 SE ON", "MIC1 DIFF ON", "MIC1 OFF", "MIC1 DIFF ON"
+};
+
+static const char * ce156_mic2mux_source_sel[] = {
+ "MIC2 SE ON", "MIC2 OFF", "MIC2 DIFF ON", "MIC2 DIFF ON"
+};
+
+static const char * ce156_linelmux_source_sel[] = {
+ "LINEIN L ON", "LINEIN L ON", "LINEIN L ON", "LINEIN L OFF"
+};
+
+static const char * ce156_linermux_source_sel[] = {
+ "LINEIN R ON", "LINEIN R ON", "LINEIN R ON", "LINEIN R OFF"
+};
+
+static const char * ce156_adclmux_source_sel[] = {
+ "left modulator data", "right modulator data"
+};
+
+static const char * ce156_adcrmux_source_sel[] = {
+ "right modulator data", "left modulator data"
+};
+
+static const char * ce156_adcmixer_source_sel[] = {
+ "(L+R)/2", "(L-R)/2"
+};
+
+static const char * ce156_adc1_output_mux_source_sel[] = {
+ "left adc channel", "adc mixer output"
+};
+
+static const char * ce156_adc2_output_mux_source_sel[] = {
+ "right adc channel", "adc mixer output"
+};
+
+static const char * ce156_hplmux_source_sel[] = {
+ "no input", "right channel", "left channel", "no input"
+};
+
+static const char * ce156_hprmux_source_sel[] = {
+ "no input", "right channel", "left channel", "no input"
+};
+
+static const char * ce156_spk1mux_source_sel[] = {
+ "no input", "right channel", "left channel", "left + right"
+};
+
+static const char * ce156_spk2mux_source_sel[] = {
+ "no input", "right channel", "left channel", "reserved"
+};
+
+static const char * ce156_hs1mux_source_sel[] = {
+ "DAC stream input", "analog left mixer input"
+};
+
+static const char * ce156_hs2mux_source_sel[] = {
+ "DAC stream input", "analog right mixer input"
+};
+
+
+static const struct soc_enum mic1mux_source =
+ SOC_ENUM_SINGLE(CE156_ADC_ANA_ENABLE, 6, 4, ce156_mic1mux_source_sel);
+
+static const struct soc_enum mic2mux_source =
+ SOC_ENUM_SINGLE(CE156_ADC_ANA_ENABLE, 6, 4, ce156_mic2mux_source_sel);
+
+static const struct soc_enum linelmux_source =
+ SOC_ENUM_SINGLE(CE156_ADC_ANA_ENABLE, 6, 4, ce156_linelmux_source_sel);
+
+static const struct soc_enum linermux_source =
+ SOC_ENUM_SINGLE(CE156_ADC_ANA_ENABLE, 6, 4, ce156_linermux_source_sel);
+
+static const struct soc_enum adc_lsel_mux_source =
+ SOC_ENUM_SINGLE(CE156_ADC_PATH, 3, 2, ce156_adclmux_source_sel);
+
+static const struct soc_enum adc_rsel_mux_source =
+ SOC_ENUM_SINGLE(CE156_ADC_PATH, 2, 2, ce156_adcrmux_source_sel);
+
+static const struct soc_enum adc_mixer_mux_source =
+ SOC_ENUM_SINGLE(CE156_ADC_PATH, 6, 2, ce156_adcmixer_source_sel);
+
+static const struct soc_enum adc1_output_mux_source =
+ SOC_ENUM_SINGLE(CE156_ADC_PATH, 7, 2, ce156_adc1_output_mux_source_sel);
+
+static const struct soc_enum adc2_output_mux_source =
+ SOC_ENUM_SINGLE(CE156_ADC_PATH, 7, 2, ce156_adc2_output_mux_source_sel);
+
+static const struct soc_enum hp_lsel_mux_source =
+ SOC_ENUM_SINGLE(CE156_HS_INPUT_SEL, 0, 4, ce156_hplmux_source_sel);
+
+static const struct soc_enum hp_rsel_mux_source =
+ SOC_ENUM_SINGLE(CE156_HS_INPUT_SEL, 2, 4, ce156_hprmux_source_sel);
+
+static const struct soc_enum spk_1sel_mux_source =
+ SOC_ENUM_SINGLE(CE156_SPK_INPUT_SEL, 0, 4, ce156_spk1mux_source_sel);
+
+static const struct soc_enum spk_2sel_mux_source =
+ SOC_ENUM_SINGLE(CE156_SPK_INPUT_SEL, 2, 4, ce156_spk2mux_source_sel);
+
+static const struct soc_enum hs_1sel_mux_source =
+ SOC_ENUM_SINGLE(CE156_ANALOG_PATH_SEL, 0, 2, ce156_hs1mux_source_sel);
+
+static const struct soc_enum hs_2sel_mux_source =
+ SOC_ENUM_SINGLE(CE156_ANALOG_PATH_SEL, 1, 2, ce156_hs2mux_source_sel);
+
+
+static const struct snd_kcontrol_new ce156_mic1_mux_controls =
+ SOC_DAPM_ENUM("Route", mic1mux_source);
+
+static const struct snd_kcontrol_new ce156_mic2_mux_controls =
+ SOC_DAPM_ENUM("Route", mic2mux_source);
+
+static const struct snd_kcontrol_new ce156_line_l_mux_controls =
+ SOC_DAPM_ENUM("Route", linelmux_source);
+
+static const struct snd_kcontrol_new ce156_line_r_mux_controls =
+ SOC_DAPM_ENUM("Route", linermux_source);
+
+static const struct snd_kcontrol_new ce156_adc_lsel_mux_controls =
+ SOC_DAPM_ENUM("Route", adc_lsel_mux_source);
+
+static const struct snd_kcontrol_new ce156_adc_rsel_mux_controls =
+ SOC_DAPM_ENUM("Route", adc_rsel_mux_source);
+
+static const struct snd_kcontrol_new ce156_adc_mixer_mux_controls =
+ SOC_DAPM_ENUM("Route", adc_mixer_mux_source);
+
+static const struct snd_kcontrol_new ce156_adc1_output_mux_controls =
+ SOC_DAPM_ENUM("Route", adc1_output_mux_source);
+
+static const struct snd_kcontrol_new ce156_adc2_output_mux_controls =
+ SOC_DAPM_ENUM("Route", adc2_output_mux_source);
+
+static const struct snd_kcontrol_new ce156_hp_lsel_mux_controls =
+ SOC_DAPM_ENUM("Route", hp_lsel_mux_source);
+
+static const struct snd_kcontrol_new ce156_hp_rsel_mux_controls =
+ SOC_DAPM_ENUM("Route", hp_rsel_mux_source);
+
+static const struct snd_kcontrol_new ce156_spk_1sel_mux_controls =
+ SOC_DAPM_ENUM("Route", spk_1sel_mux_source);
+
+static const struct snd_kcontrol_new ce156_spk_2sel_mux_controls =
+ SOC_DAPM_ENUM("Route", spk_2sel_mux_source);
+
+static const struct snd_kcontrol_new ce156_hs_1sel_mux_controls =
+ SOC_DAPM_ENUM("Route", hs_1sel_mux_source);
+
+static const struct snd_kcontrol_new ce156_hs_2sel_mux_controls =
+ SOC_DAPM_ENUM("Route", hs_2sel_mux_source);
+
+static const unsigned int mic_pga_tlv[] = {
+ TLV_DB_RANGE_HEAD(8),
+ 0, 5, TLV_DB_SCALE_ITEM(0, 100, 0),
+ 6, 7, TLV_DB_SCALE_ITEM(500, 0, 0),
+ 8, 13, TLV_DB_SCALE_ITEM(600, 100, 0),
+ 14, 15, TLV_DB_SCALE_ITEM(1100, 0, 0),
+ 16, 21, TLV_DB_SCALE_ITEM(-600, 100, 0),
+ 22, 23, TLV_DB_SCALE_ITEM(-100, 0, 0),
+ 24, 29, TLV_DB_SCALE_ITEM(1200, 100, 0),
+ 30, 31, TLV_DB_SCALE_ITEM(1700, 0, 0),
+};
+
+static const unsigned int adc_pga_tlv[] = {
+ TLV_DB_RANGE_HEAD(8),
+ 0, 5, TLV_DB_SCALE_ITEM(0, 100, 0),
+ 6, 7, TLV_DB_SCALE_ITEM(500, 0, 0),
+ 8, 13, TLV_DB_SCALE_ITEM(600, 100, 0),
+ 14, 15, TLV_DB_SCALE_ITEM(1100, 0, 0),
+ 16, 21, TLV_DB_SCALE_ITEM(-600, 100, 0),
+ 22, 23, TLV_DB_SCALE_ITEM(-100, 0, 0),
+ 24, 29, TLV_DB_SCALE_ITEM(1200, 100, 0),
+ 30, 31, TLV_DB_SCALE_ITEM(1700, 0, 0),
+};
+
+/* mute(-1), 0, 3, 6, 7.66, 9.54, 10.66, 12.89 db*/
+static const unsigned int hs_gain_tlv[] = {
+ TLV_DB_RANGE_HEAD(8),
+ 0, 0, TLV_DB_SCALE_ITEM(-100, 0, 1),
+ 1, 1, TLV_DB_SCALE_ITEM(600, 0, 0),
+ 2, 2, TLV_DB_SCALE_ITEM(300, 0, 0),
+ 3, 3, TLV_DB_SCALE_ITEM(1066, 0, 0),
+ 4, 4, TLV_DB_SCALE_ITEM(0, 0, 0),
+ 5, 5, TLV_DB_SCALE_ITEM(954, 0, 0),
+ 6, 6, TLV_DB_SCALE_ITEM(766, 0, 0),
+ 7, 7, TLV_DB_SCALE_ITEM(1289, 0, 0),
+};
+
+/* mute(-1), 0, 3, 6, 7.66, 9.54, 10.66, 12.89 db*/
+static const unsigned int spk_gain_tlv[] = {
+ TLV_DB_RANGE_HEAD(8),
+ 0, 0, TLV_DB_SCALE_ITEM(-100, 0, 1),
+ 1, 1, TLV_DB_SCALE_ITEM(600, 0, 0),
+ 2, 2, TLV_DB_SCALE_ITEM(300, 0, 0),
+ 3, 3, TLV_DB_SCALE_ITEM(1066, 0, 0),
+ 4, 4, TLV_DB_SCALE_ITEM(0, 0, 0),
+ 5, 5, TLV_DB_SCALE_ITEM(954, 0, 0),
+ 6, 6, TLV_DB_SCALE_ITEM(766, 0, 0),
+ 7, 7, TLV_DB_SCALE_ITEM(1289, 0, 0),
+};
+
+static const unsigned int dac_gain_tlv[] = {
+ TLV_DB_RANGE_HEAD(1),
+ 0, 63, TLV_DB_SCALE_ITEM(-9450, 150, 1),
+};
+
+static const struct snd_kcontrol_new ce156_snd_controls[] = {
+ SOC_SINGLE_TLV("MIC1 PGA Volume", CE156_MIC1_PGA_GAIN, 0, 31, 0, mic_pga_tlv),
+ SOC_SINGLE_TLV("MIC2 PGA Volume", CE156_MIC2_PGA_GAIN, 0, 31, 0, mic_pga_tlv),
+ SOC_SINGLE_TLV("Linein1 PGA Volume", CE156_ADC1_PGA_GAIN, 0, 31, 0, adc_pga_tlv),
+ SOC_SINGLE_TLV("Linein2 PGA Volume", CE156_ADC2_PGA_GAIN, 0, 31, 0, adc_pga_tlv),
+ SOC_SINGLE_TLV("HS1 Gain Volume", CE156_DAC_HS1_CTRL, 0, 7, 0, hs_gain_tlv),
+ SOC_SINGLE_TLV("HS2 Gain Volume", CE156_DAC_HS2_CTRL, 0, 7, 0, hs_gain_tlv),
+ SOC_SINGLE_TLV("SPK1 Gain Volume", CE156_DAC_SPKR_CTRL, 0, 7, 0, spk_gain_tlv),
+ SOC_SINGLE_TLV("SPK2 Gain Volume", CE156_DAC_SPKR_CTRL, 3, 7, 0, spk_gain_tlv),
+ SOC_SINGLE_TLV("DAC LL GAIN Volume", CE156_DAC_GAINLL, 0, 63, 1, dac_gain_tlv),
+ SOC_SINGLE_TLV("DAC RR GAIN Volume", CE156_DAC_GAINRR, 0, 63, 1, dac_gain_tlv),
+};
+
+static const struct snd_soc_dapm_widget ce156_dapm_widgets[] = {
+ SND_SOC_DAPM_INPUT("MIC1P"),
+ SND_SOC_DAPM_INPUT("MIC2P"),
+ SND_SOC_DAPM_INPUT("MIC1N"),
+ SND_SOC_DAPM_INPUT("MIC2N"),
+ SND_SOC_DAPM_INPUT("LINEL"),
+ SND_SOC_DAPM_INPUT("LINER"),
+
+ SND_SOC_DAPM_MIXER("MIC1 Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_MIXER("MIC2 Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
+
+ SND_SOC_DAPM_MUX("MIC1 Mux", SND_SOC_NOPM, 0, 0, &ce156_mic1_mux_controls),
+ SND_SOC_DAPM_MUX("MIC2 Mux", SND_SOC_NOPM, 0, 0, &ce156_mic2_mux_controls),
+ SND_SOC_DAPM_MUX("Line L Mux", SND_SOC_NOPM, 0, 0, &ce156_line_l_mux_controls),
+ SND_SOC_DAPM_MUX("Line R Mux", SND_SOC_NOPM, 0, 0, &ce156_line_r_mux_controls),
+
+
+ SND_SOC_DAPM_PGA("MIC1 GAIN", CE156_MIC1_PGA_GAIN, 5, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("MIC2 GAIN", CE156_MIC2_PGA_GAIN, 5, 0, NULL, 0),
+
+ SND_SOC_DAPM_PGA("MIC PGA1", CE156_ADC_ANA_ENABLE, 2, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("MIC PGA2", CE156_ADC_ANA_ENABLE, 3, 0, NULL, 0),
+
+ SND_SOC_DAPM_PGA("Line PGA1", CE156_ADC_ANA_ENABLE, 4, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Line PGA2", CE156_ADC_ANA_ENABLE, 5, 0, NULL, 0),
+
+ /* need to be fixed here */
+ SND_SOC_DAPM_MIXER_E("Left in Mixer", SND_SOC_NOPM, 0, 0, NULL, 0,
+ ce156_mixer_event, SND_SOC_DAPM_POST_PMU),
+ SND_SOC_DAPM_MIXER_E("Right in Mixer", SND_SOC_NOPM, 0, 0, NULL, 0,
+ ce156_mixer_event, SND_SOC_DAPM_POST_PMU),
+
+ SND_SOC_DAPM_PGA("ADC Modulator1", CE156_ADC_ANA_ENABLE, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("ADC Modulator2", CE156_ADC_ANA_ENABLE, 1, 0, NULL, 0),
+
+ SND_SOC_DAPM_MUX("Left ADC channel", SND_SOC_NOPM, 0, 0, &ce156_adc_lsel_mux_controls),
+ SND_SOC_DAPM_MUX("Right ADC channel", SND_SOC_NOPM, 0, 0, &ce156_adc_rsel_mux_controls),
+
+ SND_SOC_DAPM_MUX("ADC Mixer", SND_SOC_NOPM, 0, 0, &ce156_adc_mixer_mux_controls),
+
+ SND_SOC_DAPM_MUX("ADC1 output", SND_SOC_NOPM, 0, 0, &ce156_adc1_output_mux_controls),
+ SND_SOC_DAPM_MUX("ADC2 output", SND_SOC_NOPM, 0, 0, &ce156_adc2_output_mux_controls),
+
+ SND_SOC_DAPM_DAC("Left DAC", "Playback DAC", SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_DAC("Right DAC", "Playback DAC", SND_SOC_NOPM, 0, 0),
+
+ SND_SOC_DAPM_PGA("DAC Modulator", CE156_DAC_DIG_ENABLE, 3, 0, NULL, 0),
+
+ SND_SOC_DAPM_PGA("Left DAC DIG", CE156_DAC_DIG_ENABLE, 5, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Right DAC DIG", CE156_DAC_DIG_ENABLE, 4, 0, NULL, 0),
+
+
+ SND_SOC_DAPM_MUX("HP L Mux", SND_SOC_NOPM, 0, 0, &ce156_hp_lsel_mux_controls),
+ SND_SOC_DAPM_MUX("HP R Mux", SND_SOC_NOPM, 0, 0, &ce156_hp_rsel_mux_controls),
+ SND_SOC_DAPM_MUX("SPK1 Mux", SND_SOC_NOPM, 0, 0, &ce156_spk_1sel_mux_controls),
+ SND_SOC_DAPM_MUX("SPK2 Mux", SND_SOC_NOPM, 0, 0, &ce156_spk_2sel_mux_controls),
+
+ SND_SOC_DAPM_MUX("HS1 Mux", SND_SOC_NOPM, 0, 0, &ce156_hs_1sel_mux_controls),
+ SND_SOC_DAPM_MUX("HS2 Mux", SND_SOC_NOPM, 0, 0, &ce156_hs_2sel_mux_controls),
+
+ SND_SOC_DAPM_PGA("HS1 PGA", CE156_DAC_ANA_ENABLE, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("HS2 PGA", CE156_DAC_ANA_ENABLE, 1, 0, NULL, 0),
+
+ SND_SOC_DAPM_PGA("SPK1 PGA", CE156_DAC_ANA_ENABLE, 5, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("SPK2 PGA", CE156_DAC_ANA_ENABLE, 6, 0, NULL, 0),
+
+ SND_SOC_DAPM_OUTPUT("SPKLP"),
+ SND_SOC_DAPM_OUTPUT("SPKLN"),
+ SND_SOC_DAPM_OUTPUT("SPKRP"),
+ SND_SOC_DAPM_OUTPUT("SPKRN"),
+ SND_SOC_DAPM_OUTPUT("HPL"),
+ SND_SOC_DAPM_OUTPUT("HPR"),
+
+ CE156_DAPM_OUTPUT("RSYNC", ce156_rsync_event),
+};
+
+static const struct snd_soc_dapm_route audio_map[] = {
+ /* mic1 mic2 linel liner mux */
+ {"MIC1 Mixer", NULL, "MIC1P"},
+ {"MIC1 Mixer", NULL, "MIC1N"},
+ {"MIC2 Mixer", NULL, "MIC2P"},
+ {"MIC2 Mixer", NULL, "MIC2N"},
+
+ {"MIC1 Mux", "MIC1 SE ON", "MIC1P"},
+ {"MIC1 Mux", "MIC1 DIFF ON", "MIC1 Mixer"},
+ {"MIC2 Mux", "MIC2 SE ON", "MIC2P"},
+ {"MIC2 Mux", "MIC2 DIFF ON", "MIC2 Mixer"},
+
+ {"Line L Mux", "LINEIN L ON", "MIC1N"},
+ {"Line R Mux", "LINEIN R ON", "MIC2N"},
+
+ /* mic1 mic2 gain */
+ {"MIC1 GAIN", NULL, "MIC1 Mux"},
+ {"MIC2 GAIN", NULL, "MIC2 Mux"},
+
+ /* mic1 mic2 PGA */
+ {"MIC PGA1", NULL, "MIC1 GAIN"},
+ {"MIC PGA2", NULL, "MIC2 GAIN"},
+
+ /* linel liner PGA */
+ {"Line PGA1", NULL, "Line L Mux"},
+ {"Line PGA2", NULL, "Line R Mux"},
+
+ /* Left_Mixer */
+ {"Left in Mixer", NULL, "MIC PGA1"},
+ {"Left in Mixer", NULL, "Line PGA1"},
+ /* Right_Mixer */
+ {"Right in Mixer", NULL, "MIC PGA2"},
+ {"Right in Mixer", NULL, "Line PGA2"},
+
+ {"ADC Modulator1", NULL, "Left in Mixer"},
+ {"ADC Modulator2", NULL, "Right in Mixer"},
+
+ /* MUX4 */
+ {"Left ADC channel", "left modulator data", "ADC Modulator1"},
+ {"Left ADC channel", "right modulator data", "ADC Modulator2"},
+
+ /* MUX5 */
+ {"Right ADC channel", "left modulator data", "ADC Modulator1"},
+ {"Right ADC channel", "right modulator data", "ADC Modulator2"},
+
+ /* ADC MIXER */
+ {"ADC Mixer", "(L+R)/2", "Left ADC channel"},
+ {"ADC Mixer", "(L+R)/2", "Right ADC channel"},
+ {"ADC Mixer", "(L-R)/2", "Left ADC channel"},
+ {"ADC Mixer", "(L-R)/2", "Right ADC channel"},
+
+ /* MUX22 & MUX23 */
+ {"ADC1 output", "left adc channel", "Left ADC channel"},
+ {"ADC1 output", "adc mixer output", "ADC Mixer"},
+ {"ADC2 output", "right adc channel", "Right ADC channel"},
+ {"ADC2 output", "adc mixer output", "ADC Mixer"},
+
+ /* DAC in */
+ {"DAC Modulator", NULL, "Left DAC"},
+ {"DAC Modulator", NULL, "Right DAC"},
+
+ /* Left Right DAC Dig */
+ {"Left DAC DIG", NULL, "DAC Modulator"},
+ {"Right DAC DIG", NULL, "DAC Modulator"},
+
+ /* HP SPK Mux */
+ {"HP L Mux", "left channel", "Left DAC DIG"},
+ {"HP L Mux", "right channel", "Right DAC DIG"},
+ {"HP R Mux", "left channel", "Left DAC DIG"},
+ {"HP R Mux", "right channel", "Right DAC DIG"},
+ {"SPK1 Mux", "left channel", "Left DAC DIG"},
+ {"SPK1 Mux", "right channel", "Right DAC DIG"},
+ {"SPK1 Mux", "left + right", "Left DAC DIG"},
+ {"SPK1 Mux", "left + right", "Right DAC DIG"},
+ {"SPK2 Mux", "left channel", "Left DAC DIG"},
+ {"SPK2 Mux", "right channel", "Right DAC DIG"},
+
+ /* HS Mux */
+ {"HS1 Mux", "analog left mixer input", "Left in Mixer"},
+ {"HS1 Mux", "DAC stream input", "HP L Mux"},
+ {"HS2 Mux", "analog right mixer input", "Right in Mixer"},
+ {"HS2 Mux", "DAC stream input", "HP R Mux"},
+
+ /* HS PGA */
+ {"HS1 PGA", NULL, "HS1 Mux"},
+ {"HS2 PGA", NULL, "HS2 Mux"},
+
+ /* SPK PGA */
+ {"SPK1 PGA", NULL, "SPK1 Mux"},
+ {"SPK2 PGA", NULL, "SPK2 Mux"},
+
+ /* SYNC */
+ {"RSYNC", NULL, "HS1 PGA"},
+ {"RSYNC", NULL, "HS2 PGA"},
+ {"RSYNC", NULL, "SPK1 PGA"},
+ {"RSYNC", NULL, "SPK2 PGA"},
+
+ /* Output */
+ {"HPL", NULL, "RSYNC"},
+ {"HPR", NULL, "RSYNC"},
+ {"SPKLP", NULL, "RSYNC"},
+ {"SPKLN", NULL, "RSYNC"},
+ {"SPKRP", NULL, "RSYNC"},
+ {"SPKRN", NULL, "RSYNC"},
+};
+
+
+static int ce156_add_widgets(struct snd_soc_codec *codec)
+{
+ struct snd_soc_dapm_context *dapm = &codec->dapm;
+
+ snd_soc_dapm_new_controls(dapm, ce156_dapm_widgets,
+ ARRAY_SIZE(ce156_dapm_widgets));
+
+ snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
+
+ snd_soc_dapm_new_widgets(dapm);
+
+ return 0;
+}
+
+
+struct ce156_sample_rate_list {
+ u8 rate_i2s_pcm;
+ unsigned int rate;
+ unsigned int bclk;
+};
+
+static const struct ce156_sample_rate_list sample_rate_list[] = {
+ { 0x0, 8000, 672000},
+ { 0x1, 12000, 672000},
+ { 0x2, 16000, 1344000},
+ { 0x3, 24000, 1344000},
+ { 0x4, 32000, 2688000},
+ { 0x5, 48000, 2688000},
+ { 0x6, 96000, 8064000},
+ { 0x7, 11025, 705600},
+ { 0x8, 22050, 1411200},
+ { 0x9, 44100, 2822400},
+ { 0xa, 88200, 5644800},
+};
+
+static int ce156_get_coeff(unsigned int rate)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(sample_rate_list); i++) {
+ if (sample_rate_list[i].rate == rate)
+ return i;
+ }
+
+ return -EINVAL;
+}
+
+static int ce156_set_dai_pll(struct snd_soc_dai *codec_dai,
+ int pll_id, int source,
+ unsigned int freq_in,
+ unsigned int freq_out)
+{
+ struct snd_soc_codec *codec = codec_dai->codec;
+ u8 pll1 = 0, pll2 = 0;
+ u8 pll_fract1 = 0, pll_fract2 = 0, pll_fract3 = 0;
+ u8 pll_div_mclk = 0, pll_div_ref = 0, pll_div_fbc = 0;
+ u32 pll_fract = 0;
+
+ printk(KERN_INFO "enter %s\n", __func__);
+ printk(KERN_DEBUG "%s: freq_in = %d, freq_out = %d\n",
+ __func__, freq_in, freq_out);
+
+ switch(freq_in) {
+ case 13000000:
+ pll_div_mclk = 0x1;
+ pll_div_ref = 0x5;
+ pll_div_fbc = 0x0;
+ pll_fract = 0x08208;
+ break;
+ case 16934400:
+ pll_div_mclk = 0x2;
+ pll_div_ref = 0x0;
+ pll_div_fbc = 0x3;
+ pll_fract = 0x06666;
+ break;
+ case 18432000:
+ pll_div_mclk = 0x2;
+ pll_div_ref = 0x1;
+ pll_div_fbc = 0x2;
+ pll_fract = 0x02527;
+ break;
+ case 22579200:
+ pll_div_mclk = 0x2;
+ pll_div_ref = 0x3;
+ pll_div_fbc = 0x2;
+ pll_fract = 0x0;
+ break;
+ case 24576000:
+ pll_div_mclk = 0x2;
+ pll_div_ref = 0x4;
+ pll_div_fbc = 0x2;
+ pll_fract = 0x02b23;
+ break;
+ case 26000000:
+ pll_div_mclk = 0x2;
+ pll_div_ref = 0x5;
+ pll_div_fbc = 0x0;
+ pll_fract = 0x08208;
+ break;
+ case 38400000:
+ pll_div_mclk = 0x3;
+ pll_div_ref = 0x5;
+ pll_div_fbc = 0x0;
+ pll_fract = 0x17c18;
+ break;
+ default:
+ printk(KERN_WARNING "the input MCLK not supported\n");
+ return -EINVAL;
+ }
+ pll1 = (pll_div_mclk << 1) | (pll_div_ref << 5);
+ pll2 = pll_div_fbc;
+ pll_fract1 = pll_fract & 0xff;
+ pll_fract2 = (pll_fract >> 8) & 0xff;
+ pll_fract3 = (pll_fract >> 16) & 0xff;
+
+ ce156_write(codec, CE156_PLL1, pll1);
+ ce156_write(codec, CE156_PLL2, pll2);
+ ce156_write(codec, CE156_PLL_FRACT1, pll_fract1);
+ ce156_write(codec, CE156_PLL_FRACT2, pll_fract2);
+ ce156_write(codec, CE156_PLL_FRACT3, pll_fract3);
+
+ printk(KERN_INFO "exit %s, PLL1 = %x, PLL2 = %x, "
+ "FRAC1 = %x, FRAC2 = %x, FRAC3 = %x\n",
+ __func__, pll1, pll2, pll_fract1, pll_fract2, pll_fract3);
+ return 0;
+}
+
+static int ce156_set_dai_sysclk(struct snd_soc_dai * codec_dai,
+ int clk_id, unsigned int freq, int dir)
+{
+ //struct snd_soc_codec *codec = codec_dai->codec;
+ //struct ce156_priv *ce156 = codec->private_data;
+ printk(KERN_INFO "enter %s\nexit %s\n", __func__, __func__);
+ pr_debug("enter %s\n", __func__);
+ return 0;
+}
+
+static int ce156_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_codec *codec = rtd->codec;
+ //struct ce156_priv *ce156 = codec->private_data;
+
+ u8 iface = ce156_read_reg_cache(codec, CE156_I2S1) & 0xcf;
+ int rate = params_rate(params);
+ int coeff = ce156_get_coeff(rate);
+
+ printk(KERN_ERR "enter %s, rate is %d\n", __func__, rate);
+ /* bit size */
+ switch (params_format(params)) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ break;
+ case SNDRV_PCM_FORMAT_S20_3LE:
+ iface |= 0x10;
+ break;
+ case SNDRV_PCM_FORMAT_S24_LE:
+ iface |= 0x20;
+ break;
+ }
+
+ pr_info("rate = %d, iface = %d\n", rate, iface);
+ /* set iface */
+ snd_soc_write(codec, CE156_I2S1, iface);
+ snd_soc_write(codec, CE156_ADC_RATE, sample_rate_list[coeff].rate_i2s_pcm);
+
+ printk(KERN_INFO "exit %s\n", __func__);
+
+ return 0;
+}
+
+static int ce156_dev_init(struct snd_soc_codec *codec);
+
+static int ce156_set_dai_fmt(struct snd_soc_dai *codec_dai,
+ unsigned int fmt)
+{
+ struct snd_soc_codec *codec = codec_dai->codec;
+ u8 iface = 0;
+ int ret = 0;
+ printk(KERN_ERR "enter %s\n", __func__);
+
+ ret = ce156_dev_init(codec);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to init codec\n");
+ return ret;
+ }
+
+ /* set master/slave audio interface */
+ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBM_CFM:
+ iface |= 0x01;
+ break;
+ case SND_SOC_DAIFMT_CBS_CFS:
+ iface &= 0xfe;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ /* interface format */
+ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+ case SND_SOC_DAIFMT_I2S:
+ iface &= 0x3f;
+ break;
+ case SND_SOC_DAIFMT_RIGHT_J:
+ iface |= 0x40;
+ break;
+ case SND_SOC_DAIFMT_LEFT_J:
+ iface |= 0x80;
+ break;
+ case SND_SOC_DAIFMT_DSP_A:
+ iface |= 0xc0;
+ break;
+ case SND_SOC_DAIFMT_DSP_B:
+ iface |= 0xc2;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ /* clock inversion */
+ switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
+ case SND_SOC_DAIFMT_NB_NF:
+ iface &= 0xfb;
+ break;
+ case SND_SOC_DAIFMT_IB_IF:
+ iface |= 0x04;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ /* set iface */
+ pr_info("enter %s, iface = %d\n", __func__, iface);
+ snd_soc_write(codec, CE156_I2S1, iface);
+
+ printk(KERN_INFO "exit %s\n", __func__);
+ return ret;
+}
+
+static int ce156_mute_state = 1;
+
+static int ce156_mute(struct snd_soc_dai *dai, int mute)
+{
+ struct snd_soc_codec *codec = dai->codec;
+
+ u8 mute_reg = ce156_read_reg_cache(codec, CE156_DAC_DWA_OFST) & 0xff;
+
+ ce156_mute_state = mute;
+
+ if (mute) {
+ ce156_write(codec, CE156_DAC_ANA_ENABLE, 0x00);
+ ce156_write(codec, CE156_DAC_DWA_OFST, mute_reg | 0x44);
+
+ printk(KERN_INFO "start %s\n", __func__);
+ } else {
+ ce156_write(codec, CE156_DAC_DWA_OFST, mute_reg & 0xbb);
+ printk(KERN_INFO "stop %s\n", __func__);
+ }
+
+ ce156_sync(codec);
+
+ return 0;
+}
+
+#define CE156_RATES \
+ (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \
+ SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
+ SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
+
+#define CE156_FORMATS \
+ (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
+ SNDRV_PCM_FMTBIT_S24_LE)
+
+static struct snd_soc_dai_ops ce156_dai_ops= {
+ .hw_params = ce156_hw_params,
+ .digital_mute = ce156_mute,
+ .set_fmt = ce156_set_dai_fmt,
+ .set_sysclk = ce156_set_dai_sysclk,
+ .set_pll = ce156_set_dai_pll,
+};
+
+struct snd_soc_dai_driver ce156_dai = {
+ /* hifi codec dai */
+ .name = "CE156",
+ .id = 1,
+ .playback = {
+ .stream_name = "Playback",
+ .channels_min = 1,
+ .channels_max = 2,
+ .rates = CE156_RATES,
+ .formats = CE156_FORMATS,
+ },
+ .capture = {
+ .stream_name = "Capture",
+ .channels_min = 1,
+ .channels_max = 2,
+ .rates = CE156_RATES,
+ .formats = CE156_FORMATS,
+ },
+ .ops = &ce156_dai_ops,
+ .symmetric_rates = 1,
+};
+
+static int ce156_dev_init(struct snd_soc_codec *codec)
+{
+ int ret = 0;
+
+ ce156_reset(codec);
+ mdelay(10);
+
+ ce156_write(codec, CE156_PLL1, 0xA5);//a4 /* modify 0x83 to 0xA5 for audio output */
+ ce156_write(codec, CE156_PLL2, 0x00);//00 /* modify 0x02 t0 0x00 for audio output */
+ ce156_write(codec, CE156_PLL_FRACT1, 0x08); /* modify 0x27 t0 0x08 for audio output */
+ ce156_write(codec, CE156_PLL_FRACT2, 0x82); /* modify 0x25 to 0x82 for audio output */
+
+ ce156_write(codec, CE156_ADC_RATE, 0x9);
+ ce156_write(codec, CE156_I2S1, 0x0);
+ ce156_write(codec, CE156_I2S2, 0x0);
+ ce156_write(codec, CE156_ADC_RSVD, 0x2);
+ ce156_write(codec, CE156_ADC_ANA_ENABLE, 0x3f); /* modify 0xff to 0x3f for mic recording */
+ ce156_write(codec, CE156_ADC_DIG_ENABLE, 0x30);
+ ce156_write(codec, CE156_DAC_DIG_ENABLE, 0x39);
+ ce156_write(codec, CE156_DAC_ANA_MISC, 0xa4);
+ ce156_write(codec, CE156_DAC_ANA_MISC, 0xa0);
+ ce156_write(codec, CE156_HS_MIC_DET, 0x61); /* modify 0x00 to 0x61 for speaker and headphone audio output auto switch */
+ ce156_write(codec, CE156_MIC_CTRL, 0x2);
+ ce156_write(codec, CE156_DAC_ANA_ENABLE, 0x63);
+ ce156_write(codec, CE156_HS_INPUT_SEL, 0x6);
+ ce156_write(codec, CE156_DAC_DWA_OFST, 0x0);
+ ce156_write(codec, CE156_DAC_GAINLL, 0x0);
+ ce156_write(codec, CE156_DAC_GAINRR, 0x0);
+ ce156_write(codec, CE156_DAC_ANA_MISC, 0xa4);
+ ce156_write(codec, CE156_DAC_ANA_MISC, 0xa0);
+ ce156_write(codec, CE156_DAC_DWA, 0x40);/*by pass equalizer*/
+ ce156_reg_init(codec);
+ ce156_write(codec, CE156_STATUS2, 0x40);
+
+ printk(KERN_INFO "ce156 reg write finished\n");
+
+ ce156_dapm_event(codec, SND_SOC_BIAS_PREPARE);
+
+/* snd_soc_add_controls(codec, ce156_snd_controls,
+ ARRAY_SIZE(ce156_snd_controls));
+ printk(KERN_INFO "controls added finished\n");
+*/
+#if USE_DAPM_CTRL
+ ce156_add_widgets(codec);
+#endif
+
+ printk(KERN_INFO "ce156: initial ok\n");
+
+ return ret;
+
+}
+
+
+static int ce156_probe(struct snd_soc_codec *codec)
+{
+ struct ce156_private *ce156_priv = snd_soc_codec_get_drvdata(codec);
+ int ret = 0;
+
+ codec->control_data = ce156_priv->control_data;
+
+ /*ret = snd_soc_codec_set_cache_io(codec, 7, 8, ce156_priv->control_type);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
+ return ret;
+ }*/
+
+ /*ret = ce156_dev_init(codec);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to reset\n");
+ return ret;
+ }*/
+
+ return ret;
+}
+
+static int ce156_remove(struct snd_soc_codec *codec)
+{
+ ce156_dapm_event(codec, SND_SOC_BIAS_OFF);
+
+ return 0;
+}
+
+static int ce156_suspend(struct snd_soc_codec *codec, pm_message_t state)
+{
+
+ ce156_dapm_event(codec, SND_SOC_BIAS_OFF);
+
+ return 0;
+}
+
+static int ce156_resume(struct snd_soc_codec *codec)
+{
+
+ ce156_dapm_event(codec, SND_SOC_BIAS_STANDBY);
+
+ return 0;
+}
+
+
+struct snd_soc_codec_driver soc_codec_dev_ce156 = {
+ .probe = ce156_probe,
+ .remove = ce156_remove,
+ .suspend = ce156_suspend,
+ .resume = ce156_resume,
+ .read = ce156_read,
+ .write = ce156_write,
+ .set_bias_level = ce156_dapm_event,
+ .reg_cache_size = ARRAY_SIZE(ce156_reg),
+ .reg_cache_step = 1,
+ .reg_word_size = sizeof(u8),
+ .reg_cache_default = ce156_reg,
+};
+
+static int ce156_i2c_probe(struct i2c_client *i2c,
+ const struct i2c_device_id *id)
+{
+ struct ce156_private *ce156_priv;
+ int ret;
+
+ printk(KERN_INFO "CE156: register i2c driver successfully\n");
+
+ ce156_priv = kzalloc(sizeof(struct ce156_private), GFP_KERNEL);
+ if (ce156_priv == NULL)
+ return -ENOMEM;
+
+ i2c_set_clientdata(i2c, ce156_priv);
+ ce156_priv->control_type = SND_SOC_I2C;
+ ce156_priv->control_data = i2c;
+
+ ret = snd_soc_register_codec(&i2c->dev,
+ &soc_codec_dev_ce156, &ce156_dai, 1);
+
+ if (ret) {
+ printk(KERN_INFO "CE156: Failed to register codec\n");
+ goto out;
+ }
+
+ return ret;
+
+out:
+ kfree(ce156_priv);
+ return -EINVAL;
+}
+
+
+static int ce156_i2c_remove(struct i2c_client *client)
+{
+ snd_soc_unregister_codec(&client->dev);
+ kfree(i2c_get_clientdata(client));
+ return 0;
+}
+
+static const struct i2c_device_id ce156_i2c_id[] = {
+ {"ce156", 0},
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, ce156_i2c_id);
+
+static struct i2c_driver ce156_i2c_driver = {
+ .driver = {
+ .name = "ce156",
+ .owner = THIS_MODULE,
+ },
+ .probe = ce156_i2c_probe,
+ .remove = __devexit_p(ce156_i2c_remove),
+ .id_table = ce156_i2c_id,
+};
+
+static int __init ce156_init(void)
+{
+ int ret = 0;
+printk("paul init and register ce156 i2c driver:\n");
+
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+ ret = i2c_add_driver(&ce156_i2c_driver);
+// ret = platform_driver_register(&ce156_i2c_driver); //test
+ if(ret != 0){
+ printk( "Failed to register ce156 i2c driver: %d\n",
+ ret);
+ }
+#endif
+ return ret;
+}
+
+static void __exit ce156_exit(void)
+{
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+ i2c_del_driver(&ce156_i2c_driver);
+#endif
+}
+
+module_init(ce156_init);
+module_exit(ce156_exit);
+
+MODULE_DESCRIPTION("ASoc Marvell 88CE156 driver");
+MODULE_AUTHOR("Paul.Chen <paul.chen@wtmec.com>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:ce156.2-0030");
diff --git a/sound/soc/codecs/88ce156-codec.h b/sound/soc/codecs/88ce156-codec.h
new file mode 100755
index 00000000000000..cb3805f31b639f
--- /dev/null
+++ b/sound/soc/codecs/88ce156-codec.h
@@ -0,0 +1,82 @@
+/*
+ * 88ce156.h -- audio driver for 88ce156
+ *
+ * Copyright 2011 Marvell International Ltd.
+ *
+ * All right reserved
+ *
+ */
+
+#ifndef _CE156_H
+#define _CE156_H
+
+#define ce156_CACHEREGNUM 72
+#define CE156_RESET 0x0 // ?
+
+#define CE156_ADC_PATH 0x00 /* Configuration parameters for ADC audio path */
+#define CE156_ADC_RATE 0x01 /* Configuration parameters for ADC and DAC audio path */
+#define CE156_ADCL_ATTN 0x02 /* Left channel ADC attenuation control */
+#define CE156_ADCR_ATTN 0x03 /* Right channel ADC attenuation control */
+#define CE156_CHARGEPUMP_REG 0x05 /* undocumented reg */
+#define CE156_I2S1 0x06 /* Configuration of i2S/PCM interface */
+#define CE156_I2S2 0x07 /* Configuration parameters for the I2S interface and DAC audio path */
+#define CE156_DAC_DWA 0x08
+#define CE156_DACEQUL_N0LO 0x09
+#define CE156_DACEQUL_N0HI 0x0A
+#define CE156_DACEQUL_N1LO 0x0B
+#define CE156_DACEQUL_N1HI 0x0C
+#define CE156_DACEQUL_D1LO 0x0D
+#define CE156_DACEQUL_D1HI 0x0E
+#define CE156_DAC_GAINLL 0x0F
+#define CE156_DAC_GAINRR 0x12
+#define CE156_DAC_DWA_OFST 0x13
+#define CE156_PLL1 0x18
+#define CE156_PLL2 0x19
+#define CE156_PLL_FRACT1 0x1A
+#define CE156_PLL_FRACT2 0x1B
+#define CE156_PLL_FRACT3 0x1C
+#define CE156_CLKGEN1 0x1D /* undocumented reg */
+#define CE156_CLKGEN2 0x1E
+#define CE156_MIC_CTRL 0x20
+#define CE156_MIC1_PGA_GAIN 0x21
+#define CE156_MIC2_PGA_GAIN 0x22
+#define CE156_ADC1_PGA_GAIN 0x23
+#define CE156_ADC2_PGA_GAIN 0x24
+#define CE156_ADC_RSVD 0x25 /* undocumented reg */
+#define CE156_ANALOG_PATH_SEL 0x26 /* Analog settings: analog to analog path */
+#define CE156_DAC_HS1_CTRL 0x27
+#define CE156_DAC_HS2_CTRL 0x28
+#define CE156_DAC_SPKR_CTRL 0x29
+#define CE156_DAC_ANA_MISC 0x2A
+#define CE156_AUD_PWR_ENABLE 0x2C
+#define CE156_ADC_ANA_ENABLE 0x2D
+#define CE156_ADC_DIG_ENABLE 0x2E
+#define CE156_DAC_ANA_ENABLE 0x2F
+#define CE156_DAC_DIG_ENABLE 0x30
+#define CE156_HS_INPUT_SEL 0x36
+#define CE156_SPK_INPUT_SEL 0x37
+#define CE156_HS_MIC_DET 0x38
+#define CE156_STATUS1 0x39
+#define CE156_STATUS2 0x3A
+#define CE156_REVISION 0x48
+#define CE156_CLKEN 0x49
+
+#define SAMPLE_RATE_8000 0
+#define SAMPLE_RATE_12000 1
+#define SAMPLE_RATE_16000 2
+#define SAMPLE_RATE_24000 3
+#define SAMPLE_RATE_32000 4
+#define SAMPLE_RATE_48000 5
+#define SAMPLE_RATE_96000 6
+#define SAMPLE_RATE_11025 7
+#define SAMPLE_RATE_22050 8
+#define SAMPLE_RATE_44100 9
+#define SAMPLE_RATE_88200 10
+
+/*struct ce156_setup_data {
+ int i2c_address;
+ int i2c_bus;
+ unsigned detect_hp_gpio;
+};*/
+
+#endif
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index 8a105c3ee29c75..556ca9ef3d3ae9 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -12,6 +12,7 @@ config SND_SOC_ALL_CODECS
tristate "Build all ASoC CODEC drivers"
select SND_SOC_88PM860X if MFD_88PM860X
select SND_SOC_88PM805 if MFD_88PM80X
+ select SND_SOC_88CE156 if SND_SOC_I2C_AND_SPI
select SND_SOC_L3
select SND_SOC_AC97_CODEC if SND_SOC_AC97_BUS
select SND_SOC_AD1836 if SPI_MASTER
@@ -114,6 +115,9 @@ config SND_SOC_88PM860X
config SND_SOC_88PM805
tristate
+config SND_SOC_88CE156
+ tristate
+
config SND_SOC_WM_HUBS
tristate
default y if SND_SOC_WM8993=y || SND_SOC_WM8994=y
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index 05814497e74096..b04c894dd32e12 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -1,5 +1,6 @@
snd-soc-88pm860x-objs := 88pm860x-codec.o
snd-soc-88pm805-objs := 88pm805-codec.o
+snd-soc-88ce156-objs := 88ce156-codec.o
snd-soc-ac97-objs := ac97.o
snd-soc-ad1836-objs := ad1836.o
snd-soc-ad193x-objs := ad193x.o
@@ -93,6 +94,7 @@ snd-soc-dummy-objs := dummy.o
obj-$(CONFIG_SND_SOC_88PM860X) += snd-soc-88pm860x.o
obj-$(CONFIG_SND_SOC_88PM805) += snd-soc-88pm805.o
+obj-$(CONFIG_SND_SOC_88CE156) += snd-soc-88ce156.o
obj-$(CONFIG_SND_SOC_AC97_CODEC) += snd-soc-ac97.o
obj-$(CONFIG_SND_SOC_AD1836) += snd-soc-ad1836.o
obj-$(CONFIG_SND_SOC_AD193X) += snd-soc-ad193x.o
diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig
index d36965af05e697..092059976c3ef8 100644
--- a/sound/soc/pxa/Kconfig
+++ b/sound/soc/pxa/Kconfig
@@ -355,8 +355,7 @@ config SND_MMP_SOC_MK2
config SND_MMP_SOC_QSEVEN
bool "SoC Audio support for MMP3 QSeven"
depends on SND_MMP_SOC && (MACH_QSEVEN) && SND_MMP_LEGACY_SOC
- select SND_SOC_WM8731
- select SND_SOC_HDMI
+ select SND_SOC_88CE156
help
Say Y if you want to add support for SoC audio on QSeven
diff --git a/sound/soc/pxa/qseven.c b/sound/soc/pxa/qseven.c
index f5264c3fd29571..6a204a7d8bb7bd 100644
--- a/sound/soc/pxa/qseven.c
+++ b/sound/soc/pxa/qseven.c
@@ -42,9 +42,11 @@
#include <mach/regs-mpmu.h>
#include <mach/regs-apmu.h>
+#if 0
#include <linux/mfd/wm8994/registers.h>
#include "../codecs/wm8994.h"
#include "../codecs/wm8731.h"
+#endif
#include "mmp2-squ.h"
#include "mmp2-sspa.h"
#include <linux/delay.h>
@@ -55,7 +57,7 @@
#define MMP3ASOC_HS_MIC_FUNC 1
#define MMP3ASOC_SPK_FUNC 2
#define MMP3ASOC_MAIN_MIC_FUNC 3
-#define MMP3ASOC_JACK_FUNC 4
+//#define MMP3ASOC_JACK_FUNC 4
#define MMP3ASOC_CTRL_ON 0
#define MMP3ASOC_CTRL_OFF 1
@@ -71,15 +73,31 @@ static void mmp3asoc_ext_control(struct snd_soc_dapm_context *dapm, int func)
switch (func) {
case MMP3ASOC_HEADPHONE_FUNC:
if (mmp3asoc_headphone_func == MMP3ASOC_CTRL_ON)
- snd_soc_dapm_enable_pin(dapm, "Headphone Jack");
+ snd_soc_dapm_enable_pin(dapm, "Headset Stereophone");
else
- snd_soc_dapm_disable_pin(dapm, "Headphone Jack");
+ snd_soc_dapm_disable_pin(dapm, "Headset Stereophone");
break;
case MMP3ASOC_HS_MIC_FUNC:
if (mmp3asoc_hs_mic_func == MMP3ASOC_CTRL_ON)
- snd_soc_dapm_enable_pin(dapm, "Headset Jack");
+ snd_soc_dapm_enable_pin(dapm, "Headset Mic 2");
else
- snd_soc_dapm_disable_pin(dapm, "Headset Jack");
+ snd_soc_dapm_disable_pin(dapm, "Headset Mic 2");
+ break;
+ case MMP3ASOC_SPK_FUNC:
+ if (mmp3asoc_spk_func == MMP3ASOC_CTRL_ON) {
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk");
+ } else {
+ snd_soc_dapm_disable_pin(dapm, "Ext Spk");
+ }
+ break;
+ case MMP3ASOC_MAIN_MIC_FUNC:
+ if (mmp3asoc_main_mic_func == MMP3ASOC_CTRL_ON) {
+ snd_soc_dapm_enable_pin(dapm, "Ext Mic 1");
+ snd_soc_dapm_enable_pin(dapm, "Ext Mic 3");
+ } else {
+ snd_soc_dapm_disable_pin(dapm, "Ext Mic 1");
+ snd_soc_dapm_disable_pin(dapm, "Ext Mic 3");
+ }
break;
default:
pr_err("wrong func type\n");
@@ -217,31 +235,40 @@ static int mmp3asoc_set_main_mic(struct snd_kcontrol *kcontrol,
}
static const struct snd_soc_dapm_widget mmp3asoc_dapm_widgets[] = {
- SND_SOC_DAPM_SPK("Ext Left Spk", NULL),
- SND_SOC_DAPM_SPK("Ext Right Spk", NULL),
- SND_SOC_DAPM_HP("Headset Stereophone", NULL),
+ SND_SOC_DAPM_HP("Headphone Stereophone", NULL),
+ SND_SOC_DAPM_LINE("Lineout Out 1", NULL),
+ SND_SOC_DAPM_LINE("Lineout Out 2", NULL),
+ SND_SOC_DAPM_SPK("Ext Speaker", NULL),
+ SND_SOC_DAPM_MIC("Ext Mic 1", NULL),
SND_SOC_DAPM_MIC("Headset Mic", NULL),
- SND_SOC_DAPM_MIC("Main Mic", NULL),
+ SND_SOC_DAPM_MIC("Ext Mic 3", NULL),
};
static const struct snd_soc_dapm_route mmp3asoc_dapm_routes[] = {
- {"Ext Left Spk", NULL, "SPKOUTLP"},
- {"Ext Left Spk", NULL, "SPKOUTLN"},
+ {"Headset Stereophone", NULL, "HS1"},
+ {"Headset Stereophone", NULL, "HS2"},
+
+ {"Ext Speaker", NULL, "LSP"},
+ {"Ext Speaker", NULL, "LSN"},
- {"Ext Right Spk", NULL, "SPKOUTRP"},
- {"Ext Right Spk", NULL, "SPKOUTRN"},
+ {"Lineout Out 1", NULL, "LINEOUT1"},
+ {"Lineout Out 2", NULL, "LINEOUT2"},
- {"Headset Stereophone", NULL, "HPOUT1L"},
- {"Headset Stereophone", NULL, "HPOUT1R"},
+ {"MIC1P", NULL, "Mic1 Bias"},
+ {"MIC1N", NULL, "Mic1 Bias"},
+ {"Mic1 Bias", NULL, "Ext Mic 1"},
- {"IN1RN", NULL, "MICBIAS2"},
- {"MICBIAS2", NULL, "Headset Mic"},
+ {"MIC2P", NULL, "Mic1 Bias"},
+ {"MIC2N", NULL, "Mic1 Bias"},
+ {"Mic1 Bias", NULL, "Headset Mic 2"},
- {"IN1LP", NULL, "MICBIAS1"},
- {"IN1LN", NULL, "MICBIAS1"},
- {"MICBIAS1", NULL, "Main Mic"},
+ {"MIC3P", NULL, "Mic3 Bias"},
+ {"MIC3N", NULL, "Mic3 Bias"},
+ {"Mic3 Bias", NULL, "Ext Mic 3"},
};
+
+static const char *const jack_function[] = {"Headphone", "Mic", "Headset", "Off" };
static const char *headphone_function[] = {"On", "Off"};
static const char *hs_mic_function[] = {"On", "Off"};
static const char *spk_function[] = {"On", "Off"};
@@ -254,8 +281,7 @@ static const struct soc_enum mmp3asoc_enum[] = {
SOC_ENUM_SINGLE_EXT(2, main_mic_function),
};
-
-static const struct snd_kcontrol_new mmp3asoc_wm8994_controls[] = {
+static const struct snd_kcontrol_new mmp3asoc_elba_controls[] = {
SOC_ENUM_EXT("Headphone Function", mmp3asoc_enum[0],
mmp3asoc_get_headphone, mmp3asoc_set_headphone),
SOC_ENUM_EXT("Headset Mic Function", mmp3asoc_enum[1],
@@ -295,8 +321,6 @@ static const struct snd_soc_dapm_route qseven_audio_map[] = {
{"MICIN", NULL, "Line Jack"},*/
};
-static const char *jack_function[] = {"Headphone", "Mic", "Line", "Headset",
- "Off"};
static const struct soc_enum qseven_enum[] = {
SOC_ENUM_SINGLE_EXT(5, jack_function),
};
@@ -377,6 +401,7 @@ static void audio_subsystem_poweron(void)
udelay(1000);
}
+#if 0
static void audio_subsystem_poweroff(void)
{
/* enable isolation */
@@ -388,6 +413,7 @@ static void audio_subsystem_poweroff(void)
/* power off */
__raw_modify(APMU_AUDIO_CLK_RES_CTRL, 0x600, 0);
}
+#endif
static void audio_subsystem_pll_config(void)
{
@@ -418,6 +444,7 @@ static void audio_subsystem_pll_config(void)
}
+#if 0
static int codec_wm8731_init(struct snd_soc_pcm_runtime *rtd)
{
struct snd_soc_codec *codec = rtd->codec;
@@ -458,6 +485,90 @@ static int codec_wm8731_init(struct snd_soc_pcm_runtime *rtd)
return 0;
}
+#endif
+
+static int codec_elba_init(struct snd_soc_pcm_runtime *rtd)
+{
+ struct snd_soc_codec *codec = rtd->codec;
+ struct snd_soc_dapm_context *dapm = &codec->dapm;
+ int err;
+
+ audio_subsystem_poweron();
+ /* currently the audio pll of mmp3 a0 stepping is not working */
+ audio_subsystem_pll_config();
+
+ /* Open elba speaker power for ThunderstoneM,
+ recently, other platform need not */
+#if 0
+ if (machine_is_thunderstone()) {
+ v_5v = regulator_get(NULL, "V_5V");
+ if (IS_ERR(v_5v)) {
+ pr_err("%s fail to get regulator V_5V speaker\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ regulator_enable(v_5v);
+ }
+#endif
+
+ /* Add mmp3asoc specific controls */
+ err = snd_soc_add_controls(codec, mmp3asoc_elba_controls,
+ ARRAY_SIZE(mmp3asoc_elba_controls));
+ if (err < 0)
+ return err;
+
+ /* add mmp3asoc specific widgets */
+ snd_soc_dapm_new_controls(dapm, mmp3asoc_dapm_widgets,
+ ARRAY_SIZE(mmp3asoc_dapm_widgets));
+
+ /* set up mmp3asoc specific audio routes */
+ snd_soc_dapm_add_routes(dapm, mmp3asoc_dapm_routes,
+ ARRAY_SIZE(mmp3asoc_dapm_routes));
+
+#if 0
+ snd_soc_dapm_enable_pin(dapm, "Ext Speaker");
+ snd_soc_dapm_enable_pin(dapm, "Ext Mic 1");
+ snd_soc_dapm_enable_pin(dapm, "Ext Mic 3");
+ snd_soc_dapm_disable_pin(dapm, "Headset Mic 2");
+ snd_soc_dapm_disable_pin(dapm, "Headset Stereophone");
+
+ /* set endpoints to not connected */
+ snd_soc_dapm_nc_pin(dapm, "AUX1");
+ snd_soc_dapm_nc_pin(dapm, "AUX2");
+ snd_soc_dapm_nc_pin(dapm, "MIC1P");
+ snd_soc_dapm_nc_pin(dapm, "MIC1N");
+ snd_soc_dapm_nc_pin(dapm, "MIC2P");
+ snd_soc_dapm_nc_pin(dapm, "MIC2N");
+ snd_soc_dapm_nc_pin(dapm, "MIC3P");
+ snd_soc_dapm_nc_pin(dapm, "MIC3N");
+
+ /* output widget */
+ snd_soc_dapm_nc_pin(dapm, "HS1");
+ snd_soc_dapm_nc_pin(dapm, "HS2");
+ snd_soc_dapm_nc_pin(dapm, "LINEOUT1");
+ snd_soc_dapm_nc_pin(dapm, "LINEOUT2");
+ snd_soc_dapm_nc_pin(dapm, "EARP");
+ snd_soc_dapm_nc_pin(dapm, "EARN");
+ snd_soc_dapm_nc_pin(dapm, "LSP");
+ snd_soc_dapm_nc_pin(dapm, "LSN");
+
+
+ mutex_lock(&codec->mutex);
+ mmp3asoc_headphone_func = MMP3ASOC_CTRL_OFF;
+ mmp3asoc_hs_mic_func = MMP3ASOC_CTRL_OFF;
+ mmp3asoc_spk_func = MMP3ASOC_CTRL_OFF;
+ mmp3asoc_main_mic_func = MMP3ASOC_CTRL_OFF;
+ mmp3asoc_ext_control(dapm, MMP3ASOC_HEADPHONE_FUNC);
+ mmp3asoc_ext_control(dapm, MMP3ASOC_HS_MIC_FUNC);
+ mmp3asoc_ext_control(dapm, MMP3ASOC_SPK_FUNC);
+ mmp3asoc_ext_control(dapm, MMP3ASOC_MAIN_MIC_FUNC);
+ snd_soc_dapm_sync(dapm);
+ mutex_unlock(&codec->mutex);
+#endif
+ return 0;
+}
+
static int mmp3asoc_probe(struct snd_soc_card *card)
{
@@ -546,6 +657,8 @@ static int mmp3asoc_hdmi_hw_params(struct snd_pcm_substream *substream,
return 0;
}
+
+#if 0
static int mmp3asoc_wm8731_startup(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
@@ -571,7 +684,6 @@ static int mmp3asoc_wm8731_startup(struct snd_pcm_substream *substream)
return 0;
}
-
static int mmp3asoc_wm8731_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
@@ -635,7 +747,6 @@ static int mmp3asoc_wm8731_hw_params(struct snd_pcm_substream *substream,
default:
break;
}
-
/* set the codec system clock for DAC and ADC */
snd_soc_dai_set_pll(cpu_dai, SSPA_AUDIO_PLL, 0, freq_in, freq_out);
snd_soc_dai_set_clkdiv(cpu_dai, 0, sspa_div);
@@ -647,6 +758,110 @@ static int mmp3asoc_wm8731_hw_params(struct snd_pcm_substream *substream,
return 0;
}
+#endif
+
+static int mmp3asoc_elba_startup(struct snd_pcm_substream *substream)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+
+ cpu_dai->driver->playback.formats = SNDRV_PCM_FMTBIT_S16_LE;
+ cpu_dai->driver->capture.formats = SNDRV_PCM_FMTBIT_S16_LE;
+ cpu_dai->driver->playback.rates = MMP3ASOC_SAMPLE_RATES;
+ cpu_dai->driver->capture.rates = MMP3ASOC_SAMPLE_RATES;
+
+ return 0;
+}
+
+static int mmp3asoc_elba_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_dai *codec_dai = rtd->codec_dai;
+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+ int freq_in, freq_out, sspa_mclk, sysclk, sspa_div;
+
+ printk("%s: enter, rate %d\n", __func__, params_rate(params));
+
+ freq_in = 26000000;
+ if (params_rate(params) > 11025) {
+ freq_out = params_rate(params) * 512;
+ sysclk = params_rate(params) * 256;
+ sspa_mclk = params_rate(params) * 64;
+ } else {
+ freq_out = params_rate(params) * 1024;
+ sysclk = params_rate(params) * 512;
+ sspa_mclk = params_rate(params) * 64;
+ }
+ sspa_div = freq_out;
+ do_div(sspa_div, sspa_mclk);
+
+#ifdef CONFIG_SND_ELBA_MASTER_MODE
+ snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
+ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
+ snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
+ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
+#else
+ snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
+ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
+ snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
+ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
+#endif
+
+ /* workaround for audio PLL, and should be removed after A1 */
+ /* SSPA2 clock formula: sysclk = (PLL1/4) * ISCCR1 Nom/Denom4
+ * for 48k, the sysclk should be 12.2880MHz, but here we only get
+ * approximate 12.458MHz */
+ switch (params_rate(params)) {
+ case 48000:
+ __raw_writel(0xd0040040, MPMU_ISCCRX1);
+ break;
+ case 44100:
+ __raw_writel(0xd0040044, MPMU_ISCCRX1);
+ break;
+ case 32000:
+ __raw_writel(0xd00800c0, MPMU_ISCCRX1);
+ break;
+ case 24000:
+ __raw_writel(0xd0020040, MPMU_ISCCRX1);
+ break;
+ case 22050:
+ __raw_writel(0xd0020044, MPMU_ISCCRX1);
+ break;
+ case 16000:
+ __raw_writel(0xd00400c0, MPMU_ISCCRX1);
+ break;
+ case 8000:
+ __raw_writel(0xd00400c0, MPMU_ISCCRX1);
+ break;
+ default:
+ break;
+ }
+
+ /* SSPA clock ctrl register changes, and can't use previous API */
+ snd_soc_dai_set_pll(cpu_dai, SSPA_AUDIO_PLL, 0, freq_in, freq_out);
+ snd_soc_dai_set_clkdiv(cpu_dai, 0, sspa_div);
+ snd_soc_dai_set_sysclk(cpu_dai, 0, sysclk, 0);
+
+/*
+#ifdef CONFIG_SND_ELBA_MASTER_MODE
+ snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
+ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
+ snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
+ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
+#else
+ snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
+ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFM);
+ snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
+ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
+#endif
+*/
+
+ /* set elba sysclk */
+ //snd_soc_dai_set_sysclk(codec_dai, 0, 0, PM805_CODEC_CLK_DIR_OUT);
+ //printk("exit %s\n", __func__);
+ return 0;
+}
#ifdef CONFIG_PM
static int mmp3asoc_suspend_post(struct snd_soc_card *card)
@@ -670,22 +885,22 @@ static struct snd_soc_ops mmp3asoc_machine_ops[] = {
.hw_params = mmp3asoc_hdmi_hw_params,
},
{
- .startup = mmp3asoc_wm8731_startup,
- .hw_params = mmp3asoc_wm8731_hw_params,
+ .startup = mmp3asoc_elba_startup,
+ .hw_params = mmp3asoc_elba_hw_params,
},
};
/* digital audio interface glue - connects codec <--> CPU */
-static struct snd_soc_dai_link mmp3_asoc_wm8731_dai[] = {
+static struct snd_soc_dai_link mmp3_asoc_elba_dai[] = {
{
- .name = "WM8731",
- .stream_name = "WM8731",
- .codec_name = "wm8731.2-001a",
+ .name = "M_CE156",
+ .stream_name = "Audio CE156",
+ .codec_name = "ce156.2-0030",
.platform_name = "mmp3-pcm-audio",
.cpu_dai_name = "mmp3-sspa-dai.0",
- .codec_dai_name = "wm8731-hifi",
+ .codec_dai_name = "CE156",
.ops = &mmp3asoc_machine_ops[1],
- .init = codec_wm8731_init,
+ .init = codec_elba_init,
},
};
@@ -706,7 +921,7 @@ static struct snd_soc_dai_link mmp3_asoc_hdmi_dai[] = {
static struct snd_soc_card snd_soc_mmp3asoc[] = {
{
.name = "mmp3 asoc",
- .dai_link = &mmp3_asoc_wm8731_dai[0],
+ .dai_link = &mmp3_asoc_elba_dai[0],
.num_links = 1,
.probe = mmp3asoc_probe,
#ifdef CONFIG_PM
@@ -722,13 +937,36 @@ static struct snd_soc_card snd_soc_mmp3asoc[] = {
},
};
+#if 0
+static struct i2c_board_info i2c_board_info[] = {
+ {
+ I2C_BOARD_INFO("ce156", 0x30),
+ },
+};
+#endif
+
+
+
static int __init mmp3asoc_init(void)
{
int i, ret[2];
+#if 0
+ struct i2c_adapter *adapter;
+ struct i2c_client *client;
+
if (!machine_is_qseven())
return -ENODEV;
-
+
+ adapter = i2c_get_adapter(3);
+ if (!adapter)
+ return -ENODEV;
+ client = i2c_new_device(adapter, i2c_board_info);
+ i2c_put_adapter(adapter);
+
+ if (!client)
+ return -ENODEV;
+#endif
for (i = 0; i < 2; i++) {
mmp3asoc_snd_device[i] = platform_device_alloc("soc-audio", i);
if (!mmp3asoc_snd_device[i])
@@ -739,6 +977,9 @@ static int __init mmp3asoc_init(void)
if (ret[i])
platform_device_put(mmp3asoc_snd_device[i]);
}
+ printk(KERN_INFO "CE156: register i2c device successfully\n");
+
+
return ret[1];
}
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index 05b78148e71da5..6716341ad6f2da 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -3798,6 +3798,8 @@ int snd_soc_register_codec(struct device *dev,
}
/* register any DAIs */
+ printk("codec register %s\n", codec->name); //paul
+ printk("codec num_dai %d\n", codec->num_dai); //paul
if (num_dai) {
ret = snd_soc_register_dais(dev, dai_drv, num_dai);
if (ret < 0)