Add two patches to fix bugs introduced by previous backports

3 files changed, 152 insertions, 0 deletions

diff --git a/patches/lib-checksum.c-fix-build-for-generic-csum_tcpudp_nofold.patch b/patches/lib-checksum.c-fix-build-for-generic-csum_tcpudp_nofold.patch
new file mode 100644
index 0000000..ea68b54
--- /dev/null
+++ b/patches/lib-checksum.c-fix-build-for-generic-csum_tcpudp_nofold.patch
@@ -0,0 +1,56 @@
+From 9ce357795ef208faa0d59894d9d119a7434e37f3 Mon Sep 17 00:00:00 2001
+From: karl beldan <karl.beldan@gmail.com>
+Date: Thu, 29 Jan 2015 11:10:22 +0100
+Subject: lib/checksum.c: fix build for generic csum_tcpudp_nofold
+
+commit 9ce357795ef208faa0d59894d9d119a7434e37f3 upstream.
+
+Fixed commit added from64to32 under _#ifndef do_csum_ but used it
+under _#ifndef csum_tcpudp_nofold_, breaking some builds (Fengguang's
+robot reported TILEGX's). Move from64to32 under the latter.
+
+Fixes: 150ae0e94634 ("lib/checksum.c: fix carry in csum_tcpudp_nofold")
+Reported-by: kbuild test robot <fengguang.wu@intel.com>
+Signed-off-by: Karl Beldan <karl.beldan@rivierawaves.com>
+Cc: Eric Dumazet <edumazet@google.com>
+Cc: David S. Miller <davem@davemloft.net>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Zefan Li <lizefan@huawei.com>
+---
+ lib/checksum.c |   18 +++++++++---------
+ 1 file changed, 9 insertions(+), 9 deletions(-)
+
+--- a/lib/checksum.c
++++ b/lib/checksum.c
+@@ -47,15 +47,6 @@ static inline unsigned short from32to16(
+ 	return x;
+ }
+ 
+-static inline u32 from64to32(u64 x)
+-{
+-	/* add up 32-bit and 32-bit for 32+c bit */
+-	x = (x & 0xffffffff) + (x >> 32);
+-	/* add up carry.. */
+-	x = (x & 0xffffffff) + (x >> 32);
+-	return (u32)x;
+-}
+-
+ static unsigned int do_csum(const unsigned char *buff, int len)
+ {
+ 	int odd;
+@@ -188,6 +179,15 @@ csum_partial_copy(const void *src, void
+ EXPORT_SYMBOL(csum_partial_copy);
+ 
+ #ifndef csum_tcpudp_nofold
++static inline u32 from64to32(u64 x)
++{
++	/* add up 32-bit and 32-bit for 32+c bit */
++	x = (x & 0xffffffff) + (x >> 32);
++	/* add up carry.. */
++	x = (x & 0xffffffff) + (x >> 32);
++	return (u32)x;
++}
++
+ __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
+ 			unsigned short len,
+ 			unsigned short proto,
diff --git a/patches/pci-handle-read-only-bars-on-amd-cs553x-devices.patch b/patches/pci-handle-read-only-bars-on-amd-cs553x-devices.patch
new file mode 100644
index 0000000..576ab00
--- /dev/null
+++ b/patches/pci-handle-read-only-bars-on-amd-cs553x-devices.patch
@@ -0,0 +1,94 @@
+From 06cf35f903aa6da0cc8d9f81e9bcd1f7e1b534bb Mon Sep 17 00:00:00 2001
+From: Myron Stowe <myron.stowe@redhat.com>
+Date: Tue, 3 Feb 2015 16:01:24 -0700
+Subject: PCI: Handle read-only BARs on AMD CS553x devices
+
+commit 06cf35f903aa6da0cc8d9f81e9bcd1f7e1b534bb upstream.
+
+Some AMD CS553x devices have read-only BARs because of a firmware or
+hardware defect.  There's a workaround in quirk_cs5536_vsa(), but it no
+longer works after 36e8164882ca ("PCI: Restore detection of read-only
+BARs").  Prior to 36e8164882ca, we filled in res->start; afterwards we
+leave it zeroed out.  The quirk only updated the size, so the driver tried
+to use a region starting at zero, which didn't work.
+
+Expand quirk_cs5536_vsa() to read the base addresses from the BARs and
+hard-code the sizes.
+
+On Nix's system BAR 2's read-only value is 0x6200.  Prior to 36e8164882ca,
+we interpret that as a 512-byte BAR based on the lowest-order bit set.  Per
+datasheet sec 5.6.1, that BAR (MFGPT) requires only 64 bytes; use that to
+avoid clearing any address bits if a platform uses only 64-byte alignment.
+
+[bhelgaas: changelog, reduce BAR 2 size to 64]
+Fixes: 36e8164882ca ("PCI: Restore detection of read-only BARs")
+Link: https://bugzilla.kernel.org/show_bug.cgi?id=85991#c4
+Link: http://support.amd.com/TechDocs/31506_cs5535_databook.pdf
+Link: http://support.amd.com/TechDocs/33238G_cs5536_db.pdf
+Reported-and-tested-by: Nix <nix@esperi.org.uk>
+Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Signed-off-by: Zefan Li <lizefan@huawei.com>
+---
+ drivers/pci/quirks.c |   41 +++++++++++++++++++++++++++++++++++++----
+ 1 file changed, 37 insertions(+), 4 deletions(-)
+
+--- a/drivers/pci/quirks.c
++++ b/drivers/pci/quirks.c
+@@ -327,19 +327,52 @@ static void __devinit quirk_s3_64M(struc
+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3,	PCI_DEVICE_ID_S3_868,		quirk_s3_64M);
+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3,	PCI_DEVICE_ID_S3_968,		quirk_s3_64M);
+ 
++static void quirk_io(struct pci_dev *dev, int pos, unsigned size,
++		     const char *name)
++{
++	u32 region;
++	struct pci_bus_region bus_region;
++	struct resource *res = dev->resource + pos;
++
++	pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + (pos << 2), &region);
++
++	if (!region)
++		return;
++
++	res->name = pci_name(dev);
++	res->flags = region & ~PCI_BASE_ADDRESS_IO_MASK;
++	res->flags |=
++		(IORESOURCE_IO | IORESOURCE_PCI_FIXED | IORESOURCE_SIZEALIGN);
++	region &= ~(size - 1);
++
++	/* Convert from PCI bus to resource space */
++	bus_region.start = region;
++	bus_region.end = region + size - 1;
++	pcibios_bus_to_resource(dev->bus, res, &bus_region);
++
++	dev_info(&dev->dev, FW_BUG "%s quirk: reg 0x%x: %pR\n",
++		 name, PCI_BASE_ADDRESS_0 + (pos << 2), res);
++}
++
+ /*
+  * Some CS5536 BIOSes (for example, the Soekris NET5501 board w/ comBIOS
+  * ver. 1.33  20070103) don't set the correct ISA PCI region header info.
+  * BAR0 should be 8 bytes; instead, it may be set to something like 8k
+  * (which conflicts w/ BAR1's memory range).
++ *
++ * CS553x's ISA PCI BARs may also be read-only (ref:
++ * https://bugzilla.kernel.org/show_bug.cgi?id=85991 - Comment #4 forward).
+  */
+ static void __devinit quirk_cs5536_vsa(struct pci_dev *dev)
+ {
++	static char *name = "CS5536 ISA bridge";
++
+ 	if (pci_resource_len(dev, 0) != 8) {
+-		struct resource *res = &dev->resource[0];
+-		res->end = res->start + 8 - 1;
+-		dev_info(&dev->dev, "CS5536 ISA bridge bug detected "
+-				"(incorrect header); workaround applied.\n");
++		quirk_io(dev, 0,   8, name);	/* SMB */
++		quirk_io(dev, 1, 256, name);	/* GPIO */
++		quirk_io(dev, 2,  64, name);	/* MFGPT */
++		dev_info(&dev->dev, "%s bug detected (incorrect header); workaround applied\n",
++			 name);
+ 	}
+ }
+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, quirk_cs5536_vsa);
diff --git a/patches/series b/patches/series
index cc9dbab..f1a9b24 100644
--- a/patches/series
+++ b/patches/series
@@ -173,3 +173,5 @@ spi-dw-revisit-fifo-size-detection-again.patch
 nilfs2-fix-deadlock-of-segment-constructor-during-recovery.patch
 net-compat-update-get_compat_msghdr-to-match-copy_msghdr_from_user-behaviour.patch
 mm-fix-anon_vma-degree-underflow-in-anon_vma-endless-growing-prevention.patch
+lib-checksum.c-fix-build-for-generic-csum_tcpudp_nofold.patch
+pci-handle-read-only-bars-on-amd-cs553x-devices.patch