diff options
| author | Hai Nguyen Pham <hai.pham.ud@renesas.com> | 2019-03-08 16:16:19 +0700 |
|---|---|---|
| committer | Ryo Kataoka <ryo.kataoka.wt@renesas.com> | 2019-03-22 20:50:41 +0900 |
| commit | 83e7b285d5247100e96cc5139045fc46e30d3f58 (patch) | |
| tree | 7ea71ccfcb67604e5551fe569d2d9f5abd412048 | |
| parent | 91145fb6a6c292357f2ccaa4e1acbbb30457bf62 (diff) | |
| download | renesas-bsp-83e7b285d5247100e96cc5139045fc46e30d3f58.tar.gz | |
Revert "arm64: dts: renesas: r8a7795: Tie SYS-DMAC to IPMMU-DS0/1"
This reverts commit bfa8f11e3f95f32620edae00277a23197a50c77a
to keep IPMMU address translation for SYS-DMAC0, SYS-DMAC1 and
SYS-DMAC2 is disabled by default.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7795.dtsi | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 81d0f1d786404d..a4e016088682b8 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -1367,14 +1367,6 @@ resets = <&cpg 219>; #dma-cells = <1>; dma-channels = <16>; - iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, - <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, - <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, - <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, - <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, - <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, - <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, - <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; }; dmac1: dma-controller@e7300000 { @@ -1409,14 +1401,6 @@ resets = <&cpg 218>; #dma-cells = <1>; dma-channels = <16>; - iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, - <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, - <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, - <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, - <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, - <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, - <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, - <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; }; dmac2: dma-controller@e7310000 { @@ -1451,14 +1435,6 @@ resets = <&cpg 217>; #dma-cells = <1>; dma-channels = <16>; - iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, - <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, - <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, - <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, - <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, - <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, - <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, - <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; }; ipmmu_mm: mmu@e67b0000 { |