diff options
| author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2018-05-09 21:38:24 +0900 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2018-08-09 17:18:43 +0200 |
| commit | 883a1ee1776aaa779e6159ead0891f8881d47332 (patch) | |
| tree | 9cd9db00e428be9295e5b19501dd0b64183aa121 | |
| parent | c3282446479dd8a852c3844e75bea94070dbbcdf (diff) | |
| download | renesas-backport-883a1ee1776aaa779e6159ead0891f8881d47332.tar.gz | |
arm64: dts: renesas: r8a77965: Add SDHI device nodes
Add SDHI nodes to the DT of the r8a77965 SoC.
Based on several similar patches of the R8A7796 device tree
by Simon Horman <horms+renesas@verge.net.au>.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit aa7a6365d03aacd4714ae62630f0262cac82a478)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a77965.dtsi | 36 |
1 files changed, 32 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index ba0edda431a59..f51c1b2cbae40 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -978,23 +978,51 @@ }; sdhi0: sd@ee100000 { + compatible = "renesas,sdhi-r8a77965", + "renesas,rcar-gen3-sdhi"; reg = <0 0xee100000 0 0x2000>; - /* placeholder */ + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 314>; + max-frequency = <200000000>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + resets = <&cpg 314>; + status = "disabled"; }; sdhi1: sd@ee120000 { + compatible = "renesas,sdhi-r8a77965", + "renesas,rcar-gen3-sdhi"; reg = <0 0xee120000 0 0x2000>; - /* placeholder */ + interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 313>; + max-frequency = <200000000>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + resets = <&cpg 313>; + status = "disabled"; }; sdhi2: sd@ee140000 { + compatible = "renesas,sdhi-r8a77965", + "renesas,rcar-gen3-sdhi"; reg = <0 0xee140000 0 0x2000>; - /* placeholder */ + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 312>; + max-frequency = <200000000>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + resets = <&cpg 312>; + status = "disabled"; }; sdhi3: sd@ee160000 { + compatible = "renesas,sdhi-r8a77965", + "renesas,rcar-gen3-sdhi"; reg = <0 0xee160000 0 0x2000>; - /* placeholder */ + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 311>; + max-frequency = <200000000>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + resets = <&cpg 311>; + status = "disabled"; }; gic: interrupt-controller@f1010000 { |