diff options
| author | Dinh Nguyen <dinguyen@kernel.org> | 2023-09-28 06:28:13 -0500 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2023-09-29 05:34:19 -0500 |
| commit | d92c3bfbac4d8653ce3bf5d590bb253e89a96064 (patch) | |
| tree | 864c12bc43618b1028626cb652dd7795e509e8b9 | |
| parent | 9bc81507d2148dde1695c3564b0dacd4670213d7 (diff) | |
| download | linux-socfpga_dtbindings_fix_for_v6.7.tar.gz | |
ARM: dts: socfpga: move base_fpga_region out of soc nodesocfpga_dtbindings_fix_for_v6.7
The soc node is supposed to only have device nodes with MMIO addresses,
thus move the base_fpga_region outside of the soc node.
soc: base_fpga_region: {'#address-cells': [[2]], '#size-cells': [[2]],
'compatible': ['fpga-region'], 'fpga-mgr': [[6]]} should not be valid
under {'type': 'object'}
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/intel/socfpga/socfpga.dtsi | 16 | ||||
| -rw-r--r-- | arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi | 16 |
2 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi index 4c1d140f40f87..db6aa372b8685 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi @@ -54,6 +54,14 @@ <0xfffec100 0x100>; }; + base_fpga_region { + compatible = "fpga-region"; + fpga-mgr = <&fpgamgr0>; + + #address-cells = <0x1>; + #size-cells = <0x1>; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -87,14 +95,6 @@ }; }; - base_fpga_region { - compatible = "fpga-region"; - fpga-mgr = <&fpgamgr0>; - - #address-cells = <0x1>; - #size-cells = <0x1>; - }; - can0: can@ffc00000 { compatible = "bosch,d_can"; reg = <0xffc00000 0x1000>; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index f36063c57c7f2..dbba8b2533c31 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -46,6 +46,14 @@ <0xffffc100 0x100>; }; + base_fpga_region { + #address-cells = <0x1>; + #size-cells = <0x1>; + + compatible = "fpga-region"; + fpga-mgr = <&fpga_mgr>; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -80,14 +88,6 @@ }; }; - base_fpga_region { - #address-cells = <0x1>; - #size-cells = <0x1>; - - compatible = "fpga-region"; - fpga-mgr = <&fpga_mgr>; - }; - clkmgr@ffd04000 { compatible = "altr,clk-mgr"; reg = <0xffd04000 0x1000>; |