Add Cheetah fully assosciative TLB load

workaround to blockops, forgot this.
Move MODULES_VADDR up a notch so it does not conflict
with TLBTEMP_BASE.
In all such critical spots, point the reader at some new
commentary in mm/modutil.c that explains the location of
all these things.

4 files changed, 27 insertions, 7 deletions

diff --git a/arch/sparc64/kernel/entry.S b/arch/sparc64/kernel/entry.S
index a58b63d67..4fafefc0e 100644
--- a/arch/sparc64/kernel/entry.S
+++ b/arch/sparc64/kernel/entry.S
@@ -1,4 +1,4 @@
-/* $Id: entry.S,v 1.139 2001-11-28 23:30:28 davem Exp $
+/* $Id: entry.S,v 1.140 2001-12-05 01:24:54 davem Exp $
  * arch/sparc64/kernel/entry.S:  Sparc64 trap low-level entry points.
  *
  * Copyright (C) 1995,1997 David S. Miller (davem@caip.rutgers.edu)
@@ -40,6 +40,9 @@
  * the 8k aligned faulting address if we are using >8k kernel pagesize. This also
  * ensures no vpte range addresses are dropped into tlb while obp is executing
  * (see inherit_locked_prom_mappings() rant).
+ *
+ * Please see arch/sparc64/mm/modutil.c, in particular the comment above
+ * MODULES_VADDR, to better understand where all of this stuff lives.
  */
 sparc64_vpte_nucleus:
 	mov		0xf, %g5
diff --git a/arch/sparc64/lib/blockops.S b/arch/sparc64/lib/blockops.S
index fdf8eb3df..73798cac6 100644
--- a/arch/sparc64/lib/blockops.S
+++ b/arch/sparc64/lib/blockops.S
@@ -1,4 +1,4 @@
-/* $Id: blockops.S,v 1.39 2001-11-30 06:40:24 davem Exp $
+/* $Id: blockops.S,v 1.40 2001-12-05 01:24:54 davem Exp $
  * blockops.S: UltraSparc block zero optimized routines.
  *
  * Copyright (C) 1996, 1998, 1999, 2000 David S. Miller (davem@redhat.com)
@@ -17,6 +17,9 @@
 	fmovd	%reg4, %f56; 	fmovd	%reg5, %f58;		\
 	fmovd	%reg6, %f60; 	fmovd	%reg7, %f62;
 
+/* Please read the comment above MODULES_VADDR in arch/sparc64/mm/modutil.c
+ * before making modifications to TLBTEMP_BASE.
+ */
 #define	TLBTEMP_BASE	(16 * 1024 * 1024)
 #define	DCACHE_SIZE	(PAGE_SIZE * 2)
 #define TLBTEMP_ENT1	(60 << 3)
@@ -76,6 +79,7 @@ cheetah_patch_1:
 	stxa		%g0, [%o5] ASI_DMMU
 	membar		#Sync
 
+	ldxa		[%o3] ASI_DTLB_DATA_ACCESS, %g0
 	ldxa		[%o3] ASI_DTLB_DATA_ACCESS, %o5
 	stxa		%o0, [%o2] ASI_DMMU
 	stxa		%g1, [%o3] ASI_DTLB_DATA_ACCESS
@@ -94,6 +98,7 @@ cheetah_patch_1:
 	stxa		%g0, [%g7] ASI_DMMU
 	membar		#Sync
 
+	ldxa		[%o3] ASI_DTLB_DATA_ACCESS, %g0
 	ldxa		[%o3] ASI_DTLB_DATA_ACCESS, %g7
 	stxa		%o1, [%o2] ASI_DMMU
 	stxa		%g2, [%o3] ASI_DTLB_DATA_ACCESS
@@ -363,6 +368,7 @@ cheetah_patch_2:
 	stxa		%g0, [%g7] ASI_DMMU
 	membar		#Sync
 
+	ldxa		[%o3] ASI_DTLB_DATA_ACCESS, %g0
 	ldxa		[%o3] ASI_DTLB_DATA_ACCESS, %g7
 	stxa		%o0, [%o2] ASI_DMMU
 	stxa		%g1, [%o3] ASI_DTLB_DATA_ACCESS
diff --git a/arch/sparc64/mm/modutil.c b/arch/sparc64/mm/modutil.c
index a574145da..a3a80cff5 100644
--- a/arch/sparc64/mm/modutil.c
+++ b/arch/sparc64/mm/modutil.c
@@ -1,4 +1,4 @@
-/*  $Id: modutil.c,v 1.9 2001-08-14 22:10:56 davem Exp $
+/*  $Id: modutil.c,v 1.10 2001-12-05 01:24:54 davem Exp $
  *  arch/sparc64/mm/modutil.c
  *
  *  Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
@@ -11,8 +11,15 @@
 #include <asm/uaccess.h>
 #include <asm/system.h>
 
-#define  MODULES_VADDR	0x0000000001000000ULL  /* Where to map modules */
-#define  MODULES_LEN	0x000000007f000000ULL
+/* The kernel image occupies 0x4000000 to 0x1000000 (4MB --> 16MB).
+ * The page copy blockops use 0x1000000 to 0x18000000 (16MB --> 24MB).
+ * The PROM resides in an area spanning 0xf0000000 to 0x100000000.
+ * The vmalloc area spans 0x140000000 to 0x200000000.
+ * There is a single static kernel PMD which maps from 0x0 to address
+ * 0x400000000.
+ */
+#define  MODULES_VADDR	0x0000000002000000ULL  /* Where to map modules */
+#define  MODULES_LEN	0x000000007e000000ULL
 #define  MODULES_END	0x0000000080000000ULL
 
 static struct vm_struct * modvmlist = NULL;
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h
index cf930e47a..73a798f25 100644
--- a/include/asm-sparc64/pgtable.h
+++ b/include/asm-sparc64/pgtable.h
@@ -1,4 +1,4 @@
-/* $Id: pgtable.h,v 1.152 2001-11-12 09:43:39 davem Exp $
+/* $Id: pgtable.h,v 1.153 2001-12-05 01:24:54 davem Exp $
  * pgtable.h: SpitFire page table operations.
  *
  * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu)
@@ -77,7 +77,11 @@
 				 (1) : (PTRS_PER_PGD)))
 #define FIRST_USER_PGD_NR	0
 
-/* NOTE: TLB miss handlers depend heavily upon where this is. */
+/* NOTE: TLB miss handlers depend heavily upon where this is.  In fact,
+ *       please read the comment above MODULES_VADDR in
+ *       arch/sparc64/mm/modutil.c before making modifications
+ *       to these values.
+ */
 #define VMALLOC_START		0x0000000140000000UL
 #define VMALLOC_VMADDR(x)	((unsigned long)(x))
 #define VMALLOC_END		0x0000000200000000UL