diff options
| author | Murali Karicheri <m-karicheri2@ti.com> | 2011-12-02 15:27:30 -0500 |
|---|---|---|
| committer | Cyril Chemparathy <cyril@ti.com> | 2012-09-21 10:43:59 -0400 |
| commit | 91d235aa2b5cccd7046efa0943c14acec3dd5b02 (patch) | |
| tree | 509f7a1ca5e9cef8c34fdccb16efd4c110d11f43 | |
| parent | c3711618b1cf9076839e5ec03fafe0a1c63c943d (diff) | |
| download | linux-keystone-91d235aa2b5cccd7046efa0943c14acec3dd5b02.tar.gz | |
arm: disable caches based on config
Currently the code doesn't check the config variable before enable I and D
cache. This patch fix this issue.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
| -rw-r--r-- | arch/arm/boot/compressed/head.S | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 81769c1341fa7..ff2f0d17f887c 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -660,6 +660,12 @@ __armv7_mmu_cache_on: orr r0, r0, #1 << 25 @ big-endian page tables #endif mrcne p15, 0, r6, c2, c0, 2 @ read ttb control reg +#ifdef CONFIG_CPU_DCACHE_DISABLE + bic r0, r0, #1 << 2 +#endif +#ifdef CONFIG_CPU_ICACHE_DISABLE + bic r0, r0, #1 << 12 +#endif orrne r0, r0, #1 @ MMU enabled movne r1, #0xfffffffd @ domain 0 = client bic r6, r6, #1 << 31 @ 32-bit translation system |