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| author | Murali Karicheri <m-karicheri2@ti.com> | 2011-11-26 10:22:08 -0500 |
|---|---|---|
| committer | Cyril Chemparathy <cyril@ti.com> | 2012-09-21 10:44:01 -0400 |
| commit | 2e4314530b16bfd8ebaea7bc8b7d18f8b09aa8bc (patch) | |
| tree | ca0e06b7acbffc191ad9fa37ce6c6dfda5c21bdc | |
| parent | 9e87bc9ab8067d8813879b2fd891f9bbf25d9a0b (diff) | |
| download | linux-keystone-2e4314530b16bfd8ebaea7bc8b7d18f8b09aa8bc.tar.gz | |
tci6614: adding lpsc and power domain definitions
Adding header file definitions of LPSC and PD for TCI6614
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
| -rw-r--r-- | arch/arm/mach-davinci/include/mach/psc.h | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 405318e35bf63..afa2938e08032 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h @@ -228,6 +228,59 @@ #define TNETV107X_LPSC_DDR2_EMIF2_VCTL_RST 43 #define TNETV107X_LPSC_MAX 44 +/* TCI6614 LPSC Assignments */ +#define TCI6614_LPSC_MODRST0 0 +#define TCI6614_LPSC_SRC3_PWR 1 +#define TCI6614_LPSC_EMIF4F 2 +#define TCI6614_LPSC_TCP3E 3 +#define TCI6614_LPSC_VCP2_A 4 +#define TCI6614_LPSC_DEBUGSS_TRC 5 +#define TCI6614_LPSC_TETB_TRC 6 +#define TCI6614_LPSC_PKTPROC 7 +#define TCI6614_LPSC_CPGMAC 8 +#define TCI6614_LPSC_CRYPTO 9 +#define TCI6614_LPSC_PCIEX 10 +#define TCI6614_LPSC_SRIO 11 +#define TCI6614_LPSC_VUSR 12 +#define TCI6614_LPSC_MSMCSRAM 14 +#define TCI6614_LPSC_RAC 15 +#define TCI6614_LPSC_TAC 16 +#define TCI6614_LPSC_FFTC 17 +#define TCI6614_LPSC_DRFE 18 +#define TCI6614_LPSC_TCP3D 19 +#define TCI6614_LPSC_VCP2_B 20 +#define TCI6614_LPSC_VCP2_C 21 +#define TCI6614_LPSC_VCP2_D 22 +#define TCI6614_LPSC_BCP 23 +#define TCI6614_LPSC_GEM1 24 +#define TCI6614_LPSC_RSAX2_1 25 +#define TCI6614_LPSC_GEM0 26 +#define TCI6614_LPSC_RSAX2_0 27 +#define TCI6614_LPSC_ARM 28 +#define TCI6614_LPSC_TCP2 29 +#define TCI6614_LPSC_DXB 30 + +#define TCI6614_PD_ALWAYSON 0 +#define TCI6614_PD_DEBUG_TRC 1 +#define TCI6614_PD_PASS 2 +#define TCI6614_PD_PCIEX 3 +#define TCI6614_PD_SRIO 4 +#define TCI6614_PD_HYPERBRIDGE 5 +#define TCI6614_PD_L2SRAM 6 +#define TCI6614_PD_MSMCSRAM 7 +#define TCI6614_PD_RAC_TAC 8 +#define TCI6614_PD_FFTC 9 +#define TCI6614_PD_DRFE 10 +#define TCI6614_PD_TCP3D 11 +#define TCI6614_PD_VCP_BCD 12 +#define TCI6614_PD_BCP 13 +#define TCI6614_PD_GEM1 14 +#define TCI6614_PD_GEM2 15 +#define TCI6614_PD_ARM 16 +#define TCI6614_PD_TCP2 17 +#define TCI6614_PD_DXB 18 + + /* PSC register offsets */ #define EPCPR 0x070 #define PTCMD 0x120 |