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| author | Mathieu Desnoyers <mathieu.desnoyers@efficios.com> | 2024-03-01 19:32:51 -0500 |
|---|---|---|
| committer | Mathieu Desnoyers <mathieu.desnoyers@efficios.com> | 2024-03-01 20:32:11 -0500 |
| commit | 3cde2ee2188e6dbf685b55bdcc47fecc152a0ef5 (patch) | |
| tree | e446eec565b58f7fc0dc9b35e9821ccd162fe7fe | |
| parent | c8278da8567679749e0d581d773932e8ced66ff0 (diff) | |
| download | librseq-3cde2ee2188e6dbf685b55bdcc47fecc152a0ef5.tar.gz | |
Rename rseq_load_add_load_add_store to rseq_load_add_load_load_add_store
Match the pseudo-code.
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Change-Id: I48d60a9688cf76936fa1ba7a3b1d6b7412a77e69
| -rw-r--r-- | include/rseq/arch/riscv/bits.h | 2 | ||||
| -rw-r--r-- | include/rseq/arch/x86/bits.h | 2 | ||||
| -rw-r--r-- | include/rseq/pseudocode.h | 2 | ||||
| -rw-r--r-- | include/rseq/rseq.h | 6 | ||||
| -rw-r--r-- | tests/param_test.c | 4 |
5 files changed, 8 insertions, 8 deletions
diff --git a/include/rseq/arch/riscv/bits.h b/include/rseq/arch/riscv/bits.h index 6af1577..f5213e0 100644 --- a/include/rseq/arch/riscv/bits.h +++ b/include/rseq/arch/riscv/bits.h @@ -232,7 +232,7 @@ error3: #define RSEQ_ARCH_HAS_OFFSET_DEREF_ADDV static inline __attribute__((always_inline)) -int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_add_load_add_store__ptr)(intptr_t *ptr, off_t off, intptr_t inc, int cpu) +int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_add_load_load_add_store__ptr)(intptr_t *ptr, off_t off, intptr_t inc, int cpu) { RSEQ_INJECT_C(9) diff --git a/include/rseq/arch/x86/bits.h b/include/rseq/arch/x86/bits.h index 3c37072..ab6313f 100644 --- a/include/rseq/arch/x86/bits.h +++ b/include/rseq/arch/x86/bits.h @@ -199,7 +199,7 @@ error1: #define RSEQ_ARCH_HAS_OFFSET_DEREF_ADDV static inline __attribute__((always_inline)) -int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_add_load_add_store__ptr)(intptr_t *ptr, long off, intptr_t inc, int cpu) +int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_add_load_load_add_store__ptr)(intptr_t *ptr, long off, intptr_t inc, int cpu) { RSEQ_INJECT_C(9) diff --git a/include/rseq/pseudocode.h b/include/rseq/pseudocode.h index fc7af33..c6fb949 100644 --- a/include/rseq/pseudocode.h +++ b/include/rseq/pseudocode.h @@ -77,7 +77,7 @@ */ /* - * rseq_load_add_load_add_store(ptr, off, inc) + * rseq_load_add_load_load_add_store(ptr, off, inc) * * Pseudo-code: * load(r1, [ptr]) diff --git a/include/rseq/rseq.h b/include/rseq/rseq.h index eb94939..b672468 100644 --- a/include/rseq/rseq.h +++ b/include/rseq/rseq.h @@ -275,16 +275,16 @@ int rseq_load_add_store__ptr(enum rseq_mo rseq_mo, enum rseq_percpu_mode percpu_ #ifdef RSEQ_ARCH_HAS_OFFSET_DEREF_ADDV static inline __attribute__((always_inline)) -int rseq_load_add_load_add_store__ptr(enum rseq_mo rseq_mo, enum rseq_percpu_mode percpu_mode, +int rseq_load_add_load_load_add_store__ptr(enum rseq_mo rseq_mo, enum rseq_percpu_mode percpu_mode, intptr_t *ptr, long off, intptr_t inc, int cpu) { if (rseq_mo != RSEQ_MO_RELAXED) return -1; switch (percpu_mode) { case RSEQ_PERCPU_CPU_ID: - return rseq_load_add_load_add_store__ptr_relaxed_cpu_id(ptr, off, inc, cpu); + return rseq_load_add_load_load_add_store__ptr_relaxed_cpu_id(ptr, off, inc, cpu); case RSEQ_PERCPU_MM_CID: - return rseq_load_add_load_add_store__ptr_relaxed_mm_cid(ptr, off, inc, cpu); + return rseq_load_add_load_load_add_store__ptr_relaxed_mm_cid(ptr, off, inc, cpu); default: return -1; } diff --git a/tests/param_test.c b/tests/param_test.c index b44b952..2a46182 100644 --- a/tests/param_test.c +++ b/tests/param_test.c @@ -1314,7 +1314,7 @@ void *test_membarrier_worker_thread(void *arg) do { int cpu = get_current_cpu_id(); - ret = rseq_load_add_load_add_store__ptr(RSEQ_MO_RELAXED, RSEQ_PERCPU, + ret = rseq_load_add_load_load_add_store__ptr(RSEQ_MO_RELAXED, RSEQ_PERCPU, &args->percpu_list_ptr, sizeof(struct percpu_list_entry) * cpu, 1, cpu); } while (rseq_unlikely(ret)); @@ -1505,7 +1505,7 @@ void test_membarrier(void) "Skipping membarrier test.\n"); return; } - fprintf(stderr, "rseq_load_add_load_add_store__ptr is not implemented on this architecture. " + fprintf(stderr, "rseq_load_add_load_load_add_store__ptr is not implemented on this architecture. " "Skipping membarrier test.\n"); } #endif |