x86: Add nop instruction support

This patch adds INSN_NOP support for x86 architecture. The instruction is
useful for marking instruction selector rules for debugging purposes.

Signed-off-by: Pekka Enberg <penberg@kernel.org>

6 files changed, 11 insertions, 0 deletions

diff --git a/arch/x86/emit_32.c b/arch/x86/emit_32.c
index 40004c06..f573afd8 100644
--- a/arch/x86/emit_32.c
+++ b/arch/x86/emit_32.c
@@ -1258,6 +1258,7 @@ static emit_fn_t emitters[] = {
 	DECL_EMITTER(INSN_MULSD_XMM_XMM, insn_encode),
 	DECL_EMITTER(INSN_MULSS_XMM_XMM, insn_encode),
 	DECL_EMITTER(INSN_NEG_REG, insn_encode),
+	DECL_EMITTER(INSN_NOP, insn_encode),
 	DECL_EMITTER(INSN_OR_REG_REG, insn_encode),
 	DECL_EMITTER(INSN_POP_MEMLOCAL, insn_encode),
 	DECL_EMITTER(INSN_POP_REG, insn_encode),
diff --git a/arch/x86/emit_64.c b/arch/x86/emit_64.c
index f78bb665..af766fd5 100644
--- a/arch/x86/emit_64.c
+++ b/arch/x86/emit_64.c
@@ -1678,6 +1678,7 @@ static emit_fn_t emitters[] = {
 	DECL_EMITTER(INSN_MULSD_XMM_XMM, insn_encode),
 	DECL_EMITTER(INSN_MULSS_XMM_XMM, insn_encode),
 	DECL_EMITTER(INSN_NEG_REG, insn_encode),
+	DECL_EMITTER(INSN_NOP, insn_encode),
 	DECL_EMITTER(INSN_OR_REG_REG, insn_encode),
 	DECL_EMITTER(INSN_POP_MEMLOCAL, insn_encode),
 	DECL_EMITTER(INSN_POP_REG, insn_encode),
diff --git a/arch/x86/encode.c b/arch/x86/encode.c
index 08725417..ff6a4117 100644
--- a/arch/x86/encode.c
+++ b/arch/x86/encode.c
@@ -254,6 +254,7 @@ static uint64_t encode_table[NR_INSN_TYPES] = {
 	[INSN_MULSD_XMM_XMM]		= REPNE_PREFIX | ESCAPE_OPC_BYTE | OPCODE(0x59) | ADDMODE_REG_REG | WIDTH_64,
 	[INSN_MULSS_XMM_XMM]		= REPE_PREFIX  | ESCAPE_OPC_BYTE | OPCODE(0x59) | ADDMODE_REG_REG | WIDTH_FULL,
 	[INSN_NEG_REG]			= OPCODE(0xf7) | OPCODE_EXT(3)   | ADDMODE_REG     | DIR_REVERSED | WIDTH_FULL | REX_W_PREFIX,
+	[INSN_NOP]			= OPCODE(0x90) | ADDMODE_IMPLIED,
 	[INSN_OR_MEMBASE_REG]		= OPCODE(0x0b) | ADDMODE_RM_REG  | WIDTH_FULL | REX_W_PREFIX,
 	[INSN_OR_REG_REG]		= OPCODE(0x09) | ADDMODE_REG_REG | DIR_REVERSED | WIDTH_FULL | REX_W_PREFIX,
 	[INSN_PHI]			= INVALID_INSN,
diff --git a/arch/x86/include/arch/instruction.h b/arch/x86/include/arch/instruction.h
index 6b1dc236..4dd16fb1 100644
--- a/arch/x86/include/arch/instruction.h
+++ b/arch/x86/include/arch/instruction.h
@@ -185,6 +185,7 @@ enum insn_type {
 	INSN_MUL_REG_EAX,
 	INSN_MUL_REG_REG,
 	INSN_NEG_REG,
+	INSN_NOP,
 	INSN_OR_IMM_MEMBASE,
 	INSN_OR_MEMBASE_REG,
 	INSN_OR_REG_REG,
diff --git a/arch/x86/instruction.c b/arch/x86/instruction.c
index bd8eacf7..27aa8cb0 100644
--- a/arch/x86/instruction.c
+++ b/arch/x86/instruction.c
@@ -887,6 +887,7 @@ static unsigned long insn_flags[] = {
 	[INSN_MUL_REG_EAX]			= USE_SRC | USE_DST | DEF_DST | DEF_xDX | DEF_xAX,
 	[INSN_MUL_REG_REG]			= USE_SRC | USE_DST | DEF_DST,
 	[INSN_NEG_REG]				= USE_DST | DEF_DST,
+	[INSN_NOP]				= USE_NONE | DEF_NONE,
 	[INSN_OR_IMM_MEMBASE]			= USE_DST | DEF_NONE,
 	[INSN_OR_MEMBASE_REG]			= USE_SRC | USE_DST | DEF_DST,
 	[INSN_OR_REG_REG]			= USE_SRC | USE_DST | DEF_DST,
diff --git a/arch/x86/lir-printer.c b/arch/x86/lir-printer.c
index a6054098..2684e8db 100644
--- a/arch/x86/lir-printer.c
+++ b/arch/x86/lir-printer.c
@@ -821,6 +821,11 @@ static int print_neg_reg(struct string *str, struct insn *insn)
 	return print_reg(str, &insn->dest);
 }
 
+static int print_nop(struct string *str, struct insn *insn)
+{
+	return print_func_name(str);
+}
+
 static int print_or_imm_membase(struct string *str, struct insn *insn)
 {
 	print_func_name(str);
@@ -1072,6 +1077,7 @@ static print_insn_fn insn_printers[] = {
 	[INSN_MUL_REG_EAX] = print_mul_reg_eax,
 	[INSN_MUL_REG_REG] = print_mul_reg_reg,
 	[INSN_NEG_REG] = print_neg_reg,
+	[INSN_NOP] = print_nop,
 	[INSN_OR_IMM_MEMBASE] = print_or_imm_membase,
 	[INSN_OR_MEMBASE_REG] = print_or_membase_reg,
 	[INSN_OR_REG_REG] = print_or_reg_reg,