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| author | Joakim Tjernlund <Joakim.Tjernlund@transmode.se> | 2011-10-10 13:30:19 +0200 |
|---|---|---|
| committer | Willy Tarreau <w@1wt.eu> | 2012-04-09 15:02:41 +0200 |
| commit | c7bd3e07be41cd1e094528a7cba9b316d15c6844 (patch) | |
| tree | ac3e4ebd2a670afe37dae7b980312bac6ac62928 | |
| parent | d1e0028d5fb4264ad78b40f39ea72841a1deabd2 (diff) | |
| download | linux-2.4-c7bd3e07be41cd1e094528a7cba9b316d15c6844.tar.gz | |
8xx: Optimize TLB Miss handlers
Only update pte w.r.t ACCESSED if it isn't already set
Wrap ACCESSED with #ifndef NO_SWAP for too ease optimization.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Willy Tarreau <w@1wt.eu>
| -rw-r--r-- | arch/ppc/kernel/head_8xx.S | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S index 0f2101d1e4ceab..36089cccf08625 100644 --- a/arch/ppc/kernel/head_8xx.S +++ b/arch/ppc/kernel/head_8xx.S @@ -377,10 +377,14 @@ InstructionTLBMiss: mfspr r21, MD_TWC /* ....and get the pte address */ lwz r20, 0(r21) /* Get the pte */ -#if 1 +#ifndef NO_SWAP /* if !swap, you can delete this */ + andi. r21, r20, _PAGE_ACCESSED /* test ACCESSED bit */ + bne+ 4f /* Branch if set */ + mfspr r21, MD_TWC /* get the pte address */ rlwimi r20, r20, 5, _PAGE_PRESENT<<5 /* Copy PRESENT to ACCESSED */ stw r20, 0(r21) /* Update pte */ +4: #endif /* The Linux PTE won't go exactly into the MMU TLB. * Software indicator bits 21 and 28 must be clear. @@ -450,11 +454,14 @@ DataStoreTLBMiss: DO_8xx_CPU6(0x3b80, r3) mtspr MD_TWC, r21 -#if 1 +#ifndef NO_SWAP /* if !swap, you can delete this */ + andi. r21, r20, _PAGE_ACCESSED /* test ACCESSED bit */ + bne+ 4f /* Branch if set */ mfspr r21, MD_TWC /* get the pte address */ rlwimi r20, r20, 5, _PAGE_PRESENT<<5 /* Copy PRESENT to ACCESSED */ stw r20, 0(r21) /* Update pte */ +4: #endif /* Honour kernel RO, User NA */ |