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| author | Michael Grzeschik <m.grzeschik@pengutronix.de> | 2022-12-04 01:26:27 +0100 |
|---|---|---|
| committer | Michael Grzeschik <m.grzeschik@pengutronix.de> | 2023-02-22 15:43:45 +0100 |
| commit | 1723301c0c90f553233ccebe431072587d9eac82 (patch) | |
| tree | 2b50f46cb4de1fdd2d9d16f4ae88f8871190a1e2 | |
| parent | c9c3395d5e3dcc6daee66c6908354d47bf98cb0c (diff) | |
| download | linux-1723301c0c90f553233ccebe431072587d9eac82.tar.gz | |
dts: rk3568: add rkvenc node
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk356x.dtsi | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index c27f1c7f072da..998f1a727a2f9 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -842,6 +842,33 @@ reg = <0x0 0xfe138100 0x0 0x20>; }; + rkvenc: video-codec@fdf40000 { + compatible = "rockchip,rk356x-venc"; + reg = <0x0 0xfdf40000 0x0 0x400>; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru ACLK_RKVENC>, <&cru HCLK_RKVENC>, + <&cru CLK_RKVENC_CORE>; + clock-names = "axi", "ahb", "core"; + assigned-clocks = <&cru ACLK_RKVENC>, <&cru CLK_RKVENC_CORE>; + assigned-clock-rates = <297000000>, <297000000>; + iommus = <&rkvenc_mmu>; + power-domains = <&power RK3568_PD_RKVENC>; + }; + + rkvenc_mmu: iommu@fdf40f00 { + compatible = "rockchip,rk3568-iommu"; + reg = <0x0 0xfdf40f00 0x0 0x40>, <0x0 0xfdf40f40 0x0 0x40>; + interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "rkvenc_mmu0", "rkvenc_mmu1"; + clocks = <&cru ACLK_RKVENC>, <&cru HCLK_RKVENC>; + clock-names = "aclk", "iface"; + rockchip,disable-mmu-reset; + rockchip,enable-cmd-retry; + #iommu-cells = <0>; + power-domains = <&power RK3568_PD_RKVENC>; + }; + qos_rkvenc_wr_m0: qos@fe138180 { compatible = "rockchip,rk3568-qos", "syscon"; reg = <0x0 0xfe138180 0x0 0x20>; |