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| author | Lubomir Rintel <lkundrak@v3.sk> | 2019-02-18 20:13:49 +0100 |
|---|---|---|
| committer | Lubomir Rintel <lkundrak@v3.sk> | 2019-04-19 07:28:33 +0200 |
| commit | 1225593443bae955b46ff77faa4749b46c4d2c74 (patch) | |
| tree | 4621139c17f96ff7f6c71e8f15b97f67c7573a33 | |
| parent | 6e97d558f722a1f58ee0485da688f99cd56d58c8 (diff) | |
| download | openfirmware-1225593443bae955b46ff77faa4749b46c4d2c74.tar.gz | |
olpc: add /l2-cache node
If this is absent, the kernel disables the L2 cache. Sad. Described by
the arm/mrvl/tauros2.txt binding.
TODO: perhaps this belong to some more generic MMP2 support code. That
may involve splitting the x86 and arm cpunode.fth instead of ifdefing
various parts of it.
| -rw-r--r-- | cpu/arm/olpc/build-fw.fth | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/cpu/arm/olpc/build-fw.fth b/cpu/arm/olpc/build-fw.fth index 882848d4..a66b2bb3 100644 --- a/cpu/arm/olpc/build-fw.fth +++ b/cpu/arm/olpc/build-fw.fth @@ -93,6 +93,12 @@ devalias rom /dropin-fs fload ${BP}/cpu/x86/pc/cpunode.fth \ The PC CPU node is actually fairly generic +0 0 " " " /" begin-package + " l2-cache" device-name + " marvell,tauros2-cache" +compatible + 3 " marvell,tauros2-cache-features" integer-property +end-package + : cpu-mhz ( -- n ) " /cpu@0" find-package drop ( phandle ) " clock-frequency" rot get-package-property if 0 exit then ( adr ) |