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authorVolker Ruppert <info@vruppert.de>2004-04-25 20:12:56 +0000
committerVolker Ruppert <info@vruppert.de>2004-04-25 20:12:56 +0000
commitf49abdbb3eb7c95c295132de36da00441dc81d73 (patch)
treec6f7c7e6649d1ee92165141cf10e12c5666d8148
parent1afa2bd1a839daf49ef0a9fca2a758173b3d8fbf (diff)
downloadvgabios-f49abdbb3eb7c95c295132de36da00441dc81d73.tar.gz
- table entries for vga mode 0x0f fixed (PLANAR2 exists on EGA only)
- function release_font_access now supports the monochrome text mode - PLANAR1 modes now supported in text output functions and read/write pixel - function AH=0x12/BL=0x32 rewritten in assembler
-rw-r--r--vgabios.c64
-rw-r--r--vgatables.h17
2 files changed, 48 insertions, 33 deletions
diff --git a/vgabios.c b/vgabios.c
index b7f5136..d589958 100644
--- a/vgabios.c
+++ b/vgabios.c
@@ -104,7 +104,6 @@ static void biosfn_get_font_info();
static void biosfn_get_ega_info();
static void biosfn_alternate_prtsc();
static void biosfn_select_vert_res();
-static void biosfn_enable_video_addressing();
static void biosfn_enable_cursor_emulation();
static void biosfn_switch_video_interface();
static void biosfn_enable_video_refresh_control();
@@ -134,11 +133,13 @@ biosmem_dcc_index = 0x8a
vgareg_actl_address = 0x03c0
vgareg_actl_read_data = 0x03c1
+vgareg_write_misc_output = 0x03c2
vgareg_sequ_address = 0x03c4
vgareg_pel_mask = 0x03c6
vgareg_dac_read_address = 0x03c7
vgareg_dac_write_address = 0x03c8
vgareg_dac_data = 0x03c9
+vgareg_read_misc_output = 0x03cc
vgareg_grdc_address = 0x03ce
vgareg_actl_reset = 0x03da
@@ -299,9 +300,14 @@ int10_test_12:
cmp ah, #0x12
jne int10_test_101B
cmp bl, #0x31
- jne int10_test_BL33
+ jne int10_test_BL32
call biosfn_enable_default_palette_loading
jmp int10_end
+int10_test_BL32:
+ cmp bl, #0x32
+ jne int10_test_BL33
+ call biosfn_enable_video_addressing
+ jmp int10_end
int10_test_BL33:
cmp bl, #0x33
jne int10_normal
@@ -627,10 +633,6 @@ static void int10_func(DI, SI, BP, SP, BX, DX, CX, AX, DS, ES, FLAGS)
biosfn_select_vert_res(GET_AL());
SET_AL(0x12);
break;
- case 0x32:
- biosfn_enable_video_addressing(GET_AL());
- SET_AL(0x12);
- break;
case 0x34:
biosfn_enable_cursor_emulation(GET_AL());
SET_AL(0x12);
@@ -1403,7 +1405,7 @@ Bit8u car;Bit8u page;Bit8u attr;Bit16u count;
bpp=vga_modes[line].pixbits;
while((count-->0) && (xcurs<nbcols))
{
- if(vga_modes[line].memmodel==PLANAR4)
+ if((vga_modes[line].memmodel==PLANAR4)||(vga_modes[line].memmodel==PLANAR1))
{
write_gfx_char_pl4(car,attr,xcurs,ycurs,nbcols,cheight);
}
@@ -1464,7 +1466,7 @@ Bit8u car;Bit8u page;Bit8u attr;Bit16u count;
bpp=vga_modes[line].pixbits;
while((count-->0) && (xcurs<nbcols))
{
- if(vga_modes[line].memmodel==PLANAR4)
+ if((vga_modes[line].memmodel==PLANAR4)||(vga_modes[line].memmodel==PLANAR1))
{
write_gfx_char_pl4(car,attr,xcurs,ycurs,nbcols,cheight);
}
@@ -1580,7 +1582,7 @@ static void biosfn_write_pixel (BH,AL,CX,DX) Bit8u BH;Bit8u AL;Bit16u CX;Bit16u
if(line==0xFF)return;
if(vga_modes[line].class==TEXT)return;
- if(vga_modes[line].memmodel==PLANAR4)
+ if((vga_modes[line].memmodel==PLANAR4)||(vga_modes[line].memmodel==PLANAR1))
{
addr = CX/8+DX*read_word(BIOSMEM_SEG,BIOSMEM_NB_COLS);
mask = 0x01 << (7 - (CX & 0x07));
@@ -1655,7 +1657,7 @@ static void biosfn_read_pixel (BH,CX,DX,AX) Bit8u BH;Bit16u CX;Bit16u DX;Bit16u
if(line==0xFF)return;
if(vga_modes[line].class==TEXT)return;
- if(vga_modes[line].memmodel==PLANAR4)
+ if((vga_modes[line].memmodel==PLANAR4)||(vga_modes[line].memmodel==PLANAR1))
{
addr = CX/8+DX*read_word(BIOSMEM_SEG,BIOSMEM_NB_COLS);
mask = 0x01 << (7 - (CX & 0x07));
@@ -1770,7 +1772,7 @@ Bit8u car;Bit8u page;Bit8u attr;Bit8u flag;
// FIXME gfx mode not complete
cheight=vga_modes[line].cheight;
bpp=vga_modes[line].pixbits;
- if(vga_modes[line].memmodel==PLANAR4)
+ if((vga_modes[line].memmodel==PLANAR4)||(vga_modes[line].memmodel==PLANAR1))
{
write_gfx_char_pl4(car,attr,xcurs,ycurs,nbcols,cheight);
}
@@ -2376,13 +2378,19 @@ ASM_START
out dx, ax
mov ax, #0x0300
out dx, ax
+ mov dx, #vgareg_read_misc_output
+ in al, dx
+ and al, #0x01
+ shl al, 2
+ or al, #0x0a
+ mov ah, al
+ mov al, #0x06
mov dx, #vgareg_grdc_address
+ out dx, ax
mov ax, #0x0004
out dx, ax
mov ax, #0x1005
out dx, ax
- mov ax, #0x0e06
- out dx, ax
ASM_END
}
@@ -2681,17 +2689,25 @@ biosfn_enable_default_palette_loading:
ASM_END
// --------------------------------------------------------------------------------------------
-static void biosfn_enable_video_addressing (disable)
-Bit8u disable;
-{
- Bit8u misc;
-
- misc=inb(VGAREG_READ_MISC_OUTPUT);
- // bit 1, 0 disable
- if(disable!=0x00) misc&=0xfd;
- else misc|=0x02;
- outb(VGAREG_WRITE_MISC_OUTPUT,misc);
-}
+ASM_START
+biosfn_enable_video_addressing:
+ push bx
+ push dx
+ mov bl, al
+ and bl, #0x01
+ xor bl, #0x01
+ shl bl, 1
+ mov dx, #vgareg_read_misc_output
+ in al, dx
+ and al, #0xfd
+ or al, bl
+ mov dx, #vgareg_write_misc_output
+ out dx, al
+ mov ax, #0x1212
+ pop dx
+ pop bx
+ ret
+ASM_END
// --------------------------------------------------------------------------------------------
ASM_START
diff --git a/vgatables.h b/vgatables.h
index 0255fb8..8f4fbb0 100644
--- a/vgatables.h
+++ b/vgatables.h
@@ -85,15 +85,14 @@
#define MTEXT 0x01
#define CGA 0x02
#define PLANAR1 0x03
-#define PLANAR2 0x04
-#define PLANAR4 0x05
-#define LINEAR8 0x06
+#define PLANAR4 0x04
+#define LINEAR8 0x05
// for SVGA
-#define LINEAR15 0x07
-#define LINEAR16 0x08
-#define LINEAR24 0x09
-#define LINEAR32 0x0a
+#define LINEAR15 0x10
+#define LINEAR16 0x11
+#define LINEAR24 0x12
+#define LINEAR32 0x13
typedef struct
{Bit8u svgamode;
@@ -128,7 +127,7 @@ static VGAMODES vga_modes[MODE_MAX+1]=
{0x07, 0xFFFF, TEXT, MTEXT, 4, 4, 720, 400, 80, 25, 9, 16, 0xB000, 0x1000, 0x66, 0xFF, 0x04, 0x03, 0x03, 0x01, 0x00},
{0x0D, 0xFFFF, GRAPH, PLANAR4, 8, 4, 320, 200, 40, 25, 8, 8, 0xA000, 0x2000, 0x63, 0xFF, 0x05, 0x04, 0x04, 0x04, 0x01},
{0x0E, 0xFFFF, GRAPH, PLANAR4, 4, 4, 640, 200, 80, 25, 8, 8, 0xA000, 0x4000, 0x63, 0xFF, 0x06, 0x04, 0x04, 0x05, 0x01},
- {0x0F, 0xFFFF, GRAPH, PLANAR2, 2, 2, 640, 350, 80, 25, 8, 14, 0xA000, 0x8000, 0xa2, 0xFF, 0x07, 0x05, 0x04, 0x05, 0x00},
+ {0x0F, 0xFFFF, GRAPH, PLANAR1, 2, 1, 640, 350, 80, 25, 8, 14, 0xA000, 0x8000, 0xa3, 0xFF, 0x07, 0x05, 0x04, 0x05, 0x00},
{0x10, 0xFFFF, GRAPH, PLANAR4, 2, 4, 640, 350, 80, 25, 8, 14, 0xA000, 0x8000, 0xa3, 0xFF, 0x07, 0x06, 0x04, 0x05, 0x02},
{0x11, 0xFFFF, GRAPH, PLANAR1, 1, 1, 640, 480, 80, 30, 8, 16, 0xA000, 0x0000, 0xe3, 0xFF, 0x08, 0x07, 0x04, 0x05, 0x02},
{0x12, 0xFFFF, GRAPH, PLANAR4, 1, 4, 640, 480, 80, 30, 8, 16, 0xA000, 0x0000, 0xe3, 0xFF, 0x08, 0x06, 0x04, 0x05, 0x02},
@@ -174,7 +173,7 @@ static Bit8u actl_regs[ACTL_MAX_MODEL+1][ACTL_MAX_REG+1]=
/* 02 */ 0x00,0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x01,0x00,0x01,0x00,0x00,
/* 03 */ 0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x0e,0x00,0x0f,0x08,0x00,
/* 04 */ 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x01,0x00,0x0f,0x00,0x00,
- /* 05 */ 0x00,0x08,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x18,0x00,0x00,0x0b,0x00,0x05,0x00,0x00,
+ /* 05 */ 0x00,0x08,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x18,0x00,0x00,0x01,0x00,0x01,0x00,0x00,
/* 06 */ 0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00,
/* 07 */ 0x00,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x01,0x00,0x01,0x00,0x00,
/* 08 */ 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x41,0x00,0x0f,0x00,0x00