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authorAlexander Graf <agraf@suse.de>2012-10-04 18:52:21 +0200
committerAlexander Graf <agraf@suse.de>2012-10-05 02:35:11 +0200
commitfb37c3029c5a695e367baaacc6baf17640cc63cc (patch)
treec32638c8e5c58617428a651bdfe43a5b9d89cce8
parent2b15811c8cd4dbe8dcde32320936fe74e51e4279 (diff)
downloadqemu-kvm-fb37c3029c5a695e367baaacc6baf17640cc63cc.tar.gz
PPC: e500: Only expose even TLB sizes in initial TLB
When booting our e500 machine, we automatically generate a big TLB entry in TLB1 that covers all of the code we need to run in there until the guest can handle its TLB on its own. However, e500v2 can only handle MAS1.0 sizes. However, we keep our TLB information in MAS2.0 layout, which means we have twice as many TLB sizes to choose from. That also means we can run into a situation where we try to add a TLB size that could not fit into the MAS1.0 size bits. Fix it by making sure we always have the lower bit set to 0. That way we are always guaranteed to have MAS1.0 compatible TLB size information. Signed-off-by: Alexander Graf <agraf@suse.de>
-rw-r--r--hw/ppc/e500.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index feb712e5a90..d23f9b2f60b 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -362,6 +362,10 @@ static void mmubooke_create_initial_mapping(CPUPPCState *env)
the device tree top */
dt_end = bi->dt_base + bi->dt_size;
ps = booke206_page_size_to_tlb(dt_end) + 1;
+ if (ps & 1) {
+ /* e500v2 can only do even TLB size bits */
+ ps++;
+ }
size = (ps << MAS1_TSIZE_SHIFT);
tlb->mas1 = MAS1_VALID | size;
tlb->mas2 = 0;