Age | Commit message (Expand) | Author | Files | Lines |
2013-10-31 | target-arm: fix sorting issue of KVM cpreg list | Alvise Rigo | 1 | -1/+7 |
2013-10-31 | target-arm: sort TCG cpreg list by KVM-style 64 bit ID number | Alvise Rigo | 1 | -3/+9 |
2013-10-31 | target-arm: Add CP15 VBAR support | Nathan Rossi | 2 | -0/+22 |
2013-10-18 | Merge remote-tracking branch 'bonzini/configure' into staging | Anthony Liguori | 1 | -1/+1 |
2013-10-16 | Makefile.target: CONFIG_NO_* variables removed | Ákos Kovács | 1 | -1/+1 |
2013-10-11 | Merge remote-tracking branch 'rth/tcg-pull' into staging | Anthony Liguori | 2 | -7/+4 |
2013-10-10 | Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging | Anthony Liguori | 1 | -3/+0 |
2013-10-10 | tcg: Remove stray semi-colons from target-*/helper.h | Richard Henderson | 1 | -4/+4 |
2013-10-10 | tcg: Move helper registration into tcg_context_init | Richard Henderson | 1 | -3/+0 |
2013-10-07 | cpu: Drop cpu_model_str from CPU_COMMON | Andreas Färber | 1 | -3/+0 |
2013-09-25 | misc: Use new rotate functions | Stefan Weil | 1 | -1/+1 |
2013-09-10 | target-arm: Add AArch64 gdbstub support | Alexander Graf | 4 | -1/+80 |
2013-09-10 | target-arm: Add AArch64 translation stub | Alexander Graf | 6 | -4/+178 |
2013-09-10 | target-arm: Prepare translation for AArch64 code | Alexander Graf | 5 | -38/+151 |
2013-09-10 | target-arm: Disable 32 bit CPUs in 64 bit linux-user builds | Peter Maydell | 1 | -2/+7 |
2013-09-10 | target-arm: Add new AArch64CPUInfo base class and subclasses | Peter Maydell | 3 | -0/+124 |
2013-09-10 | target-arm: Pass DisasContext* to gen_set_pc_im() | Peter Maydell | 1 | -13/+13 |
2013-09-10 | target-arm: Fix target_ulong/uint32_t confusions | Alexander Graf | 2 | -6/+7 |
2013-09-10 | target-arm: Export cpu_env | Alexander Graf | 2 | -1/+3 |
2013-09-10 | target-arm: Extract the disas struct to a header file | Alexander Graf | 2 | -23/+28 |
2013-09-10 | target-arm: Abstract out load/store from a vaddr in AArch32 | Peter Maydell | 1 | -124/+210 |
2013-09-10 | target-arm: Implement qmp query-cpu-definitions | Cole Robinson | 1 | -0/+32 |
2013-09-10 | target-arm: fix ARMv7M stack alignment on reset | Sebastian Ottlik | 1 | -1/+1 |
2013-09-10 | target-arm: Avoid "1 << 31" undefined behaviour | Peter Maydell | 2 | -18/+18 |
2013-09-10 | target-arm: Use sextract32() in branch decode | Peter Maydell | 1 | -2/+3 |
2013-09-10 | target-arm: Make '-cpu any' available in linux-user mode only | Peter Maydell | 1 | -0/+4 |
2013-09-03 | Merge remote-tracking branch 'mjt/trivial-patches' into staging | Anthony Liguori | 1 | -0/+4 |
2013-09-02 | tcg: Change tcg_gen_exit_tb argument to uintptr_t | Richard Henderson | 1 | -1/+1 |
2013-09-01 | target-arm: Report unimplemented opcodes (LOG_UNIMP) | Stefan Weil | 1 | -0/+4 |
2013-08-22 | aio / timers: Switch entire codebase to the new timer API | Alex Bligh | 2 | -7/+7 |
2013-08-20 | target-arm: Implement the generic timer | Peter Maydell | 5 | -8/+290 |
2013-08-20 | target-arm: Support coprocessor registers which do I/O | Peter Maydell | 2 | -4/+18 |
2013-08-20 | target-arm: Allow raw_read() and raw_write() to handle 64 bit regs | Peter Maydell | 1 | -2/+10 |
2013-08-20 | target-arm: Make IRQ and FIQ gpio lines on the CPU object | Peter Maydell | 2 | -0/+63 |
2013-08-20 | target-arm: Implement 'int' loglevel | Peter Maydell | 1 | -0/+42 |
2013-07-29 | cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState" | Andreas Färber | 1 | -1/+3 |
2013-07-27 | misc: Use g_assert_not_reached for code which is expected to be unreachable | Stefan Weil | 1 | -1/+1 |
2013-07-27 | cpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XML | Andreas Färber | 1 | -0/+1 |
2013-07-27 | cpu: Introduce CPUClass::gdb_{read,write}_register() | Andreas Färber | 4 | -2/+16 |
2013-07-27 | gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functions | Andreas Färber | 1 | -3/+3 |
2013-07-26 | target-arm: Move cpu_gdb_{read,write}_register() | Andreas Färber | 1 | -0/+94 |
2013-07-26 | cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs | Andreas Färber | 1 | -0/+1 |
2013-07-23 | gdbstub: Change gdb_register_coprocessor() argument to CPUState | Andreas Färber | 1 | -3/+4 |
2013-07-23 | exec: Change cpu_memory_rw_debug() argument to CPUState | Andreas Färber | 1 | -1/+1 |
2013-07-23 | cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook | Andreas Färber | 3 | -4/+11 |
2013-07-23 | gdbstub: Change syscall callback argument to CPUState | Andreas Färber | 1 | -2/+6 |
2013-07-23 | cpu: Move singlestep_enabled field from CPU_COMMON to CPUState | Andreas Färber | 1 | -3/+4 |
2013-07-23 | cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb() | Andreas Färber | 1 | -5/+0 |
2013-07-23 | cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc() | Andreas Färber | 1 | -0/+8 |
2013-07-15 | target-arm: Avoid g_hash_table_get_keys() | Peter Maydell | 1 | -2/+10 |
2013-07-15 | target-arm: avoid undefined behaviour when writing TTBCR | Peter Maydell | 1 | -2/+4 |
2013-07-15 | target-arm/helper.c: Allow const opaques in arm CP | Peter Crosthwaite | 1 | -1/+3 |
2013-07-15 | target-arm/helper.c: Implement MIDR aliases | Peter Crosthwaite | 1 | -5/+11 |
2013-07-15 | target-arm/helper.c: OMAP/StrongARM cp15 crn=0 cleanup | Peter Crosthwaite | 1 | -9/+4 |
2013-07-15 | target-arm: explicitly decode SEVL instruction | Mans Rullgard | 1 | -1/+2 |
2013-07-15 | target-arm: implement LDA/STL instructions | Mans Rullgard | 1 | -10/+119 |
2013-07-15 | target-arm: add feature flag for ARMv8 | Mans Rullgard | 3 | -1/+8 |
2013-07-09 | cpu: Move reset logging to CPUState | Andreas Färber | 1 | -5/+0 |
2013-07-09 | log: Change log_cpu_state[_mask]() argument to CPUState | Andreas Färber | 1 | -1/+1 |
2013-07-09 | target-arm: Change gen_intermediate_code_internal() argument to ARMCPU | Andreas Färber | 1 | -4/+5 |
2013-07-09 | cpu: Drop unnecessary dynamic casts in *_env_get_cpu() | Andreas Färber | 1 | -1/+1 |
2013-07-09 | linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-user | Peter Maydell | 1 | -14/+0 |
2013-07-04 | memory: add ref/unref calls | Paolo Bonzini | 1 | -0/+2 |
2013-06-28 | cpu: Change qemu_init_vcpu() argument to CPUState | Andreas Färber | 1 | -1/+0 |
2013-06-28 | cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks | Andreas Färber | 4 | -3/+10 |
2013-06-25 | target-arm: Make LPAE feature imply V7MP | Peter Maydell | 1 | -1/+1 |
2013-06-25 | target-arm: Use tuple list to sync cp regs with KVM | Peter Maydell | 1 | -70/+33 |
2013-06-25 | target-arm: Reinitialize all KVM VCPU registers on reset | Peter Maydell | 2 | -1/+21 |
2013-06-25 | target-arm: Initialize cpreg list from KVM when using KVM | Peter Maydell | 5 | -6/+245 |
2013-06-25 | target-arm: Convert TCG to using (index,value) list for cp migration | Peter Maydell | 6 | -47/+341 |
2013-06-25 | target-arm: mark up cpregs for no-migrate or raw access | Peter Maydell | 1 | -46/+94 |
2013-06-25 | target-arm: Add raw_readfn and raw_writefn to ARMCPRegInfo | Peter Maydell | 2 | -1/+30 |
2013-06-25 | target-arm: Allow special cpregs to have flags set | Peter Maydell | 1 | -1/+1 |
2013-06-14 | Merge remote-tracking branch 'mjt/trivial-patches-next' into staging | Anthony Liguori | 1 | -0/+4 |
2013-06-14 | Merge remote-tracking branch 'pmaydell/target-arm.next' into staging | Anthony Liguori | 1 | -1/+1 |
2013-06-12 | KVM: ARM: Add dummy kvm_arch_init_irq_routing() | Alexey Kardashevskiy | 1 | -0/+4 |
2013-06-03 | Fix rfe instruction | Peter Chubb | 1 | -1/+1 |
2013-06-01 | Remove unnecessary break statements | Stefan Weil | 1 | -1/+0 |
2013-05-26 | target-arm: Remove gen_{ld,st}* definitions | Peter Maydell | 1 | -46/+0 |
2013-05-26 | target-arm: Remove gen_{ld,st}* from thumb2 decoder | Peter Maydell | 1 | -10/+20 |
2013-05-26 | target-arm: Remove gen_{ld,st}* from Thumb insns | Peter Maydell | 1 | -25/+46 |
2013-05-26 | target-arm: Remove gen_{ld,st}* from basic ARM insns | Peter Maydell | 1 | -32/+69 |
2013-05-26 | target-arm: Remove use of gen_{ld,st}* from ldrex/strex | Peter Maydell | 1 | -13/+18 |
2013-05-26 | target-arm: Remove uses of gen_{ld,st}* from Neon code | Peter Maydell | 1 | -18/+28 |
2013-05-26 | target-arm: Remove uses of gen_{ld,st}* from iWMMXt code | Peter Maydell | 1 | -8/+10 |
2013-05-26 | target-arm: Remove gen_ld64() and gen_st64() | Peter Maydell | 1 | -15/+4 |
2013-05-26 | target-arm: Don't use TCGv when we mean TCGv_i32 | Peter Maydell | 1 | -224/+229 |
2013-05-03 | target-arm: Fix incorrect check of kvm_vcpu_ioctl return value | Peter Maydell | 1 | -2/+2 |
2013-04-19 | target-arm: Correctly restore FPSCR | Peter Maydell | 1 | -7/+41 |
2013-04-19 | target-arm: Add some missing CPU state fields to VMState | Peter Maydell | 1 | -3/+10 |
2013-04-19 | target-arm: port ARM CPU save/load to use VMState | Juan Quintela | 4 | -215/+179 |
2013-04-19 | target-arm: Reinsert missing return statement in ARM mode SRS decode | Peter Chubb | 1 | -0/+1 |
2013-04-15 | arm: fix location of some include files | Peter Maydell | 2 | -2/+2 |
2013-04-08 | hw: move headers to include/ | Paolo Bonzini | 2 | -2/+2 |
2013-03-12 | target-arm: Override do_interrupt for ARMv7-M profile | Andreas Färber | 3 | -6/+19 |
2013-03-12 | cpu: Replace do_interrupt() by CPUClass::do_interrupt method | Andreas Färber | 4 | -5/+10 |
2013-03-12 | cpu: Pass CPUState to cpu_interrupt() | Andreas Färber | 1 | -1/+1 |
2013-03-12 | cpu: Move halted and interrupt_request fields to CPUState | Andreas Färber | 3 | -5/+7 |
2013-03-05 | target-arm: Use MemoryListener to identify GIC base address for KVM | Peter Maydell | 2 | -0/+119 |
2013-03-05 | ARM KVM: save and load VFP registers from kernel | Peter Maydell | 1 | -3/+75 |
2013-03-05 | ARM: KVM: Add support for KVM on ARM architecture | Christoffer Dall | 4 | -1/+337 |
2013-03-05 | target-arm: Drop CPUARMState* argument from bank_number() | Peter Maydell | 1 | -7/+6 |
2013-03-05 | target-arm: Don't decode RFE or SRS on M profile cores | Peter Maydell | 1 | -2/+3 |
2013-03-05 | target-arm: Factor out handling of SRS instruction | Peter Maydell | 1 | -67/+69 |
2013-03-03 | gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end | Peter Maydell | 1 | -2/+2 |
2013-03-03 | cpu: Introduce ENV_OFFSET macros | Andreas Färber | 1 | -0/+2 |
2013-02-25 | target-arm: Fix sbc_CC carry | Richard Henderson | 1 | -24/+4 |
2013-02-25 | arm/translate.c: Fix adc_CC/sbc_CC implementation | Peter Crosthwaite | 1 | -2/+2 |
2013-02-23 | target-arm: Implement sbc_cc inline | Richard Henderson | 3 | -25/+39 |
2013-02-23 | target-arm: Implement adc_cc inline | Richard Henderson | 3 | -21/+34 |
2013-02-23 | target-arm: Use add2 in gen_add_CC | Richard Henderson | 1 | -4/+3 |
2013-02-23 | target-arm: Use mul[us]2 and add2 in umlal et al | Richard Henderson | 3 | -19/+14 |
2013-02-23 | target-arm: Use mul[us]2 in gen_mul[us]_i64_i32 | Richard Henderson | 1 | -16/+22 |
2013-02-16 | cpu: Add CPUArchState pointer to CPUState | Andreas Färber | 1 | -0/+2 |
2013-02-16 | target-arm: Move TCG initialization to ARMCPU initfn | Andreas Färber | 2 | -6/+6 |
2013-02-16 | target-arm: Update ARMCPU to QOM realizefn | Andreas Färber | 4 | -12/+27 |
2013-01-30 | target-arm: Rename CPU types | Andreas Färber | 2 | -5/+14 |
2013-01-30 | target-arm: Fix TCG temp leaks for WI and UNDEF VFP sysreg writes | Peter Maydell | 1 | -1/+4 |
2013-01-27 | target-arm: Catch attempt to instantiate abstract type in cpu_init() | Andreas Färber | 1 | -1/+2 |
2013-01-27 | target-arm: Detect attempt to instantiate non-CPU type in cpu_init() | Andreas Färber | 2 | -2/+21 |
2013-01-15 | cpu: Move cpu_index field to CPUState | Andreas Färber | 2 | -2/+3 |
2013-01-11 | target-arm: Fix SWI (SVC) instruction in M profile. | Alex_Rozenman@mentor.com | 1 | -1/+1 |
2013-01-11 | target-arm: use type_register() instead of type_register_static() | Eduardo Habkost | 1 | -1/+1 |
2012-12-23 | Merge branch 'master' of git://git.qemu.org/qemu into qom-cpu | Andreas Färber | 10 | -24/+24 |
2012-12-19 | cpu: Introduce CPUListState struct | Andreas Färber | 1 | -7/+2 |
2012-12-19 | fpu: move public header file to include/fpu | Paolo Bonzini | 1 | -1/+1 |
2012-12-19 | softmmu: move include files to include/sysemu/ | Paolo Bonzini | 2 | -2/+2 |
2012-12-19 | misc: move include files to include/qemu/ | Paolo Bonzini | 2 | -3/+3 |
2012-12-19 | qom: move include files to include/qom/ | Paolo Bonzini | 1 | -1/+1 |
2012-12-19 | exec: move include files to include/exec/ | Paolo Bonzini | 8 | -16/+16 |
2012-12-19 | build: kill libdis, move disassemblers to disas/ | Paolo Bonzini | 1 | -1/+1 |
2012-12-16 | exec: refactor cpu_restore_state | Blue Swirl | 1 | -7/+1 |
2012-12-08 | TCG: Use gen_opc_instr_start from context instead of global variable. | Evgeny Voevodin | 1 | -3/+3 |
2012-12-08 | TCG: Use gen_opc_icount from context instead of global variable. | Evgeny Voevodin | 1 | -1/+1 |
2012-12-08 | TCG: Use gen_opc_pc from context instead of global variable. | Evgeny Voevodin | 1 | -2/+2 |
2012-11-17 | TCG: Use gen_opc_buf from context instead of global variable. | Evgeny Voevodin | 1 | -3/+3 |
2012-11-17 | TCG: Use gen_opc_ptr from context instead of global variable. | Evgeny Voevodin | 1 | -4/+4 |
2012-11-10 | disas: avoid using cpu_single_env | Blue Swirl | 1 | -1/+1 |
2012-10-31 | cpus: Pass CPUState to [qemu_]cpu_has_work() | Andreas Färber | 1 | -1/+3 |
2012-10-28 | target-arm: rename helper flags | Aurelien Jarno | 1 | -8/+8 |
2012-10-24 | target-arm: Remove out of date FIXME regarding saturating arithmetic | Peter Maydell | 1 | -2/+0 |
2012-10-24 | target-arm: Implement abs_i32 inline rather than as a helper | Peter Maydell | 3 | -8/+9 |
2012-10-24 | target-arm: Use TCG operation for Neon 64 bit negation | Peter Maydell | 3 | -8/+3 |
2012-10-24 | arm-semi.c: Handle get/put_user() failure accessing arguments | Peter Maydell | 1 | -61/+106 |
2012-10-23 | Rename target_phys_addr_t to hwaddr | Avi Kivity | 1 | -14/+14 |
2012-10-19 | target-arm/neon_helper: Remove obsolete FIXME comment | Peter Maydell | 1 | -1/+0 |
2012-10-17 | target-arm/translate: Fix RRX operands | Peter Crosthwaite | 1 | -1/+1 |
2012-10-05 | target-arm: Drop unused DECODE_CPREG_CRN macro | Peter Maydell | 1 | -2/+0 |
2012-10-05 | target-arm: use deposit instead of hardcoded version | Aurelien Jarno | 1 | -14/+6 |
2012-10-05 | target-arm: mark a few integer helpers const and pure | Aurelien Jarno | 1 | -9/+10 |
2012-10-05 | target-arm: convert sar, shl and shr helpers to TCG | Aurelien Jarno | 3 | -33/+43 |
2012-10-05 | target-arm: convert add_cc and sub_cc helpers to TCG | Aurelien Jarno | 3 | -40/+48 |
2012-10-05 | target-arm: use globals for CC flags | Aurelien Jarno | 1 | -81/+46 |
2012-10-05 | target-arm: Reinstate display of VFP registers in cpu_dump_state | Peter Maydell | 1 | -26/+16 |
2012-09-27 | Emit debug_insn for CPU_LOG_TB_OP_OPT as well. | Richard Henderson | 1 | -1/+1 |
2012-09-15 | target-arm: final conversion to AREG0 free mode | Blue Swirl | 5 | -20/+15 |
2012-09-15 | target-arm: convert remaining helpers | Blue Swirl | 3 | -125/+125 |
2012-09-15 | target-arm: convert void helpers | Blue Swirl | 3 | -18/+18 |
2012-09-10 | target-arm: Fix potential buffer overflow | Stefan Weil | 1 | -2/+2 |
2012-08-22 | arm-semi: don't leak 1KB user string lock buffer upon TARGET_SYS_OPEN | Jim Meyering | 1 | -6/+7 |
2012-08-10 | target-arm: Fix typos in comments | Peter Maydell | 6 | -24/+24 |
2012-08-10 | arm: translate: comment typo - s/middel/middle/ | Peter A. G. Crosthwaite | 1 | -1/+1 |
2012-07-12 | target-arm: Add support for long format translation table walks | Peter Maydell | 1 | -0/+182 |
2012-07-12 | target-arm: Implement TTBCR changes for LPAE | Peter Maydell | 1 | -1/+14 |
2012-07-12 | target-arm: Implement long-descriptor PAR format | Peter Maydell | 1 | -10/+69 |
2012-07-12 | target-arm: Use target_phys_addr_t in get_phys_addr() | Peter Maydell | 1 | -14/+15 |
2012-07-12 | target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAE | Peter Maydell | 3 | -3/+87 |
2012-07-12 | target-arm: Add 64 bit variants of DBGDRAR and DBGDSAR for LPAE | Peter Maydell | 1 | -0/+5 |
2012-07-12 | target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registers | Peter Maydell | 1 | -0/+16 |
2012-07-12 | target-arm: Extend feature flags to 64 bits | Peter Maydell | 3 | -6/+6 |
2012-07-12 | target-arm: Implement privileged-execute-never (PXN) | Peter Maydell | 3 | -12/+26 |
2012-07-12 | ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bits | Peter Maydell | 1 | -1/+1 |
2012-07-12 | target-arm: Fix TCG temp handling in 64 bit cp writes | Peter Maydell | 1 | -0/+2 |
2012-07-12 | target-arm: Fix some copy-and-paste errors in cp register names | Peter Maydell | 1 | -3/+3 |
2012-07-12 | target-arm: Fix typo that meant TTBR1 accesses went to TTBR0 | Peter Maydell | 1 | -1/+1 |
2012-07-12 | target-arm: Fix CP15 based WFI | Paul Brook | 1 | -1/+1 |
2012-06-20 | target-arm: Remove ARM_CPUID_* macros | Peter Maydell | 2 | -52/+25 |
2012-06-20 | target-arm: Remove remaining old cp15 infrastructure | Peter Maydell | 3 | -100/+1 |
2012-06-20 | target-arm: Move block cache ops to new cp15 framework | Peter Maydell | 2 | -6/+14 |
2012-06-20 | target-arm: Remove c0_cachetype CPUARMState field | Peter Maydell | 2 | -4/+1 |
2012-06-20 | target-arm: Convert final ID registers | Peter Maydell | 2 | -50/+68 |
2012-06-20 | target-arm: Convert MPIDR | Peter Maydell | 3 | -22/+31 |
2012-06-20 | target-arm: Convert cp15 cache ID registers | Peter Maydell | 3 | -32/+33 |
2012-06-20 | target-arm: Convert cp15 crn=0 crm={1,2} feature registers | Peter Maydell | 3 | -24/+54 |
2012-06-20 | target-arm: Convert cp15 crn=1 registers | Peter Maydell | 3 | -76/+61 |
2012-06-20 | target-arm: Convert cp15 crn=9 registers | Peter Maydell | 2 | -79/+59 |
2012-06-20 | target-arm: Convert cp15 crn=6 registers | Peter Maydell | 2 | -53/+45 |
2012-06-20 | target-arm: convert cp15 crn=7 registers | Peter Maydell | 3 | -11/+74 |
2012-06-20 | target-arm: Convert cp15 VA-PA translation registers | Peter Maydell | 1 | -43/+65 |
2012-06-20 | target-arm: Convert cp15 MMU TLB control | Peter Maydell | 1 | -20/+43 |
2012-06-20 | target-arm: Convert cp15 crn=15 registers | Peter Maydell | 3 | -117/+126 |
2012-06-20 | target-arm: Convert cp15 crn=10 registers | Peter Maydell | 1 | -6/+5 |
2012-06-20 | target-arm: Convert cp15 crn=13 registers | Peter Maydell | 1 | -30/+31 |
2012-06-20 | target-arm: Convert cp15 crn=2 registers | Peter Maydell | 2 | -56/+33 |
2012-06-20 | target-arm: Convert MMU fault status cp15 registers | Peter Maydell | 1 | -81/+107 |
2012-06-20 | target-arm: Convert cp15 c3 register | Peter Maydell | 1 | -6/+12 |
2012-06-20 | target-arm: Convert generic timer cp15 regs | Peter Maydell | 1 | -12/+11 |
2012-06-20 | target-arm: Convert performance monitor registers | Peter Maydell | 3 | -149/+158 |
2012-06-20 | target-arm: Convert TLS registers | Peter Maydell | 2 | -58/+19 |
2012-06-20 | target-arm: Convert WFI/barriers special cases to cp_reginfo | Peter Maydell | 2 | -51/+42 |