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authorTony Luck <tony.luck@intel.com>2022-06-23 16:21:02 -0700
committerAndi Kleen <ak@linux.intel.com>2022-06-27 17:20:58 -0700
commitb54ee05056a76e0d3d859ebf71f8a25238401094 (patch)
tree662c7ab8036d8aca796532c8004ec58196328558
parent06ec5e6b61c859bc8970e1260a7c1cf122b2b2e7 (diff)
downloadmcelog-b54ee05056a76e0d3d859ebf71f8a25238401094.tar.gz
mcelog: Drop CASE_INTEL define
By ordering the values in "enum cputype" code can replace a switch with an ever growing number of cases with a simple: if (cputype >= CPU_INTEL) Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Andi Kleen <ak@linux.intel.com>
-rw-r--r--intel.c6
-rw-r--r--intel.h37
-rw-r--r--mcelog.c42
-rwxr-xr-xmkcputype2
4 files changed, 19 insertions, 68 deletions
diff --git a/intel.c b/intel.c
index 450d603..4621334 100644
--- a/intel.c
+++ b/intel.c
@@ -79,11 +79,7 @@ enum cputype select_intel_cputype(int family, int model)
int is_intel_cpu(int cpu)
{
- switch (cpu) {
- CASE_INTEL_CPUS:
- return 1;
- }
- return 0;
+ return cpu >= CPU_INTEL;
}
static int intel_memory_error(struct mce *m, unsigned recordlen)
diff --git a/intel.h b/intel.h
index db2d22b..550b1ac 100644
--- a/intel.h
+++ b/intel.h
@@ -4,40 +4,3 @@ int mce_filter_intel(struct mce *m, unsigned recordlen);
void intel_cpu_init(enum cputype cpu);
extern int memory_error_support;
-
-#define CASE_INTEL_CPUS \
- case CPU_P6OLD: \
- case CPU_CORE2: \
- case CPU_NEHALEM: \
- case CPU_DUNNINGTON: \
- case CPU_TULSA: \
- case CPU_P4: \
- case CPU_INTEL: \
- case CPU_XEON75XX: \
- case CPU_SANDY_BRIDGE_EP: \
- case CPU_SANDY_BRIDGE: \
- case CPU_IVY_BRIDGE: \
- case CPU_IVY_BRIDGE_EPEX: \
- case CPU_HASWELL: \
- case CPU_HASWELL_EPEX: \
- case CPU_BROADWELL: \
- case CPU_BROADWELL_DE: \
- case CPU_BROADWELL_EPEX: \
- case CPU_ATOM: \
- case CPU_KNIGHTS_LANDING: \
- case CPU_KNIGHTS_MILL: \
- case CPU_SKYLAKE: \
- case CPU_SKYLAKE_XEON: \
- case CPU_KABYLAKE: \
- case CPU_DENVERTON: \
- case CPU_ICELAKE_XEON: \
- case CPU_ICELAKE_DE: \
- case CPU_TREMONT_D: \
- case CPU_COMETLAKE: \
- case CPU_TIGERLAKE: \
- case CPU_ROCKETLAKE: \
- case CPU_ALDERLAKE: \
- case CPU_LAKEFIELD: \
- case CPU_SAPPHIRERAPIDS: \
- case CPU_RAPTORLAKE
-
diff --git a/mcelog.c b/mcelog.c
index a383c0d..05d66e9 100644
--- a/mcelog.c
+++ b/mcelog.c
@@ -123,16 +123,14 @@ static char *bankname(unsigned bank)
if (bank >= MCE_EXTENDED_BANK)
return extended_bankname(bank);
- switch (cputype) {
- case CPU_K8:
- return k8_bank_name(bank);
- CASE_INTEL_CPUS:
+ if (cputype >= CPU_INTEL)
return intel_bank_name(bank);
+ else if (cputype == CPU_K8)
+ return k8_bank_name(bank);
+
/* add banks of other cpu types here */
- default:
- sprintf(numeric, "BANK %d", bank);
- return numeric;
- }
+ sprintf(numeric, "BANK %d", bank);
+ return numeric;
}
static void resolveaddr(unsigned long long addr)
@@ -146,17 +144,14 @@ static int mce_filter(struct mce *m, unsigned recordlen)
{
if (!filter_bogus)
return 1;
+
/* Filter out known broken MCEs */
- switch (cputype) {
- case CPU_K8:
- return mce_filter_k8(m);
- /* add more buggy CPUs here */
- CASE_INTEL_CPUS:
+ if (cputype >= CPU_INTEL)
return mce_filter_intel(m, recordlen);
- default:
- case CPU_GENERIC:
- return 1;
- }
+ else if (cputype == CPU_K8)
+ return mce_filter_k8(m);
+
+ return 1;
}
static void print_tsc(int cpunum, __u64 tsc, unsigned long time)
@@ -347,17 +342,12 @@ static void dump_mce(struct mce *m, unsigned recordlen)
time_t t = m->time;
Wprintf("TIME %llu %s", m->time, ctime(&t));
}
- switch (cputype) {
- case CPU_K8:
+ if (cputype == CPU_K8)
decode_k8_mc(m, &ismemerr);
- break;
- CASE_INTEL_CPUS:
+ else if (cputype >= CPU_INTEL)
decode_intel_mc(m, cputype, &ismemerr, recordlen);
- break;
- /* add handlers for other CPUs here */
- default:
- break;
- }
+ /* else add handlers for other CPUs here */
+
/* decode all status bits here */
Wprintf("STATUS %llx MCGSTATUS %llx\n", m->status, m->mcgstatus);
n = 0;
diff --git a/mkcputype b/mkcputype
index 10add2c..a3c8db6 100755
--- a/mkcputype
+++ b/mkcputype
@@ -5,6 +5,8 @@ awk -F\| 'BEGIN {
print "enum cputype {" > "cputype.tmp"
print "\tCPU_GENERIC," > "cputype.tmp"
print "\tCPU_K8," > "cputype.tmp"
+
+ print "\n\n/* Insert any new non-intel CPU models before this line */\n\n" > "cputype.tmp"
print "\tCPU_INTEL," > "cputype.tmp"
print "\tCPU_P4," > "cputype.tmp"
print "\tCPU_TULSA," > "cputype.tmp"