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authorYinghai Lu <yinghai@kernel.org>2012-09-17 22:25:34 -0700
committerYinghai Lu <yinghai@kernel.org>2012-09-17 22:25:34 -0700
commitf43a3cd9df54e3e0daef270e90dd3d30f57c0808 (patch)
tree514e06353a15dae3e843fa569e77eb9c928c050d
parent5f2d29510447220f5e770487838f907c978803c2 (diff)
downloadlinux-yinghai-f43a3cd9df54e3e0daef270e90dd3d30f57c0808.tar.gz
intel-gtt: Read 64bit for gmar_bus_addr
That bar could be 64bit pref mem. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Cc: David Airlie <airlied@linux.ie> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/char/agp/intel-gtt.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 58e32f7c322956..87beca71562c9f 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -649,8 +649,10 @@ static void intel_gtt_cleanup(void)
static int intel_gtt_init(void)
{
u32 gma_addr;
+ u32 addr_hi = 0;
u32 gtt_map_size;
int ret;
+ int pos;
ret = intel_private.driver->setup();
if (ret != 0)
@@ -696,13 +698,17 @@ static int intel_gtt_init(void)
}
if (INTEL_GTT_GEN <= 2)
- pci_read_config_dword(intel_private.pcidev, I810_GMADDR,
- &gma_addr);
+ pos = I810_GMADDR;
else
- pci_read_config_dword(intel_private.pcidev, I915_GMADDR,
- &gma_addr);
+ pos = I915_GMADDR;
+
+ pci_read_config_dword(intel_private.pcidev, pos, &gma_addr);
+
+ if (gma_addr & PCI_BASE_ADDRESS_MEM_TYPE_64)
+ pci_read_config_dword(intel_private.pcidev, pos + 4, &addr_hi);
intel_private.base.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);
+ intel_private.base.gma_bus_addr |= (u64)addr_hi << 32;
return 0;
}