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-rw-r--r--arch/sh/mm/Kconfig13
-rw-r--r--arch/sh/mm/init.c3
-rw-r--r--arch/sh/mm/tlb-flush.c18
3 files changed, 26 insertions, 8 deletions
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index b445d02075e895..9dd606464d2343 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -223,6 +223,19 @@ config 32BIT
32-bits through the SH-4A PMB. If this is not set, legacy
29-bit physical addressing will be used.
+config VSYSCALL
+ bool "Support vsyscall page"
+ depends on MMU
+ default y
+ help
+ This will enable support for the kernel mapping a vDSO page
+ in process space, and subsequently handing down the entry point
+ to the libc through the ELF auxiliary vector.
+
+ From the kernel side this is used for the signal trampoline.
+ For systems with an MMU that can afford to give up a page,
+ (the default value) say Y.
+
choice
prompt "HugeTLB page size"
depends on HUGETLB_PAGE && CPU_SH4 && MMU
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index ad182b31d846b8..7154d1ce978590 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -286,6 +286,9 @@ void __init mem_init(void)
initsize >> 10);
p3_cache_init();
+
+ /* Initialize the vDSO */
+ vsyscall_init();
}
void free_initmem(void)
diff --git a/arch/sh/mm/tlb-flush.c b/arch/sh/mm/tlb-flush.c
index fd7e42bcaa4033..73ec7f6084fa40 100644
--- a/arch/sh/mm/tlb-flush.c
+++ b/arch/sh/mm/tlb-flush.c
@@ -14,12 +14,12 @@
void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
{
- if (vma->vm_mm && vma->vm_mm->context != NO_CONTEXT) {
+ if (vma->vm_mm && vma->vm_mm->context.id != NO_CONTEXT) {
unsigned long flags;
unsigned long asid;
unsigned long saved_asid = MMU_NO_ASID;
- asid = vma->vm_mm->context & MMU_CONTEXT_ASID_MASK;
+ asid = vma->vm_mm->context.id & MMU_CONTEXT_ASID_MASK;
page &= PAGE_MASK;
local_irq_save(flags);
@@ -39,20 +39,21 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
{
struct mm_struct *mm = vma->vm_mm;
- if (mm->context != NO_CONTEXT) {
+ if (mm->context.id != NO_CONTEXT) {
unsigned long flags;
int size;
local_irq_save(flags);
size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */
- mm->context = NO_CONTEXT;
+ mm->context.id = NO_CONTEXT;
if (mm == current->mm)
activate_context(mm);
} else {
- unsigned long asid = mm->context&MMU_CONTEXT_ASID_MASK;
+ unsigned long asid;
unsigned long saved_asid = MMU_NO_ASID;
+ asid = mm->context.id & MMU_CONTEXT_ASID_MASK;
start &= PAGE_MASK;
end += (PAGE_SIZE - 1);
end &= PAGE_MASK;
@@ -81,9 +82,10 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end)
if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */
flush_tlb_all();
} else {
- unsigned long asid = init_mm.context&MMU_CONTEXT_ASID_MASK;
+ unsigned long asid;
unsigned long saved_asid = get_asid();
+ asid = init_mm.context.id & MMU_CONTEXT_ASID_MASK;
start &= PAGE_MASK;
end += (PAGE_SIZE - 1);
end &= PAGE_MASK;
@@ -101,11 +103,11 @@ void flush_tlb_mm(struct mm_struct *mm)
{
/* Invalidate all TLB of this process. */
/* Instead of invalidating each TLB, we get new MMU context. */
- if (mm->context != NO_CONTEXT) {
+ if (mm->context.id != NO_CONTEXT) {
unsigned long flags;
local_irq_save(flags);
- mm->context = NO_CONTEXT;
+ mm->context.id = NO_CONTEXT;
if (mm == current->mm)
activate_context(mm);
local_irq_restore(flags);