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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-22 10:18:06 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-22 10:18:06 -0700
commit21b7ef0c6c62a14bc8e1c8c0af4e1f0ba3a56d66 (patch)
tree71e53bd0464abd14d6b37c5b4487eaa438d46b65 /include
parent5c5d281a93e9816966b6131ccec19519dab0e103 (diff)
parentb179fb8ca57590eeb0a5d6c8dc99f91773f09c73 (diff)
downloadlinux-21b7ef0c6c62a14bc8e1c8c0af4e1f0ba3a56d66.tar.gz
Merge rsync://rsync.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6.git
Diffstat (limited to 'include')
-rw-r--r--include/asm-sparc64/mostek.h6
-rw-r--r--include/asm-sparc64/pgtable.h5
2 files changed, 8 insertions, 3 deletions
diff --git a/include/asm-sparc64/mostek.h b/include/asm-sparc64/mostek.h
index ccf2f5f82d7f5..1f9b1356a48e9 100644
--- a/include/asm-sparc64/mostek.h
+++ b/include/asm-sparc64/mostek.h
@@ -38,7 +38,7 @@
*
* We now deal with physical addresses for I/O to the chip. -DaveM
*/
-static __inline__ u8 mostek_read(unsigned long addr)
+static __inline__ u8 mostek_read(void * __iomem addr)
{
u8 ret;
@@ -48,7 +48,7 @@ static __inline__ u8 mostek_read(unsigned long addr)
return ret;
}
-static __inline__ void mostek_write(unsigned long addr, u8 val)
+static __inline__ void mostek_write(void * __iomem addr, u8 val)
{
__asm__ __volatile__("stba %0, [%1] %2"
: /* no outputs */
@@ -67,7 +67,7 @@ static __inline__ void mostek_write(unsigned long addr, u8 val)
#define MOSTEK_YEAR 0x07ffUL
extern spinlock_t mostek_lock;
-extern unsigned long mstk48t02_regs;
+extern void *__iomem mstk48t02_regs;
/* Control register values. */
#define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h
index af9bf175a223c..ae2cd5b09a7cc 100644
--- a/include/asm-sparc64/pgtable.h
+++ b/include/asm-sparc64/pgtable.h
@@ -416,6 +416,11 @@ extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
unsigned long pfn,
unsigned long size, pgprot_t prot);
+/* Clear virtual and physical cachability, set side-effect bit. */
+#define pgprot_noncached(prot) \
+ (__pgprot((pgprot_val(prot) & ~(_PAGE_CP | _PAGE_CV)) | \
+ _PAGE_E))
+
/*
* For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
* its high 4 bits. These macros/functions put it there or get it from there.