diff options
| author | Rasmus Villemoes <linux@rasmusvillemoes.dk> | 2023-06-15 12:58:24 +0200 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2023-08-16 01:27:01 +0200 |
| commit | a11b6c460620f7fb5fae4c3aee5a5ba2e1e1129b (patch) | |
| tree | 72f11f7cd2e01bd630103dfee164a4294990b310 /drivers/rtc | |
| parent | eccebd813874b748ac4e79a9fe4c7290117ad3be (diff) | |
| download | linux-a11b6c460620f7fb5fae4c3aee5a5ba2e1e1129b.tar.gz | |
rtc: isl12022: trigger battery level detection during probe
Since the meaning of the SR_LBAT85 and SR_LBAT75 bits are different in
battery backup mode, they may very well be set after power on, and
stay set for up to a minute (i.e. until the battery detection in VDD
mode happens when the seconds counter hits 59). This would mean that
userspace doing a ioctl(RTC_VL_READ) early on could get a false
positive.
The battery level detection can also be triggered by explicitly
writing a 1 to the TSE bit in the BETA register. Do that once during
boot. Empirically, this does not immediately update the bits in
the status register (i.e., an immediate read of SR after this write
can still show stale values), but the update is done after a few
milliseconds, so certainly before the RTC device gets registered and
userspace has a chance of doing the ioctl() on this device.
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Link: https://lore.kernel.org/r/20230615105826.411953-7-linux@rasmusvillemoes.dk
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'drivers/rtc')
| -rw-r--r-- | drivers/rtc/rtc-isl12022.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/rtc/rtc-isl12022.c b/drivers/rtc/rtc-isl12022.c index 0ed28b57bcd89..a816c5447295d 100644 --- a/drivers/rtc/rtc-isl12022.c +++ b/drivers/rtc/rtc-isl12022.c @@ -272,6 +272,16 @@ static void isl12022_set_trip_levels(struct device *dev) ret = regmap_update_bits(regmap, ISL12022_REG_PWR_VBAT, mask, val); if (ret) dev_warn(dev, "unable to set battery alarm levels: %d\n", ret); + + /* + * Force a write of the TSE bit in the BETA register, in order + * to trigger an update of the LBAT75 and LBAT85 bits in the + * status register. In battery backup mode, those bits have + * another meaning, so without this, they may contain stale + * values for up to a minute after power-on. + */ + regmap_write_bits(regmap, ISL12022_REG_BETA, + ISL12022_BETA_TSE, ISL12022_BETA_TSE); } static int isl12022_probe(struct i2c_client *client) |