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authorPaul Cercueil <paul@crapouillou.net>2023-01-29 12:04:42 +0000
committerAlexandre Belloni <alexandre.belloni@bootlin.com>2023-02-09 23:38:00 +0100
commit5ddfa148de8cf5491fd1c89522c7cad859db8c88 (patch)
treef2a8edf51c96d2c1a203e2da6639c386aa35b862 /drivers/rtc/Kconfig
parentff6fd3770e9687d7b849a0e826a32563bfcb98da (diff)
downloadlinux-5ddfa148de8cf5491fd1c89522c7cad859db8c88.tar.gz
rtc: jz4740: Register clock provider for the CLK32K pin
On JZ4770 and JZ4780, the CLK32K pin is configurable. By default, it is configured as a GPIO in input mode, and its value can be read through GPIO PD14. With this change, clients can now request the 32 kHz clock on the CLK32K pin, through Device Tree. This clock is simply a pass-through of the input oscillator's clock with enable/disable operations. This will permit the WiFi/Bluetooth chip to work on the MIPS CI20 board, which does source one of its clocks from the CLK32K pin. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20230129120442.22858-5-paul@crapouillou.net Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'drivers/rtc/Kconfig')
-rw-r--r--drivers/rtc/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 677d2601d3057..d2b6d20a67454 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1690,7 +1690,7 @@ config RTC_DRV_MPC5121
config RTC_DRV_JZ4740
tristate "Ingenic JZ4740 SoC"
depends on MIPS || COMPILE_TEST
- depends on OF
+ depends on OF && COMMON_CLK
help
If you say yes here you get support for the Ingenic JZ47xx SoCs RTC
controllers.