diff options
| author | Matt Carlson <mcarlson@broadcom.com> | 2010-09-15 08:59:53 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-09-15 14:16:10 -0700 |
| commit | 41a8a7ee4a78216962f3afcea5968c04d0ab3b08 (patch) | |
| tree | 9caf37cafecfabdce77b3af8c200bb1723201565 /drivers/net/tg3.c | |
| parent | 21a4591794c82c1a73f9d45d6400f878648261e3 (diff) | |
| download | linux-41a8a7ee4a78216962f3afcea5968c04d0ab3b08.tar.gz | |
tg3: Fix read DMA FIFO overruns on recent devices
Earlier versions of tg3 devices had a problem where the read DMA FIFO
could be overrun in certain edge conditions. The fix was to limit the
number of rx BDs the hardware would fetch at a time. For later devices
(5761, 5784 and later ASIC revs), there is a hardware fix that must be
enabled to fix the same problem. This patch adds that hardware fix.
There is a gap in the ASIC revision lineage where neither fix is
applied. This is intentional as these ASIC revisions are not afflicted
by the bug.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
| -rw-r--r-- | drivers/net/tg3.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 9f6ffffc8376a..c3a430cfbe002 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -8015,6 +8015,16 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780) rdmac_mode |= RDMAC_MODE_IPV6_LSO_EN; + if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 || + GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 || + GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 || + GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 || + (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)) { + val = tr32(TG3_RDMA_RSRVCTRL_REG); + tw32(TG3_RDMA_RSRVCTRL_REG, + val | TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX); + } + /* Receive/send statistics. */ if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) { val = tr32(RCVLPC_STATS_ENABLE); |