diff options
| author | Andy Fleming <afleming@freescale.com> | 2006-04-02 17:42:40 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2006-04-04 16:09:18 -0500 |
| commit | 591f0a4287d0de243493fd0c133c862e1d1f1c97 (patch) | |
| tree | 02ee295688f70c00e8034139d1966b217bb7725e /arch/powerpc/platforms/85xx/mpc85xx_cds.h | |
| parent | 6246b6128bbe34d0752f119cf7c5111c85fe481d (diff) | |
| download | linux-591f0a4287d0de243493fd0c133c862e1d1f1c97.tar.gz | |
Add 85xx CDS to arch/powerpc
This patch adds support for 85xx CDS support to arch/powerpc
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/85xx/mpc85xx_cds.h')
| -rw-r--r-- | arch/powerpc/platforms/85xx/mpc85xx_cds.h | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.h b/arch/powerpc/platforms/85xx/mpc85xx_cds.h new file mode 100644 index 0000000000000..671f54ff185ac --- /dev/null +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.h @@ -0,0 +1,43 @@ +/* + * arch/ppc/platforms/85xx/mpc85xx_cds_common.h + * + * MPC85xx CDS board definitions + * + * Maintainer: Kumar Gala <galak@kernel.crashing.org> + * + * Copyright 2004 Freescale Semiconductor, Inc + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifndef __MACH_MPC85XX_CDS_H__ +#define __MACH_MPC85XX_CDS_H__ + +/* CADMUS info */ +#define CADMUS_BASE (0xf8004000) +#define CADMUS_SIZE (256) +#define CM_VER (0) +#define CM_CSR (1) +#define CM_RST (2) + +/* CDS NVRAM/RTC */ +#define CDS_RTC_ADDR (0xf8000000) +#define CDS_RTC_SIZE (8 * 1024) + +/* PCI interrupt controller */ +#define PIRQ0A MPC85xx_IRQ_EXT0 +#define PIRQ0B MPC85xx_IRQ_EXT1 +#define PIRQ0C MPC85xx_IRQ_EXT2 +#define PIRQ0D MPC85xx_IRQ_EXT3 +#define PIRQ1A MPC85xx_IRQ_EXT11 + +#define NR_8259_INTS 16 +#define CPM_IRQ_OFFSET NR_8259_INTS + +#define MPC85xx_OPENPIC_IRQ_OFFSET 80 + +#endif /* __MACH_MPC85XX_CDS_H__ */ |