diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2023-08-14 10:18:38 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2023-10-10 14:38:18 +0200 |
| commit | 6e29032340b60f7aa7475c8234b17273e4424007 (patch) | |
| tree | 6b457ed2a5ff763fe901c255a474f17f35e6ebc6 /Documentation/arch | |
| parent | 22dc9631625352426cd665f4e3f8fe0d793b2bf5 (diff) | |
| download | linux-6e29032340b60f7aa7475c8234b17273e4424007.tar.gz | |
x86/cpu: Move cpu_l[l2]c_id into topology info
The topology IDs which identify the LLC and L2 domains clearly belong to
the per CPU topology information.
Move them into cpuinfo_x86::cpuinfo_topo and get rid of the extra per CPU
data and the related exports.
This also paves the way to do proper topology evaluation during early boot
because it removes the only per CPU dependency for that.
No functional change.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
Tested-by: Michael Kelley <mikelley@microsoft.com>
Tested-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Arjan van de Ven <arjan@linux.intel.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20230814085112.803864641@linutronix.de
Diffstat (limited to 'Documentation/arch')
| -rw-r--r-- | Documentation/arch/x86/topology.rst | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/Documentation/arch/x86/topology.rst b/Documentation/arch/x86/topology.rst index 88f29bab3ba1cc..08ebf9edbfc1ed 100644 --- a/Documentation/arch/x86/topology.rst +++ b/Documentation/arch/x86/topology.rst @@ -79,9 +79,7 @@ Package-related topology information in the kernel: The maximum possible number of packages in the system. Helpful for per package facilities to preallocate per package information. - - cpu_llc_id: - - A per-CPU variable containing: + - cpuinfo_x86.topo.llc_id: - On Intel, the first APIC ID of the list of CPUs sharing the Last Level Cache |