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| author | Bagas Sanjaya <bagasdotme@gmail.com> | 2023-10-17 16:56:08 +0700 |
|---|---|---|
| committer | Suzuki K Poulose <suzuki.poulose@arm.com> | 2023-11-16 11:35:40 +0000 |
| commit | 9d4408feff89f8d86b8f34339b08ceb5f8400190 (patch) | |
| tree | e29fe78bb67e163ebabb1f5f9a468a891c6788e6 /Documentation/ABI | |
| parent | 350ba15ae187c118979566f1288adb5f69f24230 (diff) | |
| download | linux-9d4408feff89f8d86b8f34339b08ceb5f8400190.tar.gz | |
Documentation: ABI: coresight-tpdm: Fix Bit[3] description indentation
Stephen Rothwell reported htmldocs warnings when merging coresight tree:
Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm:48: ERROR: Unexpected indentation.
Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm:48: WARNING: Block quote ends without a blank line; unexpected unindent.
Fix indentation alignment for Bit[3] list entry in dsb_mode description to
silence above warnings.
Fixes: 018e43ad1eee ("coresight-tpdm: Add node to set dsb programming mode")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Closes: https://lore.kernel.org/linux-next/20231017143324.75387a21@canb.auug.org.au/
Signed-off-by: Bagas Sanjaya <bagasdotme@gmail.com>
Link: https://lore.kernel.org/r/20231017095608.136277-1-bagasdotme@gmail.com
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Diffstat (limited to 'Documentation/ABI')
| -rw-r--r-- | Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm index f07218e788439d..4dd49b159543b6 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm @@ -54,8 +54,8 @@ Description: Accepts the value needs to be greater than 0. What data bits do is listed below. Bit[0:1] : Test mode control bit for choosing the inputs. - Bit[3] : Set to 0 for low performance mode. - Set to 1 for high performance mode. + Bit[3] : Set to 0 for low performance mode. Set to 1 for high + performance mode. Bit[4:8] : Select byte lane for high performance mode. What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_idx |