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authorBard Liao <bardliao@realtek.com>2015-12-18 10:16:23 +0800
committerMark Brown <broonie@kernel.org>2015-12-23 00:36:40 +0000
commitd0d1eedd5ad345f16234311b375bf94d6c90e14b (patch)
tree17b5910cd3cdc43d78d952164af29d07fe03e074
parentcdab0d4ecc1a890aece7102c2074bf73175b9935 (diff)
downloadsound-unstable-d0d1eedd5ad345f16234311b375bf94d6c90e14b.tar.gz
ASoC: rt5677: set PLL_CTRL2 non-volatile
There is a status bit on RT5677_PLL1_CTRL2 and RT5677_PLL2_CTRL2. That's why those registers are set volatile. However, the status bit is currently not used by codec driver. So, it should be no problem if we set them non-volatile. The purpose of setting them non-volatile is to restore the setting after a syspend/resume cycle. Signed-off-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--sound/soc/codecs/rt5677.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index f73fd125e49cd..13fef00e7b255 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -297,8 +297,6 @@ static bool rt5677_volatile_register(struct device *dev, unsigned int reg)
case RT5677_HAP_GENE_CTRL2:
case RT5677_PWR_DSP_ST:
case RT5677_PRIV_DATA:
- case RT5677_PLL1_CTRL2:
- case RT5677_PLL2_CTRL2:
case RT5677_ASRC_22:
case RT5677_ASRC_23:
case RT5677_VAD_CTRL5: