diff options
| author | Alistair Popple <alistair@popple.id.au> | 2014-04-28 18:14:53 +0530 |
|---|---|---|
| committer | Eli Qiao <taget@linux.vnet.ibm.com> | 2014-04-29 13:23:58 +0800 |
| commit | 60e7bd31571159280f7441338d4d74856b70cd3d (patch) | |
| tree | 9d3e7b04f6e787b0f08ad54aee6b88b904cc1bfe | |
| parent | fa68aaa0c8a081651cedd777fd1c3199cc82ff18 (diff) | |
| download | powerkvm-60e7bd31571159280f7441338d4d74856b70cd3d.tar.gz | |
powerpc: Remove timebase resync during split-core operations on DD2.1 chips
The hardware manages the resync during split-core operations, on newer
revisions (DD2.1 and higher). So we don't need to call opal_resync_timebase()
on those systems.
Fixes bz 105856.
[Srivatsa: Added changelog]
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
| -rw-r--r-- | arch/powerpc/platforms/powernv/subcore.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/powerpc/platforms/powernv/subcore.c b/arch/powerpc/platforms/powernv/subcore.c index 1728ed8f28706..34caafea0c387 100644 --- a/arch/powerpc/platforms/powernv/subcore.c +++ b/arch/powerpc/platforms/powernv/subcore.c @@ -119,10 +119,6 @@ * prevents the hardware from unsplitting. Then it sets the appropriate HID bit * to request the split, and spins waiting to see that the split has happened. * - * Once the split has happened thread 0 calls firmware to resync the timebase. - * Although we only do the resync on thread 0 of the core, the hardware deals - * with propagating the updated timebase value to all subcores. - * * Concurrently the secondaries will notice the split. When they do they set up * their SPRs, notably SDR1, and then wait for thread 0 to notify them that the * timebase sync is completed. Once they see that notification they can return @@ -232,7 +228,9 @@ static void split_core(int new_mode) while (!(mfspr(SPRN_HID0) & split_parms[i].mask)) cpu_relax(); - BUG_ON(opal_resync_timebase()); + /* Hardware earlier than DD2.1 does not resync the timebase properly */ + if (PVR_REV(mfspr(SPRN_PVR)) < 0x0201) + BUG_ON(opal_resync_timebase()); set_sync_step(SYNC_STEP_TB_DONE); } @@ -406,7 +404,12 @@ static int subcore_init(void) set_subcores_per_core(1); - if (opal_check_token(OPAL_RESYNC_TIMEBASE) != OPAL_TOKEN_PRESENT) { + /* + * The hardware manages the resync on newer revisions (DD2.1 and higher) + * so we don't need opal_resync_timebase on those systems. + */ + if (opal_check_token(OPAL_RESYNC_TIMEBASE) != OPAL_TOKEN_PRESENT && + PVR_REV(mfspr(SPRN_PVR)) < 0x0201) { pr_err("Disabling split core since opal doesn't support timebase sync.\n"); return 0; /* don't create sysfs file */ |