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author | Paul Gortmaker <paul.gortmaker@windriver.com> | 2020-08-29 12:26:54 -0400 |
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committer | Paul Gortmaker <paul.gortmaker@windriver.com> | 2020-08-29 12:26:54 -0400 |
commit | 6c1f6a4020f7d3f33447452e2ad02850cfca1761 (patch) | |
tree | d18d448f58deec3f4fdec8ebb46cce694885cf97 | |
parent | 96deb8aebd9c3f64c9ebda46184341fc52766180 (diff) | |
download | longterm-queue-5.2-6c1f6a4020f7d3f33447452e2ad02850cfca1761.tar.gz |
mmc: add cadence dependency
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
-rw-r--r-- | queue/mmc-sdhci-cadence-set-SDHCI_QUIRK2_PRESET_VALUE_BROK.patch | 88 | ||||
-rw-r--r-- | queue/series | 1 |
2 files changed, 89 insertions, 0 deletions
diff --git a/queue/mmc-sdhci-cadence-set-SDHCI_QUIRK2_PRESET_VALUE_BROK.patch b/queue/mmc-sdhci-cadence-set-SDHCI_QUIRK2_PRESET_VALUE_BROK.patch new file mode 100644 index 00000000..11a75103 --- /dev/null +++ b/queue/mmc-sdhci-cadence-set-SDHCI_QUIRK2_PRESET_VALUE_BROK.patch @@ -0,0 +1,88 @@ +From 18b587b45c13bb6a07ed0edac15f06892593d07a Mon Sep 17 00:00:00 2001 +From: Masahiro Yamada <yamada.masahiro@socionext.com> +Date: Thu, 12 Mar 2020 19:42:57 +0900 +Subject: [PATCH] mmc: sdhci-cadence: set SDHCI_QUIRK2_PRESET_VALUE_BROKEN for + UniPhier + +commit 18b587b45c13bb6a07ed0edac15f06892593d07a upstream. + +The SDHCI_PRESET_FOR_* registers are not set for the UniPhier platform +integration. (They are all read as zeros). + +Set the SDHCI_QUIRK2_PRESET_VALUE_BROKEN quirk flag. Otherwise, the +High Speed DDR mode on the eMMC controller (MMC_TIMING_MMC_DDR52) +would not work. + +I split the platform data to give no impact to other platforms, +although the UniPhier platform is currently only the upstream user +of this IP. + +The SDHCI_QUIRK2_PRESET_VALUE_BROKEN flag is set if the compatible +string matches to "socionext,uniphier-sd4hc". + +Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/r/20200312104257.21017-1-yamada.masahiro@socionext.com +Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> + +diff --git a/drivers/mmc/host/sdhci-cadence.c b/drivers/mmc/host/sdhci-cadence.c +index 5827d3751b81..e573495f8726 100644 +--- a/drivers/mmc/host/sdhci-cadence.c ++++ b/drivers/mmc/host/sdhci-cadence.c +@@ -11,6 +11,7 @@ + #include <linux/mmc/host.h> + #include <linux/mmc/mmc.h> + #include <linux/of.h> ++#include <linux/of_device.h> + + #include "sdhci-pltfm.h" + +@@ -235,6 +236,11 @@ static const struct sdhci_ops sdhci_cdns_ops = { + .set_uhs_signaling = sdhci_cdns_set_uhs_signaling, + }; + ++static const struct sdhci_pltfm_data sdhci_cdns_uniphier_pltfm_data = { ++ .ops = &sdhci_cdns_ops, ++ .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, ++}; ++ + static const struct sdhci_pltfm_data sdhci_cdns_pltfm_data = { + .ops = &sdhci_cdns_ops, + }; +@@ -334,6 +340,7 @@ static void sdhci_cdns_hs400_enhanced_strobe(struct mmc_host *mmc, + static int sdhci_cdns_probe(struct platform_device *pdev) + { + struct sdhci_host *host; ++ const struct sdhci_pltfm_data *data; + struct sdhci_pltfm_host *pltfm_host; + struct sdhci_cdns_priv *priv; + struct clk *clk; +@@ -350,8 +357,12 @@ static int sdhci_cdns_probe(struct platform_device *pdev) + if (ret) + return ret; + ++ data = of_device_get_match_data(dev); ++ if (!data) ++ data = &sdhci_cdns_pltfm_data; ++ + nr_phy_params = sdhci_cdns_phy_param_count(dev->of_node); +- host = sdhci_pltfm_init(pdev, &sdhci_cdns_pltfm_data, ++ host = sdhci_pltfm_init(pdev, data, + struct_size(priv, phy_params, nr_phy_params)); + if (IS_ERR(host)) { + ret = PTR_ERR(host); +@@ -431,7 +442,10 @@ static const struct dev_pm_ops sdhci_cdns_pm_ops = { + }; + + static const struct of_device_id sdhci_cdns_match[] = { +- { .compatible = "socionext,uniphier-sd4hc" }, ++ { ++ .compatible = "socionext,uniphier-sd4hc", ++ .data = &sdhci_cdns_uniphier_pltfm_data, ++ }, + { .compatible = "cdns,sd4hc" }, + { /* sentinel */ } + }; +-- +2.27.0 + diff --git a/queue/series b/queue/series index b189ace6..1735f0c8 100644 --- a/queue/series +++ b/queue/series @@ -50,6 +50,7 @@ arm64-dts-hisilicon-hikey-fixes-to-comply-with-adi-a.patch drm-etnaviv-fix-ref-count-leak-via-pm_runtime_get_sy.patch drm-nouveau-fix-reference-count-leak-in-nouveau_debu.patch drm-nouveau-fix-multiple-instances-of-reference-coun.patch +mmc-sdhci-cadence-set-SDHCI_QUIRK2_PRESET_VALUE_BROK.patch mmc-sdhci-cadence-do-not-use-hardware-tuning-for-SD-.patch btrfs-fix-lockdep-splat-from-btrfs_dump_space_info.patch usb-mtu3-clear-dual-mode-of-u3port-when-disable-devi.patch |