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authorPaul Gortmaker <paul.gortmaker@windriver.com>2012-03-14 10:30:37 -0400
committerPaul Gortmaker <paul.gortmaker@windriver.com>2012-03-14 10:32:49 -0400
commit601a0539a157b822651e21d53b8751f3b650d212 (patch)
treec0b3c1ee6ce5d3504060e9481177ca0fbe53b19e
parent8e6c238a67b54c2342e9e83b3c78dc06c7686775 (diff)
downloadlongterm-queue-2.6.34-601a0539a157b822651e21d53b8751f3b650d212.tar.gz
AMD: add another ARAT fixup patch
https://lkml.org/lkml/2012/3/14/245 Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
-rw-r--r--queue/series1
-rw-r--r--queue/x86-amd-Do-not-enable-ARAT-feature-on-AMD-processors.patch51
2 files changed, 52 insertions, 0 deletions
diff --git a/queue/series b/queue/series
index 29a21b4..985e44c 100644
--- a/queue/series
+++ b/queue/series
@@ -192,6 +192,7 @@ libertas-fix-cmdpendingq-locking.patch
zorro8390-Fix-regression-caused-during-net_device_op.patch
cifs-add-fallback-in-is_path_accessible-for-old-serv.patch
x86-AMD-Fix-ARAT-feature-setting-again.patch
+x86-amd-Do-not-enable-ARAT-feature-on-AMD-processors.patch
clocksource-Install-completely-before-selecting.patch
tick-Clear-broadcast-active-bit-when-switching-to-on.patch
x86-apic-Fix-spurious-error-interrupts-triggering-on.patch
diff --git a/queue/x86-amd-Do-not-enable-ARAT-feature-on-AMD-processors.patch b/queue/x86-amd-Do-not-enable-ARAT-feature-on-AMD-processors.patch
new file mode 100644
index 0000000..031b9b4
--- /dev/null
+++ b/queue/x86-amd-Do-not-enable-ARAT-feature-on-AMD-processors.patch
@@ -0,0 +1,51 @@
+From 68c8d9a1334cbf3ad09f958888f63bc7f8479b15 Mon Sep 17 00:00:00 2001
+From: Boris Ostrovsky <ostr@amd64.org>
+Date: Thu, 26 May 2011 11:19:52 -0400
+Subject: [PATCH] x86, amd: Do not enable ARAT feature on AMD processors below
+ family 0x12
+
+commit e9cdd343a5e42c43bcda01e609fa23089e026470 upstream.
+
+Commit b87cf80af3ba4b4c008b4face3c68d604e1715c6 added support for
+ARAT (Always Running APIC timer) on AMD processors that are not
+affected by erratum 400. This erratum is present on certain processor
+families and prevents APIC timer from waking up the CPU when it
+is in a deep C state, including C1E state.
+
+Determining whether a processor is affected by this erratum may
+have some corner cases and handling these cases is somewhat
+complicated. In the interest of simplicity we won't claim ARAT
+support on processor families below 0x12 and will go back to
+broadcasting timer when going idle.
+
+Signed-off-by: Boris Ostrovsky <ostr@amd64.org>
+Link: http://lkml.kernel.org/r/1306423192-19774-1-git-send-email-ostr@amd64.org
+Tested-by: Boris Petkov <borislav.petkov@amd.com>
+Cc: Hans Rosenfeld <Hans.Rosenfeld@amd.com>
+Cc: Andreas Herrmann <Andreas.Herrmann3@amd.com>
+Cc: Chuck Ebbert <cebbert@redhat.com>
+Cc: stable@kernel.org # 32.x, 38.x, 39.x
+Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
+Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+
+diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
+index 76a7f76..770346d 100644
+--- a/arch/x86/kernel/cpu/amd.c
++++ b/arch/x86/kernel/cpu/amd.c
+@@ -566,8 +566,11 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
+ }
+ #endif
+
+- /* As a rule processors have APIC timer running in deep C states */
+- if (c->x86 > 0xf && !cpu_has_amd_erratum(amd_erratum_400))
++ /*
++ * Family 0x12 and above processors have APIC timer
++ * running in deep C states.
++ */
++ if (c->x86 > 0x11)
+ set_cpu_cap(c, X86_FEATURE_ARAT);
+
+ /*
+--
+1.7.9.3
+