diff options
| author | Paul Burton <paul.burton@mips.com> | 2018-05-10 15:21:50 -0700 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2018-05-10 15:34:50 -0700 |
| commit | 8c6963191ef11e757de85faf4b427639cc699609 (patch) | |
| tree | 1d2dd02a0d3527d8aa2b290930b3497e8f1aca57 | |
| parent | ea386a6fb88feb24e1d6d5316e9e1aa962e64e6f (diff) | |
| download | linux-wip-pch_gbe.tar.gz | |
MIPS: Boston: Adjust DT for pch_gbe PHY supportwip-pch_gbe
The pch_gbe driver support for PHY reset GPIOs is now provided by the
standard phylib infrastructure, using a standard PHY binding. Adjust the
Boston devicetree to make use of the standard PHY binding.
Signed-off-by: Paul Burton <paul.burton@mips.com>
| -rw-r--r-- | arch/mips/boot/dts/img/boston.dts | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/mips/boot/dts/img/boston.dts b/arch/mips/boot/dts/img/boston.dts index 65af3f6ba81c3..cb55f7ba20c3a 100644 --- a/arch/mips/boot/dts/img/boston.dts +++ b/arch/mips/boot/dts/img/boston.dts @@ -144,8 +144,17 @@ eg20t_mac@2,0,1 { compatible = "pci8086,8802"; reg = <0x00020100 0 0 0 0>; - phy-reset-gpios = <&eg20t_gpio 6 - GPIO_ACTIVE_LOW>; + + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@0 { + compatible = "ethernet-phy-id001c.c915"; + reg = <0>; + reset-gpios = <&eg20t_gpio 6 GPIO_ACTIVE_LOW>; + reset-assert-us = <25000>; + reset-deassert-us = <25000>; + }; }; eg20t_gpio: eg20t_gpio@2,0,2 { |