diff options
author | Eric Auger <eric.auger@redhat.com> | 2020-04-03 09:13:17 +0200 |
---|---|---|
committer | Andrew Jones <drjones@redhat.com> | 2020-04-03 09:50:03 +0200 |
commit | eff8f161869348936702c1767a5a6df93e846205 (patch) | |
tree | 1aa452327352c6c9ae6d3a3cb2b36bc72ff78ec2 | |
parent | 57ec1086629289a331532e184e3e4d45bd4f1d65 (diff) | |
download | kvm-unit-tests-eff8f161869348936702c1767a5a6df93e846205.tar.gz |
arm: pmu: Don't check PMCR.IMP anymore
check_pmcr() checks the IMP field is different than 0.
However A zero IMP field is permitted by the architecture,
meaning the MIDR_EL1 should be looked at instead. This
causes TCG to fail this test on '-cpu max' because in
that case PMCR.IMP is set equal to MIDR_EL1.Implementer
which is 0.
So let's remove the check_pmcr() test and just print PMCR
info in the pmu_probe() function.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andrew Jones <drjones@redhat.com>
-rw-r--r-- | arm/pmu.c | 39 |
1 files changed, 14 insertions, 25 deletions
@@ -135,29 +135,6 @@ static inline void precise_instrs_loop(int loop, uint32_t pmcr) #endif /* - * As a simple sanity check on the PMCR_EL0, ensure the implementer field isn't - * null. Also print out a couple other interesting fields for diagnostic - * purposes. For example, as of fall 2016, QEMU TCG mode doesn't implement - * event counters and therefore reports zero event counters, but hopefully - * support for at least the instructions event will be added in the future and - * the reported number of event counters will become nonzero. - */ -static bool check_pmcr(void) -{ - uint32_t pmcr; - - pmcr = get_pmcr(); - - report_info("PMU implementer/ID code/counters: %#x(\"%c\")/%#x/%d", - (pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK, - ((pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK) ? : ' ', - (pmcr >> PMU_PMCR_ID_SHIFT) & PMU_PMCR_ID_MASK, - (pmcr >> PMU_PMCR_N_SHIFT) & PMU_PMCR_N_MASK); - - return ((pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK) != 0; -} - -/* * Ensure that the cycle counter progresses between back-to-back reads. */ static bool check_cycles_increase(void) @@ -278,9 +255,22 @@ static void pmccntr64_test(void) /* Return FALSE if no PMU found, otherwise return TRUE */ static bool pmu_probe(void) { + uint32_t pmcr; + pmu_version = get_pmu_version(); + if (pmu_version == 0 || pmu_version == 0xf) + return false; + report_info("PMU version: %d", pmu_version); - return pmu_version != 0 && pmu_version != 0xf; + + pmcr = get_pmcr(); + report_info("PMU implementer/ID code/counters: %#x(\"%c\")/%#x/%d", + (pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK, + ((pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK) ? : ' ', + (pmcr >> PMU_PMCR_ID_SHIFT) & PMU_PMCR_ID_MASK, + (pmcr >> PMU_PMCR_N_SHIFT) & PMU_PMCR_N_MASK); + + return true; } int main(int argc, char *argv[]) @@ -301,7 +291,6 @@ int main(int argc, char *argv[]) report_prefix_push(argv[1]); if (argc > 2) cpi = atol(argv[2]); - report(check_pmcr(), "Control register"); report(check_cycles_increase(), "Monotonically increasing cycle count"); report(check_cpi(cpi), "Cycle/instruction ratio"); |