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| author | Eric Auger <eric.auger@redhat.com> | 2020-04-02 16:52:18 +0200 |
|---|---|---|
| committer | Andrew Jones <drjones@redhat.com> | 2020-04-03 10:03:45 +0200 |
| commit | d24709d3ed67e5613e5001723d745f04e8ceec3f (patch) | |
| tree | a986b560ccffa9b34dc2db78c5b7a88491dcd8f1 | |
| parent | 25f6632704f3c2f6b92272e491e36b5f15d3d8fc (diff) | |
| download | kvm-unit-tests-d24709d3ed67e5613e5001723d745f04e8ceec3f.tar.gz | |
arm/arm64: gicv3: Add some re-distributor defines
PROPBASER, PENDBASE and GICR_CTRL will be used for LPI management.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>
| -rw-r--r-- | lib/arm/asm/gic-v3.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h index e2736a1..47df051 100644 --- a/lib/arm/asm/gic-v3.h +++ b/lib/arm/asm/gic-v3.h @@ -18,6 +18,7 @@ * We expect to be run in Non-secure mode, thus we define the * group1 enable bits with respect to that view. */ +#define GICD_CTLR 0x0000 #define GICD_CTLR_RWP (1U << 31) #define GICD_CTLR_ARE_NS (1U << 4) #define GICD_CTLR_ENABLE_G1A (1U << 1) @@ -38,6 +39,11 @@ #define GICR_ICACTIVER0 GICD_ICACTIVER #define GICR_IPRIORITYR0 GICD_IPRIORITYR +#define GICR_PROPBASER 0x0070 +#define GICR_PENDBASER 0x0078 +#define GICR_CTLR GICD_CTLR +#define GICR_CTLR_ENABLE_LPIS (1UL << 0) + #define ICC_SGI1R_AFFINITY_1_SHIFT 16 #define ICC_SGI1R_AFFINITY_2_SHIFT 32 #define ICC_SGI1R_AFFINITY_3_SHIFT 48 |