diff options
author | Sean Christopherson <sean.j.christopherson@intel.com> | 2020-02-07 09:42:42 -0800 |
---|---|---|
committer | Paolo Bonzini <pbonzini@redhat.com> | 2020-06-22 13:42:54 -0400 |
commit | 592cb377db48620178575ca3cf6d9bbca8fb144e (patch) | |
tree | dd38c9f44f80dc02a655b1dc7f316482ed720f00 | |
parent | d86e74112c20a8ee9149bfd62adf2228db4466dc (diff) | |
download | kvm-unit-tests-592cb377db48620178575ca3cf6d9bbca8fb144e.tar.gz |
nVMX: Refactor the EPT/VPID MSR cap check to make it readable
Use the EPT_CAP_* and VPID_CAP_* defines to declare which bits are
reserved in MSR_IA32_VMX_EPT_VPID_CAP. Encoding the reserved bits in
a 64-bit literal is difficult to read, even more difficult to update,
and error prone, as evidenced by the check allowing bit 39 to be '1',
despite it being reserved to zero in Intel's SDM.
No functional change intended.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Message-Id: <20200207174244.6590-3-sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r-- | x86/vmx.c | 21 | ||||
-rw-r--r-- | x86/vmx.h | 3 |
2 files changed, 22 insertions, 2 deletions
@@ -1674,8 +1674,27 @@ static void test_vmx_caps(void) (val & 0xfffffffffffffc01Ull) == 0, "MSR_IA32_VMX_VMCS_ENUM"); + fixed0 = -1ull; + fixed0 &= ~(EPT_CAP_WT | + EPT_CAP_PWL4 | + EPT_CAP_UC | + EPT_CAP_WB | + EPT_CAP_2M_PAGE | + EPT_CAP_1G_PAGE | + EPT_CAP_INVEPT | + EPT_CAP_AD_FLAG | + EPT_CAP_ADV_EPT_INFO | + EPT_CAP_INVEPT_SINGLE | + EPT_CAP_INVEPT_ALL | + VPID_CAP_INVVPID | + (1ull << 39) | + VPID_CAP_INVVPID_ADDR | + VPID_CAP_INVVPID_CXTGLB | + VPID_CAP_INVVPID_ALL | + VPID_CAP_INVVPID_CXTLOC); + val = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP); - report((val & 0xfffff07ef98cbebeUll) == 0, + report((val & fixed0) == 0, "MSR_IA32_VMX_EPT_VPID_CAP"); } @@ -645,9 +645,10 @@ enum vm_entry_failure_code { #define EPT_CAP_2M_PAGE (1ull << 16) #define EPT_CAP_1G_PAGE (1ull << 17) #define EPT_CAP_INVEPT (1ull << 20) +#define EPT_CAP_AD_FLAG (1ull << 21) +#define EPT_CAP_ADV_EPT_INFO (1ull << 22) #define EPT_CAP_INVEPT_SINGLE (1ull << 25) #define EPT_CAP_INVEPT_ALL (1ull << 26) -#define EPT_CAP_AD_FLAG (1ull << 21) #define VPID_CAP_INVVPID (1ull << 32) #define VPID_CAP_INVVPID_ADDR (1ull << 40) #define VPID_CAP_INVVPID_CXTGLB (1ull << 41) |