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authorAlexandru Elisei <alexandru.elisei@arm.com>2020-01-31 16:37:27 +0000
committerAndrew Jones <drjones@redhat.com>2020-04-03 09:40:33 +0200
commit24dd2adab559390ebbd7043cbe50bca5f631b29b (patch)
tree2b0db2bd86f2d4addb81a47e73eefaaa68a76aed
parentc7d0f5d5966bff0db222a2ae57ae1775347e08a4 (diff)
downloadkvm-unit-tests-24dd2adab559390ebbd7043cbe50bca5f631b29b.tar.gz
arm64: timer: Test behavior when timer disabled or masked
When the timer is disabled (the *_CTL_EL0.ENABLE bit is clear) or the timer interrupt is masked at the timer level (the *_CTL_EL0.IMASK bit is set), timer interrupts must not be pending or asserted by the VGIC. However, only when the timer interrupt is masked, we can still check that the timer condition is met by reading the *_CTL_EL0.ISTATUS bit. This test was used to discover a bug and test the fix introduced by KVM commit 16e604a437c8 ("KVM: arm/arm64: vgic: Reevaluate level sensitive interrupts on enable"). Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Signed-off-by: Andrew Jones <drjones@redhat.com>
-rw-r--r--arm/timer.c7
-rw-r--r--arm/unittests.cfg2
2 files changed, 8 insertions, 1 deletions
diff --git a/arm/timer.c b/arm/timer.c
index 35038f2..dea364f 100644
--- a/arm/timer.c
+++ b/arm/timer.c
@@ -269,10 +269,17 @@ static void test_timer(struct timer_info *info)
/* Disable the timer again and prepare to take interrupts */
info->write_ctl(0);
+ info->irq_received = false;
set_timer_irq_enabled(info, true);
+ report(!info->irq_received, "no interrupt when timer is disabled");
report(!timer_pending(info) && gic_timer_state(info) == GIC_STATE_INACTIVE,
"interrupt signal no longer pending");
+ info->write_cval(now - 1);
+ info->write_ctl(ARCH_TIMER_CTL_ENABLE | ARCH_TIMER_CTL_IMASK);
+ report(timer_pending(info) && gic_timer_state(info) == GIC_STATE_INACTIVE,
+ "interrupt signal not pending");
+
report(test_cval_10msec(info), "latency within 10 ms");
report(info->irq_received, "interrupt received");
diff --git a/arm/unittests.cfg b/arm/unittests.cfg
index 1f1bb24..017958d 100644
--- a/arm/unittests.cfg
+++ b/arm/unittests.cfg
@@ -132,7 +132,7 @@ groups = psci
[timer]
file = timer.flat
groups = timer
-timeout = 8s
+timeout = 10s
arch = arm64
# Exit tests