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author | Marc Zyngier <maz@kernel.org> | 2023-09-17 13:29:04 +0100 |
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committer | Marc Zyngier <maz@kernel.org> | 2023-09-17 13:36:50 +0100 |
commit | a04e7ca7ee065acc42316b629972ca5c6b968493 (patch) | |
tree | 7dab553a254e2724db1d1539aca1cb2d985adeff | |
parent | 7b75f2c52ce499eac783eaa8babe93eb80c78d66 (diff) | |
download | cs-sw-a04e7ca7ee065acc42316b629972ca5c6b968493.tar.gz |
Don't assume that dual-CS setups are that unlikely
The dual-board setup is getting built by other people than myself.
For real. *mind blown*
Drop the 'very unlikely' wording, and point to the HW doc for the gory
details of how to tweak the boards.
Signed-off-by: Marc Zyngier <maz@kernel.org>
-rw-r--r-- | README | 6 |
1 files changed, 3 insertions, 3 deletions
@@ -247,6 +247,6 @@ which is completely self explainatory, but let's expand on it anyway: Finally, the Port 0:/1: lines indicate which I2C/UART combinations the board is using, as well as the CC line used, the pin set used for -serial, and potentially the deug status. The HW supports two boards -being driven by a single Pico, but it is very unlikely you have built -such a configuration. +serial, and potentially the debug status. The HW supports two boards +being driven by a single Pico (see the HW documentation for the gory +details). |