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author | Marc Zyngier <maz@kernel.org> | 2021-08-11 10:22:26 +0100 |
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committer | Mark Rutland <mark.rutland@arm.com> | 2021-08-11 14:53:24 +0100 |
commit | bc6a9380eb3c5afc96735a54d455f2487df48700 (patch) | |
tree | c07dffe1ef7cfbe9793fbf1cf040829ee098ec90 | |
parent | f8fc0c92e5bc22d2acc8ea82453cbddbb5e822e3 (diff) | |
download | boot-wrapper-aarch64-bc6a9380eb3c5afc96735a54d455f2487df48700.tar.gz |
aarch64: Enable ECV to allow access to CNTPOFF_EL2
If the implemnentation supports ID_AA64MMFR0_EL1.ECV==2,
set SCR_EL3.ECVEn to allow EL2 access to CNTPOFF_EL2.
Signed-off-by: Marc Zyngier <maz@kernel.org>
[Mark: read id_aa64mmfr0_el1 separately, s/bne/b.lt/]
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
-rw-r--r-- | arch/aarch64/boot.S | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S index 7f208b5..2215f7e 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S @@ -59,6 +59,14 @@ ASM_FUNC(_start) orr x0, x0, #(1 << 27) // FGT enable 1: + /* Enable ECV2 if present (allows CNTPOFF_EL2) */ + mrs x1, id_aa64mmfr0_el1 + ubfx x1, x1, #60, #4 + cmp x1, #2 + b.lt 1f + + orr x0, x0, #(1 << 28) // ECV enable +1: /* Enable MTE if present */ mrs x10, id_aa64pfr1_el1 ubfx x10, x10, #8, #4 |