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author | Mark Brown <broonie@kernel.org> | 2022-02-01 17:21:31 +0000 |
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committer | Mark Rutland <mark.rutland@arm.com> | 2022-02-04 10:54:39 +0000 |
commit | af0095532913adc06e9e0d1e842c2fbd8fda9167 (patch) | |
tree | c57bc44e0a861150caaa8904f6a582a4a8cc58a4 | |
parent | 6b8ae2f8b475c0ff242cedb7d459a604b5c1765c (diff) | |
download | boot-wrapper-aarch64-af0095532913adc06e9e0d1e842c2fbd8fda9167.tar.gz |
aarch64: Document what we're doing when setting ZCR_EL3.LEN
The enumeration and configuration algorithm for SVE vector lengths is not
100% obvious so add a comment explaining what's going on in case someone
looks at this code as a reference. If this is ever used on hardware with
asymmetric vector lengths we will need to handle this differently to meet
Linux's boot requirements but this is not a present issue and such hardware
would be fairly surprising.
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20220201172132.2399026-1-broonie@kernel.org
-rw-r--r-- | arch/aarch64/init.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/aarch64/init.c b/arch/aarch64/init.c index aa58567..8bb0524 100644 --- a/arch/aarch64/init.c +++ b/arch/aarch64/init.c @@ -88,6 +88,10 @@ void cpu_init_el3(void) cptr |= CPTR_EL3_EZ; msr(CPTR_EL3, cptr); isb(); + /* + * Write the maximum possible vector length, hardware + * will constrain to the actual limit. + */ msr(ZCR_EL3, ZCR_EL3_LEN_MAX); } |