diff options
| author | Mark Rutland <mark.rutland@arm.com> | 2013-02-11 14:38:22 +0000 |
|---|---|---|
| committer | Mark Rutland <mark.rutland@arm.com> | 2013-06-05 15:55:08 +0100 |
| commit | 0ffd5871d107035f34491dfbf8a7428e753c974e (patch) | |
| tree | 571ec6a3a9b4964f0a5b567290656b5e6a13526a | |
| parent | 76eca64800b99aaf0c3d7e46b2111875f266e05e (diff) | |
| download | boot-wrapper-aarch64-0ffd5871d107035f34491dfbf8a7428e753c974e.tar.gz | |
Factor non-secure system initialisation
When we add PSCI, we'll want to share the same non-secure sysetem
initialisation code. As we're going to want to put spin-table and PSCI
implementations in separate files, it would be nice to have the
initialisation code in its own file, to make clear the separation
between early boot, platform interface code, and non-secure system
initialisation.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
| -rw-r--r-- | Makefile | 4 | ||||
| -rw-r--r-- | boot.S | 18 | ||||
| -rw-r--r-- | model.lds.S | 2 | ||||
| -rw-r--r-- | ns.S | 41 |
4 files changed, 46 insertions, 19 deletions
@@ -65,9 +65,9 @@ DTC := $(if $(wildcard ./dtc), ./dtc, $(shell which dtc)) all: $(IMAGE) clean: - rm -f $(IMAGE) boot.o model.lds fdt.dtb + rm -f $(IMAGE) boot.o ns.o model.lds fdt.dtb -$(IMAGE): boot.o model.lds fdt.dtb $(KERNEL) $(FILESYSTEM) +$(IMAGE): boot.o ns.o model.lds fdt.dtb $(KERNEL) $(FILESYSTEM) $(LD) -o $@ --script=model.lds %.o: %.S Makefile @@ -90,27 +90,11 @@ start_ns: br x4 // branch to the given address 2: - /* - * UART initialisation (38400 8N1) - */ - ldr x4, =UART_BASE // UART base - mov w5, #0x10 // ibrd - str w5, [x4, #0x24] - mov w5, #0xc300 - orr w5, w5, #0x0001 // cr - str w5, [x4, #0x30] - - /* - * CLCD output site MB - */ - ldr x4, =SYSREGS_BASE - ldr w5, =(1 << 31) | (1 << 30) | (7 << 20) | (0 << 16) // START|WRITE|MUXFPGA|SITE_MB - str wzr, [x4, #0xa0] // V2M_SYS_CFGDATA - str w5, [x4, #0xa4] // V2M_SYS_CFGCTRL /* * Primary CPU */ + bl ns_init_system ldr x0, =dtb // device tree blob b kernel diff --git a/model.lds.S b/model.lds.S index ec27433..23aa1bf 100644 --- a/model.lds.S +++ b/model.lds.S @@ -12,6 +12,7 @@ OUTPUT_ARCH(aarch64) TARGET(binary) INPUT(./boot.o) +INPUT(./ns.o) INPUT(KERNEL) INPUT(./fdt.dtb) @@ -23,6 +24,7 @@ SECTIONS { . = PHYS_OFFSET; .text : { boot.o } + .text : { ns.o } . = PHYS_OFFSET + MBOX_OFFSET; mbox = .; .mbox : { QUAD(0x0) } @@ -0,0 +1,41 @@ +/* + * ns.S - code to initialise everything required when first booting non-secure. + * + * Copyright (C) 2013 ARM Limited. All rights reserved. + * + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE.txt file. + */ + +#define PL011_UARTIBRD 0x24 +#define PL011_UARTCR 0x30 + +#define V2M_SYS_CFGDATA 0xa0 +#define V2M_SYS_CFGCTRL 0xa4 + + .text + .globl ns_init_system + +ns_init_system: + /* + * UART initialisation (38400 8N1) + */ + ldr x4, =UART_BASE + mov w5, #0x10 + str w5, [x4, #PL011_UARTIBRD] + mov w5, #0xc300 + orr w5, w5, #0x0001 + str w5, [x4, #PL011_UARTCR] + + /* + * CLCD output site MB + */ + ldr x4, =SYSREGS_BASE + ldr w5, =(1 << 31) | (1 << 30) | (7 << 20) | (0 << 16) // START|WRITE|MUXFPGA|SITE_MB + str wzr, [x4, #V2M_SYS_CFGDATA] + str w5, [x4, #V2M_SYS_CFGCTRL] + + ret + + .ltorg + .org 0x40 |