Start the 4.14-ltsi branch

Start out at 4.14.67 and purge all old patches.

Well, all but one :)

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

908 files changed, 1 insertions, 107840 deletions

diff --git a/KERNEL_VERSION b/KERNEL_VERSION
index dce8f41796eb39..3aaae90dd6246b 100644
--- a/KERNEL_VERSION
+++ b/KERNEL_VERSION
@@ -1 +1 @@
-4.9.124
+4.14.67
diff --git a/patches.renesas/0001-clocksource-em_sti-Split-clock-prepare-and-enable-st.patch b/patches.renesas/0001-clocksource-em_sti-Split-clock-prepare-and-enable-st.patch
deleted file mode 100644
index 8a38ac5b977348..00000000000000
--- a/patches.renesas/0001-clocksource-em_sti-Split-clock-prepare-and-enable-st.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From a2e54bf8c7bbfc421b16e28fd2ea7770d1c11cf5 Mon Sep 17 00:00:00 2001
-From: Nicolai Stange <nicstange@gmail.com>
-Date: Mon, 6 Feb 2017 22:12:01 +0100
-Subject: [PATCH 001/286] clocksource: em_sti: Split clock prepare and enable
- steps
-
-Currently, the em_sti driver prepares and enables the needed clock in
-em_sti_enable(), potentially called through its clockevent device's
-->set_state_oneshot().
-
-However, the clk_prepare() step may sleep whereas tick_program_event() and
-thus, ->set_state_oneshot(), can be called in atomic context.
-
-Split the clk_prepare_enable() in em_sti_enable() into two steps:
-- prepare the clock at device probing via clk_prepare()
-- and enable it in em_sti_enable() via clk_enable().
-Slightly reorder resource initialization in em_sti_probe() in order to
-facilitate error handling in later patches.
-
-Signed-off-by: Nicolai Stange <nicstange@gmail.com>
-Signed-off-by: John Stultz <john.stultz@linaro.org>
-(cherry picked from commit 3814ae092d36da04d5fbaf777c1564dc4ee68559)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clocksource/em_sti.c |   21 ++++++++++++++-------
- 1 file changed, 14 insertions(+), 7 deletions(-)
-
---- a/drivers/clocksource/em_sti.c
-+++ b/drivers/clocksource/em_sti.c
-@@ -78,7 +78,7 @@ static int em_sti_enable(struct em_sti_p
- 	int ret;
- 
- 	/* enable clock */
--	ret = clk_prepare_enable(p->clk);
-+	ret = clk_enable(p->clk);
- 	if (ret) {
- 		dev_err(&p->pdev->dev, "cannot enable clock\n");
- 		return ret;
-@@ -107,7 +107,7 @@ static void em_sti_disable(struct em_sti
- 	em_sti_write(p, STI_INTENCLR, 3);
- 
- 	/* stop clock */
--	clk_disable_unprepare(p->clk);
-+	clk_disable(p->clk);
- }
- 
- static cycle_t em_sti_count(struct em_sti_priv *p)
-@@ -303,6 +303,7 @@ static int em_sti_probe(struct platform_
- 	struct em_sti_priv *p;
- 	struct resource *res;
- 	int irq;
-+	int ret;
- 
- 	p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
- 	if (p == NULL)
-@@ -323,6 +324,13 @@ static int em_sti_probe(struct platform_
- 	if (IS_ERR(p->base))
- 		return PTR_ERR(p->base);
- 
-+	if (devm_request_irq(&pdev->dev, irq, em_sti_interrupt,
-+			     IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
-+			     dev_name(&pdev->dev), p)) {
-+		dev_err(&pdev->dev, "failed to request low IRQ\n");
-+		return -ENOENT;
-+	}
-+
- 	/* get hold of clock */
- 	p->clk = devm_clk_get(&pdev->dev, "sclk");
- 	if (IS_ERR(p->clk)) {
-@@ -330,11 +338,10 @@ static int em_sti_probe(struct platform_
- 		return PTR_ERR(p->clk);
- 	}
- 
--	if (devm_request_irq(&pdev->dev, irq, em_sti_interrupt,
--			     IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
--			     dev_name(&pdev->dev), p)) {
--		dev_err(&pdev->dev, "failed to request low IRQ\n");
--		return -ENOENT;
-+	ret = clk_prepare(p->clk);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "cannot prepare clock\n");
-+		return ret;
- 	}
- 
- 	raw_spin_lock_init(&p->lock);
diff --git a/patches.renesas/0001-drm-bridge-adv7511-Add-Audio-support.patch b/patches.renesas/0001-drm-bridge-adv7511-Add-Audio-support.patch
deleted file mode 100644
index 0d8ad1c6552e51..00000000000000
--- a/patches.renesas/0001-drm-bridge-adv7511-Add-Audio-support.patch
+++ /dev/null
@@ -1,349 +0,0 @@
-From 1d16a28f468a2a98fe742386b656f6e8b823fd0f Mon Sep 17 00:00:00 2001
-From: John Stultz <john.stultz@linaro.org>
-Date: Mon, 28 Nov 2016 17:22:31 -0800
-Subject: [PATCH 001/299] drm/bridge: adv7511: Add Audio support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This patch adds support to Audio for both adv7511 and adv7533
-bridge chips.
-
-This patch was originally from [1] by Lars-Peter Clausen <lars@metafoo.de>
-and was adapted by Archit Taneja <architt@codeaurora.org> and
-Srinivas Kandagatla <srinivas.kandagatla@linaro.org>.
-
-Then I heavily reworked it to use the hdmi-codec driver. And also
-folded in some audio packet initialization done by Andy Green
-<andy.green@linaro.org>. So credit to them, but blame to me.
-
-[1] https://github.com/analogdevicesinc/linux/blob/xcomm_zynq/drivers/gpu/drm/i2c/adv7511_audio.c
-
-Cc: David Airlie <airlied@linux.ie>
-Cc: Archit Taneja <architt@codeaurora.org>
-Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Cc: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
-Cc: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
-Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
-Cc: Andy Green <andy@warmcat.com>
-Cc: Dave Long <dave.long@linaro.org>
-Cc: Guodong Xu <guodong.xu@linaro.org>
-Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
-Cc: Mark Brown <broonie@kernel.org>
-Cc: Lars-Peter Clausen <lars@metafoo.de>
-Cc: Jose Abreu <joabreu@synopsys.com>
-Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Cc: dri-devel@lists.freedesktop.org
-Acked-by: Lars-Peter Clausen <lars@metafoo.de>
-Signed-off-by: John Stultz <john.stultz@linaro.org>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/1480382552-28219-2-git-send-email-john.stultz@linaro.org
-(cherry picked from commit 53c515befe2864173ac5acb5c248587ce24d245e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/adv7511/Kconfig         |    8 
- drivers/gpu/drm/bridge/adv7511/Makefile        |    1 
- drivers/gpu/drm/bridge/adv7511/adv7511.h       |   16 +
- drivers/gpu/drm/bridge/adv7511/adv7511_audio.c |  213 +++++++++++++++++++++++++
- drivers/gpu/drm/bridge/adv7511/adv7511_drv.c   |    4 
- 5 files changed, 242 insertions(+)
- create mode 100644 drivers/gpu/drm/bridge/adv7511/adv7511_audio.c
-
---- a/drivers/gpu/drm/bridge/adv7511/Kconfig
-+++ b/drivers/gpu/drm/bridge/adv7511/Kconfig
-@@ -6,6 +6,14 @@ config DRM_I2C_ADV7511
- 	help
- 	  Support for the Analog Device ADV7511(W) and ADV7513 HDMI encoders.
- 
-+config DRM_I2C_ADV7511_AUDIO
-+	bool "ADV7511 HDMI Audio driver"
-+	depends on DRM_I2C_ADV7511 && SND_SOC
-+	select SND_SOC_HDMI_CODEC
-+	help
-+	  Support the ADV7511 HDMI Audio interface. This is used in
-+	  conjunction with the AV7511  HDMI driver.
-+
- config DRM_I2C_ADV7533
- 	bool "ADV7533 encoder"
- 	depends on DRM_I2C_ADV7511
---- a/drivers/gpu/drm/bridge/adv7511/Makefile
-+++ b/drivers/gpu/drm/bridge/adv7511/Makefile
-@@ -1,3 +1,4 @@
- adv7511-y := adv7511_drv.o
-+adv7511-$(CONFIG_DRM_I2C_ADV7511_AUDIO) += adv7511_audio.o
- adv7511-$(CONFIG_DRM_I2C_ADV7533) += adv7533.o
- obj-$(CONFIG_DRM_I2C_ADV7511) += adv7511.o
---- a/drivers/gpu/drm/bridge/adv7511/adv7511.h
-+++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h
-@@ -309,6 +309,8 @@ struct adv7511 {
- 	struct drm_display_mode curr_mode;
- 
- 	unsigned int f_tmds;
-+	unsigned int f_audio;
-+	unsigned int audio_source;
- 
- 	unsigned int current_edid_segment;
- 	uint8_t edid_buf[256];
-@@ -336,6 +338,7 @@ struct adv7511 {
- 	bool use_timing_gen;
- 
- 	enum adv7511_type type;
-+	struct platform_device *audio_pdev;
- };
- 
- #ifdef CONFIG_DRM_I2C_ADV7533
-@@ -391,4 +394,17 @@ static inline int adv7533_parse_dt(struc
- }
- #endif
- 
-+#ifdef CONFIG_DRM_I2C_ADV7511_AUDIO
-+int adv7511_audio_init(struct device *dev, struct adv7511 *adv7511);
-+void adv7511_audio_exit(struct adv7511 *adv7511);
-+#else /*CONFIG_DRM_I2C_ADV7511_AUDIO */
-+static inline int adv7511_audio_init(struct device *dev, struct adv7511 *adv7511)
-+{
-+	return 0;
-+}
-+static inline void adv7511_audio_exit(struct adv7511 *adv7511)
-+{
-+}
-+#endif /* CONFIG_DRM_I2C_ADV7511_AUDIO */
-+
- #endif /* __DRM_I2C_ADV7511_H__ */
---- /dev/null
-+++ b/drivers/gpu/drm/bridge/adv7511/adv7511_audio.c
-@@ -0,0 +1,213 @@
-+/*
-+ * Analog Devices ADV7511 HDMI transmitter driver
-+ *
-+ * Copyright 2012 Analog Devices Inc.
-+ * Copyright (c) 2016, Linaro Limited
-+ *
-+ * Licensed under the GPL-2.
-+ */
-+
-+#include <sound/core.h>
-+#include <sound/hdmi-codec.h>
-+#include <sound/pcm.h>
-+#include <sound/soc.h>
-+
-+#include "adv7511.h"
-+
-+static void adv7511_calc_cts_n(unsigned int f_tmds, unsigned int fs,
-+			       unsigned int *cts, unsigned int *n)
-+{
-+	switch (fs) {
-+	case 32000:
-+		*n = 4096;
-+		break;
-+	case 44100:
-+		*n = 6272;
-+		break;
-+	case 48000:
-+		*n = 6144;
-+		break;
-+	}
-+
-+	*cts = ((f_tmds * *n) / (128 * fs)) * 1000;
-+}
-+
-+static int adv7511_update_cts_n(struct adv7511 *adv7511)
-+{
-+	unsigned int cts = 0;
-+	unsigned int n = 0;
-+
-+	adv7511_calc_cts_n(adv7511->f_tmds, adv7511->f_audio, &cts, &n);
-+
-+	regmap_write(adv7511->regmap, ADV7511_REG_N0, (n >> 16) & 0xf);
-+	regmap_write(adv7511->regmap, ADV7511_REG_N1, (n >> 8) & 0xff);
-+	regmap_write(adv7511->regmap, ADV7511_REG_N2, n & 0xff);
-+
-+	regmap_write(adv7511->regmap, ADV7511_REG_CTS_MANUAL0,
-+		     (cts >> 16) & 0xf);
-+	regmap_write(adv7511->regmap, ADV7511_REG_CTS_MANUAL1,
-+		     (cts >> 8) & 0xff);
-+	regmap_write(adv7511->regmap, ADV7511_REG_CTS_MANUAL2,
-+		     cts & 0xff);
-+
-+	return 0;
-+}
-+
-+int adv7511_hdmi_hw_params(struct device *dev, void *data,
-+			   struct hdmi_codec_daifmt *fmt,
-+			   struct hdmi_codec_params *hparms)
-+{
-+	struct adv7511 *adv7511 = dev_get_drvdata(dev);
-+	unsigned int audio_source, i2s_format = 0;
-+	unsigned int invert_clock;
-+	unsigned int rate;
-+	unsigned int len;
-+
-+	switch (hparms->sample_rate) {
-+	case 32000:
-+		rate = ADV7511_SAMPLE_FREQ_32000;
-+		break;
-+	case 44100:
-+		rate = ADV7511_SAMPLE_FREQ_44100;
-+		break;
-+	case 48000:
-+		rate = ADV7511_SAMPLE_FREQ_48000;
-+		break;
-+	case 88200:
-+		rate = ADV7511_SAMPLE_FREQ_88200;
-+		break;
-+	case 96000:
-+		rate = ADV7511_SAMPLE_FREQ_96000;
-+		break;
-+	case 176400:
-+		rate = ADV7511_SAMPLE_FREQ_176400;
-+		break;
-+	case 192000:
-+		rate = ADV7511_SAMPLE_FREQ_192000;
-+		break;
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	switch (hparms->sample_width) {
-+	case 16:
-+		len = ADV7511_I2S_SAMPLE_LEN_16;
-+		break;
-+	case 18:
-+		len = ADV7511_I2S_SAMPLE_LEN_18;
-+		break;
-+	case 20:
-+		len = ADV7511_I2S_SAMPLE_LEN_20;
-+		break;
-+	case 24:
-+		len = ADV7511_I2S_SAMPLE_LEN_24;
-+		break;
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	switch (fmt->fmt) {
-+	case HDMI_I2S:
-+		audio_source = ADV7511_AUDIO_SOURCE_I2S;
-+		i2s_format = ADV7511_I2S_FORMAT_I2S;
-+		break;
-+	case HDMI_RIGHT_J:
-+		audio_source = ADV7511_AUDIO_SOURCE_I2S;
-+		i2s_format = ADV7511_I2S_FORMAT_RIGHT_J;
-+		break;
-+	case HDMI_LEFT_J:
-+		audio_source = ADV7511_AUDIO_SOURCE_I2S;
-+		i2s_format = ADV7511_I2S_FORMAT_LEFT_J;
-+		break;
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	invert_clock = fmt->bit_clk_inv;
-+
-+	regmap_update_bits(adv7511->regmap, ADV7511_REG_AUDIO_SOURCE, 0x70,
-+			   audio_source << 4);
-+	regmap_update_bits(adv7511->regmap, ADV7511_REG_AUDIO_CONFIG, BIT(6),
-+			   invert_clock << 6);
-+	regmap_update_bits(adv7511->regmap, ADV7511_REG_I2S_CONFIG, 0x03,
-+			   i2s_format);
-+
-+	adv7511->audio_source = audio_source;
-+
-+	adv7511->f_audio = hparms->sample_rate;
-+
-+	adv7511_update_cts_n(adv7511);
-+
-+	regmap_update_bits(adv7511->regmap, ADV7511_REG_AUDIO_CFG3,
-+			   ADV7511_AUDIO_CFG3_LEN_MASK, len);
-+	regmap_update_bits(adv7511->regmap, ADV7511_REG_I2C_FREQ_ID_CFG,
-+			   ADV7511_I2C_FREQ_ID_CFG_RATE_MASK, rate << 4);
-+	regmap_write(adv7511->regmap, 0x73, 0x1);
-+
-+	return 0;
-+}
-+
-+static int audio_startup(struct device *dev, void *data)
-+{
-+	struct adv7511 *adv7511 = dev_get_drvdata(dev);
-+
-+	regmap_update_bits(adv7511->regmap, ADV7511_REG_AUDIO_CONFIG,
-+				BIT(7), 0);
-+
-+	/* hide Audio infoframe updates */
-+	regmap_update_bits(adv7511->regmap, ADV7511_REG_INFOFRAME_UPDATE,
-+				BIT(5), BIT(5));
-+	/* enable N/CTS, enable Audio sample packets */
-+	regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
-+				BIT(5), BIT(5));
-+	/* enable N/CTS */
-+	regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
-+				BIT(6), BIT(6));
-+	/* not copyrighted */
-+	regmap_update_bits(adv7511->regmap, ADV7511_REG_AUDIO_CFG1,
-+				BIT(5), BIT(5));
-+	/* enable audio infoframes */
-+	regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
-+				BIT(3), BIT(3));
-+	/* AV mute disable */
-+	regmap_update_bits(adv7511->regmap, ADV7511_REG_GC(0),
-+				BIT(7) | BIT(6), BIT(7));
-+	/* use Audio infoframe updated info */
-+	regmap_update_bits(adv7511->regmap, ADV7511_REG_GC(1),
-+				BIT(5), 0);
-+	return 0;
-+}
-+
-+static void audio_shutdown(struct device *dev, void *data)
-+{
-+}
-+
-+static const struct hdmi_codec_ops adv7511_codec_ops = {
-+	.hw_params	= adv7511_hdmi_hw_params,
-+	.audio_shutdown = audio_shutdown,
-+	.audio_startup	= audio_startup,
-+};
-+
-+static struct hdmi_codec_pdata codec_data = {
-+	.ops = &adv7511_codec_ops,
-+	.max_i2s_channels = 2,
-+	.i2s = 1,
-+};
-+
-+int adv7511_audio_init(struct device *dev, struct adv7511 *adv7511)
-+{
-+	adv7511->audio_pdev = platform_device_register_data(dev,
-+					HDMI_CODEC_DRV_NAME,
-+					PLATFORM_DEVID_AUTO,
-+					&codec_data,
-+					sizeof(codec_data));
-+	return PTR_ERR_OR_ZERO(adv7511->audio_pdev);
-+}
-+
-+void adv7511_audio_exit(struct adv7511 *adv7511)
-+{
-+	if (adv7511->audio_pdev) {
-+		platform_device_unregister(adv7511->audio_pdev);
-+		adv7511->audio_pdev = NULL;
-+	}
-+}
---- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
-+++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
-@@ -1064,6 +1064,8 @@ static int adv7511_probe(struct i2c_clie
- 		goto err_unregister_cec;
- 	}
- 
-+	adv7511_audio_init(dev, adv7511);
-+
- 	return 0;
- 
- err_unregister_cec:
-@@ -1085,6 +1087,8 @@ static int adv7511_remove(struct i2c_cli
- 
- 	drm_bridge_remove(&adv7511->bridge);
- 
-+	adv7511_audio_exit(adv7511);
-+
- 	i2c_unregister_device(adv7511->i2c_edid);
- 
- 	kfree(adv7511->edid);
diff --git a/patches.renesas/0001-drm-bridge-adv7511-Initialize-regulators.patch b/patches.renesas/0001-drm-bridge-adv7511-Initialize-regulators.patch
deleted file mode 100644
index 45d3f5f4195932..00000000000000
--- a/patches.renesas/0001-drm-bridge-adv7511-Initialize-regulators.patch
+++ /dev/null
@@ -1,194 +0,0 @@
-From 49d75597cc0116d54a98d1aecd36ae7c90bb4520 Mon Sep 17 00:00:00 2001
-From: Archit Taneja <architt@codeaurora.org>
-Date: Wed, 11 Jan 2017 12:22:27 +0530
-Subject: [PATCH 001/255] drm/bridge: adv7511: Initialize regulators
-
-Maintain a table of regulator names expected by ADV7511 and ADV7533.
-Use regulator_bulk_* api to configure these.
-
-Initialize and enable the regulators during probe itself. Controlling
-these dynamically is left for later.
-
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/1484117547-26417-3-git-send-email-architt@codeaurora.org
-(cherry picked from commit 5b06ba2378e177fdb8f100adda6e55b205308202)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/adv7511/adv7511.h     |    4 +
- drivers/gpu/drm/bridge/adv7511/adv7511_drv.c |   86 ++++++++++++++++++++++++---
- 2 files changed, 81 insertions(+), 9 deletions(-)
-
---- a/drivers/gpu/drm/bridge/adv7511/adv7511.h
-+++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h
-@@ -12,6 +12,7 @@
- #include <linux/hdmi.h>
- #include <linux/i2c.h>
- #include <linux/regmap.h>
-+#include <linux/regulator/consumer.h>
- 
- #include <drm/drm_crtc_helper.h>
- #include <drm/drm_mipi_dsi.h>
-@@ -331,6 +332,9 @@ struct adv7511 {
- 
- 	struct gpio_desc *gpio_pd;
- 
-+	struct regulator_bulk_data *supplies;
-+	unsigned int num_supplies;
-+
- 	/* ADV7533 DSI RX related params */
- 	struct device_node *host_node;
- 	struct mipi_dsi_device *dsi;
---- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
-+++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
-@@ -864,6 +864,58 @@ static struct drm_bridge_funcs adv7511_b
-  * Probe & remove
-  */
- 
-+static const char * const adv7511_supply_names[] = {
-+	"avdd",
-+	"dvdd",
-+	"pvdd",
-+	"bgvdd",
-+	"dvdd-3v",
-+};
-+
-+static const char * const adv7533_supply_names[] = {
-+	"avdd",
-+	"dvdd",
-+	"pvdd",
-+	"a2vdd",
-+	"v3p3",
-+	"v1p2",
-+};
-+
-+static int adv7511_init_regulators(struct adv7511 *adv)
-+{
-+	struct device *dev = &adv->i2c_main->dev;
-+	const char * const *supply_names;
-+	unsigned int i;
-+	int ret;
-+
-+	if (adv->type == ADV7511) {
-+		supply_names = adv7511_supply_names;
-+		adv->num_supplies = ARRAY_SIZE(adv7511_supply_names);
-+	} else {
-+		supply_names = adv7533_supply_names;
-+		adv->num_supplies = ARRAY_SIZE(adv7533_supply_names);
-+	}
-+
-+	adv->supplies = devm_kcalloc(dev, adv->num_supplies,
-+				     sizeof(*adv->supplies), GFP_KERNEL);
-+	if (!adv->supplies)
-+		return -ENOMEM;
-+
-+	for (i = 0; i < adv->num_supplies; i++)
-+		adv->supplies[i].supply = supply_names[i];
-+
-+	ret = devm_regulator_bulk_get(dev, adv->num_supplies, adv->supplies);
-+	if (ret)
-+		return ret;
-+
-+	return regulator_bulk_enable(adv->num_supplies, adv->supplies);
-+}
-+
-+static void adv7511_uninit_regulators(struct adv7511 *adv)
-+{
-+	regulator_bulk_disable(adv->num_supplies, adv->supplies);
-+}
-+
- static int adv7511_parse_dt(struct device_node *np,
- 			    struct adv7511_link_config *config)
- {
-@@ -964,6 +1016,7 @@ static int adv7511_probe(struct i2c_clie
- 	if (!adv7511)
- 		return -ENOMEM;
- 
-+	adv7511->i2c_main = i2c;
- 	adv7511->powered = false;
- 	adv7511->status = connector_status_disconnected;
- 
-@@ -981,13 +1034,21 @@ static int adv7511_probe(struct i2c_clie
- 	if (ret)
- 		return ret;
- 
-+	ret = adv7511_init_regulators(adv7511);
-+	if (ret) {
-+		dev_err(dev, "failed to init regulators\n");
-+		return ret;
-+	}
-+
- 	/*
- 	 * The power down GPIO is optional. If present, toggle it from active to
- 	 * inactive to wake up the encoder.
- 	 */
- 	adv7511->gpio_pd = devm_gpiod_get_optional(dev, "pd", GPIOD_OUT_HIGH);
--	if (IS_ERR(adv7511->gpio_pd))
--		return PTR_ERR(adv7511->gpio_pd);
-+	if (IS_ERR(adv7511->gpio_pd)) {
-+		ret = PTR_ERR(adv7511->gpio_pd);
-+		goto uninit_regulators;
-+	}
- 
- 	if (adv7511->gpio_pd) {
- 		mdelay(5);
-@@ -995,12 +1056,14 @@ static int adv7511_probe(struct i2c_clie
- 	}
- 
- 	adv7511->regmap = devm_regmap_init_i2c(i2c, &adv7511_regmap_config);
--	if (IS_ERR(adv7511->regmap))
--		return PTR_ERR(adv7511->regmap);
-+	if (IS_ERR(adv7511->regmap)) {
-+		ret = PTR_ERR(adv7511->regmap);
-+		goto uninit_regulators;
-+	}
- 
- 	ret = regmap_read(adv7511->regmap, ADV7511_REG_CHIP_REVISION, &val);
- 	if (ret)
--		return ret;
-+		goto uninit_regulators;
- 	dev_dbg(dev, "Rev. %d\n", val);
- 
- 	if (adv7511->type == ADV7511)
-@@ -1010,7 +1073,7 @@ static int adv7511_probe(struct i2c_clie
- 	else
- 		ret = adv7533_patch_registers(adv7511);
- 	if (ret)
--		return ret;
-+		goto uninit_regulators;
- 
- 	regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR, edid_i2c_addr);
- 	regmap_write(adv7511->regmap, ADV7511_REG_PACKET_I2C_ADDR,
-@@ -1020,10 +1083,11 @@ static int adv7511_probe(struct i2c_clie
- 
- 	adv7511_packet_disable(adv7511, 0xffff);
- 
--	adv7511->i2c_main = i2c;
- 	adv7511->i2c_edid = i2c_new_dummy(i2c->adapter, edid_i2c_addr >> 1);
--	if (!adv7511->i2c_edid)
--		return -ENOMEM;
-+	if (!adv7511->i2c_edid) {
-+		ret = -ENOMEM;
-+		goto uninit_regulators;
-+	}
- 
- 	if (adv7511->type == ADV7533) {
- 		ret = adv7533_init_cec(adv7511);
-@@ -1072,6 +1136,8 @@ err_unregister_cec:
- 	adv7533_uninit_cec(adv7511);
- err_i2c_unregister_edid:
- 	i2c_unregister_device(adv7511->i2c_edid);
-+uninit_regulators:
-+	adv7511_uninit_regulators(adv7511);
- 
- 	return ret;
- }
-@@ -1085,6 +1151,8 @@ static int adv7511_remove(struct i2c_cli
- 		adv7533_uninit_cec(adv7511);
- 	}
- 
-+	adv7511_uninit_regulators(adv7511);
-+
- 	drm_bridge_remove(&adv7511->bridge);
- 
- 	adv7511_audio_exit(adv7511);
diff --git a/patches.renesas/0002-clocksource-em_sti-Compute-rate-before-registration.patch b/patches.renesas/0002-clocksource-em_sti-Compute-rate-before-registration.patch
deleted file mode 100644
index a2b32e20431284..00000000000000
--- a/patches.renesas/0002-clocksource-em_sti-Compute-rate-before-registration.patch
+++ /dev/null
@@ -1,106 +0,0 @@
-From 0e0354a566fd8c79628ed603cf9fc909461c9b84 Mon Sep 17 00:00:00 2001
-From: Nicolai Stange <nicstange@gmail.com>
-Date: Mon, 6 Feb 2017 22:12:02 +0100
-Subject: [PATCH 002/286] clocksource: em_sti: Compute rate before registration
-
-With the upcoming NTP correction related rate adjustments to be implemented
-in the clockevents core, the latter needs to get informed about every rate
-change of a clockevent device made after its registration.
-
-Currently, em_sti violates this requirement in that it registers its
-clockevent device with a dummy rate and sets its final rate through
-clockevents_config() called from its ->set_state_oneshot().
-
-This patch moves the setting of the clockevent device's rate to its
-registration.
-
-I checked all current em_sti users in arch/arm/mach-shmobile and right now,
-none of them changes any rate in any clock tree relevant to em_sti after
-their respective time_init(). Since all em_sti instances are created after
-time_init(), none of them should ever observe any clock rate changes.
-
-- Determine the ->rate value in em_sti_probe() at device probing rather
-  than at first usage.
-- Set the clockevent device's rate at its registration.
-- Although not strictly necessary for the upcoming clockevent core changes,
-  set the clocksource's rate at its registration for consistency.
-
-Signed-off-by: Nicolai Stange <nicstange@gmail.com>
-Signed-off-by: John Stultz <john.stultz@linaro.org>
-(cherry picked from commit 4e53aa2fde4124878fc6b2183d6e8ec46e12ceb0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clocksource/em_sti.c |   25 ++++++++++++-------------
- 1 file changed, 12 insertions(+), 13 deletions(-)
-
---- a/drivers/clocksource/em_sti.c
-+++ b/drivers/clocksource/em_sti.c
-@@ -84,9 +84,6 @@ static int em_sti_enable(struct em_sti_p
- 		return ret;
- 	}
- 
--	/* configure channel, periodic mode and maximum timeout */
--	p->rate = clk_get_rate(p->clk);
--
- 	/* reset the counter */
- 	em_sti_write(p, STI_SET_H, 0x40000000);
- 	em_sti_write(p, STI_SET_L, 0x00000000);
-@@ -205,13 +202,9 @@ static cycle_t em_sti_clocksource_read(s
- 
- static int em_sti_clocksource_enable(struct clocksource *cs)
- {
--	int ret;
- 	struct em_sti_priv *p = cs_to_em_sti(cs);
- 
--	ret = em_sti_start(p, USER_CLOCKSOURCE);
--	if (!ret)
--		__clocksource_update_freq_hz(cs, p->rate);
--	return ret;
-+	return em_sti_start(p, USER_CLOCKSOURCE);
- }
- 
- static void em_sti_clocksource_disable(struct clocksource *cs)
-@@ -240,8 +233,7 @@ static int em_sti_register_clocksource(s
- 
- 	dev_info(&p->pdev->dev, "used as clock source\n");
- 
--	/* Register with dummy 1 Hz value, gets updated in ->enable() */
--	clocksource_register_hz(cs, 1);
-+	clocksource_register_hz(cs, p->rate);
- 	return 0;
- }
- 
-@@ -263,7 +255,6 @@ static int em_sti_clock_event_set_onesho
- 
- 	dev_info(&p->pdev->dev, "used for oneshot clock events\n");
- 	em_sti_start(p, USER_CLOCKEVENT);
--	clockevents_config(&p->ced, p->rate);
- 	return 0;
- }
- 
-@@ -294,8 +285,7 @@ static void em_sti_register_clockevent(s
- 
- 	dev_info(&p->pdev->dev, "used for clock events\n");
- 
--	/* Register with dummy 1 Hz value, gets updated in ->set_state_oneshot() */
--	clockevents_config_and_register(ced, 1, 2, 0xffffffff);
-+	clockevents_config_and_register(ced, p->rate, 2, 0xffffffff);
- }
- 
- static int em_sti_probe(struct platform_device *pdev)
-@@ -344,6 +334,15 @@ static int em_sti_probe(struct platform_
- 		return ret;
- 	}
- 
-+	ret = clk_enable(p->clk);
-+	if (ret < 0) {
-+		dev_err(&p->pdev->dev, "cannot enable clock\n");
-+		clk_unprepare(p->clk);
-+		return ret;
-+	}
-+	p->rate = clk_get_rate(p->clk);
-+	clk_disable(p->clk);
-+
- 	raw_spin_lock_init(&p->lock);
- 	em_sti_register_clockevent(p);
- 	em_sti_register_clocksource(p);
diff --git a/patches.renesas/0002-drm-bridge-adv7511-Enable-the-audio-data-and-clock-p.patch b/patches.renesas/0002-drm-bridge-adv7511-Enable-the-audio-data-and-clock-p.patch
deleted file mode 100644
index afd9b07786c0e3..00000000000000
--- a/patches.renesas/0002-drm-bridge-adv7511-Enable-the-audio-data-and-clock-p.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From f0e43dea74b7b5a3a458de7af13dbb55ac4948dc Mon Sep 17 00:00:00 2001
-From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
-Date: Mon, 28 Nov 2016 17:22:32 -0800
-Subject: [PATCH 002/299] drm/bridge: adv7511: Enable the audio data and clock
- pads on adv7533
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This patch enables the Audio Data and Clock pads to the adv7533 bridge.
-Without this patch audio can not be played.
-
-Cc: David Airlie <airlied@linux.ie>
-Cc: Archit Taneja <architt@codeaurora.org>
-Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Cc: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
-Cc: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
-Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
-Cc: Andy Green <andy@warmcat.com>
-Cc: Dave Long <dave.long@linaro.org>
-Cc: Guodong Xu <guodong.xu@linaro.org>
-Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
-Cc: Mark Brown <broonie@kernel.org>
-Cc: Lars-Peter Clausen <lars@metafoo.de>
-Cc: Jose Abreu <joabreu@synopsys.com>
-Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Cc: dri-devel@lists.freedesktop.org
-Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
-Signed-off-by: John Stultz <john.stultz@linaro.org>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/1480382552-28219-3-git-send-email-john.stultz@linaro.org
-(cherry picked from commit b2383fa3592061cda53b1650bf538b1d82add816)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/adv7511/adv7533.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/gpu/drm/bridge/adv7511/adv7533.c
-+++ b/drivers/gpu/drm/bridge/adv7511/adv7533.c
-@@ -29,6 +29,7 @@ static const struct reg_sequence adv7533
- 	{ 0x17, 0xd0 },
- 	{ 0x24, 0x20 },
- 	{ 0x57, 0x11 },
-+	{ 0x05, 0xc8 },
- };
- 
- static const struct regmap_config adv7533_cec_regmap_config = {
diff --git a/patches.renesas/0003-arm64-dts-r8a7796-Add-I2C-for-DVFS-device-node.patch b/patches.renesas/0003-arm64-dts-r8a7796-Add-I2C-for-DVFS-device-node.patch
deleted file mode 100644
index 53da886b45df11..00000000000000
--- a/patches.renesas/0003-arm64-dts-r8a7796-Add-I2C-for-DVFS-device-node.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 12d77c1aa293e03e71546c6fbc82badc653de5c1 Mon Sep 17 00:00:00 2001
-From: Dien Pham <dien.pham.ry@rvc.renesas.com>
-Date: Thu, 26 Jan 2017 09:52:27 +0100
-Subject: [PATCH 003/286] arm64: dts: r8a7796: Add I2C for DVFS device node
-
-This patch adds I2C for DVFS device node for R8A7796 SoC.
-
-Signed-off-by: Dien Pham <dien.pham.ry@rvc.renesas.com>
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 0fb1fd20043f619e444720062e61cdc40130c0c5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -25,6 +25,7 @@
- 		i2c4 = &i2c4;
- 		i2c5 = &i2c5;
- 		i2c6 = &i2c6;
-+		i2c7 = &i2c_dvfs;
- 	};
- 
- 	psci {
-@@ -268,6 +269,19 @@
- 			#power-domain-cells = <1>;
- 		};
- 
-+		i2c_dvfs: i2c@e60b0000 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			compatible = "renesas,iic-r8a7796",
-+				     "renesas,rcar-gen3-iic",
-+				     "renesas,rmobile-iic";
-+			reg = <0 0xe60b0000 0 0x425>;
-+			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 926>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
- 		i2c0: i2c@e6500000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
diff --git a/patches.renesas/0003-media-cec-pass-parent-device-in-register-not-allocat.patch b/patches.renesas/0003-media-cec-pass-parent-device-in-register-not-allocat.patch
deleted file mode 100644
index e46c94a2b4979a..00000000000000
--- a/patches.renesas/0003-media-cec-pass-parent-device-in-register-not-allocat.patch
+++ /dev/null
@@ -1,377 +0,0 @@
-From 7d5db65022debc59bda386f72c9c4c40df2a3f56 Mon Sep 17 00:00:00 2001
-From: Hans Verkuil <hans.verkuil@cisco.com>
-Date: Fri, 25 Nov 2016 06:23:34 -0200
-Subject: [PATCH 003/299] [media] cec: pass parent device in register(), not
- allocate()
-
-The cec_allocate_adapter function doesn't need the parent device, only the
-cec_register_adapter function needs it.
-
-Drop the cec_devnode parent field, since devnode.dev.parent can be used
-instead.
-
-This change makes the framework consistent with other frameworks where the
-parent device is not used until the device is registered.
-
-Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit f51e80804f084de269954d875c0892b081b7df3c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/media/kapi/cec-core.rst         |   14 ++++++--------
- drivers/media/i2c/adv7511.c                   |    5 +++--
- drivers/media/i2c/adv7604.c                   |    6 +++---
- drivers/media/i2c/adv7842.c                   |    6 +++---
- drivers/media/platform/vivid/vivid-cec.c      |    3 +--
- drivers/media/platform/vivid/vivid-cec.h      |    1 -
- drivers/media/platform/vivid/vivid-core.c     |    9 ++++-----
- drivers/staging/media/cec/cec-api.c           |    2 +-
- drivers/staging/media/cec/cec-core.c          |   18 ++++++++++--------
- drivers/staging/media/pulse8-cec/pulse8-cec.c |    4 ++--
- drivers/staging/media/s5p-cec/s5p_cec.c       |    5 ++---
- drivers/staging/media/st-cec/stih-cec.c       |    5 ++---
- include/media/cec.h                           |   10 ++++------
- 13 files changed, 41 insertions(+), 47 deletions(-)
-
---- a/Documentation/media/kapi/cec-core.rst
-+++ b/Documentation/media/kapi/cec-core.rst
-@@ -37,9 +37,8 @@ The struct cec_adapter represents the CE
- calling cec_allocate_adapter() and deleted by calling cec_delete_adapter():
- 
- .. c:function::
--   struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops,
--	       void *priv, const char *name, u32 caps, u8 available_las,
--	       struct device *parent);
-+   struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops, void *priv,
-+   const char *name, u32 caps, u8 available_las);
- 
- .. c:function::
-    void cec_delete_adapter(struct cec_adapter *adap);
-@@ -66,20 +65,19 @@ available_las:
- 	the number of simultaneous logical addresses that this
- 	adapter can handle. Must be 1 <= available_las <= CEC_MAX_LOG_ADDRS.
- 
--parent:
--	the parent device.
--
- 
- To register the /dev/cecX device node and the remote control device (if
- CEC_CAP_RC is set) you call:
- 
- .. c:function::
--	int cec_register_adapter(struct cec_adapter \*adap);
-+	int cec_register_adapter(struct cec_adapter *adap, struct device *parent);
-+
-+where parent is the parent device.
- 
- To unregister the devices call:
- 
- .. c:function::
--	void cec_unregister_adapter(struct cec_adapter \*adap);
-+	void cec_unregister_adapter(struct cec_adapter *adap);
- 
- Note: if cec_register_adapter() fails, then call cec_delete_adapter() to
- clean up. But if cec_register_adapter() succeeded, then only call
---- a/drivers/media/i2c/adv7511.c
-+++ b/drivers/media/i2c/adv7511.c
-@@ -1732,9 +1732,10 @@ static bool adv7511_check_edid_status(st
- static int adv7511_registered(struct v4l2_subdev *sd)
- {
- 	struct adv7511_state *state = get_adv7511_state(sd);
-+	struct i2c_client *client = v4l2_get_subdevdata(sd);
- 	int err;
- 
--	err = cec_register_adapter(state->cec_adap);
-+	err = cec_register_adapter(state->cec_adap, &client->dev);
- 	if (err)
- 		cec_delete_adapter(state->cec_adap);
- 	return err;
-@@ -1928,7 +1929,7 @@ static int adv7511_probe(struct i2c_clie
- 	state->cec_adap = cec_allocate_adapter(&adv7511_cec_adap_ops,
- 		state, dev_name(&client->dev), CEC_CAP_TRANSMIT |
- 		CEC_CAP_LOG_ADDRS | CEC_CAP_PASSTHROUGH | CEC_CAP_RC,
--		ADV7511_MAX_ADDRS, &client->dev);
-+		ADV7511_MAX_ADDRS);
- 	err = PTR_ERR_OR_ZERO(state->cec_adap);
- 	if (err) {
- 		destroy_workqueue(state->work_queue);
---- a/drivers/media/i2c/adv7604.c
-+++ b/drivers/media/i2c/adv7604.c
-@@ -2617,9 +2617,10 @@ static int adv76xx_subscribe_event(struc
- static int adv76xx_registered(struct v4l2_subdev *sd)
- {
- 	struct adv76xx_state *state = to_state(sd);
-+	struct i2c_client *client = v4l2_get_subdevdata(sd);
- 	int err;
- 
--	err = cec_register_adapter(state->cec_adap);
-+	err = cec_register_adapter(state->cec_adap, &client->dev);
- 	if (err)
- 		cec_delete_adapter(state->cec_adap);
- 	return err;
-@@ -3500,8 +3501,7 @@ static int adv76xx_probe(struct i2c_clie
- 	state->cec_adap = cec_allocate_adapter(&adv76xx_cec_adap_ops,
- 		state, dev_name(&client->dev),
- 		CEC_CAP_TRANSMIT | CEC_CAP_LOG_ADDRS |
--		CEC_CAP_PASSTHROUGH | CEC_CAP_RC, ADV76XX_MAX_ADDRS,
--		&client->dev);
-+		CEC_CAP_PASSTHROUGH | CEC_CAP_RC, ADV76XX_MAX_ADDRS);
- 	err = PTR_ERR_OR_ZERO(state->cec_adap);
- 	if (err)
- 		goto err_entity;
---- a/drivers/media/i2c/adv7842.c
-+++ b/drivers/media/i2c/adv7842.c
-@@ -3250,9 +3250,10 @@ static int adv7842_subscribe_event(struc
- static int adv7842_registered(struct v4l2_subdev *sd)
- {
- 	struct adv7842_state *state = to_state(sd);
-+	struct i2c_client *client = v4l2_get_subdevdata(sd);
- 	int err;
- 
--	err = cec_register_adapter(state->cec_adap);
-+	err = cec_register_adapter(state->cec_adap, &client->dev);
- 	if (err)
- 		cec_delete_adapter(state->cec_adap);
- 	return err;
-@@ -3568,8 +3569,7 @@ static int adv7842_probe(struct i2c_clie
- 	state->cec_adap = cec_allocate_adapter(&adv7842_cec_adap_ops,
- 		state, dev_name(&client->dev),
- 		CEC_CAP_TRANSMIT | CEC_CAP_LOG_ADDRS |
--		CEC_CAP_PASSTHROUGH | CEC_CAP_RC, ADV7842_MAX_ADDRS,
--		&client->dev);
-+		CEC_CAP_PASSTHROUGH | CEC_CAP_RC, ADV7842_MAX_ADDRS);
- 	err = PTR_ERR_OR_ZERO(state->cec_adap);
- 	if (err)
- 		goto err_entity;
---- a/drivers/media/platform/vivid/vivid-cec.c
-+++ b/drivers/media/platform/vivid/vivid-cec.c
-@@ -216,7 +216,6 @@ static const struct cec_adap_ops vivid_c
- 
- struct cec_adapter *vivid_cec_alloc_adap(struct vivid_dev *dev,
- 					 unsigned int idx,
--					 struct device *parent,
- 					 bool is_source)
- {
- 	char name[sizeof(dev->vid_out_dev.name) + 2];
-@@ -227,5 +226,5 @@ struct cec_adapter *vivid_cec_alloc_adap
- 		 is_source ? dev->vid_out_dev.name : dev->vid_cap_dev.name,
- 		 idx);
- 	return cec_allocate_adapter(&vivid_cec_adap_ops, dev,
--		name, caps, 1, parent);
-+		name, caps, 1);
- }
---- a/drivers/media/platform/vivid/vivid-cec.h
-+++ b/drivers/media/platform/vivid/vivid-cec.h
-@@ -20,7 +20,6 @@
- #ifdef CONFIG_VIDEO_VIVID_CEC
- struct cec_adapter *vivid_cec_alloc_adap(struct vivid_dev *dev,
- 					 unsigned int idx,
--					 struct device *parent,
- 					 bool is_source);
- void vivid_cec_bus_free_work(struct vivid_dev *dev);
- 
---- a/drivers/media/platform/vivid/vivid-core.c
-+++ b/drivers/media/platform/vivid/vivid-core.c
-@@ -1167,12 +1167,12 @@ static int vivid_create_instance(struct
- 		if (in_type_counter[HDMI]) {
- 			struct cec_adapter *adap;
- 
--			adap = vivid_cec_alloc_adap(dev, 0, &pdev->dev, false);
-+			adap = vivid_cec_alloc_adap(dev, 0, false);
- 			ret = PTR_ERR_OR_ZERO(adap);
- 			if (ret < 0)
- 				goto unreg_dev;
- 			dev->cec_rx_adap = adap;
--			ret = cec_register_adapter(adap);
-+			ret = cec_register_adapter(adap, &pdev->dev);
- 			if (ret < 0) {
- 				cec_delete_adapter(adap);
- 				dev->cec_rx_adap = NULL;
-@@ -1222,13 +1222,12 @@ static int vivid_create_instance(struct
- 			if (dev->output_type[i] != HDMI)
- 				continue;
- 			dev->cec_output2bus_map[i] = bus_cnt;
--			adap = vivid_cec_alloc_adap(dev, bus_cnt,
--						     &pdev->dev, true);
-+			adap = vivid_cec_alloc_adap(dev, bus_cnt, true);
- 			ret = PTR_ERR_OR_ZERO(adap);
- 			if (ret < 0)
- 				goto unreg_dev;
- 			dev->cec_tx_adap[bus_cnt] = adap;
--			ret = cec_register_adapter(adap);
-+			ret = cec_register_adapter(adap, &pdev->dev);
- 			if (ret < 0) {
- 				cec_delete_adapter(adap);
- 				dev->cec_tx_adap[bus_cnt] = NULL;
---- a/drivers/staging/media/cec/cec-api.c
-+++ b/drivers/staging/media/cec/cec-api.c
-@@ -88,7 +88,7 @@ static long cec_adap_g_caps(struct cec_a
- {
- 	struct cec_caps caps = {};
- 
--	strlcpy(caps.driver, adap->devnode.parent->driver->name,
-+	strlcpy(caps.driver, adap->devnode.dev.parent->driver->name,
- 		sizeof(caps.driver));
- 	strlcpy(caps.name, adap->name, sizeof(caps.name));
- 	caps.available_log_addrs = adap->available_log_addrs;
---- a/drivers/staging/media/cec/cec-core.c
-+++ b/drivers/staging/media/cec/cec-core.c
-@@ -132,7 +132,6 @@ static int __must_check cec_devnode_regi
- 	devnode->dev.bus = &cec_bus_type;
- 	devnode->dev.devt = MKDEV(MAJOR(cec_dev_t), minor);
- 	devnode->dev.release = cec_devnode_release;
--	devnode->dev.parent = devnode->parent;
- 	dev_set_name(&devnode->dev, "cec%d", devnode->minor);
- 	device_initialize(&devnode->dev);
- 
-@@ -198,13 +197,11 @@ static void cec_devnode_unregister(struc
- 
- struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops,
- 					 void *priv, const char *name, u32 caps,
--					 u8 available_las, struct device *parent)
-+					 u8 available_las)
- {
- 	struct cec_adapter *adap;
- 	int res;
- 
--	if (WARN_ON(!parent))
--		return ERR_PTR(-EINVAL);
- 	if (WARN_ON(!caps))
- 		return ERR_PTR(-EINVAL);
- 	if (WARN_ON(!ops))
-@@ -214,8 +211,6 @@ struct cec_adapter *cec_allocate_adapter
- 	adap = kzalloc(sizeof(*adap), GFP_KERNEL);
- 	if (!adap)
- 		return ERR_PTR(-ENOMEM);
--	adap->owner = parent->driver->owner;
--	adap->devnode.parent = parent;
- 	strlcpy(adap->name, name, sizeof(adap->name));
- 	adap->phys_addr = CEC_PHYS_ADDR_INVALID;
- 	adap->log_addrs.cec_version = CEC_OP_CEC_VERSION_2_0;
-@@ -264,7 +259,6 @@ struct cec_adapter *cec_allocate_adapter
- 	adap->rc->input_id.vendor = 0;
- 	adap->rc->input_id.product = 0;
- 	adap->rc->input_id.version = 1;
--	adap->rc->dev.parent = parent;
- 	adap->rc->driver_type = RC_DRIVER_SCANCODE;
- 	adap->rc->driver_name = CEC_NAME;
- 	adap->rc->allowed_protocols = RC_BIT_CEC;
-@@ -278,14 +272,22 @@ struct cec_adapter *cec_allocate_adapter
- }
- EXPORT_SYMBOL_GPL(cec_allocate_adapter);
- 
--int cec_register_adapter(struct cec_adapter *adap)
-+int cec_register_adapter(struct cec_adapter *adap,
-+			 struct device *parent)
- {
- 	int res;
- 
- 	if (IS_ERR_OR_NULL(adap))
- 		return 0;
- 
-+	if (WARN_ON(!parent))
-+		return -EINVAL;
-+
-+	adap->owner = parent->driver->owner;
-+	adap->devnode.dev.parent = parent;
-+
- #if IS_REACHABLE(CONFIG_RC_CORE)
-+	adap->rc->dev.parent = parent;
- 	if (adap->capabilities & CEC_CAP_RC) {
- 		res = rc_register_device(adap->rc);
- 
---- a/drivers/staging/media/pulse8-cec/pulse8-cec.c
-+++ b/drivers/staging/media/pulse8-cec/pulse8-cec.c
-@@ -651,7 +651,7 @@ static int pulse8_connect(struct serio *
- 
- 	pulse8->serio = serio;
- 	pulse8->adap = cec_allocate_adapter(&pulse8_cec_adap_ops, pulse8,
--		"HDMI CEC", caps, 1, &serio->dev);
-+		"HDMI CEC", caps, 1);
- 	err = PTR_ERR_OR_ZERO(pulse8->adap);
- 	if (err < 0)
- 		goto free_device;
-@@ -671,7 +671,7 @@ static int pulse8_connect(struct serio *
- 	if (err)
- 		goto close_serio;
- 
--	err = cec_register_adapter(pulse8->adap);
-+	err = cec_register_adapter(pulse8->adap, &serio->dev);
- 	if (err < 0)
- 		goto close_serio;
- 
---- a/drivers/staging/media/s5p-cec/s5p_cec.c
-+++ b/drivers/staging/media/s5p-cec/s5p_cec.c
-@@ -204,12 +204,11 @@ static int s5p_cec_probe(struct platform
- 	cec->adap = cec_allocate_adapter(&s5p_cec_adap_ops, cec,
- 		CEC_NAME,
- 		CEC_CAP_PHYS_ADDR | CEC_CAP_LOG_ADDRS | CEC_CAP_TRANSMIT |
--		CEC_CAP_PASSTHROUGH | CEC_CAP_RC,
--		1, &pdev->dev);
-+		CEC_CAP_PASSTHROUGH | CEC_CAP_RC, 1);
- 	ret = PTR_ERR_OR_ZERO(cec->adap);
- 	if (ret)
- 		return ret;
--	ret = cec_register_adapter(cec->adap);
-+	ret = cec_register_adapter(cec->adap, &pdev->dev);
- 	if (ret) {
- 		cec_delete_adapter(cec->adap);
- 		return ret;
---- a/drivers/staging/media/st-cec/stih-cec.c
-+++ b/drivers/staging/media/st-cec/stih-cec.c
-@@ -336,13 +336,12 @@ static int stih_cec_probe(struct platfor
- 	cec->adap = cec_allocate_adapter(&sti_cec_adap_ops, cec,
- 			CEC_NAME,
- 			CEC_CAP_LOG_ADDRS | CEC_CAP_PASSTHROUGH |
--			CEC_CAP_PHYS_ADDR | CEC_CAP_TRANSMIT,
--			1, &pdev->dev);
-+			CEC_CAP_PHYS_ADDR | CEC_CAP_TRANSMIT, 1);
- 	ret = PTR_ERR_OR_ZERO(cec->adap);
- 	if (ret)
- 		return ret;
- 
--	ret = cec_register_adapter(cec->adap);
-+	ret = cec_register_adapter(cec->adap, &pdev->dev);
- 	if (ret) {
- 		cec_delete_adapter(cec->adap);
- 		return ret;
---- a/include/media/cec.h
-+++ b/include/media/cec.h
-@@ -35,7 +35,6 @@
-  * struct cec_devnode - cec device node
-  * @dev:	cec device
-  * @cdev:	cec character device
-- * @parent:	parent device
-  * @minor:	device node minor number
-  * @registered:	the device was correctly registered
-  * @unregistered: the device was unregistered
-@@ -51,7 +50,6 @@ struct cec_devnode {
- 	/* sysfs */
- 	struct device dev;
- 	struct cdev cdev;
--	struct device *parent;
- 
- 	/* device info */
- 	int minor;
-@@ -198,9 +196,8 @@ static inline bool cec_is_sink(const str
- 
- #if IS_ENABLED(CONFIG_MEDIA_CEC)
- struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops,
--		void *priv, const char *name, u32 caps, u8 available_las,
--		struct device *parent);
--int cec_register_adapter(struct cec_adapter *adap);
-+		void *priv, const char *name, u32 caps, u8 available_las);
-+int cec_register_adapter(struct cec_adapter *adap, struct device *parent);
- void cec_unregister_adapter(struct cec_adapter *adap);
- void cec_delete_adapter(struct cec_adapter *adap);
- 
-@@ -218,7 +215,8 @@ void cec_received_msg(struct cec_adapter
- 
- #else
- 
--static inline int cec_register_adapter(struct cec_adapter *adap)
-+static inline int cec_register_adapter(struct cec_adapter *adap,
-+				       struct device *parent)
- {
- 	return 0;
- }
diff --git a/patches.renesas/0004-ASoC-rsnd-depends-on-OF.patch b/patches.renesas/0004-ASoC-rsnd-depends-on-OF.patch
deleted file mode 100644
index 4e60df76bd142a..00000000000000
--- a/patches.renesas/0004-ASoC-rsnd-depends-on-OF.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From fdd111762812963ae852636a786a0740fa3067a1 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 26 Oct 2016 04:12:34 +0000
-Subject: [PATCH 004/299] ASoC: rsnd: depends on OF
-
-Current Renesas sound driver is completely depends on CONFIG_OF
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 609c94865adcef3dba070a2d3905e4b67b4e6919)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/Kconfig |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/sound/soc/sh/Kconfig
-+++ b/sound/soc/sh/Kconfig
-@@ -37,6 +37,7 @@ config SND_SOC_SH4_SIU
- config SND_SOC_RCAR
- 	tristate "R-Car series SRU/SCU/SSIU/SSI support"
- 	depends on COMMON_CLK
-+	depends on OF
- 	select SND_SIMPLE_CARD
- 	select REGMAP_MMIO
- 	help
diff --git a/patches.renesas/0004-arm64-dts-r8a7796-salvator-x-Add-I2C-for-DVFS-device.patch b/patches.renesas/0004-arm64-dts-r8a7796-salvator-x-Add-I2C-for-DVFS-device.patch
deleted file mode 100644
index 7deb36fc524de7..00000000000000
--- a/patches.renesas/0004-arm64-dts-r8a7796-salvator-x-Add-I2C-for-DVFS-device.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 703192ae09064fa24ff84c04174774d313715df7 Mon Sep 17 00:00:00 2001
-From: Dien Pham <dien.pham.ry@rvc.renesas.com>
-Date: Thu, 26 Jan 2017 09:52:28 +0100
-Subject: [PATCH 004/286] arm64: dts: r8a7796: salvator-x: Add I2C for DVFS
- device support
-
-This patch adds support of I2C for DVFS device for Salvator-X board on
-R8A7796 SoC.
-
-Signed-off-by: Dien Pham <dien.pham.ry@rvc.renesas.com>
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit d8e62f0729bb404caa6ba42b65d5a1e4d370a6e3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-@@ -261,3 +261,7 @@
- 	timeout-sec = <60>;
- 	status = "okay";
- };
-+
-+&i2c_dvfs {
-+	status = "okay";
-+};
diff --git a/patches.renesas/0004-drm-bridge-adv7511-Enable-HPD-interrupts-to-support-.patch b/patches.renesas/0004-drm-bridge-adv7511-Enable-HPD-interrupts-to-support-.patch
deleted file mode 100644
index aca5285e1eddeb..00000000000000
--- a/patches.renesas/0004-drm-bridge-adv7511-Enable-HPD-interrupts-to-support-.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 90d20bb5e94027fe643733b1ca8a97fd87cdf41e Mon Sep 17 00:00:00 2001
-From: Archit Taneja <architt@codeaurora.org>
-Date: Mon, 16 Jan 2017 16:52:49 -0800
-Subject: [PATCH 004/255] drm/bridge: adv7511: Enable HPD interrupts to support
- hotplug and improve monitor detection
-
-On some adv7511 implementations, we can get some spurious
-disconnect signals which can cause monitor probing to fail.
-
-This patch enables HPD (hot plug detect) interrupt support
-which allows the monitor to be properly re-initialized when
-the spurious disconnect signal goes away.
-
-This also enables proper hotplug support.
-
-Cc: David Airlie <airlied@linux.ie>
-Cc: Archit Taneja <architt@codeaurora.org>
-Cc: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Cc: Lars-Peter Clausen <lars@metafoo.de>
-Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Cc: dri-devel@lists.freedesktop.org
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Originally-by: Archit Taneja <architt@codeaurora.org>
-[jstultz: Added proper commit message]
-Signed-off-by: John Stultz <john.stultz@linaro.org>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/1484614372-15342-4-git-send-email-john.stultz@linaro.org
-
-(cherry picked from commit 40d86d2d22b04c2b2e48e2fe7054b85cf5021f25)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/adv7511/adv7511_drv.c |    6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
-+++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
-@@ -338,7 +338,7 @@ static void __adv7511_power_on(struct ad
- 		 * Still, let's be safe and stick to the documentation.
- 		 */
- 		regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(0),
--			     ADV7511_INT0_EDID_READY);
-+			     ADV7511_INT0_EDID_READY | ADV7511_INT0_HPD);
- 		regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(1),
- 			     ADV7511_INT1_DDC_ERROR);
- 	}
-@@ -850,6 +850,10 @@ static int adv7511_bridge_attach(struct
- 	if (adv->type == ADV7533)
- 		ret = adv7533_attach_dsi(adv);
- 
-+	if (adv->i2c_main->irq)
-+		regmap_write(adv->regmap, ADV7511_REG_INT_ENABLE(0),
-+			     ADV7511_INT0_HPD);
-+
- 	return ret;
- }
- 
diff --git a/patches.renesas/0005-ASoC-rsnd-enable-COMPILE_TEST.patch b/patches.renesas/0005-ASoC-rsnd-enable-COMPILE_TEST.patch
deleted file mode 100644
index 257e5aa53b5524..00000000000000
--- a/patches.renesas/0005-ASoC-rsnd-enable-COMPILE_TEST.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 1277c76953e9c4829e2775eaa66ba4c819cb9e13 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 26 Oct 2016 04:12:53 +0000
-Subject: [PATCH 005/299] ASoC: rsnd: enable COMPILE_TEST
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit e144e5d06d0207c0b1631545fc1821565ee0fe6b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/Kconfig |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/sound/soc/sh/Kconfig
-+++ b/sound/soc/sh/Kconfig
-@@ -1,5 +1,5 @@
- menu "SoC Audio support for SuperH"
--	depends on SUPERH || ARCH_SHMOBILE
-+	depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST
- 
- config SND_SOC_PCM_SH7760
- 	tristate "SoC Audio support for Renesas SH7760"
-@@ -37,7 +37,7 @@ config SND_SOC_SH4_SIU
- config SND_SOC_RCAR
- 	tristate "R-Car series SRU/SCU/SSIU/SSI support"
- 	depends on COMMON_CLK
--	depends on OF
-+	depends on OF || COMPILE_TEST
- 	select SND_SIMPLE_CARD
- 	select REGMAP_MMIO
- 	help
diff --git a/patches.renesas/0005-arm64-dts-r8a7795-Add-I2C-for-DVFS-core-to-dtsi.patch b/patches.renesas/0005-arm64-dts-r8a7795-Add-I2C-for-DVFS-core-to-dtsi.patch
deleted file mode 100644
index de5286baf060ae..00000000000000
--- a/patches.renesas/0005-arm64-dts-r8a7795-Add-I2C-for-DVFS-core-to-dtsi.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 43ac3b64dfa4aba65d9254a5638dc39b1e8bb1a2 Mon Sep 17 00:00:00 2001
-From: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
-Date: Thu, 26 Jan 2017 09:52:29 +0100
-Subject: [PATCH 005/286] arm64: dts: r8a7795: Add I2C for DVFS core to dtsi
-
-This patch adds I2C for DVFS device support for R8A7795 SoC.
-
-Signed-off-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
-Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
-Signed-off-by: Dien Pham <dien.pham.ry@rvc.renesas.com>
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit d7e0d64a46f97f67ecbc0194ce6a394f512109c5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |   14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -25,6 +25,7 @@
- 		i2c4 = &i2c4;
- 		i2c5 = &i2c5;
- 		i2c6 = &i2c6;
-+		i2c7 = &i2c_dvfs;
- 	};
- 
- 	psci {
-@@ -792,6 +793,19 @@
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
-+
-+		i2c_dvfs: i2c@e60b0000 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			compatible = "renesas,iic-r8a7795",
-+				     "renesas,rcar-gen3-iic",
-+				     "renesas,rmobile-iic";
-+			reg = <0 0xe60b0000 0 0x425>;
-+			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 926>;
-+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
- 
- 		i2c0: i2c@e6500000 {
- 			#address-cells = <1>;
diff --git a/patches.renesas/0006-arm64-dts-r8a7795-salvator-x-Enable-I2C-for-DVFS-dev.patch b/patches.renesas/0006-arm64-dts-r8a7795-salvator-x-Enable-I2C-for-DVFS-dev.patch
deleted file mode 100644
index 01b2764426c46b..00000000000000
--- a/patches.renesas/0006-arm64-dts-r8a7795-salvator-x-Enable-I2C-for-DVFS-dev.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 8cc947bf0ad234059dcec0b0913745e7a0cd384a Mon Sep 17 00:00:00 2001
-From: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
-Date: Thu, 26 Jan 2017 09:52:30 +0100
-Subject: [PATCH 006/286] arm64: dts: r8a7795: salvator-x: Enable I2C for DVFS
- device
-
-This patch enables I2C for DVFS device for for Salvator-X board on
-R8A7795 SoC.
-
-Signed-off-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 006ced572a3b2247639ce06443aff00704888001)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-@@ -485,6 +485,10 @@
- 	clock-frequency = <22579200>;
- };
- 
-+&i2c_dvfs {
-+	status = "okay";
-+};
-+
- &avb {
- 	pinctrl-0 = <&avb_pins>;
- 	pinctrl-names = "default";
diff --git a/patches.renesas/0006-arm64-dts-r8a7795-salvator-x-enable-UHS-for-SDHI-0-3.patch b/patches.renesas/0006-arm64-dts-r8a7795-salvator-x-enable-UHS-for-SDHI-0-3.patch
deleted file mode 100644
index 71dbd9e43cf571..00000000000000
--- a/patches.renesas/0006-arm64-dts-r8a7795-salvator-x-enable-UHS-for-SDHI-0-3.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From 56cab5182c3301e001cb0a0f48bc2ce806922b97 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Tue, 13 Sep 2016 12:56:59 +0200
-Subject: [PATCH 006/299] arm64: dts: r8a7795: salvator-x: enable UHS for SDHI
- 0 & 3
-
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2a927eeaf6b64f39b4f0907417f85c7ee1d26119)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |   22 +++++++++++++++++++--
- 1 file changed, 20 insertions(+), 2 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-@@ -237,11 +237,25 @@
- 	sdhi0_pins: sd0 {
- 		groups = "sdhi0_data4", "sdhi0_ctrl";
- 		function = "sdhi0";
-+		power-source = <3300>;
-+	};
-+
-+	sdhi0_pins_uhs: sd0_uhs {
-+		groups = "sdhi0_data4", "sdhi0_ctrl";
-+		function = "sdhi0";
-+		power-source = <1800>;
- 	};
- 
- 	sdhi3_pins: sd3 {
- 		groups = "sdhi3_data4", "sdhi3_ctrl";
- 		function = "sdhi3";
-+		power-source = <3300>;
-+	};
-+
-+	sdhi3_pins_uhs: sd3_uhs {
-+		groups = "sdhi3_data4", "sdhi3_ctrl";
-+		function = "sdhi3";
-+		power-source = <1800>;
- 	};
- 
- 	sound_pins: sound {
-@@ -371,25 +385,29 @@
- 
- &sdhi0 {
- 	pinctrl-0 = <&sdhi0_pins>;
--	pinctrl-names = "default";
-+	pinctrl-1 = <&sdhi0_pins_uhs>;
-+	pinctrl-names = "default", "state_uhs";
- 
- 	vmmc-supply = <&vcc_sdhi0>;
- 	vqmmc-supply = <&vccq_sdhi0>;
- 	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
- 	wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
- 	bus-width = <4>;
-+	sd-uhs-sdr50;
- 	status = "okay";
- };
- 
- &sdhi3 {
- 	pinctrl-0 = <&sdhi3_pins>;
--	pinctrl-names = "default";
-+	pinctrl-1 = <&sdhi3_pins_uhs>;
-+	pinctrl-names = "default", "state_uhs";
- 
- 	vmmc-supply = <&vcc_sdhi3>;
- 	vqmmc-supply = <&vccq_sdhi3>;
- 	cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
- 	wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
- 	bus-width = <4>;
-+	sd-uhs-sdr50;
- 	status = "okay";
- };
- 
diff --git a/patches.renesas/0007-arm64-dts-h3ulcb-Update-memory-node-to-4-GiB-map.patch b/patches.renesas/0007-arm64-dts-h3ulcb-Update-memory-node-to-4-GiB-map.patch
deleted file mode 100644
index 245e3a94fe0b07..00000000000000
--- a/patches.renesas/0007-arm64-dts-h3ulcb-Update-memory-node-to-4-GiB-map.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From a1e5a69fcc15a90127c60a0b4289f1e173b86284 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>
-Date: Thu, 26 Jan 2017 18:13:52 +0300
-Subject: [PATCH 007/286] arm64: dts: h3ulcb: Update memory node to 4 GiB map
-
-This patch adds memory region:
-
-  - After changes, the H3ULCB board has the following map:
-    Bank0: 1GiB RAM : 0x000048000000 -> 0x0007fffffff
-    Bank1: 1GiB RAM : 0x000500000000 -> 0x0053fffffff
-    Bank2: 1GiB RAM : 0x000600000000 -> 0x0063fffffff
-    Bank3: 1GiB RAM : 0x000700000000 -> 0x0073fffffff
-
-  - Before changes, the old map looked like this:
-    Bank0: 1GiB RAM : 0x000048000000 -> 0x0007fffffff
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a262d66224c4c34bc2bee16d4d37d460a738788c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts |   15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-@@ -33,6 +33,21 @@
- 		reg = <0x0 0x48000000 0x0 0x38000000>;
- 	};
- 
-+	memory@500000000 {
-+		device_type = "memory";
-+		reg = <0x5 0x00000000 0x0 0x40000000>;
-+	};
-+
-+	memory@600000000 {
-+		device_type = "memory";
-+		reg = <0x6 0x00000000 0x0 0x40000000>;
-+	};
-+
-+	memory@700000000 {
-+		device_type = "memory";
-+		reg = <0x7 0x00000000 0x0 0x40000000>;
-+	};
-+
- 	leds {
- 		compatible = "gpio-leds";
- 
diff --git a/patches.renesas/0007-arm64-dts-r8a7796-salvator-x-Populate-EXTALR.patch b/patches.renesas/0007-arm64-dts-r8a7796-salvator-x-Populate-EXTALR.patch
deleted file mode 100644
index 89572e4be8c583..00000000000000
--- a/patches.renesas/0007-arm64-dts-r8a7796-salvator-x-Populate-EXTALR.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From d1c93663e3c086a2895e0d7772de40e162acab39 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 20 Sep 2016 14:25:17 +0200
-Subject: [PATCH 007/299] arm64: dts: r8a7796: salvator-x: Populate EXTALR
-
-It can be used for the watchdog.
-
-Based on similar work for r8a7795/salvator-x by Wolfram Sang.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ad47fff1941115d8caf88061851993f6e001c03e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-@@ -49,6 +49,10 @@
- 	clock-frequency = <16666666>;
- };
- 
-+&extalr_clk {
-+	clock-frequency = <32768>;
-+};
-+
- &scif2 {
- 	pinctrl-0 = <&scif2_pins>;
- 	pinctrl-names = "default";
diff --git a/patches.renesas/0008-ASoC-ak4642-Replace-mdelay-function-to-msleep.patch b/patches.renesas/0008-ASoC-ak4642-Replace-mdelay-function-to-msleep.patch
deleted file mode 100644
index 1ca4d1f451346b..00000000000000
--- a/patches.renesas/0008-ASoC-ak4642-Replace-mdelay-function-to-msleep.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 053281ae9ff6250c8d50ddaeaa2275ad05f4d855 Mon Sep 17 00:00:00 2001
-From: Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com>
-Date: Wed, 11 Jan 2017 04:32:43 +0000
-Subject: [PATCH 008/255] ASoC: ak4642: Replace mdelay function to msleep
-
-Replace mdelay to msleep to avoid busy loop on ak4642_lout_event().
-Otherwise, sometimes playback doesn't work correctly when pulseaudio
-was used.
-
-Signed-off-by: Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit fc1e65c3a858fe9a454da9e9fd180834ed089cbd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/codecs/ak4642.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/sound/soc/codecs/ak4642.c
-+++ b/sound/soc/codecs/ak4642.c
-@@ -189,7 +189,7 @@ static int ak4642_lout_event(struct snd_
- 	case SND_SOC_DAPM_POST_PMU:
- 	case SND_SOC_DAPM_POST_PMD:
- 		/* Power save mode OFF */
--		mdelay(300);
-+		msleep(300);
- 		snd_soc_update_bits(codec, SG_SL2, LOPS, 0);
- 		break;
- 	}
diff --git a/patches.renesas/0008-arm64-dts-r8a7795-Use-rgmii-txid-phy-mode-for-Ethern.patch b/patches.renesas/0008-arm64-dts-r8a7795-Use-rgmii-txid-phy-mode-for-Ethern.patch
deleted file mode 100644
index a6c7578892ca13..00000000000000
--- a/patches.renesas/0008-arm64-dts-r8a7795-Use-rgmii-txid-phy-mode-for-Ethern.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From b731f5be9342650b498665e13e4de21b63612de6 Mon Sep 17 00:00:00 2001
-From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
-Date: Wed, 1 Feb 2017 09:42:00 +0100
-Subject: [PATCH 008/286] arm64: dts: r8a7795: Use rgmii-txid phy-mode for
- EthernetAVB
-
-Since commit 61fccb2d6274 ("ravb: Add tx and rx clock internal delays mode
-of APSR") the EthernetAVB driver enables tx and rx clock internal delay
-modes (TDM and RDM) depending on the phy mode as follows:
-
-    phy mode   | ASPR delay mode
-    -----------+----------------
-    rgmii-id   | TDM and RDM
-    rgmii-rxid | RDM
-    rgmii-txid | TDM
-
-And prior to the above commit no internal delay mode settings were
-implemented for any phy mode.
-
-With this and the above change present tx internal delay mode is enabled
-which has been observed to address failures in the case of 1Gbps
-communication using the by salvator-x board with the KSZ9031RNX phy. This
-has been reported to occur with both the r8a7795 (H3) and r8a7796 (M3-W)
-SoCs.
-
-With the above patch present but this patch present tx and rx internal
-delay modes are enabled; and with the above patch and this present absent
-no internal delay modes are enabled. In both cases failures have been
-observed when using 1Gbps communication in the environments described
-above.
-
-Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit dda3887907d743385f2599fa18c765bd295ae2da)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -564,7 +564,7 @@
- 					  "ch24";
- 			clocks = <&cpg CPG_MOD 812>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
--			phy-mode = "rgmii-id";
-+			phy-mode = "rgmii-txid";
- 			#address-cells = <1>;
- 			#size-cells = <0>;
- 			status = "disabled";
diff --git a/patches.renesas/0008-arm64-dts-r8a7795-salvator-x-Add-DU-LVDS-output-endp.patch b/patches.renesas/0008-arm64-dts-r8a7795-salvator-x-Add-DU-LVDS-output-endp.patch
deleted file mode 100644
index 36059c2878c4c9..00000000000000
--- a/patches.renesas/0008-arm64-dts-r8a7795-salvator-x-Add-DU-LVDS-output-endp.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 352bb1d1c3512722975e37942374ae17bf657baf Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 3 Oct 2016 20:12:31 +0300
-Subject: [PATCH 008/299] arm64: dts: r8a7795: salvator-x: Add DU LVDS output
- endpoint
-
-Declaring the endpoint makes LVDS enablement easier by just including
-the corresponding panel's dtsi file.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ea3c17b03b9bb57c0ea05a8afac934649128c2f0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-@@ -191,6 +191,10 @@
- 				remote-endpoint = <&adv7123_in>;
- 			};
- 		};
-+		port@3 {
-+			lvds_connector: endpoint {
-+			};
-+		};
- 	};
- };
- 
diff --git a/patches.renesas/0009-arm64-defconfig-Enable-DRM-DU-and-V4L2-FCP-VSP-modul.patch b/patches.renesas/0009-arm64-defconfig-Enable-DRM-DU-and-V4L2-FCP-VSP-modul.patch
deleted file mode 100644
index d980fbed595636..00000000000000
--- a/patches.renesas/0009-arm64-defconfig-Enable-DRM-DU-and-V4L2-FCP-VSP-modul.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From e13f4d6313bd605e3a8efb0b04113acbb2b36c8e Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm+renesas@opensource.se>
-Date: Wed, 26 Oct 2016 14:24:22 +0900
-Subject: [PATCH 009/299] arm64: defconfig: Enable DRM DU and V4L2 FCP + VSP
- modules
-
-Extend the ARM64 defconfig to enable the DU DRM device as module
-together with required dependencies of V4L2 FCP and VSP modules.
-
-This enables VGA output on the r8a7795 Salvator-X board.
-
-Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 833c97254724a620d1d9fb9a580681fb52536fbf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/configs/defconfig |   14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
---- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -294,8 +294,22 @@ CONFIG_REGULATOR_PWM=y
- CONFIG_REGULATOR_QCOM_SMD_RPM=y
- CONFIG_REGULATOR_QCOM_SPMI=y
- CONFIG_REGULATOR_S2MPS11=y
-+CONFIG_MEDIA_SUPPORT=m
-+CONFIG_MEDIA_CAMERA_SUPPORT=y
-+CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
-+CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
-+CONFIG_MEDIA_CONTROLLER=y
-+CONFIG_VIDEO_V4L2_SUBDEV_API=y
-+# CONFIG_DVB_NET is not set
-+CONFIG_V4L_MEM2MEM_DRIVERS=y
-+CONFIG_VIDEO_RENESAS_FCP=m
-+CONFIG_VIDEO_RENESAS_VSP1=m
- CONFIG_DRM=m
- CONFIG_DRM_NOUVEAU=m
-+CONFIG_DRM_RCAR_DU=m
-+CONFIG_DRM_RCAR_HDMI=y
-+CONFIG_DRM_RCAR_LVDS=y
-+CONFIG_DRM_RCAR_VSP=y
- CONFIG_DRM_TEGRA=m
- CONFIG_DRM_PANEL_SIMPLE=m
- CONFIG_DRM_I2C_ADV7511=m
diff --git a/patches.renesas/0009-arm64-dts-r8a7795-salvator-x-Fix-EthernetAVB-PHY-tim.patch b/patches.renesas/0009-arm64-dts-r8a7795-salvator-x-Fix-EthernetAVB-PHY-tim.patch
deleted file mode 100644
index dac9ae5723fcb5..00000000000000
--- a/patches.renesas/0009-arm64-dts-r8a7795-salvator-x-Fix-EthernetAVB-PHY-tim.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 9d19633139ba2d394bd7d27827a40f810845a32b Mon Sep 17 00:00:00 2001
-From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
-Date: Wed, 1 Feb 2017 09:42:01 +0100
-Subject: [PATCH 009/286] arm64: dts: r8a7795: salvator-x: Fix EthernetAVB PHY
- timing
-
-Set PHY rxc-skew-ps to 1500 and all other values to their default values.
-
-This is intended to to address failures in the case of 1Gbps communication
-using the by salvator-x board with the KSZ9031RNX phy. This has been
-reported to occur with both the r8a7795 (H3) and r8a7796 (M3-W) SoCs.
-
-Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0e45da1c6ea6b18616d95c697ecd6234bc504ef6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |   13 +------------
- 1 file changed, 1 insertion(+), 12 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-@@ -497,18 +497,7 @@
- 	status = "okay";
- 
- 	phy0: ethernet-phy@0 {
--		rxc-skew-ps = <900>;
--		rxdv-skew-ps = <0>;
--		rxd0-skew-ps = <0>;
--		rxd1-skew-ps = <0>;
--		rxd2-skew-ps = <0>;
--		rxd3-skew-ps = <0>;
--		txc-skew-ps = <900>;
--		txen-skew-ps = <0>;
--		txd0-skew-ps = <0>;
--		txd1-skew-ps = <0>;
--		txd2-skew-ps = <0>;
--		txd3-skew-ps = <0>;
-+		rxc-skew-ps = <1500>;
- 		reg = <0>;
- 		interrupt-parent = <&gpio2>;
- 		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
diff --git a/patches.renesas/0009-clk-renesas-r8a7796-Add-CAN-peripheral-clock.patch b/patches.renesas/0009-clk-renesas-r8a7796-Add-CAN-peripheral-clock.patch
deleted file mode 100644
index dcbce9d7115a8d..00000000000000
--- a/patches.renesas/0009-clk-renesas-r8a7796-Add-CAN-peripheral-clock.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From d860150628106aaf2b364090290c0b4fdfe54b7b Mon Sep 17 00:00:00 2001
-From: Chris Paterson <chris.paterson2@renesas.com>
-Date: Tue, 22 Nov 2016 13:46:00 +0000
-Subject: [PATCH 009/255] clk: renesas: r8a7796: Add CAN peripheral clock
-
-Based on a patch for r8a7795 by Ramesh Shanmugasundaram.
-
-Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit e00d20c99d39a554bb90de853f33afeffa7ce2e1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -181,6 +181,8 @@ static const struct mssr_mod_clk r8a7796
- 	DEF_MOD("gpio2",		 910,	R8A7796_CLK_S3D4),
- 	DEF_MOD("gpio1",		 911,	R8A7796_CLK_S3D4),
- 	DEF_MOD("gpio0",		 912,	R8A7796_CLK_S3D4),
-+	DEF_MOD("can-if1",		 915,	R8A7796_CLK_S3D4),
-+	DEF_MOD("can-if0",		 916,	R8A7796_CLK_S3D4),
- 	DEF_MOD("i2c6",			 918,	R8A7796_CLK_S0D6),
- 	DEF_MOD("i2c5",			 919,	R8A7796_CLK_S0D6),
- 	DEF_MOD("i2c4",			 927,	R8A7796_CLK_S0D6),
diff --git a/patches.renesas/0010-arm64-dts-h3ulcb-Fix-EthernetAVB-PHY-timing.patch b/patches.renesas/0010-arm64-dts-h3ulcb-Fix-EthernetAVB-PHY-timing.patch
deleted file mode 100644
index a64a6214be4999..00000000000000
--- a/patches.renesas/0010-arm64-dts-h3ulcb-Fix-EthernetAVB-PHY-timing.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 3e30b73fbad9de8c9f84a5c43066cff94ab7d5c8 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Wed, 1 Feb 2017 09:42:02 +0100
-Subject: [PATCH 010/286] arm64: dts: h3ulcb: Fix EthernetAVB PHY timing
-
-Set PHY rxc-skew-ps to 1500 and all other values to their default values.
-
-This is intended to to address failures in the case of 1Gbps communication
-using the by h3ulcb board with the KSZ9031RNX phy.
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5b9fd1962f605a31842371471e559407c293131f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts |   13 +------------
- 1 file changed, 1 insertion(+), 12 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-@@ -354,18 +354,7 @@
- 	status = "okay";
- 
- 	phy0: ethernet-phy@0 {
--		rxc-skew-ps = <900>;
--		rxdv-skew-ps = <0>;
--		rxd0-skew-ps = <0>;
--		rxd1-skew-ps = <0>;
--		rxd2-skew-ps = <0>;
--		rxd3-skew-ps = <0>;
--		txc-skew-ps = <900>;
--		txen-skew-ps = <0>;
--		txd0-skew-ps = <0>;
--		txd1-skew-ps = <0>;
--		txd2-skew-ps = <0>;
--		txd3-skew-ps = <0>;
-+		rxc-skew-ps = <1500>;
- 		reg = <0>;
- 		interrupt-parent = <&gpio2>;
- 		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
diff --git a/patches.renesas/0010-arm64-dts-r8a7795-Remove-FCP-SoC-specific-compatible.patch b/patches.renesas/0010-arm64-dts-r8a7795-Remove-FCP-SoC-specific-compatible.patch
deleted file mode 100644
index f37d967573f707..00000000000000
--- a/patches.renesas/0010-arm64-dts-r8a7795-Remove-FCP-SoC-specific-compatible.patch
+++ /dev/null
@@ -1,125 +0,0 @@
-From beaadb43bfd206479f957a9a64faa12cecc335c4 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 17 Oct 2016 23:29:03 +0300
-Subject: [PATCH 010/299] arm64: dts: r8a7795: Remove FCP SoC-specific
- compatible strings
-
-The SoC-specific compatible strings have been removed from the FCP DT
-bindings, removed them from the device tree.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ab33da0bd8f9b6a8b16a61bb5baae365a87cd52c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |   24 ++++++++++++------------
- 1 file changed, 12 insertions(+), 12 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -1307,28 +1307,28 @@
- 		};
- 
- 		fcpvb1: fcp@fe92f000 {
--			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
-+			compatible = "renesas,fcpv";
- 			reg = <0 0xfe92f000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 606>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
- 		};
- 
- 		fcpf0: fcp@fe950000 {
--			compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
-+			compatible = "renesas,fcpf";
- 			reg = <0 0xfe950000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 615>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
- 		};
- 
- 		fcpf1: fcp@fe951000 {
--			compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
-+			compatible = "renesas,fcpf";
- 			reg = <0 0xfe951000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 614>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
- 		};
- 
- 		fcpf2: fcp@fe952000 {
--			compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
-+			compatible = "renesas,fcpf";
- 			reg = <0 0xfe952000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 613>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-@@ -1345,7 +1345,7 @@
- 		};
- 
- 		fcpvb0: fcp@fe96f000 {
--			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
-+			compatible = "renesas,fcpv";
- 			reg = <0 0xfe96f000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 607>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-@@ -1362,7 +1362,7 @@
- 		};
- 
- 		fcpvi0: fcp@fe9af000 {
--			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
-+			compatible = "renesas,fcpv";
- 			reg = <0 0xfe9af000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 611>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-@@ -1379,7 +1379,7 @@
- 		};
- 
- 		fcpvi1: fcp@fe9bf000 {
--			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
-+			compatible = "renesas,fcpv";
- 			reg = <0 0xfe9bf000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 610>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-@@ -1396,7 +1396,7 @@
- 		};
- 
- 		fcpvi2: fcp@fe9cf000 {
--			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
-+			compatible = "renesas,fcpv";
- 			reg = <0 0xfe9cf000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 609>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-@@ -1413,7 +1413,7 @@
- 		};
- 
- 		fcpvd0: fcp@fea27000 {
--			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
-+			compatible = "renesas,fcpv";
- 			reg = <0 0xfea27000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 603>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-@@ -1430,7 +1430,7 @@
- 		};
- 
- 		fcpvd1: fcp@fea2f000 {
--			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
-+			compatible = "renesas,fcpv";
- 			reg = <0 0xfea2f000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 602>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-@@ -1447,7 +1447,7 @@
- 		};
- 
- 		fcpvd2: fcp@fea37000 {
--			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
-+			compatible = "renesas,fcpv";
- 			reg = <0 0xfea37000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 601>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-@@ -1464,7 +1464,7 @@
- 		};
- 
- 		fcpvd3: fcp@fea3f000 {
--			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
-+			compatible = "renesas,fcpv";
- 			reg = <0 0xfea3f000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 600>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
diff --git a/patches.renesas/0010-clk-renesas-r8a7796-Add-CANFD-clock.patch b/patches.renesas/0010-clk-renesas-r8a7796-Add-CANFD-clock.patch
deleted file mode 100644
index 23a79f0c9663d7..00000000000000
--- a/patches.renesas/0010-clk-renesas-r8a7796-Add-CANFD-clock.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From ae7a1af011c2dc22c6c9d3238a6a9d2445a6d348 Mon Sep 17 00:00:00 2001
-From: Chris Paterson <chris.paterson2@renesas.com>
-Date: Tue, 22 Nov 2016 13:46:01 +0000
-Subject: [PATCH 010/255] clk: renesas: r8a7796: Add CANFD clock
-
-Based on a patch for r8a7795 by Ramesh Shanmugasundaram.
-
-Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 9e620beecdf40303c950f344806730093e5d08ae)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -103,6 +103,7 @@ static const struct cpg_core_clk r8a7796
- 	DEF_FIXED("cl",         R8A7796_CLK_CL,    CLK_PLL1_DIV2, 48, 1),
- 	DEF_FIXED("cp",         R8A7796_CLK_CP,    CLK_EXTAL,      2, 1),
- 
-+	DEF_DIV6P1("canfd",     R8A7796_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
- 	DEF_DIV6P1("csi0",      R8A7796_CLK_CSI0,  CLK_PLL1_DIV4, 0x00c),
- 
- 	DEF_DIV6_RO("osc",      R8A7796_CLK_OSC,   CLK_EXTAL, CPG_RCKCR,  8),
diff --git a/patches.renesas/0011-arm64-dts-r8a7796-Use-rgmii-txid-phy-mode-for-Ethern.patch b/patches.renesas/0011-arm64-dts-r8a7796-Use-rgmii-txid-phy-mode-for-Ethern.patch
deleted file mode 100644
index a3ee3e42aa6146..00000000000000
--- a/patches.renesas/0011-arm64-dts-r8a7796-Use-rgmii-txid-phy-mode-for-Ethern.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From fba4075b8b42f6bc778148c334fdc92bf4ef95a2 Mon Sep 17 00:00:00 2001
-From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
-Date: Wed, 1 Feb 2017 09:42:03 +0100
-Subject: [PATCH 011/286] arm64: dts: r8a7796: Use rgmii-txid phy-mode for
- EthernetAVB
-
-Since commit 61fccb2d6274 ("ravb: Add tx and rx clock internal delays mode
-of APSR") the EthernetAVB driver enables tx and rx clock internal delay
-modes (TDM and RDM) depending on the phy mode as follows:
-
-    phy mode   | ASPR delay mode
-    -----------+----------------
-    rgmii-id   | TDM and RDM
-    rgmii-rxid | RDM
-    rgmii-txid | TDM
-
-And prior to the above commit no internal delay mode settings were
-implemented for any phy mode.
-
-With this and the above change present tx internal delay mode is enabled
-which has been observed to address failures in the case of 1Gbps
-communication using the by salvator-x board with the KSZ9031RNX phy. This
-has been reported to occur with both the r8a7795 (H3) and r8a7796 (M3-W)
-SoCs.
-
-With the above patch present but this patch present tx and rx internal
-delay modes are enabled; and with the above patch and this present absent
-no internal delay modes are enabled. In both cases failures have been
-observed when using 1Gbps communication in the environments described
-above.
-
-Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 325f39010b431f6a1ece74d69f10dcca2329c08d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -482,7 +482,7 @@
- 					  "ch24";
- 			clocks = <&cpg CPG_MOD 812>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
--			phy-mode = "rgmii-id";
-+			phy-mode = "rgmii-txid";
- 			#address-cells = <1>;
- 			#size-cells = <0>;
- 			status = "disabled";
diff --git a/patches.renesas/0011-arm64-dts-r8a7796-add-SDHI-nodes.patch b/patches.renesas/0011-arm64-dts-r8a7796-add-SDHI-nodes.patch
deleted file mode 100644
index e030f4e00b01d3..00000000000000
--- a/patches.renesas/0011-arm64-dts-r8a7796-add-SDHI-nodes.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 9213a66f320de7e2bdc5e408dc99358fda1ce5ba Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Wed, 17 Aug 2016 10:08:05 +0200
-Subject: [PATCH 011/299] arm64: dts: r8a7796: add SDHI nodes
-
-Add SDHI nodes to the DT of the r8a7796 SoC.
-
-Based on the DT of the r8a7795 SoC.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit a513cf1e645785cd119676aea4aa00c4e1e0c7b3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   40 +++++++++++++++++++++++++++++++
- 1 file changed, 40 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -250,5 +250,45 @@
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
-+
-+		sdhi0: sd@ee100000 {
-+			compatible = "renesas,sdhi-r8a7796";
-+			reg = <0 0xee100000 0 0x2000>;
-+			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 314>;
-+			max-frequency = <200000000>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		sdhi1: sd@ee120000 {
-+			compatible = "renesas,sdhi-r8a7796";
-+			reg = <0 0xee120000 0 0x2000>;
-+			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 313>;
-+			max-frequency = <200000000>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		sdhi2: sd@ee140000 {
-+			compatible = "renesas,sdhi-r8a7796";
-+			reg = <0 0xee140000 0 0x2000>;
-+			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 312>;
-+			max-frequency = <200000000>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		sdhi3: sd@ee160000 {
-+			compatible = "renesas,sdhi-r8a7796";
-+			reg = <0 0xee160000 0 0x2000>;
-+			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 311>;
-+			max-frequency = <200000000>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
- 	};
- };
diff --git a/patches.renesas/0011-clk-renesas-r8a7796-Add-CAN-FD-peripheral-clock.patch b/patches.renesas/0011-clk-renesas-r8a7796-Add-CAN-FD-peripheral-clock.patch
deleted file mode 100644
index a3c3ee975aeb20..00000000000000
--- a/patches.renesas/0011-clk-renesas-r8a7796-Add-CAN-FD-peripheral-clock.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 471c880ad7b5a982edd355c1250caf41fcad8f14 Mon Sep 17 00:00:00 2001
-From: Chris Paterson <chris.paterson2@renesas.com>
-Date: Tue, 22 Nov 2016 13:46:02 +0000
-Subject: [PATCH 011/255] clk: renesas: r8a7796: Add CAN FD peripheral clock
-
-Based on a patch for r8a7795 by Ramesh Shanmugasundaram.
-
-Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 0ece46c24f5fdc29fc17bfb019a4e64ebe0d6b56)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -182,6 +182,7 @@ static const struct mssr_mod_clk r8a7796
- 	DEF_MOD("gpio2",		 910,	R8A7796_CLK_S3D4),
- 	DEF_MOD("gpio1",		 911,	R8A7796_CLK_S3D4),
- 	DEF_MOD("gpio0",		 912,	R8A7796_CLK_S3D4),
-+	DEF_MOD("can-fd",		 914,	R8A7796_CLK_S3D2),
- 	DEF_MOD("can-if1",		 915,	R8A7796_CLK_S3D4),
- 	DEF_MOD("can-if0",		 916,	R8A7796_CLK_S3D4),
- 	DEF_MOD("i2c6",			 918,	R8A7796_CLK_S0D6),
diff --git a/patches.renesas/0012-arm64-Enable-HIBERNATION-in-defconfig.patch b/patches.renesas/0012-arm64-Enable-HIBERNATION-in-defconfig.patch
deleted file mode 100644
index 030ac56fb329d8..00000000000000
--- a/patches.renesas/0012-arm64-Enable-HIBERNATION-in-defconfig.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From ba47d07d4ed1efce8e593640498733c3b45d3b18 Mon Sep 17 00:00:00 2001
-From: Catalin Marinas <catalin.marinas@arm.com>
-Date: Wed, 19 Oct 2016 17:59:52 +0100
-Subject: [PATCH 012/299] arm64: Enable HIBERNATION in defconfig
-
-This patch adds CONFIG_HIBERNATION to the arm64 defconfig.
-
-Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
-Signed-off-by: Olof Johansson <olof@lixom.net>
-(cherry picked from commit 87ca90ef9503835839f4a2cbd3b015c2608bcbc7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/configs/defconfig |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -82,6 +82,7 @@ CONFIG_KEXEC=y
- # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
- CONFIG_COMPAT=y
- CONFIG_CPU_IDLE=y
-+CONFIG_HIBERNATION=y
- CONFIG_ARM_CPUIDLE=y
- CONFIG_CPU_FREQ=y
- CONFIG_CPUFREQ_DT=y
diff --git a/patches.renesas/0012-arm64-dts-r8a7796-salvator-x-Fix-EthernetAVB-PHY-tim.patch b/patches.renesas/0012-arm64-dts-r8a7796-salvator-x-Fix-EthernetAVB-PHY-tim.patch
deleted file mode 100644
index b2a721ec74511d..00000000000000
--- a/patches.renesas/0012-arm64-dts-r8a7796-salvator-x-Fix-EthernetAVB-PHY-tim.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 849cb9f03570b13a3581e9348962f13b88477556 Mon Sep 17 00:00:00 2001
-From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
-Date: Wed, 1 Feb 2017 09:42:04 +0100
-Subject: [PATCH 012/286] arm64: dts: r8a7796: salvator-x: Fix EthernetAVB PHY
- timing
-
-Set PHY rxc-skew-ps to 1500 and all other values to their default values.
-
-This is intended to to address failures in the case of 1Gbps communication
-using the by salvator-x board with the KSZ9031RNX phy. This has been
-reported to occur with both the r8a7795 (H3) and r8a7796 (M3-W) SoCs.
-
-Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ef3f08c83fd186ab4bbad6a6250c5a347fbf6551)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts |   13 +------------
- 1 file changed, 1 insertion(+), 12 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-@@ -172,18 +172,7 @@
- 	status = "okay";
- 
- 	phy0: ethernet-phy@0 {
--		rxc-skew-ps = <900>;
--		rxdv-skew-ps = <0>;
--		rxd0-skew-ps = <0>;
--		rxd1-skew-ps = <0>;
--		rxd2-skew-ps = <0>;
--		rxd3-skew-ps = <0>;
--		txc-skew-ps = <900>;
--		txen-skew-ps = <0>;
--		txd0-skew-ps = <0>;
--		txd1-skew-ps = <0>;
--		txd2-skew-ps = <0>;
--		txd3-skew-ps = <0>;
-+		rxc-skew-ps = <1500>;
- 		reg = <0>;
- 		interrupt-parent = <&gpio2>;
- 		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
diff --git a/patches.renesas/0012-clk-renesas-r8a7796-Add-MSIOF-controller-clocks.patch b/patches.renesas/0012-clk-renesas-r8a7796-Add-MSIOF-controller-clocks.patch
deleted file mode 100644
index 1758e05813438b..00000000000000
--- a/patches.renesas/0012-clk-renesas-r8a7796-Add-MSIOF-controller-clocks.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 17eacb01b5f6bb8ba6dcf18117c50e52ef830c5a Mon Sep 17 00:00:00 2001
-From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
-Date: Tue, 15 Mar 2016 16:07:29 +0900
-Subject: [PATCH 012/255] clk: renesas: r8a7796: Add MSIOF controller clocks
-
-This patch adds MSIOF{0,1,2,3} clocks for R8A7796 SoC.
-
-Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit e6bdf28eff475a026b922abe78ae710e7179bdf7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -105,6 +105,7 @@ static const struct cpg_core_clk r8a7796
- 
- 	DEF_DIV6P1("canfd",     R8A7796_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
- 	DEF_DIV6P1("csi0",      R8A7796_CLK_CSI0,  CLK_PLL1_DIV4, 0x00c),
-+	DEF_DIV6P1("mso",       R8A7796_CLK_MSO,   CLK_PLL1_DIV4, 0x014),
- 
- 	DEF_DIV6_RO("osc",      R8A7796_CLK_OSC,   CLK_EXTAL, CPG_RCKCR,  8),
- 	DEF_DIV6_RO("r_int",    CLK_RINT,          CLK_EXTAL, CPG_RCKCR, 32),
-@@ -118,6 +119,10 @@ static const struct mssr_mod_clk r8a7796
- 	DEF_MOD("scif3",		 204,	R8A7796_CLK_S3D4),
- 	DEF_MOD("scif1",		 206,	R8A7796_CLK_S3D4),
- 	DEF_MOD("scif0",		 207,	R8A7796_CLK_S3D4),
-+	DEF_MOD("msiof3",		 208,	R8A7796_CLK_MSO),
-+	DEF_MOD("msiof2",		 209,	R8A7796_CLK_MSO),
-+	DEF_MOD("msiof1",		 210,	R8A7796_CLK_MSO),
-+	DEF_MOD("msiof0",		 211,	R8A7796_CLK_MSO),
- 	DEF_MOD("sys-dmac2",		 217,	R8A7796_CLK_S0D3),
- 	DEF_MOD("sys-dmac1",		 218,	R8A7796_CLK_S0D3),
- 	DEF_MOD("sys-dmac0",		 219,	R8A7796_CLK_S0D3),
diff --git a/patches.renesas/0013-Input-gpio_keys_polled-keep-button-data-constant.patch b/patches.renesas/0013-Input-gpio_keys_polled-keep-button-data-constant.patch
deleted file mode 100644
index b5d84efa8838c5..00000000000000
--- a/patches.renesas/0013-Input-gpio_keys_polled-keep-button-data-constant.patch
+++ /dev/null
@@ -1,329 +0,0 @@
-From 216f04b6d43b6a804d28b315e5fe5343e9249750 Mon Sep 17 00:00:00 2001
-From: Dmitry Torokhov <dmitry.torokhov@gmail.com>
-Date: Tue, 23 Feb 2016 15:32:14 -0800
-Subject: [PATCH 013/299] Input: gpio_keys_polled - keep button data constant
-
-Commit 633a21d80b4a ("input: gpio_keys_polled: Add support for GPIO
-descriptors") placed gpio descriptor into gpio_keys_button structure, which
-is supposed to be part of platform data and not modifiable by the driver.
-To keep the data constant, let's move the descriptor to
-gpio_keys_button_data structure instead.
-
-Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
-(cherry picked from commit 0f78ba96bbcf30a78224fe56f8fd72f87915afdd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/input/keyboard/gpio_keys.c        |   10 +-
- drivers/input/keyboard/gpio_keys_polled.c |  105 ++++++++++++++++--------------
- include/linux/gpio_keys.h                 |    5 -
- 3 files changed, 64 insertions(+), 56 deletions(-)
-
---- a/drivers/input/keyboard/gpio_keys.c
-+++ b/drivers/input/keyboard/gpio_keys.c
-@@ -639,7 +639,6 @@ gpio_keys_get_devtree_pdata(struct devic
- 	struct gpio_keys_button *button;
- 	int error;
- 	int nbuttons;
--	int i;
- 
- 	node = dev->of_node;
- 	if (!node)
-@@ -655,19 +654,18 @@ gpio_keys_get_devtree_pdata(struct devic
- 	if (!pdata)
- 		return ERR_PTR(-ENOMEM);
- 
--	pdata->buttons = (struct gpio_keys_button *)(pdata + 1);
-+	button = (struct gpio_keys_button *)(pdata + 1);
-+
-+	pdata->buttons = button;
- 	pdata->nbuttons = nbuttons;
- 
- 	pdata->rep = !!of_get_property(node, "autorepeat", NULL);
- 
- 	of_property_read_string(node, "label", &pdata->name);
- 
--	i = 0;
- 	for_each_available_child_of_node(node, pp) {
- 		enum of_gpio_flags flags;
- 
--		button = &pdata->buttons[i++];
--
- 		button->gpio = of_get_gpio_flags(pp, 0, &flags);
- 		if (button->gpio < 0) {
- 			error = button->gpio;
-@@ -709,6 +707,8 @@ gpio_keys_get_devtree_pdata(struct devic
- 		if (of_property_read_u32(pp, "debounce-interval",
- 					 &button->debounce_interval))
- 			button->debounce_interval = 5;
-+
-+		button++;
- 	}
- 
- 	if (pdata->nbuttons == 0)
---- a/drivers/input/keyboard/gpio_keys_polled.c
-+++ b/drivers/input/keyboard/gpio_keys_polled.c
-@@ -30,6 +30,7 @@
- #define DRV_NAME	"gpio-keys-polled"
- 
- struct gpio_keys_button_data {
-+	struct gpio_desc *gpiod;
- 	int last_state;
- 	int count;
- 	int threshold;
-@@ -46,7 +47,7 @@ struct gpio_keys_polled_dev {
- };
- 
- static void gpio_keys_button_event(struct input_polled_dev *dev,
--				   struct gpio_keys_button *button,
-+				   const struct gpio_keys_button *button,
- 				   int state)
- {
- 	struct gpio_keys_polled_dev *bdev = dev->private;
-@@ -70,15 +71,15 @@ static void gpio_keys_button_event(struc
- }
- 
- static void gpio_keys_polled_check_state(struct input_polled_dev *dev,
--					 struct gpio_keys_button *button,
-+					 const struct gpio_keys_button *button,
- 					 struct gpio_keys_button_data *bdata)
- {
- 	int state;
- 
- 	if (bdata->can_sleep)
--		state = !!gpiod_get_value_cansleep(button->gpiod);
-+		state = !!gpiod_get_value_cansleep(bdata->gpiod);
- 	else
--		state = !!gpiod_get_value(button->gpiod);
-+		state = !!gpiod_get_value(bdata->gpiod);
- 
- 	gpio_keys_button_event(dev, button, state);
- 
-@@ -142,48 +143,35 @@ static void gpio_keys_polled_close(struc
- 		pdata->disable(bdev->dev);
- }
- 
--static struct gpio_keys_platform_data *gpio_keys_polled_get_devtree_pdata(struct device *dev)
-+static struct gpio_keys_platform_data *
-+gpio_keys_polled_get_devtree_pdata(struct device *dev)
- {
- 	struct gpio_keys_platform_data *pdata;
- 	struct gpio_keys_button *button;
- 	struct fwnode_handle *child;
--	int error;
- 	int nbuttons;
- 
- 	nbuttons = device_get_child_node_count(dev);
- 	if (nbuttons == 0)
--		return NULL;
-+		return ERR_PTR(-EINVAL);
- 
- 	pdata = devm_kzalloc(dev, sizeof(*pdata) + nbuttons * sizeof(*button),
- 			     GFP_KERNEL);
- 	if (!pdata)
- 		return ERR_PTR(-ENOMEM);
- 
--	pdata->buttons = (struct gpio_keys_button *)(pdata + 1);
-+	button = (struct gpio_keys_button *)(pdata + 1);
-+
-+	pdata->buttons = button;
-+	pdata->nbuttons = nbuttons;
- 
- 	pdata->rep = device_property_present(dev, "autorepeat");
- 	device_property_read_u32(dev, "poll-interval", &pdata->poll_interval);
- 
- 	device_for_each_child_node(dev, child) {
--		struct gpio_desc *desc;
--
--		desc = devm_get_gpiod_from_child(dev, NULL, child);
--		if (IS_ERR(desc)) {
--			error = PTR_ERR(desc);
--			if (error != -EPROBE_DEFER)
--				dev_err(dev,
--					"Failed to get gpio flags, error: %d\n",
--					error);
--			fwnode_handle_put(child);
--			return ERR_PTR(error);
--		}
--
--		button = &pdata->buttons[pdata->nbuttons++];
--		button->gpiod = desc;
--
--		if (fwnode_property_read_u32(child, "linux,code", &button->code)) {
--			dev_err(dev, "Button without keycode: %d\n",
--				pdata->nbuttons - 1);
-+		if (fwnode_property_read_u32(child, "linux,code",
-+					     &button->code)) {
-+			dev_err(dev, "button without keycode\n");
- 			fwnode_handle_put(child);
- 			return ERR_PTR(-EINVAL);
- 		}
-@@ -206,10 +194,9 @@ static struct gpio_keys_platform_data *g
- 		if (fwnode_property_read_u32(child, "debounce-interval",
- 					     &button->debounce_interval))
- 			button->debounce_interval = 5;
--	}
- 
--	if (pdata->nbuttons == 0)
--		return ERR_PTR(-EINVAL);
-+		button++;
-+	}
- 
- 	return pdata;
- }
-@@ -220,7 +207,7 @@ static void gpio_keys_polled_set_abs_par
- 	int i, min = 0, max = 0;
- 
- 	for (i = 0; i < pdata->nbuttons; i++) {
--		struct gpio_keys_button *button = &pdata->buttons[i];
-+		const struct gpio_keys_button *button = &pdata->buttons[i];
- 
- 		if (button->type != EV_ABS || button->code != code)
- 			continue;
-@@ -230,6 +217,7 @@ static void gpio_keys_polled_set_abs_par
- 		if (button->value > max)
- 			max = button->value;
- 	}
-+
- 	input_set_abs_params(input, code, min, max, 0, 0);
- }
- 
-@@ -242,6 +230,7 @@ MODULE_DEVICE_TABLE(of, gpio_keys_polled
- static int gpio_keys_polled_probe(struct platform_device *pdev)
- {
- 	struct device *dev = &pdev->dev;
-+	struct fwnode_handle *child = NULL;
- 	const struct gpio_keys_platform_data *pdata = dev_get_platdata(dev);
- 	struct gpio_keys_polled_dev *bdev;
- 	struct input_polled_dev *poll_dev;
-@@ -254,10 +243,6 @@ static int gpio_keys_polled_probe(struct
- 		pdata = gpio_keys_polled_get_devtree_pdata(dev);
- 		if (IS_ERR(pdata))
- 			return PTR_ERR(pdata);
--		if (!pdata) {
--			dev_err(dev, "missing platform data\n");
--			return -EINVAL;
--		}
- 	}
- 
- 	if (!pdata->poll_interval) {
-@@ -300,20 +285,40 @@ static int gpio_keys_polled_probe(struct
- 		__set_bit(EV_REP, input->evbit);
- 
- 	for (i = 0; i < pdata->nbuttons; i++) {
--		struct gpio_keys_button *button = &pdata->buttons[i];
-+		const struct gpio_keys_button *button = &pdata->buttons[i];
- 		struct gpio_keys_button_data *bdata = &bdev->data[i];
- 		unsigned int type = button->type ?: EV_KEY;
- 
- 		if (button->wakeup) {
- 			dev_err(dev, DRV_NAME " does not support wakeup\n");
-+			fwnode_handle_put(child);
- 			return -EINVAL;
- 		}
- 
--		/*
--		 * Legacy GPIO number so request the GPIO here and
--		 * convert it to descriptor.
--		 */
--		if (!button->gpiod && gpio_is_valid(button->gpio)) {
-+		if (!dev_get_platdata(dev)) {
-+			/* No legacy static platform data */
-+			child = device_get_next_child_node(dev, child);
-+			if (!child) {
-+				dev_err(dev, "missing child device node\n");
-+				return -EINVAL;
-+			}
-+
-+			bdata->gpiod = devm_get_gpiod_from_child(dev, NULL,
-+								 child);
-+			if (IS_ERR(bdata->gpiod)) {
-+				error = PTR_ERR(bdata->gpiod);
-+				if (error != -EPROBE_DEFER)
-+					dev_err(dev,
-+						"failed to get gpio: %d\n",
-+						error);
-+				fwnode_handle_put(child);
-+				return error;
-+			}
-+		} else if (gpio_is_valid(button->gpio)) {
-+			/*
-+			 * Legacy GPIO number so request the GPIO here and
-+			 * convert it to descriptor.
-+			 */
- 			unsigned flags = GPIOF_IN;
- 
- 			if (button->active_low)
-@@ -322,18 +327,22 @@ static int gpio_keys_polled_probe(struct
- 			error = devm_gpio_request_one(&pdev->dev, button->gpio,
- 					flags, button->desc ? : DRV_NAME);
- 			if (error) {
--				dev_err(dev, "unable to claim gpio %u, err=%d\n",
-+				dev_err(dev,
-+					"unable to claim gpio %u, err=%d\n",
- 					button->gpio, error);
- 				return error;
- 			}
- 
--			button->gpiod = gpio_to_desc(button->gpio);
-+			bdata->gpiod = gpio_to_desc(button->gpio);
-+			if (!bdata->gpiod) {
-+				dev_err(dev,
-+					"unable to convert gpio %u to descriptor\n",
-+					button->gpio);
-+				return -EINVAL;
-+			}
- 		}
- 
--		if (IS_ERR(button->gpiod))
--			return PTR_ERR(button->gpiod);
--
--		bdata->can_sleep = gpiod_cansleep(button->gpiod);
-+		bdata->can_sleep = gpiod_cansleep(bdata->gpiod);
- 		bdata->last_state = -1;
- 		bdata->threshold = DIV_ROUND_UP(button->debounce_interval,
- 						pdata->poll_interval);
-@@ -344,6 +353,8 @@ static int gpio_keys_polled_probe(struct
- 							button->code);
- 	}
- 
-+	fwnode_handle_put(child);
-+
- 	bdev->poll_dev = poll_dev;
- 	bdev->dev = dev;
- 	bdev->pdata = pdata;
---- a/include/linux/gpio_keys.h
-+++ b/include/linux/gpio_keys.h
-@@ -2,7 +2,6 @@
- #define _GPIO_KEYS_H
- 
- struct device;
--struct gpio_desc;
- 
- /**
-  * struct gpio_keys_button - configuration parameters
-@@ -18,7 +17,6 @@ struct gpio_desc;
-  *			disable button via sysfs
-  * @value:		axis value for %EV_ABS
-  * @irq:		Irq number in case of interrupt keys
-- * @gpiod:		GPIO descriptor
-  */
- struct gpio_keys_button {
- 	unsigned int code;
-@@ -31,7 +29,6 @@ struct gpio_keys_button {
- 	bool can_disable;
- 	int value;
- 	unsigned int irq;
--	struct gpio_desc *gpiod;
- };
- 
- /**
-@@ -46,7 +43,7 @@ struct gpio_keys_button {
-  * @name:		input device name
-  */
- struct gpio_keys_platform_data {
--	struct gpio_keys_button *buttons;
-+	const struct gpio_keys_button *buttons;
- 	int nbuttons;
- 	unsigned int poll_interval;
- 	unsigned int rep:1;
diff --git a/patches.renesas/0013-arm64-defconfig-Enable-SH-Mobile-I2C-controller.patch b/patches.renesas/0013-arm64-defconfig-Enable-SH-Mobile-I2C-controller.patch
deleted file mode 100644
index 686ec712915818..00000000000000
--- a/patches.renesas/0013-arm64-defconfig-Enable-SH-Mobile-I2C-controller.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 5b19e15eca49afdf6fd7e521d656bde071f42a19 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 26 Jan 2017 09:52:26 +0100
-Subject: [PATCH 013/286] arm64: defconfig: Enable SH Mobile I2C controller
-
-Enable SH Mobile I2C controller for use on R-Car Gen3 SoCs.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 58e7696e0e3c085804fb6754a7dadf7267d0fa77)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm64/configs/defconfig
----
- arch/arm64/configs/defconfig |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -234,6 +234,7 @@ CONFIG_I2C_IMX=y
- CONFIG_I2C_MESON=y
- CONFIG_I2C_MV64XXX=y
- CONFIG_I2C_QUP=y
-+CONFIG_I2C_SH_MOBILE=y
- CONFIG_I2C_TEGRA=y
- CONFIG_I2C_UNIPHIER_F=y
- CONFIG_I2C_RCAR=y
diff --git a/patches.renesas/0013-clk-renesas-cpg-mssr-Migrate-to-CLK_IS_CRITICAL.patch b/patches.renesas/0013-clk-renesas-cpg-mssr-Migrate-to-CLK_IS_CRITICAL.patch
deleted file mode 100644
index 51e6fc43eb00bc..00000000000000
--- a/patches.renesas/0013-clk-renesas-cpg-mssr-Migrate-to-CLK_IS_CRITICAL.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From be0a02d89ccba2fbdb86ae03712e3f6d62e9f582 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 16 Jan 2017 16:15:50 +0100
-Subject: [PATCH 013/255] clk: renesas: cpg-mssr: Migrate to CLK_IS_CRITICAL
-
-When the Renesas CPG/MSSR driver was introduced, it was anticipated that
-critical clocks would be handled through a new CLK_ENABLE_HAND_OFF flag
-soon.  However, CLK_ENABLE_HAND_OFF never made it upstream.
-
-Instead, commit 32b9b10961860860 ("clk: Allow clocks to be marked as
-CRITICAL") introduced CLK_IS_CRITICAL, a flag with slightly differing
-semantics.  Still, it can be used to prevent e.g. the GIC module clock
-from being turned off, until the GIC-400 driver has full support for
-Runtime PM.
-
-Hence migrate the Renesas CPG/MSSR driver from CLK_ENABLE_HAND_OFF to
-CLK_IS_CRITICAL.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Stephen Boyd <sboyd@codeaurora.org>
-(cherry picked from commit 72f5df2c2bbb66d4a555cb51eb9f412abf1af77f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/renesas-cpg-mssr.c |   11 ++---------
- 1 file changed, 2 insertions(+), 9 deletions(-)
-
---- a/drivers/clk/renesas/renesas-cpg-mssr.c
-+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
-@@ -347,17 +347,10 @@ static void __init cpg_mssr_register_mod
- 	init.flags = CLK_IS_BASIC | CLK_SET_RATE_PARENT;
- 	for (i = 0; i < info->num_crit_mod_clks; i++)
- 		if (id == info->crit_mod_clks[i]) {
--#ifdef CLK_ENABLE_HAND_OFF
--			dev_dbg(dev, "MSTP %s setting CLK_ENABLE_HAND_OFF\n",
-+			dev_dbg(dev, "MSTP %s setting CLK_IS_CRITICAL\n",
- 				mod->name);
--			init.flags |= CLK_ENABLE_HAND_OFF;
-+			init.flags |= CLK_IS_CRITICAL;
- 			break;
--#else
--			dev_dbg(dev, "Ignoring MSTP %s to prevent disabling\n",
--				mod->name);
--			kfree(clock);
--			return;
--#endif
- 		}
- 
- 	parent_name = __clk_get_name(parent);
diff --git a/patches.renesas/0014-ARM64-defconfig-enable-the-leds-pwm-driver-and-defau.patch b/patches.renesas/0014-ARM64-defconfig-enable-the-leds-pwm-driver-and-defau.patch
deleted file mode 100644
index 6b9d7702a0fe4d..00000000000000
--- a/patches.renesas/0014-ARM64-defconfig-enable-the-leds-pwm-driver-and-defau.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From ec260662b3d8c65793ac239f778dc8f3c2c01e34 Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Sun, 19 Feb 2017 23:23:25 +0100
-Subject: [PATCH 014/286] ARM64: defconfig: enable the leds-pwm driver and
- default-on trigger
-
-This enables the leds-pwm driver to support LEDs which are PWM-powered
-(and thus dimmable). Additionally we have to enable the "default-on"
-trigger - this was not required before because the gpio-leds driver has
-a separate "default-state" property which can be used to enable the LED
-by default.
-
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Signed-off-by: Kevin Hilman <khilman@baylibre.com>
-(cherry picked from commit 95fbe8b08b2d420e4f5a77701f165d6b23827862)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/configs/defconfig |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -372,8 +372,10 @@ CONFIG_MMC_SUNXI=y
- CONFIG_NEW_LEDS=y
- CONFIG_LEDS_CLASS=y
- CONFIG_LEDS_GPIO=y
-+CONFIG_LEDS_PWM=y
- CONFIG_LEDS_SYSCON=y
- CONFIG_LEDS_TRIGGERS=y
-+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
- CONFIG_LEDS_TRIGGER_HEARTBEAT=y
- CONFIG_LEDS_TRIGGER_CPU=y
- CONFIG_RTC_CLASS=y
diff --git a/patches.renesas/0014-Input-gpio_keys-annotate-PM-methods-as-__maybe_unuse.patch b/patches.renesas/0014-Input-gpio_keys-annotate-PM-methods-as-__maybe_unuse.patch
deleted file mode 100644
index a9cdc9719b63d4..00000000000000
--- a/patches.renesas/0014-Input-gpio_keys-annotate-PM-methods-as-__maybe_unuse.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From eb6f6a7ea791fcd1f306b8ec1113e6b97ee95056 Mon Sep 17 00:00:00 2001
-From: Dmitry Torokhov <dmitry.torokhov@gmail.com>
-Date: Wed, 19 Oct 2016 15:38:26 -0700
-Subject: [PATCH 014/299] Input: gpio_keys - annotate PM methods as
- __maybe_unused
-
-Instead of using #ifdef, let's mark suspend and resume methods as
-__maybe_unused to provide better compile coverage.
-
-Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
-(cherry picked from commit f9645f22584250336a99a23bc9e444396b5bc323)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/input/keyboard/gpio_keys.c |    6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
---- a/drivers/input/keyboard/gpio_keys.c
-+++ b/drivers/input/keyboard/gpio_keys.c
-@@ -829,8 +829,7 @@ static int gpio_keys_remove(struct platf
- 	return 0;
- }
- 
--#ifdef CONFIG_PM_SLEEP
--static int gpio_keys_suspend(struct device *dev)
-+static int __maybe_unused gpio_keys_suspend(struct device *dev)
- {
- 	struct gpio_keys_drvdata *ddata = dev_get_drvdata(dev);
- 	struct input_dev *input = ddata->input;
-@@ -852,7 +851,7 @@ static int gpio_keys_suspend(struct devi
- 	return 0;
- }
- 
--static int gpio_keys_resume(struct device *dev)
-+static int __maybe_unused gpio_keys_resume(struct device *dev)
- {
- 	struct gpio_keys_drvdata *ddata = dev_get_drvdata(dev);
- 	struct input_dev *input = ddata->input;
-@@ -878,7 +877,6 @@ static int gpio_keys_resume(struct devic
- 	gpio_keys_report_state(ddata);
- 	return 0;
- }
--#endif
- 
- static SIMPLE_DEV_PM_OPS(gpio_keys_pm_ops, gpio_keys_suspend, gpio_keys_resume);
- 
diff --git a/patches.renesas/0014-clk-renesas-mstp-Make-INTC-SYS-a-critical-clock.patch b/patches.renesas/0014-clk-renesas-mstp-Make-INTC-SYS-a-critical-clock.patch
deleted file mode 100644
index 91a2a4246d2e2e..00000000000000
--- a/patches.renesas/0014-clk-renesas-mstp-Make-INTC-SYS-a-critical-clock.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 9dde2addb9d9d5f356e3b37b0e0222e12c93cdad Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 17 Mar 2015 17:20:52 +0100
-Subject: [PATCH 014/255] clk: renesas: mstp: Make INTC-SYS a critical clock
-
-INTC-SYS is the module clock for the GIC.  Accessing the GIC while it is
-disabled causes:
-
-    Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
-
-Currently, the GIC-400 driver cannot enable its module clock for several
-reasons:
-  - It does not use a platform device, so Runtime PM is not an option,
-  - gic_of_init() runs before any clocks are registered, so it cannot
-    enable the clock explicitly,
-  - gic_of_init() cannot return -EPROBE_DEFER, as IRQCHIP_DECLARE()
-    doesn't support deferred probing.
-
-Hence we have to keep on relying on the boot loader for enabling the
-module clock.
-
-To prevent the module clock from being disabled when the CCF core thinks
-it is unused, and thus causing a system lock-up, add a check to the MSTP
-clock driver and enable CLK_IS_CRITICAL. This will make sure the module
-clock is never disabled.
-
-This is a hard dependency for describing the INTC-SYS clock in DT on
-R-Mobile APE6 and R-Car Gen2.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Stephen Boyd <sboyd@codeaurora.org>
-(cherry picked from commit e34084fb9a023d1dd008c989523af5a037f1d692)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/clk-mstp.c |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/drivers/clk/renesas/clk-mstp.c
-+++ b/drivers/clk/renesas/clk-mstp.c
-@@ -158,6 +158,11 @@ cpg_mstp_clock_register(const char *name
- 	init.name = name;
- 	init.ops = &cpg_mstp_clock_ops;
- 	init.flags = CLK_IS_BASIC | CLK_SET_RATE_PARENT;
-+	/* INTC-SYS is the module clock of the GIC, and must not be disabled */
-+	if (!strcmp(name, "intc-sys")) {
-+		pr_debug("MSTP %s setting CLK_IS_CRITICAL\n", name);
-+		init.flags |= CLK_IS_CRITICAL;
-+	}
- 	init.parent_names = &parent_name;
- 	init.num_parents = 1;
- 
diff --git a/patches.renesas/0015-ARM-dts-r7s72100-add-ostm-clock-to-device-tree.patch b/patches.renesas/0015-ARM-dts-r7s72100-add-ostm-clock-to-device-tree.patch
deleted file mode 100644
index c699d5324afdc0..00000000000000
--- a/patches.renesas/0015-ARM-dts-r7s72100-add-ostm-clock-to-device-tree.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 4f53e25aca63ba026bfdfeff70bdedadbd8a2d65 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Mon, 23 Jan 2017 08:55:18 -0500
-Subject: [PATCH 015/255] ARM: dts: r7s72100: add ostm clock to device tree
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cfddd3db08f619bf0c1764b3103caedb6793bc48)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100.dtsi            |    9 +++++++++
- include/dt-bindings/clock/r7s72100-clock.h |    4 ++++
- 2 files changed, 13 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100.dtsi
-+++ b/arch/arm/boot/dts/r7s72100.dtsi
-@@ -108,6 +108,15 @@
- 			clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
- 		};
- 
-+		mstp5_clks: mstp5_clks@fcfe0428 {
-+			#clock-cells = <1>;
-+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0xfcfe0428 4>;
-+			clocks = <&p0_clk>, <&p0_clk>;
-+			clock-indices = <R7S72100_CLK_OSTM0 R7S72100_CLK_OSTM1>;
-+			clock-output-names = "ostm0", "ostm1";
-+		};
-+
- 		mstp7_clks: mstp7_clks@fcfe0430 {
- 			#clock-cells = <1>;
- 			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
---- a/include/dt-bindings/clock/r7s72100-clock.h
-+++ b/include/dt-bindings/clock/r7s72100-clock.h
-@@ -25,6 +25,10 @@
- #define R7S72100_CLK_SCIF6	1
- #define R7S72100_CLK_SCIF7	0
- 
-+/* MSTP5 */
-+#define R7S72100_CLK_OSTM0	1
-+#define R7S72100_CLK_OSTM1	0
-+
- /* MSTP7 */
- #define R7S72100_CLK_ETHER	4
- 
diff --git a/patches.renesas/0015-Input-gpio_keys-fix-leaking-DT-node-references.patch b/patches.renesas/0015-Input-gpio_keys-fix-leaking-DT-node-references.patch
deleted file mode 100644
index 6132a37869faeb..00000000000000
--- a/patches.renesas/0015-Input-gpio_keys-fix-leaking-DT-node-references.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 61d987b2399860c3fb69915397f9ef1ffe779a58 Mon Sep 17 00:00:00 2001
-From: Dmitry Torokhov <dmitry.torokhov@gmail.com>
-Date: Thu, 20 Oct 2016 15:11:45 -0700
-Subject: [PATCH 015/299] Input: gpio_keys - fix leaking DT node references
-
-for_each_available_child_of_node(node, pp) takes reference to 'pp' and
-drops it when attempting next iteration. However if we exit the loop early
-we need to drop the reference ourselves.
-
-Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
-(cherry picked from commit 0860913b02c28f0a1d8b515b99ae6419ef10569f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/input/keyboard/gpio_keys.c |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/drivers/input/keyboard/gpio_keys.c
-+++ b/drivers/input/keyboard/gpio_keys.c
-@@ -674,6 +674,7 @@ gpio_keys_get_devtree_pdata(struct devic
- 					dev_err(dev,
- 						"Failed to get gpio flags, error: %d\n",
- 						error);
-+				of_node_put(pp);
- 				return ERR_PTR(error);
- 			}
- 		} else {
-@@ -684,12 +685,14 @@ gpio_keys_get_devtree_pdata(struct devic
- 
- 		if (!gpio_is_valid(button->gpio) && !button->irq) {
- 			dev_err(dev, "Found button without gpios or irqs\n");
-+			of_node_put(pp);
- 			return ERR_PTR(-EINVAL);
- 		}
- 
- 		if (of_property_read_u32(pp, "linux,code", &button->code)) {
- 			dev_err(dev, "Button without keycode: 0x%x\n",
- 				button->gpio);
-+			of_node_put(pp);
- 			return ERR_PTR(-EINVAL);
- 		}
- 
diff --git a/patches.renesas/0015-arm64-dts-r8a7796-dtsi-Add-all-HSCIF-nodes.patch b/patches.renesas/0015-arm64-dts-r8a7796-dtsi-Add-all-HSCIF-nodes.patch
deleted file mode 100644
index c4d976679f4ed3..00000000000000
--- a/patches.renesas/0015-arm64-dts-r8a7796-dtsi-Add-all-HSCIF-nodes.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From ad5326e9d9fb1e5818c5b4f9da3d8306d6b2b21b Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Wed, 7 Dec 2016 17:44:47 +0100
-Subject: [PATCH 015/286] arm64: dts: r8a7796 dtsi: Add all HSCIF nodes
-
-Add the device nodes for all HSCIF serial ports, incl. clocks, and
-power domain.
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-[simon: express register size in hex; refer to power domain in changelog]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 68cd161072605c276d4e6c8cd06fbe7b00a0f680)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   70 +++++++++++++++++++++++++++++++
- 1 file changed, 70 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -488,6 +488,76 @@
- 			status = "disabled";
- 		};
- 
-+		hscif0: serial@e6540000 {
-+			compatible = "renesas,hscif-r8a7796",
-+				     "renesas,rcar-gen3-hscif",
-+				     "renesas,hscif";
-+			reg = <0 0xe6540000 0 0x60>;
-+			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 520>,
-+				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
-+				 <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		hscif1: serial@e6550000 {
-+			compatible = "renesas,hscif-r8a7796",
-+				     "renesas,rcar-gen3-hscif",
-+				     "renesas,hscif";
-+			reg = <0 0xe6550000 0 0x60>;
-+			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 519>,
-+				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
-+				 <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		hscif2: serial@e6560000 {
-+			compatible = "renesas,hscif-r8a7796",
-+				     "renesas,rcar-gen3-hscif",
-+				     "renesas,hscif";
-+			reg = <0 0xe6560000 0 0x60>;
-+			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 518>,
-+				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
-+				 <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		hscif3: serial@e66a0000 {
-+			compatible = "renesas,hscif-r8a7796",
-+				     "renesas,rcar-gen3-hscif",
-+				     "renesas,hscif";
-+			reg = <0 0xe66a0000 0 0x60>;
-+			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 517>,
-+				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
-+				 <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		hscif4: serial@e66b0000 {
-+			compatible = "renesas,hscif-r8a7796",
-+				     "renesas,rcar-gen3-hscif",
-+				     "renesas,hscif";
-+			reg = <0 0xe66b0000 0 0x60>;
-+			interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 516>,
-+				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
-+				 <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
- 		scif2: serial@e6e88000 {
- 			compatible = "renesas,scif-r8a7796",
- 				     "renesas,rcar-gen3-scif", "renesas,scif";
diff --git a/patches.renesas/0016-Input-gpio_keys-switch-to-using-generic-device-prope.patch b/patches.renesas/0016-Input-gpio_keys-switch-to-using-generic-device-prope.patch
deleted file mode 100644
index 4c1bd169ad0972..00000000000000
--- a/patches.renesas/0016-Input-gpio_keys-switch-to-using-generic-device-prope.patch
+++ /dev/null
@@ -1,272 +0,0 @@
-From 7cd14b1171f859b60c5be3a241e580ba721f49db Mon Sep 17 00:00:00 2001
-From: Dmitry Torokhov <dmitry.torokhov@gmail.com>
-Date: Wed, 19 Oct 2016 19:34:48 -0700
-Subject: [PATCH 016/299] Input: gpio_keys - switch to using generic device
- properties
-
-Make use of the device property API in this driver so that both OF based
-systems and ACPI based systems can use this driver.
-
-Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Suggested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
-(cherry picked from commit 700a38b27eefc582099fdf69effacfad0ad738a4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/input/keyboard/gpio_keys.c |  143 ++++++++++++++++++-------------------
- 1 file changed, 70 insertions(+), 73 deletions(-)
-
---- a/drivers/input/keyboard/gpio_keys.c
-+++ b/drivers/input/keyboard/gpio_keys.c
-@@ -28,8 +28,6 @@
- #include <linux/gpio.h>
- #include <linux/gpio/consumer.h>
- #include <linux/of.h>
--#include <linux/of_platform.h>
--#include <linux/of_gpio.h>
- #include <linux/of_irq.h>
- #include <linux/spinlock.h>
- 
-@@ -468,7 +466,8 @@ static void gpio_keys_quiesce_key(void *
- static int gpio_keys_setup_key(struct platform_device *pdev,
- 				struct input_dev *input,
- 				struct gpio_button_data *bdata,
--				const struct gpio_keys_button *button)
-+				const struct gpio_keys_button *button,
-+				struct fwnode_handle *child)
- {
- 	const char *desc = button->desc ? button->desc : "gpio_keys";
- 	struct device *dev = &pdev->dev;
-@@ -481,11 +480,28 @@ static int gpio_keys_setup_key(struct pl
- 	bdata->button = button;
- 	spin_lock_init(&bdata->lock);
- 
--	/*
--	 * Legacy GPIO number, so request the GPIO here and
--	 * convert it to descriptor.
--	 */
--	if (gpio_is_valid(button->gpio)) {
-+	if (child) {
-+		bdata->gpiod = devm_get_gpiod_from_child(dev, NULL, child);
-+		if (IS_ERR(bdata->gpiod)) {
-+			error = PTR_ERR(bdata->gpiod);
-+			if (error == -ENOENT) {
-+				/*
-+				 * GPIO is optional, we may be dealing with
-+				 * purely interrupt-driven setup.
-+				 */
-+				bdata->gpiod = NULL;
-+			} else {
-+				if (error != -EPROBE_DEFER)
-+					dev_err(dev, "failed to get gpio: %d\n",
-+						error);
-+				return error;
-+			}
-+		}
-+	} else if (gpio_is_valid(button->gpio)) {
-+		/*
-+		 * Legacy GPIO number, so request the GPIO here and
-+		 * convert it to descriptor.
-+		 */
- 		unsigned flags = GPIOF_IN;
- 
- 		if (button->active_low)
-@@ -502,7 +518,9 @@ static int gpio_keys_setup_key(struct pl
- 		bdata->gpiod = gpio_to_desc(button->gpio);
- 		if (!bdata->gpiod)
- 			return -EINVAL;
-+	}
- 
-+	if (bdata->gpiod) {
- 		if (button->debounce_interval) {
- 			error = gpiod_set_debounce(bdata->gpiod,
- 					button->debounce_interval * 1000);
-@@ -533,9 +551,10 @@ static int gpio_keys_setup_key(struct pl
- 
- 	} else {
- 		if (!button->irq) {
--			dev_err(dev, "No IRQ specified\n");
-+			dev_err(dev, "Found button without gpio or irq\n");
- 			return -EINVAL;
- 		}
-+
- 		bdata->irq = button->irq;
- 
- 		if (button->type && button->type != EV_KEY) {
-@@ -627,24 +646,18 @@ static void gpio_keys_close(struct input
-  * Handlers for alternative sources of platform_data
-  */
- 
--#ifdef CONFIG_OF
- /*
-- * Translate OpenFirmware node properties into platform_data
-+ * Translate properties into platform_data
-  */
- static struct gpio_keys_platform_data *
- gpio_keys_get_devtree_pdata(struct device *dev)
- {
--	struct device_node *node, *pp;
- 	struct gpio_keys_platform_data *pdata;
- 	struct gpio_keys_button *button;
--	int error;
-+	struct fwnode_handle *child;
- 	int nbuttons;
- 
--	node = dev->of_node;
--	if (!node)
--		return ERR_PTR(-ENODEV);
--
--	nbuttons = of_get_available_child_count(node);
-+	nbuttons = device_get_child_node_count(dev);
- 	if (nbuttons == 0)
- 		return ERR_PTR(-ENODEV);
- 
-@@ -659,64 +672,43 @@ gpio_keys_get_devtree_pdata(struct devic
- 	pdata->buttons = button;
- 	pdata->nbuttons = nbuttons;
- 
--	pdata->rep = !!of_get_property(node, "autorepeat", NULL);
--
--	of_property_read_string(node, "label", &pdata->name);
--
--	for_each_available_child_of_node(node, pp) {
--		enum of_gpio_flags flags;
--
--		button->gpio = of_get_gpio_flags(pp, 0, &flags);
--		if (button->gpio < 0) {
--			error = button->gpio;
--			if (error != -ENOENT) {
--				if (error != -EPROBE_DEFER)
--					dev_err(dev,
--						"Failed to get gpio flags, error: %d\n",
--						error);
--				of_node_put(pp);
--				return ERR_PTR(error);
--			}
--		} else {
--			button->active_low = flags & OF_GPIO_ACTIVE_LOW;
--		}
--
--		button->irq = irq_of_parse_and_map(pp, 0);
-+	pdata->rep = device_property_read_bool(dev, "autorepeat");
- 
--		if (!gpio_is_valid(button->gpio) && !button->irq) {
--			dev_err(dev, "Found button without gpios or irqs\n");
--			of_node_put(pp);
--			return ERR_PTR(-EINVAL);
--		}
-+	device_property_read_string(dev, "label", &pdata->name);
- 
--		if (of_property_read_u32(pp, "linux,code", &button->code)) {
--			dev_err(dev, "Button without keycode: 0x%x\n",
--				button->gpio);
--			of_node_put(pp);
-+	device_for_each_child_node(dev, child) {
-+		if (is_of_node(child))
-+			button->irq =
-+				irq_of_parse_and_map(to_of_node(child), 0);
-+
-+		if (fwnode_property_read_u32(child, "linux,code",
-+					     &button->code)) {
-+			dev_err(dev, "Button without keycode\n");
-+			fwnode_handle_put(child);
- 			return ERR_PTR(-EINVAL);
- 		}
- 
--		button->desc = of_get_property(pp, "label", NULL);
-+		fwnode_property_read_string(child, "label", &button->desc);
- 
--		if (of_property_read_u32(pp, "linux,input-type", &button->type))
-+		if (fwnode_property_read_u32(child, "linux,input-type",
-+					     &button->type))
- 			button->type = EV_KEY;
- 
--		button->wakeup = of_property_read_bool(pp, "wakeup-source") ||
--				 /* legacy name */
--				 of_property_read_bool(pp, "gpio-key,wakeup");
-+		button->wakeup =
-+			fwnode_property_read_bool(child, "wakeup-source") ||
-+			/* legacy name */
-+			fwnode_property_read_bool(child, "gpio-key,wakeup");
- 
--		button->can_disable = !!of_get_property(pp, "linux,can-disable", NULL);
-+		button->can_disable =
-+			fwnode_property_read_bool(child, "linux,can-disable");
- 
--		if (of_property_read_u32(pp, "debounce-interval",
-+		if (fwnode_property_read_u32(child, "debounce-interval",
- 					 &button->debounce_interval))
- 			button->debounce_interval = 5;
- 
- 		button++;
- 	}
- 
--	if (pdata->nbuttons == 0)
--		return ERR_PTR(-EINVAL);
--
- 	return pdata;
- }
- 
-@@ -726,20 +718,11 @@ static const struct of_device_id gpio_ke
- };
- MODULE_DEVICE_TABLE(of, gpio_keys_of_match);
- 
--#else
--
--static inline struct gpio_keys_platform_data *
--gpio_keys_get_devtree_pdata(struct device *dev)
--{
--	return ERR_PTR(-ENODEV);
--}
--
--#endif
--
- static int gpio_keys_probe(struct platform_device *pdev)
- {
- 	struct device *dev = &pdev->dev;
- 	const struct gpio_keys_platform_data *pdata = dev_get_platdata(dev);
-+	struct fwnode_handle *child = NULL;
- 	struct gpio_keys_drvdata *ddata;
- 	struct input_dev *input;
- 	size_t size;
-@@ -792,14 +775,28 @@ static int gpio_keys_probe(struct platfo
- 		const struct gpio_keys_button *button = &pdata->buttons[i];
- 		struct gpio_button_data *bdata = &ddata->data[i];
- 
--		error = gpio_keys_setup_key(pdev, input, bdata, button);
--		if (error)
-+		if (!dev_get_platdata(dev)) {
-+			child = device_get_next_child_node(&pdev->dev, child);
-+			if (!child) {
-+				dev_err(&pdev->dev,
-+					"missing child device node for entry %d\n",
-+					i);
-+				return -EINVAL;
-+			}
-+		}
-+
-+		error = gpio_keys_setup_key(pdev, input, bdata, button, child);
-+		if (error) {
-+			fwnode_handle_put(child);
- 			return error;
-+		}
- 
- 		if (button->wakeup)
- 			wakeup = 1;
- 	}
- 
-+	fwnode_handle_put(child);
-+
- 	error = sysfs_create_group(&pdev->dev.kobj, &gpio_keys_attr_group);
- 	if (error) {
- 		dev_err(dev, "Unable to export keys/switches, error: %d\n",
-@@ -889,7 +886,7 @@ static struct platform_driver gpio_keys_
- 	.driver		= {
- 		.name	= "gpio-keys",
- 		.pm	= &gpio_keys_pm_ops,
--		.of_match_table = of_match_ptr(gpio_keys_of_match),
-+		.of_match_table = gpio_keys_of_match,
- 	}
- };
- 
diff --git a/patches.renesas/0016-arm64-dts-r8a7796-Add-all-SCIF-nodes.patch b/patches.renesas/0016-arm64-dts-r8a7796-Add-all-SCIF-nodes.patch
deleted file mode 100644
index c1357008f2f42d..00000000000000
--- a/patches.renesas/0016-arm64-dts-r8a7796-Add-all-SCIF-nodes.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From 8949f820fadbd95083aa0f900272814c1579f4da Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Wed, 7 Dec 2016 17:44:26 +0100
-Subject: [PATCH 016/286] arm64: dts: r8a7796: Add all SCIF nodes
-
-Add the device nodes for all R-Car H3 SCIF serial ports, incl. clocks
-and power domain.
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 19d76f3ec8fc6ff38f1c5ca534d75a957c8661ea)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   65 +++++++++++++++++++++++++++++++
- 1 file changed, 65 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -558,6 +558,32 @@
- 			status = "disabled";
- 		};
- 
-+		scif0: serial@e6e60000 {
-+			compatible = "renesas,scif-r8a7796",
-+				     "renesas,rcar-gen3-scif", "renesas,scif";
-+			reg = <0 0xe6e60000 0 64>;
-+			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 207>,
-+				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
-+				 <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif1: serial@e6e68000 {
-+			compatible = "renesas,scif-r8a7796",
-+				     "renesas,rcar-gen3-scif", "renesas,scif";
-+			reg = <0 0xe6e68000 0 64>;
-+			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 206>,
-+				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
-+				 <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
- 		scif2: serial@e6e88000 {
- 			compatible = "renesas,scif-r8a7796",
- 				     "renesas,rcar-gen3-scif", "renesas,scif";
-@@ -567,6 +593,45 @@
- 				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- 				 <&scif_clk>;
- 			clock-names = "fck", "brg_int", "scif_clk";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif3: serial@e6c50000 {
-+			compatible = "renesas,scif-r8a7796",
-+				     "renesas,rcar-gen3-scif", "renesas,scif";
-+			reg = <0 0xe6c50000 0 64>;
-+			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 204>,
-+				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
-+				 <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif4: serial@e6c40000 {
-+			compatible = "renesas,scif-r8a7796",
-+				     "renesas,rcar-gen3-scif", "renesas,scif";
-+			reg = <0 0xe6c40000 0 64>;
-+			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 203>,
-+				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
-+				 <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif5: serial@e6f30000 {
-+			compatible = "renesas,scif-r8a7796",
-+				     "renesas,rcar-gen3-scif", "renesas,scif";
-+			reg = <0 0xe6f30000 0 64>;
-+			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 202>,
-+				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
-+				 <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
diff --git a/patches.renesas/0016-clk-renesas-mstp-Reformat-cpg_mstp_clock_register-fo.patch b/patches.renesas/0016-clk-renesas-mstp-Reformat-cpg_mstp_clock_register-fo.patch
deleted file mode 100644
index a98a3f13421751..00000000000000
--- a/patches.renesas/0016-clk-renesas-mstp-Reformat-cpg_mstp_clock_register-fo.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From be0bdb4df687cae3729d2aa5b64de0d044877654 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 23 Jan 2017 10:48:21 +0100
-Subject: [PATCH 016/255] clk: renesas: mstp: Reformat
- cpg_mstp_clock_register() for git diff
-
-As the function header of cpg_mstp_clock_register() is split in an
-unusual way, "git diff" gets confused when changes to the body of
-the function are made, and attributes them to the wrong function.
-
-Reformat the function header to fix this.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Stephen Boyd <sboyd@codeaurora.org>
-(cherry picked from commit 1ce87dd2f0bb8dee1378ec3bff94c4454feaaa30)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/clk-mstp.c |    6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/clk/renesas/clk-mstp.c
-+++ b/drivers/clk/renesas/clk-mstp.c
-@@ -141,9 +141,9 @@ static const struct clk_ops cpg_mstp_clo
- 	.is_enabled = cpg_mstp_clock_is_enabled,
- };
- 
--static struct clk * __init
--cpg_mstp_clock_register(const char *name, const char *parent_name,
--			unsigned int index, struct mstp_clock_group *group)
-+static struct clk * __init cpg_mstp_clock_register(const char *name,
-+	const char *parent_name, unsigned int index,
-+	struct mstp_clock_group *group)
- {
- 	struct clk_init_data init;
- 	struct mstp_clock *clock;
diff --git a/patches.renesas/0017-Input-gpio_keys-set-input-direction-explicitly.patch b/patches.renesas/0017-Input-gpio_keys-set-input-direction-explicitly.patch
deleted file mode 100644
index a7725ed1b6d384..00000000000000
--- a/patches.renesas/0017-Input-gpio_keys-set-input-direction-explicitly.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 2f37e454f0f68b5529a171546e8234bb2c0bf2e3 Mon Sep 17 00:00:00 2001
-From: Sudeep Holla <sudeep.holla@arm.com>
-Date: Wed, 16 Nov 2016 17:01:26 -0800
-Subject: [PATCH 017/299] Input: gpio_keys - set input direction explicitly
-
-Commit 700a38b27eef ("Input: gpio_keys - switch to using generic device
-properties") switched to use generic device properties for GPIO keys and
-commit 5feeca3c1e39 ("Input: gpio_keys - add support for GPIO descriptors")
-switched from legacy GPIO numbers to GPIO descriptors.
-
-Previously devm_gpio_request_one was explicitly passed GPIOF_DIR_IN flag
-to set the GPIO direction as input. However devm_get_gpiod_from_child
-doesn't have such provisions and hence fwnode_get_named_gpiod can't set
-it as input.
-
-This breaks few platforms with the following error:
-" gpiochip_lock_as_irq: tried to flag a GPIO set as output for IRQ
-  unable to lock HW IRQ <n> for IRQ
-  genirq: Failed to request resources for POWER (irq <x>) on irqchip
-  gpio_keys: Unable to claim irq <x>; error -22
-  gpio-keys: probe failed with error -22 "
-
-This patch fixes the issue by setting input direction explicitly for
-gpio lines described by generic properties.
-
-Fixes: 700a38b27eef ("Input: gpio_keys - switch to using generic device properties")
-Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
-Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
-(cherry picked from commit dadbb0aa363bf1233f75cab23977add69d197e23)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/input/keyboard/gpio_keys.c        |    7 +++++++
- drivers/input/keyboard/gpio_keys_polled.c |    8 ++++++++
- 2 files changed, 15 insertions(+)
-
---- a/drivers/input/keyboard/gpio_keys.c
-+++ b/drivers/input/keyboard/gpio_keys.c
-@@ -496,6 +496,13 @@ static int gpio_keys_setup_key(struct pl
- 						error);
- 				return error;
- 			}
-+		} else {
-+			error = gpiod_direction_input(bdata->gpiod);
-+			if (error) {
-+				dev_err(dev, "Failed to configure GPIO %d as input: %d\n",
-+					desc_to_gpio(bdata->gpiod), error);
-+				return error;
-+			}
- 		}
- 	} else if (gpio_is_valid(button->gpio)) {
- 		/*
---- a/drivers/input/keyboard/gpio_keys_polled.c
-+++ b/drivers/input/keyboard/gpio_keys_polled.c
-@@ -314,6 +314,14 @@ static int gpio_keys_polled_probe(struct
- 				fwnode_handle_put(child);
- 				return error;
- 			}
-+
-+			error = gpiod_direction_input(bdata->gpiod);
-+			if (error) {
-+				dev_err(dev, "Failed to configure GPIO %d as input: %d\n",
-+					desc_to_gpio(bdata->gpiod), error);
-+				fwnode_handle_put(child);
-+				return error;
-+			}
- 		} else if (gpio_is_valid(button->gpio)) {
- 			/*
- 			 * Legacy GPIO number so request the GPIO here and
diff --git a/patches.renesas/0017-arm64-dts-r8a7796-Enable-SCIF-DMA.patch b/patches.renesas/0017-arm64-dts-r8a7796-Enable-SCIF-DMA.patch
deleted file mode 100644
index 1ba902769cbca9..00000000000000
--- a/patches.renesas/0017-arm64-dts-r8a7796-Enable-SCIF-DMA.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From e4f535b3c4be699cdb91b9c4c3ffc39668b821c9 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Wed, 7 Dec 2016 17:44:27 +0100
-Subject: [PATCH 017/286] arm64: dts: r8a7796: Enable SCIF DMA
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit dbcae5ea4bd27409291e3329c9106f37f0118590)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -567,6 +567,9 @@
- 				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- 				 <&scif_clk>;
- 			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac1 0x51>, <&dmac1 0x50>,
-+			       <&dmac2 0x51>, <&dmac2 0x50>;
-+			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
-@@ -580,6 +583,9 @@
- 				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- 				 <&scif_clk>;
- 			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac1 0x53>, <&dmac1 0x52>,
-+			       <&dmac2 0x53>, <&dmac2 0x52>;
-+			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
-@@ -606,6 +612,8 @@
- 				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- 				 <&scif_clk>;
- 			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x57>, <&dmac0 0x56>;
-+			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
-@@ -619,6 +627,8 @@
- 				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- 				 <&scif_clk>;
- 			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x59>, <&dmac0 0x58>;
-+			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
-@@ -632,6 +642,9 @@
- 				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- 				 <&scif_clk>;
- 			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
-+			       <&dmac2 0x5b>, <&dmac2 0x5a>;
-+			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
diff --git a/patches.renesas/0017-dt-bindings-clock-renesas-cpg-mssr-Document-reset-co.patch b/patches.renesas/0017-dt-bindings-clock-renesas-cpg-mssr-Document-reset-co.patch
deleted file mode 100644
index e194349d0ecd26..00000000000000
--- a/patches.renesas/0017-dt-bindings-clock-renesas-cpg-mssr-Document-reset-co.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 1b3bf792cac3ad001c2fe839a6088ddc69c97207 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 12 Oct 2015 11:35:34 +0200
-Subject: [PATCH 017/255] dt-bindings: clock: renesas: cpg-mssr: Document reset
- control support
-
-Document properties needed to use the Reset Control feature of the
-Renesas Clock Pulse Generator / Module Standby and Software Reset
-module.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 98aabfff7df441597c27a57584f8a1d5cfd506b7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt |    6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
-+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
-@@ -42,6 +42,10 @@ Required Properties:
- 	Domain bindings in
- 	Documentation/devicetree/bindings/power/power_domain.txt.
- 
-+  - #reset-cells: Must be 1
-+      - The single reset specifier cell must be the module number, as defined
-+	in the datasheet.
-+
- 
- Examples
- --------
-@@ -55,6 +59,7 @@ Examples
- 		clock-names = "extal", "extalr";
- 		#clock-cells = <2>;
- 		#power-domain-cells = <0>;
-+		#reset-cells = <1>;
- 	};
- 
- 
-@@ -69,5 +74,6 @@ Examples
- 		dmas = <&dmac1 0x13>, <&dmac1 0x12>;
- 		dma-names = "tx", "rx";
- 		power-domains = <&cpg>;
-+		resets = <&cpg 310>;
- 		status = "disabled";
- 	};
diff --git a/patches.renesas/0018-arm64-dts-r8a7796-salvator-x-add-SCIF1-DEBUG1.patch b/patches.renesas/0018-arm64-dts-r8a7796-salvator-x-add-SCIF1-DEBUG1.patch
deleted file mode 100644
index e953f53a13cfcc..00000000000000
--- a/patches.renesas/0018-arm64-dts-r8a7796-salvator-x-add-SCIF1-DEBUG1.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 1c78d614357aa51833a3fd179eaab71aba45a3cd Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Fri, 3 Feb 2017 11:38:20 +0100
-Subject: [PATCH 018/286] arm64: dts: r8a7796: salvator-x: add SCIF1 (DEBUG1)
-
-Enables the SCIF hooked up to the DEBUG1 connector.
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d5566d251f5e839e36db8db8105d8f8f57e54768)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts |   14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-@@ -18,6 +18,7 @@
- 
- 	aliases {
- 		serial0 = &scif2;
-+		serial1 = &scif1;
- 		ethernet0 = &avb;
- 	};
- 
-@@ -113,6 +114,11 @@
- 		function = "avb";
- 	};
- 
-+	scif1_pins: scif1 {
-+		groups = "scif1_data_a", "scif1_ctrl";
-+		function = "scif1";
-+	};
-+
- 	scif2_pins: scif2 {
- 		groups = "scif2_data_a";
- 		function = "scif2";
-@@ -228,6 +234,14 @@
- 	status = "okay";
- };
- 
-+&scif1 {
-+	pinctrl-0 = <&scif1_pins>;
-+	pinctrl-names = "default";
-+
-+	uart-has-rtscts;
-+	status = "okay";
-+};
-+
- &scif2 {
- 	pinctrl-0 = <&scif2_pins>;
- 	pinctrl-names = "default";
diff --git a/patches.renesas/0018-clk-renesas-cpg-mssr-Document-suitability-for-RZ-G1.patch b/patches.renesas/0018-clk-renesas-cpg-mssr-Document-suitability-for-RZ-G1.patch
deleted file mode 100644
index 5e77b8c7a8f4ff..00000000000000
--- a/patches.renesas/0018-clk-renesas-cpg-mssr-Document-suitability-for-RZ-G1.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 76dd5074ed5143524cea1cda3be9b4e441d1fd31 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 20 Jan 2017 10:53:11 +0100
-Subject: [PATCH 018/255] clk: renesas: cpg-mssr: Document suitability for
- RZ/G1
-
-The Renesas CPG/MSSR driver is already in active use for RZ/G1 since
-commits c0b2d75d2a4bf6a3 ("clk: renesas: cpg-mssr: Add R8A7743 support")
-and 9127d54bb8947159 ("clk: renesas: cpg-mssr: Add R8A7745 support").
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Stephen Boyd <sboyd@codeaurora.org>
-(cherry picked from commit 67c995b55e1ade919a0037723ecc9210c79007f8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/renesas-cpg-mssr.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/clk/renesas/renesas-cpg-mssr.c
-+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
-@@ -43,7 +43,7 @@
-  * Module Standby and Software Reset register offets.
-  *
-  * If the registers exist, these are valid for SH-Mobile, R-Mobile,
-- * R-Car Gen 2, and R-Car Gen 3.
-+ * R-Car Gen2, R-Car Gen3, and RZ/G1.
-  * These are NOT valid for R-Car Gen1 and RZ/A1!
-  */
- 
diff --git a/patches.renesas/0018-regulator-gpio-properly-check-return-value-of-of_get.patch b/patches.renesas/0018-regulator-gpio-properly-check-return-value-of-of_get.patch
deleted file mode 100644
index 8f638e1408dc0d..00000000000000
--- a/patches.renesas/0018-regulator-gpio-properly-check-return-value-of-of_get.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 2210ef9034fe636cb4bec1d185ed5c903bb3b9a2 Mon Sep 17 00:00:00 2001
-From: Jisheng Zhang <jszhang@marvell.com>
-Date: Thu, 10 Nov 2016 17:21:29 +0800
-Subject: [PATCH 018/299] regulator: gpio: properly check return value of
- of_get_named_gpio
-
-The function of_get_named_gpio() could return -ENOENT, -EPROBE_DEFER
--EINVAL and so on. Currently, for the optional property "enable-gpio",
-we only check -EPROBE_DEFER, this is not enough since there may be
-misconfigured "enable-gpio" in the DTB, of_get_named_gpio() will return
--EINVAL in this case, we should return immediately here. And for the
-optional property "gpios", we didn't check the return value, the driver
-will continue to the point where gpio_request_array() is called, it
-doesn't make sense to continue if we got -EPROBE_DEFER or -EINVAL here.
-
-This patch tries to address these two issues by properly checking the
-return value of of_get_named_gpio.
-
-Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 09f2ba0b0b7c44ecea49cf69a708203b76ba5535)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/regulator/gpio-regulator.c |    9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
-
---- a/drivers/regulator/gpio-regulator.c
-+++ b/drivers/regulator/gpio-regulator.c
-@@ -162,8 +162,8 @@ of_get_gpio_regulator_config(struct devi
- 	of_property_read_u32(np, "startup-delay-us", &config->startup_delay);
- 
- 	config->enable_gpio = of_get_named_gpio(np, "enable-gpio", 0);
--	if (config->enable_gpio == -EPROBE_DEFER)
--		return ERR_PTR(-EPROBE_DEFER);
-+	if (config->enable_gpio < 0 && config->enable_gpio != -ENOENT)
-+		return ERR_PTR(config->enable_gpio);
- 
- 	/* Fetch GPIOs. - optional property*/
- 	ret = of_gpio_count(np);
-@@ -190,8 +190,11 @@ of_get_gpio_regulator_config(struct devi
- 
- 		for (i = 0; i < config->nr_gpios; i++) {
- 			gpio = of_get_named_gpio(np, "gpios", i);
--			if (gpio < 0)
-+			if (gpio < 0) {
-+				if (gpio != -ENOENT)
-+					return ERR_PTR(gpio);
- 				break;
-+			}
- 			config->gpios[i].gpio = gpio;
- 			if (proplen > 0) {
- 				of_property_read_u32_index(np, "gpios-states",
diff --git a/patches.renesas/0019-arm64-dts-r8a7796-Enable-HSCIF-DMA.patch b/patches.renesas/0019-arm64-dts-r8a7796-Enable-HSCIF-DMA.patch
deleted file mode 100644
index 05560b0513c586..00000000000000
--- a/patches.renesas/0019-arm64-dts-r8a7796-Enable-HSCIF-DMA.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 960c270de35d28eabaa41b1b70233573e87f5357 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Wed, 7 Dec 2016 17:44:48 +0100
-Subject: [PATCH 019/286] arm64: dts: r8a7796: Enable HSCIF DMA
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6d50bb8935042c4b7747b57df064ff41295e4769)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -498,6 +498,9 @@
- 				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- 				 <&scif_clk>;
- 			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac1 0x31>, <&dmac1 0x30>,
-+			       <&dmac2 0x31>, <&dmac2 0x30>;
-+			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
-@@ -512,6 +515,9 @@
- 				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- 				 <&scif_clk>;
- 			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac1 0x33>, <&dmac1 0x32>,
-+			       <&dmac2 0x33>, <&dmac2 0x32>;
-+			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
-@@ -526,6 +532,9 @@
- 				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- 				 <&scif_clk>;
- 			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac1 0x35>, <&dmac1 0x34>,
-+			       <&dmac2 0x35>, <&dmac2 0x34>;
-+			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
-@@ -540,6 +549,8 @@
- 				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- 				 <&scif_clk>;
- 			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x37>, <&dmac0 0x36>;
-+			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
-@@ -554,6 +565,8 @@
- 				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- 				 <&scif_clk>;
- 			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x39>, <&dmac0 0x38>;
-+			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
diff --git a/patches.renesas/0019-clk-renesas-cpg-mssr-Rename-cpg_mssr_priv.mstp_lock.patch b/patches.renesas/0019-clk-renesas-cpg-mssr-Rename-cpg_mssr_priv.mstp_lock.patch
deleted file mode 100644
index c6949a765c0cd2..00000000000000
--- a/patches.renesas/0019-clk-renesas-cpg-mssr-Rename-cpg_mssr_priv.mstp_lock.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From df8d4a6120036c61f31ad5f523ce0236595c32c4 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 20 Jan 2017 10:58:11 +0100
-Subject: [PATCH 019/255] clk: renesas: cpg-mssr: Rename
- cpg_mssr_priv.mstp_lock
-
-The spinlock is used to protect Read-Modify-Write register accesses,
-which won't be limited to SMSTPCR register accesses.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Stephen Boyd <sboyd@codeaurora.org>
-(cherry picked from commit a4ea6a0f83073f256547a49fa6433806cee2cc87)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/renesas-cpg-mssr.c |   10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
---- a/drivers/clk/renesas/renesas-cpg-mssr.c
-+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
-@@ -98,7 +98,7 @@ static const u16 srcr[] = {
-  *
-  * @dev: CPG/MSSR device
-  * @base: CPG/MSSR register block base address
-- * @mstp_lock: protects writes to SMSTPCR
-+ * @rmw_lock: protects RMW register accesses
-  * @clks: Array containing all Core and Module Clocks
-  * @num_core_clks: Number of Core Clocks in clks[]
-  * @num_mod_clks: Number of Module Clocks in clks[]
-@@ -107,7 +107,7 @@ static const u16 srcr[] = {
- struct cpg_mssr_priv {
- 	struct device *dev;
- 	void __iomem *base;
--	spinlock_t mstp_lock;
-+	spinlock_t rmw_lock;
- 
- 	struct clk **clks;
- 	unsigned int num_core_clks;
-@@ -144,7 +144,7 @@ static int cpg_mstp_clock_endisable(stru
- 
- 	dev_dbg(dev, "MSTP %u%02u/%pC %s\n", reg, bit, hw->clk,
- 		enable ? "ON" : "OFF");
--	spin_lock_irqsave(&priv->mstp_lock, flags);
-+	spin_lock_irqsave(&priv->rmw_lock, flags);
- 
- 	value = readl(priv->base + SMSTPCR(reg));
- 	if (enable)
-@@ -153,7 +153,7 @@ static int cpg_mstp_clock_endisable(stru
- 		value |= bitmask;
- 	writel(value, priv->base + SMSTPCR(reg));
- 
--	spin_unlock_irqrestore(&priv->mstp_lock, flags);
-+	spin_unlock_irqrestore(&priv->rmw_lock, flags);
- 
- 	if (!enable)
- 		return 0;
-@@ -551,7 +551,7 @@ static int __init cpg_mssr_probe(struct
- 		return -ENOMEM;
- 
- 	priv->dev = dev;
--	spin_lock_init(&priv->mstp_lock);
-+	spin_lock_init(&priv->rmw_lock);
- 
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	priv->base = devm_ioremap_resource(dev, res);
diff --git a/patches.renesas/0019-i2c-rcar-Add-per-Generation-fallback-bindings.patch b/patches.renesas/0019-i2c-rcar-Add-per-Generation-fallback-bindings.patch
deleted file mode 100644
index d9387e542ebd00..00000000000000
--- a/patches.renesas/0019-i2c-rcar-Add-per-Generation-fallback-bindings.patch
+++ /dev/null
@@ -1,103 +0,0 @@
-From f071d45fa24d96f9782bcd7478da43ed9c767078 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 6 Dec 2016 17:01:28 +0100
-Subject: [PATCH 019/299] i2c: rcar: Add per-Generation fallback bindings
-
-In the case of Renesas R-Car hardware we know that there are generations of
-SoCs, e.g. Gen 2 and Gen 3. But beyond that it's not clear what the
-relationship between IP blocks might be. For example, I believe that
-r8a7790 is older than r8a7791 but that doesn't imply that the latter is a
-descendant of the former or vice versa.
-
-We can, however, by examining the documentation and behaviour of the
-hardware at run-time observe that the current driver implementation appears
-to be compatible with the IP blocks on SoCs within a given generation.
-
-For the above reasons and convenience when enabling new SoCs a
-per-generation fallback compatibility string scheme is being adopted for
-drivers for Renesas SoCs.
-
-Also:
-* Deprecate renesas,i2c-rcar. It seems poorly named as it is only
-  compatible with R-Car Gen 1. It also appears unused in mainline.
-* Add some text to describe per-SoC bindings
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit ad4a8dc3fec6485b18654d1090ef8012fcfc37b8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/i2c/i2c-rcar.txt |   32 +++++++++++++--------
- drivers/i2c/busses/i2c-rcar.c                      |    5 ++-
- 2 files changed, 24 insertions(+), 13 deletions(-)
-
---- a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
-+++ b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
-@@ -1,17 +1,25 @@
- I2C for R-Car platforms
- 
- Required properties:
--- compatible: Must be one of
--	"renesas,i2c-rcar"
--	"renesas,i2c-r8a7778"
--	"renesas,i2c-r8a7779"
--	"renesas,i2c-r8a7790"
--	"renesas,i2c-r8a7791"
--	"renesas,i2c-r8a7792"
--	"renesas,i2c-r8a7793"
--	"renesas,i2c-r8a7794"
--	"renesas,i2c-r8a7795"
--	"renesas,i2c-r8a7796"
-+- compatible:
-+	"renesas,i2c-r8a7778" if the device is a part of a R8A7778 SoC.
-+	"renesas,i2c-r8a7779" if the device is a part of a R8A7779 SoC.
-+	"renesas,i2c-r8a7790" if the device is a part of a R8A7790 SoC.
-+	"renesas,i2c-r8a7791" if the device is a part of a R8A7791 SoC.
-+	"renesas,i2c-r8a7792" if the device is a part of a R8A7792 SoC.
-+	"renesas,i2c-r8a7793" if the device is a part of a R8A7793 SoC.
-+	"renesas,i2c-r8a7794" if the device is a part of a R8A7794 SoC.
-+	"renesas,i2c-r8a7795" if the device is a part of a R8A7795 SoC.
-+	"renesas,i2c-r8a7796" if the device is a part of a R8A7796 SoC.
-+	"renesas,rcar-gen1-i2c" for a generic R-Car Gen1 compatible device.
-+	"renesas,rcar-gen2-i2c" for a generic R-Car Gen2 compatible device.
-+	"renesas,rcar-gen3-i2c" for a generic R-Car Gen3 compatible device.
-+	"renesas,i2c-rcar" (deprecated)
-+
-+	When compatible with the generic version, nodes must list the
-+	SoC-specific version corresponding to the platform first followed
-+	by the generic version.
-+
- - reg: physical base address of the controller and length of memory mapped
-   region.
- - interrupts: interrupt specifier.
-@@ -33,7 +41,7 @@ Examples :
- i2c0: i2c@e6508000 {
- 	#address-cells = <1>;
- 	#size-cells = <0>;
--	compatible = "renesas,i2c-r8a7791";
-+	compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- 	reg = <0 0xe6508000 0 0x40>;
- 	interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
- 	clocks = <&mstp9_clks R8A7791_CLK_I2C0>;
---- a/drivers/i2c/busses/i2c-rcar.c
-+++ b/drivers/i2c/busses/i2c-rcar.c
-@@ -795,7 +795,6 @@ static const struct i2c_algorithm rcar_i
- };
- 
- static const struct of_device_id rcar_i2c_dt_ids[] = {
--	{ .compatible = "renesas,i2c-rcar", .data = (void *)I2C_RCAR_GEN1 },
- 	{ .compatible = "renesas,i2c-r8a7778", .data = (void *)I2C_RCAR_GEN1 },
- 	{ .compatible = "renesas,i2c-r8a7779", .data = (void *)I2C_RCAR_GEN1 },
- 	{ .compatible = "renesas,i2c-r8a7790", .data = (void *)I2C_RCAR_GEN2 },
-@@ -805,6 +804,10 @@ static const struct of_device_id rcar_i2
- 	{ .compatible = "renesas,i2c-r8a7794", .data = (void *)I2C_RCAR_GEN2 },
- 	{ .compatible = "renesas,i2c-r8a7795", .data = (void *)I2C_RCAR_GEN3 },
- 	{ .compatible = "renesas,i2c-r8a7796", .data = (void *)I2C_RCAR_GEN3 },
-+	{ .compatible = "renesas,i2c-rcar", .data = (void *)I2C_RCAR_GEN1 },	/* Deprecated */
-+	{ .compatible = "renesas,rcar-gen1-i2c", .data = (void *)I2C_RCAR_GEN1 },
-+	{ .compatible = "renesas,rcar-gen2-i2c", .data = (void *)I2C_RCAR_GEN2 },
-+	{ .compatible = "renesas,rcar-gen3-i2c", .data = (void *)I2C_RCAR_GEN3 },
- 	{},
- };
- MODULE_DEVICE_TABLE(of, rcar_i2c_dt_ids);
diff --git a/patches.renesas/0020-arm64-dts-r8a7795-Add-Cortex-A53-CPU-cores.patch b/patches.renesas/0020-arm64-dts-r8a7795-Add-Cortex-A53-CPU-cores.patch
deleted file mode 100644
index 93bc35106fc9a0..00000000000000
--- a/patches.renesas/0020-arm64-dts-r8a7795-Add-Cortex-A53-CPU-cores.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 57e1fdd47fccc40ea526e983dbf5332d31c37522 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 24 Feb 2017 14:59:27 +0100
-Subject: [PATCH 020/286] arm64: dts: r8a7795: Add Cortex-A53 CPU cores
-
-This patch adds Cortex-A53 CPU cores to r8a7795 SoC for a total of 8
-cores (4 x Cortex-A57 + 4 x Cortex-A53).
-
-Based on work by Takeshi Kihara and Dirk Behme.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 799a75abdef348500bab14e873e7711afa426aaf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |   46 +++++++++++++++++++++++++++----
- 1 file changed, 41 insertions(+), 5 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -73,6 +73,42 @@
- 			enable-method = "psci";
- 		};
- 
-+		a53_0: cpu@100 {
-+			compatible = "arm,cortex-a53", "arm,armv8";
-+			reg = <0x100>;
-+			device_type = "cpu";
-+			power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
-+			next-level-cache = <&L2_CA53>;
-+			enable-method = "psci";
-+		};
-+
-+		a53_1: cpu@101 {
-+			compatible = "arm,cortex-a53","arm,armv8";
-+			reg = <0x101>;
-+			device_type = "cpu";
-+			power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
-+			next-level-cache = <&L2_CA53>;
-+			enable-method = "psci";
-+		};
-+
-+		a53_2: cpu@102 {
-+			compatible = "arm,cortex-a53","arm,armv8";
-+			reg = <0x102>;
-+			device_type = "cpu";
-+			power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
-+			next-level-cache = <&L2_CA53>;
-+			enable-method = "psci";
-+		};
-+
-+		a53_3: cpu@103 {
-+			compatible = "arm,cortex-a53","arm,armv8";
-+			reg = <0x103>;
-+			device_type = "cpu";
-+			power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
-+			next-level-cache = <&L2_CA53>;
-+			enable-method = "psci";
-+		};
-+
- 		L2_CA57: cache-controller@0 {
- 			compatible = "cache";
- 			reg = <0>;
-@@ -166,7 +202,7 @@
- 			      <0x0 0xf1040000 0 0x20000>,
- 			      <0x0 0xf1060000 0 0x20000>;
- 			interrupts = <GIC_PPI 9
--					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-+					(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
- 			clocks = <&cpg CPG_MOD 408>;
- 			clock-names = "clk";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-@@ -307,13 +343,13 @@
- 		timer {
- 			compatible = "arm,armv8-timer";
- 			interrupts = <GIC_PPI 13
--					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-+					(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
- 				     <GIC_PPI 14
--					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-+					(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
- 				     <GIC_PPI 11
--					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-+					(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
- 				     <GIC_PPI 10
--					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
-+					(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
- 		};
- 
- 		cpg: clock-controller@e6150000 {
diff --git a/patches.renesas/0020-clk-renesas-cpg-mssr-Add-support-for-reset-control.patch b/patches.renesas/0020-clk-renesas-cpg-mssr-Add-support-for-reset-control.patch
deleted file mode 100644
index 3f4418d0074215..00000000000000
--- a/patches.renesas/0020-clk-renesas-cpg-mssr-Add-support-for-reset-control.patch
+++ /dev/null
@@ -1,194 +0,0 @@
-From 20cad7aa5686445380d9e26bc3ae49f1c534ddb8 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 20 Jan 2017 11:03:03 +0100
-Subject: [PATCH 020/255] clk: renesas: cpg-mssr: Add support for reset control
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Add optional support for the Reset Control feature of the Renesas Clock
-Pulse Generator / Module Standby and Software Reset module on R-Car
-Gen2, R-Car Gen3, and RZ/G1 SoCs.
-
-This allows to reset SoC devices using the Reset Controller API.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
-Acked-by: Stephen Boyd <sboyd@codeaurora.org>
-Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-(cherry picked from commit 6197aa65c4905532943155d03031ba0f3a4b2a3b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/renesas-cpg-mssr.c |  126 +++++++++++++++++++++++++++++++++
- 1 file changed, 126 insertions(+)
-
---- a/drivers/clk/renesas/renesas-cpg-mssr.c
-+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
-@@ -16,6 +16,7 @@
- #include <linux/clk.h>
- #include <linux/clk-provider.h>
- #include <linux/clk/renesas.h>
-+#include <linux/delay.h>
- #include <linux/device.h>
- #include <linux/init.h>
- #include <linux/mod_devicetable.h>
-@@ -25,6 +26,7 @@
- #include <linux/platform_device.h>
- #include <linux/pm_clock.h>
- #include <linux/pm_domain.h>
-+#include <linux/reset-controller.h>
- #include <linux/slab.h>
- 
- #include <dt-bindings/clock/renesas-cpg-mssr.h>
-@@ -96,6 +98,7 @@ static const u16 srcr[] = {
- /**
-  * Clock Pulse Generator / Module Standby and Software Reset Private Data
-  *
-+ * @rcdev: Optional reset controller entity
-  * @dev: CPG/MSSR device
-  * @base: CPG/MSSR register block base address
-  * @rmw_lock: protects RMW register accesses
-@@ -105,6 +108,9 @@ static const u16 srcr[] = {
-  * @last_dt_core_clk: ID of the last Core Clock exported to DT
-  */
- struct cpg_mssr_priv {
-+#ifdef CONFIG_RESET_CONTROLLER
-+	struct reset_controller_dev rcdev;
-+#endif
- 	struct device *dev;
- 	void __iomem *base;
- 	spinlock_t rmw_lock;
-@@ -495,6 +501,122 @@ static int __init cpg_mssr_add_clk_domai
- 	return 0;
- }
- 
-+#ifdef CONFIG_RESET_CONTROLLER
-+
-+#define rcdev_to_priv(x)	container_of(x, struct cpg_mssr_priv, rcdev)
-+
-+static int cpg_mssr_reset(struct reset_controller_dev *rcdev,
-+			  unsigned long id)
-+{
-+	struct cpg_mssr_priv *priv = rcdev_to_priv(rcdev);
-+	unsigned int reg = id / 32;
-+	unsigned int bit = id % 32;
-+	u32 bitmask = BIT(bit);
-+	unsigned long flags;
-+	u32 value;
-+
-+	dev_dbg(priv->dev, "reset %u%02u\n", reg, bit);
-+
-+	/* Reset module */
-+	spin_lock_irqsave(&priv->rmw_lock, flags);
-+	value = readl(priv->base + SRCR(reg));
-+	value |= bitmask;
-+	writel(value, priv->base + SRCR(reg));
-+	spin_unlock_irqrestore(&priv->rmw_lock, flags);
-+
-+	/* Wait for at least one cycle of the RCLK clock (@ ca. 32 kHz) */
-+	udelay(35);
-+
-+	/* Release module from reset state */
-+	writel(bitmask, priv->base + SRSTCLR(reg));
-+
-+	return 0;
-+}
-+
-+static int cpg_mssr_assert(struct reset_controller_dev *rcdev, unsigned long id)
-+{
-+	struct cpg_mssr_priv *priv = rcdev_to_priv(rcdev);
-+	unsigned int reg = id / 32;
-+	unsigned int bit = id % 32;
-+	u32 bitmask = BIT(bit);
-+	unsigned long flags;
-+	u32 value;
-+
-+	dev_dbg(priv->dev, "assert %u%02u\n", reg, bit);
-+
-+	spin_lock_irqsave(&priv->rmw_lock, flags);
-+	value = readl(priv->base + SRCR(reg));
-+	value |= bitmask;
-+	writel(value, priv->base + SRCR(reg));
-+	spin_unlock_irqrestore(&priv->rmw_lock, flags);
-+	return 0;
-+}
-+
-+static int cpg_mssr_deassert(struct reset_controller_dev *rcdev,
-+			     unsigned long id)
-+{
-+	struct cpg_mssr_priv *priv = rcdev_to_priv(rcdev);
-+	unsigned int reg = id / 32;
-+	unsigned int bit = id % 32;
-+	u32 bitmask = BIT(bit);
-+
-+	dev_dbg(priv->dev, "deassert %u%02u\n", reg, bit);
-+
-+	writel(bitmask, priv->base + SRSTCLR(reg));
-+	return 0;
-+}
-+
-+static int cpg_mssr_status(struct reset_controller_dev *rcdev,
-+			   unsigned long id)
-+{
-+	struct cpg_mssr_priv *priv = rcdev_to_priv(rcdev);
-+	unsigned int reg = id / 32;
-+	unsigned int bit = id % 32;
-+	u32 bitmask = BIT(bit);
-+
-+	return !!(readl(priv->base + SRCR(reg)) & bitmask);
-+}
-+
-+static const struct reset_control_ops cpg_mssr_reset_ops = {
-+	.reset = cpg_mssr_reset,
-+	.assert = cpg_mssr_assert,
-+	.deassert = cpg_mssr_deassert,
-+	.status = cpg_mssr_status,
-+};
-+
-+static int cpg_mssr_reset_xlate(struct reset_controller_dev *rcdev,
-+				const struct of_phandle_args *reset_spec)
-+{
-+	struct cpg_mssr_priv *priv = rcdev_to_priv(rcdev);
-+	unsigned int unpacked = reset_spec->args[0];
-+	unsigned int idx = MOD_CLK_PACK(unpacked);
-+
-+	if (unpacked % 100 > 31 || idx >= rcdev->nr_resets) {
-+		dev_err(priv->dev, "Invalid reset index %u\n", unpacked);
-+		return -EINVAL;
-+	}
-+
-+	return idx;
-+}
-+
-+static int cpg_mssr_reset_controller_register(struct cpg_mssr_priv *priv)
-+{
-+	priv->rcdev.ops = &cpg_mssr_reset_ops;
-+	priv->rcdev.of_node = priv->dev->of_node;
-+	priv->rcdev.of_reset_n_cells = 1;
-+	priv->rcdev.of_xlate = cpg_mssr_reset_xlate;
-+	priv->rcdev.nr_resets = priv->num_mod_clks;
-+	return devm_reset_controller_register(priv->dev, &priv->rcdev);
-+}
-+
-+#else /* !CONFIG_RESET_CONTROLLER */
-+static inline int cpg_mssr_reset_controller_register(struct cpg_mssr_priv *priv)
-+{
-+	return 0;
-+}
-+#endif /* !CONFIG_RESET_CONTROLLER */
-+
-+
- static const struct of_device_id cpg_mssr_match[] = {
- #ifdef CONFIG_ARCH_R8A7743
- 	{
-@@ -592,6 +714,10 @@ static int __init cpg_mssr_probe(struct
- 	if (error)
- 		return error;
- 
-+	error = cpg_mssr_reset_controller_register(priv);
-+	if (error)
-+		return error;
-+
- 	return 0;
- }
- 
diff --git a/patches.renesas/0020-i2c-sh_mobile-Add-per-Generation-fallback-bindings.patch b/patches.renesas/0020-i2c-sh_mobile-Add-per-Generation-fallback-bindings.patch
deleted file mode 100644
index cdaa43c4a10efe..00000000000000
--- a/patches.renesas/0020-i2c-sh_mobile-Add-per-Generation-fallback-bindings.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From 6e95f33b00994ce1efca19a2643f2c8e8f1aeb8a Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Wed, 7 Dec 2016 11:39:36 +0100
-Subject: [PATCH 020/299] i2c: sh_mobile: Add per-Generation fallback bindings
-
-Add per-Generation fallback bindings for R-Car SoCs.
-
-This is in keeping with the compatibility string scheme is being adopted
-for drivers for Renesas SoCs.
-
-Also, improve readability by listing the rmobile fallback compatibility
-string after the more-specific compatibility strings they provide a
-fallback for.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit b880ccaf1742c28e91534ad7820c4405c04dabf9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt |   17 +++++++++++++---
- drivers/i2c/busses/i2c-sh_mobile.c                      |    4 ++-
- 2 files changed, 17 insertions(+), 4 deletions(-)
-
---- a/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
-+++ b/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
-@@ -1,8 +1,7 @@
- Device tree configuration for Renesas IIC (sh_mobile) driver
- 
- Required properties:
--- compatible      : "renesas,iic-<soctype>". "renesas,rmobile-iic" as fallback
--		     Examples with soctypes are:
-+- compatible      :
- 			- "renesas,iic-r8a73a4" (R-Mobile APE6)
- 			- "renesas,iic-r8a7740" (R-Mobile A1)
- 			- "renesas,iic-r8a7790" (R-Car H2)
-@@ -12,6 +11,17 @@ Required properties:
- 			- "renesas,iic-r8a7794" (R-Car E2)
- 			- "renesas,iic-r8a7795" (R-Car H3)
- 			- "renesas,iic-sh73a0" (SH-Mobile AG5)
-+			- "renesas,rcar-gen2-iic" (generic R-Car Gen2 compatible device)
-+			- "renesas,rcar-gen3-iic" (generic R-Car Gen3 compatible device)
-+			- "renesas,rmobile-iic" (generic device)
-+
-+			When compatible with a generic R-Car version, nodes
-+			must list the SoC-specific version corresponding to
-+			the platform first followed by the generic R-Car
-+			version.
-+
-+			renesas,rmobile-iic must always follow.
-+
- - reg             : address start and address range size of device
- - interrupts      : interrupt of device
- - clocks          : clock for device
-@@ -31,7 +41,8 @@ Pinctrl properties might be needed, too.
- Example:
- 
- 	iic0: i2c@e6500000 {
--		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
-+		compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
-+			     "renesas,rmobile-iic";
- 		reg = <0 0xe6500000 0 0x425>;
- 		interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
---- a/drivers/i2c/busses/i2c-sh_mobile.c
-+++ b/drivers/i2c/busses/i2c-sh_mobile.c
-@@ -827,7 +827,6 @@ static const struct sh_mobile_dt_config
- };
- 
- static const struct of_device_id sh_mobile_i2c_dt_ids[] = {
--	{ .compatible = "renesas,rmobile-iic", .data = &default_dt_config },
- 	{ .compatible = "renesas,iic-r8a73a4", .data = &fast_clock_dt_config },
- 	{ .compatible = "renesas,iic-r8a7740", .data = &r8a7740_dt_config },
- 	{ .compatible = "renesas,iic-r8a7790", .data = &fast_clock_dt_config },
-@@ -835,8 +834,11 @@ static const struct of_device_id sh_mobi
- 	{ .compatible = "renesas,iic-r8a7792", .data = &fast_clock_dt_config },
- 	{ .compatible = "renesas,iic-r8a7793", .data = &fast_clock_dt_config },
- 	{ .compatible = "renesas,iic-r8a7794", .data = &fast_clock_dt_config },
-+	{ .compatible = "renesas,rcar-gen2-iic", .data = &fast_clock_dt_config },
- 	{ .compatible = "renesas,iic-r8a7795", .data = &fast_clock_dt_config },
-+	{ .compatible = "renesas,rcar-gen3-iic", .data = &fast_clock_dt_config },
- 	{ .compatible = "renesas,iic-sh73a0", .data = &fast_clock_dt_config },
-+	{ .compatible = "renesas,rmobile-iic", .data = &default_dt_config },
- 	{},
- };
- MODULE_DEVICE_TABLE(of, sh_mobile_i2c_dt_ids);
diff --git a/patches.renesas/0021-arm64-dts-r8a7795-Add-Cortex-A53-PMU-node.patch b/patches.renesas/0021-arm64-dts-r8a7795-Add-Cortex-A53-PMU-node.patch
deleted file mode 100644
index a34b6f5422ab4e..00000000000000
--- a/patches.renesas/0021-arm64-dts-r8a7795-Add-Cortex-A53-PMU-node.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From a691805bccb105f7bd61f1bd77c9032250119e31 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 24 Feb 2017 14:59:28 +0100
-Subject: [PATCH 021/286] arm64: dts: r8a7795: Add Cortex-A53 PMU node
-
-Enable the performance monitor unit for the Cortex-A53 cores on the
-R8A7795 SoC.
-
-Extracted from a patch by Takeshi Kihara in the BSP.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9190748fd608dc3aa80edacab9e6818f2d6f71b6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |   12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -340,6 +340,18 @@
- 					     <&a57_3>;
- 		};
- 
-+		pmu_a53 {
-+			compatible = "arm,cortex-a53-pmu";
-+			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-affinity = <&a53_0>,
-+					     <&a53_1>,
-+					     <&a53_2>,
-+					     <&a53_3>;
-+		};
-+
- 		timer {
- 			compatible = "arm,armv8-timer";
- 			interrupts = <GIC_PPI 13
diff --git a/patches.renesas/0021-base-soc-Early-register-bus-when-needed.patch b/patches.renesas/0021-base-soc-Early-register-bus-when-needed.patch
deleted file mode 100644
index ae7d9c30868fbf..00000000000000
--- a/patches.renesas/0021-base-soc-Early-register-bus-when-needed.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 0c2851a91abbf4ea96e549c695f89aa2f57bba3d Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 27 Sep 2016 17:10:29 +0200
-Subject: [PATCH 021/299] base: soc: Early register bus when needed
-
-If soc_device_register() is called before soc_bus_register(), it crashes
-with a NULL pointer dereference.
-
-soc_bus_register() is already a core_initcall(), but drivers/base/ is
-entered later than e.g. drivers/pinctrl/ and drivers/soc/. Hence there
-are several subsystems that may need to know SoC revision information,
-while it's not so easy to initialize the SoC bus even earlier using an
-initcall.
-
-To fix this, let soc_device_register() register the bus early if that
-hasn't happened yet.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-(cherry picked from commit 1da1b3628df34a2a5e38b70c8551770aadce969d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/base/soc.c |    9 +++++++++
- 1 file changed, 9 insertions(+)
-
---- a/drivers/base/soc.c
-+++ b/drivers/base/soc.c
-@@ -113,6 +113,12 @@ struct soc_device *soc_device_register(s
- 	struct soc_device *soc_dev;
- 	int ret;
- 
-+	if (!soc_bus_type.p) {
-+		ret = bus_register(&soc_bus_type);
-+		if (ret)
-+			goto out1;
-+	}
-+
- 	soc_dev = kzalloc(sizeof(*soc_dev), GFP_KERNEL);
- 	if (!soc_dev) {
- 		ret = -ENOMEM;
-@@ -156,6 +162,9 @@ void soc_device_unregister(struct soc_de
- 
- static int __init soc_bus_register(void)
- {
-+	if (soc_bus_type.p)
-+		return 0;
-+
- 	return bus_register(&soc_bus_type);
- }
- core_initcall(soc_bus_register);
diff --git a/patches.renesas/0021-clk-renesas-r8a7795-Add-IIC-DVFS-clock.patch b/patches.renesas/0021-clk-renesas-r8a7795-Add-IIC-DVFS-clock.patch
deleted file mode 100644
index 518f8c47adf9dd..00000000000000
--- a/patches.renesas/0021-clk-renesas-r8a7795-Add-IIC-DVFS-clock.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 23f57c51befad045a8d440f02de3cba743b7e5ff Mon Sep 17 00:00:00 2001
-From: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
-Date: Mon, 23 May 2016 11:05:42 +0900
-Subject: [PATCH 021/255] clk: renesas: r8a7795: Add IIC-DVFS clock
-
-This patch adds DVFS clock for R8A7795 SoC.
-
-Signed-off-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
-Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
-Signed-off-by: Dien Pham <dien.pham.ry@rvc.renesas.com>
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 2c8e79898c9af08e04b36d3678384642b59f6509)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7795-cpg-mssr.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
-@@ -221,6 +221,7 @@ static const struct mssr_mod_clk r8a7795
- 	DEF_MOD("can-if0",		 916,	R8A7795_CLK_S3D4),
- 	DEF_MOD("i2c6",			 918,	R8A7795_CLK_S3D2),
- 	DEF_MOD("i2c5",			 919,	R8A7795_CLK_S3D2),
-+	DEF_MOD("i2c-dvfs",		 926,	R8A7795_CLK_CP),
- 	DEF_MOD("i2c4",			 927,	R8A7795_CLK_S3D2),
- 	DEF_MOD("i2c3",			 928,	R8A7795_CLK_S3D2),
- 	DEF_MOD("i2c2",			 929,	R8A7795_CLK_S3D2),
diff --git a/patches.renesas/0022-arm64-dts-r8a7795-Upgrade-to-PSCI-v1.0-to-support-Su.patch b/patches.renesas/0022-arm64-dts-r8a7795-Upgrade-to-PSCI-v1.0-to-support-Su.patch
deleted file mode 100644
index 12d2c7b07b7b8b..00000000000000
--- a/patches.renesas/0022-arm64-dts-r8a7795-Upgrade-to-PSCI-v1.0-to-support-Su.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 173289a216e48c22bfb23a2000c8ce65155c555e Mon Sep 17 00:00:00 2001
-From: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
-Date: Fri, 24 Feb 2017 14:49:13 +0100
-Subject: [PATCH 022/286] arm64: dts: r8a7795: Upgrade to PSCI v1.0 to support
- Suspend-to-RAM
-
->From PSCI v1.0, Suspend-to-RAM is supported via SYSTEM_SUSPEND PSCI
-function call. Hence, upgrade PSCI version for R-Car H3 to support
-Suspend-to-RAM.
-
-The Suspend-to-RAM is highly dependent on ARM Trusted Firwmare support
-since necessary callback functions will be registered after a query
-to ARM Trusted Firmware about SYSTEM_SUSPEND support.
-
-Since PSCI v1.0 is backward compatible with PSCI v0.2, CPU Hotplug and
-CPUIdle should be able to work normally with this change.
-
-Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-[geert: Keep "arm,psci-0.2"]
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 71585040b77e7b388708dc35bdc49f106fa55a4a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -29,7 +29,7 @@
- 	};
- 
- 	psci {
--		compatible = "arm,psci-0.2";
-+		compatible = "arm,psci-1.0", "arm,psci-0.2";
- 		method = "smc";
- 	};
- 
diff --git a/patches.renesas/0022-base-soc-Introduce-soc_device_match-interface.patch b/patches.renesas/0022-base-soc-Introduce-soc_device_match-interface.patch
deleted file mode 100644
index f7055d328c6d43..00000000000000
--- a/patches.renesas/0022-base-soc-Introduce-soc_device_match-interface.patch
+++ /dev/null
@@ -1,155 +0,0 @@
-From b1b6e5ce1a71e21b47cc9c229eba2db35cc25f35 Mon Sep 17 00:00:00 2001
-From: Arnd Bergmann <arnd@arndb.de>
-Date: Wed, 21 Sep 2016 14:57:19 +0800
-Subject: [PATCH 022/299] base: soc: Introduce soc_device_match() interface
-
-We keep running into cases where device drivers want to know the exact
-version of the a SoC they are currently running on. In the past, this has
-usually been done through a vendor specific API that can be called by a
-driver, or by directly accessing some kind of version register that is
-not part of the device itself but that belongs to a global register area
-of the chip.
-
-Common reasons for doing this include:
-
-- A machine is not using devicetree or similar for passing data about
-  on-chip devices, but just announces their presence using boot-time
-  platform devices, and the machine code itself does not care about the
-  revision.
-
-- There is existing firmware or boot loaders with existing DT binaries
-  with generic compatible strings that do not identify the particular
-  revision of each device, but the driver knows which SoC revisions
-  include which part.
-
-- A prerelease version of a chip has some quirks and we are using the same
-  version of the bootloader and the DT blob on both the prerelease and the
-  final version. An update of the DT binding seems inappropriate because
-  that would involve maintaining multiple copies of the dts and/or
-  bootloader.
-
-This patch introduces the soc_device_match() interface that is meant to
-work like of_match_node() but instead of identifying the version of a
-device, it identifies the SoC itself using a vendor-agnostic interface.
-
-Unlike of_match_node(), we do not do an exact string compare but instead
-use glob_match() to allow wildcards in strings.
-
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit c97db7cc7778e34a53b42d58c766f0ec0e30d580)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/base/Kconfig    |    1 
- drivers/base/soc.c      |   66 ++++++++++++++++++++++++++++++++++++++++++++++++
- include/linux/sys_soc.h |    3 ++
- 3 files changed, 70 insertions(+)
-
---- a/drivers/base/Kconfig
-+++ b/drivers/base/Kconfig
-@@ -240,6 +240,7 @@ config GENERIC_CPU_VULNERABILITIES
- 
- config SOC_BUS
- 	bool
-+	select GLOB
- 
- source "drivers/base/regmap/Kconfig"
- 
---- a/drivers/base/soc.c
-+++ b/drivers/base/soc.c
-@@ -13,6 +13,7 @@
- #include <linux/spinlock.h>
- #include <linux/sys_soc.h>
- #include <linux/err.h>
-+#include <linux/glob.h>
- 
- static DEFINE_IDA(soc_ida);
- 
-@@ -168,3 +169,68 @@ static int __init soc_bus_register(void)
- 	return bus_register(&soc_bus_type);
- }
- core_initcall(soc_bus_register);
-+
-+static int soc_device_match_one(struct device *dev, void *arg)
-+{
-+	struct soc_device *soc_dev = container_of(dev, struct soc_device, dev);
-+	const struct soc_device_attribute *match = arg;
-+
-+	if (match->machine &&
-+	    !glob_match(match->machine, soc_dev->attr->machine))
-+		return 0;
-+
-+	if (match->family &&
-+	    !glob_match(match->family, soc_dev->attr->family))
-+		return 0;
-+
-+	if (match->revision &&
-+	    !glob_match(match->revision, soc_dev->attr->revision))
-+		return 0;
-+
-+	if (match->soc_id &&
-+	    !glob_match(match->soc_id, soc_dev->attr->soc_id))
-+		return 0;
-+
-+	return 1;
-+}
-+
-+/*
-+ * soc_device_match - identify the SoC in the machine
-+ * @matches: zero-terminated array of possible matches
-+ *
-+ * returns the first matching entry of the argument array, or NULL
-+ * if none of them match.
-+ *
-+ * This function is meant as a helper in place of of_match_node()
-+ * in cases where either no device tree is available or the information
-+ * in a device node is insufficient to identify a particular variant
-+ * by its compatible strings or other properties. For new devices,
-+ * the DT binding should always provide unique compatible strings
-+ * that allow the use of of_match_node() instead.
-+ *
-+ * The calling function can use the .data entry of the
-+ * soc_device_attribute to pass a structure or function pointer for
-+ * each entry.
-+ */
-+const struct soc_device_attribute *soc_device_match(
-+	const struct soc_device_attribute *matches)
-+{
-+	int ret = 0;
-+
-+	if (!matches)
-+		return NULL;
-+
-+	while (!ret) {
-+		if (!(matches->machine || matches->family ||
-+		      matches->revision || matches->soc_id))
-+			break;
-+		ret = bus_for_each_dev(&soc_bus_type, NULL, (void *)matches,
-+				       soc_device_match_one);
-+		if (!ret)
-+			matches++;
-+		else
-+			return matches;
-+	}
-+	return NULL;
-+}
-+EXPORT_SYMBOL_GPL(soc_device_match);
---- a/include/linux/sys_soc.h
-+++ b/include/linux/sys_soc.h
-@@ -13,6 +13,7 @@ struct soc_device_attribute {
- 	const char *family;
- 	const char *revision;
- 	const char *soc_id;
-+	const void *data;
- };
- 
- /**
-@@ -34,4 +35,6 @@ void soc_device_unregister(struct soc_de
-  */
- struct device *soc_device_to_device(struct soc_device *soc);
- 
-+const struct soc_device_attribute *soc_device_match(
-+	const struct soc_device_attribute *matches);
- #endif /* __SOC_BUS_H */
diff --git a/patches.renesas/0022-clk-renesas-r8a7796-Add-IIC-DVFS-clock.patch b/patches.renesas/0022-clk-renesas-r8a7796-Add-IIC-DVFS-clock.patch
deleted file mode 100644
index 06b1908bc5eec5..00000000000000
--- a/patches.renesas/0022-clk-renesas-r8a7796-Add-IIC-DVFS-clock.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 20b209556d436e789d3201d1b892805dc8e5b54a Mon Sep 17 00:00:00 2001
-From: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
-Date: Mon, 4 Apr 2016 09:01:19 +0700
-Subject: [PATCH 022/255] clk: renesas: r8a7796: Add IIC-DVFS clock
-
-This patch adds DVFS clock for R8A7796 SoC.
-
-Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
-Signed-off-by: Dien Pham <dien.pham.ry@rvc.renesas.com>
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit d963654e109565cf73399815d7585917f2d69a30)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -192,6 +192,7 @@ static const struct mssr_mod_clk r8a7796
- 	DEF_MOD("can-if0",		 916,	R8A7796_CLK_S3D4),
- 	DEF_MOD("i2c6",			 918,	R8A7796_CLK_S0D6),
- 	DEF_MOD("i2c5",			 919,	R8A7796_CLK_S0D6),
-+	DEF_MOD("i2c-dvfs",		 926,	R8A7796_CLK_CP),
- 	DEF_MOD("i2c4",			 927,	R8A7796_CLK_S0D6),
- 	DEF_MOD("i2c3",			 928,	R8A7796_CLK_S0D6),
- 	DEF_MOD("i2c2",			 929,	R8A7796_CLK_S3D2),
diff --git a/patches.renesas/0023-arm64-dts-r8a7796-Upgrade-to-PSCI-v1.0-to-support-Su.patch b/patches.renesas/0023-arm64-dts-r8a7796-Upgrade-to-PSCI-v1.0-to-support-Su.patch
deleted file mode 100644
index 714ea74b407f81..00000000000000
--- a/patches.renesas/0023-arm64-dts-r8a7796-Upgrade-to-PSCI-v1.0-to-support-Su.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 9bd3cc397e75ded3a22999037c0ab1f052383b6b Mon Sep 17 00:00:00 2001
-From: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
-Date: Fri, 24 Feb 2017 14:49:14 +0100
-Subject: [PATCH 023/286] arm64: dts: r8a7796: Upgrade to PSCI v1.0 to support
- Suspend-to-RAM
-
->From PSCI v1.0, Suspend-to-RAM is supported via SYSTEM_SUSPEND PSCI
-function call. Hence, upgrade PSCI version for R-Car M3-W to support
-Suspend-to-RAM.
-
-The Suspend-to-RAM is highly dependent on ARM Trusted Firwmare support
-since necessary callback functions will be registered after a query
-to ARM Trusted Firmware about SYSTEM_SUSPEND support.
-
-Since PSCI v1.0 is backward compatible with PSCI v0.2, CPU Hotplug and
-CPUIdle should be able to work normally with this change.
-
-Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-[geert: Keep "arm,psci-0.2"]
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit b3f26910c0daafded536cf5edceab2ab469252cb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -29,7 +29,7 @@
- 	};
- 
- 	psci {
--		compatible = "arm,psci-0.2";
-+		compatible = "arm,psci-1.0", "arm,psci-0.2";
- 		method = "smc";
- 	};
- 
diff --git a/patches.renesas/0023-base-soc-Check-for-NULL-SoC-device-attributes.patch b/patches.renesas/0023-base-soc-Check-for-NULL-SoC-device-attributes.patch
deleted file mode 100644
index fdbd3541a1573a..00000000000000
--- a/patches.renesas/0023-base-soc-Check-for-NULL-SoC-device-attributes.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From bf18158073ebb40bf6903ab8d4107752106e5e3b Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 3 Oct 2016 17:43:41 +0200
-Subject: [PATCH 023/299] base: soc: Check for NULL SoC device attributes
-
-If soc_device_match() is used to check the value of a specific
-attribute that is not present for the current SoC, the kernel crashes
-with a NULL pointer dereference.
-
-Fix this by explicitly checking for the absence of a needed property,
-and considering this a non-match.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit ab6a713e7dc2f92ad3bc3387122524655431501e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/base/soc.c |   12 ++++++++----
- 1 file changed, 8 insertions(+), 4 deletions(-)
-
---- a/drivers/base/soc.c
-+++ b/drivers/base/soc.c
-@@ -176,19 +176,23 @@ static int soc_device_match_one(struct d
- 	const struct soc_device_attribute *match = arg;
- 
- 	if (match->machine &&
--	    !glob_match(match->machine, soc_dev->attr->machine))
-+	    (!soc_dev->attr->machine ||
-+	     !glob_match(match->machine, soc_dev->attr->machine)))
- 		return 0;
- 
- 	if (match->family &&
--	    !glob_match(match->family, soc_dev->attr->family))
-+	    (!soc_dev->attr->family ||
-+	     !glob_match(match->family, soc_dev->attr->family)))
- 		return 0;
- 
- 	if (match->revision &&
--	    !glob_match(match->revision, soc_dev->attr->revision))
-+	    (!soc_dev->attr->revision ||
-+	     !glob_match(match->revision, soc_dev->attr->revision)))
- 		return 0;
- 
- 	if (match->soc_id &&
--	    !glob_match(match->soc_id, soc_dev->attr->soc_id))
-+	    (!soc_dev->attr->soc_id ||
-+	     !glob_match(match->soc_id, soc_dev->attr->soc_id)))
- 		return 0;
- 
- 	return 1;
diff --git a/patches.renesas/0023-clk-renesas-mstp-ensure-register-writes-complete.patch b/patches.renesas/0023-clk-renesas-mstp-ensure-register-writes-complete.patch
deleted file mode 100644
index ea9b792af19fab..00000000000000
--- a/patches.renesas/0023-clk-renesas-mstp-ensure-register-writes-complete.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From fb4488f61538f1e252c7c8c1d86f665404e9a4cb Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Tue, 14 Feb 2017 11:08:05 -0500
-Subject: [PATCH 023/255] clk: renesas: mstp: ensure register writes complete
-
-When there is no status bit, it is possible for the clock enable/disable
-operation to have not completed by the time the driver code resumes
-execution. This is due to the fact that write operations are sometimes
-queued and delayed internally. Doing a read ensures the write operations
-has completed.
-
-Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock nodes to dtsi")
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-(cherry picked from commit f59de563358eb9351b7f8f0ba2d3be2ebb70b93d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/clk-mstp.c |    6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/drivers/clk/renesas/clk-mstp.c
-+++ b/drivers/clk/renesas/clk-mstp.c
-@@ -91,6 +91,12 @@ static int cpg_mstp_clock_endisable(stru
- 		value |= bitmask;
- 	cpg_mstp_write(group, value, group->smstpcr);
- 
-+	if (!group->mstpsr) {
-+		/* dummy read to ensure write has completed */
-+		cpg_mstp_read(group, group->smstpcr);
-+		barrier_data(group->smstpcr);
-+	}
-+
- 	spin_unlock_irqrestore(&group->lock, flags);
- 
- 	if (!enable || !group->mstpsr)
diff --git a/patches.renesas/0024-arm64-dts-r8a7795-Remove-unit-addresses-and-regs-fro.patch b/patches.renesas/0024-arm64-dts-r8a7795-Remove-unit-addresses-and-regs-fro.patch
deleted file mode 100644
index 5826a1d8e72c97..00000000000000
--- a/patches.renesas/0024-arm64-dts-r8a7795-Remove-unit-addresses-and-regs-fro.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 7e479fdcf0534f34e6035d8aa1ea67b08e41b734 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 3 Mar 2017 14:18:16 +0100
-Subject: [PATCH 024/286] arm64: dts: r8a7795: Remove unit-addresses and regs
- from integrated caches
-
-The Cortex-A57/A53 cache controllers are integrated controllers, and
-thus the device nodes representing them should not have unit-addresses
-or reg properties.
-
-Fixes: 6f7bf82cc912441f ("arm64: dts: r8a7795: Fix W=1 dtc warnings")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d165856de103a6d317a9c9a5782eacd5dc90a9dc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |    6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -109,17 +109,15 @@
- 			enable-method = "psci";
- 		};
- 
--		L2_CA57: cache-controller@0 {
-+		L2_CA57: cache-controller-0 {
- 			compatible = "cache";
--			reg = <0>;
- 			power-domains = <&sysc R8A7795_PD_CA57_SCU>;
- 			cache-unified;
- 			cache-level = <2>;
- 		};
- 
--		L2_CA53: cache-controller@100 {
-+		L2_CA53: cache-controller-1 {
- 			compatible = "cache";
--			reg = <0x100>;
- 			power-domains = <&sysc R8A7795_PD_CA53_SCU>;
- 			cache-unified;
- 			cache-level = <2>;
diff --git a/patches.renesas/0024-arm64-dts-r8a7796-Add-all-MSIOF-nodes.patch b/patches.renesas/0024-arm64-dts-r8a7796-Add-all-MSIOF-nodes.patch
deleted file mode 100644
index fe83b9cffd44ec..00000000000000
--- a/patches.renesas/0024-arm64-dts-r8a7796-Add-all-MSIOF-nodes.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From ec1b7e5de758d76029855497c6ecd3b43a640a38 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 21 Nov 2016 18:26:53 +0100
-Subject: [PATCH 024/255] arm64: dts: r8a7796: Add all MSIOF nodes
-
-Add the device nodes for all MSIOF SPI controllers.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 80fab06e258da76232356d8a0b390d4bc25e6917)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   54 +++++++++++++++++++++++++++++++
- 1 file changed, 54 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -372,6 +372,60 @@
- 			status = "disabled";
- 		};
- 
-+		msiof0: spi@e6e90000 {
-+			compatible = "renesas,msiof-r8a7796";
-+			reg = <0 0xe6e90000 0 0x0064>;
-+			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 211>;
-+			dmas = <&dmac1 0x41>, <&dmac1 0x40>,
-+			       <&dmac2 0x41>, <&dmac2 0x40>;
-+			dma-names = "tx", "rx";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			status = "disabled";
-+		};
-+
-+		msiof1: spi@e6ea0000 {
-+			compatible = "renesas,msiof-r8a7796";
-+			reg = <0 0xe6ea0000 0 0x0064>;
-+			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 210>;
-+			dmas = <&dmac1 0x43>, <&dmac1 0x42>,
-+			       <&dmac2 0x43>, <&dmac2 0x42>;
-+			dma-names = "tx", "rx";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			status = "disabled";
-+		};
-+
-+		msiof2: spi@e6c00000 {
-+			compatible = "renesas,msiof-r8a7796";
-+			reg = <0 0xe6c00000 0 0x0064>;
-+			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 209>;
-+			dmas = <&dmac0 0x45>, <&dmac0 0x44>;
-+			dma-names = "tx", "rx";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			status = "disabled";
-+		};
-+
-+		msiof3: spi@e6c10000 {
-+			compatible = "renesas,msiof-r8a7796";
-+			reg = <0 0xe6c10000 0 0x0064>;
-+			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 208>;
-+			dmas = <&dmac0 0x47>, <&dmac0 0x46>;
-+			dma-names = "tx", "rx";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			status = "disabled";
-+		};
-+
- 		dmac0: dma-controller@e6700000 {
- 			compatible = "renesas,dmac-r8a7796",
- 				     "renesas,rcar-dmac";
diff --git a/patches.renesas/0024-base-soc-Provide-a-dummy-implementation-of-soc_devic.patch b/patches.renesas/0024-base-soc-Provide-a-dummy-implementation-of-soc_devic.patch
deleted file mode 100644
index d7e827f317e71e..00000000000000
--- a/patches.renesas/0024-base-soc-Provide-a-dummy-implementation-of-soc_devic.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 0c9dacde2809aeb19d71d6b52e58fe541650b1c1 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 26 Oct 2016 15:13:15 +0200
-Subject: [PATCH 024/299] base: soc: Provide a dummy implementation of
- soc_device_match()
-
-Provide a dummy implementation of soc_device_match(), to allow compiling
-drivers that may be used on SoCs both with and without CONFIG_SOC_BUS,
-and for compile testing.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit da65a1589dacc7ec44ea0557a14d70a39d991f32)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/linux/sys_soc.h |    6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/include/linux/sys_soc.h
-+++ b/include/linux/sys_soc.h
-@@ -35,6 +35,12 @@ void soc_device_unregister(struct soc_de
-  */
- struct device *soc_device_to_device(struct soc_device *soc);
- 
-+#ifdef CONFIG_SOC_BUS
- const struct soc_device_attribute *soc_device_match(
- 	const struct soc_device_attribute *matches);
-+#else
-+static inline const struct soc_device_attribute *soc_device_match(
-+	const struct soc_device_attribute *matches) { return NULL; }
-+#endif
-+
- #endif /* __SOC_BUS_H */
diff --git a/patches.renesas/0025-ARM-shmobile-Document-DT-bindings-for-Product-Regist.patch b/patches.renesas/0025-ARM-shmobile-Document-DT-bindings-for-Product-Regist.patch
deleted file mode 100644
index 9767fc3242112a..00000000000000
--- a/patches.renesas/0025-ARM-shmobile-Document-DT-bindings-for-Product-Regist.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 72e16042d09a064fcd8173416030f9e9c9edb7bf Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 14 Nov 2016 19:37:07 +0100
-Subject: [PATCH 025/299] ARM: shmobile: Document DT bindings for Product
- Register
-
-Add device tree binding documentation for the Product Register (PRR),
-which provides product and revision information on most Renesas ARM
-SoCs.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5384f45cd9714287f198771bfb057eda799af9a8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/arm/shmobile.txt |   18 ++++++++++++++++++
- 1 file changed, 18 insertions(+)
-
---- a/Documentation/devicetree/bindings/arm/shmobile.txt
-+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
-@@ -75,3 +75,21 @@ Boards:
-     compatible = "renesas,silk", "renesas,r8a7794"
-   - Wheat
-     compatible = "renesas,wheat", "renesas,r8a7792"
-+
-+
-+Most Renesas ARM SoCs have a Product Register that allows to retrieve SoC
-+product and revision information.  If present, a device node for this register
-+should be added.
-+
-+Required properties:
-+  - compatible: Must be "renesas,prr".
-+  - reg: Base address and length of the register block.
-+
-+
-+Examples
-+--------
-+
-+	prr: chipid@ff000044 {
-+		compatible = "renesas,prr";
-+		reg = <0 0xff000044 0 4>;
-+	};
diff --git a/patches.renesas/0025-arm64-dts-r8a7796-Add-CAN-external-clock-support.patch b/patches.renesas/0025-arm64-dts-r8a7796-Add-CAN-external-clock-support.patch
deleted file mode 100644
index 6288ff05746178..00000000000000
--- a/patches.renesas/0025-arm64-dts-r8a7796-Add-CAN-external-clock-support.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From ce5dfa7919e6afc48ea6c8fbdd7c461c791d1172 Mon Sep 17 00:00:00 2001
-From: Chris Paterson <chris.paterson2@renesas.com>
-Date: Thu, 24 Nov 2016 16:13:39 +0000
-Subject: [PATCH 025/255] arm64: dts: r8a7796: Add CAN external clock support
-
-Adds external CAN clock node for r8a7796. This clock can be used as
-fCAN clock of CAN and CAN FD controller.
-
-Based on a patch for r8a7795 by Ramesh Shanmugasundaram.
-
-Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8a6de0453954095c269efc5054da53c73bfc8298)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |    7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -68,6 +68,13 @@
- 		clock-frequency = <0>;
- 	};
- 
-+	/* External CAN clock - to be overridden by boards that provide it */
-+	can_clk: can {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		clock-frequency = <0>;
-+	};
-+
- 	/* External SCIF clock - to be overridden by boards that provide it */
- 	scif_clk: scif {
- 		compatible = "fixed-clock";
diff --git a/patches.renesas/0026-arm64-dts-r8a7795-salvator-x-Set-drive-strength-for-.patch b/patches.renesas/0026-arm64-dts-r8a7795-salvator-x-Set-drive-strength-for-.patch
deleted file mode 100644
index cc5e2a552e520a..00000000000000
--- a/patches.renesas/0026-arm64-dts-r8a7795-salvator-x-Set-drive-strength-for-.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 3944e77e8a83676fa61dd8531a7a96dbf83911d2 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Mon, 5 Dec 2016 18:43:10 +0100
-Subject: [PATCH 026/286] arm64: dts: r8a7795: salvator-x: Set drive-strength
- for ravb pins
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The EthernetAVB should not depend on the bootloader to setup correct
-drive-strength values. Values for drive-strength where found by
-examining the registers after the bootloader has configured the
-registers and successfully used the EthernetAVB.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7d73a4da2681dc5d04e8ed9f4aa96c1deed2dbc5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |   18 ++++++++++++++++--
- 1 file changed, 16 insertions(+), 2 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-@@ -247,8 +247,22 @@
- 	};
- 
- 	avb_pins: avb {
--		groups = "avb_mdc";
--		function = "avb";
-+		mux {
-+			groups = "avb_link", "avb_phy_int", "avb_mdc",
-+				 "avb_mii";
-+			function = "avb";
-+		};
-+
-+		pins_mdc {
-+			groups = "avb_mdc";
-+			drive-strength = <24>;
-+		};
-+
-+		pins_mii_tx {
-+			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
-+			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
-+			drive-strength = <12>;
-+		};
- 	};
- 
- 	du_pins: du {
diff --git a/patches.renesas/0026-arm64-dts-r8a7796-Add-CAN-support.patch b/patches.renesas/0026-arm64-dts-r8a7796-Add-CAN-support.patch
deleted file mode 100644
index b2c41e33ea1c18..00000000000000
--- a/patches.renesas/0026-arm64-dts-r8a7796-Add-CAN-support.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From cdd6d58e95966097b125c2a03b1df0b3af733562 Mon Sep 17 00:00:00 2001
-From: Chris Paterson <chris.paterson2@renesas.com>
-Date: Thu, 24 Nov 2016 16:13:40 +0000
-Subject: [PATCH 026/255] arm64: dts: r8a7796: Add CAN support
-
-Adds CAN controller nodes for r8a7796.
-
-Based on a patch for r8a7795 by Ramesh Shanmugasundaram.
-
-Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 909c1625241515aa2a5027a24e17d77b54e8ce4b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   30 ++++++++++++++++++++++++++++++
- 1 file changed, 30 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -366,6 +366,36 @@
- 			status = "disabled";
- 		};
- 
-+		can0: can@e6c30000 {
-+			compatible = "renesas,can-r8a7796",
-+				     "renesas,rcar-gen3-can";
-+			reg = <0 0xe6c30000 0 0x1000>;
-+			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 916>,
-+			       <&cpg CPG_CORE R8A7796_CLK_CANFD>,
-+			       <&can_clk>;
-+			clock-names = "clkp1", "clkp2", "can_clk";
-+			assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
-+			assigned-clock-rates = <40000000>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		can1: can@e6c38000 {
-+			compatible = "renesas,can-r8a7796",
-+				     "renesas,rcar-gen3-can";
-+			reg = <0 0xe6c38000 0 0x1000>;
-+			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 915>,
-+			       <&cpg CPG_CORE R8A7796_CLK_CANFD>,
-+			       <&can_clk>;
-+			clock-names = "clkp1", "clkp2", "can_clk";
-+			assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
-+			assigned-clock-rates = <40000000>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
- 		scif2: serial@e6e88000 {
- 			compatible = "renesas,scif-r8a7796",
- 				     "renesas,rcar-gen3-scif", "renesas,scif";
diff --git a/patches.renesas/0026-soc-renesas-Identify-SoC-and-register-with-the-SoC-b.patch b/patches.renesas/0026-soc-renesas-Identify-SoC-and-register-with-the-SoC-b.patch
deleted file mode 100644
index 631eaa9c61fc5f..00000000000000
--- a/patches.renesas/0026-soc-renesas-Identify-SoC-and-register-with-the-SoC-b.patch
+++ /dev/null
@@ -1,324 +0,0 @@
-From a3ccc440c71bd3f53e70493098ed96475b321165 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 14 Nov 2016 19:37:08 +0100
-Subject: [PATCH 026/299] soc: renesas: Identify SoC and register with the SoC
- bus
-
-Identify the SoC type and revision, and register this information with
-the SoC bus, so it is available under /sys/devices/soc0/, and can be
-checked where needed using soc_device_match().
-
-Identification is done using the Product Register or Common Chip Code
-Register, as declared in DT (PRR only for now), or using a hardcoded
-fallback if missing.
-
-Example:
-
-    Detected Renesas R-Car Gen2 r8a7791 ES1.0
-    ...
-    # cat /sys/devices/soc0/{machine,family,soc_id,revision}
-    Koelsch
-    R-Car Gen2
-    r8a7791
-    ES1.0
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8d6799a9ba23acd675f3243580ee6f1756fb4381)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig    |    1 
- arch/arm64/Kconfig.platforms      |    1 
- drivers/soc/renesas/Makefile      |    2 
- drivers/soc/renesas/renesas-soc.c |  257 ++++++++++++++++++++++++++++++++++++++
- 4 files changed, 261 insertions(+)
- create mode 100644 drivers/soc/renesas/renesas-soc.c
-
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -40,6 +40,7 @@ menuconfig ARCH_RENESAS
- 	select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
- 	select NO_IOPORT_MAP
- 	select PINCTRL
-+	select SOC_BUS
- 	select GPIOLIB
- 	select ZONE_DMA if ARM_LPAE
- 
---- a/arch/arm64/Kconfig.platforms
-+++ b/arch/arm64/Kconfig.platforms
-@@ -145,6 +145,7 @@ config ARCH_RENESAS
- 	select PM
- 	select PM_GENERIC_DOMAINS
- 	select RENESAS_IRQC
-+	select SOC_BUS
- 	help
- 	  This enables support for the ARMv8 based Renesas SoCs.
- 
---- a/drivers/soc/renesas/Makefile
-+++ b/drivers/soc/renesas/Makefile
-@@ -1,3 +1,5 @@
-+obj-$(CONFIG_SOC_BUS)		+= renesas-soc.o
-+
- obj-$(CONFIG_ARCH_R8A7779)	+= rcar-sysc.o r8a7779-sysc.o
- obj-$(CONFIG_ARCH_R8A7790)	+= rcar-sysc.o r8a7790-sysc.o
- obj-$(CONFIG_ARCH_R8A7791)	+= rcar-sysc.o r8a7791-sysc.o
---- /dev/null
-+++ b/drivers/soc/renesas/renesas-soc.c
-@@ -0,0 +1,257 @@
-+/*
-+ * Renesas SoC Identification
-+ *
-+ * Copyright (C) 2014-2016 Glider bvba
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/io.h>
-+#include <linux/of.h>
-+#include <linux/of_address.h>
-+#include <linux/slab.h>
-+#include <linux/string.h>
-+#include <linux/sys_soc.h>
-+
-+
-+struct renesas_family {
-+	const char name[16];
-+	u32 reg;			/* CCCR or PRR, if not in DT */
-+};
-+
-+static const struct renesas_family fam_rcar_gen1 __initconst __maybe_unused = {
-+	.name	= "R-Car Gen1",
-+	.reg	= 0xff000044,		/* PRR (Product Register) */
-+};
-+
-+static const struct renesas_family fam_rcar_gen2 __initconst __maybe_unused = {
-+	.name	= "R-Car Gen2",
-+	.reg	= 0xff000044,		/* PRR (Product Register) */
-+};
-+
-+static const struct renesas_family fam_rcar_gen3 __initconst __maybe_unused = {
-+	.name	= "R-Car Gen3",
-+	.reg	= 0xfff00044,		/* PRR (Product Register) */
-+};
-+
-+static const struct renesas_family fam_rmobile __initconst __maybe_unused = {
-+	.name	= "R-Mobile",
-+	.reg	= 0xe600101c,		/* CCCR (Common Chip Code Register) */
-+};
-+
-+static const struct renesas_family fam_rza __initconst __maybe_unused = {
-+	.name	= "RZ/A",
-+};
-+
-+static const struct renesas_family fam_rzg __initconst __maybe_unused = {
-+	.name	= "RZ/G",
-+	.reg	= 0xff000044,		/* PRR (Product Register) */
-+};
-+
-+static const struct renesas_family fam_shmobile __initconst __maybe_unused = {
-+	.name	= "SH-Mobile",
-+	.reg	= 0xe600101c,		/* CCCR (Common Chip Code Register) */
-+};
-+
-+
-+struct renesas_soc {
-+	const struct renesas_family *family;
-+	u8 id;
-+};
-+
-+static const struct renesas_soc soc_rz_a1h __initconst __maybe_unused = {
-+	.family	= &fam_rza,
-+};
-+
-+static const struct renesas_soc soc_rmobile_ape6 __initconst __maybe_unused = {
-+	.family	= &fam_rmobile,
-+	.id	= 0x3f,
-+};
-+
-+static const struct renesas_soc soc_rmobile_a1 __initconst __maybe_unused = {
-+	.family	= &fam_rmobile,
-+	.id	= 0x40,
-+};
-+
-+static const struct renesas_soc soc_rz_g1m __initconst __maybe_unused = {
-+	.family	= &fam_rzg,
-+	.id	= 0x47,
-+};
-+
-+static const struct renesas_soc soc_rz_g1e __initconst __maybe_unused = {
-+	.family	= &fam_rzg,
-+	.id	= 0x4c,
-+};
-+
-+static const struct renesas_soc soc_rcar_m1a __initconst __maybe_unused = {
-+	.family	= &fam_rcar_gen1,
-+};
-+
-+static const struct renesas_soc soc_rcar_h1 __initconst __maybe_unused = {
-+	.family	= &fam_rcar_gen1,
-+	.id	= 0x3b,
-+};
-+
-+static const struct renesas_soc soc_rcar_h2 __initconst __maybe_unused = {
-+	.family	= &fam_rcar_gen2,
-+	.id	= 0x45,
-+};
-+
-+static const struct renesas_soc soc_rcar_m2_w __initconst __maybe_unused = {
-+	.family	= &fam_rcar_gen2,
-+	.id	= 0x47,
-+};
-+
-+static const struct renesas_soc soc_rcar_v2h __initconst __maybe_unused = {
-+	.family	= &fam_rcar_gen2,
-+	.id	= 0x4a,
-+};
-+
-+static const struct renesas_soc soc_rcar_m2_n __initconst __maybe_unused = {
-+	.family	= &fam_rcar_gen2,
-+	.id	= 0x4b,
-+};
-+
-+static const struct renesas_soc soc_rcar_e2 __initconst __maybe_unused = {
-+	.family	= &fam_rcar_gen2,
-+	.id	= 0x4c,
-+};
-+
-+static const struct renesas_soc soc_rcar_h3 __initconst __maybe_unused = {
-+	.family	= &fam_rcar_gen3,
-+	.id	= 0x4f,
-+};
-+
-+static const struct renesas_soc soc_rcar_m3_w __initconst __maybe_unused = {
-+	.family	= &fam_rcar_gen3,
-+	.id	= 0x52,
-+};
-+
-+static const struct renesas_soc soc_shmobile_ag5 __initconst __maybe_unused = {
-+	.family	= &fam_shmobile,
-+	.id	= 0x37,
-+};
-+
-+
-+static const struct of_device_id renesas_socs[] __initconst = {
-+#ifdef CONFIG_ARCH_R7S72100
-+	{ .compatible = "renesas,r7s72100",	.data = &soc_rz_a1h },
-+#endif
-+#ifdef CONFIG_ARCH_R8A73A4
-+	{ .compatible = "renesas,r8a73a4",	.data = &soc_rmobile_ape6 },
-+#endif
-+#ifdef CONFIG_ARCH_R8A7740
-+	{ .compatible = "renesas,r8a7740",	.data = &soc_rmobile_a1 },
-+#endif
-+#ifdef CONFIG_ARCH_R8A7743
-+	{ .compatible = "renesas,r8a7743",	.data = &soc_rz_g1m },
-+#endif
-+#ifdef CONFIG_ARCH_R8A7745
-+	{ .compatible = "renesas,r8a7745",	.data = &soc_rz_g1e },
-+#endif
-+#ifdef CONFIG_ARCH_R8A7778
-+	{ .compatible = "renesas,r8a7778",	.data = &soc_rcar_m1a },
-+#endif
-+#ifdef CONFIG_ARCH_R8A7779
-+	{ .compatible = "renesas,r8a7779",	.data = &soc_rcar_h1 },
-+#endif
-+#ifdef CONFIG_ARCH_R8A7790
-+	{ .compatible = "renesas,r8a7790",	.data = &soc_rcar_h2 },
-+#endif
-+#ifdef CONFIG_ARCH_R8A7791
-+	{ .compatible = "renesas,r8a7791",	.data = &soc_rcar_m2_w },
-+#endif
-+#ifdef CONFIG_ARCH_R8A7792
-+	{ .compatible = "renesas,r8a7792",	.data = &soc_rcar_v2h },
-+#endif
-+#ifdef CONFIG_ARCH_R8A7793
-+	{ .compatible = "renesas,r8a7793",	.data = &soc_rcar_m2_n },
-+#endif
-+#ifdef CONFIG_ARCH_R8A7794
-+	{ .compatible = "renesas,r8a7794",	.data = &soc_rcar_e2 },
-+#endif
-+#ifdef CONFIG_ARCH_R8A7795
-+	{ .compatible = "renesas,r8a7795",	.data = &soc_rcar_h3 },
-+#endif
-+#ifdef CONFIG_ARCH_R8A7796
-+	{ .compatible = "renesas,r8a7796",	.data = &soc_rcar_m3_w },
-+#endif
-+#ifdef CONFIG_ARCH_SH73A0
-+	{ .compatible = "renesas,sh73a0",	.data = &soc_shmobile_ag5 },
-+#endif
-+	{ /* sentinel */ }
-+};
-+
-+static int __init renesas_soc_init(void)
-+{
-+	struct soc_device_attribute *soc_dev_attr;
-+	const struct renesas_family *family;
-+	const struct of_device_id *match;
-+	const struct renesas_soc *soc;
-+	void __iomem *chipid = NULL;
-+	struct soc_device *soc_dev;
-+	struct device_node *np;
-+	unsigned int product;
-+
-+	match = of_match_node(renesas_socs, of_root);
-+	if (!match)
-+		return -ENODEV;
-+
-+	soc = match->data;
-+	family = soc->family;
-+
-+	/* Try PRR first, then hardcoded fallback */
-+	np = of_find_compatible_node(NULL, NULL, "renesas,prr");
-+	if (np) {
-+		chipid = of_iomap(np, 0);
-+		of_node_put(np);
-+	} else if (soc->id) {
-+		chipid = ioremap(family->reg, 4);
-+	}
-+	if (chipid) {
-+		product = readl(chipid);
-+		iounmap(chipid);
-+		if (soc->id && ((product >> 8) & 0xff) != soc->id) {
-+			pr_warn("SoC mismatch (product = 0x%x)\n", product);
-+			return -ENODEV;
-+		}
-+	}
-+
-+	soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
-+	if (!soc_dev_attr)
-+		return -ENOMEM;
-+
-+	np = of_find_node_by_path("/");
-+	of_property_read_string(np, "model", &soc_dev_attr->machine);
-+	of_node_put(np);
-+
-+	soc_dev_attr->family = kstrdup_const(family->name, GFP_KERNEL);
-+	soc_dev_attr->soc_id = kstrdup_const(strchr(match->compatible, ',') + 1,
-+					     GFP_KERNEL);
-+	if (chipid)
-+		soc_dev_attr->revision = kasprintf(GFP_KERNEL, "ES%u.%u",
-+						   ((product >> 4) & 0x0f) + 1,
-+						   product & 0xf);
-+
-+	pr_info("Detected Renesas %s %s %s\n", soc_dev_attr->family,
-+		soc_dev_attr->soc_id, soc_dev_attr->revision ?: "");
-+
-+	soc_dev = soc_device_register(soc_dev_attr);
-+	if (IS_ERR(soc_dev)) {
-+		kfree(soc_dev_attr->revision);
-+		kfree_const(soc_dev_attr->soc_id);
-+		kfree_const(soc_dev_attr->family);
-+		kfree(soc_dev_attr);
-+		return PTR_ERR(soc_dev);
-+	}
-+
-+	return 0;
-+}
-+core_initcall(renesas_soc_init);
diff --git a/patches.renesas/0027-ARM-shmobile-r8a7743-add-power-domain-index-macros.patch b/patches.renesas/0027-ARM-shmobile-r8a7743-add-power-domain-index-macros.patch
deleted file mode 100644
index 5a2481d2baa9f5..00000000000000
--- a/patches.renesas/0027-ARM-shmobile-r8a7743-add-power-domain-index-macros.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From e09a2335c0c8c8f69aae752ac464ad8802345a51 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Thu, 6 Oct 2016 00:31:30 +0300
-Subject: [PATCH 027/299] ARM: shmobile: r8a7743: add power domain index macros
-
-Add macros usable by the device tree sources to reference R8A7743 SYSC power
-domains by index.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 538321bd97188563d739e28a2f21ad874bd28b2e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/dt-bindings/power/r8a7743-sysc.h |   25 +++++++++++++++++++++++++
- 1 file changed, 25 insertions(+)
- create mode 100644 include/dt-bindings/power/r8a7743-sysc.h
-
---- /dev/null
-+++ b/include/dt-bindings/power/r8a7743-sysc.h
-@@ -0,0 +1,25 @@
-+/*
-+ * Copyright (C) 2016 Cogent Embedded Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef __DT_BINDINGS_POWER_R8A7743_SYSC_H__
-+#define __DT_BINDINGS_POWER_R8A7743_SYSC_H__
-+
-+/*
-+ * These power domain indices match the numbers of the interrupt bits
-+ * representing the power areas in the various Interrupt Registers
-+ * (e.g. SYSCISR, Interrupt Status Register)
-+ */
-+
-+#define R8A7743_PD_CA15_CPU0		 0
-+#define R8A7743_PD_CA15_CPU1		 1
-+#define R8A7743_PD_CA15_SCU		12
-+#define R8A7743_PD_SGX			20
-+
-+/* Always-on power area */
-+#define R8A7743_PD_ALWAYS_ON		32
-+
-+#endif /* __DT_BINDINGS_POWER_R8A7743_SYSC_H__ */
diff --git a/patches.renesas/0027-arm64-dts-r8a7795-Tidyup-Audio-DMAC-channel-for-DVC.patch b/patches.renesas/0027-arm64-dts-r8a7795-Tidyup-Audio-DMAC-channel-for-DVC.patch
deleted file mode 100644
index 15bf0078c4cf0b..00000000000000
--- a/patches.renesas/0027-arm64-dts-r8a7795-Tidyup-Audio-DMAC-channel-for-DVC.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From fdc8214f2dc4348061dca59676daac2aacd67f91 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 7 Mar 2017 05:30:06 +0000
-Subject: [PATCH 027/286] arm64: dts: r8a7795: Tidyup Audio-DMAC channel for
- DVC
-
-Current	Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
-Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
-
-Because of this, current platform board (using SRC/DVC/SSI)
-Playback/Capture both will use same Audio-DMAC0
-(but it depends on audio data path).
-
-First note is that this "rx" and "tx" are from each IP point,
-it doesn't mean Playback/Capture.
-Second note is that Audio DMAC assigned on DT is only for
-Audio-DMAC, Audio-DMAC-peri-peri has no entry.
-
-=> Audio-DMAC
--> Audio-DMAC-peri-peri
--- HW connection
-
-Playback case
-
-	[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
-	      rx ~~~~~~~~~~~~
-Capture
-
-	[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
-	      tx ~~~~~~~~~~~~
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b5a8ffad0eb0c1e5e601253edac163b2da9e855d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -1075,11 +1075,11 @@
- 
- 			rcar_sound,dvc {
- 				dvc0: dvc-0 {
--					dmas = <&audma0 0xbc>;
-+					dmas = <&audma1 0xbc>;
- 					dma-names = "tx";
- 				};
- 				dvc1: dvc-1 {
--					dmas = <&audma0 0xbe>;
-+					dmas = <&audma1 0xbe>;
- 					dma-names = "tx";
- 				};
- 			};
diff --git a/patches.renesas/0027-arm64-dts-r8a7796-Add-CAN-FD-support.patch b/patches.renesas/0027-arm64-dts-r8a7796-Add-CAN-FD-support.patch
deleted file mode 100644
index 7d29db9c6b9904..00000000000000
--- a/patches.renesas/0027-arm64-dts-r8a7796-Add-CAN-FD-support.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From ee2d4217219d57e5c2c91be1d8367bdbdc118aa6 Mon Sep 17 00:00:00 2001
-From: Chris Paterson <chris.paterson2@renesas.com>
-Date: Thu, 24 Nov 2016 16:13:41 +0000
-Subject: [PATCH 027/255] arm64: dts: r8a7796: Add CAN FD support
-
-Adds CAN FD controller node for r8a7796.
-
-Based on a patch for r8a7795 by Ramesh Shanmugasundaram.
-
-Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f4176d7c7c03ed23d8335465f309b44519fb6ad5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   24 ++++++++++++++++++++++++
- 1 file changed, 24 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -396,6 +396,30 @@
- 			status = "disabled";
- 		};
- 
-+		canfd: can@e66c0000 {
-+			compatible = "renesas,r8a7796-canfd",
-+				     "renesas,rcar-gen3-canfd";
-+			reg = <0 0xe66c0000 0 0x8000>;
-+			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
-+				   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 914>,
-+			       <&cpg CPG_CORE R8A7796_CLK_CANFD>,
-+			       <&can_clk>;
-+			clock-names = "fck", "canfd", "can_clk";
-+			assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
-+			assigned-clock-rates = <40000000>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			status = "disabled";
-+
-+			channel0 {
-+				status = "disabled";
-+			};
-+
-+			channel1 {
-+				status = "disabled";
-+			};
-+		};
-+
- 		scif2: serial@e6e88000 {
- 			compatible = "renesas,scif-r8a7796",
- 				     "renesas,rcar-gen3-scif", "renesas,scif";
diff --git a/patches.renesas/0028-arm64-defconfig-enable-MVNETA.patch b/patches.renesas/0028-arm64-defconfig-enable-MVNETA.patch
deleted file mode 100644
index 4d1ce80b87998b..00000000000000
--- a/patches.renesas/0028-arm64-defconfig-enable-MVNETA.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 503707f43c86a3186e4a62229c6e208f8ade7b5c Mon Sep 17 00:00:00 2001
-From: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Date: Mon, 20 Feb 2017 18:27:17 +0100
-Subject: [PATCH 028/286] arm64: defconfig: enable MVNETA
-
-Now that the Armada 37xx SoCs support the mvneta driver, enable it by
-default. It is especially useful when booting on an NFS root.
-
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-(cherry picked from commit d7ec74f412f5e5c6b964a4b635b1e3f1d72a7b34)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/configs/defconfig |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -177,6 +177,7 @@ CONFIG_HNS_ENET=y
- CONFIG_E1000E=y
- CONFIG_IGB=y
- CONFIG_IGBVF=y
-+CONFIG_MVNETA=y
- CONFIG_SKY2=y
- CONFIG_RAVB=y
- CONFIG_SMC91X=y
diff --git a/patches.renesas/0028-arm64-renesas-r8a7796-salvator-x-Add-board-part-numb.patch b/patches.renesas/0028-arm64-renesas-r8a7796-salvator-x-Add-board-part-numb.patch
deleted file mode 100644
index 66175f513c47a2..00000000000000
--- a/patches.renesas/0028-arm64-renesas-r8a7796-salvator-x-Add-board-part-numb.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From ec2147f183a5247f7e767f3921696b3c2fcec25b Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 31 Aug 2016 11:17:34 +0200
-Subject: [PATCH 028/255] arm64: renesas: r8a7796/salvator-x: Add board part
- number to DT bindings
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6be91f865660d56081fe67e969a4adf71c24cada)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/arm/shmobile.txt |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/Documentation/devicetree/bindings/arm/shmobile.txt
-+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
-@@ -75,7 +75,7 @@ Boards:
-     compatible = "renesas,rskrza1", "renesas,r7s72100"
-   - Salvator-X (RTP0RC7795SIPB0010S)
-     compatible = "renesas,salvator-x", "renesas,r8a7795";
--  - Salvator-X
-+  - Salvator-X (RTP0RC7796SIPB0011S)
-     compatible = "renesas,salvator-x", "renesas,r8a7796";
-   - SILK (RTP0RC7794LCB00011S)
-     compatible = "renesas,silk", "renesas,r8a7794"
diff --git a/patches.renesas/0028-soc-renesas-rcar-sysc-add-R8A7743-support.patch b/patches.renesas/0028-soc-renesas-rcar-sysc-add-R8A7743-support.patch
deleted file mode 100644
index 2f259965684b57..00000000000000
--- a/patches.renesas/0028-soc-renesas-rcar-sysc-add-R8A7743-support.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From 301a4451dbe88b9e49f7961cd8e33b8fc84bb7d0 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 5 Oct 2016 14:35:01 -0700
-Subject: [PATCH 028/299] soc: renesas: rcar-sysc: add R8A7743 support
-
-Add support for RZ/G1M (R8A7743) SoC power areas to the R-Car SYSC driver.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 603311ba979fa5bbbf6a8961e5f7a27deafce1b4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/soc/renesas/Makefile
----
- Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt |    7 +-
- drivers/soc/renesas/Makefile                                  |    1 
- drivers/soc/renesas/r8a7743-sysc.c                            |   32 ++++++++++
- drivers/soc/renesas/rcar-sysc.c                               |    3 
- drivers/soc/renesas/rcar-sysc.h                               |    1 
- 5 files changed, 41 insertions(+), 3 deletions(-)
- create mode 100644 drivers/soc/renesas/r8a7743-sysc.c
-
---- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
-+++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
-@@ -1,12 +1,13 @@
--DT bindings for the Renesas R-Car System Controller
-+DT bindings for the Renesas R-Car (RZ/G) System Controller
- 
- == System Controller Node ==
- 
--The R-Car System Controller provides power management for the CPU cores and
--various coprocessors.
-+The R-Car (RZ/G) System Controller provides power management for the CPU cores
-+and various coprocessors.
- 
- Required properties:
-   - compatible: Must contain exactly one of the following:
-+      - "renesas,r8a7743-sysc" (RZ/G1M)
-       - "renesas,r8a7779-sysc" (R-Car H1)
-       - "renesas,r8a7790-sysc" (R-Car H2)
-       - "renesas,r8a7791-sysc" (R-Car M2-W)
---- a/drivers/soc/renesas/Makefile
-+++ b/drivers/soc/renesas/Makefile
-@@ -1,5 +1,6 @@
- obj-$(CONFIG_SOC_BUS)		+= renesas-soc.o
- 
-+obj-$(CONFIG_ARCH_R8A7743)	+= rcar-sysc.o r8a7743-sysc.o
- obj-$(CONFIG_ARCH_R8A7779)	+= rcar-sysc.o r8a7779-sysc.o
- obj-$(CONFIG_ARCH_R8A7790)	+= rcar-sysc.o r8a7790-sysc.o
- obj-$(CONFIG_ARCH_R8A7791)	+= rcar-sysc.o r8a7791-sysc.o
---- /dev/null
-+++ b/drivers/soc/renesas/r8a7743-sysc.c
-@@ -0,0 +1,32 @@
-+/*
-+ * Renesas RZ/G1M System Controller
-+ *
-+ * Copyright (C) 2016 Cogent Embedded Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation; of the License.
-+ */
-+
-+#include <linux/bug.h>
-+#include <linux/kernel.h>
-+
-+#include <dt-bindings/power/r8a7743-sysc.h>
-+
-+#include "rcar-sysc.h"
-+
-+static const struct rcar_sysc_area r8a7743_areas[] __initconst = {
-+	{ "always-on",	    0, 0, R8A7743_PD_ALWAYS_ON,	-1, PD_ALWAYS_ON },
-+	{ "ca15-scu",	0x180, 0, R8A7743_PD_CA15_SCU,	R8A7743_PD_ALWAYS_ON,
-+	  PD_SCU },
-+	{ "ca15-cpu0",	 0x40, 0, R8A7743_PD_CA15_CPU0,	R8A7743_PD_CA15_SCU,
-+	  PD_CPU_NOCR },
-+	{ "ca15-cpu1",	 0x40, 1, R8A7743_PD_CA15_CPU1,	R8A7743_PD_CA15_SCU,
-+	  PD_CPU_NOCR },
-+	{ "sgx",	 0xc0, 0, R8A7743_PD_SGX,	R8A7743_PD_ALWAYS_ON },
-+};
-+
-+const struct rcar_sysc_info r8a7743_sysc_info __initconst = {
-+	.areas = r8a7743_areas,
-+	.num_areas = ARRAY_SIZE(r8a7743_areas),
-+};
---- a/drivers/soc/renesas/rcar-sysc.c
-+++ b/drivers/soc/renesas/rcar-sysc.c
-@@ -275,6 +275,9 @@ finalize:
- }
- 
- static const struct of_device_id rcar_sysc_matches[] = {
-+#ifdef CONFIG_ARCH_R8A7743
-+	{ .compatible = "renesas,r8a7743-sysc", .data = &r8a7743_sysc_info },
-+#endif
- #ifdef CONFIG_ARCH_R8A7779
- 	{ .compatible = "renesas,r8a7779-sysc", .data = &r8a7779_sysc_info },
- #endif
---- a/drivers/soc/renesas/rcar-sysc.h
-+++ b/drivers/soc/renesas/rcar-sysc.h
-@@ -50,6 +50,7 @@ struct rcar_sysc_info {
- 	unsigned int num_areas;
- };
- 
-+extern const struct rcar_sysc_info r8a7743_sysc_info;
- extern const struct rcar_sysc_info r8a7779_sysc_info;
- extern const struct rcar_sysc_info r8a7790_sysc_info;
- extern const struct rcar_sysc_info r8a7791_sysc_info;
diff --git a/patches.renesas/0029-ARM-shmobile-r8a7745-add-power-domain-index-macros.patch b/patches.renesas/0029-ARM-shmobile-r8a7745-add-power-domain-index-macros.patch
deleted file mode 100644
index 307894765879e3..00000000000000
--- a/patches.renesas/0029-ARM-shmobile-r8a7745-add-power-domain-index-macros.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 646b8c422f6c6a8b65082de2eeed4743148cdb3b Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sat, 5 Nov 2016 00:44:43 +0300
-Subject: [PATCH 029/299] ARM: shmobile: r8a7745: add power domain index macros
-
-Add macros usable by the device tree sources to reference R8A7745 SYSC power
-domains by index.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 97ca8402997cd2aa6faaa9cd1e59ec3556d8948c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/dt-bindings/power/r8a7745-sysc.h |   25 +++++++++++++++++++++++++
- 1 file changed, 25 insertions(+)
- create mode 100644 include/dt-bindings/power/r8a7745-sysc.h
-
---- /dev/null
-+++ b/include/dt-bindings/power/r8a7745-sysc.h
-@@ -0,0 +1,25 @@
-+/*
-+ * Copyright (C) 2016 Cogent Embedded Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef __DT_BINDINGS_POWER_R8A7745_SYSC_H__
-+#define __DT_BINDINGS_POWER_R8A7745_SYSC_H__
-+
-+/*
-+ * These power domain indices match the numbers of the interrupt bits
-+ * representing the power areas in the various Interrupt Registers
-+ * (e.g. SYSCISR, Interrupt Status Register)
-+ */
-+
-+#define R8A7745_PD_CA7_CPU0		 5
-+#define R8A7745_PD_CA7_CPU1		 6
-+#define R8A7745_PD_SGX			20
-+#define R8A7745_PD_CA7_SCU		21
-+
-+/* Always-on power area */
-+#define R8A7745_PD_ALWAYS_ON		32
-+
-+#endif /* __DT_BINDINGS_POWER_R8A7745_SYSC_H__ */
diff --git a/patches.renesas/0029-arm64-defconfig-enable-I2C_PXA.patch b/patches.renesas/0029-arm64-defconfig-enable-I2C_PXA.patch
deleted file mode 100644
index 8b39ccbd46c1b6..00000000000000
--- a/patches.renesas/0029-arm64-defconfig-enable-I2C_PXA.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 08cd9ace8bf7bb977f4987efc622cf0e5271662a Mon Sep 17 00:00:00 2001
-From: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Date: Wed, 22 Feb 2017 18:31:46 +0100
-Subject: [PATCH 029/286] arm64: defconfig: enable I2C_PXA
-
-Now that the Armada 37xx SoCs support the i2c pxa driver, enable it by
-default.
-
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-(cherry picked from commit efbd24646abc044f70afc53bd331c7b520f499fd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/configs/defconfig |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -234,6 +234,7 @@ CONFIG_I2C_DESIGNWARE_PLATFORM=y
- CONFIG_I2C_IMX=y
- CONFIG_I2C_MESON=y
- CONFIG_I2C_MV64XXX=y
-+CONFIG_I2C_PXA=y
- CONFIG_I2C_QUP=y
- CONFIG_I2C_SH_MOBILE=y
- CONFIG_I2C_TEGRA=y
diff --git a/patches.renesas/0029-arm64-dts-r8a7795-Use-renesas-rcar-gen3-usb2-phy-fal.patch b/patches.renesas/0029-arm64-dts-r8a7795-Use-renesas-rcar-gen3-usb2-phy-fal.patch
deleted file mode 100644
index 3c1c9e799fa4e9..00000000000000
--- a/patches.renesas/0029-arm64-dts-r8a7795-Use-renesas-rcar-gen3-usb2-phy-fal.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From f058bd77cbb9a082eafee56f45c4e99dd7d2330c Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 1 Dec 2016 15:25:54 +0100
-Subject: [PATCH 029/255] arm64: dts: r8a7795: Use renesas,rcar-gen3-usb2-phy
- fallback binding
-
-A fallback binding for the Renesas R-Car Gen3 for USB2.0 PHY driver was
-added by commit cde7bc367f09 ("phy: rcar-gen3-usb2: add fallback binding").
-This patch makes use of this binding in the DT for the r8a7795 SoC.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 6695092b34a3edd69b617e86bf34236ee8f2dbad)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |    9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -1147,7 +1147,8 @@
- 		};
- 
- 		usb2_phy0: usb-phy@ee080200 {
--			compatible = "renesas,usb2-phy-r8a7795";
-+			compatible = "renesas,usb2-phy-r8a7795",
-+				     "renesas,rcar-gen3-usb2-phy";
- 			reg = <0 0xee080200 0 0x700>;
- 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 703>;
-@@ -1157,7 +1158,8 @@
- 		};
- 
- 		usb2_phy1: usb-phy@ee0a0200 {
--			compatible = "renesas,usb2-phy-r8a7795";
-+			compatible = "renesas,usb2-phy-r8a7795",
-+				     "renesas,rcar-gen3-usb2-phy";
- 			reg = <0 0xee0a0200 0 0x700>;
- 			clocks = <&cpg CPG_MOD 702>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-@@ -1166,7 +1168,8 @@
- 		};
- 
- 		usb2_phy2: usb-phy@ee0c0200 {
--			compatible = "renesas,usb2-phy-r8a7795";
-+			compatible = "renesas,usb2-phy-r8a7795",
-+				     "renesas,rcar-gen3-usb2-phy";
- 			reg = <0 0xee0c0200 0 0x700>;
- 			clocks = <&cpg CPG_MOD 701>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
diff --git a/patches.renesas/0030-arm64-dts-r8a7795-add-sound-CTU-support.patch b/patches.renesas/0030-arm64-dts-r8a7795-add-sound-CTU-support.patch
deleted file mode 100644
index 81449d5856b821..00000000000000
--- a/patches.renesas/0030-arm64-dts-r8a7795-add-sound-CTU-support.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From f2fec975c47503b8f5c4c605d4ffb9b8dc965b3e Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 6 Dec 2016 03:54:21 +0000
-Subject: [PATCH 030/255] arm64: dts: r8a7795: add sound CTU support
-
-This patch adds CTU (= Channel Transfer Unit) support which is needed
-to sound mixing.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c9293d784d32c868e83079bb6d1e26f316c4148d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |    1 +
- arch/arm64/boot/dts/renesas/r8a7795.dtsi           |   13 +++++++++++++
- 2 files changed, 14 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-@@ -412,6 +412,7 @@
- 		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
- 		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
- 		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
-+		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
- 		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
- 		 <&audio_clk_a>, <&cs2000>,
- 		 <&audio_clk_c>,
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -920,6 +920,7 @@
- 				 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
- 				 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
- 				 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
-+				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
- 				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
- 				 <&audio_clk_a>, <&audio_clk_b>,
- 				 <&audio_clk_c>,
-@@ -931,6 +932,7 @@
- 				      "src.9", "src.8", "src.7", "src.6",
- 				      "src.5", "src.4", "src.3", "src.2",
- 				      "src.1", "src.0",
-+				      "ctu.1", "ctu.0",
- 				      "dvc.0", "dvc.1",
- 				      "clk_a", "clk_b", "clk_c", "clk_i";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-@@ -947,6 +949,17 @@
- 				};
- 			};
- 
-+			rcar_sound,ctu {
-+				ctu00: ctu-0 { };
-+				ctu01: ctu-1 { };
-+				ctu02: ctu-2 { };
-+				ctu03: ctu-3 { };
-+				ctu10: ctu-4 { };
-+				ctu11: ctu-5 { };
-+				ctu12: ctu-6 { };
-+				ctu13: ctu-7 { };
-+			};
-+
- 			rcar_sound,src {
- 				src0: src-0 {
- 					interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/patches.renesas/0030-arm64-dts-r8a7796-Add-Cortex-A57-CPU-cores.patch b/patches.renesas/0030-arm64-dts-r8a7796-Add-Cortex-A57-CPU-cores.patch
deleted file mode 100644
index aee2fb7568a696..00000000000000
--- a/patches.renesas/0030-arm64-dts-r8a7796-Add-Cortex-A57-CPU-cores.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 9470e627eeb80471401e1bc308f48b63e2a28346 Mon Sep 17 00:00:00 2001
-From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Date: Tue, 7 Mar 2017 19:03:22 +0100
-Subject: [PATCH 030/286] arm64: dts: r8a7796: Add Cortex-A57 CPU cores
-
-This patch adds Cortex-A57 CPU cores to R8A7796 SoC for a total of
-2 x Cortex-A57.
-
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-[geert: Rebased]
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 7328be4a03b10c19e49a564f4c2e3a9ebcf34ca7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   20 ++++++++++++++------
- 1 file changed, 14 insertions(+), 6 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -37,7 +37,6 @@
- 		#address-cells = <1>;
- 		#size-cells = <0>;
- 
--		/* 1 core only at this point */
- 		a57_0: cpu@0 {
- 			compatible = "arm,cortex-a57", "arm,armv8";
- 			reg = <0x0>;
-@@ -47,6 +46,15 @@
- 			enable-method = "psci";
- 		};
- 
-+		a57_1: cpu@1 {
-+			compatible = "arm,cortex-a57","arm,armv8";
-+			reg = <0x1>;
-+			device_type = "cpu";
-+			power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
-+			next-level-cache = <&L2_CA57>;
-+			enable-method = "psci";
-+		};
-+
- 		L2_CA57: cache-controller-0 {
- 			compatible = "cache";
- 			power-domains = <&sysc R8A7796_PD_CA57_SCU>;
-@@ -100,7 +108,7 @@
- 			      <0x0 0xf1040000 0 0x20000>,
- 			      <0x0 0xf1060000 0 0x20000>;
- 			interrupts = <GIC_PPI 9
--					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
-+					(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
- 			clocks = <&cpg CPG_MOD 408>;
- 			clock-names = "clk";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-@@ -109,13 +117,13 @@
- 		timer {
- 			compatible = "arm,armv8-timer";
- 			interrupts = <GIC_PPI 13
--					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
-+					(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- 				     <GIC_PPI 14
--					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
-+					(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- 				     <GIC_PPI 11
--					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
-+					(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- 				     <GIC_PPI 10
--					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
-+					(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
- 		};
- 
- 		wdt0: watchdog@e6020000 {
diff --git a/patches.renesas/0030-soc-renesas-rcar-sysc-add-R8A7745-support.patch b/patches.renesas/0030-soc-renesas-rcar-sysc-add-R8A7745-support.patch
deleted file mode 100644
index b25b75c062796a..00000000000000
--- a/patches.renesas/0030-soc-renesas-rcar-sysc-add-R8A7745-support.patch
+++ /dev/null
@@ -1,102 +0,0 @@
-From d143434f7cd491e2b330b79d1d997481ce55387a Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sat, 5 Nov 2016 00:46:13 +0300
-Subject: [PATCH 030/299] soc: renesas: rcar-sysc: add R8A7745 support
-
-Add support for RZ/G1E (R8A7745) SoC power areas to the R-Car SYSC driver.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 141723e0cbdc1139410f77d8a572f17ce2de6bf5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt |    1 
- drivers/soc/renesas/Makefile                                  |    1 
- drivers/soc/renesas/r8a7745-sysc.c                            |   32 ++++++++++
- drivers/soc/renesas/rcar-sysc.c                               |    3 
- drivers/soc/renesas/rcar-sysc.h                               |    1 
- 5 files changed, 38 insertions(+)
- create mode 100644 drivers/soc/renesas/r8a7745-sysc.c
-
---- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
-+++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
-@@ -8,6 +8,7 @@ and various coprocessors.
- Required properties:
-   - compatible: Must contain exactly one of the following:
-       - "renesas,r8a7743-sysc" (RZ/G1M)
-+      - "renesas,r8a7745-sysc" (RZ/G1E)
-       - "renesas,r8a7779-sysc" (R-Car H1)
-       - "renesas,r8a7790-sysc" (R-Car H2)
-       - "renesas,r8a7791-sysc" (R-Car M2-W)
---- a/drivers/soc/renesas/Makefile
-+++ b/drivers/soc/renesas/Makefile
-@@ -1,6 +1,7 @@
- obj-$(CONFIG_SOC_BUS)		+= renesas-soc.o
- 
- obj-$(CONFIG_ARCH_R8A7743)	+= rcar-sysc.o r8a7743-sysc.o
-+obj-$(CONFIG_ARCH_R8A7745)	+= rcar-sysc.o r8a7745-sysc.o
- obj-$(CONFIG_ARCH_R8A7779)	+= rcar-sysc.o r8a7779-sysc.o
- obj-$(CONFIG_ARCH_R8A7790)	+= rcar-sysc.o r8a7790-sysc.o
- obj-$(CONFIG_ARCH_R8A7791)	+= rcar-sysc.o r8a7791-sysc.o
---- /dev/null
-+++ b/drivers/soc/renesas/r8a7745-sysc.c
-@@ -0,0 +1,32 @@
-+/*
-+ * Renesas RZ/G1E System Controller
-+ *
-+ * Copyright (C) 2016 Cogent Embedded Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation; of the License.
-+ */
-+
-+#include <linux/bug.h>
-+#include <linux/kernel.h>
-+
-+#include <dt-bindings/power/r8a7745-sysc.h>
-+
-+#include "rcar-sysc.h"
-+
-+static const struct rcar_sysc_area r8a7745_areas[] __initconst = {
-+	{ "always-on",	    0, 0, R8A7745_PD_ALWAYS_ON,	-1, PD_ALWAYS_ON },
-+	{ "ca7-scu",	0x100, 0, R8A7745_PD_CA7_SCU,	R8A7745_PD_ALWAYS_ON,
-+	  PD_SCU },
-+	{ "ca7-cpu0",	0x1c0, 0, R8A7745_PD_CA7_CPU0,	R8A7745_PD_CA7_SCU,
-+	  PD_CPU_NOCR },
-+	{ "ca7-cpu1",	0x1c0, 1, R8A7745_PD_CA7_CPU1,	R8A7745_PD_CA7_SCU,
-+	  PD_CPU_NOCR },
-+	{ "sgx",	 0xc0, 0, R8A7745_PD_SGX,	R8A7745_PD_ALWAYS_ON },
-+};
-+
-+const struct rcar_sysc_info r8a7745_sysc_info __initconst = {
-+	.areas = r8a7745_areas,
-+	.num_areas = ARRAY_SIZE(r8a7745_areas),
-+};
---- a/drivers/soc/renesas/rcar-sysc.c
-+++ b/drivers/soc/renesas/rcar-sysc.c
-@@ -278,6 +278,9 @@ static const struct of_device_id rcar_sy
- #ifdef CONFIG_ARCH_R8A7743
- 	{ .compatible = "renesas,r8a7743-sysc", .data = &r8a7743_sysc_info },
- #endif
-+#ifdef CONFIG_ARCH_R8A7745
-+	{ .compatible = "renesas,r8a7745-sysc", .data = &r8a7745_sysc_info },
-+#endif
- #ifdef CONFIG_ARCH_R8A7779
- 	{ .compatible = "renesas,r8a7779-sysc", .data = &r8a7779_sysc_info },
- #endif
---- a/drivers/soc/renesas/rcar-sysc.h
-+++ b/drivers/soc/renesas/rcar-sysc.h
-@@ -51,6 +51,7 @@ struct rcar_sysc_info {
- };
- 
- extern const struct rcar_sysc_info r8a7743_sysc_info;
-+extern const struct rcar_sysc_info r8a7745_sysc_info;
- extern const struct rcar_sysc_info r8a7779_sysc_info;
- extern const struct rcar_sysc_info r8a7790_sysc_info;
- extern const struct rcar_sysc_info r8a7791_sysc_info;
diff --git a/patches.renesas/0031-PCI-rcar-gen2-Use-gen2-fallback-compatibility-last.patch b/patches.renesas/0031-PCI-rcar-gen2-Use-gen2-fallback-compatibility-last.patch
deleted file mode 100644
index 6dbb722eb192bf..00000000000000
--- a/patches.renesas/0031-PCI-rcar-gen2-Use-gen2-fallback-compatibility-last.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From c2bba7499d4c150c2e0f733fa0721c55e88647c5 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 6 Dec 2016 16:51:29 +0100
-Subject: [PATCH 031/299] PCI: rcar-gen2: Use gen2 fallback compatibility last
-
-Improve readability by listing fallback compatibility strings after the
-more-specific compatibility strings they provide a fallback for.
-
-This does not affect run-time behaviour as it is the order in the DTB that
-determines which compatibility string is used.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-(cherry picked from commit 7b99d94277ba49f401b7a5c1ad8a9084cc6c34a6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pci/host/pci-rcar-gen2.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/pci/host/pci-rcar-gen2.c
-+++ b/drivers/pci/host/pci-rcar-gen2.c
-@@ -430,10 +430,10 @@ static int rcar_pci_probe(struct platfor
- }
- 
- static struct of_device_id rcar_pci_of_match[] = {
--	{ .compatible = "renesas,pci-rcar-gen2", },
- 	{ .compatible = "renesas,pci-r8a7790", },
- 	{ .compatible = "renesas,pci-r8a7791", },
- 	{ .compatible = "renesas,pci-r8a7794", },
-+	{ .compatible = "renesas,pci-rcar-gen2", },
- 	{ },
- };
- 
diff --git a/patches.renesas/0031-arm64-dts-r8a7795-add-sound-MIX-support.patch b/patches.renesas/0031-arm64-dts-r8a7795-add-sound-MIX-support.patch
deleted file mode 100644
index 4c32adddd78bf5..00000000000000
--- a/patches.renesas/0031-arm64-dts-r8a7795-add-sound-MIX-support.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 4631bdf784ac6f168fd150e38a6fb621c218d01d Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 6 Dec 2016 03:54:58 +0000
-Subject: [PATCH 031/255] arm64: dts: r8a7795: add sound MIX support
-
-This patch adds MIX (= Mixer) support.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ad5805f3aa07c6eb6ef2578ee9b5f8ca9b0c28f2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |    1 +
- arch/arm64/boot/dts/renesas/r8a7795.dtsi           |    7 +++++++
- 2 files changed, 8 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-@@ -413,6 +413,7 @@
- 		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
- 		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
- 		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
-+		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
- 		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
- 		 <&audio_clk_a>, <&cs2000>,
- 		 <&audio_clk_c>,
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -921,6 +921,7 @@
- 				 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
- 				 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
- 				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
-+				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
- 				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
- 				 <&audio_clk_a>, <&audio_clk_b>,
- 				 <&audio_clk_c>,
-@@ -932,6 +933,7 @@
- 				      "src.9", "src.8", "src.7", "src.6",
- 				      "src.5", "src.4", "src.3", "src.2",
- 				      "src.1", "src.0",
-+				      "mix.1", "mix.0",
- 				      "ctu.1", "ctu.0",
- 				      "dvc.0", "dvc.1",
- 				      "clk_a", "clk_b", "clk_c", "clk_i";
-@@ -949,6 +951,11 @@
- 				};
- 			};
- 
-+			rcar_sound,mix {
-+				mix0: mix-0 { };
-+				mix1: mix-1 { };
-+			};
-+
- 			rcar_sound,ctu {
- 				ctu00: ctu-0 { };
- 				ctu01: ctu-1 { };
diff --git a/patches.renesas/0031-arm64-dts-r8a7796-Add-Cortex-A57-PMU-node.patch b/patches.renesas/0031-arm64-dts-r8a7796-Add-Cortex-A57-PMU-node.patch
deleted file mode 100644
index db8f4b39de7c92..00000000000000
--- a/patches.renesas/0031-arm64-dts-r8a7796-Add-Cortex-A57-PMU-node.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From c311a85c223388fe5023c62e5af0de510f634a35 Mon Sep 17 00:00:00 2001
-From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Date: Tue, 7 Mar 2017 19:03:23 +0100
-Subject: [PATCH 031/286] arm64: dts: r8a7796: Add Cortex-A57 PMU node
-
-Enable the performance monitor unit for the Cortex-A57 cores on the
-R8A7796 SoC.
-
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9fccf4d6103eeb5db88c1ae026d61b87f722414a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |    8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -252,6 +252,14 @@
- 			reg = <0 0xe6060000 0 0x50c>;
- 		};
- 
-+		pmu_a57 {
-+			compatible = "arm,cortex-a57-pmu";
-+			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-affinity = <&a57_0>,
-+					     <&a57_1>;
-+		};
-+
- 		cpg: clock-controller@e6150000 {
- 			compatible = "renesas,r8a7796-cpg-mssr";
- 			reg = <0 0xe6150000 0 0x1000>;
diff --git a/patches.renesas/0032-PCI-rcar-Use-gen2-fallback-compatibility-last.patch b/patches.renesas/0032-PCI-rcar-Use-gen2-fallback-compatibility-last.patch
deleted file mode 100644
index 9d8feec2addd0a..00000000000000
--- a/patches.renesas/0032-PCI-rcar-Use-gen2-fallback-compatibility-last.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 457e6256de183a1a872221c186752f3cbc04e5bf Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 6 Dec 2016 16:51:30 +0100
-Subject: [PATCH 032/299] PCI: rcar: Use gen2 fallback compatibility last
-
-Improve readability by listing fallback compatibility strings after the
-more-specific compatibility strings they provide a fallback for.
-
-This does not affect run-time behaviour as it is the order in the DTB that
-determines which compatibility string is used.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-(cherry picked from commit d83a328ad185b1e487a82479f840435ae297bee1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pci/host/pcie-rcar.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/pci/host/pcie-rcar.c
-+++ b/drivers/pci/host/pcie-rcar.c
-@@ -1071,12 +1071,12 @@ static int rcar_pcie_parse_map_dma_range
- 
- static const struct of_device_id rcar_pcie_of_match[] = {
- 	{ .compatible = "renesas,pcie-r8a7779", .data = rcar_pcie_hw_init_h1 },
--	{ .compatible = "renesas,pcie-rcar-gen2",
--	  .data = rcar_pcie_hw_init_gen2 },
- 	{ .compatible = "renesas,pcie-r8a7790",
- 	  .data = rcar_pcie_hw_init_gen2 },
- 	{ .compatible = "renesas,pcie-r8a7791",
- 	  .data = rcar_pcie_hw_init_gen2 },
-+	{ .compatible = "renesas,pcie-rcar-gen2",
-+	  .data = rcar_pcie_hw_init_gen2 },
- 	{ .compatible = "renesas,pcie-r8a7795", .data = rcar_pcie_hw_init },
- 	{},
- };
diff --git a/patches.renesas/0032-arm64-dts-r8a7795-Use-Gen-3-fallback-compat-string-f.patch b/patches.renesas/0032-arm64-dts-r8a7795-Use-Gen-3-fallback-compat-string-f.patch
deleted file mode 100644
index a8f0914b97fcd3..00000000000000
--- a/patches.renesas/0032-arm64-dts-r8a7795-Use-Gen-3-fallback-compat-string-f.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 07a84ced16f62560cd753eee675132261eef86c4 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 8 Dec 2016 16:29:29 +0100
-Subject: [PATCH 032/255] arm64: dts: r8a7795: Use Gen 3 fallback compat string
- for PCIE
-
-Use recently added en 3 fallback compat string for PCIE
-in r8a7795 DT.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit fb04f4b8bd7ecf337a8cbebe176e0bbdd954ba31)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |    6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -1280,7 +1280,8 @@
- 		};
- 
- 		pciec0: pcie@fe000000 {
--			compatible = "renesas,pcie-r8a7795";
-+			compatible = "renesas,pcie-r8a7795",
-+				     "renesas,pcie-rcar-gen3";
- 			reg = <0 0xfe000000 0 0x80000>;
- 			#address-cells = <3>;
- 			#size-cells = <2>;
-@@ -1305,7 +1306,8 @@
- 		};
- 
- 		pciec1: pcie@ee800000 {
--			compatible = "renesas,pcie-r8a7795";
-+			compatible = "renesas,pcie-r8a7795",
-+				     "renesas,pcie-rcar-gen3";
- 			reg = <0 0xee800000 0 0x80000>;
- 			#address-cells = <3>;
- 			#size-cells = <2>;
diff --git a/patches.renesas/0032-arm64-dts-r8a7796-Add-CA53-L2-cache-controller-node.patch b/patches.renesas/0032-arm64-dts-r8a7796-Add-CA53-L2-cache-controller-node.patch
deleted file mode 100644
index da2d8bbe3e5bec..00000000000000
--- a/patches.renesas/0032-arm64-dts-r8a7796-Add-CA53-L2-cache-controller-node.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From de17eb0a86edbf87cb7619eebf00f3130b521e9e Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 7 Mar 2017 19:03:24 +0100
-Subject: [PATCH 032/286] arm64: dts: r8a7796: Add CA53 L2 cache-controller
- node
-
-Add a device node for the Cortex-A53 L2 cache-controller.
-
-The L2 cache for the Cortex-A53 CPU cores is 512 KiB large (organized as
-32 KiB x 16 ways).
-
-Extracted from a patch by Takeshi Kihara in the BSP.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a681e6d63285b879bb9bab0bd79e2021e6dcbda1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |    7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -61,6 +61,13 @@
- 			cache-unified;
- 			cache-level = <2>;
- 		};
-+
-+		L2_CA53: cache-controller-1 {
-+			compatible = "cache";
-+			power-domains = <&sysc R8A7796_PD_CA53_SCU>;
-+			cache-unified;
-+			cache-level = <2>;
-+		};
- 	};
- 
- 	extal_clk: extal {
diff --git a/patches.renesas/0033-PCI-rcar-Add-gen3-fallback-compatibility-string-for-.patch b/patches.renesas/0033-PCI-rcar-Add-gen3-fallback-compatibility-string-for-.patch
deleted file mode 100644
index 602ff2ca94b666..00000000000000
--- a/patches.renesas/0033-PCI-rcar-Add-gen3-fallback-compatibility-string-for-.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From b3fdbc9f61d632b1a105a78e360395ec95800703 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 6 Dec 2016 16:51:31 +0100
-Subject: [PATCH 033/299] PCI: rcar: Add gen3 fallback compatibility string for
- pcie-rcar
-
-Add fallback compatibility string for the  R-Car Gen 3 family.  This is in
-keeping with the both the existing fallback compatibility string for the
-R-Car Gen 2 family and the fallback scheme being adopted wherever
-appropriate for drivers for Renesas SoCs.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-(cherry picked from commit 49da21108f773b50b01b9fd0b6ca97b91b6ff216)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/pci/rcar-pci.txt |    1 +
- drivers/pci/host/pcie-rcar.c                       |    1 +
- 2 files changed, 2 insertions(+)
-
---- a/Documentation/devicetree/bindings/pci/rcar-pci.txt
-+++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt
-@@ -7,6 +7,7 @@ compatible: "renesas,pcie-r8a7779" for t
- 	    "renesas,pcie-r8a7793" for the R8A7793 SoC;
- 	    "renesas,pcie-r8a7795" for the R8A7795 SoC;
- 	    "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device.
-+	    "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device.
- 
- 	    When compatible with the generic version, nodes must list the
- 	    SoC-specific version corresponding to the platform first
---- a/drivers/pci/host/pcie-rcar.c
-+++ b/drivers/pci/host/pcie-rcar.c
-@@ -1078,6 +1078,7 @@ static const struct of_device_id rcar_pc
- 	{ .compatible = "renesas,pcie-rcar-gen2",
- 	  .data = rcar_pcie_hw_init_gen2 },
- 	{ .compatible = "renesas,pcie-r8a7795", .data = rcar_pcie_hw_init },
-+	{ .compatible = "renesas,pcie-rcar-gen3", .data = rcar_pcie_hw_init },
- 	{},
- };
- 
diff --git a/patches.renesas/0033-arm64-dts-r8a7795-Use-R-Car-Gen-3-fallback-binding-f.patch b/patches.renesas/0033-arm64-dts-r8a7795-Use-R-Car-Gen-3-fallback-binding-f.patch
deleted file mode 100644
index 0745ac04f9d716..00000000000000
--- a/patches.renesas/0033-arm64-dts-r8a7795-Use-R-Car-Gen-3-fallback-binding-f.patch
+++ /dev/null
@@ -1,93 +0,0 @@
-From 69913ba5781503151b092a8be5f297a9eba1f3f3 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Dec 2016 12:45:54 +0100
-Subject: [PATCH 033/255] arm64: dts: r8a7795: Use R-Car Gen 3 fallback binding
- for i2c nodes
-
-Use recently added R-Car Gen 3 fallback binding for i2c nodes in
-DT for r8a7795 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7795 and the
-fallback binding for R-Car Gen 3.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit d8ebefc9ace7c9810fd433e6ff18559e7c2f228a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |   21 ++++++++++++++-------
- 1 file changed, 14 insertions(+), 7 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -793,7 +793,8 @@
- 		i2c0: i2c@e6500000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
--			compatible = "renesas,i2c-r8a7795";
-+			compatible = "renesas,i2c-r8a7795",
-+				     "renesas,rcar-gen3-i2c";
- 			reg = <0 0xe6500000 0 0x40>;
- 			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 931>;
-@@ -807,7 +808,8 @@
- 		i2c1: i2c@e6508000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
--			compatible = "renesas,i2c-r8a7795";
-+			compatible = "renesas,i2c-r8a7795",
-+				     "renesas,rcar-gen3-i2c";
- 			reg = <0 0xe6508000 0 0x40>;
- 			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 930>;
-@@ -821,7 +823,8 @@
- 		i2c2: i2c@e6510000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
--			compatible = "renesas,i2c-r8a7795";
-+			compatible = "renesas,i2c-r8a7795",
-+				     "renesas,rcar-gen3-i2c";
- 			reg = <0 0xe6510000 0 0x40>;
- 			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 929>;
-@@ -835,7 +838,8 @@
- 		i2c3: i2c@e66d0000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
--			compatible = "renesas,i2c-r8a7795";
-+			compatible = "renesas,i2c-r8a7795",
-+				     "renesas,rcar-gen3-i2c";
- 			reg = <0 0xe66d0000 0 0x40>;
- 			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 928>;
-@@ -849,7 +853,8 @@
- 		i2c4: i2c@e66d8000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
--			compatible = "renesas,i2c-r8a7795";
-+			compatible = "renesas,i2c-r8a7795",
-+				     "renesas,rcar-gen3-i2c";
- 			reg = <0 0xe66d8000 0 0x40>;
- 			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 927>;
-@@ -863,7 +868,8 @@
- 		i2c5: i2c@e66e0000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
--			compatible = "renesas,i2c-r8a7795";
-+			compatible = "renesas,i2c-r8a7795",
-+				     "renesas,rcar-gen3-i2c";
- 			reg = <0 0xe66e0000 0 0x40>;
- 			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 919>;
-@@ -877,7 +883,8 @@
- 		i2c6: i2c@e66e8000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
--			compatible = "renesas,i2c-r8a7795";
-+			compatible = "renesas,i2c-r8a7795",
-+				     "renesas,rcar-gen3-i2c";
- 			reg = <0 0xe66e8000 0 0x40>;
- 			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 918>;
diff --git a/patches.renesas/0033-arm64-dts-r8a7796-Add-Cortex-A53-CPU-cores.patch b/patches.renesas/0033-arm64-dts-r8a7796-Add-Cortex-A53-CPU-cores.patch
deleted file mode 100644
index 61c304d7920097..00000000000000
--- a/patches.renesas/0033-arm64-dts-r8a7796-Add-Cortex-A53-CPU-cores.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 0bc9baf9b589e7ae43480e343841510965b3b831 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 7 Mar 2017 19:03:25 +0100
-Subject: [PATCH 033/286] arm64: dts: r8a7796: Add Cortex-A53 CPU cores
-
-This patch adds Cortex-A53 CPU cores of R8A7796 SoC, and sets a total of
-6 cores (2 x Cortex-A57 + 4 x Cortex-A53).
-
-Based on a patch by Takeshi Kihara in the BSP.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b4dc3b4b1a65fec829ee8704c7647c06a8038108)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   46 +++++++++++++++++++++++++++----
- 1 file changed, 41 insertions(+), 5 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -55,6 +55,42 @@
- 			enable-method = "psci";
- 		};
- 
-+		a53_0: cpu@100 {
-+			compatible = "arm,cortex-a53", "arm,armv8";
-+			reg = <0x100>;
-+			device_type = "cpu";
-+			power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
-+			next-level-cache = <&L2_CA53>;
-+			enable-method = "psci";
-+		};
-+
-+		a53_1: cpu@101 {
-+			compatible = "arm,cortex-a53","arm,armv8";
-+			reg = <0x101>;
-+			device_type = "cpu";
-+			power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
-+			next-level-cache = <&L2_CA53>;
-+			enable-method = "psci";
-+		};
-+
-+		a53_2: cpu@102 {
-+			compatible = "arm,cortex-a53","arm,armv8";
-+			reg = <0x102>;
-+			device_type = "cpu";
-+			power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
-+			next-level-cache = <&L2_CA53>;
-+			enable-method = "psci";
-+		};
-+
-+		a53_3: cpu@103 {
-+			compatible = "arm,cortex-a53","arm,armv8";
-+			reg = <0x103>;
-+			device_type = "cpu";
-+			power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
-+			next-level-cache = <&L2_CA53>;
-+			enable-method = "psci";
-+		};
-+
- 		L2_CA57: cache-controller-0 {
- 			compatible = "cache";
- 			power-domains = <&sysc R8A7796_PD_CA57_SCU>;
-@@ -115,7 +151,7 @@
- 			      <0x0 0xf1040000 0 0x20000>,
- 			      <0x0 0xf1060000 0 0x20000>;
- 			interrupts = <GIC_PPI 9
--					(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
-+					(GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
- 			clocks = <&cpg CPG_MOD 408>;
- 			clock-names = "clk";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-@@ -124,13 +160,13 @@
- 		timer {
- 			compatible = "arm,armv8-timer";
- 			interrupts = <GIC_PPI 13
--					(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
-+					(GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
- 				     <GIC_PPI 14
--					(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
-+					(GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
- 				     <GIC_PPI 11
--					(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
-+					(GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
- 				     <GIC_PPI 10
--					(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
-+					(GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
- 		};
- 
- 		wdt0: watchdog@e6020000 {
diff --git a/patches.renesas/0034-arm64-dts-r8a7796-Add-Cortex-A53-PMU-node.patch b/patches.renesas/0034-arm64-dts-r8a7796-Add-Cortex-A53-PMU-node.patch
deleted file mode 100644
index 68dc85b4b4a83d..00000000000000
--- a/patches.renesas/0034-arm64-dts-r8a7796-Add-Cortex-A53-PMU-node.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 66f6a0203fa7058cc5173f7537c480faad3b4f47 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 7 Mar 2017 19:03:26 +0100
-Subject: [PATCH 034/286] arm64: dts: r8a7796: Add Cortex-A53 PMU node
-
-Enable the performance monitor unit for the Cortex-A53 cores on the
-R8A7796 SoC.
-
-Extracted from a patch by Takeshi Kihara in the BSP.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ccc499330dbcaa8f6065bd1b10a64ca09fa96c3e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -303,6 +303,18 @@
- 					     <&a57_1>;
- 		};
- 
-+		pmu_a53 {
-+			compatible = "arm,cortex-a53-pmu";
-+			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-affinity = <&a53_0>,
-+					     <&a53_1>,
-+					     <&a53_2>,
-+					     <&a53_3>;
-+		};
-+
- 		cpg: clock-controller@e6150000 {
- 			compatible = "renesas,r8a7796-cpg-mssr";
- 			reg = <0 0xe6150000 0 0x1000>;
diff --git a/patches.renesas/0034-arm64-dts-r8a7796-Use-R-Car-Gen-3-fallback-binding-f.patch b/patches.renesas/0034-arm64-dts-r8a7796-Use-R-Car-Gen-3-fallback-binding-f.patch
deleted file mode 100644
index 7e4366fbb7d474..00000000000000
--- a/patches.renesas/0034-arm64-dts-r8a7796-Use-R-Car-Gen-3-fallback-binding-f.patch
+++ /dev/null
@@ -1,93 +0,0 @@
-From 7a3649c6a909b6b59971ac3a8ebc4ff9070ff433 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Dec 2016 12:45:55 +0100
-Subject: [PATCH 034/255] arm64: dts: r8a7796: Use R-Car Gen 3 fallback binding
- for i2c nodes
-
-Use recently added R-Car Gen 3 fallback binding for i2c nodes in
-DT for r8a7796 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7796 and the
-fallback binding for R-Car Gen 3.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 5553e2196229501346f262a9ebdc4e4ed74ff45c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   21 ++++++++++++++-------
- 1 file changed, 14 insertions(+), 7 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -268,7 +268,8 @@
- 		i2c0: i2c@e6500000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
--			compatible = "renesas,i2c-r8a7796";
-+			compatible = "renesas,i2c-r8a7796",
-+				     "renesas,rcar-gen3-i2c";
- 			reg = <0 0xe6500000 0 0x40>;
- 			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 931>;
-@@ -283,7 +284,8 @@
- 		i2c1: i2c@e6508000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
--			compatible = "renesas,i2c-r8a7796";
-+			compatible = "renesas,i2c-r8a7796",
-+				     "renesas,rcar-gen3-i2c";
- 			reg = <0 0xe6508000 0 0x40>;
- 			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 930>;
-@@ -298,7 +300,8 @@
- 		i2c2: i2c@e6510000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
--			compatible = "renesas,i2c-r8a7796";
-+			compatible = "renesas,i2c-r8a7796",
-+				     "renesas,rcar-gen3-i2c";
- 			reg = <0 0xe6510000 0 0x40>;
- 			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 929>;
-@@ -313,7 +316,8 @@
- 		i2c3: i2c@e66d0000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
--			compatible = "renesas,i2c-r8a7796";
-+			compatible = "renesas,i2c-r8a7796",
-+				     "renesas,rcar-gen3-i2c";
- 			reg = <0 0xe66d0000 0 0x40>;
- 			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 928>;
-@@ -327,7 +331,8 @@
- 		i2c4: i2c@e66d8000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
--			compatible = "renesas,i2c-r8a7796";
-+			compatible = "renesas,i2c-r8a7796",
-+				     "renesas,rcar-gen3-i2c";
- 			reg = <0 0xe66d8000 0 0x40>;
- 			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 927>;
-@@ -341,7 +346,8 @@
- 		i2c5: i2c@e66e0000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
--			compatible = "renesas,i2c-r8a7796";
-+			compatible = "renesas,i2c-r8a7796",
-+				     "renesas,rcar-gen3-i2c";
- 			reg = <0 0xe66e0000 0 0x40>;
- 			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 919>;
-@@ -355,7 +361,8 @@
- 		i2c6: i2c@e66e8000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
--			compatible = "renesas,i2c-r8a7796";
-+			compatible = "renesas,i2c-r8a7796",
-+				     "renesas,rcar-gen3-i2c";
- 			reg = <0 0xe66e8000 0 0x40>;
- 			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 918>;
diff --git a/patches.renesas/0034-net-phy-phy-drivers-should-not-set-SUPPORTED_-Asym_-.patch b/patches.renesas/0034-net-phy-phy-drivers-should-not-set-SUPPORTED_-Asym_-.patch
deleted file mode 100644
index cd44c6388b4fe1..00000000000000
--- a/patches.renesas/0034-net-phy-phy-drivers-should-not-set-SUPPORTED_-Asym_-.patch
+++ /dev/null
@@ -1,555 +0,0 @@
-From e9122e0a81541001cc44f17a02bbfb19d8e0ded5 Mon Sep 17 00:00:00 2001
-From: Timur Tabi <timur@codeaurora.org>
-Date: Wed, 7 Dec 2016 13:20:51 -0600
-Subject: [PATCH 034/299] net: phy: phy drivers should not set
- SUPPORTED_[Asym_]Pause
-
-Instead of having individual PHY drivers set the SUPPORTED_Pause and
-SUPPORTED_Asym_Pause flags, phylib itself should set those flags,
-unless there is a hardware erratum or other special case.  During
-autonegotiation, the PHYs will determine whether to enable pause
-frame support.
-
-Pause frames are a feature that is supported by the MAC.  It is the MAC
-that generates the frames and that processes them.  The PHY can only be
-configured to allow them to pass through.
-
-This commit also effectively reverts the recently applied c7a61319
-("net: phy: dp83848: Support ethernet pause frames").
-
-So the new process is:
-
-1) Unless the PHY driver overrides it, phylib sets the SUPPORTED_Pause
-and SUPPORTED_AsymPause bits in phydev->supported.  This indicates that
-the PHY supports pause frames.
-
-2) The MAC driver checks phydev->supported before it calls phy_start().
-If (SUPPORTED_Pause | SUPPORTED_AsymPause) is set, then the MAC driver
-sets those bits in phydev->advertising, if it wants to enable pause
-frame support.
-
-3) When the link state changes, the MAC driver checks phydev->pause and
-phydev->asym_pause,  If the bits are set, then it enables the corresponding
-features in the MAC.  The algorithm is:
-
-	if (phydev->pause)
-		The MAC should be programmed to receive and honor
-                pause frames it receives, i.e. enable receive flow control.
-
-	if (phydev->pause != phydev->asym_pause)
-		The MAC should be programmed to transmit pause
-		frames when needed, i.e. enable transmit flow control.
-
-Signed-off-by: Timur Tabi <timur@codeaurora.org>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 529ed12752635ba8a35dc78ec70ed6f42570b4ca)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/phy/bcm-cygnus.c |    3 +--
- drivers/net/phy/bcm7xxx.c    |    6 ++----
- drivers/net/phy/broadcom.c   |   36 ++++++++++++------------------------
- drivers/net/phy/icplus.c     |    6 ++----
- drivers/net/phy/intel-xway.c |   24 ++++++++----------------
- drivers/net/phy/micrel.c     |   30 ++++++++++++------------------
- drivers/net/phy/microchip.c  |    3 +--
- drivers/net/phy/national.c   |    2 +-
- drivers/net/phy/phy_device.c |   19 +++++++++++++++++++
- drivers/net/phy/smsc.c       |   18 ++++++------------
- 10 files changed, 64 insertions(+), 83 deletions(-)
-
---- a/drivers/net/phy/bcm-cygnus.c
-+++ b/drivers/net/phy/bcm-cygnus.c
-@@ -134,8 +134,7 @@ static struct phy_driver bcm_cygnus_phy_
- 	.phy_id        = PHY_ID_BCM_CYGNUS,
- 	.phy_id_mask   = 0xfffffff0,
- 	.name          = "Broadcom Cygnus PHY",
--	.features      = PHY_GBIT_FEATURES |
--			SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.features      = PHY_GBIT_FEATURES,
- 	.config_init   = bcm_cygnus_config_init,
- 	.config_aneg   = genphy_config_aneg,
- 	.read_status   = genphy_read_status,
---- a/drivers/net/phy/bcm7xxx.c
-+++ b/drivers/net/phy/bcm7xxx.c
-@@ -308,8 +308,7 @@ static int bcm7xxx_suspend(struct phy_de
- 	.phy_id		= (_oui),					\
- 	.phy_id_mask	= 0xfffffff0,					\
- 	.name		= _name,					\
--	.features	= PHY_GBIT_FEATURES |				\
--			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,	\
-+	.features	= PHY_GBIT_FEATURES,				\
- 	.flags		= PHY_IS_INTERNAL,				\
- 	.config_init	= bcm7xxx_28nm_config_init,			\
- 	.config_aneg	= genphy_config_aneg,				\
-@@ -322,8 +321,7 @@ static int bcm7xxx_suspend(struct phy_de
- 	.phy_id         = (_oui),					\
- 	.phy_id_mask    = 0xfffffff0,					\
- 	.name           = _name,					\
--	.features       = PHY_BASIC_FEATURES |				\
--			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,	\
-+	.features       = PHY_BASIC_FEATURES,				\
- 	.flags          = PHY_IS_INTERNAL,				\
- 	.config_init    = bcm7xxx_config_init,				\
- 	.config_aneg    = genphy_config_aneg,				\
---- a/drivers/net/phy/broadcom.c
-+++ b/drivers/net/phy/broadcom.c
-@@ -452,8 +452,7 @@ static struct phy_driver broadcom_driver
- 	.phy_id		= PHY_ID_BCM5411,
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "Broadcom BCM5411",
--	.features	= PHY_GBIT_FEATURES |
--			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.features	= PHY_GBIT_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.config_init	= bcm54xx_config_init,
- 	.config_aneg	= genphy_config_aneg,
-@@ -464,8 +463,7 @@ static struct phy_driver broadcom_driver
- 	.phy_id		= PHY_ID_BCM5421,
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "Broadcom BCM5421",
--	.features	= PHY_GBIT_FEATURES |
--			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.features	= PHY_GBIT_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.config_init	= bcm54xx_config_init,
- 	.config_aneg	= genphy_config_aneg,
-@@ -476,8 +474,7 @@ static struct phy_driver broadcom_driver
- 	.phy_id		= PHY_ID_BCM5461,
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "Broadcom BCM5461",
--	.features	= PHY_GBIT_FEATURES |
--			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.features	= PHY_GBIT_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.config_init	= bcm54xx_config_init,
- 	.config_aneg	= genphy_config_aneg,
-@@ -488,8 +485,7 @@ static struct phy_driver broadcom_driver
- 	.phy_id		= PHY_ID_BCM54616S,
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "Broadcom BCM54616S",
--	.features	= PHY_GBIT_FEATURES |
--			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.features	= PHY_GBIT_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.config_init	= bcm54xx_config_init,
- 	.config_aneg	= genphy_config_aneg,
-@@ -500,8 +496,7 @@ static struct phy_driver broadcom_driver
- 	.phy_id		= PHY_ID_BCM5464,
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "Broadcom BCM5464",
--	.features	= PHY_GBIT_FEATURES |
--			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.features	= PHY_GBIT_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.config_init	= bcm54xx_config_init,
- 	.config_aneg	= genphy_config_aneg,
-@@ -512,8 +507,7 @@ static struct phy_driver broadcom_driver
- 	.phy_id		= PHY_ID_BCM5481,
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "Broadcom BCM5481",
--	.features	= PHY_GBIT_FEATURES |
--			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.features	= PHY_GBIT_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.config_init	= bcm54xx_config_init,
- 	.config_aneg	= bcm5481_config_aneg,
-@@ -524,8 +518,7 @@ static struct phy_driver broadcom_driver
- 	.phy_id		= PHY_ID_BCM5482,
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "Broadcom BCM5482",
--	.features	= PHY_GBIT_FEATURES |
--			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.features	= PHY_GBIT_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.config_init	= bcm5482_config_init,
- 	.config_aneg	= genphy_config_aneg,
-@@ -536,8 +529,7 @@ static struct phy_driver broadcom_driver
- 	.phy_id		= PHY_ID_BCM50610,
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "Broadcom BCM50610",
--	.features	= PHY_GBIT_FEATURES |
--			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.features	= PHY_GBIT_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.config_init	= bcm54xx_config_init,
- 	.config_aneg	= genphy_config_aneg,
-@@ -548,8 +540,7 @@ static struct phy_driver broadcom_driver
- 	.phy_id		= PHY_ID_BCM50610M,
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "Broadcom BCM50610M",
--	.features	= PHY_GBIT_FEATURES |
--			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.features	= PHY_GBIT_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.config_init	= bcm54xx_config_init,
- 	.config_aneg	= genphy_config_aneg,
-@@ -560,8 +551,7 @@ static struct phy_driver broadcom_driver
- 	.phy_id		= PHY_ID_BCM57780,
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "Broadcom BCM57780",
--	.features	= PHY_GBIT_FEATURES |
--			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.features	= PHY_GBIT_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.config_init	= bcm54xx_config_init,
- 	.config_aneg	= genphy_config_aneg,
-@@ -572,8 +562,7 @@ static struct phy_driver broadcom_driver
- 	.phy_id		= PHY_ID_BCMAC131,
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "Broadcom BCMAC131",
--	.features	= PHY_BASIC_FEATURES |
--			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.config_init	= brcm_fet_config_init,
- 	.config_aneg	= genphy_config_aneg,
-@@ -584,8 +573,7 @@ static struct phy_driver broadcom_driver
- 	.phy_id		= PHY_ID_BCM5241,
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "Broadcom BCM5241",
--	.features	= PHY_BASIC_FEATURES |
--			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.config_init	= brcm_fet_config_init,
- 	.config_aneg	= genphy_config_aneg,
---- a/drivers/net/phy/icplus.c
-+++ b/drivers/net/phy/icplus.c
-@@ -225,8 +225,7 @@ static struct phy_driver icplus_driver[]
- 	.phy_id		= 0x02430d90,
- 	.name		= "ICPlus IP1001",
- 	.phy_id_mask	= 0x0ffffff0,
--	.features	= PHY_GBIT_FEATURES | SUPPORTED_Pause |
--			  SUPPORTED_Asym_Pause,
-+	.features	= PHY_GBIT_FEATURES,
- 	.config_init	= &ip1001_config_init,
- 	.config_aneg	= &genphy_config_aneg,
- 	.read_status	= &genphy_read_status,
-@@ -236,8 +235,7 @@ static struct phy_driver icplus_driver[]
- 	.phy_id		= 0x02430c54,
- 	.name		= "ICPlus IP101A/G",
- 	.phy_id_mask	= 0x0ffffff0,
--	.features	= PHY_BASIC_FEATURES | SUPPORTED_Pause |
--			  SUPPORTED_Asym_Pause,
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_INTERRUPT,
- 	.ack_interrupt	= ip101a_g_ack_interrupt,
- 	.config_init	= &ip101a_g_config_init,
---- a/drivers/net/phy/intel-xway.c
-+++ b/drivers/net/phy/intel-xway.c
-@@ -239,8 +239,7 @@ static struct phy_driver xway_gphy[] = {
- 		.phy_id		= PHY_ID_PHY11G_1_3,
- 		.phy_id_mask	= 0xffffffff,
- 		.name		= "Intel XWAY PHY11G (PEF 7071/PEF 7072) v1.3",
--		.features	= (PHY_GBIT_FEATURES | SUPPORTED_Pause |
--				   SUPPORTED_Asym_Pause),
-+		.features	= PHY_GBIT_FEATURES,
- 		.flags		= PHY_HAS_INTERRUPT,
- 		.config_init	= xway_gphy_config_init,
- 		.config_aneg	= xway_gphy14_config_aneg,
-@@ -254,8 +253,7 @@ static struct phy_driver xway_gphy[] = {
- 		.phy_id		= PHY_ID_PHY22F_1_3,
- 		.phy_id_mask	= 0xffffffff,
- 		.name		= "Intel XWAY PHY22F (PEF 7061) v1.3",
--		.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
--				   SUPPORTED_Asym_Pause),
-+		.features	= PHY_BASIC_FEATURES,
- 		.flags		= PHY_HAS_INTERRUPT,
- 		.config_init	= xway_gphy_config_init,
- 		.config_aneg	= xway_gphy14_config_aneg,
-@@ -269,8 +267,7 @@ static struct phy_driver xway_gphy[] = {
- 		.phy_id		= PHY_ID_PHY11G_1_4,
- 		.phy_id_mask	= 0xffffffff,
- 		.name		= "Intel XWAY PHY11G (PEF 7071/PEF 7072) v1.4",
--		.features	= (PHY_GBIT_FEATURES | SUPPORTED_Pause |
--				   SUPPORTED_Asym_Pause),
-+		.features	= PHY_GBIT_FEATURES,
- 		.flags		= PHY_HAS_INTERRUPT,
- 		.config_init	= xway_gphy_config_init,
- 		.config_aneg	= xway_gphy14_config_aneg,
-@@ -284,8 +281,7 @@ static struct phy_driver xway_gphy[] = {
- 		.phy_id		= PHY_ID_PHY22F_1_4,
- 		.phy_id_mask	= 0xffffffff,
- 		.name		= "Intel XWAY PHY22F (PEF 7061) v1.4",
--		.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
--				   SUPPORTED_Asym_Pause),
-+		.features	= PHY_BASIC_FEATURES,
- 		.flags		= PHY_HAS_INTERRUPT,
- 		.config_init	= xway_gphy_config_init,
- 		.config_aneg	= xway_gphy14_config_aneg,
-@@ -299,8 +295,7 @@ static struct phy_driver xway_gphy[] = {
- 		.phy_id		= PHY_ID_PHY11G_1_5,
- 		.phy_id_mask	= 0xffffffff,
- 		.name		= "Intel XWAY PHY11G (PEF 7071/PEF 7072) v1.5 / v1.6",
--		.features	= (PHY_GBIT_FEATURES | SUPPORTED_Pause |
--				   SUPPORTED_Asym_Pause),
-+		.features	= PHY_GBIT_FEATURES,
- 		.flags		= PHY_HAS_INTERRUPT,
- 		.config_init	= xway_gphy_config_init,
- 		.config_aneg	= genphy_config_aneg,
-@@ -314,8 +309,7 @@ static struct phy_driver xway_gphy[] = {
- 		.phy_id		= PHY_ID_PHY22F_1_5,
- 		.phy_id_mask	= 0xffffffff,
- 		.name		= "Intel XWAY PHY22F (PEF 7061) v1.5 / v1.6",
--		.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
--				   SUPPORTED_Asym_Pause),
-+		.features	= PHY_BASIC_FEATURES,
- 		.flags		= PHY_HAS_INTERRUPT,
- 		.config_init	= xway_gphy_config_init,
- 		.config_aneg	= genphy_config_aneg,
-@@ -329,8 +323,7 @@ static struct phy_driver xway_gphy[] = {
- 		.phy_id		= PHY_ID_PHY11G_VR9,
- 		.phy_id_mask	= 0xffffffff,
- 		.name		= "Intel XWAY PHY11G (xRX integrated)",
--		.features	= (PHY_GBIT_FEATURES | SUPPORTED_Pause |
--				   SUPPORTED_Asym_Pause),
-+		.features	= PHY_GBIT_FEATURES,
- 		.flags		= PHY_HAS_INTERRUPT,
- 		.config_init	= xway_gphy_config_init,
- 		.config_aneg	= genphy_config_aneg,
-@@ -344,8 +337,7 @@ static struct phy_driver xway_gphy[] = {
- 		.phy_id		= PHY_ID_PHY22F_VR9,
- 		.phy_id_mask	= 0xffffffff,
- 		.name		= "Intel XWAY PHY22F (xRX integrated)",
--		.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
--				   SUPPORTED_Asym_Pause),
-+		.features	= PHY_BASIC_FEATURES,
- 		.flags		= PHY_HAS_INTERRUPT,
- 		.config_init	= xway_gphy_config_init,
- 		.config_aneg	= genphy_config_aneg,
---- a/drivers/net/phy/micrel.c
-+++ b/drivers/net/phy/micrel.c
-@@ -793,7 +793,7 @@ static struct phy_driver ksphy_driver[]
- 	.phy_id		= PHY_ID_KS8737,
- 	.phy_id_mask	= MICREL_PHY_ID_MASK,
- 	.name		= "Micrel KS8737",
--	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause),
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.driver_data	= &ks8737_type,
- 	.config_init	= kszphy_config_init,
-@@ -807,8 +807,7 @@ static struct phy_driver ksphy_driver[]
- 	.phy_id		= PHY_ID_KSZ8021,
- 	.phy_id_mask	= 0x00ffffff,
- 	.name		= "Micrel KSZ8021 or KSZ8031",
--	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
--			   SUPPORTED_Asym_Pause),
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.driver_data	= &ksz8021_type,
- 	.probe		= kszphy_probe,
-@@ -826,8 +825,7 @@ static struct phy_driver ksphy_driver[]
- 	.phy_id		= PHY_ID_KSZ8031,
- 	.phy_id_mask	= 0x00ffffff,
- 	.name		= "Micrel KSZ8031",
--	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
--			   SUPPORTED_Asym_Pause),
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.driver_data	= &ksz8021_type,
- 	.probe		= kszphy_probe,
-@@ -845,8 +843,7 @@ static struct phy_driver ksphy_driver[]
- 	.phy_id		= PHY_ID_KSZ8041,
- 	.phy_id_mask	= MICREL_PHY_ID_MASK,
- 	.name		= "Micrel KSZ8041",
--	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause
--				| SUPPORTED_Asym_Pause),
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.driver_data	= &ksz8041_type,
- 	.probe		= kszphy_probe,
-@@ -864,8 +861,7 @@ static struct phy_driver ksphy_driver[]
- 	.phy_id		= PHY_ID_KSZ8041RNLI,
- 	.phy_id_mask	= MICREL_PHY_ID_MASK,
- 	.name		= "Micrel KSZ8041RNLI",
--	.features	= PHY_BASIC_FEATURES |
--			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.driver_data	= &ksz8041_type,
- 	.probe		= kszphy_probe,
-@@ -883,8 +879,7 @@ static struct phy_driver ksphy_driver[]
- 	.phy_id		= PHY_ID_KSZ8051,
- 	.phy_id_mask	= MICREL_PHY_ID_MASK,
- 	.name		= "Micrel KSZ8051",
--	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause
--				| SUPPORTED_Asym_Pause),
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.driver_data	= &ksz8051_type,
- 	.probe		= kszphy_probe,
-@@ -902,7 +897,7 @@ static struct phy_driver ksphy_driver[]
- 	.phy_id		= PHY_ID_KSZ8001,
- 	.name		= "Micrel KSZ8001 or KS8721",
- 	.phy_id_mask	= 0x00fffffc,
--	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause),
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.driver_data	= &ksz8041_type,
- 	.probe		= kszphy_probe,
-@@ -920,7 +915,7 @@ static struct phy_driver ksphy_driver[]
- 	.phy_id		= PHY_ID_KSZ8081,
- 	.name		= "Micrel KSZ8081 or KSZ8091",
- 	.phy_id_mask	= MICREL_PHY_ID_MASK,
--	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause),
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.driver_data	= &ksz8081_type,
- 	.probe		= kszphy_probe,
-@@ -938,7 +933,7 @@ static struct phy_driver ksphy_driver[]
- 	.phy_id		= PHY_ID_KSZ8061,
- 	.name		= "Micrel KSZ8061",
- 	.phy_id_mask	= MICREL_PHY_ID_MASK,
--	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause),
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.config_init	= kszphy_config_init,
- 	.config_aneg	= genphy_config_aneg,
-@@ -951,7 +946,7 @@ static struct phy_driver ksphy_driver[]
- 	.phy_id		= PHY_ID_KSZ9021,
- 	.phy_id_mask	= 0x000ffffe,
- 	.name		= "Micrel KSZ9021 Gigabit PHY",
--	.features	= (PHY_GBIT_FEATURES | SUPPORTED_Pause),
-+	.features	= PHY_GBIT_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.driver_data	= &ksz9021_type,
- 	.probe		= kszphy_probe,
-@@ -971,7 +966,7 @@ static struct phy_driver ksphy_driver[]
- 	.phy_id		= PHY_ID_KSZ9031,
- 	.phy_id_mask	= MICREL_PHY_ID_MASK,
- 	.name		= "Micrel KSZ9031 Gigabit PHY",
--	.features	= (PHY_GBIT_FEATURES | SUPPORTED_Pause),
-+	.features	= PHY_GBIT_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.driver_data	= &ksz9021_type,
- 	.probe		= kszphy_probe,
-@@ -989,7 +984,6 @@ static struct phy_driver ksphy_driver[]
- 	.phy_id		= PHY_ID_KSZ8873MLL,
- 	.phy_id_mask	= MICREL_PHY_ID_MASK,
- 	.name		= "Micrel KSZ8873MLL Switch",
--	.features	= (SUPPORTED_Pause | SUPPORTED_Asym_Pause),
- 	.flags		= PHY_HAS_MAGICANEG,
- 	.config_init	= kszphy_config_init,
- 	.config_aneg	= ksz8873mll_config_aneg,
-@@ -1000,7 +994,7 @@ static struct phy_driver ksphy_driver[]
- 	.phy_id		= PHY_ID_KSZ886X,
- 	.phy_id_mask	= MICREL_PHY_ID_MASK,
- 	.name		= "Micrel KSZ886X Switch",
--	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause),
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
- 	.config_init	= kszphy_config_init,
- 	.config_aneg	= genphy_config_aneg,
---- a/drivers/net/phy/microchip.c
-+++ b/drivers/net/phy/microchip.c
-@@ -112,8 +112,7 @@ static struct phy_driver microchip_phy_d
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "Microchip LAN88xx",
- 
--	.features	= (PHY_GBIT_FEATURES |
--			   SUPPORTED_Pause | SUPPORTED_Asym_Pause),
-+	.features	= PHY_GBIT_FEATURES,
- 	.flags		= PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG,
- 
- 	.probe		= lan88xx_probe,
---- a/drivers/net/phy/national.c
-+++ b/drivers/net/phy/national.c
-@@ -133,7 +133,7 @@ static struct phy_driver dp83865_driver[
- 	.phy_id = DP83865_PHY_ID,
- 	.phy_id_mask = 0xfffffff0,
- 	.name = "NatSemi DP83865",
--	.features = PHY_GBIT_FEATURES | SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.features = PHY_GBIT_FEATURES,
- 	.flags = PHY_HAS_INTERRUPT,
- 	.config_init = ns_config_init,
- 	.config_aneg = genphy_config_aneg,
---- a/drivers/net/phy/phy_device.c
-+++ b/drivers/net/phy/phy_device.c
-@@ -1696,6 +1696,25 @@ static int phy_probe(struct device *dev)
- 	 */
- 	of_set_phy_eee_broken(phydev);
- 
-+	/* The Pause Frame bits indicate that the PHY can support passing
-+	 * pause frames. During autonegotiation, the PHYs will determine if
-+	 * they should allow pause frames to pass.  The MAC driver should then
-+	 * use that result to determine whether to enable flow control via
-+	 * pause frames.
-+	 *
-+	 * Normally, PHY drivers should not set the Pause bits, and instead
-+	 * allow phylib to do that.  However, there may be some situations
-+	 * (e.g. hardware erratum) where the driver wants to set only one
-+	 * of these bits.
-+	 */
-+	if (phydrv->features & (SUPPORTED_Pause | SUPPORTED_Asym_Pause)) {
-+		phydev->supported &= ~(SUPPORTED_Pause | SUPPORTED_Asym_Pause);
-+		phydev->supported |= phydrv->features &
-+				     (SUPPORTED_Pause | SUPPORTED_Asym_Pause);
-+	} else {
-+		phydev->supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
-+	}
-+
- 	/* Set the state to READY by default */
- 	phydev->state = PHY_READY;
- 
---- a/drivers/net/phy/smsc.c
-+++ b/drivers/net/phy/smsc.c
-@@ -168,8 +168,7 @@ static struct phy_driver smsc_phy_driver
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "SMSC LAN83C185",
- 
--	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause
--				| SUPPORTED_Asym_Pause),
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG,
- 
- 	.probe		= smsc_phy_probe,
-@@ -191,8 +190,7 @@ static struct phy_driver smsc_phy_driver
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "SMSC LAN8187",
- 
--	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause
--				| SUPPORTED_Asym_Pause),
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG,
- 
- 	.probe		= smsc_phy_probe,
-@@ -214,8 +212,7 @@ static struct phy_driver smsc_phy_driver
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "SMSC LAN8700",
- 
--	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause
--				| SUPPORTED_Asym_Pause),
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG,
- 
- 	.probe		= smsc_phy_probe,
-@@ -237,8 +234,7 @@ static struct phy_driver smsc_phy_driver
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "SMSC LAN911x Internal PHY",
- 
--	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause
--				| SUPPORTED_Asym_Pause),
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG,
- 
- 	.probe		= smsc_phy_probe,
-@@ -259,8 +255,7 @@ static struct phy_driver smsc_phy_driver
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "SMSC LAN8710/LAN8720",
- 
--	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause
--				| SUPPORTED_Asym_Pause),
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG,
- 
- 	.probe		= smsc_phy_probe,
-@@ -282,8 +277,7 @@ static struct phy_driver smsc_phy_driver
- 	.phy_id_mask	= 0xfffffff0,
- 	.name		= "SMSC LAN8740",
- 
--	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause
--				| SUPPORTED_Asym_Pause),
-+	.features	= PHY_BASIC_FEATURES,
- 	.flags		= PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG,
- 
- 	.probe		= smsc_phy_probe,
diff --git a/patches.renesas/0035-arm64-dts-h3ulcb-Drop-superfluous-status-update-for-.patch b/patches.renesas/0035-arm64-dts-h3ulcb-Drop-superfluous-status-update-for-.patch
deleted file mode 100644
index da72a98ab44eed..00000000000000
--- a/patches.renesas/0035-arm64-dts-h3ulcb-Drop-superfluous-status-update-for-.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From de1fdd8c3e0dbc54b50145d304c0e6dd10d7f89a Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:19:13 +0100
-Subject: [PATCH 035/286] arm64: dts: h3ulcb: Drop superfluous status update
- for frequency override
-
-The scif_clk device node is already enabled in r8a7795.dtsi, so there is
-no need to update its status again.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c9060f50d82fc9b548571a9adea9ebff22b3347b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-@@ -228,7 +228,6 @@
- 
- &scif_clk {
- 	clock-frequency = <14745600>;
--	status = "okay";
- };
- 
- &i2c2 {
diff --git a/patches.renesas/0035-arm64-dts-r8a7796-salvator-x-Update-memory-node-to-4.patch b/patches.renesas/0035-arm64-dts-r8a7796-salvator-x-Update-memory-node-to-4.patch
deleted file mode 100644
index 49f572ade75b52..00000000000000
--- a/patches.renesas/0035-arm64-dts-r8a7796-salvator-x-Update-memory-node-to-4.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 61828dfa0f81f537d5ce84b1d6b843c3fa4a89ee Mon Sep 17 00:00:00 2001
-From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Date: Thu, 15 Dec 2016 16:31:29 +0100
-Subject: [PATCH 035/255] arm64: dts: r8a7796: salvator-x: Update memory node
- to 4 GiB map
-
-This patch updates memory region:
-
-  - After changes, the new map of the Salvator-X board on R8A7796 SoC
-    Bank0: 2GiB RAM : 0x000048000000 -> 0x000bfffffff
-    Bank1: 2GiB RAM : 0x000600000000 -> 0x0067fffffff
-
-  - Before changes, the old map looked like this:
-    Bank0: 2GiB RAM : 0x000048000000 -> 0x000bfffffff
-
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-[geert: Correct size of old map]
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit d78fcc47e6814605eb90cd4ab1d79f9609ff32a4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-@@ -31,6 +31,11 @@
- 		reg = <0x0 0x48000000 0x0 0x78000000>;
- 	};
- 
-+	memory@600000000 {
-+		device_type = "memory";
-+		reg = <0x6 0x00000000 0x0 0x80000000>;
-+	};
-+
- 	reg_1p8v: regulator0 {
- 		compatible = "regulator-fixed";
- 		regulator-name = "fixed-1.8V";
diff --git a/patches.renesas/0036-arm64-dts-r8a7795-salvator-x-Drop-superfluous-status.patch b/patches.renesas/0036-arm64-dts-r8a7795-salvator-x-Drop-superfluous-status.patch
deleted file mode 100644
index e6f927ffa04bd5..00000000000000
--- a/patches.renesas/0036-arm64-dts-r8a7795-salvator-x-Drop-superfluous-status.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 0a4d9cec23920958c68ea4fc0ae8bf4ad9afeabc Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:19:14 +0100
-Subject: [PATCH 036/286] arm64: dts: r8a7795: salvator-x: Drop superfluous
- status updates for frequency overrides
-
-The scif_clk and pcie_bus_clk device nodes are already enabled in
-r8a7795.dtsi, so there is no need to update their statuses again.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 971939d1da07c7b55d35aca31288cce297731c71)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |    2 --
- 1 file changed, 2 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-@@ -362,7 +362,6 @@
- 
- &scif_clk {
- 	clock-frequency = <14745600>;
--	status = "okay";
- };
- 
- &i2c2 {
-@@ -574,7 +573,6 @@
- 
- &pcie_bus_clk {
- 	clock-frequency = <100000000>;
--	status = "okay";
- };
- 
- &pciec0 {
diff --git a/patches.renesas/0036-arm64-dts-renesas-r8a7796-Add-EthernetAVB-instance.patch b/patches.renesas/0036-arm64-dts-renesas-r8a7796-Add-EthernetAVB-instance.patch
deleted file mode 100644
index cb54080e06610b..00000000000000
--- a/patches.renesas/0036-arm64-dts-renesas-r8a7796-Add-EthernetAVB-instance.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From d8dde26fe15b3bf7e1b46c30d4e57512c0173846 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 6 Sep 2016 11:25:51 +0300
-Subject: [PATCH 036/255] arm64: dts: renesas: r8a7796: Add EthernetAVB
- instance
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8e8b9eaef8fb05d9707087ea82c1c928317ac9f8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   43 +++++++++++++++++++++++++++++++
- 1 file changed, 43 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -427,6 +427,49 @@
- 			};
- 		};
- 
-+		avb: ethernet@e6800000 {
-+			compatible = "renesas,etheravb-r8a7796",
-+				     "renesas,etheravb-rcar-gen3";
-+			reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
-+			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-names = "ch0", "ch1", "ch2", "ch3",
-+					  "ch4", "ch5", "ch6", "ch7",
-+					  "ch8", "ch9", "ch10", "ch11",
-+					  "ch12", "ch13", "ch14", "ch15",
-+					  "ch16", "ch17", "ch18", "ch19",
-+					  "ch20", "ch21", "ch22", "ch23",
-+					  "ch24";
-+			clocks = <&cpg CPG_MOD 812>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			phy-mode = "rgmii-id";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+		};
-+
- 		scif2: serial@e6e88000 {
- 			compatible = "renesas,scif-r8a7796",
- 				     "renesas,rcar-gen3-scif", "renesas,scif";
diff --git a/patches.renesas/0036-phy-rcar-gen3-usb2-add-sysfs-for-usb-role-swap.patch b/patches.renesas/0036-phy-rcar-gen3-usb2-add-sysfs-for-usb-role-swap.patch
deleted file mode 100644
index 69e2d0751f8053..00000000000000
--- a/patches.renesas/0036-phy-rcar-gen3-usb2-add-sysfs-for-usb-role-swap.patch
+++ /dev/null
@@ -1,214 +0,0 @@
-From 7499be4ae81bffdbfa654e6ec22b812d3ad201a5 Mon Sep 17 00:00:00 2001
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Date: Wed, 9 Nov 2016 11:30:25 +0900
-Subject: [PATCH 036/299] phy: rcar-gen3-usb2: add sysfs for usb role swap
-
-This patch adds sysfs "role" for usb role swap. This parameter can be
-read and write. If you use this file as the following, you can swap
-the usb role.
-
-For example:
- 1) Connect a usb cable using 2 Salvator-x boards
- 2) On A-Device (ID pin is low), you input the following command:
-   # echo peripheral > /sys/devices/platform/soc/ee080200.usb-phy/role
- 3) On B-Device (ID pin is high), you input the following command:
-   # echo host > /sys/devices/platform/soc/ee080200.usb-phy/role
-
-Then, the A-device acts as a peripheral and the B-device acts as a host.
-Please note that A-Device must input the following command if you
-want the board to act as a host again. (even if you disconnect the usb
-cable, since id state may be the same, the A-Device keeps to act as
-peripheral.)
- # echo host > /sys/devices/platform/soc/ee080200.usb-phy/role
-
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Reviewed-by: Peter Chen <peter.chen@nxp.com>
-Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
-(cherry picked from commit 9bb86777fb71eeb7cec0c906b6a4d3432c683507)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/ABI/testing/sysfs-platform-phy-rcar-gen3-usb2 |   15 +
- drivers/phy/phy-rcar-gen3-usb2.c                            |  118 +++++++++++-
- 2 files changed, 132 insertions(+), 1 deletion(-)
- create mode 100644 Documentation/ABI/testing/sysfs-platform-phy-rcar-gen3-usb2
-
---- /dev/null
-+++ b/Documentation/ABI/testing/sysfs-platform-phy-rcar-gen3-usb2
-@@ -0,0 +1,15 @@
-+What:		/sys/devices/platform/<phy-name>/role
-+Date:		October 2016
-+KernelVersion:	4.10
-+Contact:	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-+Description:
-+		This file can be read and write.
-+		The file can show/change the phy mode for role swap of usb.
-+
-+		Write the following strings to change the mode:
-+		 "host" - switching mode from peripheral to host.
-+		 "peripheral" - switching mode from host to peripheral.
-+
-+		Read the file, then it shows the following strings:
-+		 "host" - The mode is host now.
-+		 "peripheral" - The mode is peripheral now.
---- a/drivers/phy/phy-rcar-gen3-usb2.c
-+++ b/drivers/phy/phy-rcar-gen3-usb2.c
-@@ -70,6 +70,7 @@
- #define USB2_LINECTRL1_DP_RPD		BIT(18)
- #define USB2_LINECTRL1_DMRPD_EN		BIT(17)
- #define USB2_LINECTRL1_DM_RPD		BIT(16)
-+#define USB2_LINECTRL1_OPMODE_NODRV	BIT(6)
- 
- /* ADPCTRL */
- #define USB2_ADPCTRL_OTGSESSVLD		BIT(20)
-@@ -161,6 +162,43 @@ static void rcar_gen3_init_for_peri(stru
- 	schedule_work(&ch->work);
- }
- 
-+static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
-+{
-+	void __iomem *usb2_base = ch->base;
-+	u32 val;
-+
-+	val = readl(usb2_base + USB2_LINECTRL1);
-+	writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
-+
-+	rcar_gen3_set_linectrl(ch, 1, 1);
-+	rcar_gen3_set_host_mode(ch, 1);
-+	rcar_gen3_enable_vbus_ctrl(ch, 0);
-+
-+	val = readl(usb2_base + USB2_LINECTRL1);
-+	writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
-+}
-+
-+static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
-+{
-+	rcar_gen3_set_linectrl(ch, 0, 1);
-+	rcar_gen3_set_host_mode(ch, 0);
-+	rcar_gen3_enable_vbus_ctrl(ch, 1);
-+}
-+
-+static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
-+{
-+	void __iomem *usb2_base = ch->base;
-+	u32 val;
-+
-+	val = readl(usb2_base + USB2_OBINTEN);
-+	writel(val & ~USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
-+
-+	rcar_gen3_enable_vbus_ctrl(ch, 0);
-+	rcar_gen3_init_for_host(ch);
-+
-+	writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
-+}
-+
- static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
- {
- 	return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
-@@ -174,6 +212,65 @@ static void rcar_gen3_device_recognition
- 		rcar_gen3_init_for_peri(ch);
- }
- 
-+static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
-+{
-+	return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
-+}
-+
-+static ssize_t role_store(struct device *dev, struct device_attribute *attr,
-+			  const char *buf, size_t count)
-+{
-+	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
-+	bool is_b_device, is_host, new_mode_is_host;
-+
-+	if (!ch->has_otg || !ch->phy->init_count)
-+		return -EIO;
-+
-+	/*
-+	 * is_b_device: true is B-Device. false is A-Device.
-+	 * If {new_mode_}is_host: true is Host mode. false is Peripheral mode.
-+	 */
-+	is_b_device = rcar_gen3_check_id(ch);
-+	is_host = rcar_gen3_is_host(ch);
-+	if (!strncmp(buf, "host", strlen("host")))
-+		new_mode_is_host = true;
-+	else if (!strncmp(buf, "peripheral", strlen("peripheral")))
-+		new_mode_is_host = false;
-+	else
-+		return -EINVAL;
-+
-+	/* If current and new mode is the same, this returns the error */
-+	if (is_host == new_mode_is_host)
-+		return -EINVAL;
-+
-+	if (new_mode_is_host) {		/* And is_host must be false */
-+		if (!is_b_device)	/* A-Peripheral */
-+			rcar_gen3_init_from_a_peri_to_a_host(ch);
-+		else			/* B-Peripheral */
-+			rcar_gen3_init_for_b_host(ch);
-+	} else {			/* And is_host must be true */
-+		if (!is_b_device)	/* A-Host */
-+			rcar_gen3_init_for_a_peri(ch);
-+		else			/* B-Host */
-+			rcar_gen3_init_for_peri(ch);
-+	}
-+
-+	return count;
-+}
-+
-+static ssize_t role_show(struct device *dev, struct device_attribute *attr,
-+			 char *buf)
-+{
-+	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
-+
-+	if (!ch->has_otg || !ch->phy->init_count)
-+		return -EIO;
-+
-+	return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
-+							    "peripheral");
-+}
-+static DEVICE_ATTR_RW(role);
-+
- static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
- {
- 	void __iomem *usb2_base = ch->base;
-@@ -351,21 +448,40 @@ static int rcar_gen3_phy_usb2_probe(stru
- 		channel->vbus = NULL;
- 	}
- 
-+	platform_set_drvdata(pdev, channel);
- 	phy_set_drvdata(channel->phy, channel);
- 
- 	provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
--	if (IS_ERR(provider))
-+	if (IS_ERR(provider)) {
- 		dev_err(dev, "Failed to register PHY provider\n");
-+	} else if (channel->has_otg) {
-+		int ret;
-+
-+		ret = device_create_file(dev, &dev_attr_role);
-+		if (ret < 0)
-+			return ret;
-+	}
- 
- 	return PTR_ERR_OR_ZERO(provider);
- }
- 
-+static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
-+{
-+	struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
-+
-+	if (channel->has_otg)
-+		device_remove_file(&pdev->dev, &dev_attr_role);
-+
-+	return 0;
-+};
-+
- static struct platform_driver rcar_gen3_phy_usb2_driver = {
- 	.driver = {
- 		.name		= "phy_rcar_gen3_usb2",
- 		.of_match_table	= rcar_gen3_phy_usb2_match_table,
- 	},
- 	.probe	= rcar_gen3_phy_usb2_probe,
-+	.remove = rcar_gen3_phy_usb2_remove,
- };
- module_platform_driver(rcar_gen3_phy_usb2_driver);
- 
diff --git a/patches.renesas/0037-arm64-dts-m3ulcb-Drop-superfluous-status-update-for-.patch b/patches.renesas/0037-arm64-dts-m3ulcb-Drop-superfluous-status-update-for-.patch
deleted file mode 100644
index 3eb0876ef24872..00000000000000
--- a/patches.renesas/0037-arm64-dts-m3ulcb-Drop-superfluous-status-update-for-.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From e4c771ac474bb616e317cca2b98e26dee8a462cb Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:19:15 +0100
-Subject: [PATCH 037/286] arm64: dts: m3ulcb: Drop superfluous status update
- for frequency override
-
-The scif_clk device node is already enabled in r8a7796.dtsi, so there is
-no need to update its status again.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cb4de4ece41a55ba125e6e8d1fa727457132dc41)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-@@ -180,7 +180,6 @@
- 
- &scif_clk {
- 	clock-frequency = <14745600>;
--	status = "okay";
- };
- 
- &wdt0 {
diff --git a/patches.renesas/0037-arm64-dts-r8a7796-salvator-x-Enable-EthernetAVB.patch b/patches.renesas/0037-arm64-dts-r8a7796-salvator-x-Enable-EthernetAVB.patch
deleted file mode 100644
index 369765db489428..00000000000000
--- a/patches.renesas/0037-arm64-dts-r8a7796-salvator-x-Enable-EthernetAVB.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From d9bd12de0413f118f0711966a07a28dc210ccbb9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 15 Dec 2016 17:24:04 +0100
-Subject: [PATCH 037/255] arm64: dts: r8a7796: salvator-x: Enable EthernetAVB
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-[geert: Add pinctrl]
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit dc36965a890515753671628cdf25365ee45e6206)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts |   32 +++++++++++++++++++++
- 1 file changed, 32 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-@@ -18,6 +18,7 @@
- 
- 	aliases {
- 		serial0 = &scif2;
-+		ethernet0 = &avb;
- 	};
- 
- 	chosen {
-@@ -107,6 +108,11 @@
- 	pinctrl-0 = <&scif_clk_pins>;
- 	pinctrl-names = "default";
- 
-+	avb_pins: avb {
-+		groups = "avb_mdc";
-+		function = "avb";
-+	};
-+
- 	scif2_pins: scif2 {
- 		groups = "scif2_data_a";
- 		function = "scif2";
-@@ -158,6 +164,32 @@
- 	};
- };
- 
-+&avb {
-+	pinctrl-0 = <&avb_pins>;
-+	pinctrl-names = "default";
-+	renesas,no-ether-link;
-+	phy-handle = <&phy0>;
-+	status = "okay";
-+
-+	phy0: ethernet-phy@0 {
-+		rxc-skew-ps = <900>;
-+		rxdv-skew-ps = <0>;
-+		rxd0-skew-ps = <0>;
-+		rxd1-skew-ps = <0>;
-+		rxd2-skew-ps = <0>;
-+		rxd3-skew-ps = <0>;
-+		txc-skew-ps = <900>;
-+		txen-skew-ps = <0>;
-+		txd0-skew-ps = <0>;
-+		txd1-skew-ps = <0>;
-+		txd2-skew-ps = <0>;
-+		txd3-skew-ps = <0>;
-+		reg = <0>;
-+		interrupt-parent = <&gpio2>;
-+		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
-+	};
-+};
-+
- &extal_clk {
- 	clock-frequency = <16666666>;
- };
diff --git a/patches.renesas/0037-can-rcar_can-Add-r8a7796-support.patch b/patches.renesas/0037-can-rcar_can-Add-r8a7796-support.patch
deleted file mode 100644
index eb7cc1d8c77e14..00000000000000
--- a/patches.renesas/0037-can-rcar_can-Add-r8a7796-support.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From a7a48e31c9e4b81480567815edac83c56f631fbd Mon Sep 17 00:00:00 2001
-From: Chris Paterson <chris.paterson2@renesas.com>
-Date: Thu, 24 Nov 2016 16:11:56 +0000
-Subject: [PATCH 037/299] can: rcar_can: Add r8a7796 support
-
-Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
-(cherry picked from commit 2f500e39ca96e3d2da911b79c9b63eb6134548de)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/net/can/rcar_can.txt |   12 +++++++-----
- 1 file changed, 7 insertions(+), 5 deletions(-)
-
---- a/Documentation/devicetree/bindings/net/can/rcar_can.txt
-+++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt
-@@ -10,6 +10,7 @@ Required properties:
- 	      "renesas,can-r8a7793" if CAN controller is a part of R8A7793 SoC.
- 	      "renesas,can-r8a7794" if CAN controller is a part of R8A7794 SoC.
- 	      "renesas,can-r8a7795" if CAN controller is a part of R8A7795 SoC.
-+	      "renesas,can-r8a7796" if CAN controller is a part of R8A7796 SoC.
- 	      "renesas,rcar-gen1-can" for a generic R-Car Gen1 compatible device.
- 	      "renesas,rcar-gen2-can" for a generic R-Car Gen2 compatible device.
- 	      "renesas,rcar-gen3-can" for a generic R-Car Gen3 compatible device.
-@@ -24,11 +25,12 @@ Required properties:
- - pinctrl-0: pin control group to be used for this controller.
- - pinctrl-names: must be "default".
- 
--Required properties for "renesas,can-r8a7795" compatible:
--In R8A7795 SoC, "clkp2" can be CANFD clock. This is a div6 clock and can be
--used by both CAN and CAN FD controller at the same time. It needs to be scaled
--to maximum frequency if any of these controllers use it. This is done using
--the below properties.
-+Required properties for "renesas,can-r8a7795" and "renesas,can-r8a7796"
-+compatible:
-+In R8A7795 and R8A7796 SoCs, "clkp2" can be CANFD clock. This is a div6 clock
-+and can be used by both CAN and CAN FD controller at the same time. It needs to
-+be scaled to maximum frequency if any of these controllers use it. This is done
-+using the below properties:
- 
- - assigned-clocks: phandle of clkp2(CANFD) clock.
- - assigned-clock-rates: maximum frequency of this clock.
diff --git a/patches.renesas/0038-arm64-dts-r8a7796-Use-R-Car-Gen-3-fallback-binding-f.patch b/patches.renesas/0038-arm64-dts-r8a7796-Use-R-Car-Gen-3-fallback-binding-f.patch
deleted file mode 100644
index 9aaa951c7322b0..00000000000000
--- a/patches.renesas/0038-arm64-dts-r8a7796-Use-R-Car-Gen-3-fallback-binding-f.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 8ce1bc2358d2cfb975e4a32ef1d057ee70630cf5 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 20 Dec 2016 11:32:36 +0100
-Subject: [PATCH 038/255] arm64: dts: r8a7796: Use R-Car Gen 3 fallback binding
- for msiof nodes
-
-Use recently added R-Car Gen 3 fallback binding for msiof nodes in
-DT for r8a7796 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7796 and the
-fallback binding for R-Car Gen 3.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 8b51f97138ca22b6ae728a434215a05b7e5bbc63)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   12 ++++++++----
- 1 file changed, 8 insertions(+), 4 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -484,7 +484,8 @@
- 		};
- 
- 		msiof0: spi@e6e90000 {
--			compatible = "renesas,msiof-r8a7796";
-+			compatible = "renesas,msiof-r8a7796",
-+				     "renesas,rcar-gen3-msiof";
- 			reg = <0 0xe6e90000 0 0x0064>;
- 			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 211>;
-@@ -498,7 +499,8 @@
- 		};
- 
- 		msiof1: spi@e6ea0000 {
--			compatible = "renesas,msiof-r8a7796";
-+			compatible = "renesas,msiof-r8a7796",
-+				     "renesas,rcar-gen3-msiof";
- 			reg = <0 0xe6ea0000 0 0x0064>;
- 			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 210>;
-@@ -512,7 +514,8 @@
- 		};
- 
- 		msiof2: spi@e6c00000 {
--			compatible = "renesas,msiof-r8a7796";
-+			compatible = "renesas,msiof-r8a7796",
-+				     "renesas,rcar-gen3-msiof";
- 			reg = <0 0xe6c00000 0 0x0064>;
- 			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 209>;
-@@ -525,7 +528,8 @@
- 		};
- 
- 		msiof3: spi@e6c10000 {
--			compatible = "renesas,msiof-r8a7796";
-+			compatible = "renesas,msiof-r8a7796",
-+				     "renesas,rcar-gen3-msiof";
- 			reg = <0 0xe6c10000 0 0x0064>;
- 			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 208>;
diff --git a/patches.renesas/0038-arm64-dts-r8a7796-salvator-x-Drop-superfluous-status.patch b/patches.renesas/0038-arm64-dts-r8a7796-salvator-x-Drop-superfluous-status.patch
deleted file mode 100644
index f24170512f1b6f..00000000000000
--- a/patches.renesas/0038-arm64-dts-r8a7796-salvator-x-Drop-superfluous-status.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From a09d775200ea3331a17bb0d38ea1a233a45659b4 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:19:16 +0100
-Subject: [PATCH 038/286] arm64: dts: r8a7796: salvator-x: Drop superfluous
- status update for frequency override
-
-The scif_clk device node is already enabled in r8a7796.dtsi, so there is
-no need to update its status again.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3cbe33367d4fd480a92fbc131a96fa925be9e95d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-@@ -250,7 +250,6 @@
- 
- &scif_clk {
- 	clock-frequency = <14745600>;
--	status = "okay";
- };
- 
- &i2c2 {
diff --git a/patches.renesas/0038-can-rcar_canfd-Add-r8a7796-support.patch b/patches.renesas/0038-can-rcar_canfd-Add-r8a7796-support.patch
deleted file mode 100644
index 1daca3761d6972..00000000000000
--- a/patches.renesas/0038-can-rcar_canfd-Add-r8a7796-support.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 173f9faa72078b16f0db3040cd482ba73329ffa1 Mon Sep 17 00:00:00 2001
-From: Chris Paterson <chris.paterson2@renesas.com>
-Date: Thu, 24 Nov 2016 16:11:57 +0000
-Subject: [PATCH 038/299] can: rcar_canfd: Add r8a7796 support
-
-Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
-(cherry picked from commit b4e79e46936f713ca59120c68977e06be325d11c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/net/can/rcar_canfd.txt |   12 +++++++-----
- 1 file changed, 7 insertions(+), 5 deletions(-)
-
---- a/Documentation/devicetree/bindings/net/can/rcar_canfd.txt
-+++ b/Documentation/devicetree/bindings/net/can/rcar_canfd.txt
-@@ -5,6 +5,7 @@ Required properties:
- - compatible: Must contain one or more of the following:
-   - "renesas,rcar-gen3-canfd" for R-Car Gen3 compatible controller.
-   - "renesas,r8a7795-canfd" for R8A7795 (R-Car H3) compatible controller.
-+  - "renesas,r8a7796-canfd" for R8A7796 (R-Car M3) compatible controller.
- 
-   When compatible with the generic version, nodes must list the
-   SoC-specific version corresponding to the platform first, followed by the
-@@ -23,11 +24,12 @@ The name of the child nodes are "channel
- child node supports the "status" property only, which is used to
- enable/disable the respective channel.
- 
--Required properties for "renesas,r8a7795-canfd" compatible:
--In R8A7795 SoC, canfd clock is a div6 clock and can be used by both CAN
--and CAN FD controller at the same time. It needs to be scaled to maximum
--frequency if any of these controllers use it. This is done using the
--below properties.
-+Required properties for "renesas,r8a7795-canfd" and "renesas,r8a7796-canfd"
-+compatible:
-+In R8A7795 and R8A7796 SoCs, canfd clock is a div6 clock and can be used by both
-+CAN and CAN FD controller at the same time. It needs to be scaled to maximum
-+frequency if any of these controllers use it. This is done using the below
-+properties:
- 
- - assigned-clocks: phandle of canfd clock.
- - assigned-clock-rates: maximum frequency of this clock.
diff --git a/patches.renesas/0039-arm64-dts-r8a7795-Add-PWM-support.patch b/patches.renesas/0039-arm64-dts-r8a7795-Add-PWM-support.patch
deleted file mode 100644
index eed758ccd142b7..00000000000000
--- a/patches.renesas/0039-arm64-dts-r8a7795-Add-PWM-support.patch
+++ /dev/null
@@ -1,89 +0,0 @@
-From 3d165529b731fd8584981792cdd50fea0a95b776 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 19 Nov 2016 05:28:07 +0200
-Subject: [PATCH 039/255] arm64: dts: r8a7795: Add PWM support
-
-Add the 7 PWM channels to the r8a7795 device tree, in the disabled
-state.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b2b9443beee5017ebdb3f2be9ef472c73d260481)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |   63 +++++++++++++++++++++++++++++++
- 1 file changed, 63 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -895,6 +895,69 @@
- 			status = "disabled";
- 		};
- 
-+		pwm0: pwm@e6e30000 {
-+			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
-+			reg = <0 0xe6e30000 0 0x8>;
-+			clocks = <&cpg CPG_MOD 523>;
-+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			#pwm-cells = <2>;
-+			status = "disabled";
-+		};
-+
-+		pwm1: pwm@e6e31000 {
-+			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
-+			reg = <0 0xe6e31000 0 0x8>;
-+			clocks = <&cpg CPG_MOD 523>;
-+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			#pwm-cells = <2>;
-+			status = "disabled";
-+		};
-+
-+		pwm2: pwm@e6e32000 {
-+			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
-+			reg = <0 0xe6e32000 0 0x8>;
-+			clocks = <&cpg CPG_MOD 523>;
-+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			#pwm-cells = <2>;
-+			status = "disabled";
-+		};
-+
-+		pwm3: pwm@e6e33000 {
-+			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
-+			reg = <0 0xe6e33000 0 0x8>;
-+			clocks = <&cpg CPG_MOD 523>;
-+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			#pwm-cells = <2>;
-+			status = "disabled";
-+		};
-+
-+		pwm4: pwm@e6e34000 {
-+			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
-+			reg = <0 0xe6e34000 0 0x8>;
-+			clocks = <&cpg CPG_MOD 523>;
-+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			#pwm-cells = <2>;
-+			status = "disabled";
-+		};
-+
-+		pwm5: pwm@e6e35000 {
-+			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
-+			reg = <0 0xe6e35000 0 0x8>;
-+			clocks = <&cpg CPG_MOD 523>;
-+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			#pwm-cells = <2>;
-+			status = "disabled";
-+		};
-+
-+		pwm6: pwm@e6e36000 {
-+			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
-+			reg = <0 0xe6e36000 0 0x8>;
-+			clocks = <&cpg CPG_MOD 523>;
-+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			#pwm-cells = <2>;
-+			status = "disabled";
-+		};
-+
- 		rcar_sound: sound@ec500000 {
- 			/*
- 			 * #sound-dai-cells is required
diff --git a/patches.renesas/0039-arm64-set-CONFIG_MMC_BCM2835-y-in-defconfig.patch b/patches.renesas/0039-arm64-set-CONFIG_MMC_BCM2835-y-in-defconfig.patch
deleted file mode 100644
index e65952e37ee292..00000000000000
--- a/patches.renesas/0039-arm64-set-CONFIG_MMC_BCM2835-y-in-defconfig.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 61bab7f0b6352029b38afa972a373b85529d99f4 Mon Sep 17 00:00:00 2001
-From: Gerd Hoffmann <kraxel@redhat.com>
-Date: Wed, 8 Mar 2017 10:19:09 +0100
-Subject: [PATCH 039/286] arm64: set CONFIG_MMC_BCM2835=y in defconfig
-
-We need to enable this controller so that we can switch the SD card's
-pinmux over to it by default, which will improve storage performance.
-
-Read access (dd with 64k blocks on rpi2):
-  CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s
-  CONFIG_MMC_BCM2835:     19-20 MB/s
-
-Differences on write access are pretty much in the noise.
-
-Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 3c9d36192802d60fca73c85c7096221371c36be7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/configs/defconfig |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -371,6 +371,7 @@ CONFIG_MMC_DW=y
- CONFIG_MMC_DW_EXYNOS=y
- CONFIG_MMC_DW_K3=y
- CONFIG_MMC_SUNXI=y
-+CONFIG_MMC_BCM2835=y
- CONFIG_NEW_LEDS=y
- CONFIG_LEDS_CLASS=y
- CONFIG_LEDS_GPIO=y
diff --git a/patches.renesas/0039-can-rcar_canfd-Correct-order-of-interrupt-specifiers.patch b/patches.renesas/0039-can-rcar_canfd-Correct-order-of-interrupt-specifiers.patch
deleted file mode 100644
index a6fb8e854fe6ca..00000000000000
--- a/patches.renesas/0039-can-rcar_canfd-Correct-order-of-interrupt-specifiers.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 0a8a692beaf44abdf0e4e74deec28d8a754b05f5 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 23 Nov 2016 14:44:46 +0100
-Subject: [PATCH 039/299] can: rcar_canfd: Correct order of interrupt
- specifiers
-
-According to both DTS (example and actual files), and Linux driver code,
-the first interrupt specifier should be the Channel interrupt, while the
-second interrupt specifier should be the Global interrupt.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
-(cherry picked from commit 08469bba2852da651ce7a047495685c10164c63b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/net/can/rcar_canfd.txt |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/Documentation/devicetree/bindings/net/can/rcar_canfd.txt
-+++ b/Documentation/devicetree/bindings/net/can/rcar_canfd.txt
-@@ -12,7 +12,7 @@ Required properties:
-   family-specific and/or generic versions.
- 
- - reg: physical base address and size of the R-Car CAN FD register map.
--- interrupts: interrupt specifier for the Global & Channel interrupts
-+- interrupts: interrupt specifiers for the Channel & Global interrupts
- - clocks: phandles and clock specifiers for 3 clock inputs.
- - clock-names: 3 clock input name strings: "fck", "canfd", "can_clk".
- - pinctrl-0: pin control group to be used for this controller.
diff --git a/patches.renesas/0040-arm64-dts-h3ulcb-follow-sound-CTU-MIX-supports.patch b/patches.renesas/0040-arm64-dts-h3ulcb-follow-sound-CTU-MIX-supports.patch
deleted file mode 100644
index 413598562b5632..00000000000000
--- a/patches.renesas/0040-arm64-dts-h3ulcb-follow-sound-CTU-MIX-supports.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From f496fa5c538936fe7ec0ec90b9f1e0ac48f17e1a Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 10 Jan 2017 07:41:28 +0000
-Subject: [PATCH 040/255] arm64: dts: h3ulcb: follow sound CTU/MIX supports
-
-commit 5bcd74e8a30d9259 ("arm64: dts: r8a7795: add sound MIX support")
-commit 5be5ee41d011f26b ("arm64: dts: r8a7795: add sound CTU support")
-added MIX/CTU support, and it updated clocks on SoC level.
-Thus, h3ulcb should be updated
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b1980ff0c335eedbba10ea99a2a9feebb79642f8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-@@ -277,6 +277,8 @@
- 		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
- 		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
- 		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
-+		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
-+		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
- 		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
- 		 <&audio_clk_a>, <&cs2000>,
- 		 <&audio_clk_c>,
diff --git a/patches.renesas/0040-arm64-dts-r8a7795-Correct-SATA-device-size-to-2MiB.patch b/patches.renesas/0040-arm64-dts-r8a7795-Correct-SATA-device-size-to-2MiB.patch
deleted file mode 100644
index 11ee4d76ffbed1..00000000000000
--- a/patches.renesas/0040-arm64-dts-r8a7795-Correct-SATA-device-size-to-2MiB.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 2bc9aa15be1f4adc2a49295f3e2d0e86304afd63 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm+renesas@opensource.se>
-Date: Mon, 20 Mar 2017 17:49:21 +0900
-Subject: [PATCH 040/286] arm64: dts: r8a7795: Correct SATA device size to 2MiB
-
-Update the r8a7795 SATA device node to use a 2MiB I/O space as specified
-in the "72. Serial-ATA" section of R-Car-Gen3-rev0.52E.pdf
-
-Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e9f0089b2d8a3d450b8ec02eccfb92b950110fbe)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -1209,7 +1209,7 @@
- 
- 		sata: sata@ee300000 {
- 			compatible = "renesas,sata-r8a7795";
--			reg = <0 0xee300000 0 0x1fff>;
-+			reg = <0 0xee300000 0 0x200000>;
- 			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 815>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
diff --git a/patches.renesas/0040-dmaengine-rcar-dmac-Document-R-Car-M3-W-bindings.patch b/patches.renesas/0040-dmaengine-rcar-dmac-Document-R-Car-M3-W-bindings.patch
deleted file mode 100644
index 41b7e06d070952..00000000000000
--- a/patches.renesas/0040-dmaengine-rcar-dmac-Document-R-Car-M3-W-bindings.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 084a43d4a5bcf147a2853e03fcae73c953c64883 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Thu, 24 Nov 2016 15:23:06 +0100
-Subject: [PATCH 040/299] dmaengine: rcar-dmac: Document R-Car M3-W bindings
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 942ba9dc133d82e4ce8cb006e7111aa1b3dcaec7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt
-+++ b/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt
-@@ -24,6 +24,7 @@ Required Properties:
- 		- "renesas,dmac-r8a7793" (R-Car M2-N)
- 		- "renesas,dmac-r8a7794" (R-Car E2)
- 		- "renesas,dmac-r8a7795" (R-Car H3)
-+		- "renesas,dmac-r8a7796" (R-Car M3-W)
- 
- - reg: base address and length of the registers block for the DMAC
- 
diff --git a/patches.renesas/0041-arm64-dts-r8a7795-Add-missing-power-domains-property.patch b/patches.renesas/0041-arm64-dts-r8a7795-Add-missing-power-domains-property.patch
deleted file mode 100644
index 128f05a152ed89..00000000000000
--- a/patches.renesas/0041-arm64-dts-r8a7795-Add-missing-power-domains-property.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 6efd53ebf22232b79a0827f133bcc9a9c2e2951c Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 16 Jan 2017 17:57:53 +0100
-Subject: [PATCH 041/255] arm64: dts: r8a7795: Add missing power-domains
- property for sata
-
-This went unnoticed as the sata_rcar driver doesn't support Runtime PM
-yet, but manages module clocks manually.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2cab226c345378b3cff652a9c8232f5070d31216)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -1149,6 +1149,7 @@
- 			reg = <0 0xee300000 0 0x1fff>;
- 			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 815>;
-+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
- 
diff --git a/patches.renesas/0041-arm64-dts-r8a7795-Add-reset-control-properties.patch b/patches.renesas/0041-arm64-dts-r8a7795-Add-reset-control-properties.patch
deleted file mode 100644
index acb1cbd73024e1..00000000000000
--- a/patches.renesas/0041-arm64-dts-r8a7795-Add-reset-control-properties.patch
+++ /dev/null
@@ -1,767 +0,0 @@
-From c9397ebb604769c17e00ab489a2f63be027f5546 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Thu, 16 Mar 2017 15:07:23 +0100
-Subject: [PATCH 041/286] arm64: dts: r8a7795: Add reset control properties
-
-Add properties to describe the reset topology for on-SoC devices:
-  - Add the "#reset-cells" property to the CPG/MSSR device node,
-  - Add resets and reset-names properties to the various device nodes.
-
-This allows to reset SoC devices using the Reset Controller API.
-
-Note that all resets added match the corresponding module clocks.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit dcccc13210eff0e5be2b36548198952c5683f3db)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |   93 +++++++++++++++++++++++++++++++
- 1 file changed, 93 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -204,6 +204,7 @@
- 			clocks = <&cpg CPG_MOD 408>;
- 			clock-names = "clk";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 408>;
- 		};
- 
- 		wdt0: watchdog@e6020000 {
-@@ -211,6 +212,7 @@
- 			reg = <0 0xe6020000 0 0x0c>;
- 			clocks = <&cpg CPG_MOD 402>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 402>;
- 			status = "disabled";
- 		};
- 
-@@ -226,6 +228,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 912>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 912>;
- 		};
- 
- 		gpio1: gpio@e6051000 {
-@@ -240,6 +243,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 911>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 911>;
- 		};
- 
- 		gpio2: gpio@e6052000 {
-@@ -254,6 +258,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 910>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 910>;
- 		};
- 
- 		gpio3: gpio@e6053000 {
-@@ -268,6 +273,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 909>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 909>;
- 		};
- 
- 		gpio4: gpio@e6054000 {
-@@ -282,6 +288,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 908>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 908>;
- 		};
- 
- 		gpio5: gpio@e6055000 {
-@@ -296,6 +303,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 907>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 907>;
- 		};
- 
- 		gpio6: gpio@e6055400 {
-@@ -310,6 +318,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 906>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 906>;
- 		};
- 
- 		gpio7: gpio@e6055800 {
-@@ -324,6 +333,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 905>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 905>;
- 		};
- 
- 		pmu_a57 {
-@@ -369,6 +379,7 @@
- 			clock-names = "extal", "extalr";
- 			#clock-cells = <2>;
- 			#power-domain-cells = <0>;
-+			#reset-cells = <1>;
- 		};
- 
- 		rst: reset-controller@e6160000 {
-@@ -405,6 +416,7 @@
- 				      GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 407>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 407>;
- 		};
- 
- 		dmac0: dma-controller@e6700000 {
-@@ -436,6 +448,7 @@
- 			clocks = <&cpg CPG_MOD 219>;
- 			clock-names = "fck";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 219>;
- 			#dma-cells = <1>;
- 			dma-channels = <16>;
- 		};
-@@ -469,6 +482,7 @@
- 			clocks = <&cpg CPG_MOD 218>;
- 			clock-names = "fck";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 218>;
- 			#dma-cells = <1>;
- 			dma-channels = <16>;
- 		};
-@@ -502,6 +516,7 @@
- 			clocks = <&cpg CPG_MOD 217>;
- 			clock-names = "fck";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 217>;
- 			#dma-cells = <1>;
- 			dma-channels = <16>;
- 		};
-@@ -535,6 +550,7 @@
- 			clocks = <&cpg CPG_MOD 502>;
- 			clock-names = "fck";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 502>;
- 			#dma-cells = <1>;
- 			dma-channels = <16>;
- 		};
-@@ -568,6 +584,7 @@
- 			clocks = <&cpg CPG_MOD 501>;
- 			clock-names = "fck";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 501>;
- 			#dma-cells = <1>;
- 			dma-channels = <16>;
- 		};
-@@ -610,6 +627,7 @@
- 					  "ch24";
- 			clocks = <&cpg CPG_MOD 812>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 812>;
- 			phy-mode = "rgmii-txid";
- 			#address-cells = <1>;
- 			#size-cells = <0>;
-@@ -628,6 +646,7 @@
- 			assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
- 			assigned-clock-rates = <40000000>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 916>;
- 			status = "disabled";
- 		};
- 
-@@ -643,6 +662,7 @@
- 			assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
- 			assigned-clock-rates = <40000000>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 915>;
- 			status = "disabled";
- 		};
- 
-@@ -659,6 +679,7 @@
- 			assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
- 			assigned-clock-rates = <40000000>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 914>;
- 			status = "disabled";
- 
- 			channel0 {
-@@ -683,6 +704,7 @@
- 			dmas = <&dmac1 0x31>, <&dmac1 0x30>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 520>;
- 			status = "disabled";
- 		};
- 
-@@ -699,6 +721,7 @@
- 			dmas = <&dmac1 0x33>, <&dmac1 0x32>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 519>;
- 			status = "disabled";
- 		};
- 
-@@ -715,6 +738,7 @@
- 			dmas = <&dmac1 0x35>, <&dmac1 0x34>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 518>;
- 			status = "disabled";
- 		};
- 
-@@ -731,6 +755,7 @@
- 			dmas = <&dmac0 0x37>, <&dmac0 0x36>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 517>;
- 			status = "disabled";
- 		};
- 
-@@ -747,6 +772,7 @@
- 			dmas = <&dmac0 0x39>, <&dmac0 0x38>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 516>;
- 			status = "disabled";
- 		};
- 
-@@ -762,6 +788,7 @@
- 			dmas = <&dmac1 0x51>, <&dmac1 0x50>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 207>;
- 			status = "disabled";
- 		};
- 
-@@ -777,6 +804,7 @@
- 			dmas = <&dmac1 0x53>, <&dmac1 0x52>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 206>;
- 			status = "disabled";
- 		};
- 
-@@ -792,6 +820,7 @@
- 			dmas = <&dmac1 0x13>, <&dmac1 0x12>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 310>;
- 			status = "disabled";
- 		};
- 
-@@ -807,6 +836,7 @@
- 			dmas = <&dmac0 0x57>, <&dmac0 0x56>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 204>;
- 			status = "disabled";
- 		};
- 
-@@ -822,6 +852,7 @@
- 			dmas = <&dmac0 0x59>, <&dmac0 0x58>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 203>;
- 			status = "disabled";
- 		};
- 
-@@ -837,6 +868,7 @@
- 			dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 202>;
- 			status = "disabled";
- 		};
- 
-@@ -850,6 +882,7 @@
- 			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 926>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 926>;
- 			status = "disabled";
- 		};
- 
-@@ -862,6 +895,7 @@
- 			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 931>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 931>;
- 			dmas = <&dmac1 0x91>, <&dmac1 0x90>;
- 			dma-names = "tx", "rx";
- 			i2c-scl-internal-delay-ns = <110>;
-@@ -877,6 +911,7 @@
- 			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 930>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 930>;
- 			dmas = <&dmac1 0x93>, <&dmac1 0x92>;
- 			dma-names = "tx", "rx";
- 			i2c-scl-internal-delay-ns = <6>;
-@@ -892,6 +927,7 @@
- 			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 929>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 929>;
- 			dmas = <&dmac1 0x95>, <&dmac1 0x94>;
- 			dma-names = "tx", "rx";
- 			i2c-scl-internal-delay-ns = <6>;
-@@ -907,6 +943,7 @@
- 			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 928>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 928>;
- 			dmas = <&dmac0 0x97>, <&dmac0 0x96>;
- 			dma-names = "tx", "rx";
- 			i2c-scl-internal-delay-ns = <110>;
-@@ -922,6 +959,7 @@
- 			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 927>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 927>;
- 			dmas = <&dmac0 0x99>, <&dmac0 0x98>;
- 			dma-names = "tx", "rx";
- 			i2c-scl-internal-delay-ns = <110>;
-@@ -937,6 +975,7 @@
- 			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 919>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 919>;
- 			dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
- 			dma-names = "tx", "rx";
- 			i2c-scl-internal-delay-ns = <110>;
-@@ -952,6 +991,7 @@
- 			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 918>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 918>;
- 			dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
- 			dma-names = "tx", "rx";
- 			i2c-scl-internal-delay-ns = <6>;
-@@ -963,6 +1003,7 @@
- 			reg = <0 0xe6e30000 0 0x8>;
- 			clocks = <&cpg CPG_MOD 523>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 523>;
- 			#pwm-cells = <2>;
- 			status = "disabled";
- 		};
-@@ -972,6 +1013,7 @@
- 			reg = <0 0xe6e31000 0 0x8>;
- 			clocks = <&cpg CPG_MOD 523>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 523>;
- 			#pwm-cells = <2>;
- 			status = "disabled";
- 		};
-@@ -981,6 +1023,7 @@
- 			reg = <0 0xe6e32000 0 0x8>;
- 			clocks = <&cpg CPG_MOD 523>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 523>;
- 			#pwm-cells = <2>;
- 			status = "disabled";
- 		};
-@@ -990,6 +1033,7 @@
- 			reg = <0 0xe6e33000 0 0x8>;
- 			clocks = <&cpg CPG_MOD 523>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 523>;
- 			#pwm-cells = <2>;
- 			status = "disabled";
- 		};
-@@ -999,6 +1043,7 @@
- 			reg = <0 0xe6e34000 0 0x8>;
- 			clocks = <&cpg CPG_MOD 523>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 523>;
- 			#pwm-cells = <2>;
- 			status = "disabled";
- 		};
-@@ -1008,6 +1053,7 @@
- 			reg = <0 0xe6e35000 0 0x8>;
- 			clocks = <&cpg CPG_MOD 523>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 523>;
- 			#pwm-cells = <2>;
- 			status = "disabled";
- 		};
-@@ -1017,6 +1063,7 @@
- 			reg = <0 0xe6e36000 0 0x8>;
- 			clocks = <&cpg CPG_MOD 523>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 523>;
- 			#pwm-cells = <2>;
- 			status = "disabled";
- 		};
-@@ -1213,6 +1260,7 @@
- 			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 815>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 815>;
- 			status = "disabled";
- 		};
- 
-@@ -1222,6 +1270,7 @@
- 			interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 328>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 328>;
- 			status = "disabled";
- 		};
- 
-@@ -1231,6 +1280,7 @@
- 			interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 327>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 327>;
- 			status = "disabled";
- 		};
- 
-@@ -1243,6 +1293,7 @@
- 			interrupt-names = "ch0", "ch1";
- 			clocks = <&cpg CPG_MOD 330>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 330>;
- 			#dma-cells = <1>;
- 			dma-channels = <2>;
- 		};
-@@ -1256,6 +1307,7 @@
- 			interrupt-names = "ch0", "ch1";
- 			clocks = <&cpg CPG_MOD 331>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 331>;
- 			#dma-cells = <1>;
- 			dma-channels = <2>;
- 		};
-@@ -1267,6 +1319,7 @@
- 			clocks = <&cpg CPG_MOD 314>;
- 			max-frequency = <200000000>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 314>;
- 			status = "disabled";
- 		};
- 
-@@ -1277,6 +1330,7 @@
- 			clocks = <&cpg CPG_MOD 313>;
- 			max-frequency = <200000000>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 313>;
- 			status = "disabled";
- 		};
- 
-@@ -1287,6 +1341,7 @@
- 			clocks = <&cpg CPG_MOD 312>;
- 			max-frequency = <200000000>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 312>;
- 			status = "disabled";
- 		};
- 
-@@ -1297,6 +1352,7 @@
- 			clocks = <&cpg CPG_MOD 311>;
- 			max-frequency = <200000000>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 311>;
- 			status = "disabled";
- 		};
- 
-@@ -1307,6 +1363,7 @@
- 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 703>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 703>;
- 			#phy-cells = <0>;
- 			status = "disabled";
- 		};
-@@ -1317,6 +1374,7 @@
- 			reg = <0 0xee0a0200 0 0x700>;
- 			clocks = <&cpg CPG_MOD 702>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 702>;
- 			#phy-cells = <0>;
- 			status = "disabled";
- 		};
-@@ -1327,6 +1385,7 @@
- 			reg = <0 0xee0c0200 0 0x700>;
- 			clocks = <&cpg CPG_MOD 701>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 701>;
- 			#phy-cells = <0>;
- 			status = "disabled";
- 		};
-@@ -1339,6 +1398,7 @@
- 			phys = <&usb2_phy0>;
- 			phy-names = "usb";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 703>;
- 			status = "disabled";
- 		};
- 
-@@ -1350,6 +1410,7 @@
- 			phys = <&usb2_phy1>;
- 			phy-names = "usb";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 702>;
- 			status = "disabled";
- 		};
- 
-@@ -1361,6 +1422,7 @@
- 			phys = <&usb2_phy2>;
- 			phy-names = "usb";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 701>;
- 			status = "disabled";
- 		};
- 
-@@ -1372,6 +1434,7 @@
- 			phys = <&usb2_phy0>;
- 			phy-names = "usb";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 703>;
- 			status = "disabled";
- 		};
- 
-@@ -1383,6 +1446,7 @@
- 			phys = <&usb2_phy1>;
- 			phy-names = "usb";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 702>;
- 			status = "disabled";
- 		};
- 
-@@ -1394,6 +1458,7 @@
- 			phys = <&usb2_phy2>;
- 			phy-names = "usb";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 701>;
- 			status = "disabled";
- 		};
- 
-@@ -1410,6 +1475,7 @@
- 			phys = <&usb2_phy0>;
- 			phy-names = "usb";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 704>;
- 			status = "disabled";
- 		};
- 
-@@ -1436,6 +1502,7 @@
- 			clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
- 			clock-names = "pcie", "pcie_bus";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 319>;
- 			status = "disabled";
- 		};
- 
-@@ -1462,6 +1529,7 @@
- 			clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
- 			clock-names = "pcie", "pcie_bus";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 318>;
- 			status = "disabled";
- 		};
- 
-@@ -1471,6 +1539,7 @@
- 			interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 624>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 624>;
- 
- 			renesas,fcp = <&fcpvb1>;
- 		};
-@@ -1480,6 +1549,7 @@
- 			reg = <0 0xfe92f000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 606>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 606>;
- 		};
- 
- 		fcpf0: fcp@fe950000 {
-@@ -1487,6 +1557,7 @@
- 			reg = <0 0xfe950000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 615>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 615>;
- 		};
- 
- 		fcpf1: fcp@fe951000 {
-@@ -1494,6 +1565,7 @@
- 			reg = <0 0xfe951000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 614>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 614>;
- 		};
- 
- 		fcpf2: fcp@fe952000 {
-@@ -1501,6 +1573,7 @@
- 			reg = <0 0xfe952000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 613>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 613>;
- 		};
- 
- 		vspbd: vsp@fe960000 {
-@@ -1509,6 +1582,7 @@
- 			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 626>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 626>;
- 
- 			renesas,fcp = <&fcpvb0>;
- 		};
-@@ -1518,6 +1592,7 @@
- 			reg = <0 0xfe96f000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 607>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 607>;
- 		};
- 
- 		vspi0: vsp@fe9a0000 {
-@@ -1526,6 +1601,7 @@
- 			interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 631>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 631>;
- 
- 			renesas,fcp = <&fcpvi0>;
- 		};
-@@ -1535,6 +1611,7 @@
- 			reg = <0 0xfe9af000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 611>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 611>;
- 		};
- 
- 		vspi1: vsp@fe9b0000 {
-@@ -1543,6 +1620,7 @@
- 			interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 630>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 630>;
- 
- 			renesas,fcp = <&fcpvi1>;
- 		};
-@@ -1552,6 +1630,7 @@
- 			reg = <0 0xfe9bf000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 610>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 610>;
- 		};
- 
- 		vspi2: vsp@fe9c0000 {
-@@ -1560,6 +1639,7 @@
- 			interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 629>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 629>;
- 
- 			renesas,fcp = <&fcpvi2>;
- 		};
-@@ -1569,6 +1649,7 @@
- 			reg = <0 0xfe9cf000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 609>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 609>;
- 		};
- 
- 		vspd0: vsp@fea20000 {
-@@ -1577,6 +1658,7 @@
- 			interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 623>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 623>;
- 
- 			renesas,fcp = <&fcpvd0>;
- 		};
-@@ -1586,6 +1668,7 @@
- 			reg = <0 0xfea27000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 603>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 603>;
- 		};
- 
- 		vspd1: vsp@fea28000 {
-@@ -1594,6 +1677,7 @@
- 			interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 622>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 622>;
- 
- 			renesas,fcp = <&fcpvd1>;
- 		};
-@@ -1603,6 +1687,7 @@
- 			reg = <0 0xfea2f000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 602>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 602>;
- 		};
- 
- 		vspd2: vsp@fea30000 {
-@@ -1611,6 +1696,7 @@
- 			interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 621>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 621>;
- 
- 			renesas,fcp = <&fcpvd2>;
- 		};
-@@ -1620,6 +1706,7 @@
- 			reg = <0 0xfea37000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 601>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 601>;
- 		};
- 
- 		vspd3: vsp@fea38000 {
-@@ -1628,6 +1715,7 @@
- 			interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 620>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 620>;
- 
- 			renesas,fcp = <&fcpvd3>;
- 		};
-@@ -1637,6 +1725,7 @@
- 			reg = <0 0xfea3f000 0 0x200>;
- 			clocks = <&cpg CPG_MOD 600>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 600>;
- 		};
- 
- 		fdp1@fe940000 {
-@@ -1645,6 +1734,7 @@
- 			interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 119>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 119>;
- 			renesas,fcp = <&fcpf0>;
- 		};
- 
-@@ -1654,6 +1744,7 @@
- 			interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 118>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 118>;
- 			renesas,fcp = <&fcpf1>;
- 		};
- 
-@@ -1663,6 +1754,7 @@
- 			interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 117>;
- 			power-domains = <&sysc R8A7795_PD_A3VP>;
-+			resets = <&cpg 117>;
- 			renesas,fcp = <&fcpf2>;
- 		};
- 
-@@ -1722,6 +1814,7 @@
- 				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 522>;
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			resets = <&cpg 522>;
- 			#thermal-sensor-cells = <1>;
- 			status = "okay";
- 		};
diff --git a/patches.renesas/0041-drm-Add-reference-counting-to-drm_atomic_state.patch b/patches.renesas/0041-drm-Add-reference-counting-to-drm_atomic_state.patch
deleted file mode 100644
index 9c4c2713d7f419..00000000000000
--- a/patches.renesas/0041-drm-Add-reference-counting-to-drm_atomic_state.patch
+++ /dev/null
@@ -1,784 +0,0 @@
-From c99fdb3f80589af8da49cbc090e6597ffca85c7c Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Fri, 14 Oct 2016 13:18:18 +0100
-Subject: [PATCH 041/299] drm: Add reference counting to drm_atomic_state
-
-drm_atomic_state has a complicated single owner model that tracks the
-single reference from allocation through to destruction on another
-thread - or perhaps on a local error path. We can simplify this tracking
-by using reference counting (at a cost of a few more atomics). This is
-even more beneficial when the lifetime of the state becomes more
-convoluted than being passed to a single worker thread for the commit.
-
-v2: Double check !intel atomic_commit functions for missing gets
-v3: Update kerneldocs
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
-Cc: dri-devel@lists.freedesktop.org
-Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
-Reviewed-by: Sean Paul <seanpaul@chromium.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Link: http://patchwork.freedesktop.org/patch/msgid/20161014121833.439-27-chris@chris-wilson.co.uk
-(cherry picked from commit 0853695c3ba46f97dfc0b5885f7b7e640ca212dd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c |    3 
- drivers/gpu/drm/drm_atomic.c                 |   25 ++----
- drivers/gpu/drm/drm_atomic_helper.c          |   98 ++++++---------------------
- drivers/gpu/drm/drm_fb_helper.c              |    9 --
- drivers/gpu/drm/exynos/exynos_drm_drv.c      |    3 
- drivers/gpu/drm/i915/i915_debugfs.c          |    5 -
- drivers/gpu/drm/i915/intel_display.c         |   31 ++++----
- drivers/gpu/drm/i915/intel_sprite.c          |    4 -
- drivers/gpu/drm/mediatek/mtk_drm_drv.c       |    3 
- drivers/gpu/drm/msm/msm_atomic.c             |    3 
- drivers/gpu/drm/omapdrm/omap_drv.c           |    3 
- drivers/gpu/drm/rcar-du/rcar_du_kms.c        |    3 
- drivers/gpu/drm/sti/sti_drv.c                |    3 
- drivers/gpu/drm/tegra/drm.c                  |    3 
- drivers/gpu/drm/tilcdc/tilcdc_drv.c          |    2 
- drivers/gpu/drm/vc4/vc4_kms.c                |    3 
- include/drm/drm_atomic.h                     |   31 ++++++++
- include/drm/drm_plane.h                      |    1 
- 18 files changed, 102 insertions(+), 131 deletions(-)
-
---- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
-+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
-@@ -464,7 +464,7 @@ atmel_hlcdc_dc_atomic_complete(struct at
- 
- 	drm_atomic_helper_cleanup_planes(dev, old_state);
- 
--	drm_atomic_state_free(old_state);
-+	drm_atomic_state_put(old_state);
- 
- 	/* Complete the commit, wake up any waiter. */
- 	spin_lock(&dc->commit.wait.lock);
-@@ -521,6 +521,7 @@ static int atmel_hlcdc_dc_atomic_commit(
- 	/* Swap the state, this is the point of no return. */
- 	drm_atomic_helper_swap_state(state, true);
- 
-+	drm_atomic_state_get(state);
- 	if (async)
- 		queue_work(dc->wq, &commit->work);
- 	else
---- a/drivers/gpu/drm/drm_atomic.c
-+++ b/drivers/gpu/drm/drm_atomic.c
-@@ -74,6 +74,8 @@ EXPORT_SYMBOL(drm_atomic_state_default_r
- int
- drm_atomic_state_init(struct drm_device *dev, struct drm_atomic_state *state)
- {
-+	kref_init(&state->ref);
-+
- 	/* TODO legacy paths should maybe do a better job about
- 	 * setting this appropriately?
- 	 */
-@@ -215,22 +217,16 @@ void drm_atomic_state_clear(struct drm_a
- EXPORT_SYMBOL(drm_atomic_state_clear);
- 
- /**
-- * drm_atomic_state_free - free all memory for an atomic state
-- * @state: atomic state to deallocate
-+ * __drm_atomic_state_free - free all memory for an atomic state
-+ * @ref: This atomic state to deallocate
-  *
-  * This frees all memory associated with an atomic state, including all the
-  * per-object state for planes, crtcs and connectors.
-  */
--void drm_atomic_state_free(struct drm_atomic_state *state)
-+void __drm_atomic_state_free(struct kref *ref)
- {
--	struct drm_device *dev;
--	struct drm_mode_config *config;
--
--	if (!state)
--		return;
--
--	dev = state->dev;
--	config = &dev->mode_config;
-+	struct drm_atomic_state *state = container_of(ref, typeof(*state), ref);
-+	struct drm_mode_config *config = &state->dev->mode_config;
- 
- 	drm_atomic_state_clear(state);
- 
-@@ -243,7 +239,7 @@ void drm_atomic_state_free(struct drm_at
- 		kfree(state);
- 	}
- }
--EXPORT_SYMBOL(drm_atomic_state_free);
-+EXPORT_SYMBOL(__drm_atomic_state_free);
- 
- /**
-  * drm_atomic_get_crtc_state - get crtc state
-@@ -1750,7 +1746,7 @@ retry:
- 	if (arg->flags & DRM_MODE_ATOMIC_TEST_ONLY) {
- 		/*
- 		 * Unlike commit, check_only does not clean up state.
--		 * Below we call drm_atomic_state_free for it.
-+		 * Below we call drm_atomic_state_put for it.
- 		 */
- 		ret = drm_atomic_check_only(state);
- 	} else if (arg->flags & DRM_MODE_ATOMIC_NONBLOCK) {
-@@ -1783,8 +1779,7 @@ out:
- 		goto retry;
- 	}
- 
--	if (ret || arg->flags & DRM_MODE_ATOMIC_TEST_ONLY)
--		drm_atomic_state_free(state);
-+	drm_atomic_state_put(state);
- 
- 	drm_modeset_drop_locks(&ctx);
- 	drm_modeset_acquire_fini(&ctx);
---- a/drivers/gpu/drm/drm_atomic_helper.c
-+++ b/drivers/gpu/drm/drm_atomic_helper.c
-@@ -1203,7 +1203,7 @@ static void commit_tail(struct drm_atomi
- 
- 	drm_atomic_helper_commit_cleanup_done(state);
- 
--	drm_atomic_state_free(state);
-+	drm_atomic_state_put(state);
- }
- 
- static void commit_work(struct work_struct *work)
-@@ -1287,6 +1287,7 @@ int drm_atomic_helper_commit(struct drm_
- 	 * make sure work items don't artifically stall on each another.
- 	 */
- 
-+	drm_atomic_state_get(state);
- 	if (nonblock)
- 		queue_work(system_unbound_wq, &state->commit_work);
- 	else
-@@ -1599,7 +1600,7 @@ EXPORT_SYMBOL(drm_atomic_helper_commit_h
-  *
-  * This signals completion of the atomic update @state, including any cleanup
-  * work. If used, it must be called right before calling
-- * drm_atomic_state_free().
-+ * drm_atomic_state_put().
-  *
-  * This is part of the atomic helper support for nonblocking commits, see
-  * drm_atomic_helper_setup_commit() for an overview.
-@@ -2122,18 +2123,13 @@ retry:
- 		state->legacy_cursor_update = true;
- 
- 	ret = drm_atomic_commit(state);
--	if (ret != 0)
--		goto fail;
--
--	/* Driver takes ownership of state on successful commit. */
--	return 0;
- fail:
- 	if (ret == -EDEADLK)
- 		goto backoff;
- 
--	drm_atomic_state_free(state);
--
-+	drm_atomic_state_put(state);
- 	return ret;
-+
- backoff:
- 	drm_atomic_state_clear(state);
- 	drm_atomic_legacy_backoff(state);
-@@ -2195,18 +2191,13 @@ retry:
- 		goto fail;
- 
- 	ret = drm_atomic_commit(state);
--	if (ret != 0)
--		goto fail;
--
--	/* Driver takes ownership of state on successful commit. */
--	return 0;
- fail:
- 	if (ret == -EDEADLK)
- 		goto backoff;
- 
--	drm_atomic_state_free(state);
--
-+	drm_atomic_state_put(state);
- 	return ret;
-+
- backoff:
- 	drm_atomic_state_clear(state);
- 	drm_atomic_legacy_backoff(state);
-@@ -2335,18 +2326,13 @@ retry:
- 		goto fail;
- 
- 	ret = drm_atomic_commit(state);
--	if (ret != 0)
--		goto fail;
--
--	/* Driver takes ownership of state on successful commit. */
--	return 0;
- fail:
- 	if (ret == -EDEADLK)
- 		goto backoff;
- 
--	drm_atomic_state_free(state);
--
-+	drm_atomic_state_put(state);
- 	return ret;
-+
- backoff:
- 	drm_atomic_state_clear(state);
- 	drm_atomic_legacy_backoff(state);
-@@ -2488,11 +2474,8 @@ int drm_atomic_helper_disable_all(struct
- 	}
- 
- 	err = drm_atomic_commit(state);
--
- free:
--	if (err < 0)
--		drm_atomic_state_free(state);
--
-+	drm_atomic_state_put(state);
- 	return err;
- }
- EXPORT_SYMBOL(drm_atomic_helper_disable_all);
-@@ -2543,7 +2526,7 @@ retry:
- 
- 	err = drm_atomic_helper_disable_all(dev, &ctx);
- 	if (err < 0) {
--		drm_atomic_state_free(state);
-+		drm_atomic_state_put(state);
- 		state = ERR_PTR(err);
- 		goto unlock;
- 	}
-@@ -2632,18 +2615,13 @@ retry:
- 		goto fail;
- 
- 	ret = drm_atomic_commit(state);
--	if (ret != 0)
--		goto fail;
--
--	/* Driver takes ownership of state on successful commit. */
--	return 0;
- fail:
- 	if (ret == -EDEADLK)
- 		goto backoff;
- 
--	drm_atomic_state_free(state);
--
-+	drm_atomic_state_put(state);
- 	return ret;
-+
- backoff:
- 	drm_atomic_state_clear(state);
- 	drm_atomic_legacy_backoff(state);
-@@ -2692,18 +2670,13 @@ retry:
- 		goto fail;
- 
- 	ret = drm_atomic_commit(state);
--	if (ret != 0)
--		goto fail;
--
--	/* Driver takes ownership of state on successful commit. */
--	return 0;
- fail:
- 	if (ret == -EDEADLK)
- 		goto backoff;
- 
--	drm_atomic_state_free(state);
--
-+	drm_atomic_state_put(state);
- 	return ret;
-+
- backoff:
- 	drm_atomic_state_clear(state);
- 	drm_atomic_legacy_backoff(state);
-@@ -2752,18 +2725,13 @@ retry:
- 		goto fail;
- 
- 	ret = drm_atomic_commit(state);
--	if (ret != 0)
--		goto fail;
--
--	/* Driver takes ownership of state on successful commit. */
--	return 0;
- fail:
- 	if (ret == -EDEADLK)
- 		goto backoff;
- 
--	drm_atomic_state_free(state);
--
-+	drm_atomic_state_put(state);
- 	return ret;
-+
- backoff:
- 	drm_atomic_state_clear(state);
- 	drm_atomic_legacy_backoff(state);
-@@ -2836,18 +2804,13 @@ retry:
- 	}
- 
- 	ret = drm_atomic_nonblocking_commit(state);
--	if (ret != 0)
--		goto fail;
--
--	/* Driver takes ownership of state on successful commit. */
--	return 0;
- fail:
- 	if (ret == -EDEADLK)
- 		goto backoff;
- 
--	drm_atomic_state_free(state);
--
-+	drm_atomic_state_put(state);
- 	return ret;
-+
- backoff:
- 	drm_atomic_state_clear(state);
- 	drm_atomic_legacy_backoff(state);
-@@ -2923,19 +2886,14 @@ retry:
- 	crtc_state->active = active;
- 
- 	ret = drm_atomic_commit(state);
--	if (ret != 0)
--		goto fail;
--
--	/* Driver takes ownership of state on successful commit. */
--	return 0;
- fail:
- 	if (ret == -EDEADLK)
- 		goto backoff;
- 
- 	connector->dpms = old_mode;
--	drm_atomic_state_free(state);
--
-+	drm_atomic_state_put(state);
- 	return ret;
-+
- backoff:
- 	drm_atomic_state_clear(state);
- 	drm_atomic_legacy_backoff(state);
-@@ -3344,7 +3302,7 @@ drm_atomic_helper_duplicate_state(struct
- 
- free:
- 	if (err < 0) {
--		drm_atomic_state_free(state);
-+		drm_atomic_state_put(state);
- 		state = ERR_PTR(err);
- 	}
- 
-@@ -3459,22 +3417,14 @@ retry:
- 		goto fail;
- 
- 	ret = drm_atomic_commit(state);
--	if (ret)
--		goto fail;
--
--	/* Driver takes ownership of state on successful commit. */
--
--	drm_property_unreference_blob(blob);
--
--	return 0;
- fail:
- 	if (ret == -EDEADLK)
- 		goto backoff;
- 
--	drm_atomic_state_free(state);
-+	drm_atomic_state_put(state);
- 	drm_property_unreference_blob(blob);
--
- 	return ret;
-+
- backoff:
- 	drm_atomic_state_clear(state);
- 	drm_atomic_legacy_backoff(state);
---- a/drivers/gpu/drm/drm_fb_helper.c
-+++ b/drivers/gpu/drm/drm_fb_helper.c
-@@ -372,9 +372,7 @@ fail:
- 	if (ret == -EDEADLK)
- 		goto backoff;
- 
--	if (ret != 0)
--		drm_atomic_state_free(state);
--
-+	drm_atomic_state_put(state);
- 	return ret;
- 
- backoff:
-@@ -1391,16 +1389,13 @@ retry:
- 	info->var.xoffset = var->xoffset;
- 	info->var.yoffset = var->yoffset;
- 
--
- fail:
- 	drm_atomic_clean_old_fb(dev, plane_mask, ret);
- 
- 	if (ret == -EDEADLK)
- 		goto backoff;
- 
--	if (ret != 0)
--		drm_atomic_state_free(state);
--
-+	drm_atomic_state_put(state);
- 	return ret;
- 
- backoff:
---- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
-+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
-@@ -69,7 +69,7 @@ static void exynos_atomic_commit_complet
- 
- 	drm_atomic_helper_cleanup_planes(dev, state);
- 
--	drm_atomic_state_free(state);
-+	drm_atomic_state_put(state);
- 
- 	spin_lock(&priv->lock);
- 	priv->pending &= ~commit->crtcs;
-@@ -254,6 +254,7 @@ int exynos_atomic_commit(struct drm_devi
- 
- 	drm_atomic_helper_swap_state(state, true);
- 
-+	drm_atomic_state_get(state);
- 	if (nonblock)
- 		schedule_work(&commit->work);
- 	else
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -3941,10 +3941,9 @@ static void hsw_trans_edp_pipe_A_crc_wa(
- 
- 	ret = drm_atomic_commit(state);
- out:
--	drm_modeset_unlock_all(dev);
- 	WARN(ret, "Toggling workaround to %i returns %i\n", enable, ret);
--	if (ret)
--		drm_atomic_state_free(state);
-+	drm_modeset_unlock_all(dev);
-+	drm_atomic_state_put(state);
- }
- 
- static int ivb_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3592,7 +3592,7 @@ void intel_prepare_reset(struct drm_i915
- 	return;
- 
- err:
--	drm_atomic_state_free(state);
-+	drm_atomic_state_put(state);
- }
- 
- void intel_finish_reset(struct drm_i915_private *dev_priv)
-@@ -3654,6 +3654,8 @@ void intel_finish_reset(struct drm_i915_
- 		intel_hpd_init(dev_priv);
- 	}
- 
-+	if (state)
-+		drm_atomic_state_put(state);
- 	drm_modeset_drop_locks(ctx);
- 	drm_modeset_acquire_fini(ctx);
- 	mutex_unlock(&dev->mode_config.mutex);
-@@ -6879,7 +6881,7 @@ static void intel_crtc_disable_noatomic(
- 
- 	dev_priv->display.crtc_disable(crtc_state, state);
- 
--	drm_atomic_state_free(state);
-+	drm_atomic_state_put(state);
- 
- 	DRM_DEBUG_KMS("[CRTC:%d:%s] hw state adjusted, was enabled, now disabled\n",
- 		      crtc->base.id, crtc->name);
-@@ -11287,8 +11289,8 @@ found:
- 	return true;
- 
- fail:
--	drm_atomic_state_free(state);
--	drm_atomic_state_free(restore_state);
-+	drm_atomic_state_put(state);
-+	drm_atomic_state_put(restore_state);
- 	restore_state = state = NULL;
- 
- 	if (ret == -EDEADLK) {
-@@ -11317,10 +11319,9 @@ void intel_release_load_detect_pipe(stru
- 		return;
- 
- 	ret = drm_atomic_commit(state);
--	if (ret) {
-+	if (ret)
- 		DRM_DEBUG_KMS("Couldn't release load detect pipe: %i\n", ret);
--		drm_atomic_state_free(state);
--	}
-+	drm_atomic_state_put(state);
- }
- 
- static int i9xx_pll_refclk(struct drm_device *dev,
-@@ -12393,8 +12394,7 @@ retry:
- 			goto retry;
- 		}
- 
--		if (ret)
--			drm_atomic_state_free(state);
-+		drm_atomic_state_put(state);
- 
- 		if (ret == 0 && event) {
- 			spin_lock_irq(&dev->event_lock);
-@@ -14490,7 +14490,7 @@ static void intel_atomic_commit_tail(str
- 
- 	drm_atomic_helper_commit_cleanup_done(state);
- 
--	drm_atomic_state_free(state);
-+	drm_atomic_state_put(state);
- 
- 	/* As one of the primary mmio accessors, KMS has a high likelihood
- 	 * of triggering bugs in unclaimed access. After we finish
-@@ -14573,6 +14573,7 @@ static int intel_atomic_commit(struct dr
- 	intel_shared_dpll_commit(state);
- 	intel_atomic_track_fbs(state);
- 
-+	drm_atomic_state_get(state);
- 	if (nonblock)
- 		queue_work(system_unbound_wq, &state->commit_work);
- 	else
-@@ -14614,9 +14615,8 @@ retry:
- 		goto retry;
- 	}
- 
--	if (ret)
- out:
--		drm_atomic_state_free(state);
-+	drm_atomic_state_put(state);
- }
- 
- /*
-@@ -16358,8 +16358,8 @@ retry:
- 		dev_priv->display.optimize_watermarks(cs);
- 	}
- 
--	drm_atomic_state_free(state);
- fail:
-+	drm_atomic_state_put(state);
- 	drm_modeset_drop_locks(&ctx);
- 	drm_modeset_acquire_fini(&ctx);
- }
-@@ -16997,10 +16997,9 @@ void intel_display_resume(struct drm_dev
- 	drm_modeset_acquire_fini(&ctx);
- 	mutex_unlock(&dev->mode_config.mutex);
- 
--	if (ret) {
-+	if (ret)
- 		DRM_ERROR("Restoring old state failed with %i\n", ret);
--		drm_atomic_state_free(state);
--	}
-+	drm_atomic_state_put(state);
- }
- 
- void intel_modeset_gem_init(struct drm_device *dev)
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -1008,9 +1008,7 @@ int intel_sprite_set_colorkey(struct drm
- 		drm_modeset_backoff(&ctx);
- 	}
- 
--	if (ret)
--		drm_atomic_state_free(state);
--
-+	drm_atomic_state_put(state);
- out:
- 	drm_modeset_drop_locks(&ctx);
- 	drm_modeset_acquire_fini(&ctx);
---- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
-+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
-@@ -83,7 +83,7 @@ static void mtk_atomic_complete(struct m
- 	drm_atomic_helper_wait_for_vblanks(drm, state);
- 
- 	drm_atomic_helper_cleanup_planes(drm, state);
--	drm_atomic_state_free(state);
-+	drm_atomic_state_put(state);
- }
- 
- static void mtk_atomic_work(struct work_struct *work)
-@@ -110,6 +110,7 @@ static int mtk_atomic_commit(struct drm_
- 
- 	drm_atomic_helper_swap_state(state, true);
- 
-+	drm_atomic_state_get(state);
- 	if (async)
- 		mtk_atomic_schedule(private, state);
- 	else
---- a/drivers/gpu/drm/msm/msm_atomic.c
-+++ b/drivers/gpu/drm/msm/msm_atomic.c
-@@ -141,7 +141,7 @@ static void complete_commit(struct msm_c
- 
- 	kms->funcs->complete_commit(kms, state);
- 
--	drm_atomic_state_free(state);
-+	drm_atomic_state_put(state);
- 
- 	commit_destroy(c);
- }
-@@ -256,6 +256,7 @@ int msm_atomic_commit(struct drm_device
- 	 * current layout.
- 	 */
- 
-+	drm_atomic_state_get(state);
- 	if (nonblock) {
- 		queue_work(priv->atomic_wq, &c->work);
- 		return 0;
---- a/drivers/gpu/drm/omapdrm/omap_drv.c
-+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
-@@ -105,7 +105,7 @@ static void omap_atomic_complete(struct
- 
- 	dispc_runtime_put();
- 
--	drm_atomic_state_free(old_state);
-+	drm_atomic_state_put(old_state);
- 
- 	/* Complete the commit, wake up any waiter. */
- 	spin_lock(&priv->commit.lock);
-@@ -176,6 +176,7 @@ static int omap_atomic_commit(struct drm
- 	/* Swap the state, this is the point of no return. */
- 	drm_atomic_helper_swap_state(state, true);
- 
-+	drm_atomic_state_get(state);
- 	if (nonblock)
- 		schedule_work(&commit->work);
- 	else
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -272,7 +272,7 @@ static void rcar_du_atomic_complete(stru
- 
- 	drm_atomic_helper_cleanup_planes(dev, old_state);
- 
--	drm_atomic_state_free(old_state);
-+	drm_atomic_state_put(old_state);
- 
- 	/* Complete the commit, wake up any waiter. */
- 	spin_lock(&rcdu->commit.wait.lock);
-@@ -338,6 +338,7 @@ static int rcar_du_atomic_commit(struct
- 	/* Swap the state, this is the point of no return. */
- 	drm_atomic_helper_swap_state(state, true);
- 
-+	drm_atomic_state_get(state);
- 	if (nonblock)
- 		schedule_work(&commit->work);
- 	else
---- a/drivers/gpu/drm/sti/sti_drv.c
-+++ b/drivers/gpu/drm/sti/sti_drv.c
-@@ -184,7 +184,7 @@ static void sti_atomic_complete(struct s
- 	drm_atomic_helper_wait_for_vblanks(drm, state);
- 
- 	drm_atomic_helper_cleanup_planes(drm, state);
--	drm_atomic_state_free(state);
-+	drm_atomic_state_put(state);
- }
- 
- static void sti_atomic_work(struct work_struct *work)
-@@ -237,6 +237,7 @@ static int sti_atomic_commit(struct drm_
- 
- 	drm_atomic_helper_swap_state(state, true);
- 
-+	drm_atomic_state_get(state);
- 	if (nonblock)
- 		sti_atomic_schedule(private, state);
- 	else
---- a/drivers/gpu/drm/tegra/drm.c
-+++ b/drivers/gpu/drm/tegra/drm.c
-@@ -63,7 +63,7 @@ static void tegra_atomic_complete(struct
- 	drm_atomic_helper_wait_for_vblanks(drm, state);
- 
- 	drm_atomic_helper_cleanup_planes(drm, state);
--	drm_atomic_state_free(state);
-+	drm_atomic_state_put(state);
- }
- 
- static void tegra_atomic_work(struct work_struct *work)
-@@ -96,6 +96,7 @@ static int tegra_atomic_commit(struct dr
- 
- 	drm_atomic_helper_swap_state(state, true);
- 
-+	drm_atomic_state_get(state);
- 	if (nonblock)
- 		tegra_atomic_schedule(tegra, state);
- 	else
---- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
-+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
-@@ -143,8 +143,6 @@ static int tilcdc_commit(struct drm_devi
- 
- 	drm_atomic_helper_cleanup_planes(dev, state);
- 
--	drm_atomic_state_free(state);
--
- 	return 0;
- }
- 
---- a/drivers/gpu/drm/vc4/vc4_kms.c
-+++ b/drivers/gpu/drm/vc4/vc4_kms.c
-@@ -61,7 +61,7 @@ vc4_atomic_complete_commit(struct vc4_co
- 
- 	drm_atomic_helper_cleanup_planes(dev, state);
- 
--	drm_atomic_state_free(state);
-+	drm_atomic_state_put(state);
- 
- 	up(&vc4->async_modeset);
- 
-@@ -190,6 +190,7 @@ static int vc4_atomic_commit(struct drm_
- 	 * current layout.
- 	 */
- 
-+	drm_atomic_state_get(state);
- 	if (nonblock) {
- 		vc4_queue_seqno_cb(dev, &c->cb, wait_seqno,
- 				   vc4_atomic_complete_commit_seqno_cb);
---- a/include/drm/drm_atomic.h
-+++ b/include/drm/drm_atomic.h
-@@ -153,6 +153,7 @@ struct __drm_connnectors_state {
- 
- /**
-  * struct drm_atomic_state - the global state object for atomic updates
-+ * @ref: count of all references to this state (will not be freed until zero)
-  * @dev: parent DRM device
-  * @allow_modeset: allow full modeset
-  * @legacy_cursor_update: hint to enforce legacy cursor IOCTL semantics
-@@ -164,6 +165,8 @@ struct __drm_connnectors_state {
-  * @acquire_ctx: acquire context for this atomic modeset state update
-  */
- struct drm_atomic_state {
-+	struct kref ref;
-+
- 	struct drm_device *dev;
- 	bool allow_modeset : 1;
- 	bool legacy_cursor_update : 1;
-@@ -193,7 +196,33 @@ static inline void drm_crtc_commit_get(s
- struct drm_atomic_state * __must_check
- drm_atomic_state_alloc(struct drm_device *dev);
- void drm_atomic_state_clear(struct drm_atomic_state *state);
--void drm_atomic_state_free(struct drm_atomic_state *state);
-+
-+/**
-+ * drm_atomic_state_get - acquire a reference to the atomic state
-+ * @state: The atomic state
-+ *
-+ * Returns a new reference to the @state
-+ */
-+static inline struct drm_atomic_state *
-+drm_atomic_state_get(struct drm_atomic_state *state)
-+{
-+	kref_get(&state->ref);
-+	return state;
-+}
-+
-+void __drm_atomic_state_free(struct kref *ref);
-+
-+/**
-+ * drm_atomic_state_put - release a reference to the atomic state
-+ * @state: The atomic state
-+ *
-+ * This releases a reference to @state which is freed after removing the
-+ * final reference. No locking required and callable from any context.
-+ */
-+static inline void drm_atomic_state_put(struct drm_atomic_state *state)
-+{
-+	kref_put(&state->ref, __drm_atomic_state_free);
-+}
- 
- int  __must_check
- drm_atomic_state_init(struct drm_device *dev, struct drm_atomic_state *state);
---- a/include/drm/drm_plane.h
-+++ b/include/drm/drm_plane.h
-@@ -94,7 +94,6 @@ struct drm_plane_state {
- 	struct drm_atomic_state *state;
- };
- 
--
- /**
-  * struct drm_plane_funcs - driver plane control functions
-  */
diff --git a/patches.renesas/0042-arm64-dts-r8a7795-Add-R-Car-Gen3-thermal-support.patch b/patches.renesas/0042-arm64-dts-r8a7795-Add-R-Car-Gen3-thermal-support.patch
deleted file mode 100644
index 535adec48b87c5..00000000000000
--- a/patches.renesas/0042-arm64-dts-r8a7795-Add-R-Car-Gen3-thermal-support.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From 612601e9d5b0743e8b773b6daea4e9175150b486 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Fri, 20 Jan 2017 12:26:42 +0100
-Subject: [PATCH 042/255] arm64: dts: r8a7795: Add R-Car Gen3 thermal support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Hien Dang <hien.dang.eb@renesas.com>
-Signed-off-by: Thao Nguyen <thao.nguyen.yb@rvc.renesas.com>
-Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Acked-by: Eduardo Valentin <edubezval@gmail.com>
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b443cd1740a28195e965d78b9478a88117ea73f9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |   58 +++++++++++++++++++++++++++++++
- 1 file changed, 58 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -1648,5 +1648,63 @@
- 				};
- 			};
- 		};
-+
-+		tsc: thermal@e6198000 {
-+			compatible = "renesas,r8a7795-thermal";
-+			reg = <0 0xe6198000 0 0x68>,
-+			      <0 0xe61a0000 0 0x5c>,
-+			      <0 0xe61a8000 0 0x5c>;
-+			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 522>;
-+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			#thermal-sensor-cells = <1>;
-+			status = "okay";
-+		};
-+
-+		thermal-zones {
-+			sensor_thermal1: sensor-thermal1 {
-+				polling-delay-passive = <250>;
-+				polling-delay = <1000>;
-+				thermal-sensors = <&tsc 0>;
-+
-+				trips {
-+					sensor1_crit: sensor1-crit {
-+						temperature = <120000>;
-+						hysteresis = <2000>;
-+						type = "critical";
-+					};
-+				};
-+			};
-+
-+			sensor_thermal2: sensor-thermal2 {
-+				polling-delay-passive = <250>;
-+				polling-delay = <1000>;
-+				thermal-sensors = <&tsc 1>;
-+
-+				trips {
-+					sensor2_crit: sensor2-crit {
-+						temperature = <120000>;
-+						hysteresis = <2000>;
-+						type = "critical";
-+					};
-+				};
-+			};
-+
-+			sensor_thermal3: sensor-thermal3 {
-+				polling-delay-passive = <250>;
-+				polling-delay = <1000>;
-+				thermal-sensors = <&tsc 2>;
-+
-+				trips {
-+					sensor3_crit: sensor3-crit {
-+						temperature = <120000>;
-+						hysteresis = <2000>;
-+						type = "critical";
-+					};
-+				};
-+			};
-+		};
- 	};
- };
diff --git a/patches.renesas/0042-arm64-dts-r8a7796-Add-reset-control-properties.patch b/patches.renesas/0042-arm64-dts-r8a7796-Add-reset-control-properties.patch
deleted file mode 100644
index 7972fd2ee88dec..00000000000000
--- a/patches.renesas/0042-arm64-dts-r8a7796-Add-reset-control-properties.patch
+++ /dev/null
@@ -1,391 +0,0 @@
-From ab3df83b62b93ac01be4cc9eabbda4ed5a4f02d4 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Thu, 16 Mar 2017 15:07:24 +0100
-Subject: [PATCH 042/286] arm64: dts: r8a7796: Add reset control properties
-
-Add properties to describe the reset topology for on-SoC devices:
-  - Add the "#reset-cells" property to the CPG/MSSR device node,
-  - Add resets and reset-names properties to the various device nodes.
-
-This allows to reset SoC devices using the Reset Controller API.
-
-Note that all resets added match the corresponding module clocks.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bec0948e810fffce38b9b886b0283a44eb025043)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   46 +++++++++++++++++++++++++++++++
- 1 file changed, 46 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -155,6 +155,7 @@
- 			clocks = <&cpg CPG_MOD 408>;
- 			clock-names = "clk";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 408>;
- 		};
- 
- 		timer {
-@@ -175,6 +176,7 @@
- 			reg = <0 0xe6020000 0 0x0c>;
- 			clocks = <&cpg CPG_MOD 402>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 402>;
- 			status = "disabled";
- 		};
- 
-@@ -190,6 +192,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 912>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 912>;
- 		};
- 
- 		gpio1: gpio@e6051000 {
-@@ -204,6 +207,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 911>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 911>;
- 		};
- 
- 		gpio2: gpio@e6052000 {
-@@ -218,6 +222,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 910>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 910>;
- 		};
- 
- 		gpio3: gpio@e6053000 {
-@@ -232,6 +237,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 909>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 909>;
- 		};
- 
- 		gpio4: gpio@e6054000 {
-@@ -246,6 +252,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 908>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 908>;
- 		};
- 
- 		gpio5: gpio@e6055000 {
-@@ -260,6 +267,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 907>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 907>;
- 		};
- 
- 		gpio6: gpio@e6055400 {
-@@ -274,6 +282,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 906>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 906>;
- 		};
- 
- 		gpio7: gpio@e6055800 {
-@@ -288,6 +297,7 @@
- 			interrupt-controller;
- 			clocks = <&cpg CPG_MOD 905>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 905>;
- 		};
- 
- 		pfc: pin-controller@e6060000 {
-@@ -322,6 +332,7 @@
- 			clock-names = "extal", "extalr";
- 			#clock-cells = <2>;
- 			#power-domain-cells = <0>;
-+			#reset-cells = <1>;
- 		};
- 
- 		rst: reset-controller@e6160000 {
-@@ -350,6 +361,7 @@
- 			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 926>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 926>;
- 			status = "disabled";
- 		};
- 
-@@ -362,6 +374,7 @@
- 			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 931>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 931>;
- 			dmas = <&dmac1 0x91>, <&dmac1 0x90>,
- 			       <&dmac2 0x91>, <&dmac2 0x90>;
- 			dma-names = "tx", "rx", "tx", "rx";
-@@ -378,6 +391,7 @@
- 			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 930>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 930>;
- 			dmas = <&dmac1 0x93>, <&dmac1 0x92>,
- 			       <&dmac2 0x93>, <&dmac2 0x92>;
- 			dma-names = "tx", "rx", "tx", "rx";
-@@ -394,6 +408,7 @@
- 			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 929>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 929>;
- 			dmas = <&dmac1 0x95>, <&dmac1 0x94>,
- 			       <&dmac2 0x95>, <&dmac2 0x94>;
- 			dma-names = "tx", "rx", "tx", "rx";
-@@ -410,6 +425,7 @@
- 			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 928>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 928>;
- 			dmas = <&dmac0 0x97>, <&dmac0 0x96>;
- 			dma-names = "tx", "rx";
- 			i2c-scl-internal-delay-ns = <110>;
-@@ -425,6 +441,7 @@
- 			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 927>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 927>;
- 			dmas = <&dmac0 0x99>, <&dmac0 0x98>;
- 			dma-names = "tx", "rx";
- 			i2c-scl-internal-delay-ns = <110>;
-@@ -440,6 +457,7 @@
- 			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 919>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 919>;
- 			dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
- 			dma-names = "tx", "rx";
- 			i2c-scl-internal-delay-ns = <110>;
-@@ -455,6 +473,7 @@
- 			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 918>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 918>;
- 			dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
- 			dma-names = "tx", "rx";
- 			i2c-scl-internal-delay-ns = <6>;
-@@ -473,6 +492,7 @@
- 			assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
- 			assigned-clock-rates = <40000000>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 916>;
- 			status = "disabled";
- 		};
- 
-@@ -488,6 +508,7 @@
- 			assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
- 			assigned-clock-rates = <40000000>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 915>;
- 			status = "disabled";
- 		};
- 
-@@ -504,6 +525,7 @@
- 			assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
- 			assigned-clock-rates = <40000000>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 914>;
- 			status = "disabled";
- 
- 			channel0 {
-@@ -553,6 +575,7 @@
- 					  "ch24";
- 			clocks = <&cpg CPG_MOD 812>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 812>;
- 			phy-mode = "rgmii-txid";
- 			#address-cells = <1>;
- 			#size-cells = <0>;
-@@ -573,6 +596,7 @@
- 			       <&dmac2 0x31>, <&dmac2 0x30>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 520>;
- 			status = "disabled";
- 		};
- 
-@@ -590,6 +614,7 @@
- 			       <&dmac2 0x33>, <&dmac2 0x32>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 519>;
- 			status = "disabled";
- 		};
- 
-@@ -607,6 +632,7 @@
- 			       <&dmac2 0x35>, <&dmac2 0x34>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 518>;
- 			status = "disabled";
- 		};
- 
-@@ -623,6 +649,7 @@
- 			dmas = <&dmac0 0x37>, <&dmac0 0x36>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 517>;
- 			status = "disabled";
- 		};
- 
-@@ -639,6 +666,7 @@
- 			dmas = <&dmac0 0x39>, <&dmac0 0x38>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 516>;
- 			status = "disabled";
- 		};
- 
-@@ -655,6 +683,7 @@
- 			       <&dmac2 0x51>, <&dmac2 0x50>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 207>;
- 			status = "disabled";
- 		};
- 
-@@ -671,6 +700,7 @@
- 			       <&dmac2 0x53>, <&dmac2 0x52>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 206>;
- 			status = "disabled";
- 		};
- 
-@@ -684,6 +714,7 @@
- 				 <&scif_clk>;
- 			clock-names = "fck", "brg_int", "scif_clk";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 310>;
- 			status = "disabled";
- 		};
- 
-@@ -699,6 +730,7 @@
- 			dmas = <&dmac0 0x57>, <&dmac0 0x56>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 204>;
- 			status = "disabled";
- 		};
- 
-@@ -714,6 +746,7 @@
- 			dmas = <&dmac0 0x59>, <&dmac0 0x58>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 203>;
- 			status = "disabled";
- 		};
- 
-@@ -730,6 +763,7 @@
- 			       <&dmac2 0x5b>, <&dmac2 0x5a>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 202>;
- 			status = "disabled";
- 		};
- 
-@@ -743,6 +777,7 @@
- 			       <&dmac2 0x41>, <&dmac2 0x40>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 211>;
- 			#address-cells = <1>;
- 			#size-cells = <0>;
- 			status = "disabled";
-@@ -758,6 +793,7 @@
- 			       <&dmac2 0x43>, <&dmac2 0x42>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 210>;
- 			#address-cells = <1>;
- 			#size-cells = <0>;
- 			status = "disabled";
-@@ -772,6 +808,7 @@
- 			dmas = <&dmac0 0x45>, <&dmac0 0x44>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 209>;
- 			#address-cells = <1>;
- 			#size-cells = <0>;
- 			status = "disabled";
-@@ -786,6 +823,7 @@
- 			dmas = <&dmac0 0x47>, <&dmac0 0x46>;
- 			dma-names = "tx", "rx";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 208>;
- 			#address-cells = <1>;
- 			#size-cells = <0>;
- 			status = "disabled";
-@@ -820,6 +858,7 @@
- 			clocks = <&cpg CPG_MOD 219>;
- 			clock-names = "fck";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 219>;
- 			#dma-cells = <1>;
- 			dma-channels = <16>;
- 		};
-@@ -853,6 +892,7 @@
- 			clocks = <&cpg CPG_MOD 218>;
- 			clock-names = "fck";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 218>;
- 			#dma-cells = <1>;
- 			dma-channels = <16>;
- 		};
-@@ -886,6 +926,7 @@
- 			clocks = <&cpg CPG_MOD 217>;
- 			clock-names = "fck";
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 217>;
- 			#dma-cells = <1>;
- 			dma-channels = <16>;
- 		};
-@@ -897,6 +938,7 @@
- 			clocks = <&cpg CPG_MOD 314>;
- 			max-frequency = <200000000>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 314>;
- 			status = "disabled";
- 		};
- 
-@@ -907,6 +949,7 @@
- 			clocks = <&cpg CPG_MOD 313>;
- 			max-frequency = <200000000>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 313>;
- 			status = "disabled";
- 		};
- 
-@@ -917,6 +960,7 @@
- 			clocks = <&cpg CPG_MOD 312>;
- 			max-frequency = <200000000>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 312>;
- 			status = "disabled";
- 		};
- 
-@@ -927,6 +971,7 @@
- 			clocks = <&cpg CPG_MOD 311>;
- 			max-frequency = <200000000>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 311>;
- 			status = "disabled";
- 		};
- 
-@@ -940,6 +985,7 @@
- 				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 522>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			resets = <&cpg 522>;
- 			#thermal-sensor-cells = <1>;
- 			status = "okay";
- 		};
diff --git a/patches.renesas/0042-drm-define-drm_compat_ioctl-NULL-on-CONFIG_COMPAT-n-.patch b/patches.renesas/0042-drm-define-drm_compat_ioctl-NULL-on-CONFIG_COMPAT-n-.patch
deleted file mode 100644
index b2541519f4885b..00000000000000
--- a/patches.renesas/0042-drm-define-drm_compat_ioctl-NULL-on-CONFIG_COMPAT-n-.patch
+++ /dev/null
@@ -1,493 +0,0 @@
-From 56b4ddd5628410f12b3d81858319b44cc31248b0 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 1 Nov 2016 17:40:44 +0200
-Subject: [PATCH 042/299] drm: define drm_compat_ioctl NULL on CONFIG_COMPAT=n
- and reduce #ifdefs
-
-If we define drm_compat_ioctl NULL on CONFIG_COMPAT=n, we don't have to
-check for the config everywhere.
-
-Reviewed-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Sean Paul <seanpaul@chromium.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/1478014844-27454-1-git-send-email-jani.nikula@intel.com
-(cherry picked from commit 55edf41b699bcb31dcf45082d99e91b7e217206e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/arc/arcpgu_drv.c                |    2 --
- drivers/gpu/drm/arm/hdlcd_drv.c                 |    2 --
- drivers/gpu/drm/arm/malidp_drv.c                |    2 --
- drivers/gpu/drm/ast/ast_drv.c                   |    2 --
- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c    |    2 --
- drivers/gpu/drm/bochs/bochs_drv.c               |    2 --
- drivers/gpu/drm/cirrus/cirrus_drv.c             |    2 --
- drivers/gpu/drm/drm_fops.c                      |   13 ++++++-------
- drivers/gpu/drm/etnaviv/etnaviv_drv.c           |    2 --
- drivers/gpu/drm/exynos/exynos_drm_drv.c         |    2 --
- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c       |    2 --
- drivers/gpu/drm/gma500/psb_drv.c                |    2 --
- drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c |    2 --
- drivers/gpu/drm/i810/i810_dma.c                 |    2 --
- drivers/gpu/drm/i810/i810_drv.c                 |    2 --
- drivers/gpu/drm/i915/i915_drv.c                 |    2 --
- drivers/gpu/drm/i915/i915_drv.h                 |    2 ++
- drivers/gpu/drm/mediatek/mtk_drm_drv.c          |    2 --
- drivers/gpu/drm/mgag200/mgag200_drv.c           |    2 --
- drivers/gpu/drm/msm/msm_drv.c                   |    2 --
- drivers/gpu/drm/rcar-du/rcar_du_drv.c           |    2 --
- drivers/gpu/drm/rockchip/rockchip_drm_drv.c     |    2 --
- drivers/gpu/drm/savage/savage_drv.c             |    2 --
- drivers/gpu/drm/shmobile/shmob_drm_drv.c        |    2 --
- drivers/gpu/drm/sis/sis_drv.c                   |    2 --
- drivers/gpu/drm/sti/sti_drv.c                   |    2 --
- drivers/gpu/drm/sun4i/sun4i_drv.c               |    2 --
- drivers/gpu/drm/tdfx/tdfx_drv.c                 |    2 --
- drivers/gpu/drm/tegra/drm.c                     |    2 --
- drivers/gpu/drm/tilcdc/tilcdc_drv.c             |    2 --
- drivers/gpu/drm/udl/udl_drv.c                   |    2 --
- drivers/gpu/drm/vc4/vc4_drv.c                   |    2 --
- drivers/gpu/drm/via/via_drv.c                   |    2 --
- drivers/gpu/drm/virtio/virtgpu_drv.c            |    2 --
- include/drm/drmP.h                              |    5 +++++
- 35 files changed, 13 insertions(+), 71 deletions(-)
-
---- a/drivers/gpu/drm/arc/arcpgu_drv.c
-+++ b/drivers/gpu/drm/arc/arcpgu_drv.c
-@@ -65,9 +65,7 @@ static const struct file_operations arcp
- 	.open = drm_open,
- 	.release = drm_release,
- 	.unlocked_ioctl = drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.poll = drm_poll,
- 	.read = drm_read,
- 	.llseek = no_llseek,
---- a/drivers/gpu/drm/arm/hdlcd_drv.c
-+++ b/drivers/gpu/drm/arm/hdlcd_drv.c
-@@ -268,9 +268,7 @@ static const struct file_operations fops
- 	.open		= drm_open,
- 	.release	= drm_release,
- 	.unlocked_ioctl	= drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl	= drm_compat_ioctl,
--#endif
- 	.poll		= drm_poll,
- 	.read		= drm_read,
- 	.llseek		= noop_llseek,
---- a/drivers/gpu/drm/arm/malidp_drv.c
-+++ b/drivers/gpu/drm/arm/malidp_drv.c
-@@ -197,9 +197,7 @@ static const struct file_operations fops
- 	.open = drm_open,
- 	.release = drm_release,
- 	.unlocked_ioctl = drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.poll = drm_poll,
- 	.read = drm_read,
- 	.llseek = noop_llseek,
---- a/drivers/gpu/drm/ast/ast_drv.c
-+++ b/drivers/gpu/drm/ast/ast_drv.c
-@@ -188,9 +188,7 @@ static const struct file_operations ast_
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = ast_mmap,
- 	.poll = drm_poll,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.read = drm_read,
- };
- 
---- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
-+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
-@@ -749,9 +749,7 @@ static const struct file_operations fops
- 	.open               = drm_open,
- 	.release            = drm_release,
- 	.unlocked_ioctl     = drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl       = drm_compat_ioctl,
--#endif
- 	.poll               = drm_poll,
- 	.read               = drm_read,
- 	.llseek             = no_llseek,
---- a/drivers/gpu/drm/bochs/bochs_drv.c
-+++ b/drivers/gpu/drm/bochs/bochs_drv.c
-@@ -70,9 +70,7 @@ static const struct file_operations boch
- 	.open		= drm_open,
- 	.release	= drm_release,
- 	.unlocked_ioctl	= drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl	= drm_compat_ioctl,
--#endif
- 	.poll		= drm_poll,
- 	.read		= drm_read,
- 	.llseek		= no_llseek,
---- a/drivers/gpu/drm/cirrus/cirrus_drv.c
-+++ b/drivers/gpu/drm/cirrus/cirrus_drv.c
-@@ -126,9 +126,7 @@ static const struct file_operations cirr
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = cirrus_mmap,
- 	.poll = drm_poll,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- };
- static struct drm_driver driver = {
- 	.driver_features = DRIVER_MODESET | DRIVER_GEM,
---- a/drivers/gpu/drm/drm_fops.c
-+++ b/drivers/gpu/drm/drm_fops.c
-@@ -51,10 +51,11 @@ DEFINE_MUTEX(drm_global_mutex);
-  * Drivers must define the file operations structure that forms the DRM
-  * userspace API entry point, even though most of those operations are
-  * implemented in the DRM core. The mandatory functions are drm_open(),
-- * drm_read(), drm_ioctl() and drm_compat_ioctl if CONFIG_COMPAT is enabled.
-- * Drivers which implement private ioctls that require 32/64 bit compatibility
-- * support must provided their onw .compat_ioctl() handler that processes
-- * private ioctls and calls drm_compat_ioctl() for core ioctls.
-+ * drm_read(), drm_ioctl() and drm_compat_ioctl() if CONFIG_COMPAT is enabled
-+ * (note that drm_compat_ioctl will be NULL if CONFIG_COMPAT=n). Drivers which
-+ * implement private ioctls that require 32/64 bit compatibility support must
-+ * provide their own .compat_ioctl() handler that processes private ioctls and
-+ * calls drm_compat_ioctl() for core ioctls.
-  *
-  * In addition drm_read() and drm_poll() provide support for DRM events. DRM
-  * events are a generic and extensible means to send asynchronous events to
-@@ -75,9 +76,7 @@ DEFINE_MUTEX(drm_global_mutex);
-  *             .open = drm_open,
-  *             .release = drm_release,
-  *             .unlocked_ioctl = drm_ioctl,
-- *     #ifdef CONFIG_COMPAT
-- *             .compat_ioctl = drm_compat_ioctl,
-- *     #endif
-+ *             .compat_ioctl = drm_compat_ioctl, // NULL if CONFIG_COMPAT=n
-  *             .poll = drm_poll,
-  *             .read = drm_read,
-  *             .llseek = no_llseek,
---- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
-+++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
-@@ -478,9 +478,7 @@ static const struct file_operations fops
- 	.open               = drm_open,
- 	.release            = drm_release,
- 	.unlocked_ioctl     = drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl       = drm_compat_ioctl,
--#endif
- 	.poll               = drm_poll,
- 	.read               = drm_read,
- 	.llseek             = no_llseek,
---- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
-+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
-@@ -366,9 +366,7 @@ static const struct file_operations exyn
- 	.poll		= drm_poll,
- 	.read		= drm_read,
- 	.unlocked_ioctl	= drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.release	= drm_release,
- };
- 
---- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
-+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
-@@ -176,9 +176,7 @@ static const struct file_operations fsl_
- 	.open		= drm_open,
- 	.release	= drm_release,
- 	.unlocked_ioctl	= drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl	= drm_compat_ioctl,
--#endif
- 	.poll		= drm_poll,
- 	.read		= drm_read,
- 	.llseek		= no_llseek,
---- a/drivers/gpu/drm/gma500/psb_drv.c
-+++ b/drivers/gpu/drm/gma500/psb_drv.c
-@@ -473,9 +473,7 @@ static const struct file_operations psb_
- 	.open = drm_open,
- 	.release = drm_release,
- 	.unlocked_ioctl = psb_unlocked_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.mmap = drm_gem_mmap,
- 	.poll = drm_poll,
- 	.read = drm_read,
---- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
-+++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
-@@ -151,9 +151,7 @@ static const struct file_operations kiri
- 	.open		= drm_open,
- 	.release	= drm_release,
- 	.unlocked_ioctl	= drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl	= drm_compat_ioctl,
--#endif
- 	.poll		= drm_poll,
- 	.read		= drm_read,
- 	.llseek		= no_llseek,
---- a/drivers/gpu/drm/i810/i810_dma.c
-+++ b/drivers/gpu/drm/i810/i810_dma.c
-@@ -113,9 +113,7 @@ static const struct file_operations i810
- 	.release = drm_release,
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = i810_mmap_buffers,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.llseek = noop_llseek,
- };
- 
---- a/drivers/gpu/drm/i810/i810_drv.c
-+++ b/drivers/gpu/drm/i810/i810_drv.c
-@@ -49,9 +49,7 @@ static const struct file_operations i810
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = drm_legacy_mmap,
- 	.poll = drm_poll,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.llseek = noop_llseek,
- };
- 
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -2502,9 +2502,7 @@ static const struct file_operations i915
- 	.mmap = drm_gem_mmap,
- 	.poll = drm_poll,
- 	.read = drm_read,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = i915_compat_ioctl,
--#endif
- 	.llseek = noop_llseek,
- };
- 
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -2880,6 +2880,8 @@ __i915_printk(struct drm_i915_private *d
- #ifdef CONFIG_COMPAT
- extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
- 			      unsigned long arg);
-+#else
-+#define i915_compat_ioctl NULL
- #endif
- extern const struct dev_pm_ops i915_pm_ops;
- 
---- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
-+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
-@@ -248,9 +248,7 @@ static const struct file_operations mtk_
- 	.mmap = mtk_drm_gem_mmap,
- 	.poll = drm_poll,
- 	.read = drm_read,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- };
- 
- static struct drm_driver mtk_drm_driver = {
---- a/drivers/gpu/drm/mgag200/mgag200_drv.c
-+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
-@@ -82,9 +82,7 @@ static const struct file_operations mgag
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = mgag200_mmap,
- 	.poll = drm_poll,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.read = drm_read,
- };
- 
---- a/drivers/gpu/drm/msm/msm_drv.c
-+++ b/drivers/gpu/drm/msm/msm_drv.c
-@@ -766,9 +766,7 @@ static const struct file_operations fops
- 	.open               = drm_open,
- 	.release            = drm_release,
- 	.unlocked_ioctl     = drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl       = drm_compat_ioctl,
--#endif
- 	.poll               = drm_poll,
- 	.read               = drm_read,
- 	.llseek             = no_llseek,
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -201,9 +201,7 @@ static const struct file_operations rcar
- 	.open		= drm_open,
- 	.release	= drm_release,
- 	.unlocked_ioctl	= drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl	= drm_compat_ioctl,
--#endif
- 	.poll		= drm_poll,
- 	.read		= drm_read,
- 	.llseek		= no_llseek,
---- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
-+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
-@@ -274,9 +274,7 @@ static const struct file_operations rock
- 	.poll = drm_poll,
- 	.read = drm_read,
- 	.unlocked_ioctl = drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.release = drm_release,
- };
- 
---- a/drivers/gpu/drm/savage/savage_drv.c
-+++ b/drivers/gpu/drm/savage/savage_drv.c
-@@ -42,9 +42,7 @@ static const struct file_operations sava
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = drm_legacy_mmap,
- 	.poll = drm_poll,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.llseek = noop_llseek,
- };
- 
---- a/drivers/gpu/drm/shmobile/shmob_drm_drv.c
-+++ b/drivers/gpu/drm/shmobile/shmob_drm_drv.c
-@@ -245,9 +245,7 @@ static const struct file_operations shmo
- 	.open		= drm_open,
- 	.release	= drm_release,
- 	.unlocked_ioctl	= drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl	= drm_compat_ioctl,
--#endif
- 	.poll		= drm_poll,
- 	.read		= drm_read,
- 	.llseek		= no_llseek,
---- a/drivers/gpu/drm/sis/sis_drv.c
-+++ b/drivers/gpu/drm/sis/sis_drv.c
-@@ -72,9 +72,7 @@ static const struct file_operations sis_
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = drm_legacy_mmap,
- 	.poll = drm_poll,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.llseek = noop_llseek,
- };
- 
---- a/drivers/gpu/drm/sti/sti_drv.c
-+++ b/drivers/gpu/drm/sti/sti_drv.c
-@@ -296,9 +296,7 @@ static const struct file_operations sti_
- 	.poll = drm_poll,
- 	.read = drm_read,
- 	.unlocked_ioctl = drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.release = drm_release,
- };
- 
---- a/drivers/gpu/drm/sun4i/sun4i_drv.c
-+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
-@@ -59,9 +59,7 @@ static const struct file_operations sun4
- 	.open		= drm_open,
- 	.release	= drm_release,
- 	.unlocked_ioctl	= drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl	= drm_compat_ioctl,
--#endif
- 	.poll		= drm_poll,
- 	.read		= drm_read,
- 	.llseek		= no_llseek,
---- a/drivers/gpu/drm/tdfx/tdfx_drv.c
-+++ b/drivers/gpu/drm/tdfx/tdfx_drv.c
-@@ -49,9 +49,7 @@ static const struct file_operations tdfx
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = drm_legacy_mmap,
- 	.poll = drm_poll,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.llseek = noop_llseek,
- };
- 
---- a/drivers/gpu/drm/tegra/drm.c
-+++ b/drivers/gpu/drm/tegra/drm.c
-@@ -802,9 +802,7 @@ static const struct file_operations tegr
- 	.mmap = tegra_drm_mmap,
- 	.poll = drm_poll,
- 	.read = drm_read,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.llseek = noop_llseek,
- };
- 
---- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
-+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
-@@ -573,9 +573,7 @@ static const struct file_operations fops
- 	.open               = drm_open,
- 	.release            = drm_release,
- 	.unlocked_ioctl     = drm_ioctl,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl       = drm_compat_ioctl,
--#endif
- 	.poll               = drm_poll,
- 	.read               = drm_read,
- 	.llseek             = no_llseek,
---- a/drivers/gpu/drm/udl/udl_drv.c
-+++ b/drivers/gpu/drm/udl/udl_drv.c
-@@ -44,9 +44,7 @@ static const struct file_operations udl_
- 	.read = drm_read,
- 	.unlocked_ioctl	= drm_ioctl,
- 	.release = drm_release,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.llseek = noop_llseek,
- };
- 
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -106,9 +106,7 @@ static const struct file_operations vc4_
- 	.mmap = vc4_mmap,
- 	.poll = drm_poll,
- 	.read = drm_read,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.llseek = noop_llseek,
- };
- 
---- a/drivers/gpu/drm/via/via_drv.c
-+++ b/drivers/gpu/drm/via/via_drv.c
-@@ -64,9 +64,7 @@ static const struct file_operations via_
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = drm_legacy_mmap,
- 	.poll = drm_poll,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.llseek = noop_llseek,
- };
- 
---- a/drivers/gpu/drm/virtio/virtgpu_drv.c
-+++ b/drivers/gpu/drm/virtio/virtgpu_drv.c
-@@ -108,9 +108,7 @@ static const struct file_operations virt
- 	.read = drm_read,
- 	.unlocked_ioctl	= drm_ioctl,
- 	.release = drm_release,
--#ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
--#endif
- 	.llseek = noop_llseek,
- };
- 
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -943,8 +943,13 @@ static inline bool drm_is_primary_client
- extern int drm_ioctl_permit(u32 flags, struct drm_file *file_priv);
- extern long drm_ioctl(struct file *filp,
- 		      unsigned int cmd, unsigned long arg);
-+#ifdef CONFIG_COMPAT
- extern long drm_compat_ioctl(struct file *filp,
- 			     unsigned int cmd, unsigned long arg);
-+#else
-+/* Let drm_compat_ioctl be assigned to .compat_ioctl unconditionally */
-+#define drm_compat_ioctl NULL
-+#endif
- extern bool drm_ioctl_flags(unsigned int nr, unsigned int *flags);
- 
- /* File Operations (drm_fops.c) */
diff --git a/patches.renesas/0043-arm64-defconfig-Enable-video-DRM-and-LPASS-drivers-f.patch b/patches.renesas/0043-arm64-defconfig-Enable-video-DRM-and-LPASS-drivers-f.patch
deleted file mode 100644
index dcb3c6315d2e75..00000000000000
--- a/patches.renesas/0043-arm64-defconfig-Enable-video-DRM-and-LPASS-drivers-f.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From c9cd2211b24a94d89ca0a44ecd9bf8b1660e67f9 Mon Sep 17 00:00:00 2001
-From: Krzysztof Kozlowski <krzk@kernel.org>
-Date: Tue, 14 Mar 2017 19:10:26 +0200
-Subject: [PATCH 043/286] arm64: defconfig: Enable video, DRM and LPASS drivers
- for Exynos5433 and Exynos7
-
-Enable drivers specific to Exynos5433 and Exynos7:
-1. MFD Low Power Audio SubSystem (LPASS),
-2. DRM drivers (DECON display, outputs),
-3. Drivers for video-related sub-blocks (JPEG, Multi Format Codec,
-   GScaler).
-
-Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
-Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
-(cherry picked from commit 0edf17984f251e633465e028a0115d57b1b7eb88)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/configs/defconfig |   11 +++++++++++
- 1 file changed, 11 insertions(+)
-
---- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -281,6 +281,7 @@ CONFIG_RENESAS_WDT=y
- CONFIG_S3C2410_WATCHDOG=y
- CONFIG_MESON_GXBB_WATCHDOG=m
- CONFIG_MESON_WATCHDOG=m
-+CONFIG_MFD_EXYNOS_LPASS=m
- CONFIG_MFD_MAX77620=y
- CONFIG_MFD_SPMI_PMIC=y
- CONFIG_MFD_SEC_CORE=y
-@@ -304,10 +305,20 @@ CONFIG_MEDIA_CONTROLLER=y
- CONFIG_VIDEO_V4L2_SUBDEV_API=y
- # CONFIG_DVB_NET is not set
- CONFIG_V4L_MEM2MEM_DRIVERS=y
-+CONFIG_VIDEO_SAMSUNG_S5P_JPEG=m
-+CONFIG_VIDEO_SAMSUNG_S5P_MFC=m
-+CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m
- CONFIG_VIDEO_RENESAS_FCP=m
- CONFIG_VIDEO_RENESAS_VSP1=m
- CONFIG_DRM=m
- CONFIG_DRM_NOUVEAU=m
-+CONFIG_DRM_EXYNOS=m
-+CONFIG_DRM_EXYNOS5433_DECON=y
-+CONFIG_DRM_EXYNOS7_DECON=y
-+CONFIG_DRM_EXYNOS_DSI=y
-+# CONFIG_DRM_EXYNOS_DP is not set
-+CONFIG_DRM_EXYNOS_HDMI=y
-+CONFIG_DRM_EXYNOS_MIC=y
- CONFIG_DRM_RCAR_DU=m
- CONFIG_DRM_RCAR_HDMI=y
- CONFIG_DRM_RCAR_LVDS=y
diff --git a/patches.renesas/0043-arm64-dts-r8a7796-Add-R-Car-Gen3-thermal-support.patch b/patches.renesas/0043-arm64-dts-r8a7796-Add-R-Car-Gen3-thermal-support.patch
deleted file mode 100644
index 5abafffbc64ed2..00000000000000
--- a/patches.renesas/0043-arm64-dts-r8a7796-Add-R-Car-Gen3-thermal-support.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From a61ac2d76175c1a9516c9becd87aff9a37c4214e Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Fri, 20 Jan 2017 12:26:43 +0100
-Subject: [PATCH 043/255] arm64: dts: r8a7796: Add R-Car Gen3 thermal support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Hien Dang <hien.dang.eb@renesas.com>
-Signed-off-by: Thao Nguyen <thao.nguyen.yb@rvc.renesas.com>
-Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Acked-by: Eduardo Valentin <edubezval@gmail.com>
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit af25d1c2a9cac5fde6e77836c33a3689077ffd2a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   58 +++++++++++++++++++++++++++++++
- 1 file changed, 58 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -679,5 +679,63 @@
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
-+
-+		tsc: thermal@e6198000 {
-+			compatible = "renesas,r8a7796-thermal";
-+			reg = <0 0xe6198000 0 0x68>,
-+			      <0 0xe61a0000 0 0x5c>,
-+			      <0 0xe61a8000 0 0x5c>;
-+			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 522>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			#thermal-sensor-cells = <1>;
-+			status = "okay";
-+		};
-+
-+		thermal-zones {
-+			sensor_thermal1: sensor-thermal1 {
-+				polling-delay-passive = <250>;
-+				polling-delay = <1000>;
-+				thermal-sensors = <&tsc 0>;
-+
-+				trips {
-+					sensor1_crit: sensor1-crit {
-+						temperature = <120000>;
-+						hysteresis = <2000>;
-+						type = "critical";
-+					};
-+				};
-+			};
-+
-+			sensor_thermal2: sensor-thermal2 {
-+				polling-delay-passive = <250>;
-+				polling-delay = <1000>;
-+				thermal-sensors = <&tsc 1>;
-+
-+				trips {
-+					sensor2_crit: sensor2-crit {
-+						temperature = <120000>;
-+						hysteresis = <2000>;
-+						type = "critical";
-+					};
-+				};
-+			};
-+
-+			sensor_thermal3: sensor-thermal3 {
-+				polling-delay-passive = <250>;
-+				polling-delay = <1000>;
-+				thermal-sensors = <&tsc 2>;
-+
-+				trips {
-+					sensor3_crit: sensor3-crit {
-+						temperature = <120000>;
-+						hysteresis = <2000>;
-+						type = "critical";
-+					};
-+				};
-+			};
-+		};
- 	};
- };
diff --git a/patches.renesas/0043-drm-Make-the-connector-.detect-callback-optional.patch b/patches.renesas/0043-drm-Make-the-connector-.detect-callback-optional.patch
deleted file mode 100644
index d86cd3488bc039..00000000000000
--- a/patches.renesas/0043-drm-Make-the-connector-.detect-callback-optional.patch
+++ /dev/null
@@ -1,631 +0,0 @@
-From c2d0c49598a6954c4e7f1fd2f27da02f5b01212c Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 29 Nov 2016 22:56:30 +0200
-Subject: [PATCH 043/299] drm: Make the connector .detect() callback optional
-
-Many drivers (21 to be exact) create connectors that are always
-connected (for instance to an LVDS or DSI panel). Instead of forcing
-them to implement a dummy .detect() handler, make the callback optional
-and consider the connector as always connected in that case.
-
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Jyri Sarha <jsarha@ti.com>
-Acked-by: Jani Nikula <jani.nikula@intel.com>
-Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
-Acked-by: Vincent Abriou <vincent.abriou@st.com>
-Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-[seanpaul fixed small conflict in rcar-du/rcar_du_lvdscon.c]
-Signed-off-by: Sean Paul <seanpaul@chromium.org>
-
-(cherry picked from commit 949f08862d662f17b9d2929c6afb2d4e8f5d50cb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/arc/arcpgu_sim.c          |    7 -------
- drivers/gpu/drm/ast/ast_mode.c            |    7 -------
- drivers/gpu/drm/bochs/bochs_kms.c         |    7 -------
- drivers/gpu/drm/bridge/nxp-ptn3460.c      |    7 -------
- drivers/gpu/drm/bridge/parade-ps8622.c    |    7 -------
- drivers/gpu/drm/bridge/tc358767.c         |    7 -------
- drivers/gpu/drm/cirrus/cirrus_mode.c      |    7 -------
- drivers/gpu/drm/drm_probe_helper.c        |   14 +++++++++++---
- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c |    7 -------
- drivers/gpu/drm/gma500/cdv_intel_lvds.c   |   14 --------------
- drivers/gpu/drm/gma500/psb_intel_lvds.c   |   14 --------------
- drivers/gpu/drm/i915/intel_dsi.c          |    7 -------
- drivers/gpu/drm/imx/imx-ldb.c             |    7 -------
- drivers/gpu/drm/imx/imx-tve.c             |    7 -------
- drivers/gpu/drm/imx/parallel-display.c    |    7 -------
- drivers/gpu/drm/mediatek/mtk_dsi.c        |    7 -------
- drivers/gpu/drm/mgag200/mgag200_mode.c    |    7 -------
- drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c |    7 -------
- drivers/gpu/drm/rockchip/dw-mipi-dsi.c    |    7 -------
- drivers/gpu/drm/shmobile/shmob_drm_crtc.c |    7 -------
- drivers/gpu/drm/sti/sti_hda.c             |    7 -------
- drivers/gpu/drm/sun4i/sun4i_rgb.c         |    7 -------
- drivers/gpu/drm/sun4i/sun4i_tv.c          |    7 -------
- drivers/gpu/drm/tilcdc/tilcdc_panel.c     |    8 --------
- include/drm/drm_connector.h               |    3 +++
- 25 files changed, 14 insertions(+), 179 deletions(-)
-
---- a/drivers/gpu/drm/arc/arcpgu_sim.c
-+++ b/drivers/gpu/drm/arc/arcpgu_sim.c
-@@ -41,12 +41,6 @@ static int arcpgu_drm_connector_get_mode
- 	return count;
- }
- 
--static enum drm_connector_status
--arcpgu_drm_connector_detect(struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static void arcpgu_drm_connector_destroy(struct drm_connector *connector)
- {
- 	drm_connector_unregister(connector);
-@@ -61,7 +55,6 @@ arcpgu_drm_connector_helper_funcs = {
- static const struct drm_connector_funcs arcpgu_drm_connector_funcs = {
- 	.dpms = drm_helper_connector_dpms,
- 	.reset = drm_atomic_helper_connector_reset,
--	.detect = arcpgu_drm_connector_detect,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
- 	.destroy = arcpgu_drm_connector_destroy,
- 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
---- a/drivers/gpu/drm/ast/ast_mode.c
-+++ b/drivers/gpu/drm/ast/ast_mode.c
-@@ -839,12 +839,6 @@ static void ast_connector_destroy(struct
- 	kfree(connector);
- }
- 
--static enum drm_connector_status
--ast_connector_detect(struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static const struct drm_connector_helper_funcs ast_connector_helper_funcs = {
- 	.mode_valid = ast_mode_valid,
- 	.get_modes = ast_get_modes,
-@@ -853,7 +847,6 @@ static const struct drm_connector_helper
- 
- static const struct drm_connector_funcs ast_connector_funcs = {
- 	.dpms = drm_helper_connector_dpms,
--	.detect = ast_connector_detect,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
- 	.destroy = ast_connector_destroy,
- };
---- a/drivers/gpu/drm/bochs/bochs_kms.c
-+++ b/drivers/gpu/drm/bochs/bochs_kms.c
-@@ -216,12 +216,6 @@ bochs_connector_best_encoder(struct drm_
- 	return NULL;
- }
- 
--static enum drm_connector_status bochs_connector_detect(struct drm_connector
--							*connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static const struct drm_connector_helper_funcs bochs_connector_connector_helper_funcs = {
- 	.get_modes = bochs_connector_get_modes,
- 	.mode_valid = bochs_connector_mode_valid,
-@@ -230,7 +224,6 @@ static const struct drm_connector_helper
- 
- static const struct drm_connector_funcs bochs_connector_connector_funcs = {
- 	.dpms = drm_helper_connector_dpms,
--	.detect = bochs_connector_detect,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
- 	.destroy = drm_connector_cleanup,
- };
---- a/drivers/gpu/drm/bridge/nxp-ptn3460.c
-+++ b/drivers/gpu/drm/bridge/nxp-ptn3460.c
-@@ -239,16 +239,9 @@ static const struct drm_connector_helper
- 	.get_modes = ptn3460_get_modes,
- };
- 
--static enum drm_connector_status ptn3460_detect(struct drm_connector *connector,
--		bool force)
--{
--	return connector_status_connected;
--}
--
- static const struct drm_connector_funcs ptn3460_connector_funcs = {
- 	.dpms = drm_atomic_helper_connector_dpms,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
--	.detect = ptn3460_detect,
- 	.destroy = drm_connector_cleanup,
- 	.reset = drm_atomic_helper_connector_reset,
- 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
---- a/drivers/gpu/drm/bridge/parade-ps8622.c
-+++ b/drivers/gpu/drm/bridge/parade-ps8622.c
-@@ -477,16 +477,9 @@ static const struct drm_connector_helper
- 	.get_modes = ps8622_get_modes,
- };
- 
--static enum drm_connector_status ps8622_detect(struct drm_connector *connector,
--								bool force)
--{
--	return connector_status_connected;
--}
--
- static const struct drm_connector_funcs ps8622_connector_funcs = {
- 	.dpms = drm_atomic_helper_connector_dpms,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
--	.detect = ps8622_detect,
- 	.destroy = drm_connector_cleanup,
- 	.reset = drm_atomic_helper_connector_reset,
- 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
---- a/drivers/gpu/drm/bridge/tc358767.c
-+++ b/drivers/gpu/drm/bridge/tc358767.c
-@@ -1042,12 +1042,6 @@ err:
- 	return ret;
- }
- 
--static enum drm_connector_status
--tc_connector_detect(struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static void tc_bridge_pre_enable(struct drm_bridge *bridge)
- {
- 	struct tc_data *tc = bridge_to_tc(bridge);
-@@ -1175,7 +1169,6 @@ static const struct drm_connector_helper
- static const struct drm_connector_funcs tc_connector_funcs = {
- 	.dpms = drm_atomic_helper_connector_dpms,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
--	.detect = tc_connector_detect,
- 	.destroy = drm_connector_cleanup,
- 	.reset = drm_atomic_helper_connector_reset,
- 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
---- a/drivers/gpu/drm/cirrus/cirrus_mode.c
-+++ b/drivers/gpu/drm/cirrus/cirrus_mode.c
-@@ -498,12 +498,6 @@ static struct drm_encoder *cirrus_connec
- 	return NULL;
- }
- 
--static enum drm_connector_status cirrus_vga_detect(struct drm_connector
--						   *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static void cirrus_connector_destroy(struct drm_connector *connector)
- {
- 	drm_connector_cleanup(connector);
-@@ -517,7 +511,6 @@ static const struct drm_connector_helper
- 
- static const struct drm_connector_funcs cirrus_vga_connector_funcs = {
- 	.dpms = drm_helper_connector_dpms,
--	.detect = cirrus_vga_detect,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
- 	.destroy = cirrus_connector_destroy,
- };
---- a/drivers/gpu/drm/drm_probe_helper.c
-+++ b/drivers/gpu/drm/drm_probe_helper.c
-@@ -162,6 +162,14 @@ void drm_kms_helper_poll_enable_locked(s
- }
- EXPORT_SYMBOL(drm_kms_helper_poll_enable_locked);
- 
-+static enum drm_connector_status
-+drm_connector_detect(struct drm_connector *connector, bool force)
-+{
-+	return connector->funcs->detect ?
-+		connector->funcs->detect(connector, force) :
-+		connector_status_connected;
-+}
-+
- /**
-  * drm_helper_probe_single_connector_modes - get complete set of display modes
-  * @connector: connector to probe
-@@ -249,7 +257,7 @@ int drm_helper_probe_single_connector_mo
- 		if (connector->funcs->force)
- 			connector->funcs->force(connector);
- 	} else {
--		connector->status = connector->funcs->detect(connector, true);
-+		connector->status = drm_connector_detect(connector, true);
- 	}
- 
- 	/*
-@@ -415,7 +423,7 @@ static void output_poll_execute(struct w
- 
- 		repoll = true;
- 
--		connector->status = connector->funcs->detect(connector, false);
-+		connector->status = drm_connector_detect(connector, false);
- 		if (old_status != connector->status) {
- 			const char *old, *new;
- 
-@@ -595,7 +603,7 @@ bool drm_helper_hpd_irq_event(struct drm
- 
- 		old_status = connector->status;
- 
--		connector->status = connector->funcs->detect(connector, false);
-+		connector->status = drm_connector_detect(connector, false);
- 		DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %s to %s\n",
- 			      connector->base.id,
- 			      connector->name,
---- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c
-+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c
-@@ -58,17 +58,10 @@ static void fsl_dcu_drm_connector_destro
- 	drm_connector_cleanup(connector);
- }
- 
--static enum drm_connector_status
--fsl_dcu_drm_connector_detect(struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static const struct drm_connector_funcs fsl_dcu_drm_connector_funcs = {
- 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
- 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
- 	.destroy = fsl_dcu_drm_connector_destroy,
--	.detect = fsl_dcu_drm_connector_detect,
- 	.dpms = drm_atomic_helper_connector_dpms,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
- 	.reset = drm_atomic_helper_connector_reset,
---- a/drivers/gpu/drm/gma500/cdv_intel_lvds.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
-@@ -387,19 +387,6 @@ static void cdv_intel_lvds_mode_set(stru
- }
- 
- /**
-- * Detect the LVDS connection.
-- *
-- * This always returns CONNECTOR_STATUS_CONNECTED.
-- * This connector should only have
-- * been set up if the LVDS was actually connected anyway.
-- */
--static enum drm_connector_status cdv_intel_lvds_detect(
--				struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
--/**
-  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
-  */
- static int cdv_intel_lvds_get_modes(struct drm_connector *connector)
-@@ -521,7 +508,6 @@ static const struct drm_connector_helper
- 
- static const struct drm_connector_funcs cdv_intel_lvds_connector_funcs = {
- 	.dpms = drm_helper_connector_dpms,
--	.detect = cdv_intel_lvds_detect,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
- 	.set_property = cdv_intel_lvds_set_property,
- 	.destroy = cdv_intel_lvds_destroy,
---- a/drivers/gpu/drm/gma500/psb_intel_lvds.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_lvds.c
-@@ -500,19 +500,6 @@ static void psb_intel_lvds_mode_set(stru
- }
- 
- /*
-- * Detect the LVDS connection.
-- *
-- * This always returns CONNECTOR_STATUS_CONNECTED.
-- * This connector should only have
-- * been set up if the LVDS was actually connected anyway.
-- */
--static enum drm_connector_status psb_intel_lvds_detect(struct drm_connector
--						   *connector, bool force)
--{
--	return connector_status_connected;
--}
--
--/*
-  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
-  */
- static int psb_intel_lvds_get_modes(struct drm_connector *connector)
-@@ -643,7 +630,6 @@ const struct drm_connector_helper_funcs
- 
- const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
- 	.dpms = drm_helper_connector_dpms,
--	.detect = psb_intel_lvds_detect,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
- 	.set_property = psb_intel_lvds_set_property,
- 	.destroy = psb_intel_lvds_destroy,
---- a/drivers/gpu/drm/i915/intel_dsi.c
-+++ b/drivers/gpu/drm/i915/intel_dsi.c
-@@ -1299,12 +1299,6 @@ static void intel_dsi_prepare(struct int
- 	}
- }
- 
--static enum drm_connector_status
--intel_dsi_detect(struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static int intel_dsi_get_modes(struct drm_connector *connector)
- {
- 	struct intel_connector *intel_connector = to_intel_connector(connector);
-@@ -1408,7 +1402,6 @@ static const struct drm_connector_helper
- 
- static const struct drm_connector_funcs intel_dsi_connector_funcs = {
- 	.dpms = drm_atomic_helper_connector_dpms,
--	.detect = intel_dsi_detect,
- 	.late_register = intel_connector_register,
- 	.early_unregister = intel_connector_unregister,
- 	.destroy = intel_dsi_connector_destroy,
---- a/drivers/gpu/drm/imx/imx-ldb.c
-+++ b/drivers/gpu/drm/imx/imx-ldb.c
-@@ -101,12 +101,6 @@ struct imx_ldb {
- 	const struct bus_mux *lvds_mux;
- };
- 
--static enum drm_connector_status imx_ldb_connector_detect(
--		struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel *imx_ldb_ch,
- 				      u32 bus_format)
- {
-@@ -409,7 +403,6 @@ static int imx_ldb_encoder_atomic_check(
- static const struct drm_connector_funcs imx_ldb_connector_funcs = {
- 	.dpms = drm_atomic_helper_connector_dpms,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
--	.detect = imx_ldb_connector_detect,
- 	.destroy = imx_drm_connector_destroy,
- 	.reset = drm_atomic_helper_connector_reset,
- 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
---- a/drivers/gpu/drm/imx/imx-tve.c
-+++ b/drivers/gpu/drm/imx/imx-tve.c
-@@ -229,12 +229,6 @@ static int tve_setup_vga(struct imx_tve
- 				 TVE_TVDAC_TEST_MODE_MASK, 1);
- }
- 
--static enum drm_connector_status imx_tve_connector_detect(
--				struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static int imx_tve_connector_get_modes(struct drm_connector *connector)
- {
- 	struct imx_tve *tve = con_to_tve(connector);
-@@ -354,7 +348,6 @@ static int imx_tve_atomic_check(struct d
- static const struct drm_connector_funcs imx_tve_connector_funcs = {
- 	.dpms = drm_atomic_helper_connector_dpms,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
--	.detect = imx_tve_connector_detect,
- 	.destroy = imx_drm_connector_destroy,
- 	.reset = drm_atomic_helper_connector_reset,
- 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
---- a/drivers/gpu/drm/imx/parallel-display.c
-+++ b/drivers/gpu/drm/imx/parallel-display.c
-@@ -49,12 +49,6 @@ static inline struct imx_parallel_displa
- 	return container_of(e, struct imx_parallel_display, encoder);
- }
- 
--static enum drm_connector_status imx_pd_connector_detect(
--		struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static int imx_pd_connector_get_modes(struct drm_connector *connector)
- {
- 	struct imx_parallel_display *imxpd = con_to_imxpd(connector);
-@@ -143,7 +137,6 @@ static int imx_pd_encoder_atomic_check(s
- static const struct drm_connector_funcs imx_pd_connector_funcs = {
- 	.dpms = drm_atomic_helper_connector_dpms,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
--	.detect = imx_pd_connector_detect,
- 	.destroy = imx_drm_connector_destroy,
- 	.reset = drm_atomic_helper_connector_reset,
- 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
---- a/drivers/gpu/drm/mediatek/mtk_dsi.c
-+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
-@@ -594,12 +594,6 @@ static void mtk_dsi_encoder_enable(struc
- 	mtk_output_dsi_enable(dsi);
- }
- 
--static enum drm_connector_status mtk_dsi_connector_detect(
--	struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static int mtk_dsi_connector_get_modes(struct drm_connector *connector)
- {
- 	struct mtk_dsi *dsi = connector_to_dsi(connector);
-@@ -616,7 +610,6 @@ static const struct drm_encoder_helper_f
- 
- static const struct drm_connector_funcs mtk_dsi_connector_funcs = {
- 	.dpms = drm_atomic_helper_connector_dpms,
--	.detect = mtk_dsi_connector_detect,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
- 	.destroy = drm_connector_cleanup,
- 	.reset = drm_atomic_helper_connector_reset,
---- a/drivers/gpu/drm/mgag200/mgag200_mode.c
-+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
-@@ -1658,12 +1658,6 @@ static struct drm_encoder *mga_connector
- 	return NULL;
- }
- 
--static enum drm_connector_status mga_vga_detect(struct drm_connector
--						   *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static void mga_connector_destroy(struct drm_connector *connector)
- {
- 	struct mga_connector *mga_connector = to_mga_connector(connector);
-@@ -1680,7 +1674,6 @@ static const struct drm_connector_helper
- 
- static const struct drm_connector_funcs mga_vga_connector_funcs = {
- 	.dpms = drm_helper_connector_dpms,
--	.detect = mga_vga_detect,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
- 	.destroy = mga_connector_destroy,
- };
---- a/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
-@@ -61,16 +61,9 @@ static const struct drm_connector_helper
- 	.get_modes = rcar_du_lvds_connector_get_modes,
- };
- 
--static enum drm_connector_status
--rcar_du_lvds_connector_detect(struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static const struct drm_connector_funcs connector_funcs = {
- 	.dpms = drm_atomic_helper_connector_dpms,
- 	.reset = drm_atomic_helper_connector_reset,
--	.detect = rcar_du_lvds_connector_detect,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
- 	.destroy = drm_connector_cleanup,
- 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
---- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
-+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
-@@ -969,12 +969,6 @@ static struct drm_connector_helper_funcs
- 	.mode_valid = dw_mipi_dsi_mode_valid,
- };
- 
--static enum drm_connector_status
--dw_mipi_dsi_detect(struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static void dw_mipi_dsi_drm_connector_destroy(struct drm_connector *connector)
- {
- 	drm_connector_unregister(connector);
-@@ -984,7 +978,6 @@ static void dw_mipi_dsi_drm_connector_de
- static struct drm_connector_funcs dw_mipi_dsi_atomic_connector_funcs = {
- 	.dpms = drm_atomic_helper_connector_dpms,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
--	.detect = dw_mipi_dsi_detect,
- 	.destroy = dw_mipi_dsi_drm_connector_destroy,
- 	.reset = drm_atomic_helper_connector_reset,
- 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
---- a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
-+++ b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
-@@ -669,15 +669,8 @@ static void shmob_drm_connector_destroy(
- 	drm_connector_cleanup(connector);
- }
- 
--static enum drm_connector_status
--shmob_drm_connector_detect(struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static const struct drm_connector_funcs connector_funcs = {
- 	.dpms = drm_helper_connector_dpms,
--	.detect = shmob_drm_connector_detect,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
- 	.destroy = shmob_drm_connector_destroy,
- };
---- a/drivers/gpu/drm/sti/sti_hda.c
-+++ b/drivers/gpu/drm/sti/sti_hda.c
-@@ -642,12 +642,6 @@ struct drm_connector_helper_funcs sti_hd
- 	.mode_valid = sti_hda_connector_mode_valid,
- };
- 
--static enum drm_connector_status
--sti_hda_connector_detect(struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static int sti_hda_late_register(struct drm_connector *connector)
- {
- 	struct sti_hda_connector *hda_connector
-@@ -665,7 +659,6 @@ static int sti_hda_late_register(struct
- static const struct drm_connector_funcs sti_hda_connector_funcs = {
- 	.dpms = drm_atomic_helper_connector_dpms,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
--	.detect = sti_hda_connector_detect,
- 	.destroy = drm_connector_cleanup,
- 	.reset = drm_atomic_helper_connector_reset,
- 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
---- a/drivers/gpu/drm/sun4i/sun4i_rgb.c
-+++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c
-@@ -110,12 +110,6 @@ static struct drm_connector_helper_funcs
- 	.mode_valid	= sun4i_rgb_mode_valid,
- };
- 
--static enum drm_connector_status
--sun4i_rgb_connector_detect(struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static void
- sun4i_rgb_connector_destroy(struct drm_connector *connector)
- {
-@@ -129,7 +123,6 @@ sun4i_rgb_connector_destroy(struct drm_c
- 
- static struct drm_connector_funcs sun4i_rgb_con_funcs = {
- 	.dpms			= drm_atomic_helper_connector_dpms,
--	.detect			= sun4i_rgb_connector_detect,
- 	.fill_modes		= drm_helper_probe_single_connector_modes,
- 	.destroy		= sun4i_rgb_connector_destroy,
- 	.reset			= drm_atomic_helper_connector_reset,
---- a/drivers/gpu/drm/sun4i/sun4i_tv.c
-+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
-@@ -537,12 +537,6 @@ static struct drm_connector_helper_funcs
- 	.mode_valid	= sun4i_tv_comp_mode_valid,
- };
- 
--static enum drm_connector_status
--sun4i_tv_comp_connector_detect(struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
- static void
- sun4i_tv_comp_connector_destroy(struct drm_connector *connector)
- {
-@@ -551,7 +545,6 @@ sun4i_tv_comp_connector_destroy(struct d
- 
- static struct drm_connector_funcs sun4i_tv_comp_connector_funcs = {
- 	.dpms			= drm_atomic_helper_connector_dpms,
--	.detect			= sun4i_tv_comp_connector_detect,
- 	.fill_modes		= drm_helper_probe_single_connector_modes,
- 	.destroy		= sun4i_tv_comp_connector_destroy,
- 	.reset			= drm_atomic_helper_connector_reset,
---- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
-+++ b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
-@@ -144,13 +144,6 @@ static void panel_connector_destroy(stru
- 	drm_connector_cleanup(connector);
- }
- 
--static enum drm_connector_status panel_connector_detect(
--		struct drm_connector *connector,
--		bool force)
--{
--	return connector_status_connected;
--}
--
- static int panel_connector_get_modes(struct drm_connector *connector)
- {
- 	struct drm_device *dev = connector->dev;
-@@ -197,7 +190,6 @@ static struct drm_encoder *panel_connect
- static const struct drm_connector_funcs panel_connector_funcs = {
- 	.destroy            = panel_connector_destroy,
- 	.dpms               = drm_atomic_helper_connector_dpms,
--	.detect             = panel_connector_detect,
- 	.fill_modes         = drm_helper_probe_single_connector_modes,
- 	.reset              = drm_atomic_helper_connector_reset,
- 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
---- a/include/drm/drm_connector.h
-+++ b/include/drm/drm_connector.h
-@@ -261,6 +261,9 @@ struct drm_connector_funcs {
- 	 * connector due to a user request. force can be used by the driver to
- 	 * avoid expensive, destructive operations during automated probing.
- 	 *
-+	 * This callback is optional, if not implemented the connector will be
-+	 * considered as always being attached.
-+	 *
- 	 * FIXME:
- 	 *
- 	 * Note that this hook is only called by the probe helper. It's not in
diff --git a/patches.renesas/0044-arm64-defconfig-enable-MVPP2.patch b/patches.renesas/0044-arm64-defconfig-enable-MVPP2.patch
deleted file mode 100644
index 55201f369db07f..00000000000000
--- a/patches.renesas/0044-arm64-defconfig-enable-MVPP2.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From e2210b65a559c0f434e6ca57092be519d00d9703 Mon Sep 17 00:00:00 2001
-From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-Date: Thu, 16 Mar 2017 16:16:28 +0100
-Subject: [PATCH 044/286] arm64: defconfig: enable MVPP2
-
-The MVPP2 network driver is used for the ARM64 Marvell Armada 7K and 8K
-platforms, so enable it in the arm64 defconfig.
-
-Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-(cherry picked from commit 66e56302842e9971426bd7e504c4db4f88cbb037)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/configs/defconfig |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -177,6 +177,7 @@ CONFIG_HNS_ENET=y
- CONFIG_E1000E=y
- CONFIG_IGB=y
- CONFIG_IGBVF=y
-+CONFIG_MVPP2=y
- CONFIG_MVNETA=y
- CONFIG_SKY2=y
- CONFIG_RAVB=y
diff --git a/patches.renesas/0044-arm64-dts-r8a7795-Link-ARM-GIC-to-clock-and-clock-do.patch b/patches.renesas/0044-arm64-dts-r8a7795-Link-ARM-GIC-to-clock-and-clock-do.patch
deleted file mode 100644
index 01e5772aa5b031..00000000000000
--- a/patches.renesas/0044-arm64-dts-r8a7795-Link-ARM-GIC-to-clock-and-clock-do.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 447566fcff6c7b5fc893f4139681b41ac15126f9 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 17 Jan 2017 13:49:19 +0100
-Subject: [PATCH 044/255] arm64: dts: r8a7795: Link ARM GIC to clock and clock
- domain
-
-Link the ARM GIC to the INTC-AP module clock, and add it to the SYSC
-"always-on" PM Domain, so it can be power managed using that clock.
-
-Note that currently the GIC-400 driver doesn't support module clocks nor
-Runtime PM, so this must be handled as a critical clock.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b6e56e4c1fd747028437956f48832452462ef407)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -166,6 +166,9 @@
- 			      <0x0 0xf1060000 0 0x20000>;
- 			interrupts = <GIC_PPI 9
- 					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-+			clocks = <&cpg CPG_MOD 408>;
-+			clock-names = "clk";
-+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- 		};
- 
- 		wdt0: watchdog@e6020000 {
diff --git a/patches.renesas/0044-drm-rcar-du-Constify-node-argument-to-rcar_du_lvds_c.patch b/patches.renesas/0044-drm-rcar-du-Constify-node-argument-to-rcar_du_lvds_c.patch
deleted file mode 100644
index cf9a1c7a352d31..00000000000000
--- a/patches.renesas/0044-drm-rcar-du-Constify-node-argument-to-rcar_du_lvds_c.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From e619e85adbc0788376e50e9dc2d8f812693bbc5a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 3 Oct 2016 16:56:48 +0300
-Subject: [PATCH 044/299] drm: rcar-du: Constify node argument to
- rcar_du_lvds_connector_init()
-
-The node passed as a pointer to the rcar_du_lvds_connector_init()
-function is never modified, make it const.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
-(cherry picked from commit 48b03494c8ae136df7806f0f467596629744000c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c |    2 +-
- drivers/gpu/drm/rcar-du/rcar_du_lvdscon.h |    2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
-@@ -72,7 +72,7 @@ static const struct drm_connector_funcs
- 
- int rcar_du_lvds_connector_init(struct rcar_du_device *rcdu,
- 				struct rcar_du_encoder *renc,
--				/* TODO const */ struct device_node *np)
-+				const struct device_node *np)
- {
- 	struct drm_encoder *encoder = rcar_encoder_to_drm_encoder(renc);
- 	struct rcar_du_lvds_connector *lvdscon;
---- a/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.h
-@@ -19,6 +19,6 @@ struct rcar_du_encoder;
- 
- int rcar_du_lvds_connector_init(struct rcar_du_device *rcdu,
- 				struct rcar_du_encoder *renc,
--				struct device_node *np);
-+				const struct device_node *np);
- 
- #endif /* __RCAR_DU_LVDSCON_H__ */
diff --git a/patches.renesas/0045-arm64-dts-r8a7796-Link-ARM-GIC-to-clock-and-clock-do.patch b/patches.renesas/0045-arm64-dts-r8a7796-Link-ARM-GIC-to-clock-and-clock-do.patch
deleted file mode 100644
index 73475c28424cfb..00000000000000
--- a/patches.renesas/0045-arm64-dts-r8a7796-Link-ARM-GIC-to-clock-and-clock-do.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From b26e82cebba6027bf5c87efcc68fb2048e6cf5c1 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 17 Jan 2017 13:49:20 +0100
-Subject: [PATCH 045/255] arm64: dts: r8a7796: Link ARM GIC to clock and clock
- domain
-
-Link the ARM GIC to the INTC-AP module clock, and add it to the SYSC
-"always-on" PM Domain, so it can be power managed using that clock.
-
-Note that currently the GIC-400 driver doesn't support module clocks nor
-Runtime PM, so this must be handled as a critical clock.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0bacdbc76b5aad0c109198e0b289d759e0cb9a9b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -100,6 +100,9 @@
- 			      <0x0 0xf1060000 0 0x20000>;
- 			interrupts = <GIC_PPI 9
- 					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
-+			clocks = <&cpg CPG_MOD 408>;
-+			clock-names = "clk";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- 		};
- 
- 		timer {
diff --git a/patches.renesas/0045-clk-renesas-Add-r8a7795-ES2.0-CPG-Core-Clock-Definit.patch b/patches.renesas/0045-clk-renesas-Add-r8a7795-ES2.0-CPG-Core-Clock-Definit.patch
deleted file mode 100644
index 053c3eca690a72..00000000000000
--- a/patches.renesas/0045-clk-renesas-Add-r8a7795-ES2.0-CPG-Core-Clock-Definit.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 469531bf6d590e2ca38bd51e8547a4017da1bb3a Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Thu, 29 Sep 2016 13:06:15 +0200
-Subject: [PATCH 045/286] clk: renesas: Add r8a7795 ES2.0 CPG Core Clock
- Definitions
-
-Add all R-Car H3 ES2.0 Clock Pulse Generator Core Clock Outputs, as
-listed in Table 8.2a ("List of Clocks [R-Car H3]") of the R-Car Gen3
-Hardware User's Manual rev. 0.53E.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 89f1b1c614253d7ea57543f769d93fced99d4d05)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/dt-bindings/clock/r8a7795-cpg-mssr.h |    7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/include/dt-bindings/clock/r8a7795-cpg-mssr.h
-+++ b/include/dt-bindings/clock/r8a7795-cpg-mssr.h
-@@ -60,4 +60,11 @@
- #define R8A7795_CLK_R			45
- #define R8A7795_CLK_OSC			46
- 
-+/* r8a7795 ES2.0 CPG Core Clocks */
-+#define R8A7795_CLK_S0D2		47
-+#define R8A7795_CLK_S0D3		48
-+#define R8A7795_CLK_S0D6		49
-+#define R8A7795_CLK_S0D8		50
-+#define R8A7795_CLK_S0D12		51
-+
- #endif /* __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__ */
diff --git a/patches.renesas/0045-drm-rcar-du-Bring-HDMI-encoder-comments-in-line-with.patch b/patches.renesas/0045-drm-rcar-du-Bring-HDMI-encoder-comments-in-line-with.patch
deleted file mode 100644
index 42f596a9716c30..00000000000000
--- a/patches.renesas/0045-drm-rcar-du-Bring-HDMI-encoder-comments-in-line-with.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From d3ea3659a69e716cad8e3febb273cc4712b938aa Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 25 Feb 2016 22:04:55 +0200
-Subject: [PATCH 045/299] drm: rcar-du: Bring HDMI encoder comments in line
- with the driver
-
-Capitalize acronyms and use determiners and punctuation.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
-(cherry picked from commit 410fa00a96bfa33cc0f053ddf24ab76f61b88bc9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
-@@ -108,7 +108,7 @@ int rcar_du_hdmienc_init(struct rcar_du_
- 	if (hdmienc == NULL)
- 		return -ENOMEM;
- 
--	/* Locate drm bridge from the hdmi encoder DT node */
-+	/* Locate the DRM bridge from the HDMI encoder DT node. */
- 	bridge = of_drm_find_bridge(np);
- 	if (!bridge)
- 		return -EPROBE_DEFER;
-@@ -123,7 +123,7 @@ int rcar_du_hdmienc_init(struct rcar_du_
- 	renc->hdmi = hdmienc;
- 	hdmienc->renc = renc;
- 
--	/* Link drm_bridge to encoder */
-+	/* Link the bridge to the encoder. */
- 	bridge->encoder = encoder;
- 	encoder->bridge = bridge;
- 
diff --git a/patches.renesas/0046-arm64-dts-r8a7795-tidyup-audma-definition-order.patch b/patches.renesas/0046-arm64-dts-r8a7795-tidyup-audma-definition-order.patch
deleted file mode 100644
index bb57dff22f4fea..00000000000000
--- a/patches.renesas/0046-arm64-dts-r8a7795-tidyup-audma-definition-order.patch
+++ /dev/null
@@ -1,166 +0,0 @@
-From 28b3bfb56d3b652e9e9a8eb897cf64ebfe3186ce Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 21 Dec 2016 04:56:54 +0000
-Subject: [PATCH 046/255] arm64: dts: r8a7795: tidyup audma definition order
-
-Current r8a7795.dtsi defines audma -> ipmmu -> dma order.
-Because of this order, dma can connect to ipmmu, but
-audma can't connect to it.
-This patch moves audma order as ipmmu -> dma -> audma.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 769fa8369b9db469ffacb356766b78dd1c7eae5a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |  132 +++++++++++++++----------------
- 1 file changed, 66 insertions(+), 66 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -340,72 +340,6 @@
- 			#power-domain-cells = <1>;
- 		};
- 
--		audma0: dma-controller@ec700000 {
--			compatible = "renesas,dmac-r8a7795",
--				     "renesas,rcar-dmac";
--			reg = <0 0xec700000 0 0x10000>;
--			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
--			interrupt-names = "error",
--					"ch0", "ch1", "ch2", "ch3",
--					"ch4", "ch5", "ch6", "ch7",
--					"ch8", "ch9", "ch10", "ch11",
--					"ch12", "ch13", "ch14", "ch15";
--			clocks = <&cpg CPG_MOD 502>;
--			clock-names = "fck";
--			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
--			#dma-cells = <1>;
--			dma-channels = <16>;
--		};
--
--		audma1: dma-controller@ec720000 {
--			compatible = "renesas,dmac-r8a7795",
--				     "renesas,rcar-dmac";
--			reg = <0 0xec720000 0 0x10000>;
--			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
--				      GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
--			interrupt-names = "error",
--					"ch0", "ch1", "ch2", "ch3",
--					"ch4", "ch5", "ch6", "ch7",
--					"ch8", "ch9", "ch10", "ch11",
--					"ch12", "ch13", "ch14", "ch15";
--			clocks = <&cpg CPG_MOD 501>;
--			clock-names = "fck";
--			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
--			#dma-cells = <1>;
--			dma-channels = <16>;
--		};
--
- 		pfc: pfc@e6060000 {
- 			compatible = "renesas,pfc-r8a7795";
- 			reg = <0 0xe6060000 0 0x50c>;
-@@ -522,6 +456,72 @@
- 			clock-names = "fck";
- 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- 			#dma-cells = <1>;
-+			dma-channels = <16>;
-+		};
-+
-+		audma0: dma-controller@ec700000 {
-+			compatible = "renesas,dmac-r8a7795",
-+				     "renesas,rcar-dmac";
-+			reg = <0 0xec700000 0 0x10000>;
-+			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-names = "error",
-+					"ch0", "ch1", "ch2", "ch3",
-+					"ch4", "ch5", "ch6", "ch7",
-+					"ch8", "ch9", "ch10", "ch11",
-+					"ch12", "ch13", "ch14", "ch15";
-+			clocks = <&cpg CPG_MOD 502>;
-+			clock-names = "fck";
-+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			#dma-cells = <1>;
-+			dma-channels = <16>;
-+		};
-+
-+		audma1: dma-controller@ec720000 {
-+			compatible = "renesas,dmac-r8a7795",
-+				     "renesas,rcar-dmac";
-+			reg = <0 0xec720000 0 0x10000>;
-+			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-names = "error",
-+					"ch0", "ch1", "ch2", "ch3",
-+					"ch4", "ch5", "ch6", "ch7",
-+					"ch8", "ch9", "ch10", "ch11",
-+					"ch12", "ch13", "ch14", "ch15";
-+			clocks = <&cpg CPG_MOD 501>;
-+			clock-names = "fck";
-+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+			#dma-cells = <1>;
- 			dma-channels = <16>;
- 		};
- 
diff --git a/patches.renesas/0046-arm64-kdump-enable-kdump-in-defconfig.patch b/patches.renesas/0046-arm64-kdump-enable-kdump-in-defconfig.patch
deleted file mode 100644
index 7203177f4903af..00000000000000
--- a/patches.renesas/0046-arm64-kdump-enable-kdump-in-defconfig.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From f711c67ec90d14dbfa71c3e68c99667ae386f729 Mon Sep 17 00:00:00 2001
-From: AKASHI Takahiro <takahiro.akashi@linaro.org>
-Date: Mon, 3 Apr 2017 11:24:39 +0900
-Subject: [PATCH 046/286] arm64: kdump: enable kdump in defconfig
-
-Kdump is enabled by default as kexec is.
-
-Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
-Acked-by: Catalin Marinas <catalin.marinas@arm.com>
-Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
-(cherry picked from commit 3f5c1e1e761981b41d0be22f9aadfc7458fcc786)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/configs/defconfig |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -78,6 +78,7 @@ CONFIG_CMA=y
- CONFIG_SECCOMP=y
- CONFIG_XEN=y
- CONFIG_KEXEC=y
-+CONFIG_CRASH_DUMP=y
- # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
- CONFIG_COMPAT=y
- CONFIG_CPU_IDLE=y
diff --git a/patches.renesas/0046-drm-rcar-du-Remove-test-for-impossible-error-conditi.patch b/patches.renesas/0046-drm-rcar-du-Remove-test-for-impossible-error-conditi.patch
deleted file mode 100644
index 562d12a94ed067..00000000000000
--- a/patches.renesas/0046-drm-rcar-du-Remove-test-for-impossible-error-conditi.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 689f342de57d7b1d3991e38b935512768e00ab18 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 3 Oct 2016 17:40:20 +0300
-Subject: [PATCH 046/299] drm: rcar-du: Remove test for impossible error
- condition
-
-The driver has lost platform data support a long time ago. R-Car DU
-devices can only be instantiated through DT now, making it impossible to
-have a NULL DT node pointer. Remove the error check.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
-(cherry picked from commit 0fab63c7b868a3ee8066114fabb25e108c38c3ce)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.c |    6 ------
- 1 file changed, 6 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -291,17 +291,11 @@ static int rcar_du_remove(struct platfor
- 
- static int rcar_du_probe(struct platform_device *pdev)
- {
--	struct device_node *np = pdev->dev.of_node;
- 	struct rcar_du_device *rcdu;
- 	struct drm_device *ddev;
- 	struct resource *mem;
- 	int ret;
- 
--	if (np == NULL) {
--		dev_err(&pdev->dev, "no device tree node\n");
--		return -ENODEV;
--	}
--
- 	/* Allocate and initialize the R-Car device structure. */
- 	rcdu = devm_kzalloc(&pdev->dev, sizeof(*rcdu), GFP_KERNEL);
- 	if (rcdu == NULL)
diff --git a/patches.renesas/0047-arm64-dts-r8a7795-salvator-x-Drop-_clk-suffix-from-X.patch b/patches.renesas/0047-arm64-dts-r8a7795-salvator-x-Drop-_clk-suffix-from-X.patch
deleted file mode 100644
index 528eaaebb89bfe..00000000000000
--- a/patches.renesas/0047-arm64-dts-r8a7795-salvator-x-Drop-_clk-suffix-from-X.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 10645d56f8dba2de706585840c59c0856aa92efa Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 3 Apr 2017 12:08:09 +0200
-Subject: [PATCH 047/286] arm64: dts: r8a7795: salvator-x: Drop _clk suffix
- from X12 clock node name
-
-The current practice is to not add _clk suffixes to clock node names in
-DT, as these names are used as the actual clock names.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Stephen Boyd <sboyd@codeaurora.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6922bd71adab0a7fe8ffbdc3e72a46431fa29656)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-@@ -56,7 +56,7 @@
- 		reg = <0x0 0x48000000 0x0 0x38000000>;
- 	};
- 
--	x12_clk: x12_clk {
-+	x12_clk: x12 {
- 		compatible = "fixed-clock";
- 		#clock-cells = <0>;
- 		clock-frequency = <24576000>;
diff --git a/patches.renesas/0047-arm64-dts-r8a7796-Mark-EthernetAVB-device-node-disab.patch b/patches.renesas/0047-arm64-dts-r8a7796-Mark-EthernetAVB-device-node-disab.patch
deleted file mode 100644
index b8cbd2b8bf1ba7..00000000000000
--- a/patches.renesas/0047-arm64-dts-r8a7796-Mark-EthernetAVB-device-node-disab.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From c7dbf8b2634e3d952cc5c3e3fa4478db6bcab6e1 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 25 Jan 2017 14:19:31 +0100
-Subject: [PATCH 047/255] arm64: dts: r8a7796: Mark EthernetAVB device node
- disabled
-
-Device nodes representing I/O devices should be marked disabled in the
-SoC-specific DTS, and overridden by board-specific DTSes where needed.
-
-Fixes: 8e8b9eaef8fb05d9 ("arm64: dts: renesas: r8a7796: Add EthernetAVB instance")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7e1c23b94ed7f0d2719795a9828402003de5335d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -471,6 +471,7 @@
- 			phy-mode = "rgmii-id";
- 			#address-cells = <1>;
- 			#size-cells = <0>;
-+			status = "disabled";
- 		};
- 
- 		scif2: serial@e6e88000 {
diff --git a/patches.renesas/0047-drm-rcar-du-Remove-memory-allocation-error-message.patch b/patches.renesas/0047-drm-rcar-du-Remove-memory-allocation-error-message.patch
deleted file mode 100644
index 6ec7366a39afaf..00000000000000
--- a/patches.renesas/0047-drm-rcar-du-Remove-memory-allocation-error-message.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From adce2606e3b50c07acd7b289a640adc074b91523 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 3 Oct 2016 17:42:07 +0300
-Subject: [PATCH 047/299] drm: rcar-du: Remove memory allocation error message
-
-Memory allocation failures print messages to the kernel log, there's no
-need to print an extra one. Remove the duplicate message.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
-(cherry picked from commit eb508ce6f1df09e384cbad8bccdab4ad6081f45f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c |    4 +---
- 1 file changed, 1 insertion(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c
-@@ -241,10 +241,8 @@ int rcar_du_lvdsenc_init(struct rcar_du_
- 
- 	for (i = 0; i < rcdu->info->num_lvds; ++i) {
- 		lvds = devm_kzalloc(&pdev->dev, sizeof(*lvds), GFP_KERNEL);
--		if (lvds == NULL) {
--			dev_err(&pdev->dev, "failed to allocate private data\n");
-+		if (lvds == NULL)
- 			return -ENOMEM;
--		}
- 
- 		lvds->dev = rcdu;
- 		lvds->index = i;
diff --git a/patches.renesas/0048-Input-gpio-keys-add-support-for-setkeycode.patch b/patches.renesas/0048-Input-gpio-keys-add-support-for-setkeycode.patch
deleted file mode 100644
index c12e631b5817c5..00000000000000
--- a/patches.renesas/0048-Input-gpio-keys-add-support-for-setkeycode.patch
+++ /dev/null
@@ -1,177 +0,0 @@
-From 1a3a2b379659d6b4f9c6113f227d33fb1f7c3161 Mon Sep 17 00:00:00 2001
-From: Hans de Goede <hdegoede@redhat.com>
-Date: Sat, 21 Jan 2017 11:16:47 -0800
-Subject: [PATCH 048/255] Input: gpio-keys - add support for setkeycode
-
-gpio-keys input devices created by the soc_button_array driver are
-configured with key-codes based on ACPI provided information.
-
-Unfortunately on some tablets this info is wrong, and we need to have
-a quirk to fix things up.
-
-Add support for input_setkeycode to the gpio-keys driver, so that
-the existing udev hwdb mechanism can be used to fix things up on these
-tablets.
-
-Signed-off-by: Hans de Goede <hdegoede@redhat.com>
-Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
-(cherry picked from commit 83e4947a569f4d544ef4a1361f51c91d73a9c915)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/input/keyboard/gpio_keys.c |   40 +++++++++++++++++++++++++------------
- 1 file changed, 28 insertions(+), 12 deletions(-)
-
---- a/drivers/input/keyboard/gpio_keys.c
-+++ b/drivers/input/keyboard/gpio_keys.c
-@@ -36,6 +36,8 @@ struct gpio_button_data {
- 	struct input_dev *input;
- 	struct gpio_desc *gpiod;
- 
-+	unsigned short *code;
-+
- 	struct timer_list release_timer;
- 	unsigned int release_delay;	/* in msecs, for IRQ-only buttons */
- 
-@@ -52,6 +54,7 @@ struct gpio_keys_drvdata {
- 	const struct gpio_keys_platform_data *pdata;
- 	struct input_dev *input;
- 	struct mutex disable_lock;
-+	unsigned short *keymap;
- 	struct gpio_button_data data[0];
- };
- 
-@@ -203,7 +206,7 @@ static ssize_t gpio_keys_attr_show_helpe
- 		if (only_disabled && !bdata->disabled)
- 			continue;
- 
--		__set_bit(bdata->button->code, bits);
-+		__set_bit(*bdata->code, bits);
- 	}
- 
- 	ret = scnprintf(buf, PAGE_SIZE - 1, "%*pbl", n_events, bits);
-@@ -254,7 +257,7 @@ static ssize_t gpio_keys_attr_store_help
- 		if (bdata->button->type != type)
- 			continue;
- 
--		if (test_bit(bdata->button->code, bits) &&
-+		if (test_bit(*bdata->code, bits) &&
- 		    !bdata->button->can_disable) {
- 			error = -EINVAL;
- 			goto out;
-@@ -269,7 +272,7 @@ static ssize_t gpio_keys_attr_store_help
- 		if (bdata->button->type != type)
- 			continue;
- 
--		if (test_bit(bdata->button->code, bits))
-+		if (test_bit(*bdata->code, bits))
- 			gpio_keys_disable_button(bdata);
- 		else
- 			gpio_keys_enable_button(bdata);
-@@ -371,7 +374,7 @@ static void gpio_keys_gpio_report_event(
- 		if (state)
- 			input_event(input, type, button->code, button->value);
- 	} else {
--		input_event(input, type, button->code, state);
-+		input_event(input, type, *bdata->code, state);
- 	}
- 	input_sync(input);
- }
-@@ -411,7 +414,7 @@ static void gpio_keys_irq_timer(unsigned
- 
- 	spin_lock_irqsave(&bdata->lock, flags);
- 	if (bdata->key_pressed) {
--		input_event(input, EV_KEY, bdata->button->code, 0);
-+		input_event(input, EV_KEY, *bdata->code, 0);
- 		input_sync(input);
- 		bdata->key_pressed = false;
- 	}
-@@ -421,7 +424,6 @@ static void gpio_keys_irq_timer(unsigned
- static irqreturn_t gpio_keys_irq_isr(int irq, void *dev_id)
- {
- 	struct gpio_button_data *bdata = dev_id;
--	const struct gpio_keys_button *button = bdata->button;
- 	struct input_dev *input = bdata->input;
- 	unsigned long flags;
- 
-@@ -433,11 +435,11 @@ static irqreturn_t gpio_keys_irq_isr(int
- 		if (bdata->button->wakeup)
- 			pm_wakeup_event(bdata->input->dev.parent, 0);
- 
--		input_event(input, EV_KEY, button->code, 1);
-+		input_event(input, EV_KEY, *bdata->code, 1);
- 		input_sync(input);
- 
- 		if (!bdata->release_delay) {
--			input_event(input, EV_KEY, button->code, 0);
-+			input_event(input, EV_KEY, *bdata->code, 0);
- 			input_sync(input);
- 			goto out;
- 		}
-@@ -465,12 +467,14 @@ static void gpio_keys_quiesce_key(void *
- 
- static int gpio_keys_setup_key(struct platform_device *pdev,
- 				struct input_dev *input,
--				struct gpio_button_data *bdata,
-+				struct gpio_keys_drvdata *ddata,
- 				const struct gpio_keys_button *button,
-+				int idx,
- 				struct fwnode_handle *child)
- {
- 	const char *desc = button->desc ? button->desc : "gpio_keys";
- 	struct device *dev = &pdev->dev;
-+	struct gpio_button_data *bdata = &ddata->data[idx];
- 	irq_handler_t isr;
- 	unsigned long irqflags;
- 	int irq;
-@@ -577,7 +581,9 @@ static int gpio_keys_setup_key(struct pl
- 		irqflags = 0;
- 	}
- 
--	input_set_capability(input, button->type ?: EV_KEY, button->code);
-+	bdata->code = &ddata->keymap[idx];
-+	*bdata->code = button->code;
-+	input_set_capability(input, button->type ?: EV_KEY, *bdata->code);
- 
- 	/*
- 	 * Install custom action to cancel release timer and
-@@ -750,6 +756,12 @@ static int gpio_keys_probe(struct platfo
- 		return -ENOMEM;
- 	}
- 
-+	ddata->keymap = devm_kcalloc(dev,
-+				     pdata->nbuttons, sizeof(ddata->keymap[0]),
-+				     GFP_KERNEL);
-+	if (!ddata->keymap)
-+		return -ENOMEM;
-+
- 	input = devm_input_allocate_device(dev);
- 	if (!input) {
- 		dev_err(dev, "failed to allocate input device\n");
-@@ -774,13 +786,16 @@ static int gpio_keys_probe(struct platfo
- 	input->id.product = 0x0001;
- 	input->id.version = 0x0100;
- 
-+	input->keycode = ddata->keymap;
-+	input->keycodesize = sizeof(ddata->keymap[0]);
-+	input->keycodemax = pdata->nbuttons;
-+
- 	/* Enable auto repeat feature of Linux input subsystem */
- 	if (pdata->rep)
- 		__set_bit(EV_REP, input->evbit);
- 
- 	for (i = 0; i < pdata->nbuttons; i++) {
- 		const struct gpio_keys_button *button = &pdata->buttons[i];
--		struct gpio_button_data *bdata = &ddata->data[i];
- 
- 		if (!dev_get_platdata(dev)) {
- 			child = device_get_next_child_node(&pdev->dev, child);
-@@ -792,7 +807,8 @@ static int gpio_keys_probe(struct platfo
- 			}
- 		}
- 
--		error = gpio_keys_setup_key(pdev, input, bdata, button, child);
-+		error = gpio_keys_setup_key(pdev, input, ddata,
-+					    button, i, child);
- 		if (error) {
- 			fwnode_handle_put(child);
- 			return error;
diff --git a/patches.renesas/0048-arm64-defconfig-enable-the-Safexcel-crypto-engine-as.patch b/patches.renesas/0048-arm64-defconfig-enable-the-Safexcel-crypto-engine-as.patch
deleted file mode 100644
index 62227149f84bd5..00000000000000
--- a/patches.renesas/0048-arm64-defconfig-enable-the-Safexcel-crypto-engine-as.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 243e7b35a571726190f7237e7f45f39443ccb70d Mon Sep 17 00:00:00 2001
-From: Antoine Tenart <antoine.tenart@free-electrons.com>
-Date: Wed, 29 Mar 2017 14:44:32 +0200
-Subject: [PATCH 048/286] arm64: defconfig: enable the Safexcel crypto engine
- as a module
-
-The Safexcel EIP197 cryptographic engine is used on some Marvell SoCs,
-such as Armada 7040 and Armada 8040. Enable this driver as a module in
-the ARM64 defconfig.
-
-Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-(cherry picked from commit 10ebb57ffcbf062ff224585fefa274e703fc363d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/configs/defconfig |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -489,6 +489,7 @@ CONFIG_MEMTEST=y
- CONFIG_SECURITY=y
- CONFIG_CRYPTO_ECHAINIV=y
- CONFIG_CRYPTO_ANSI_CPRNG=y
-+CONFIG_CRYPTO_DEV_SAFEXCEL=m
- CONFIG_ARM64_CRYPTO=y
- CONFIG_CRYPTO_SHA1_ARM64_CE=y
- CONFIG_CRYPTO_SHA2_ARM64_CE=y
diff --git a/patches.renesas/0049-gpio-rcar-set-IRQ-chip-parent_device.patch b/patches.renesas/0049-gpio-rcar-set-IRQ-chip-parent_device.patch
deleted file mode 100644
index 686e610d9ed51d..00000000000000
--- a/patches.renesas/0049-gpio-rcar-set-IRQ-chip-parent_device.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From bcf23f922df099e99b6ffa0050894eb73f316067 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Thu, 8 Dec 2016 18:32:27 +0100
-Subject: [PATCH 049/255] gpio: rcar: set IRQ chip parent_device
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This enables Runtime PM handling for interrupts.
-
-By setting the parent_device in struct irq_chip genirq will call the
-pm_runtime_get/put APIs when an IRQ is requested/freed.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 47bd38a31adcd5b92f5e11919a101a310305dbb1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-rcar.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/gpio/gpio-rcar.c
-+++ b/drivers/gpio/gpio-rcar.c
-@@ -460,6 +460,7 @@ static int gpio_rcar_probe(struct platfo
- 
- 	irq_chip = &p->irq_chip;
- 	irq_chip->name = name;
-+	irq_chip->parent_device = dev;
- 	irq_chip->irq_mask = gpio_rcar_irq_disable;
- 	irq_chip->irq_unmask = gpio_rcar_irq_enable;
- 	irq_chip->irq_set_type = gpio_rcar_irq_set_type;
diff --git a/patches.renesas/0050-drm-rcar-du-Add-R8A7792-support.patch b/patches.renesas/0050-drm-rcar-du-Add-R8A7792-support.patch
deleted file mode 100644
index 573b2be8713081..00000000000000
--- a/patches.renesas/0050-drm-rcar-du-Add-R8A7792-support.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From 7c559c430c0ba225e259b90f7e2ca332d367d75c Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Thu, 4 Aug 2016 15:01:02 -0700
-Subject: [PATCH 050/299] drm: rcar-du: Add R8A7792 support
-
-Add support for the R8A7792 DU; it has 2 DPAD (RGB) outputs.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 73323ddbbddf2c8aeb1b57c75bcb537142ec9599)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/display/renesas,du.txt |    4 ++
- drivers/gpu/drm/rcar-du/rcar_du_drv.c                    |   22 +++++++++++++++
- 2 files changed, 25 insertions(+), 1 deletion(-)
-
---- a/Documentation/devicetree/bindings/display/renesas,du.txt
-+++ b/Documentation/devicetree/bindings/display/renesas,du.txt
-@@ -6,6 +6,7 @@ Required Properties:
-     - "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU
-     - "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU
-     - "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU
-+    - "renesas,du-r8a7792" for R8A7792 (R-Car V2H) compatible DU
-     - "renesas,du-r8a7793" for R8A7793 (R-Car M2-N) compatible DU
-     - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
-     - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
-@@ -25,7 +26,7 @@ Required Properties:
-   - clock-names: Name of the clocks. This property is model-dependent.
-     - R8A7779 uses a single functional clock. The clock doesn't need to be
-       named.
--    - R8A779[01345] use one functional clock per channel and one clock per LVDS
-+    - R8A779[012345] use one functional clock per channel and one clock per LVDS
-       encoder (if available). The functional clocks must be named "du.x" with
-       "x" being the channel numerical index. The LVDS clocks must be named
-       "lvds.x" with "x" being the LVDS encoder numerical index.
-@@ -47,6 +48,7 @@ corresponding to each DU output.
-  R8A7779 (H1)	DPAD 0		DPAD 1		-		-
-  R8A7790 (H2)	DPAD		LVDS 0		LVDS 1		-
-  R8A7791 (M2-W)	DPAD		LVDS 0		-		-
-+ R8A7792 (V2H)	DPAD 0		DPAD 1		-		-
-  R8A7793 (M2-N)	DPAD		LVDS 0		-		-
-  R8A7794 (E2)	DPAD 0		DPAD 1		-		-
-  R8A7795 (H3)	DPAD		HDMI 0		HDMI 1		LVDS
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -110,6 +110,27 @@ static const struct rcar_du_device_info
- 	.num_lvds = 1,
- };
- 
-+static const struct rcar_du_device_info rcar_du_r8a7792_info = {
-+	.gen = 2,
-+	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
-+		  | RCAR_DU_FEATURE_EXT_CTRL_REGS,
-+	.num_crtcs = 2,
-+	.routes = {
-+		/* R8A7792 has two RGB outputs. */
-+		[RCAR_DU_OUTPUT_DPAD0] = {
-+			.possible_crtcs = BIT(0),
-+			.encoder_type = DRM_MODE_ENCODER_NONE,
-+			.port = 0,
-+		},
-+		[RCAR_DU_OUTPUT_DPAD1] = {
-+			.possible_crtcs = BIT(1),
-+			.encoder_type = DRM_MODE_ENCODER_NONE,
-+			.port = 1,
-+		},
-+	},
-+	.num_lvds = 0,
-+};
-+
- static const struct rcar_du_device_info rcar_du_r8a7794_info = {
- 	.gen = 2,
- 	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
-@@ -161,6 +182,7 @@ static const struct of_device_id rcar_du
- 	{ .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info },
- 	{ .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info },
- 	{ .compatible = "renesas,du-r8a7791", .data = &rcar_du_r8a7791_info },
-+	{ .compatible = "renesas,du-r8a7792", .data = &rcar_du_r8a7792_info },
- 	{ .compatible = "renesas,du-r8a7793", .data = &rcar_du_r8a7791_info },
- 	{ .compatible = "renesas,du-r8a7794", .data = &rcar_du_r8a7794_info },
- 	{ .compatible = "renesas,du-r8a7795", .data = &rcar_du_r8a7795_info },
diff --git a/patches.renesas/0050-gpio-rcar-Fine-grained-Runtime-PM-support.patch b/patches.renesas/0050-gpio-rcar-Fine-grained-Runtime-PM-support.patch
deleted file mode 100644
index 0b5f51e3cf9c46..00000000000000
--- a/patches.renesas/0050-gpio-rcar-Fine-grained-Runtime-PM-support.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From 4486d679f997a2f6e9217aebdf2fce73df96f975 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Thu, 8 Dec 2016 18:32:28 +0100
-Subject: [PATCH 050/255] gpio: rcar: Fine-grained Runtime PM support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Currently gpio modules are runtime-resumed at probe time. This means the
-gpio module will be active all the time (except during system suspend,
-if not configured as a wake-up source).
-
-While an R-Car Gen2 gpio module retains pins configured for output at
-the requested level while put in standby mode, gpio register cannot be
-accessed while suspended.  Unfortunately pm_runtime_get_sync() cannot be
-called from all contexts where gpio register access is needed. Hence
-move the Runtime PM handling from probe/remove time to gpio request/free
-time, which is probably the best we can do.
-
-On r8a7791/koelsch, gpio modules 0, 1, 3, and 4 are now suspended during
-normal use (gpio2 is used for LEDs and regulators, gpio5 for keys, gpio6
-for SD-Card CD & WP, gpio7 for keys and regulators).
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-[Niklas: s/gpio_to_priv(chip)/gpiochip_get_data(chip)/]
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-
-(cherry picked from commit 2d65472bcb3f2e1f305529655bb06054dc9e2804)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-rcar.c |   20 ++++++++++++++++----
- 1 file changed, 16 insertions(+), 4 deletions(-)
-
---- a/drivers/gpio/gpio-rcar.c
-+++ b/drivers/gpio/gpio-rcar.c
-@@ -242,11 +242,24 @@ static void gpio_rcar_config_general_inp
- 
- static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)
- {
--	return pinctrl_request_gpio(chip->base + offset);
-+	struct gpio_rcar_priv *p = gpiochip_get_data(chip);
-+	int error;
-+
-+	error = pm_runtime_get_sync(&p->pdev->dev);
-+	if (error < 0)
-+		return error;
-+
-+	error = pinctrl_request_gpio(chip->base + offset);
-+	if (error)
-+		pm_runtime_put(&p->pdev->dev);
-+
-+	return error;
- }
- 
- static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)
- {
-+	struct gpio_rcar_priv *p = gpiochip_get_data(chip);
-+
- 	pinctrl_free_gpio(chip->base + offset);
- 
- 	/*
-@@ -254,6 +267,8 @@ static void gpio_rcar_free(struct gpio_c
- 	 * drive the GPIO pin as an output.
- 	 */
- 	gpio_rcar_config_general_input_output_mode(chip, offset, false);
-+
-+	pm_runtime_put(&p->pdev->dev);
- }
- 
- static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset)
-@@ -426,7 +441,6 @@ static int gpio_rcar_probe(struct platfo
- 	}
- 
- 	pm_runtime_enable(dev);
--	pm_runtime_get_sync(dev);
- 
- 	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
-@@ -495,7 +509,6 @@ static int gpio_rcar_probe(struct platfo
- err1:
- 	gpiochip_remove(gpio_chip);
- err0:
--	pm_runtime_put(dev);
- 	pm_runtime_disable(dev);
- 	return ret;
- }
-@@ -506,7 +519,6 @@ static int gpio_rcar_remove(struct platf
- 
- 	gpiochip_remove(&p->gpio_chip);
- 
--	pm_runtime_put(&pdev->dev);
- 	pm_runtime_disable(&pdev->dev);
- 	return 0;
- }
diff --git a/patches.renesas/0050-i2c-rcar-clarify-PM-handling-with-more-comments.patch b/patches.renesas/0050-i2c-rcar-clarify-PM-handling-with-more-comments.patch
deleted file mode 100644
index c02cf043436bca..00000000000000
--- a/patches.renesas/0050-i2c-rcar-clarify-PM-handling-with-more-comments.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From ad3794d1f29c79c25e51a986d6e66d9179a0495f Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Thu, 20 Apr 2017 12:04:33 +0200
-Subject: [PATCH 050/286] i2c: rcar: clarify PM handling with more comments
-
-PM handling is correct but might be a bit subtle. Add some comments for
-clarification.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 63a761eef55759c0bc725739fe575193c09fa4ef)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/i2c/busses/i2c-rcar.c |    4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
---- a/drivers/i2c/busses/i2c-rcar.c
-+++ b/drivers/i2c/busses/i2c-rcar.c
-@@ -753,6 +753,7 @@ static int rcar_reg_slave(struct i2c_cli
- 	if (slave->flags & I2C_CLIENT_TEN)
- 		return -EAFNOSUPPORT;
- 
-+	/* Keep device active for slave address detection logic */
- 	pm_runtime_get_sync(rcar_i2c_priv_to_dev(priv));
- 
- 	priv->slave = slave;
-@@ -856,13 +857,14 @@ static int rcar_i2c_probe(struct platfor
- 	priv->dma_direction = DMA_NONE;
- 	priv->dma_rx = priv->dma_tx = ERR_PTR(-EPROBE_DEFER);
- 
-+	/* Activate device for clock calculation */
- 	pm_runtime_enable(dev);
- 	pm_runtime_get_sync(dev);
- 	ret = rcar_i2c_clock_calculate(priv, &i2c_t);
- 	if (ret < 0)
- 		goto out_pm_put;
- 
--	/* Don't suspend when multi-master to keep arbitration working */
-+	/* Stay always active when multi-master to keep arbitration working */
- 	if (of_property_read_bool(dev->of_node, "multi-master"))
- 		priv->flags |= ID_P_PM_BLOCKED;
- 	else
diff --git a/patches.renesas/0051-drm-rcar-du-Add-R8A7796-support.patch b/patches.renesas/0051-drm-rcar-du-Add-R8A7796-support.patch
deleted file mode 100644
index a2b0a9ebc78887..00000000000000
--- a/patches.renesas/0051-drm-rcar-du-Add-R8A7796-support.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From d69d49c0a90afb735d10dd4a4b3ce9105f075517 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 6 Sep 2016 02:11:43 +0300
-Subject: [PATCH 051/299] drm: rcar-du: Add R8A7796 support
-
-Document the R8A7796-specific DT bindings and support them in the
-driver. The HDMI output is currently not supported.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 63b5053e53a052355bbc74e814561e5e586fd866)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/display/renesas,du.txt |   10 +++---
- drivers/gpu/drm/rcar-du/rcar_du_drv.c                    |   25 +++++++++++++++
- 2 files changed, 31 insertions(+), 4 deletions(-)
-
---- a/Documentation/devicetree/bindings/display/renesas,du.txt
-+++ b/Documentation/devicetree/bindings/display/renesas,du.txt
-@@ -10,6 +10,7 @@ Required Properties:
-     - "renesas,du-r8a7793" for R8A7793 (R-Car M2-N) compatible DU
-     - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
-     - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
-+    - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU
- 
-   - reg: A list of base address and length of each memory resource, one for
-     each entry in the reg-names property.
-@@ -26,10 +27,10 @@ Required Properties:
-   - clock-names: Name of the clocks. This property is model-dependent.
-     - R8A7779 uses a single functional clock. The clock doesn't need to be
-       named.
--    - R8A779[012345] use one functional clock per channel and one clock per LVDS
--      encoder (if available). The functional clocks must be named "du.x" with
--      "x" being the channel numerical index. The LVDS clocks must be named
--      "lvds.x" with "x" being the LVDS encoder numerical index.
-+    - R8A779[0123456] use one functional clock per channel and one clock per
-+      LVDS encoder (if available). The functional clocks must be named "du.x"
-+      with "x" being the channel numerical index. The LVDS clocks must be
-+      named "lvds.x" with "x" being the LVDS encoder numerical index.
-     - In addition to the functional and encoder clocks, all DU versions also
-       support externally supplied pixel clocks. Those clocks are optional.
-       When supplied they must be named "dclkin.x" with "x" being the input
-@@ -52,6 +53,7 @@ corresponding to each DU output.
-  R8A7793 (M2-N)	DPAD		LVDS 0		-		-
-  R8A7794 (E2)	DPAD 0		DPAD 1		-		-
-  R8A7795 (H3)	DPAD		HDMI 0		HDMI 1		LVDS
-+ R8A7796 (M3-W)	DPAD		HDMI		LVDS		-
- 
- 
- Example: R8A7790 (R-Car H2) DU
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -178,6 +178,30 @@ static const struct rcar_du_device_info
- 	.num_lvds = 1,
- };
- 
-+static const struct rcar_du_device_info rcar_du_r8a7796_info = {
-+	.gen = 3,
-+	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
-+		  | RCAR_DU_FEATURE_EXT_CTRL_REGS
-+		  | RCAR_DU_FEATURE_VSP1_SOURCE,
-+	.num_crtcs = 3,
-+	.routes = {
-+		/* R8A7796 has one RGB output, one LVDS output and one
-+		 * (currently unsupported) HDMI output.
-+		 */
-+		[RCAR_DU_OUTPUT_DPAD0] = {
-+			.possible_crtcs = BIT(2),
-+			.encoder_type = DRM_MODE_ENCODER_NONE,
-+			.port = 0,
-+		},
-+		[RCAR_DU_OUTPUT_LVDS0] = {
-+			.possible_crtcs = BIT(0),
-+			.encoder_type = DRM_MODE_ENCODER_LVDS,
-+			.port = 2,
-+		},
-+	},
-+	.num_lvds = 1,
-+};
-+
- static const struct of_device_id rcar_du_of_table[] = {
- 	{ .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info },
- 	{ .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info },
-@@ -186,6 +210,7 @@ static const struct of_device_id rcar_du
- 	{ .compatible = "renesas,du-r8a7793", .data = &rcar_du_r8a7791_info },
- 	{ .compatible = "renesas,du-r8a7794", .data = &rcar_du_r8a7794_info },
- 	{ .compatible = "renesas,du-r8a7795", .data = &rcar_du_r8a7795_info },
-+	{ .compatible = "renesas,du-r8a7796", .data = &rcar_du_r8a7796_info },
- 	{ }
- };
- 
diff --git a/patches.renesas/0051-i2c-rcar-use-correct-length-when-unmapping-DMA.patch b/patches.renesas/0051-i2c-rcar-use-correct-length-when-unmapping-DMA.patch
deleted file mode 100644
index 4080454d31d1eb..00000000000000
--- a/patches.renesas/0051-i2c-rcar-use-correct-length-when-unmapping-DMA.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 2f3c42c442e2fceae677090e021d175f4ce12f44 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Sun, 28 May 2017 09:52:17 +0200
-Subject: [PATCH 051/286] i2c: rcar: use correct length when unmapping DMA
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Because we need to transfer some bytes with PIO, the msg length is not
-the length of the DMA buffer. Use the correct value which we used when
-doing the mapping.
-
-Fixes: 73e8b0528346e8 ("i2c: rcar: add DMA support")
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 916335036d4fe33f9806240cb0d1900f4975b959)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/i2c/busses/i2c-rcar.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/i2c/busses/i2c-rcar.c
-+++ b/drivers/i2c/busses/i2c-rcar.c
-@@ -319,7 +319,7 @@ static void rcar_i2c_dma_unmap(struct rc
- 	rcar_i2c_write(priv, ICFBSCR, TCYC06);
- 
- 	dma_unmap_single(chan->device->dev, sg_dma_address(&priv->sg),
--			 priv->msg->len, priv->dma_direction);
-+			 sg_dma_len(&priv->sg), priv->dma_direction);
- 
- 	priv->dma_direction = DMA_NONE;
- }
diff --git a/patches.renesas/0051-regulator-gpio-correct-default-type.patch b/patches.renesas/0051-regulator-gpio-correct-default-type.patch
deleted file mode 100644
index 1619a8640af477..00000000000000
--- a/patches.renesas/0051-regulator-gpio-correct-default-type.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 4fd8b3925f1f8dc07a30cc074641a432bbdda071 Mon Sep 17 00:00:00 2001
-From: Hans Holmberg <hans@pixelmunchies.com>
-Date: Fri, 3 Feb 2017 15:29:12 +0100
-Subject: [PATCH 051/255] regulator: gpio: correct default type
-
-The driver defaults to voltage, not current, type so correct
-this in the device tree binding documentation.
-
-Signed-off-by: Hans Holmberg <hans@pixelmunchies.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 17db9f386632c9c9182a3318b89b742be08c1c2a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/regulator/gpio-regulator.txt |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/Documentation/devicetree/bindings/regulator/gpio-regulator.txt
-+++ b/Documentation/devicetree/bindings/regulator/gpio-regulator.txt
-@@ -13,7 +13,7 @@ Optional properties:
- - startup-delay-us	: Startup time in microseconds.
- - enable-active-high	: Polarity of GPIO is active high (default is low).
- - regulator-type	: Specifies what is being regulated, must be either
--			  "voltage" or "current", defaults to current.
-+			  "voltage" or "current", defaults to voltage.
- 
- Any property defined as part of the core regulator binding defined in
- regulator.txt can also be used.
diff --git a/patches.renesas/0052-ARM-dts-r7s72100-update-sdhi-clock-bindings.patch b/patches.renesas/0052-ARM-dts-r7s72100-update-sdhi-clock-bindings.patch
deleted file mode 100644
index bbde6d1b11440e..00000000000000
--- a/patches.renesas/0052-ARM-dts-r7s72100-update-sdhi-clock-bindings.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From d22659eda4cf22d9e56db64f81402491c12cf39b Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Wed, 25 Jan 2017 15:28:10 -0500
-Subject: [PATCH 052/286] ARM: dts: r7s72100: update sdhi clock bindings
-
-The SDHI controller in the RZ/A1 has 2 clock sources per channel and both
-need to be enabled/disabled for proper operation. This fixes the fact that
-the define for R7S72100_CLK_SDHI1 was not correct to begin with (typo), and
-that all 4 clock sources need to be defined an used.
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3d2abda02ad2d06d5f22de7f6b0f39126670bc48)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100.dtsi            |   17 ++++++++++++-----
- include/dt-bindings/clock/r7s72100-clock.h |    6 ++++--
- 2 files changed, 16 insertions(+), 7 deletions(-)
-
---- a/arch/arm/boot/dts/r7s72100.dtsi
-+++ b/arch/arm/boot/dts/r7s72100.dtsi
-@@ -162,9 +162,12 @@
- 			#clock-cells = <1>;
- 			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
- 			reg = <0xfcfe0444 4>;
--			clocks = <&p1_clk>, <&p1_clk>;
--			clock-indices = <R7S72100_CLK_SDHI1 R7S72100_CLK_SDHI0>;
--			clock-output-names = "sdhi1", "sdhi0";
-+			clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>;
-+			clock-indices = <
-+				R7S72100_CLK_SDHI00 R7S72100_CLK_SDHI01
-+				R7S72100_CLK_SDHI10 R7S72100_CLK_SDHI11
-+			>;
-+			clock-output-names = "sdhi00", "sdhi01", "sdhi10", "sdhi11";
- 		};
- 	};
- 
-@@ -488,7 +491,9 @@
- 			      GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH
- 			      GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
- 
--		clocks = <&mstp12_clks R7S72100_CLK_SDHI0>;
-+		clocks = <&mstp12_clks R7S72100_CLK_SDHI00>,
-+			 <&mstp12_clks R7S72100_CLK_SDHI01>;
-+		clock-names = "core", "cd";
- 		cap-sd-highspeed;
- 		cap-sdio-irq;
- 		status = "disabled";
-@@ -501,7 +506,9 @@
- 			      GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH
- 			      GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>;
- 
--		clocks = <&mstp12_clks R7S72100_CLK_SDHI1>;
-+		clocks = <&mstp12_clks R7S72100_CLK_SDHI10>,
-+			 <&mstp12_clks R7S72100_CLK_SDHI11>;
-+		clock-names = "core", "cd";
- 		cap-sd-highspeed;
- 		cap-sdio-irq;
- 		status = "disabled";
---- a/include/dt-bindings/clock/r7s72100-clock.h
-+++ b/include/dt-bindings/clock/r7s72100-clock.h
-@@ -49,7 +49,9 @@
- #define R7S72100_CLK_SPI4	3
- 
- /* MSTP12 */
--#define R7S72100_CLK_SDHI0	3
--#define R7S72100_CLK_SDHI1	2
-+#define R7S72100_CLK_SDHI00	3
-+#define R7S72100_CLK_SDHI01	2
-+#define R7S72100_CLK_SDHI10	1
-+#define R7S72100_CLK_SDHI11	0
- 
- #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
diff --git a/patches.renesas/0052-drm-rcar-du-Fix-dot-clock-routing-configuration.patch b/patches.renesas/0052-drm-rcar-du-Fix-dot-clock-routing-configuration.patch
deleted file mode 100644
index 809a6a9497b2f2..00000000000000
--- a/patches.renesas/0052-drm-rcar-du-Fix-dot-clock-routing-configuration.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From d746cd33f0ee9f81e87e4b0854c118e3b95a3ee6 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 22 Oct 2016 19:05:53 +0300
-Subject: [PATCH 052/299] drm: rcar-du: Fix dot clock routing configuration
-
-Dot clock routing is setup through different registers depending on the
-DU generation. The code has been designed for Gen2 and hasn't been
-updated since. This works thanks to good reset default value, but isn't
-very safe. Fix it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit a3c477b33d6cf015fed50fe5ee23f57e2d579ef4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_group.c |   22 +++++++++++++---------
- 1 file changed, 13 insertions(+), 9 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_group.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c
-@@ -105,16 +105,20 @@ static void rcar_du_group_setup(struct r
- 	if (rcar_du_has(rgrp->dev, RCAR_DU_FEATURE_EXT_CTRL_REGS)) {
- 		rcar_du_group_setup_defr8(rgrp);
- 
--		/* Configure input dot clock routing. We currently hardcode the
--		 * configuration to routing DOTCLKINn to DUn.
-+		/*
-+		 * Configure input dot clock routing. We currently hardcode the
-+		 * configuration to routing DOTCLKINn to DUn. Register fields
-+		 * depend on the DU generation, but the resulting value is 0 in
-+		 * all cases.
-+		 *
-+		 * On Gen2 a single register in the first group controls dot
-+		 * clock selection for all channels, while on Gen3 dot clocks
-+		 * are setup through per-group registers, only available when
-+		 * the group has two channels.
- 		 */
--		rcar_du_group_write(rgrp, DIDSR, DIDSR_CODE |
--				    DIDSR_LCDS_DCLKIN(2) |
--				    DIDSR_LCDS_DCLKIN(1) |
--				    DIDSR_LCDS_DCLKIN(0) |
--				    DIDSR_PDCS_CLK(2, 0) |
--				    DIDSR_PDCS_CLK(1, 0) |
--				    DIDSR_PDCS_CLK(0, 0));
-+		if ((rcdu->info->gen < 3 && rgrp->index == 0) ||
-+		    (rcdu->info->gen == 3 &&  rgrp->num_crtcs > 1))
-+			rcar_du_group_write(rgrp, DIDSR, DIDSR_CODE);
- 	}
- 
- 	if (rcdu->info->gen >= 3)
diff --git a/patches.renesas/0053-ARM-dts-r8a7743-Fix-SCIFB0-dmas-indentation.patch b/patches.renesas/0053-ARM-dts-r8a7743-Fix-SCIFB0-dmas-indentation.patch
deleted file mode 100644
index a0fdca6d7fff92..00000000000000
--- a/patches.renesas/0053-ARM-dts-r8a7743-Fix-SCIFB0-dmas-indentation.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From ce05cb88124a19fdbfaa79d87389c729dba5f519 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 8 Feb 2017 19:00:43 +0100
-Subject: [PATCH 053/286] ARM: dts: r8a7743: Fix SCIFB0 dmas indentation
-
-Fixes: 809c013426914694 ("ARM: dts: r8a7743: add [H]SCIF{A|B} support")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c8290f9f2e1d119512e1821fc13d1d145aa23f77)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7743.dtsi |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7743.dtsi
-+++ b/arch/arm/boot/dts/r8a7743.dtsi
-@@ -277,7 +277,7 @@
- 			clocks = <&cpg CPG_MOD 206>;
- 			clock-names = "fck";
- 			dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
--		       <&dmac1 0x3d>, <&dmac1 0x3e>;
-+			       <&dmac1 0x3d>, <&dmac1 0x3e>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- 			status = "disabled";
diff --git a/patches.renesas/0054-ARM-dts-r8a7745-Fix-SCIFB0-dmas-indentation.patch b/patches.renesas/0054-ARM-dts-r8a7745-Fix-SCIFB0-dmas-indentation.patch
deleted file mode 100644
index bab135332e820b..00000000000000
--- a/patches.renesas/0054-ARM-dts-r8a7745-Fix-SCIFB0-dmas-indentation.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 7de4d32d20e9acb249c9f4b8005595840920bbf6 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 8 Feb 2017 19:00:44 +0100
-Subject: [PATCH 054/286] ARM: dts: r8a7745: Fix SCIFB0 dmas indentation
-
-Fixes: e0d2da54c4d01ba2 ("ARM: dts: r8a7745: add [H]SCIF{|A|B} support")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ad20bb6868f1d29f9c911f14087be4f93c098604)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7745.dtsi |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7745.dtsi
-+++ b/arch/arm/boot/dts/r8a7745.dtsi
-@@ -277,7 +277,7 @@
- 			clocks = <&cpg CPG_MOD 206>;
- 			clock-names = "fck";
- 			dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
--		       <&dmac1 0x3d>, <&dmac1 0x3e>;
-+			       <&dmac1 0x3d>, <&dmac1 0x3e>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
- 			status = "disabled";
diff --git a/patches.renesas/0054-i2c-sh_mobile-document-support-for-r8a7796-R-Car-M3-.patch b/patches.renesas/0054-i2c-sh_mobile-document-support-for-r8a7796-R-Car-M3-.patch
deleted file mode 100644
index dc508463530ea6..00000000000000
--- a/patches.renesas/0054-i2c-sh_mobile-document-support-for-r8a7796-R-Car-M3-.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 7b139ce366cdc76448413de02369ef6092bea74d Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 26 Jan 2017 09:47:31 +0100
-Subject: [PATCH 054/255] i2c: sh_mobile: document support for r8a7796 (R-Car
- M3-W)
-
-Explicitly list per-SoC binding for r8a7796. No driver change
-is required as the initialisation sequence is currently the same
-as for the R-Car Gen3 fallback binding.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 45345e9a85f94f2f7f563cd9b881a19e5d99c72c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
-+++ b/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
-@@ -10,6 +10,7 @@ Required properties:
- 			- "renesas,iic-r8a7793" (R-Car M2-N)
- 			- "renesas,iic-r8a7794" (R-Car E2)
- 			- "renesas,iic-r8a7795" (R-Car H3)
-+			- "renesas,iic-r8a7796" (R-Car M3-W)
- 			- "renesas,iic-sh73a0" (SH-Mobile AG5)
- 			- "renesas,rcar-gen2-iic" (generic R-Car Gen2 compatible device)
- 			- "renesas,rcar-gen3-iic" (generic R-Car Gen3 compatible device)
diff --git a/patches.renesas/0055-ARM-dts-r8a73a4-Remove-unit-addresses-and-regs-from-.patch b/patches.renesas/0055-ARM-dts-r8a73a4-Remove-unit-addresses-and-regs-from-.patch
deleted file mode 100644
index 928b85bdeeac99..00000000000000
--- a/patches.renesas/0055-ARM-dts-r8a73a4-Remove-unit-addresses-and-regs-from-.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 990ac1488361850941a593db7667c76e3a88797c Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 6 Mar 2017 17:40:36 +0100
-Subject: [PATCH 055/286] ARM: dts: r8a73a4: Remove unit-addresses and regs
- from integrated caches
-
-The Cortex-A15/A7 cache controllers are integrated controllers, and thus
-the device nodes representing them should not have unit-addresses or reg
-properties.
-
-Fixes: b0da45c60d2f7b08 ("ARM: dts: r8a73a4: Fix W=1 dtc warnings")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cdaf6417b723e380501f46e555abf0c1c3090124)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4.dtsi |    6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -32,18 +32,16 @@
- 			next-level-cache = <&L2_CA15>;
- 		};
- 
--		L2_CA15: cache-controller@0 {
-+		L2_CA15: cache-controller-0 {
- 			compatible = "cache";
--			reg = <0>;
- 			clocks = <&cpg_clocks R8A73A4_CLK_Z>;
- 			power-domains = <&pd_a3sm>;
- 			cache-unified;
- 			cache-level = <2>;
- 		};
- 
--		L2_CA7: cache-controller@100 {
-+		L2_CA7: cache-controller-1 {
- 			compatible = "cache";
--			reg = <0x100>;
- 			clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
- 			power-domains = <&pd_a3km>;
- 			cache-unified;
diff --git a/patches.renesas/0055-drm-rcar-du-Fix-LVDS-start-sequence-on-Gen3.patch b/patches.renesas/0055-drm-rcar-du-Fix-LVDS-start-sequence-on-Gen3.patch
deleted file mode 100644
index 23b0e986efd642..00000000000000
--- a/patches.renesas/0055-drm-rcar-du-Fix-LVDS-start-sequence-on-Gen3.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 218f0abdaf2249c132c3f4182b10ba3c687108b5 Mon Sep 17 00:00:00 2001
-From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
-Date: Tue, 28 Jun 2016 16:33:45 +0900
-Subject: [PATCH 055/299] drm: rcar-du: Fix LVDS start sequence on Gen3
-
-According to the latest revision of the datasheet, the LVDS I/O pins
-must be enabled before starting the PLL. Fix it.
-
-Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 85e8f8d175caa6a39f4c4e11dd4d0ab038f43324)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c |   15 ++++++++-------
- 1 file changed, 8 insertions(+), 7 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c
-@@ -104,7 +104,14 @@ static void rcar_du_lvdsenc_start_gen3(s
- 
- 	rcar_lvds_write(lvds, LVDPLLCR, pllcr);
- 
--	/* Turn the PLL on, set it to LVDS normal mode, wait for the startup
-+	/* Turn all the channels on. */
-+	rcar_lvds_write(lvds, LVDCR1,
-+			LVDCR1_CHSTBY_GEN3(3) | LVDCR1_CHSTBY_GEN3(2) |
-+			LVDCR1_CHSTBY_GEN3(1) | LVDCR1_CHSTBY_GEN3(0) |
-+			LVDCR1_CLKSTBY_GEN3);
-+
-+	/*
-+	 * Turn the PLL on, set it to LVDS normal mode, wait for the startup
- 	 * delay and turn the output on.
- 	 */
- 	lvdcr0 = LVDCR0_PLLON;
-@@ -117,12 +124,6 @@ static void rcar_du_lvdsenc_start_gen3(s
- 
- 	lvdcr0 |= LVDCR0_LVRES;
- 	rcar_lvds_write(lvds, LVDCR0, lvdcr0);
--
--	/* Turn all the channels on. */
--	rcar_lvds_write(lvds, LVDCR1,
--			LVDCR1_CHSTBY_GEN3(3) | LVDCR1_CHSTBY_GEN3(2) |
--			LVDCR1_CHSTBY_GEN3(1) | LVDCR1_CHSTBY_GEN3(0) |
--			LVDCR1_CLKSTBY_GEN3);
- }
- 
- static int rcar_du_lvdsenc_start(struct rcar_du_lvdsenc *lvds,
diff --git a/patches.renesas/0055-iommu-ipmmu-vmsa-Restrict-IOMMU-Domain-Geometry-to-3.patch b/patches.renesas/0055-iommu-ipmmu-vmsa-Restrict-IOMMU-Domain-Geometry-to-3.patch
deleted file mode 100644
index c329969845a5e7..00000000000000
--- a/patches.renesas/0055-iommu-ipmmu-vmsa-Restrict-IOMMU-Domain-Geometry-to-3.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From bec3c77b8b85620bdcf4c1ad26de51fa2e4fc1c4 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 31 Jan 2017 12:17:07 +0100
-Subject: [PATCH 055/255] iommu/ipmmu-vmsa: Restrict IOMMU Domain Geometry to
- 32-bit address space
-
-Currently, the IPMMU/VMSA driver supports 32-bit I/O Virtual Addresses
-only, and thus sets io_pgtable_cfg.ias = 32.  However, it doesn't force
-a 32-bit IOVA space through the IOMMU Domain Geometry.
-
-Hence if a device (e.g. SYS-DMAC) rightfully configures a 40-bit DMA
-mask, it will still be handed out a 40-bit IOVA, outside the 32-bit IOVA
-space, leading to out-of-bounds accesses of the PGD when mapping the
-IOVA.
-
-Force a 32-bit IOMMU Domain Geometry to fix this.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Robin Murphy <robin.murphy@arm.com>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Joerg Roedel <jroedel@suse.de>
-(cherry picked from commit 3b6bb5b705a4051c9899f5e3100c117c261d2742)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/iommu/ipmmu-vmsa.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/iommu/ipmmu-vmsa.c
-+++ b/drivers/iommu/ipmmu-vmsa.c
-@@ -313,6 +313,8 @@ static int ipmmu_domain_init_context(str
- 	domain->cfg.ias = 32;
- 	domain->cfg.oas = 40;
- 	domain->cfg.tlb = &ipmmu_gather_ops;
-+	domain->io_domain.geometry.aperture_end = DMA_BIT_MASK(32);
-+	domain->io_domain.geometry.force_aperture = true;
- 	/*
- 	 * TODO: Add support for coherent walk through CCI with DVM and remove
- 	 * cache handling. For now, delegate it to the io-pgtable code.
diff --git a/patches.renesas/0056-ARM-dts-r8a7743-Remove-unit-address-and-reg-from-int.patch b/patches.renesas/0056-ARM-dts-r8a7743-Remove-unit-address-and-reg-from-int.patch
deleted file mode 100644
index d19ed5b7d7cc76..00000000000000
--- a/patches.renesas/0056-ARM-dts-r8a7743-Remove-unit-address-and-reg-from-int.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 6a9b216413c5b1c2f285637f971c45a04f281fcc Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 6 Mar 2017 17:40:37 +0100
-Subject: [PATCH 056/286] ARM: dts: r8a7743: Remove unit-address and reg from
- integrated cache
-
-The Cortex-A15 cache controller is an integrated controller, and thus
-the device node representing it should not have a unit-addresses or reg
-property.
-
-Fixes: 34e8d993a68ae459 ("ARM: dts: r8a7743: initial SoC device tree")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 37f0c804e57ac93ca37a98aa5a210c6b73e6572a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7743.dtsi |    3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7743.dtsi
-+++ b/arch/arm/boot/dts/r8a7743.dtsi
-@@ -32,9 +32,8 @@
- 			next-level-cache = <&L2_CA15>;
- 		};
- 
--		L2_CA15: cache-controller@0 {
-+		L2_CA15: cache-controller-0 {
- 			compatible = "cache";
--			reg = <0>;
- 			cache-unified;
- 			cache-level = <2>;
- 			power-domains = <&sysc R8A7743_PD_CA15_SCU>;
diff --git a/patches.renesas/0056-dt-bindings-media-renesas-fcp-Remove-SoC-specific-co.patch b/patches.renesas/0056-dt-bindings-media-renesas-fcp-Remove-SoC-specific-co.patch
deleted file mode 100644
index 5db0cbe8046412..00000000000000
--- a/patches.renesas/0056-dt-bindings-media-renesas-fcp-Remove-SoC-specific-co.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From c8f5ae8945f831451e9b23b5b34f00cb10d90cc2 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 17 Oct 2016 23:29:02 +0300
-Subject: [PATCH 056/299] dt-bindings: media: renesas-fcp: Remove SoC-specific
- compatible strings
-
-The FCP IP cores include a version register that identifies which SoC
-model the IP is integrated in. SoC-specific compatible strings are not
-needed.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a733c81115da9aa501f3cd918fe5b9f3bbe03b11)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/media/renesas,fcp.txt |    8 +-------
- 1 file changed, 1 insertion(+), 7 deletions(-)
-
---- a/Documentation/devicetree/bindings/media/renesas,fcp.txt
-+++ b/Documentation/devicetree/bindings/media/renesas,fcp.txt
-@@ -11,15 +11,9 @@ are paired with. These DT bindings curre
- 
-  - compatible: Must be one or more of the following
- 
--   - "renesas,r8a7795-fcpv" for R8A7795 (R-Car H3) compatible 'FCP for VSP'
--   - "renesas,r8a7795-fcpf" for R8A7795 (R-Car H3) compatible 'FCP for FDP'
-    - "renesas,fcpv" for generic compatible 'FCP for VSP'
-    - "renesas,fcpf" for generic compatible 'FCP for FDP'
- 
--   When compatible with the generic version, nodes must list the
--   SoC-specific version corresponding to the platform first, followed by the
--   family-specific and/or generic versions.
--
-  - reg: the register base and size for the device registers
-  - clocks: Reference to the functional clock
- 
-@@ -32,7 +26,7 @@ Device node example
- -------------------
- 
- 	fcpvd1: fcp@fea2f000 {
--		compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
-+		compatible = "renesas,fcpv";
- 		reg = <0 0xfea2f000 0 0x200>;
- 		clocks = <&cpg CPG_MOD 602>;
- 		power-domains = <&sysc R8A7795_PD_A3VP>;
diff --git a/patches.renesas/0057-ARM-dts-r8a7745-Remove-unit-address-and-reg-from-int.patch b/patches.renesas/0057-ARM-dts-r8a7745-Remove-unit-address-and-reg-from-int.patch
deleted file mode 100644
index e17c9b27521b9e..00000000000000
--- a/patches.renesas/0057-ARM-dts-r8a7745-Remove-unit-address-and-reg-from-int.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 42bf632b7d7b30934a952d11213b87d96bcc6023 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 6 Mar 2017 17:40:38 +0100
-Subject: [PATCH 057/286] ARM: dts: r8a7745: Remove unit-address and reg from
- integrated cache
-
-The Cortex-A7 cache controller is an integrated controller, and thus the
-device node representing it should not have a unit-addresses or reg
-property.
-
-Fixes: c95360247bdd67d3 ("ARM: dts: r8a7745: initial SoC device tree")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 51c00a9f730dd27da23e9dec593c22c0f9f5a1b1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7745.dtsi |    3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7745.dtsi
-+++ b/arch/arm/boot/dts/r8a7745.dtsi
-@@ -32,9 +32,8 @@
- 			next-level-cache = <&L2_CA7>;
- 		};
- 
--		L2_CA7: cache-controller@0 {
-+		L2_CA7: cache-controller-0 {
- 			compatible = "cache";
--			reg = <0>;
- 			cache-unified;
- 			cache-level = <2>;
- 			power-domains = <&sysc R8A7745_PD_CA7_SCU>;
diff --git a/patches.renesas/0057-media-v4l-rcar-fcp-Fix-module-autoload-for-OF-regist.patch b/patches.renesas/0057-media-v4l-rcar-fcp-Fix-module-autoload-for-OF-regist.patch
deleted file mode 100644
index 27b8d4c982b494..00000000000000
--- a/patches.renesas/0057-media-v4l-rcar-fcp-Fix-module-autoload-for-OF-regist.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 985814f123c53bdbbdc4e2400a332863710460c2 Mon Sep 17 00:00:00 2001
-From: Javier Martinez Canillas <javier@osg.samsung.com>
-Date: Mon, 17 Oct 2016 13:44:09 -0200
-Subject: [PATCH 057/299] [media] v4l: rcar-fcp: Fix module autoload for OF
- registration
-
-If the driver is built as a module, autoload won't work because the module
-alias information is not filled. So user-space can't match the registered
-device with the corresponding module.
-
-Export the module alias information using the MODULE_DEVICE_TABLE() macro.
-
-Before this patch:
-
-$ modinfo drivers/media/platform/rcar-fcp.ko | grep alias
-alias:          rcar-fcp
-
-After this patch:
-
-$ modinfo drivers/media/platform/rcar-fcp.ko | grep alias
-alias:          rcar-fcp
-alias:          of:N*T*Crenesas,fcpvC*
-alias:          of:N*T*Crenesas,fcpv
-alias:          of:N*T*Crenesas,fcpfC*
-alias:          of:N*T*Crenesas,fcpf
-
-Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit d6023d33a4ac9bc53975c9029a59135d71a76268)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/rcar-fcp.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/media/platform/rcar-fcp.c
-+++ b/drivers/media/platform/rcar-fcp.c
-@@ -169,6 +169,7 @@ static const struct of_device_id rcar_fc
- 	{ .compatible = "renesas,fcpv" },
- 	{ },
- };
-+MODULE_DEVICE_TABLE(of, rcar_fcp_of_match);
- 
- static struct platform_driver rcar_fcp_platform_driver = {
- 	.probe		= rcar_fcp_probe,
diff --git a/patches.renesas/0057-mtd-spi-nor-add-dt-support-for-Everspin-MRAMs.patch b/patches.renesas/0057-mtd-spi-nor-add-dt-support-for-Everspin-MRAMs.patch
deleted file mode 100644
index 049b5c702d7d80..00000000000000
--- a/patches.renesas/0057-mtd-spi-nor-add-dt-support-for-Everspin-MRAMs.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From eab36c1c55544ea9ec35563a0874df5053952d9f Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= <u.kleine-koenig@pengutronix.de>
-Date: Tue, 17 Jan 2017 12:03:38 +0100
-Subject: [PATCH 057/255] mtd: spi-nor: add dt support for Everspin MRAMs
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The MR25 family doesn't support JEDEC, so they need explicit mentioning
-in the list of supported spi IDs. This makes it possible to add these
-using for example:
-
-	compatible = "everspin,mr25h40";
-
-There was already an entry for mr25h256. Move that one out of the "keep
-for compatibility" section and put in a new group for Everspin MRAMs.
-
-Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
-(cherry picked from commit 3a08e933415c58689797c5bdc825e78a808fffe1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt |    2 ++
- drivers/mtd/devices/m25p80.c                            |    6 +++++-
- 2 files changed, 7 insertions(+), 1 deletion(-)
-
---- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt
-+++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt
-@@ -14,6 +14,8 @@ Required properties:
-                  at25df641
-                  at26df081a
-                  mr25h256
-+                 mr25h10
-+                 mr25h40
-                  mx25l4005a
-                  mx25l1606e
-                  mx25l6405d
---- a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -289,7 +289,6 @@ static const struct spi_device_id m25p_i
- 	 * should be kept for backward compatibility.
- 	 */
- 	{"at25df321a"},	{"at25df641"},	{"at26df081a"},
--	{"mr25h256"},
- 	{"mx25l4005a"},	{"mx25l1606e"},	{"mx25l6405d"},	{"mx25l12805d"},
- 	{"mx25l25635e"},{"mx66l51235l"},
- 	{"n25q064"},	{"n25q128a11"},	{"n25q128a13"},	{"n25q512a"},
-@@ -306,6 +305,11 @@ static const struct spi_device_id m25p_i
- 	{"m25p40-nonjedec"},	{"m25p80-nonjedec"},	{"m25p16-nonjedec"},
- 	{"m25p32-nonjedec"},	{"m25p64-nonjedec"},	{"m25p128-nonjedec"},
- 
-+	/* Everspin MRAMs (non-JEDEC) */
-+	{ "mr25h256" }, /* 256 Kib, 40 MHz */
-+	{ "mr25h10" },  /*   1 Mib, 40 MHz */
-+	{ "mr25h40" },  /*   4 Mib, 40 MHz */
-+
- 	{ },
- };
- MODULE_DEVICE_TABLE(spi, m25p_ids);
diff --git a/patches.renesas/0058-ARM-dts-r8a7790-Remove-unit-addresses-and-regs-from-.patch b/patches.renesas/0058-ARM-dts-r8a7790-Remove-unit-addresses-and-regs-from-.patch
deleted file mode 100644
index 8c0c8da9283f2d..00000000000000
--- a/patches.renesas/0058-ARM-dts-r8a7790-Remove-unit-addresses-and-regs-from-.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 38d94a2c2d3dffb0c18d28baf668d89b9c334dea Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 6 Mar 2017 17:40:39 +0100
-Subject: [PATCH 058/286] ARM: dts: r8a7790: Remove unit-addresses and regs
- from integrated caches
-
-The Cortex-A15/A7 cache controllers are integrated controllers, and thus
-the device nodes representing them should not have unit-addresses or reg
-properties.
-
-Fixes: 2c3de36700d4f3a5 ("ARM: dts: r8a7790: Fix W=1 dtc warnings")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d492909c84b895564d7ac413546ae988945c68db)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi |    6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -129,17 +129,15 @@
- 			next-level-cache = <&L2_CA7>;
- 		};
- 
--		L2_CA15: cache-controller@0 {
-+		L2_CA15: cache-controller-0 {
- 			compatible = "cache";
--			reg = <0>;
- 			power-domains = <&sysc R8A7790_PD_CA15_SCU>;
- 			cache-unified;
- 			cache-level = <2>;
- 		};
- 
--		L2_CA7: cache-controller@100 {
-+		L2_CA7: cache-controller-1 {
- 			compatible = "cache";
--			reg = <0x100>;
- 			power-domains = <&sysc R8A7790_PD_CA7_SCU>;
- 			cache-unified;
- 			cache-level = <2>;
diff --git a/patches.renesas/0058-ARM-shmobile-defconfig-Enable-CONFIG_VIDEO_ADV7604.patch b/patches.renesas/0058-ARM-shmobile-defconfig-Enable-CONFIG_VIDEO_ADV7604.patch
deleted file mode 100644
index a03966329c6341..00000000000000
--- a/patches.renesas/0058-ARM-shmobile-defconfig-Enable-CONFIG_VIDEO_ADV7604.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 6cd751ed6ed4d28468b6c5895316b1ca5347f31d Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Fri, 18 Nov 2016 16:00:44 +0100
-Subject: [PATCH 058/255] ARM: shmobile: defconfig: Enable CONFIG_VIDEO_ADV7604
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The adv7612 is used on Gen2 boards (Lager, Koelsch and Gose) for HDMI
-input. Enable support for this chip in shmobile_defconfig.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1682a9c5694d228041dc7ff59f49427c83920675)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/shmobile_defconfig |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/configs/shmobile_defconfig
-+++ b/arch/arm/configs/shmobile_defconfig
-@@ -145,6 +145,7 @@ CONFIG_VIDEO_RENESAS_JPU=y
- CONFIG_VIDEO_RENESAS_VSP1=y
- # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
- CONFIG_VIDEO_ADV7180=y
-+CONFIG_VIDEO_ADV7604=y
- CONFIG_VIDEO_ML86V7667=y
- CONFIG_DRM=y
- CONFIG_DRM_I2C_ADV7511=y
diff --git a/patches.renesas/0058-reset-Add-renesas-rst-DT-bindings.patch b/patches.renesas/0058-reset-Add-renesas-rst-DT-bindings.patch
deleted file mode 100644
index 7f586ba5c6f20c..00000000000000
--- a/patches.renesas/0058-reset-Add-renesas-rst-DT-bindings.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 8957b4ecc711f9bec12abc3e3c78ebd8c837faf4 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 1 Sep 2015 16:30:12 +0200
-Subject: [PATCH 058/299] reset: Add renesas,rst DT bindings
-
-Add DT bindings for the Renesas R-Car Reset Controller (R-Car Gen1
-RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST).
-
-As the features provided by the hardware module differ a lot across the
-various SoC families and members, only SoC-specific compatible values
-are defined.
-
-For now we use the RST only for providing access to the state of the
-mode pins, which is needed by the clock driver.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Magnus Damm <damm+renesas@opensource.se>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
-Acked-by: Rob Herring <robh@kernel.org>
-(cherry picked from commit 362922a1a5345d17a9d4ad7e3f848aa4fdf79d75)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/reset/renesas,rst.txt |   37 ++++++++++++++++
- 1 file changed, 37 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/reset/renesas,rst.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/reset/renesas,rst.txt
-@@ -0,0 +1,37 @@
-+DT bindings for the Renesas R-Car and RZ/G Reset Controllers
-+
-+The R-Car and RZ/G Reset Controllers provide reset control, and implement the
-+following functions:
-+  - Latching of the levels on mode pins when PRESET# is negated,
-+  - Mode monitoring register,
-+  - Reset control of peripheral devices (on R-Car Gen1),
-+  - Watchdog timer (on R-Car Gen1),
-+  - Register-based reset control and boot address registers for the various CPU
-+    cores (on R-Car Gen2 and Gen3, and on RZ/G).
-+
-+
-+Required properties:
-+  - compatible: Should be
-+		  - "renesas,<soctype>-reset-wdt" for R-Car Gen1,
-+		  - "renesas,<soctype>-rst" for R-Car Gen2 and Gen3, and RZ/G
-+		Examples with soctypes are:
-+		  - "renesas,r8a7743-rst" (RZ/G1M)
-+		  - "renesas,r8a7745-rst" (RZ/G1E)
-+		  - "renesas,r8a7778-reset-wdt" (R-Car M1A)
-+		  - "renesas,r8a7779-reset-wdt" (R-Car H1)
-+		  - "renesas,r8a7790-rst" (R-Car H2)
-+		  - "renesas,r8a7791-rst" (R-Car M2-W)
-+		  - "renesas,r8a7792-rst" (R-Car V2H
-+		  - "renesas,r8a7793-rst" (R-Car M2-N)
-+		  - "renesas,r8a7794-rst" (R-Car E2)
-+		  - "renesas,r8a7795-rst" (R-Car H3)
-+		  - "renesas,r8a7796-rst" (R-Car M3-W)
-+  - reg: Address start and address range for the device.
-+
-+
-+Example:
-+
-+	rst: reset-controller@e6160000 {
-+		compatible = "renesas,r8a7795-rst";
-+		reg = <0 0xe6160000 0 0x0200>;
-+	};
diff --git a/patches.renesas/0059-ARM-shmobile-defconfig-Enable-CMA-for-DMA.patch b/patches.renesas/0059-ARM-shmobile-defconfig-Enable-CMA-for-DMA.patch
deleted file mode 100644
index e57e218a71a99a..00000000000000
--- a/patches.renesas/0059-ARM-shmobile-defconfig-Enable-CMA-for-DMA.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From eee448302c913f7680046b1dab0d366a6e0293b5 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Fri, 18 Nov 2016 16:00:45 +0100
-Subject: [PATCH 059/255] ARM: shmobile: defconfig: Enable CMA for DMA
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-To be able to use VIN with larger frame sizes CMA memory are needed for
-DMA. If this is not enabled trying to capture large frames can result in
-errors such as:
-
-rcar-vin e6ef0000.video: dma_alloc_coherent of size 8388608 failed
-
-A CMA area of 64MB are needed for v4l2-compliance to pass on all formats
-on the largest possible frame size of 2048x2048.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 77af670a7698bbc4dc9fd8bbd553b33bfb16b68a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/shmobile_defconfig |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/arch/arm/configs/shmobile_defconfig
-+++ b/arch/arm/configs/shmobile_defconfig
-@@ -33,6 +33,7 @@ CONFIG_HAVE_ARM_ARCH_TIMER=y
- CONFIG_NR_CPUS=8
- CONFIG_AEABI=y
- CONFIG_HIGHMEM=y
-+CONFIG_CMA=y
- CONFIG_ZBOOT_ROM_TEXT=0x0
- CONFIG_ZBOOT_ROM_BSS=0x0
- CONFIG_ARM_APPENDED_DTB=y
-@@ -58,6 +59,8 @@ CONFIG_CAN_RCAR=y
- CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
- CONFIG_DEVTMPFS=y
- CONFIG_DEVTMPFS_MOUNT=y
-+CONFIG_DMA_CMA=y
-+CONFIG_CMA_SIZE_MBYTES=64
- CONFIG_SIMPLE_PM_BUS=y
- CONFIG_MTD=y
- CONFIG_MTD_BLOCK=y
diff --git a/patches.renesas/0059-soc-renesas-Add-R-Car-RST-driver.patch b/patches.renesas/0059-soc-renesas-Add-R-Car-RST-driver.patch
deleted file mode 100644
index fd1f32f5a6f9c4..00000000000000
--- a/patches.renesas/0059-soc-renesas-Add-R-Car-RST-driver.patch
+++ /dev/null
@@ -1,151 +0,0 @@
-From df1f0347e86be731d8c0d7347d98ef246c1f4ffa Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 27 May 2016 11:56:53 +0200
-Subject: [PATCH 059/299] soc: renesas: Add R-Car RST driver
-
-Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3
-and RZ/G RST module.
-
-For now this driver just provides an API to obtain the state of the mode
-pins, as latched at reset time.  As this is typically called from the
-probe function of a clock driver, which can run much earlier than any
-initcall, calling rcar_rst_read_mode_pins() just forces an early
-initialization of the driver.
-
-Despite the current simple and almost identical handling for all
-supported SoCs, the driver matches against SoC-specific compatible
-values, as the features provided by the hardware module differ a lot
-across the various SoC families and members.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-(cherry picked from commit 527c02f66d263d2eeff237a2326c3278cfc03d3b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/soc/renesas/Makefile
----
- drivers/soc/renesas/Makefile         |    5 +
- drivers/soc/renesas/rcar-rst.c       |   92 +++++++++++++++++++++++++++++++++++
- include/linux/soc/renesas/rcar-rst.h |    6 ++
- 3 files changed, 103 insertions(+)
- create mode 100644 drivers/soc/renesas/rcar-rst.c
- create mode 100644 include/linux/soc/renesas/rcar-rst.h
-
---- a/drivers/soc/renesas/Makefile
-+++ b/drivers/soc/renesas/Makefile
-@@ -1,5 +1,10 @@
- obj-$(CONFIG_SOC_BUS)		+= renesas-soc.o
- 
-+obj-$(CONFIG_ARCH_RCAR_GEN1)	+= rcar-rst.o
-+obj-$(CONFIG_ARCH_RCAR_GEN2)	+= rcar-rst.o
-+obj-$(CONFIG_ARCH_R8A7795)	+= rcar-rst.o
-+obj-$(CONFIG_ARCH_R8A7796)	+= rcar-rst.o
-+
- obj-$(CONFIG_ARCH_R8A7743)	+= rcar-sysc.o r8a7743-sysc.o
- obj-$(CONFIG_ARCH_R8A7745)	+= rcar-sysc.o r8a7745-sysc.o
- obj-$(CONFIG_ARCH_R8A7779)	+= rcar-sysc.o r8a7779-sysc.o
---- /dev/null
-+++ b/drivers/soc/renesas/rcar-rst.c
-@@ -0,0 +1,92 @@
-+/*
-+ * R-Car Gen1 RESET/WDT, R-Car Gen2, Gen3, and RZ/G RST Driver
-+ *
-+ * Copyright (C) 2016 Glider bvba
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ */
-+
-+#include <linux/err.h>
-+#include <linux/io.h>
-+#include <linux/of_address.h>
-+#include <linux/soc/renesas/rcar-rst.h>
-+
-+struct rst_config {
-+	unsigned int modemr;	/* Mode Monitoring Register Offset */
-+};
-+
-+static const struct rst_config rcar_rst_gen1 __initconst = {
-+	.modemr = 0x20,
-+};
-+
-+static const struct rst_config rcar_rst_gen2 __initconst = {
-+	.modemr = 0x60,
-+};
-+
-+static const struct of_device_id rcar_rst_matches[] __initconst = {
-+	/* RZ/G is handled like R-Car Gen2 */
-+	{ .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
-+	{ .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
-+	/* R-Car Gen1 */
-+	{ .compatible = "renesas,r8a7778-reset-wdt", .data = &rcar_rst_gen1 },
-+	{ .compatible = "renesas,r8a7779-reset-wdt", .data = &rcar_rst_gen1 },
-+	/* R-Car Gen2 */
-+	{ .compatible = "renesas,r8a7790-rst", .data = &rcar_rst_gen2 },
-+	{ .compatible = "renesas,r8a7791-rst", .data = &rcar_rst_gen2 },
-+	{ .compatible = "renesas,r8a7792-rst", .data = &rcar_rst_gen2 },
-+	{ .compatible = "renesas,r8a7793-rst", .data = &rcar_rst_gen2 },
-+	{ .compatible = "renesas,r8a7794-rst", .data = &rcar_rst_gen2 },
-+	/* R-Car Gen3 is handled like R-Car Gen2 */
-+	{ .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen2 },
-+	{ .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen2 },
-+	{ /* sentinel */ }
-+};
-+
-+static void __iomem *rcar_rst_base __initdata;
-+static u32 saved_mode __initdata;
-+
-+static int __init rcar_rst_init(void)
-+{
-+	const struct of_device_id *match;
-+	const struct rst_config *cfg;
-+	struct device_node *np;
-+	void __iomem *base;
-+	int error = 0;
-+
-+	np = of_find_matching_node_and_match(NULL, rcar_rst_matches, &match);
-+	if (!np)
-+		return -ENODEV;
-+
-+	base = of_iomap(np, 0);
-+	if (!base) {
-+		pr_warn("%s: Cannot map regs\n", np->full_name);
-+		error = -ENOMEM;
-+		goto out_put;
-+	}
-+
-+	rcar_rst_base = base;
-+	cfg = match->data;
-+	saved_mode = ioread32(base + cfg->modemr);
-+
-+	pr_debug("%s: MODE = 0x%08x\n", np->full_name, saved_mode);
-+
-+out_put:
-+	of_node_put(np);
-+	return error;
-+}
-+
-+int __init rcar_rst_read_mode_pins(u32 *mode)
-+{
-+	int error;
-+
-+	if (!rcar_rst_base) {
-+		error = rcar_rst_init();
-+		if (error)
-+			return error;
-+	}
-+
-+	*mode = saved_mode;
-+	return 0;
-+}
---- /dev/null
-+++ b/include/linux/soc/renesas/rcar-rst.h
-@@ -0,0 +1,6 @@
-+#ifndef __LINUX_SOC_RENESAS_RCAR_RST_H__
-+#define __LINUX_SOC_RENESAS_RCAR_RST_H__
-+
-+int rcar_rst_read_mode_pins(u32 *mode);
-+
-+#endif /* __LINUX_SOC_RENESAS_RCAR_RST_H__ */
diff --git a/patches.renesas/0060-ARM-shmobile-defconfig-Enable-r8a774-35-SoCs.patch b/patches.renesas/0060-ARM-shmobile-defconfig-Enable-r8a774-35-SoCs.patch
deleted file mode 100644
index 729cbffec47daf..00000000000000
--- a/patches.renesas/0060-ARM-shmobile-defconfig-Enable-r8a774-35-SoCs.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 13c8dff451612fc093654a9e638e7535e6a4e3f0 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 6 Dec 2016 14:32:52 +0100
-Subject: [PATCH 060/255] ARM: shmobile: defconfig: Enable r8a774[35] SoCs
-
-Enable recently added r8a7743 (RZ/G1M) and r8a7745 (RZ/G1E) SoCs.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit d234e29dae04b224a63e39bc29938fa77819b3f1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/shmobile_defconfig |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/arch/arm/configs/shmobile_defconfig
-+++ b/arch/arm/configs/shmobile_defconfig
-@@ -14,6 +14,8 @@ CONFIG_ARCH_EMEV2=y
- CONFIG_ARCH_R7S72100=y
- CONFIG_ARCH_R8A73A4=y
- CONFIG_ARCH_R8A7740=y
-+CONFIG_ARCH_R8A7743=y
-+CONFIG_ARCH_R8A7745=y
- CONFIG_ARCH_R8A7778=y
- CONFIG_ARCH_R8A7779=y
- CONFIG_ARCH_R8A7790=y
diff --git a/patches.renesas/0060-ASoC-rsnd-remove-duplicate-define-of-rsnd_dvc_of_nod.patch b/patches.renesas/0060-ASoC-rsnd-remove-duplicate-define-of-rsnd_dvc_of_nod.patch
deleted file mode 100644
index 581eeadcb4eaa5..00000000000000
--- a/patches.renesas/0060-ASoC-rsnd-remove-duplicate-define-of-rsnd_dvc_of_nod.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 6901e2bcadbd874e9e675fc798db8fa257e5c0e8 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 19 Oct 2016 03:56:07 +0000
-Subject: [PATCH 060/299] ASoC: rsnd: remove duplicate define of
- rsnd_dvc_of_node()
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 5490a109937b19464dc810389e69ff064afedf48)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/dvc.c |    2 --
- 1 file changed, 2 deletions(-)
-
---- a/sound/soc/sh/rcar/dvc.c
-+++ b/sound/soc/sh/rcar/dvc.c
-@@ -48,8 +48,6 @@ struct rsnd_dvc {
- 
- #define rsnd_dvc_get(priv, id) ((struct rsnd_dvc *)(priv->dvc) + id)
- #define rsnd_dvc_nr(priv) ((priv)->dvc_nr)
--#define rsnd_dvc_of_node(priv) \
--	of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,dvc")
- 
- #define rsnd_mod_to_dvc(_mod)	\
- 	container_of((_mod), struct rsnd_dvc, mod)
diff --git a/patches.renesas/0061-ARM-dts-r8a7743-Move-RST-node-before-SYSC-node.patch b/patches.renesas/0061-ARM-dts-r8a7743-Move-RST-node-before-SYSC-node.patch
deleted file mode 100644
index 4ed6e5b7d75742..00000000000000
--- a/patches.renesas/0061-ARM-dts-r8a7743-Move-RST-node-before-SYSC-node.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 115ebe196a2fb3190fbdbf0eef1481a36dfcda78 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 18 Nov 2016 11:24:22 +0100
-Subject: [PATCH 061/255] ARM: dts: r8a7743: Move RST node before SYSC node
-
-To preserve both alphabetical (label) and numerical ordering (unit
-address).
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a97f1dfb7f6eec1998d51e7335e265be5c6314a1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7743.dtsi |   10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7743.dtsi
-+++ b/arch/arm/boot/dts/r8a7743.dtsi
-@@ -102,17 +102,17 @@
- 			#power-domain-cells = <0>;
- 		};
- 
-+		rst: reset-controller@e6160000 {
-+			compatible = "renesas,r8a7743-rst";
-+			reg = <0 0xe6160000 0 0x100>;
-+		};
-+
- 		sysc: system-controller@e6180000 {
- 			compatible = "renesas,r8a7743-sysc";
- 			reg = <0 0xe6180000 0 0x200>;
- 			#power-domain-cells = <1>;
- 		};
- 
--		rst: reset-controller@e6160000 {
--			compatible = "renesas,r8a7743-rst";
--			reg = <0 0xe6160000 0 0x100>;
--		};
--
- 		dmac0: dma-controller@e6700000 {
- 			compatible = "renesas,dmac-r8a7743",
- 				     "renesas,rcar-dmac";
diff --git a/patches.renesas/0061-ASoC-rsnd-amend-.probe-.remove-call-for-DPCM.patch b/patches.renesas/0061-ASoC-rsnd-amend-.probe-.remove-call-for-DPCM.patch
deleted file mode 100644
index 09aa73a51f3eb0..00000000000000
--- a/patches.renesas/0061-ASoC-rsnd-amend-.probe-.remove-call-for-DPCM.patch
+++ /dev/null
@@ -1,127 +0,0 @@
-From e1719d6d8a1696f0c7bbbb30195978da484b16b5 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 19 Oct 2016 03:56:26 +0000
-Subject: [PATCH 061/299] ASoC: rsnd: amend .probe/.remove call for DPCM
-
-commit 1a5658c2131 ("ASoC: rsnd: count .probe/.remove for
-rsnd_mod_call()") solved multi-resource-free issue, by putting
-.probe/.remove under count control. But,it breaks sound mixing case
-(if it was used under DPCM). In such case, it uses MIXn/DVCn/SSIn,
-and these should be always probed.
-This patch reverted above patch, and solved the same issue by
-modifing _rsnd_kctrl_remove() function.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 0af5c01a79ade438698af683511803fc11291360)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c |    6 +++++-
- sound/soc/sh/rcar/dma.c  |   11 +++++++++++
- sound/soc/sh/rcar/rsnd.h |   14 +++++++-------
- sound/soc/sh/rcar/ssi.c  |    5 ++++-
- 4 files changed, 27 insertions(+), 9 deletions(-)
-
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -991,7 +991,11 @@ static int __rsnd_kctrl_new(struct rsnd_
- 
- void _rsnd_kctrl_remove(struct rsnd_kctrl_cfg *cfg)
- {
--	snd_ctl_remove(cfg->card, cfg->kctrl);
-+	if (cfg->card && cfg->kctrl)
-+		snd_ctl_remove(cfg->card, cfg->kctrl);
-+
-+	cfg->card = NULL;
-+	cfg->kctrl = NULL;
- }
- 
- int rsnd_kctrl_new_m(struct rsnd_mod *mod,
---- a/sound/soc/sh/rcar/dma.c
-+++ b/sound/soc/sh/rcar/dma.c
-@@ -721,6 +721,17 @@ int rsnd_dma_attach(struct rsnd_dai_stre
- 	return 0;
- }
- 
-+void rsnd_dma_detach(struct rsnd_mod *mod, struct rsnd_mod **dma_mod)
-+{
-+	if (*dma_mod) {
-+		struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+		struct device *dev = rsnd_priv_to_dev(priv);
-+
-+		devm_kfree(dev, *dma_mod);
-+		*dma_mod = NULL;
-+	}
-+}
-+
- int rsnd_dma_probe(struct rsnd_priv *priv)
- {
- 	struct platform_device *pdev = rsnd_priv_to_pdev(priv);
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -200,6 +200,7 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod
-  */
- int rsnd_dma_attach(struct rsnd_dai_stream *io,
- 		    struct rsnd_mod *mod, struct rsnd_mod **dma_mod, int id);
-+void rsnd_dma_detach(struct rsnd_mod *mod, struct rsnd_mod **dma_mod);
- int rsnd_dma_probe(struct rsnd_priv *priv);
- struct dma_chan *rsnd_dma_request_channel(struct device_node *of_node,
- 					  struct rsnd_mod *mod, char *name);
-@@ -276,9 +277,8 @@ struct rsnd_mod {
- /*
-  * status
-  *
-- * 0xH0000CBA
-+ * 0xH0000CB0
-  *
-- * A	0: probe	1: remove
-  * B	0: init		1: quit
-  * C	0: start	1: stop
-  *
-@@ -288,19 +288,19 @@ struct rsnd_mod {
-  * H	0: fallback
-  * H	0: hw_params
-  */
--#define __rsnd_mod_shift_probe		0
--#define __rsnd_mod_shift_remove		0
- #define __rsnd_mod_shift_init		4
- #define __rsnd_mod_shift_quit		4
- #define __rsnd_mod_shift_start		8
- #define __rsnd_mod_shift_stop		8
-+#define __rsnd_mod_shift_probe		28 /* always called */
-+#define __rsnd_mod_shift_remove		28 /* always called */
- #define __rsnd_mod_shift_irq		28 /* always called */
- #define __rsnd_mod_shift_pcm_new	28 /* always called */
- #define __rsnd_mod_shift_fallback	28 /* always called */
- #define __rsnd_mod_shift_hw_params	28 /* always called */
- 
--#define __rsnd_mod_add_probe		 1
--#define __rsnd_mod_add_remove		-1
-+#define __rsnd_mod_add_probe		0
-+#define __rsnd_mod_add_remove		0
- #define __rsnd_mod_add_init		 1
- #define __rsnd_mod_add_quit		-1
- #define __rsnd_mod_add_start		 1
-@@ -311,7 +311,7 @@ struct rsnd_mod {
- #define __rsnd_mod_add_hw_params	0
- 
- #define __rsnd_mod_call_probe		0
--#define __rsnd_mod_call_remove		1
-+#define __rsnd_mod_call_remove		0
- #define __rsnd_mod_call_init		0
- #define __rsnd_mod_call_quit		1
- #define __rsnd_mod_call_start		0
---- a/sound/soc/sh/rcar/ssi.c
-+++ b/sound/soc/sh/rcar/ssi.c
-@@ -724,7 +724,10 @@ static int rsnd_ssi_dma_remove(struct rs
- 		return 0;
- 
- 	/* PIO will request IRQ again */
--	devm_free_irq(dev, irq, mod);
-+	if (ssi->dma)
-+		devm_free_irq(dev, irq, mod);
-+
-+	rsnd_dma_detach(mod, &ssi->dma);
- 
- 	return 0;
- }
diff --git a/patches.renesas/0062-ARM-dts-r8a7745-Move-RST-node-before-SYSC-node.patch b/patches.renesas/0062-ARM-dts-r8a7745-Move-RST-node-before-SYSC-node.patch
deleted file mode 100644
index baa9c3476875cf..00000000000000
--- a/patches.renesas/0062-ARM-dts-r8a7745-Move-RST-node-before-SYSC-node.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 8446ed915e5738e91c35aa82802e2e0f31ddc4f1 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 18 Nov 2016 11:24:23 +0100
-Subject: [PATCH 062/255] ARM: dts: r8a7745: Move RST node before SYSC node
-
-To preserve both alphabetical (label) and numerical ordering (unit
-address).
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 13ae6ac495846b54ad47d71075bbaf9d8224d356)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7745.dtsi |   10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7745.dtsi
-+++ b/arch/arm/boot/dts/r8a7745.dtsi
-@@ -102,17 +102,17 @@
- 			#power-domain-cells = <0>;
- 		};
- 
-+		rst: reset-controller@e6160000 {
-+			compatible = "renesas,r8a7745-rst";
-+			reg = <0 0xe6160000 0 0x100>;
-+		};
-+
- 		sysc: system-controller@e6180000 {
- 			compatible = "renesas,r8a7745-sysc";
- 			reg = <0 0xe6180000 0 0x200>;
- 			#power-domain-cells = <1>;
- 		};
- 
--		rst: reset-controller@e6160000 {
--			compatible = "renesas,r8a7745-rst";
--			reg = <0 0xe6160000 0 0x100>;
--		};
--
- 		dmac0: dma-controller@e6700000 {
- 			compatible = "renesas,dmac-r8a7745",
- 				     "renesas,rcar-dmac";
diff --git a/patches.renesas/0062-ASoC-rsnd-add-rsnd_mod_next-for-for_each_rsnd_mod_xx.patch b/patches.renesas/0062-ASoC-rsnd-add-rsnd_mod_next-for-for_each_rsnd_mod_xx.patch
deleted file mode 100644
index 6ff680dde3d99f..00000000000000
--- a/patches.renesas/0062-ASoC-rsnd-add-rsnd_mod_next-for-for_each_rsnd_mod_xx.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From e4fb7b5800c227f74efa2d7ab040857e56898758 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 19 Oct 2016 03:56:46 +0000
-Subject: [PATCH 062/299] ASoC: rsnd: add rsnd_mod_next() for
- for_each_rsnd_mod_xxx()
-
-Current rsnd driver is using too complex macro for for-loop of each mod.
-In order to simplify this issue, this patch adds new rsnd_mod_next()
-which is non-macro.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit b3ca3fbeb229890e8de569d1b34cd46fcb95826c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c |   23 +++++++++++++++++++++++
- sound/soc/sh/rcar/rsnd.h |   12 ++++++++++++
- 2 files changed, 35 insertions(+)
-
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -348,6 +348,29 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod
- /*
-  *	rsnd_dai functions
-  */
-+struct rsnd_mod *rsnd_mod_next(int *iterator,
-+			       struct rsnd_dai_stream *io,
-+			       enum rsnd_mod_type *array,
-+			       int array_size)
-+{
-+	struct rsnd_mod *mod;
-+	enum rsnd_mod_type type;
-+	int max = array ? array_size : RSND_MOD_MAX;
-+
-+	for (; *iterator < max; (*iterator)++) {
-+		type = (array) ? array[*iterator] : *iterator;
-+		mod = io->mod[type];
-+		if (!mod)
-+			continue;
-+
-+		(*iterator)++;
-+
-+		return mod;
-+	}
-+
-+	return NULL;
-+}
-+
- #define rsnd_mod_call(idx, io, func, param...)			\
- ({								\
- 	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);		\
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -346,6 +346,18 @@ void rsnd_mod_interrupt(struct rsnd_mod
- u32 *rsnd_mod_get_status(struct rsnd_dai_stream *io,
- 			 struct rsnd_mod *mod,
- 			 enum rsnd_mod_type type);
-+struct rsnd_mod *rsnd_mod_next(int *iterator,
-+			       struct rsnd_dai_stream *io,
-+			       enum rsnd_mod_type *array,
-+			       int array_size);
-+#define for_each_rsnd_mod(iterator, pos, io)				\
-+	for (iterator = 0;						\
-+	     (pos = rsnd_mod_next(&iterator, io, NULL, 0));)
-+#define for_each_rsnd_mod_arrays(iterator, pos, io, array, size)	\
-+	for (iterator = 0;						\
-+	     (pos = rsnd_mod_next(&iterator, io, array, size));)
-+#define for_each_rsnd_mod_array(iterator, pos, io, array)		\
-+	for_each_rsnd_mod_arrays(iterator, pos, io, array, ARRAY_SIZE(array))
- 
- void rsnd_parse_connect_common(struct rsnd_dai *rdai,
- 		struct rsnd_mod* (*mod_get)(struct rsnd_priv *priv, int id),
diff --git a/patches.renesas/0063-ARM-dts-r8a7743-Add-device-node-for-PRR.patch b/patches.renesas/0063-ARM-dts-r8a7743-Add-device-node-for-PRR.patch
deleted file mode 100644
index 355f08a9c80c70..00000000000000
--- a/patches.renesas/0063-ARM-dts-r8a7743-Add-device-node-for-PRR.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 0d862b3d90f8a1f0d4f5401dae495cd9f87333a8 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 18 Nov 2016 11:37:42 +0100
-Subject: [PATCH 063/255] ARM: dts: r8a7743: Add device node for PRR
-
-Add a device node for the Product Register, which provides SoC product
-and revision information.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 11d4407e939e74e89a29df88b1557b59ece9e9f9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7743.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7743.dtsi
-+++ b/arch/arm/boot/dts/r8a7743.dtsi
-@@ -102,6 +102,11 @@
- 			#power-domain-cells = <0>;
- 		};
- 
-+		prr: chipid@ff000044 {
-+			compatible = "renesas,prr";
-+			reg = <0 0xff000044 0 4>;
-+		};
-+
- 		rst: reset-controller@e6160000 {
- 			compatible = "renesas,r8a7743-rst";
- 			reg = <0 0xe6160000 0 0x100>;
diff --git a/patches.renesas/0063-ARM-dts-r8a7790-Tidyup-Audio-DMAC-channel-for-DVC.patch b/patches.renesas/0063-ARM-dts-r8a7790-Tidyup-Audio-DMAC-channel-for-DVC.patch
deleted file mode 100644
index f213cd5299005e..00000000000000
--- a/patches.renesas/0063-ARM-dts-r8a7790-Tidyup-Audio-DMAC-channel-for-DVC.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 859a317e88728520543a91bdacd519dd3638d566 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 7 Mar 2017 05:28:57 +0000
-Subject: [PATCH 063/286] ARM: dts: r8a7790: Tidyup Audio-DMAC channel for DVC
-
-Current	Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
-Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
-
-Because of this, current platform board (using SRC/DVC/SSI)
-Playback/Capture both will use same Audio-DMAC0
-(but it depends on data path).
-
-First note is that this "rx" and "tx" are from each IP point,
-it doesn't mean Playback/Capture.
-Second note is that Audio DMAC assigned on DT is only for
-Audio-DMAC, Audio-DMAC-peri-peri has no entry.
-
-=> Audio-DMAC
--> Audio-DMAC-peri-peri
--- HW connection
-
-Playback case
-
-	[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
-	      rx ~~~~~~~~~~~~
-Capture
-
-	[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
-	      tx ~~~~~~~~~~~~
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c4a59df9de199426b773a15e0c774ae25f628d5d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -1741,11 +1741,11 @@
- 
- 		rcar_sound,dvc {
- 			dvc0: dvc-0 {
--				dmas = <&audma0 0xbc>;
-+				dmas = <&audma1 0xbc>;
- 				dma-names = "tx";
- 			};
- 			dvc1: dvc-1 {
--				dmas = <&audma0 0xbe>;
-+				dmas = <&audma1 0xbe>;
- 				dma-names = "tx";
- 			};
- 		};
diff --git a/patches.renesas/0063-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_dai_call.patch b/patches.renesas/0063-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_dai_call.patch
deleted file mode 100644
index 008e5e3b222d50..00000000000000
--- a/patches.renesas/0063-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_dai_call.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From 493e07c0eb1db5479023876310b19aade527f185 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 19 Oct 2016 03:57:08 +0000
-Subject: [PATCH 063/299] ASoC: rsnd: use for_each_rsnd_mod_xxx() on
- rsnd_dai_call()
-
-Current rsnd driver is using too complex macro for for-loop of each mod.
-rsnd_dai_call() is especially defined as very complex macro.
-It is easier to read just a little bit by using for_each_rsnd_mod_xxx()
-and new rsnd_status_update()
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 5f222a29212cac3b64e7da8657d4404cc8201595)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c |   83 ++++++++++++++++++++++++-----------------------
- 1 file changed, 43 insertions(+), 40 deletions(-)
-
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -371,33 +371,6 @@ struct rsnd_mod *rsnd_mod_next(int *iter
- 	return NULL;
- }
- 
--#define rsnd_mod_call(idx, io, func, param...)			\
--({								\
--	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);		\
--	struct rsnd_mod *mod = (io)->mod[idx];			\
--	struct device *dev = rsnd_priv_to_dev(priv);		\
--	u32 *status = mod->get_status(io, mod, idx);			\
--	u32 mask = 0xF << __rsnd_mod_shift_##func;			\
--	u8 val  = (*status >> __rsnd_mod_shift_##func) & 0xF;		\
--	u8 add  = ((val + __rsnd_mod_add_##func) & 0xF);		\
--	int ret = 0;							\
--	int call = (val == __rsnd_mod_call_##func) && (mod)->ops->func;	\
--	if (add == 0xF)							\
--		call = 0;						\
--	else								\
--		*status = (*status & ~mask) +				\
--			(add << __rsnd_mod_shift_##func);		\
--	dev_dbg(dev, "%s[%d]\t0x%08x %s\n",				\
--		rsnd_mod_name(mod), rsnd_mod_id(mod),			\
--		*status, call ? #func : "");				\
--	if (call)							\
--		ret = (mod)->ops->func(mod, io, param);			\
--	if (ret)							\
--		dev_dbg(dev, "%s[%d] : rsnd_mod_call error %d\n",	\
--			rsnd_mod_name(mod), rsnd_mod_id(mod), ret);	\
--	ret;								\
--})
--
- static enum rsnd_mod_type rsnd_mod_sequence[][RSND_MOD_MAX] = {
- 	{
- 		/* CAPTURE */
-@@ -432,19 +405,49 @@ static enum rsnd_mod_type rsnd_mod_seque
- 	},
- };
- 
--#define rsnd_dai_call(fn, io, param...)				\
--({								\
--	struct rsnd_mod *mod;					\
--	int type, is_play = rsnd_io_is_play(io);		\
--	int ret = 0, i;						\
--	for (i = 0; i < RSND_MOD_MAX; i++) {			\
--		type = rsnd_mod_sequence[is_play][i];		\
--		mod = (io)->mod[type];				\
--		if (!mod)					\
--			continue;				\
--		ret |= rsnd_mod_call(type, io, fn, param);	\
--	}							\
--	ret;							\
-+static int rsnd_status_update(u32 *status,
-+			      int shift, int add, int timing)
-+{
-+	u32 mask	= 0xF << shift;
-+	u8 val		= (*status >> shift) & 0xF;
-+	u8 next_val	= (val + add) & 0xF;
-+	int func_call	= (val == timing);
-+
-+	if (next_val == 0xF) /* underflow case */
-+		func_call = 0;
-+	else
-+		*status = (*status & ~mask) + (next_val << shift);
-+
-+	return func_call;
-+}
-+
-+#define rsnd_dai_call(fn, io, param...)					\
-+({									\
-+	struct rsnd_priv *priv = rsnd_io_to_priv(io);			\
-+	struct device *dev = rsnd_priv_to_dev(priv);			\
-+	struct rsnd_mod *mod;						\
-+	int is_play = rsnd_io_is_play(io);				\
-+	int ret = 0, i;							\
-+	enum rsnd_mod_type *types = rsnd_mod_sequence[is_play];		\
-+	for_each_rsnd_mod_arrays(i, mod, io, types, RSND_MOD_MAX) {	\
-+		int tmp = 0;						\
-+		u32 *status = mod->get_status(io, mod, types[i]);	\
-+		int func_call = rsnd_status_update(status,		\
-+						__rsnd_mod_shift_##fn,	\
-+						__rsnd_mod_add_##fn,	\
-+						__rsnd_mod_call_##fn);	\
-+		dev_dbg(dev, "%s[%d]\t0x%08x %s\n",			\
-+			rsnd_mod_name(mod), rsnd_mod_id(mod), *status,	\
-+			(func_call && (mod)->ops->fn) ? #fn : "");	\
-+		if (func_call && (mod)->ops->fn)			\
-+			tmp = (mod)->ops->fn(mod, io, param);		\
-+		if (tmp)						\
-+			dev_err(dev, "%s[%d] : %s error %d\n",		\
-+				rsnd_mod_name(mod), rsnd_mod_id(mod),	\
-+						     #fn, tmp);		\
-+		ret |= tmp;						\
-+	}								\
-+	ret;								\
- })
- 
- int rsnd_dai_connect(struct rsnd_mod *mod,
diff --git a/patches.renesas/0064-ARM-dts-r7s72100-Add-watchdog-timer.patch b/patches.renesas/0064-ARM-dts-r7s72100-Add-watchdog-timer.patch
deleted file mode 100644
index 796da2eb26bd95..00000000000000
--- a/patches.renesas/0064-ARM-dts-r7s72100-Add-watchdog-timer.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 0ae198db28be0e6256d2441209aa5f5aa3d04292 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Sat, 4 Mar 2017 17:37:37 -0500
-Subject: [PATCH 064/286] ARM: dts: r7s72100: Add watchdog timer
-
-Add watchdog timer support for RZ/A1.
-For the RZ/A1, the only way to do a reset is to overflow the WDT, so this
-is useful even if you don't need the watchdog functionality.
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Guenter Roeck <linux@roeck-us.net>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 69ed50de582eff6307fd3fa050fdc505731f0a2d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100.dtsi |    7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100.dtsi
-+++ b/arch/arm/boot/dts/r7s72100.dtsi
-@@ -371,6 +371,13 @@
- 			<0xe8202000 0x1000>;
- 	};
- 
-+	wdt: watchdog@fcfe0000 {
-+		compatible = "renesas,r7s72100-wdt", "renesas,rza-wdt";
-+		reg = <0xfcfe0000 0x6>;
-+		interrupts = <GIC_SPI 106 IRQ_TYPE_EDGE_RISING>;
-+		clocks = <&p0_clk>;
-+	};
-+
- 	i2c0: i2c@fcfee000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
diff --git a/patches.renesas/0064-ARM-dts-r8a7745-Add-device-node-for-PRR.patch b/patches.renesas/0064-ARM-dts-r8a7745-Add-device-node-for-PRR.patch
deleted file mode 100644
index f6aa8e66c402b8..00000000000000
--- a/patches.renesas/0064-ARM-dts-r8a7745-Add-device-node-for-PRR.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 8924412081600c2b2a7f7b66e7ea2bb6072132df Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 18 Nov 2016 11:37:43 +0100
-Subject: [PATCH 064/255] ARM: dts: r8a7745: Add device node for PRR
-
-Add a device node for the Product Register, which provides SoC product
-and revision information.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8916c7b58319fa27eae25c0c9b9a4cd68b9b30bd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7745.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7745.dtsi
-+++ b/arch/arm/boot/dts/r8a7745.dtsi
-@@ -102,6 +102,11 @@
- 			#power-domain-cells = <0>;
- 		};
- 
-+		prr: chipid@ff000044 {
-+			compatible = "renesas,prr";
-+			reg = <0 0xff000044 0 4>;
-+		};
-+
- 		rst: reset-controller@e6160000 {
- 			compatible = "renesas,r8a7745-rst";
- 			reg = <0 0xe6160000 0 0x100>;
diff --git a/patches.renesas/0064-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_rdai_con.patch b/patches.renesas/0064-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_rdai_con.patch
deleted file mode 100644
index e8c8b5ce511dea..00000000000000
--- a/patches.renesas/0064-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_rdai_con.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 2a58bd93bdc4b3f8fc7b4409ffe9a10022c74959 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 19 Oct 2016 03:57:27 +0000
-Subject: [PATCH 064/299] ASoC: rsnd: use for_each_rsnd_mod_xxx() on
- rsnd_rdai_continuance_probe()
-
-Now, we have for_each_rsnd_mod(), let's use it
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 9b87bfb2e8e1bbd685489a84f4841250cab493ca)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c |    5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -1120,6 +1120,7 @@ static int rsnd_rdai_continuance_probe(s
- 	ret = rsnd_dai_call(probe, io, priv);
- 	if (ret == -EAGAIN) {
- 		struct rsnd_mod *ssi_mod = rsnd_io_to_mod_ssi(io);
-+		struct rsnd_mod *mod;
- 		int i;
- 
- 		/*
-@@ -1139,8 +1140,8 @@ static int rsnd_rdai_continuance_probe(s
- 		 * remove all mod from io
- 		 * and, re connect ssi
- 		 */
--		for (i = 0; i < RSND_MOD_MAX; i++)
--			rsnd_dai_disconnect((io)->mod[i], io, i);
-+		for_each_rsnd_mod(i, mod, io)
-+			rsnd_dai_disconnect(mod, io, i);
- 		rsnd_dai_connect(ssi_mod, io, RSND_MOD_SSI);
- 
- 		/*
diff --git a/patches.renesas/0065-ARM-dts-r8a73a4-Add-INTC-SYS-clock-to-device-tree.patch b/patches.renesas/0065-ARM-dts-r8a73a4-Add-INTC-SYS-clock-to-device-tree.patch
deleted file mode 100644
index 9d589c0320a323..00000000000000
--- a/patches.renesas/0065-ARM-dts-r8a73a4-Add-INTC-SYS-clock-to-device-tree.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 8c1599019236b1f34a272635f4e58f3aa5452b25 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 6 Mar 2017 17:58:06 +0100
-Subject: [PATCH 065/286] ARM: dts: r8a73a4: Add INTC-SYS clock to device tree
-
-Link the ARM GIC to the INTC-SYS module clock and the C4 power domain,
-so it can be power managed using that clock in the future.
-
-Note that currently the GIC-400 driver doesn't support module clocks nor
-Runtime PM, so this must be handled as a critical clock.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c11333cc2e7ebe41e2aa4fa353abafa1f21a0662)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4.dtsi            |   13 +++++++++----
- include/dt-bindings/clock/r8a73a4-clock.h |    1 +
- 2 files changed, 10 insertions(+), 4 deletions(-)
-
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -467,6 +467,9 @@
- 			<0 0xf1004000 0 0x2000>,
- 			<0 0xf1006000 0 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-+		clocks = <&mstp4_clks R8A73A4_CLK_INTC_SYS>;
-+		clock-names = "clk";
-+		power-domains = <&pd_c4>;
- 	};
- 
- 	bsc: bus@fec10000 {
-@@ -725,16 +728,18 @@
- 		mstp4_clks: mstp4_clks@e6150140 {
- 			compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
- 			reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
--			clocks = <&main_div2_clk>, <&main_div2_clk>,
-+			clocks = <&main_div2_clk>, <&cpg_clocks R8A73A4_CLK_ZS>,
-+				 <&main_div2_clk>,
- 				 <&cpg_clocks R8A73A4_CLK_HP>,
- 				 <&cpg_clocks R8A73A4_CLK_HP>;
- 			#clock-cells = <1>;
- 			clock-indices = <
--				R8A73A4_CLK_IRQC R8A73A4_CLK_IIC5
--				R8A73A4_CLK_IIC4 R8A73A4_CLK_IIC3
-+				R8A73A4_CLK_IRQC R8A73A4_CLK_INTC_SYS
-+				R8A73A4_CLK_IIC5 R8A73A4_CLK_IIC4
-+				R8A73A4_CLK_IIC3
- 			>;
- 			clock-output-names =
--				"irqc", "iic5", "iic4", "iic3";
-+				"irqc", "intc-sys", "iic5", "iic4", "iic3";
- 		};
- 		mstp5_clks: mstp5_clks@e6150144 {
- 			compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
---- a/include/dt-bindings/clock/r8a73a4-clock.h
-+++ b/include/dt-bindings/clock/r8a73a4-clock.h
-@@ -54,6 +54,7 @@
- #define R8A73A4_CLK_IIC3	11
- #define R8A73A4_CLK_IIC4	10
- #define R8A73A4_CLK_IIC5	9
-+#define R8A73A4_CLK_INTC_SYS	8
- #define R8A73A4_CLK_IRQC	7
- 
- /* MSTP5 */
diff --git a/patches.renesas/0065-ARM-dts-r8a73a4-Use-SoC-specific-compat-string-for-m.patch b/patches.renesas/0065-ARM-dts-r8a73a4-Use-SoC-specific-compat-string-for-m.patch
deleted file mode 100644
index 1a51d65ee00d1f..00000000000000
--- a/patches.renesas/0065-ARM-dts-r8a73a4-Use-SoC-specific-compat-string-for-m.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 47f8bc554c82685bd181cd6fbc636002ff7eff8d Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 24 Nov 2016 21:15:12 +0100
-Subject: [PATCH 065/255] ARM: dts: r8a73a4: Use SoC-specific compat string for
- mmcif
-
-Use the SoC-specific compat string for mmcif in DT for the r8a73a4 SoC.
-This is in keeping with the use of compat strings for mmcif for other
-Renesas ARM based SoCs.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 5b0161743e194ab558143fdeea03243e35a5297f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4.dtsi |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -440,7 +440,7 @@
- 	};
- 
- 	mmcif0: mmc@ee200000 {
--		compatible = "renesas,sh-mmcif";
-+		compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif";
- 		reg = <0 0xee200000 0 0x80>;
- 		interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp3_clks R8A73A4_CLK_MMCIF0>;
-@@ -450,7 +450,7 @@
- 	};
- 
- 	mmcif1: mmc@ee220000 {
--		compatible = "renesas,sh-mmcif";
-+		compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif";
- 		reg = <0 0xee220000 0 0x80>;
- 		interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp3_clks R8A73A4_CLK_MMCIF1>;
diff --git a/patches.renesas/0065-ASoC-rsnd-add-rsnd_parse_of_node-and-integrate-rsnd_.patch b/patches.renesas/0065-ASoC-rsnd-add-rsnd_parse_of_node-and-integrate-rsnd_.patch
deleted file mode 100644
index e610a5e8915b54..00000000000000
--- a/patches.renesas/0065-ASoC-rsnd-add-rsnd_parse_of_node-and-integrate-rsnd_.patch
+++ /dev/null
@@ -1,95 +0,0 @@
-From e17b54ca44ed8721c3205d42d987c2b962f03b96 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 19 Oct 2016 03:57:47 +0000
-Subject: [PATCH 065/299] ASoC: rsnd: add rsnd_parse_of_node() and integrate
- rsnd_xxx_of_node
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit be78cea151afe1fc9d880bf2a3db0bd2deb8c62a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/rsnd.h |   30 ++++++++++++++++++------------
- 1 file changed, 18 insertions(+), 12 deletions(-)
-
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -377,6 +377,18 @@ int rsnd_runtime_is_ssi_multi(struct rsn
- int rsnd_runtime_is_ssi_tdm(struct rsnd_dai_stream *io);
- 
- /*
-+ * DT
-+ */
-+#define rsnd_parse_of_node(priv, node)					\
-+	of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, node)
-+#define RSND_NODE_DAI	"rcar_sound,dai"
-+#define RSND_NODE_SSI	"rcar_sound,ssi"
-+#define RSND_NODE_SRC	"rcar_sound,src"
-+#define RSND_NODE_CTU	"rcar_sound,ctu"
-+#define RSND_NODE_MIX	"rcar_sound,mix"
-+#define RSND_NODE_DVC	"rcar_sound,dvc"
-+
-+/*
-  *	R-Car sound DAI
-  */
- #define RSND_DAI_NAME_SIZE	16
-@@ -440,8 +452,7 @@ int rsnd_dai_pointer_offset(struct rsnd_
- int rsnd_dai_connect(struct rsnd_mod *mod,
- 		     struct rsnd_dai_stream *io,
- 		     enum rsnd_mod_type type);
--#define rsnd_dai_of_node(priv)						\
--	of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,dai")
-+#define rsnd_dai_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_DAI)
- 
- /*
-  *	R-Car Gen1/Gen2
-@@ -618,8 +629,7 @@ u32 rsnd_ssi_multi_slaves_runtime(struct
- 	__rsnd_ssi_is_pin_sharing(rsnd_io_to_mod_ssi(io))
- int __rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod);
- 
--#define rsnd_ssi_of_node(priv)						\
--	of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,ssi")
-+#define rsnd_ssi_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_SSI)
- void rsnd_parse_connect_ssi(struct rsnd_dai *rdai,
- 			    struct device_node *playback,
- 			    struct device_node *capture);
-@@ -645,8 +655,7 @@ unsigned int rsnd_src_get_rate(struct rs
- 			       struct rsnd_dai_stream *io,
- 			       int is_in);
- 
--#define rsnd_src_of_node(priv)						\
--	of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,src")
-+#define rsnd_src_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_SRC)
- #define rsnd_parse_connect_src(rdai, playback, capture)			\
- 	rsnd_parse_connect_common(rdai, rsnd_src_mod_get,		\
- 				  rsnd_src_of_node(rsnd_rdai_to_priv(rdai)), \
-@@ -659,8 +668,7 @@ int rsnd_ctu_probe(struct rsnd_priv *pri
- void rsnd_ctu_remove(struct rsnd_priv *priv);
- int rsnd_ctu_converted_channel(struct rsnd_mod *mod);
- struct rsnd_mod *rsnd_ctu_mod_get(struct rsnd_priv *priv, int id);
--#define rsnd_ctu_of_node(priv)						\
--	of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,ctu")
-+#define rsnd_ctu_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_CTU)
- #define rsnd_parse_connect_ctu(rdai, playback, capture)			\
- 	rsnd_parse_connect_common(rdai, rsnd_ctu_mod_get,		\
- 				  rsnd_ctu_of_node(rsnd_rdai_to_priv(rdai)), \
-@@ -672,8 +680,7 @@ struct rsnd_mod *rsnd_ctu_mod_get(struct
- int rsnd_mix_probe(struct rsnd_priv *priv);
- void rsnd_mix_remove(struct rsnd_priv *priv);
- struct rsnd_mod *rsnd_mix_mod_get(struct rsnd_priv *priv, int id);
--#define rsnd_mix_of_node(priv)						\
--	of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,mix")
-+#define rsnd_mix_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_MIX)
- #define rsnd_parse_connect_mix(rdai, playback, capture)			\
- 	rsnd_parse_connect_common(rdai, rsnd_mix_mod_get,		\
- 				  rsnd_mix_of_node(rsnd_rdai_to_priv(rdai)), \
-@@ -685,8 +692,7 @@ struct rsnd_mod *rsnd_mix_mod_get(struct
- int rsnd_dvc_probe(struct rsnd_priv *priv);
- void rsnd_dvc_remove(struct rsnd_priv *priv);
- struct rsnd_mod *rsnd_dvc_mod_get(struct rsnd_priv *priv, int id);
--#define rsnd_dvc_of_node(priv)						\
--	of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,dvc")
-+#define rsnd_dvc_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_DVC)
- #define rsnd_parse_connect_dvc(rdai, playback, capture)			\
- 	rsnd_parse_connect_common(rdai, rsnd_dvc_mod_get,		\
- 				  rsnd_dvc_of_node(rsnd_rdai_to_priv(rdai)), \
diff --git a/patches.renesas/0066-ARM-dts-r8a7778-Use-SoC-specific-compat-string-for-m.patch b/patches.renesas/0066-ARM-dts-r8a7778-Use-SoC-specific-compat-string-for-m.patch
deleted file mode 100644
index c09dbcdaf5e1ba..00000000000000
--- a/patches.renesas/0066-ARM-dts-r8a7778-Use-SoC-specific-compat-string-for-m.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 65977aaefd37386370c4318e5e25214e0329d4fb Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 24 Nov 2016 21:15:13 +0100
-Subject: [PATCH 066/255] ARM: dts: r8a7778: Use SoC-specific compat string for
- mmcif
-
-Use the SoC-specific compat string for mmcif in DT for the r8a7778 SoC.
-This is in keeping with the use of compat strings for mmcif for other
-Renesas ARM based SoCs.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit f9be04fe05ee0a727471be10e1ec7c76d879b103)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -369,7 +369,7 @@
- 	};
- 
- 	mmcif: mmc@ffe4e000 {
--		compatible = "renesas,sh-mmcif";
-+		compatible = "renesas,mmcif-r8a7778", "renesas,sh-mmcif";
- 		reg = <0xffe4e000 0x100>;
- 		interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp3_clks R8A7778_CLK_MMC>;
diff --git a/patches.renesas/0066-ARM-dts-r8a7790-Add-INTC-SYS-clock-to-device-tree.patch b/patches.renesas/0066-ARM-dts-r8a7790-Add-INTC-SYS-clock-to-device-tree.patch
deleted file mode 100644
index f784fc8ddf4443..00000000000000
--- a/patches.renesas/0066-ARM-dts-r8a7790-Add-INTC-SYS-clock-to-device-tree.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 497b0731f181a1996b7677209b85625aba672439 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 6 Mar 2017 17:58:07 +0100
-Subject: [PATCH 066/286] ARM: dts: r8a7790: Add INTC-SYS clock to device tree
-
-Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
-on" PM Domain, so it can be power managed using that clock.
-
-Note that currently the GIC-400 driver doesn't support module clocks nor
-Runtime PM, so this must be handled as a critical clock.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9e58523624fc063ce43ad3ef2bf6d603bda50a5e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi            |    9 ++++++---
- include/dt-bindings/clock/r8a7790-clock.h |    1 +
- 2 files changed, 7 insertions(+), 3 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -185,6 +185,9 @@
- 			<0 0xf1004000 0 0x2000>,
- 			<0 0xf1006000 0 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-+		clocks = <&mstp4_clks R8A7790_CLK_INTC_SYS>;
-+		clock-names = "clk";
-+		power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- 	};
- 
- 	gpio0: gpio@e6050000 {
-@@ -1364,10 +1367,10 @@
- 		mstp4_clks: mstp4_clks@e6150140 {
- 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
- 			reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
--			clocks = <&cp_clk>;
-+			clocks = <&cp_clk>, <&zs_clk>;
- 			#clock-cells = <1>;
--			clock-indices = <R8A7790_CLK_IRQC>;
--			clock-output-names = "irqc";
-+			clock-indices = <R8A7790_CLK_IRQC R8A7790_CLK_INTC_SYS>;
-+			clock-output-names = "irqc", "intc-sys";
- 		};
- 		mstp5_clks: mstp5_clks@e6150144 {
- 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
---- a/include/dt-bindings/clock/r8a7790-clock.h
-+++ b/include/dt-bindings/clock/r8a7790-clock.h
-@@ -82,6 +82,7 @@
- 
- /* MSTP4 */
- #define R8A7790_CLK_IRQC		7
-+#define R8A7790_CLK_INTC_SYS		8
- 
- /* MSTP5 */
- #define R8A7790_CLK_AUDIO_DMAC1		1
diff --git a/patches.renesas/0066-ASoC-rsnd-remove-non-DT-support-for-DMA.patch b/patches.renesas/0066-ASoC-rsnd-remove-non-DT-support-for-DMA.patch
deleted file mode 100644
index 12ad95a1093ca7..00000000000000
--- a/patches.renesas/0066-ASoC-rsnd-remove-non-DT-support-for-DMA.patch
+++ /dev/null
@@ -1,127 +0,0 @@
-From a85c278b4e9951247432b3e32e4681298248c18d Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 25 Oct 2016 00:36:13 +0000
-Subject: [PATCH 066/299] ASoC: rsnd: remove non DT support for DMA
-
-Current Renesas Sound driver is based on DeviceTree, and no one is
-using this driver from non DT. Non-DT support is no longer needed.
-Let's remove it.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit b99305d20122174c9fd0469bae036f0c401999b5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/dma.c  |   21 ++++++---------------
- sound/soc/sh/rcar/rsnd.h |    2 +-
- sound/soc/sh/rcar/src.c  |    2 +-
- sound/soc/sh/rcar/ssi.c  |    3 +--
- 4 files changed, 9 insertions(+), 19 deletions(-)
-
---- a/sound/soc/sh/rcar/dma.c
-+++ b/sound/soc/sh/rcar/dma.c
-@@ -191,7 +191,7 @@ static int rsnd_dmaen_remove(struct rsnd
- }
- 
- static int rsnd_dmaen_attach(struct rsnd_dai_stream *io,
--			   struct rsnd_dma *dma, int id,
-+			   struct rsnd_dma *dma,
- 			   struct rsnd_mod *mod_from, struct rsnd_mod *mod_to)
- {
- 	struct rsnd_mod *mod = rsnd_mod_get(dma);
-@@ -208,17 +208,8 @@ static int rsnd_dmaen_attach(struct rsnd
- 		return -EIO;
- 	}
- 
--	if (dev->of_node) {
--		dmaen->chan = rsnd_dmaen_request_channel(io, mod_from, mod_to);
--	} else {
--		dma_cap_mask_t mask;
--
--		dma_cap_zero(mask);
--		dma_cap_set(DMA_SLAVE, mask);
-+	dmaen->chan = rsnd_dmaen_request_channel(io, mod_from, mod_to);
- 
--		dmaen->chan = dma_request_channel(mask, shdma_chan_filter,
--						  (void *)(uintptr_t)id);
--	}
- 	if (IS_ERR_OR_NULL(dmaen->chan)) {
- 		dmaen->chan = NULL;
- 		dev_err(dev, "can't get dma channel\n");
-@@ -408,7 +399,7 @@ static int rsnd_dmapp_start(struct rsnd_
- }
- 
- static int rsnd_dmapp_attach(struct rsnd_dai_stream *io,
--			     struct rsnd_dma *dma, int id,
-+			     struct rsnd_dma *dma,
- 			     struct rsnd_mod *mod_from, struct rsnd_mod *mod_to)
- {
- 	struct rsnd_dmapp *dmapp = rsnd_dma_to_dmapp(dma);
-@@ -641,7 +632,7 @@ static void rsnd_dma_of_path(struct rsnd
- }
- 
- int rsnd_dma_attach(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
--		    struct rsnd_mod **dma_mod, int id)
-+		    struct rsnd_mod **dma_mod)
- {
- 	struct rsnd_mod *mod_from = NULL;
- 	struct rsnd_mod *mod_to = NULL;
-@@ -650,7 +641,7 @@ int rsnd_dma_attach(struct rsnd_dai_stre
- 	struct device *dev = rsnd_priv_to_dev(priv);
- 	struct rsnd_mod_ops *ops;
- 	enum rsnd_mod_type type;
--	int (*attach)(struct rsnd_dai_stream *io, struct rsnd_dma *dma, int id,
-+	int (*attach)(struct rsnd_dai_stream *io, struct rsnd_dma *dma,
- 		      struct rsnd_mod *mod_from, struct rsnd_mod *mod_to);
- 	int is_play = rsnd_io_is_play(io);
- 	int ret, dma_id;
-@@ -709,7 +700,7 @@ int rsnd_dma_attach(struct rsnd_dai_stre
- 			rsnd_mod_name(mod_from), rsnd_mod_id(mod_from),
- 			rsnd_mod_name(mod_to),   rsnd_mod_id(mod_to));
- 
--		ret = attach(io, dma, id, mod_from, mod_to);
-+		ret = attach(io, dma, mod_from, mod_to);
- 		if (ret < 0)
- 			return ret;
- 	}
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -199,7 +199,7 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod
-  *	R-Car DMA
-  */
- int rsnd_dma_attach(struct rsnd_dai_stream *io,
--		    struct rsnd_mod *mod, struct rsnd_mod **dma_mod, int id);
-+		    struct rsnd_mod *mod, struct rsnd_mod **dma_mod);
- void rsnd_dma_detach(struct rsnd_mod *mod, struct rsnd_mod **dma_mod);
- int rsnd_dma_probe(struct rsnd_priv *priv);
- struct dma_chan *rsnd_dma_request_channel(struct device_node *of_node,
---- a/sound/soc/sh/rcar/src.c
-+++ b/sound/soc/sh/rcar/src.c
-@@ -475,7 +475,7 @@ static int rsnd_src_probe_(struct rsnd_m
- 			return ret;
- 	}
- 
--	ret = rsnd_dma_attach(io, mod, &src->dma, 0);
-+	ret = rsnd_dma_attach(io, mod, &src->dma);
- 
- 	return ret;
- }
---- a/sound/soc/sh/rcar/ssi.c
-+++ b/sound/soc/sh/rcar/ssi.c
-@@ -690,7 +690,6 @@ static int rsnd_ssi_dma_probe(struct rsn
- 			      struct rsnd_priv *priv)
- {
- 	struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
--	int dma_id = 0; /* not needed */
- 	int ret;
- 
- 	/*
-@@ -705,7 +704,7 @@ static int rsnd_ssi_dma_probe(struct rsn
- 		return ret;
- 
- 	/* SSI probe might be called many times in MUX multi path */
--	ret = rsnd_dma_attach(io, mod, &ssi->dma, dma_id);
-+	ret = rsnd_dma_attach(io, mod, &ssi->dma);
- 
- 	return ret;
- }
diff --git a/patches.renesas/0067-ARM-dts-r8a7791-Add-INTC-SYS-clock-to-device-tree.patch b/patches.renesas/0067-ARM-dts-r8a7791-Add-INTC-SYS-clock-to-device-tree.patch
deleted file mode 100644
index 44dc994cb90d91..00000000000000
--- a/patches.renesas/0067-ARM-dts-r8a7791-Add-INTC-SYS-clock-to-device-tree.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 7087c01544a08af46135c92268b946c393fbf277 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 6 Mar 2017 17:58:08 +0100
-Subject: [PATCH 067/286] ARM: dts: r8a7791: Add INTC-SYS clock to device tree
-
-Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
-on" PM Domain, so it can be power managed using that clock.
-
-Note that currently the GIC-400 driver doesn't support module clocks nor
-Runtime PM, so this must be handled as a critical clock.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c2f2e266acb39f86bda1461874568ced7eaa6752)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi            |    9 ++++++---
- include/dt-bindings/clock/r8a7791-clock.h |    1 +
- 2 files changed, 7 insertions(+), 3 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -117,6 +117,9 @@
- 			<0 0xf1004000 0 0x2000>,
- 			<0 0xf1006000 0 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
-+		clocks = <&mstp4_clks R8A7791_CLK_INTC_SYS>;
-+		clock-names = "clk";
-+		power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- 	};
- 
- 	gpio0: gpio@e6050000 {
-@@ -1365,10 +1368,10 @@
- 		mstp4_clks: mstp4_clks@e6150140 {
- 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
- 			reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
--			clocks = <&cp_clk>;
-+			clocks = <&cp_clk>, <&zs_clk>;
- 			#clock-cells = <1>;
--			clock-indices = <R8A7791_CLK_IRQC>;
--			clock-output-names = "irqc";
-+			clock-indices = <R8A7791_CLK_IRQC R8A7791_CLK_INTC_SYS>;
-+			clock-output-names = "irqc", "intc-sys";
- 		};
- 		mstp5_clks: mstp5_clks@e6150144 {
- 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
---- a/include/dt-bindings/clock/r8a7791-clock.h
-+++ b/include/dt-bindings/clock/r8a7791-clock.h
-@@ -72,6 +72,7 @@
- 
- /* MSTP4 */
- #define R8A7791_CLK_IRQC		7
-+#define R8A7791_CLK_INTC_SYS		8
- 
- /* MSTP5 */
- #define R8A7791_CLK_AUDIO_DMAC1		1
diff --git a/patches.renesas/0067-ARM-dts-sh73a0-Use-SoC-specific-compat-string-for-mm.patch b/patches.renesas/0067-ARM-dts-sh73a0-Use-SoC-specific-compat-string-for-mm.patch
deleted file mode 100644
index bde8e370096bfe..00000000000000
--- a/patches.renesas/0067-ARM-dts-sh73a0-Use-SoC-specific-compat-string-for-mm.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 135c8e10cdfdd5fbf3da163436931e6b91773ef0 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 24 Nov 2016 21:15:14 +0100
-Subject: [PATCH 067/255] ARM: dts: sh73a0: Use SoC-specific compat string for
- mmcif
-
-Use the SoC-specific compat string for mmcif in DT for the sh73a0 SoC.
-This is in keeping with the use of compat strings for mmcif for other
-Renesas ARM based SoCs.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 5ff43b37ce967ffbcc4a93c76a9b270e441a72e6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0.dtsi |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/sh73a0.dtsi
-+++ b/arch/arm/boot/dts/sh73a0.dtsi
-@@ -264,7 +264,7 @@
- 	};
- 
- 	mmcif: mmc@e6bd0000 {
--		compatible = "renesas,sh-mmcif";
-+		compatible = "renesas,mmcif-sh73a0", "renesas,sh-mmcif";
- 		reg = <0xe6bd0000 0x100>;
- 		interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH
- 			      GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/patches.renesas/0067-ASoC-rsnd-don-t-use-devm_request_irq-for-SSI.patch b/patches.renesas/0067-ASoC-rsnd-don-t-use-devm_request_irq-for-SSI.patch
deleted file mode 100644
index 828bd6348226c0..00000000000000
--- a/patches.renesas/0067-ASoC-rsnd-don-t-use-devm_request_irq-for-SSI.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From bc1972c09bdc2bf1992bb1377c41d9ed745c8060 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 25 Oct 2016 00:36:34 +0000
-Subject: [PATCH 067/299] ASoC: rsnd: don't use devm_request_irq() for SSI
-
-SSI will use DMA mode, and migh be fallback to PIO mode.
-Using devm_request_irq() makes its operation more complex when
-it fallbacks to PIO mode.
-Let's use manual request_irq()/free_irq()
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 701172dca15ba9860ba73d3e18082fbd2a78f2c9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/ssi.c |   17 +++++++++--------
- 1 file changed, 9 insertions(+), 8 deletions(-)
-
---- a/sound/soc/sh/rcar/ssi.c
-+++ b/sound/soc/sh/rcar/ssi.c
-@@ -665,10 +665,14 @@ static int rsnd_ssi_common_probe(struct
- 	if (ret < 0)
- 		return ret;
- 
--	ret = devm_request_irq(dev, ssi->irq,
--			       rsnd_ssi_interrupt,
--			       IRQF_SHARED,
--			       dev_name(dev), mod);
-+	/*
-+	 * SSI might be called again as PIO fallback
-+	 * It is easy to manual handling for IRQ request/free
-+	 */
-+	ret = request_irq(ssi->irq,
-+			  rsnd_ssi_interrupt,
-+			  IRQF_SHARED,
-+			  dev_name(dev), mod);
- 
- 	return ret;
- }
-@@ -715,16 +719,13 @@ static int rsnd_ssi_dma_remove(struct rs
- {
- 	struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
- 	struct rsnd_mod *pure_ssi_mod = rsnd_io_to_mod_ssi(io);
--	struct device *dev = rsnd_priv_to_dev(priv);
--	int irq = ssi->irq;
- 
- 	/* Do nothing if non SSI (= SSI parent, multi SSI) mod */
- 	if (pure_ssi_mod != mod)
- 		return 0;
- 
- 	/* PIO will request IRQ again */
--	if (ssi->dma)
--		devm_free_irq(dev, irq, mod);
-+	free_irq(ssi->irq, mod);
- 
- 	rsnd_dma_detach(mod, &ssi->dma);
- 
diff --git a/patches.renesas/0068-ARM-dts-gose-Add-da9063-PMIC-device-node-for-system-.patch b/patches.renesas/0068-ARM-dts-gose-Add-da9063-PMIC-device-node-for-system-.patch
deleted file mode 100644
index 01dbab2e3aa1fe..00000000000000
--- a/patches.renesas/0068-ARM-dts-gose-Add-da9063-PMIC-device-node-for-system-.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 1685f251c8cc5a2cdac88cd67214e380b814fdf6 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Thu, 17 Nov 2016 19:37:46 +0100
-Subject: [PATCH 068/255] ARM: dts: gose: Add da9063 PMIC device node for
- system restart
-
-Enable i2c6, and add a device node for the da9063 PMIC, with subnodes
-for rtc and wdt.  Regulator support is not yet included.
-
-This allows the system to be restarted when the watchdog timer times
-out, or when a system restart is requested.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c20839a36132462496f939b0d13afee009c9a547)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7793-gose.dts |   21 +++++++++++++++++++++
- 1 file changed, 21 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7793-gose.dts
-+++ b/arch/arm/boot/dts/r8a7793-gose.dts
-@@ -538,6 +538,27 @@
- 	};
- };
- 
-+&i2c6 {
-+	status = "okay";
-+	clock-frequency = <100000>;
-+
-+	pmic@58 {
-+		compatible = "dlg,da9063";
-+		reg = <0x58>;
-+		interrupt-parent = <&irqc0>;
-+		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
-+		interrupt-controller;
-+
-+		rtc {
-+			compatible = "dlg,da9063-rtc";
-+		};
-+
-+		wdt {
-+			compatible = "dlg,da9063-watchdog";
-+		};
-+	};
-+};
-+
- &rcar_sound {
- 	pinctrl-0 = <&sound_pins &sound_clk_pins>;
- 	pinctrl-names = "default";
diff --git a/patches.renesas/0068-ARM-dts-r8a7792-Add-INTC-SYS-clock-to-device-tree.patch b/patches.renesas/0068-ARM-dts-r8a7792-Add-INTC-SYS-clock-to-device-tree.patch
deleted file mode 100644
index b859ef007adb82..00000000000000
--- a/patches.renesas/0068-ARM-dts-r8a7792-Add-INTC-SYS-clock-to-device-tree.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 6e262fda2cdc91076056ffbf813e0a735e6acd30 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 6 Mar 2017 17:58:09 +0100
-Subject: [PATCH 068/286] ARM: dts: r8a7792: Add INTC-SYS clock to device tree
-
-Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
-on" PM Domain, so it can be power managed using that clock.
-
-Note that currently the GIC-400 driver doesn't support module clocks nor
-Runtime PM, so this must be handled as a critical clock.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 90dce5428ae5499f06d91297ef10b3b613044774)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7792.dtsi            |   11 ++++++++---
- include/dt-bindings/clock/r8a7792-clock.h |    1 +
- 2 files changed, 9 insertions(+), 3 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7792.dtsi
-+++ b/arch/arm/boot/dts/r8a7792.dtsi
-@@ -92,6 +92,9 @@
- 			      <0 0xf1006000 0 0x2000>;
- 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
- 				      IRQ_TYPE_LEVEL_HIGH)>;
-+			clocks = <&mstp4_clks R8A7792_CLK_INTC_SYS>;
-+			clock-names = "clk";
-+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- 		};
- 
- 		irqc: interrupt-controller@e61c0000 {
-@@ -895,10 +898,12 @@
- 			compatible = "renesas,r8a7792-mstp-clocks",
- 				     "renesas,cpg-mstp-clocks";
- 			reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
--			clocks = <&cp_clk>;
-+			clocks = <&cp_clk>, <&zs_clk>;
- 			#clock-cells = <1>;
--			clock-indices = <R8A7792_CLK_IRQC>;
--			clock-output-names = "irqc";
-+			clock-indices = <
-+				R8A7792_CLK_IRQC R8A7792_CLK_INTC_SYS
-+			>;
-+			clock-output-names = "irqc", "intc-sys";
- 		};
- 		mstp7_clks: mstp7_clks@e615014c {
- 			compatible = "renesas,r8a7792-mstp-clocks",
---- a/include/dt-bindings/clock/r8a7792-clock.h
-+++ b/include/dt-bindings/clock/r8a7792-clock.h
-@@ -45,6 +45,7 @@
- 
- /* MSTP4 */
- #define R8A7792_CLK_IRQC		7
-+#define R8A7792_CLK_INTC_SYS		8
- 
- /* MSTP5 */
- #define R8A7792_CLK_AUDIO_DMAC0		2
diff --git a/patches.renesas/0068-ASoC-rsnd-remove-rsnd_dma_detach.patch b/patches.renesas/0068-ASoC-rsnd-remove-rsnd_dma_detach.patch
deleted file mode 100644
index b0ffcfb4ee7c95..00000000000000
--- a/patches.renesas/0068-ASoC-rsnd-remove-rsnd_dma_detach.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From d3b13a06606ac181ba3a6dc353fa2ac0ee77c1e5 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 25 Oct 2016 00:36:56 +0000
-Subject: [PATCH 068/299] ASoC: rsnd: remove rsnd_dma_detach()
-
-DMA mod is now connected to stream via rsnd_dai_connect().
-This means DMA mod can use .remove for its clearance.
-rsnd_dma_detach() is no longer needed.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit dae4b83295ae50a86b5e3c60e7b6e2c597a1b69d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/dma.c  |   11 -----------
- sound/soc/sh/rcar/rsnd.h |    1 -
- sound/soc/sh/rcar/ssi.c  |    2 --
- 3 files changed, 14 deletions(-)
-
---- a/sound/soc/sh/rcar/dma.c
-+++ b/sound/soc/sh/rcar/dma.c
-@@ -712,17 +712,6 @@ int rsnd_dma_attach(struct rsnd_dai_stre
- 	return 0;
- }
- 
--void rsnd_dma_detach(struct rsnd_mod *mod, struct rsnd_mod **dma_mod)
--{
--	if (*dma_mod) {
--		struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
--		struct device *dev = rsnd_priv_to_dev(priv);
--
--		devm_kfree(dev, *dma_mod);
--		*dma_mod = NULL;
--	}
--}
--
- int rsnd_dma_probe(struct rsnd_priv *priv)
- {
- 	struct platform_device *pdev = rsnd_priv_to_pdev(priv);
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -200,7 +200,6 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod
-  */
- int rsnd_dma_attach(struct rsnd_dai_stream *io,
- 		    struct rsnd_mod *mod, struct rsnd_mod **dma_mod);
--void rsnd_dma_detach(struct rsnd_mod *mod, struct rsnd_mod **dma_mod);
- int rsnd_dma_probe(struct rsnd_priv *priv);
- struct dma_chan *rsnd_dma_request_channel(struct device_node *of_node,
- 					  struct rsnd_mod *mod, char *name);
---- a/sound/soc/sh/rcar/ssi.c
-+++ b/sound/soc/sh/rcar/ssi.c
-@@ -727,8 +727,6 @@ static int rsnd_ssi_dma_remove(struct rs
- 	/* PIO will request IRQ again */
- 	free_irq(ssi->irq, mod);
- 
--	rsnd_dma_detach(mod, &ssi->dma);
--
- 	return 0;
- }
- 
diff --git a/patches.renesas/0069-ARM-dts-r8a7790-Use-renesas-rcar-gen2-usb-phy-fallba.patch b/patches.renesas/0069-ARM-dts-r8a7790-Use-renesas-rcar-gen2-usb-phy-fallba.patch
deleted file mode 100644
index a4b8ed625f2ea9..00000000000000
--- a/patches.renesas/0069-ARM-dts-r8a7790-Use-renesas-rcar-gen2-usb-phy-fallba.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From f2e8cd66a962e329b9a7ffcef7d2ff8baf7d2519 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 1 Dec 2016 15:25:51 +0100
-Subject: [PATCH 069/255] ARM: dts: r8a7790: Use renesas,rcar-gen2-usb-phy
- fallback binding
-
-A fallback binding for the Renesas R-Car Gen2 PHY driver was
-added by commit 7777cb8ba08d ("phy: rcar-gen2: add fallback binding").
-This patch makes use of this binding in the DT for the r8a7790 SoC.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 3b0922c55e17b11e41f27c7730804623414bcf19)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -883,7 +883,8 @@
- 	};
- 
- 	usbphy: usb-phy@e6590100 {
--		compatible = "renesas,usb-phy-r8a7790";
-+		compatible = "renesas,usb-phy-r8a7790",
-+			     "renesas,rcar-gen2-usb-phy";
- 		reg = <0 0xe6590100 0 0x100>;
- 		#address-cells = <1>;
- 		#size-cells = <0>;
diff --git a/patches.renesas/0069-ARM-dts-r8a7794-Add-INTC-SYS-clock-to-device-tree.patch b/patches.renesas/0069-ARM-dts-r8a7794-Add-INTC-SYS-clock-to-device-tree.patch
deleted file mode 100644
index f63b12699f6f43..00000000000000
--- a/patches.renesas/0069-ARM-dts-r8a7794-Add-INTC-SYS-clock-to-device-tree.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 8cf2f36fc62ea403b4bfb89664fef5af6e5b108c Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 6 Mar 2017 17:58:11 +0100
-Subject: [PATCH 069/286] ARM: dts: r8a7794: Add INTC-SYS clock to device tree
-
-Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
-on" PM Domain, so it can be power managed using that clock.
-
-Note that currently the GIC-400 driver doesn't support module clocks nor
-Runtime PM, so this must be handled as a critical clock.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 133a3f1a19c99218a39e9d3e91e9e5442fa0f191)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794.dtsi            |    9 ++++++---
- include/dt-bindings/clock/r8a7794-clock.h |    1 +
- 2 files changed, 7 insertions(+), 3 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7794.dtsi
-+++ b/arch/arm/boot/dts/r8a7794.dtsi
-@@ -74,6 +74,9 @@
- 			<0 0xf1004000 0 0x2000>,
- 			<0 0xf1006000 0 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
-+		clocks = <&mstp4_clks R8A7794_CLK_INTC_SYS>;
-+		clock-names = "clk";
-+		power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- 	};
- 
- 	gpio0: gpio@e6050000 {
-@@ -1247,10 +1250,10 @@
- 		mstp4_clks: mstp4_clks@e6150140 {
- 			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
- 			reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
--			clocks = <&cp_clk>;
-+			clocks = <&cp_clk>, <&zs_clk>;
- 			#clock-cells = <1>;
--			clock-indices = <R8A7794_CLK_IRQC>;
--			clock-output-names = "irqc";
-+			clock-indices = <R8A7794_CLK_IRQC R8A7794_CLK_INTC_SYS>;
-+			clock-output-names = "irqc", "intc-sys";
- 		};
- 		mstp5_clks: mstp5_clks@e6150144 {
- 			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
---- a/include/dt-bindings/clock/r8a7794-clock.h
-+++ b/include/dt-bindings/clock/r8a7794-clock.h
-@@ -64,6 +64,7 @@
- 
- /* MSTP4 */
- #define R8A7794_CLK_IRQC		7
-+#define R8A7794_CLK_INTC_SYS		8
- 
- /* MSTP5 */
- #define R8A7794_CLK_AUDIO_DMAC0		2
diff --git a/patches.renesas/0069-ASoC-rsnd-don-t-call-unneeded-of_node_put-on-dma.c.patch b/patches.renesas/0069-ASoC-rsnd-don-t-call-unneeded-of_node_put-on-dma.c.patch
deleted file mode 100644
index 6ff04c30e56e6c..00000000000000
--- a/patches.renesas/0069-ASoC-rsnd-don-t-call-unneeded-of_node_put-on-dma.c.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 97b9ed9c7f4f26b2dcf51e84e3533215175cb2cd Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 25 Oct 2016 00:37:18 +0000
-Subject: [PATCH 069/299] ASoC: rsnd: don't call unneeded of_node_put() on
- dma.c
-
-Current rsnd_dmaen_start() is calling of_node_put() for np,
-but it is not needed if it goes through this loop.
-This patch tidyup it
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 161ba1f1a5c99c4525eb39cc71ec984e0a39e6d7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/dma.c |   10 ++++------
- 1 file changed, 4 insertions(+), 6 deletions(-)
-
---- a/sound/soc/sh/rcar/dma.c
-+++ b/sound/soc/sh/rcar/dma.c
-@@ -143,19 +143,17 @@ static int rsnd_dmaen_start(struct rsnd_
- struct dma_chan *rsnd_dma_request_channel(struct device_node *of_node,
- 					  struct rsnd_mod *mod, char *name)
- {
--	struct dma_chan *chan;
-+	struct dma_chan *chan = NULL;
- 	struct device_node *np;
- 	int i = 0;
- 
- 	for_each_child_of_node(of_node, np) {
--		if (i == rsnd_mod_id(mod))
--			break;
-+		if (i == rsnd_mod_id(mod) && (!chan))
-+			chan = of_dma_request_slave_channel(np, name);
- 		i++;
- 	}
- 
--	chan = of_dma_request_slave_channel(np, name);
--
--	of_node_put(np);
-+	/* It should call of_node_put(), since, it is rsnd_xxx_of_node() */
- 	of_node_put(of_node);
- 
- 	return chan;
diff --git a/patches.renesas/0070-ARM-dts-r8a7791-Tidyup-Audio-DMAC-channel-for-DVC.patch b/patches.renesas/0070-ARM-dts-r8a7791-Tidyup-Audio-DMAC-channel-for-DVC.patch
deleted file mode 100644
index 9ba770bfcabe67..00000000000000
--- a/patches.renesas/0070-ARM-dts-r8a7791-Tidyup-Audio-DMAC-channel-for-DVC.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 69e42103203b9e866676919ad2f41b5693c19b87 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 7 Mar 2017 05:29:21 +0000
-Subject: [PATCH 070/286] ARM: dts: r8a7791: Tidyup Audio-DMAC channel for DVC
-
-Current	Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
-Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
-
-Because of this, current platform board (using SRC/DVC/SSI)
-Playback/Capture both will use same Audio-DMAC0
-(but it depends on audio data path).
-
-First note is that this "rx" and "tx" are from each IP point,
-it doesn't mean Playback/Capture.
-Second note is that Audio DMAC assigned on DT is only for
-Audio-DMAC, Audio-DMAC-peri-peri has no entry.
-
-=> Audio-DMAC
--> Audio-DMAC-peri-peri
--- HW connection
-
-Playback case
-
-	[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
-	      rx ~~~~~~~~~~~~
-Capture
-
-	[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
-	      tx ~~~~~~~~~~~~
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d49db72b567d6273f41f045b0c146837d3e50f8d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -1782,11 +1782,11 @@
- 
- 		rcar_sound,dvc {
- 			dvc0: dvc-0 {
--				dmas = <&audma0 0xbc>;
-+				dmas = <&audma1 0xbc>;
- 				dma-names = "tx";
- 			};
- 			dvc1: dvc-1 {
--				dmas = <&audma0 0xbe>;
-+				dmas = <&audma1 0xbe>;
- 				dma-names = "tx";
- 			};
- 		};
diff --git a/patches.renesas/0070-ARM-dts-r8a7791-Use-renesas-rcar-gen2-usb-phy-fallba.patch b/patches.renesas/0070-ARM-dts-r8a7791-Use-renesas-rcar-gen2-usb-phy-fallba.patch
deleted file mode 100644
index a15f14557c4ade..00000000000000
--- a/patches.renesas/0070-ARM-dts-r8a7791-Use-renesas-rcar-gen2-usb-phy-fallba.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 52c83511724fb7ca5f78b6b4a33b096b31b92995 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 1 Dec 2016 15:25:52 +0100
-Subject: [PATCH 070/255] ARM: dts: r8a7791: Use renesas,rcar-gen2-usb-phy
- fallback binding
-
-A fallback binding for the Renesas R-Car Gen2 PHY driver was
-added by commit 7777cb8ba08d ("phy: rcar-gen2: add fallback binding").
-This patch makes use of this binding in the DT for the r8a7791 SoC.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit c39a6e76db7e1bc87b95f3dae7f7e4405f2854eb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -933,7 +933,8 @@
- 	};
- 
- 	usbphy: usb-phy@e6590100 {
--		compatible = "renesas,usb-phy-r8a7791";
-+		compatible = "renesas,usb-phy-r8a7791",
-+			     "renesas,rcar-gen2-usb-phy";
- 		reg = <0 0xe6590100 0 0x100>;
- 		#address-cells = <1>;
- 		#size-cells = <0>;
diff --git a/patches.renesas/0070-ASoC-rsnd-add-nolock_start-stop-callback.patch b/patches.renesas/0070-ASoC-rsnd-add-nolock_start-stop-callback.patch
deleted file mode 100644
index a84e19dbd5c732..00000000000000
--- a/patches.renesas/0070-ASoC-rsnd-add-nolock_start-stop-callback.patch
+++ /dev/null
@@ -1,115 +0,0 @@
-From d57fe0fdd88d7e8b51a6b855e4edc290064c542b Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 25 Oct 2016 00:37:35 +0000
-Subject: [PATCH 070/299] ASoC: rsnd: add nolock_start/stop callback
-
-Current Renesas Sound driver requests DMA channel when .probe timing,
-and release it when .remove timing. And use DMA on .start/.stop
-But, Audio DMAC power ON was handled when request timing (= .probe),
-and power OFF was when release timing (= .remove).
-This means Audio DMAC power is always ON during driver was enabled.
-To fixup this issue, it should request/release DMA channel on each
-playback/recorde timing.
-But, DMA channel request/release function uses mutex lock inside.
-This means it will breaks current spinlock's interrupt protect.
-To solve this issue, DMA channel request/release function needs to
-be called from non-spinlock area. This patch adds its callback.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 10a9cca13220888c20a259abbd42ea117cddfdb0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c |   26 ++++++++++++++++++++++++++
- sound/soc/sh/rcar/rsnd.h |   15 ++++++++++++++-
- 2 files changed, 40 insertions(+), 1 deletion(-)
-
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -716,7 +716,33 @@ static int rsnd_soc_set_dai_tdm_slot(str
- 	return 0;
- }
- 
-+static int rsnd_soc_dai_startup(struct snd_pcm_substream *substream,
-+				struct snd_soc_dai *dai)
-+{
-+	struct rsnd_dai *rdai = rsnd_dai_to_rdai(dai);
-+	struct rsnd_dai_stream *io = rsnd_rdai_to_io(rdai, substream);
-+
-+	/*
-+	 * call rsnd_dai_call without spinlock
-+	 */
-+	return rsnd_dai_call(nolock_start, io, priv);
-+}
-+
-+static void rsnd_soc_dai_shutdown(struct snd_pcm_substream *substream,
-+				  struct snd_soc_dai *dai)
-+{
-+	struct rsnd_dai *rdai = rsnd_dai_to_rdai(dai);
-+	struct rsnd_dai_stream *io = rsnd_rdai_to_io(rdai, substream);
-+
-+	/*
-+	 * call rsnd_dai_call without spinlock
-+	 */
-+	rsnd_dai_call(nolock_stop, io, priv);
-+}
-+
- static const struct snd_soc_dai_ops rsnd_soc_dai_ops = {
-+	.startup	= rsnd_soc_dai_startup,
-+	.shutdown	= rsnd_soc_dai_shutdown,
- 	.trigger	= rsnd_soc_dai_trigger,
- 	.set_fmt	= rsnd_soc_dai_set_fmt,
- 	.set_tdm_slot	= rsnd_soc_set_dai_tdm_slot,
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -259,6 +259,12 @@ struct rsnd_mod_ops {
- 	int (*fallback)(struct rsnd_mod *mod,
- 			struct rsnd_dai_stream *io,
- 			struct rsnd_priv *priv);
-+	int (*nolock_start)(struct rsnd_mod *mod,
-+		    struct rsnd_dai_stream *io,
-+		    struct rsnd_priv *priv);
-+	int (*nolock_stop)(struct rsnd_mod *mod,
-+		    struct rsnd_dai_stream *io,
-+		    struct rsnd_priv *priv);
- };
- 
- struct rsnd_dai_stream;
-@@ -276,8 +282,9 @@ struct rsnd_mod {
- /*
-  * status
-  *
-- * 0xH0000CB0
-+ * 0xH0000CBA
-  *
-+ * A	0: nolock_start	1: nolock_stop
-  * B	0: init		1: quit
-  * C	0: start	1: stop
-  *
-@@ -287,6 +294,8 @@ struct rsnd_mod {
-  * H	0: fallback
-  * H	0: hw_params
-  */
-+#define __rsnd_mod_shift_nolock_start	0
-+#define __rsnd_mod_shift_nolock_stop	0
- #define __rsnd_mod_shift_init		4
- #define __rsnd_mod_shift_quit		4
- #define __rsnd_mod_shift_start		8
-@@ -300,6 +309,8 @@ struct rsnd_mod {
- 
- #define __rsnd_mod_add_probe		0
- #define __rsnd_mod_add_remove		0
-+#define __rsnd_mod_add_nolock_start	 1
-+#define __rsnd_mod_add_nolock_stop	-1
- #define __rsnd_mod_add_init		 1
- #define __rsnd_mod_add_quit		-1
- #define __rsnd_mod_add_start		 1
-@@ -319,6 +330,8 @@ struct rsnd_mod {
- #define __rsnd_mod_call_pcm_new		0
- #define __rsnd_mod_call_fallback	0
- #define __rsnd_mod_call_hw_params	0
-+#define __rsnd_mod_call_nolock_start	0
-+#define __rsnd_mod_call_nolock_stop	1
- 
- #define rsnd_mod_to_priv(mod) ((mod)->priv)
- #define rsnd_mod_id(mod) ((mod) ? (mod)->id : -1)
diff --git a/patches.renesas/0071-ARM-dts-r8a7793-Tidyup-Audio-DMAC-channel-for-DVC.patch b/patches.renesas/0071-ARM-dts-r8a7793-Tidyup-Audio-DMAC-channel-for-DVC.patch
deleted file mode 100644
index e560af5d46fa04..00000000000000
--- a/patches.renesas/0071-ARM-dts-r8a7793-Tidyup-Audio-DMAC-channel-for-DVC.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 9bb373ce94adecc32a93c56280f8b694429ed707 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 7 Mar 2017 05:29:43 +0000
-Subject: [PATCH 071/286] ARM: dts: r8a7793: Tidyup Audio-DMAC channel for DVC
-
-Current	Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
-Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
-
-Because of this, current platform board (using SRC/DVC/SSI)
-Playback/Capture both will use same Audio-DMAC0
-(but it depends on audio data path).
-
-First note is that this "rx" and "tx" are from each IP point,
-it doesn't mean Playback/Capture.
-Second note is that Audio DMAC assigned on DT is only for
-Audio-DMAC, Audio-DMAC-peri-peri has no entry.
-
-=> Audio-DMAC
--> Audio-DMAC-peri-peri
--- HW connection
-
-Playback case
-
-	[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
-	      rx ~~~~~~~~~~~~
-Capture
-
-	[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
-	      tx ~~~~~~~~~~~~
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d2b10f99962aa5ec9865a77827931bf20211a39c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7793.dtsi |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7793.dtsi
-+++ b/arch/arm/boot/dts/r8a7793.dtsi
-@@ -1428,11 +1428,11 @@
- 
- 		rcar_sound,dvc {
- 			dvc0: dvc-0 {
--				dmas = <&audma0 0xbc>;
-+				dmas = <&audma1 0xbc>;
- 				dma-names = "tx";
- 			};
- 			dvc1: dvc-1 {
--				dmas = <&audma0 0xbe>;
-+				dmas = <&audma1 0xbe>;
- 				dma-names = "tx";
- 			};
- 		};
diff --git a/patches.renesas/0071-ARM-dts-r8a7794-Use-renesas-rcar-gen2-usb-phy-fallba.patch b/patches.renesas/0071-ARM-dts-r8a7794-Use-renesas-rcar-gen2-usb-phy-fallba.patch
deleted file mode 100644
index 123539f0467e75..00000000000000
--- a/patches.renesas/0071-ARM-dts-r8a7794-Use-renesas-rcar-gen2-usb-phy-fallba.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 33faecaa607a7e925bc79f766943c46dbcfc25f1 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 1 Dec 2016 15:25:53 +0100
-Subject: [PATCH 071/255] ARM: dts: r8a7794: Use renesas,rcar-gen2-usb-phy
- fallback binding
-
-A fallback binding for the Renesas R-Car Gen2 PHY driver was
-added by commit 7777cb8ba08d ("phy: rcar-gen2: add fallback binding").
-This patch makes use of this binding in the DT for the r8a7794 SoC.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit f81c163b38bedd95c75ab45929d190106166db11)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794.dtsi |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7794.dtsi
-+++ b/arch/arm/boot/dts/r8a7794.dtsi
-@@ -877,7 +877,8 @@
- 	};
- 
- 	usbphy: usb-phy@e6590100 {
--		compatible = "renesas,usb-phy-r8a7794";
-+		compatible = "renesas,usb-phy-r8a7794",
-+			     "renesas,rcar-gen2-usb-phy";
- 		reg = <0 0xe6590100 0 0x100>;
- 		#address-cells = <1>;
- 		#size-cells = <0>;
diff --git a/patches.renesas/0071-ASoC-rsnd-remove-Gen2-only-comment.patch b/patches.renesas/0071-ASoC-rsnd-remove-Gen2-only-comment.patch
deleted file mode 100644
index 1f750265acda6d..00000000000000
--- a/patches.renesas/0071-ASoC-rsnd-remove-Gen2-only-comment.patch
+++ /dev/null
@@ -1,115 +0,0 @@
-From 3e7430c526cba102f076a0d69811f91611105f1b Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 26 Oct 2016 04:27:22 +0000
-Subject: [PATCH 071/299] ASoC: rsnd: remove "Gen2 only" comment
-
-Gen1 support had been removed. "Gen2 only" comment is
-no longer needed.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit f0b20e7120849ea68b2d7f0ec36ea45643265b09)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/rsnd.h |   62 +++++++++++++++++++++++------------------------
- 1 file changed, 31 insertions(+), 31 deletions(-)
-
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -44,16 +44,16 @@
-  */
- enum rsnd_reg {
- 	/* SCU (SRC/SSIU/MIX/CTU/DVC) */
--	RSND_REG_SSI_MODE,		/* Gen2 only */
-+	RSND_REG_SSI_MODE,
- 	RSND_REG_SSI_MODE0,
- 	RSND_REG_SSI_MODE1,
- 	RSND_REG_SSI_MODE2,
- 	RSND_REG_SSI_CONTROL,
--	RSND_REG_SSI_CTRL,		/* Gen2 only */
--	RSND_REG_SSI_BUSIF_MODE,	/* Gen2 only */
--	RSND_REG_SSI_BUSIF_ADINR,	/* Gen2 only */
--	RSND_REG_SSI_BUSIF_DALIGN,	/* Gen2 only */
--	RSND_REG_SSI_INT_ENABLE,	/* Gen2 only */
-+	RSND_REG_SSI_CTRL,
-+	RSND_REG_SSI_BUSIF_MODE,
-+	RSND_REG_SSI_BUSIF_ADINR,
-+	RSND_REG_SSI_BUSIF_DALIGN,
-+	RSND_REG_SSI_INT_ENABLE,
- 	RSND_REG_SRC_I_BUSIF_MODE,
- 	RSND_REG_SRC_O_BUSIF_MODE,
- 	RSND_REG_SRC_ROUTE_MODE0,
-@@ -63,29 +63,29 @@ enum rsnd_reg {
- 	RSND_REG_SRC_IFSCR,
- 	RSND_REG_SRC_IFSVR,
- 	RSND_REG_SRC_SRCCR,
--	RSND_REG_SRC_CTRL,		/* Gen2 only */
--	RSND_REG_SRC_BSDSR,		/* Gen2 only */
--	RSND_REG_SRC_BSISR,		/* Gen2 only */
--	RSND_REG_SRC_INT_ENABLE0,	/* Gen2 only */
--	RSND_REG_SRC_BUSIF_DALIGN,	/* Gen2 only */
--	RSND_REG_SRCIN_TIMSEL0,		/* Gen2 only */
--	RSND_REG_SRCIN_TIMSEL1,		/* Gen2 only */
--	RSND_REG_SRCIN_TIMSEL2,		/* Gen2 only */
--	RSND_REG_SRCIN_TIMSEL3,		/* Gen2 only */
--	RSND_REG_SRCIN_TIMSEL4,		/* Gen2 only */
--	RSND_REG_SRCOUT_TIMSEL0,	/* Gen2 only */
--	RSND_REG_SRCOUT_TIMSEL1,	/* Gen2 only */
--	RSND_REG_SRCOUT_TIMSEL2,	/* Gen2 only */
--	RSND_REG_SRCOUT_TIMSEL3,	/* Gen2 only */
--	RSND_REG_SRCOUT_TIMSEL4,	/* Gen2 only */
-+	RSND_REG_SRC_CTRL,
-+	RSND_REG_SRC_BSDSR,
-+	RSND_REG_SRC_BSISR,
-+	RSND_REG_SRC_INT_ENABLE0,
-+	RSND_REG_SRC_BUSIF_DALIGN,
-+	RSND_REG_SRCIN_TIMSEL0,
-+	RSND_REG_SRCIN_TIMSEL1,
-+	RSND_REG_SRCIN_TIMSEL2,
-+	RSND_REG_SRCIN_TIMSEL3,
-+	RSND_REG_SRCIN_TIMSEL4,
-+	RSND_REG_SRCOUT_TIMSEL0,
-+	RSND_REG_SRCOUT_TIMSEL1,
-+	RSND_REG_SRCOUT_TIMSEL2,
-+	RSND_REG_SRCOUT_TIMSEL3,
-+	RSND_REG_SRCOUT_TIMSEL4,
- 	RSND_REG_SCU_SYS_STATUS0,
--	RSND_REG_SCU_SYS_STATUS1,	/* Gen2 only */
-+	RSND_REG_SCU_SYS_STATUS1,
- 	RSND_REG_SCU_SYS_INT_EN0,
--	RSND_REG_SCU_SYS_INT_EN1,	/* Gen2 only */
--	RSND_REG_CMD_CTRL,		/* Gen2 only */
--	RSND_REG_CMD_BUSIF_DALIGN,	/* Gen2 only */
-+	RSND_REG_SCU_SYS_INT_EN1,
-+	RSND_REG_CMD_CTRL,
-+	RSND_REG_CMD_BUSIF_DALIGN,
- 	RSND_REG_CMD_ROUTE_SLCT,
--	RSND_REG_CMDOUT_TIMSEL,		/* Gen2 only */
-+	RSND_REG_CMDOUT_TIMSEL,
- 	RSND_REG_CTU_SWRSR,
- 	RSND_REG_CTU_CTUIR,
- 	RSND_REG_CTU_ADINR,
-@@ -147,18 +147,18 @@ enum rsnd_reg {
- 	RSND_REG_DVC_VOL6R,
- 	RSND_REG_DVC_VOL7R,
- 	RSND_REG_DVC_DVUER,
--	RSND_REG_DVC_VRCTR,		/* Gen2 only */
--	RSND_REG_DVC_VRPDR,		/* Gen2 only */
--	RSND_REG_DVC_VRDBR,		/* Gen2 only */
-+	RSND_REG_DVC_VRCTR,
-+	RSND_REG_DVC_VRPDR,
-+	RSND_REG_DVC_VRDBR,
- 
- 	/* ADG */
- 	RSND_REG_BRRA,
- 	RSND_REG_BRRB,
- 	RSND_REG_SSICKR,
--	RSND_REG_DIV_EN,		/* Gen2 only */
-+	RSND_REG_DIV_EN,
- 	RSND_REG_AUDIO_CLK_SEL0,
- 	RSND_REG_AUDIO_CLK_SEL1,
--	RSND_REG_AUDIO_CLK_SEL2,	/* Gen2 only */
-+	RSND_REG_AUDIO_CLK_SEL2,
- 
- 	/* SSI */
- 	RSND_REG_SSICR,
diff --git a/patches.renesas/0072-ARM-dts-r8a7779-Use-R-Car-Gen-1-fallback-binding-for.patch b/patches.renesas/0072-ARM-dts-r8a7779-Use-R-Car-Gen-1-fallback-binding-for.patch
deleted file mode 100644
index 26c976677a2bf9..00000000000000
--- a/patches.renesas/0072-ARM-dts-r8a7779-Use-R-Car-Gen-1-fallback-binding-for.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From a931783d4a59abbe0fb496a6fbf0567bfb0a5929 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Dec 2016 12:45:47 +0100
-Subject: [PATCH 072/255] ARM: dts: r8a7779: Use R-Car Gen 1 fallback binding
- for i2c nodes
-
-Use recently added R-Car Gen 1 fallback binding for i2c nodes in
-DT for r8a7779 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7779 and the
-fallback binding for R-Car Gen 1.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 137d27f10f638781d5487b44302c2a2ee5d12655)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779.dtsi |    8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -173,7 +173,7 @@
- 	i2c0: i2c@ffc70000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7779";
-+		compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
- 		reg = <0xffc70000 0x1000>;
- 		interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp0_clks R8A7779_CLK_I2C0>;
-@@ -184,7 +184,7 @@
- 	i2c1: i2c@ffc71000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7779";
-+		compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
- 		reg = <0xffc71000 0x1000>;
- 		interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp0_clks R8A7779_CLK_I2C1>;
-@@ -195,7 +195,7 @@
- 	i2c2: i2c@ffc72000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7779";
-+		compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
- 		reg = <0xffc72000 0x1000>;
- 		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp0_clks R8A7779_CLK_I2C2>;
-@@ -206,7 +206,7 @@
- 	i2c3: i2c@ffc73000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7779";
-+		compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
- 		reg = <0xffc73000 0x1000>;
- 		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp0_clks R8A7779_CLK_I2C3>;
diff --git a/patches.renesas/0072-ARM-dts-r8a7793-Add-INTC-SYS-clock-to-device-tree.patch b/patches.renesas/0072-ARM-dts-r8a7793-Add-INTC-SYS-clock-to-device-tree.patch
deleted file mode 100644
index 2d78dcf361fec1..00000000000000
--- a/patches.renesas/0072-ARM-dts-r8a7793-Add-INTC-SYS-clock-to-device-tree.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 1c384dcb3906189f27fd8b58ca6686f96569c110 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 6 Mar 2017 17:58:10 +0100
-Subject: [PATCH 072/286] ARM: dts: r8a7793: Add INTC-SYS clock to device tree
-
-Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
-on" PM Domain, so it can be power managed using that clock.
-
-Note that currently the GIC-400 driver doesn't support module clocks nor
-Runtime PM, so this must be handled as a critical clock.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2f25c2d1cdf04ab0f247351e286d3fdefbdad09b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7793.dtsi            |   11 ++++++++---
- include/dt-bindings/clock/r8a7793-clock.h |    5 +++--
- 2 files changed, 11 insertions(+), 5 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7793.dtsi
-+++ b/arch/arm/boot/dts/r8a7793.dtsi
-@@ -108,6 +108,9 @@
- 			<0 0xf1004000 0 0x2000>,
- 			<0 0xf1006000 0 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
-+		clocks = <&mstp4_clks R8A7793_CLK_INTC_SYS>;
-+		clock-names = "clk";
-+		power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- 	};
- 
- 	gpio0: gpio@e6050000 {
-@@ -1178,10 +1181,12 @@
- 		mstp4_clks: mstp4_clks@e6150140 {
- 			compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
- 			reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
--			clocks = <&cp_clk>;
-+			clocks = <&cp_clk>, <&zs_clk>;
- 			#clock-cells = <1>;
--			clock-indices = <R8A7793_CLK_IRQC>;
--			clock-output-names = "irqc";
-+			clock-indices = <
-+				R8A7793_CLK_IRQC R8A7793_CLK_INTC_SYS
-+			>;
-+			clock-output-names = "irqc", "intc-sys";
- 		};
- 		mstp5_clks: mstp5_clks@e6150144 {
- 			compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
---- a/include/dt-bindings/clock/r8a7793-clock.h
-+++ b/include/dt-bindings/clock/r8a7793-clock.h
-@@ -77,10 +77,11 @@
- 
- /* MSTP4 */
- #define R8A7793_CLK_IRQC		7
-+#define R8A7793_CLK_INTC_SYS		8
- 
- /* MSTP5 */
--#define R8A7793_CLK_AUDIO_DMAC1         1
--#define R8A7793_CLK_AUDIO_DMAC0         2
-+#define R8A7793_CLK_AUDIO_DMAC1		1
-+#define R8A7793_CLK_AUDIO_DMAC0		2
- #define R8A7793_CLK_ADSP_MOD		6
- #define R8A7793_CLK_THERMAL		22
- #define R8A7793_CLK_PWM			23
diff --git a/patches.renesas/0072-ASoC-rsnd-rsnd_reg-cleanup-for-SSIU.patch b/patches.renesas/0072-ASoC-rsnd-rsnd_reg-cleanup-for-SSIU.patch
deleted file mode 100644
index 4832a69a82fc28..00000000000000
--- a/patches.renesas/0072-ASoC-rsnd-rsnd_reg-cleanup-for-SSIU.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 168d2cdb51e9d3593fd17530bb4713ab949cd665 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 26 Oct 2016 04:28:06 +0000
-Subject: [PATCH 072/299] ASoC: rsnd: rsnd_reg cleanup for SSIU
-
-R-Car Gen1 didn't have SSIU IP, and it was part of SRU.
-In Gen2, SSIU was created and it has original register.
-Let's cleanup rsnd_reg for SSIU, because this driver
-doesn't support Gen1 SRU any more.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit bb7927c793e1036bc15f67a8fd10e803f56c6760)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/rsnd.h |   24 +++++++++++++-----------
- 1 file changed, 13 insertions(+), 11 deletions(-)
-
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -43,17 +43,7 @@
-  * see gen1/gen2 for detail
-  */
- enum rsnd_reg {
--	/* SCU (SRC/SSIU/MIX/CTU/DVC) */
--	RSND_REG_SSI_MODE,
--	RSND_REG_SSI_MODE0,
--	RSND_REG_SSI_MODE1,
--	RSND_REG_SSI_MODE2,
--	RSND_REG_SSI_CONTROL,
--	RSND_REG_SSI_CTRL,
--	RSND_REG_SSI_BUSIF_MODE,
--	RSND_REG_SSI_BUSIF_ADINR,
--	RSND_REG_SSI_BUSIF_DALIGN,
--	RSND_REG_SSI_INT_ENABLE,
-+	/* SCU (MIX/CTU/DVC) */
- 	RSND_REG_SRC_I_BUSIF_MODE,
- 	RSND_REG_SRC_O_BUSIF_MODE,
- 	RSND_REG_SRC_ROUTE_MODE0,
-@@ -160,6 +150,18 @@ enum rsnd_reg {
- 	RSND_REG_AUDIO_CLK_SEL1,
- 	RSND_REG_AUDIO_CLK_SEL2,
- 
-+	/* SSIU */
-+	RSND_REG_SSI_MODE,
-+	RSND_REG_SSI_MODE0,
-+	RSND_REG_SSI_MODE1,
-+	RSND_REG_SSI_MODE2,
-+	RSND_REG_SSI_CONTROL,
-+	RSND_REG_SSI_CTRL,
-+	RSND_REG_SSI_BUSIF_MODE,
-+	RSND_REG_SSI_BUSIF_ADINR,
-+	RSND_REG_SSI_BUSIF_DALIGN,
-+	RSND_REG_SSI_INT_ENABLE,
-+
- 	/* SSI */
- 	RSND_REG_SSICR,
- 	RSND_REG_SSISR,
diff --git a/patches.renesas/0073-ARM-dts-porter-Always-use-status-okay-to-enable-devi.patch b/patches.renesas/0073-ARM-dts-porter-Always-use-status-okay-to-enable-devi.patch
deleted file mode 100644
index a15771c836468d..00000000000000
--- a/patches.renesas/0073-ARM-dts-porter-Always-use-status-okay-to-enable-devi.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 40afb305890a450e2671cd889a2abe154dbde7b6 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:19:04 +0100
-Subject: [PATCH 073/286] ARM: dts: porter: Always use status "okay" to enable
- devices
-
-While status "ok" does work, the canonical form is "okay", so update the
-few places that used the former.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d8fc23051a9b6dd66ed0cc3c2a676991493b8112)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791-porter.dts |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7791-porter.dts
-+++ b/arch/arm/boot/dts/r8a7791-porter.dts
-@@ -226,7 +226,7 @@
- 
- 	phy-handle = <&phy1>;
- 	renesas,ether-link-active-low;
--	status = "ok";
-+	status = "okay";
- 
- 	phy1: ethernet-phy@1 {
- 		reg = <1>;
-@@ -359,7 +359,7 @@
- 
- /* composite video input */
- &vin0 {
--	status = "ok";
-+	status = "okay";
- 	pinctrl-0 = <&vin0_pins>;
- 	pinctrl-names = "default";
- 
diff --git a/patches.renesas/0073-ARM-dts-r8a7778-Use-R-Car-Gen-1-fallback-binding-for.patch b/patches.renesas/0073-ARM-dts-r8a7778-Use-R-Car-Gen-1-fallback-binding-for.patch
deleted file mode 100644
index 6998f638337e8c..00000000000000
--- a/patches.renesas/0073-ARM-dts-r8a7778-Use-R-Car-Gen-1-fallback-binding-for.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 803407c62b489dbb1996ffb4a6fb7e5dff601ecd Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Dec 2016 12:45:48 +0100
-Subject: [PATCH 073/255] ARM: dts: r8a7778: Use R-Car Gen 1 fallback binding
- for i2c nodes
-
-Use recently added R-Car Gen 1 fallback binding for i2c nodes in
-DT for r8a7778 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7778 and the
-fallback binding for R-Car Gen 1.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit eb6f2adfa5ad2b3494d9c751b1e1a21356ad7b62)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi |    8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -150,7 +150,7 @@
- 	i2c0: i2c@ffc70000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7778";
-+		compatible = "renesas,i2c-r8a7778", "renesas,rcar-gen1-i2c";
- 		reg = <0xffc70000 0x1000>;
- 		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp0_clks R8A7778_CLK_I2C0>;
-@@ -161,7 +161,7 @@
- 	i2c1: i2c@ffc71000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7778";
-+		compatible = "renesas,i2c-r8a7778", "renesas,rcar-gen1-i2c";
- 		reg = <0xffc71000 0x1000>;
- 		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp0_clks R8A7778_CLK_I2C1>;
-@@ -172,7 +172,7 @@
- 	i2c2: i2c@ffc72000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7778";
-+		compatible = "renesas,i2c-r8a7778", "renesas,rcar-gen1-i2c";
- 		reg = <0xffc72000 0x1000>;
- 		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp0_clks R8A7778_CLK_I2C2>;
-@@ -183,7 +183,7 @@
- 	i2c3: i2c@ffc73000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7778";
-+		compatible = "renesas,i2c-r8a7778", "renesas,rcar-gen1-i2c";
- 		reg = <0xffc73000 0x1000>;
- 		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp0_clks R8A7778_CLK_I2C3>;
diff --git a/patches.renesas/0073-ASoC-rsnd-fixup-SCU_SYS_STATUSx-access.patch b/patches.renesas/0073-ASoC-rsnd-fixup-SCU_SYS_STATUSx-access.patch
deleted file mode 100644
index b53ac9407a4bf6..00000000000000
--- a/patches.renesas/0073-ASoC-rsnd-fixup-SCU_SYS_STATUSx-access.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From c826e5860f1df9b65db7026d7c0b33ca9aa9e0f7 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 26 Oct 2016 04:28:42 +0000
-Subject: [PATCH 073/299] ASoC: rsnd: fixup SCU_SYS_STATUSx access
-
-SCU_SYS_STATUSx is the register that writing 1 initializes the bit,
-and writing 0 is ignored. So, it should use rsnd_mod_write()
-instead of rsnd_mod_bset(), otherwise all bit will be cleared.
-Thanks Shimoda-san
-
-Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 42b197e794dbe961cbcebd9e4963252c96cc77f9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/src.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/sound/soc/sh/rcar/src.c
-+++ b/sound/soc/sh/rcar/src.c
-@@ -327,8 +327,8 @@ static void rsnd_src_status_clear(struct
- {
- 	u32 val = OUF_SRC(rsnd_mod_id(mod));
- 
--	rsnd_mod_bset(mod, SCU_SYS_STATUS0, val, val);
--	rsnd_mod_bset(mod, SCU_SYS_STATUS1, val, val);
-+	rsnd_mod_write(mod, SCU_SYS_STATUS0, val);
-+	rsnd_mod_write(mod, SCU_SYS_STATUS1, val);
- }
- 
- static bool rsnd_src_error_occurred(struct rsnd_mod *mod)
diff --git a/patches.renesas/0074-ARM-dts-bockw-Drop-superfluous-status-update-for-fre.patch b/patches.renesas/0074-ARM-dts-bockw-Drop-superfluous-status-update-for-fre.patch
deleted file mode 100644
index 91bb43a305db79..00000000000000
--- a/patches.renesas/0074-ARM-dts-bockw-Drop-superfluous-status-update-for-fre.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 6323d104a6def0e2547ecc54f9122d9a424ed51c Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:19:05 +0100
-Subject: [PATCH 074/286] ARM: dts: bockw: Drop superfluous status update for
- frequency override
-
-The scif_clk device node is already enabled in r8a7778.dtsi, so there is
-no need to update its status again.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ffbb98d4d1f194e455bae2bc2eab2995188c652e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778-bockw.dts |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7778-bockw.dts
-+++ b/arch/arm/boot/dts/r8a7778-bockw.dts
-@@ -229,5 +229,4 @@
- 
- &scif_clk {
- 	clock-frequency = <14745600>;
--	status = "okay";
- };
diff --git a/patches.renesas/0074-ARM-dts-r8a7790-Use-R-Car-Gen-2-fallback-binding-for.patch b/patches.renesas/0074-ARM-dts-r8a7790-Use-R-Car-Gen-2-fallback-binding-for.patch
deleted file mode 100644
index ecc983484cc96a..00000000000000
--- a/patches.renesas/0074-ARM-dts-r8a7790-Use-R-Car-Gen-2-fallback-binding-for.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 650538a206476c41f6dba7ead1395399153a25d5 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Dec 2016 12:45:49 +0100
-Subject: [PATCH 074/255] ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding
- for i2c nodes
-
-Use recently added R-Car Gen 2 fallback binding for i2c nodes in
-DT for r8a7790 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7790 and the
-fallback binding for R-Car Gen 2.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 82f8bfbef9864f6165b7741e251bf74827079604)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi |    8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -480,7 +480,7 @@
- 	i2c0: i2c@e6508000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7790";
-+		compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6508000 0 0x40>;
- 		interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
-@@ -492,7 +492,7 @@
- 	i2c1: i2c@e6518000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7790";
-+		compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6518000 0 0x40>;
- 		interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
-@@ -504,7 +504,7 @@
- 	i2c2: i2c@e6530000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7790";
-+		compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6530000 0 0x40>;
- 		interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
-@@ -516,7 +516,7 @@
- 	i2c3: i2c@e6540000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7790";
-+		compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6540000 0 0x40>;
- 		interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
diff --git a/patches.renesas/0074-ASoC-rsnd-clear-SSI_SYS_STATUSx-every-time.patch b/patches.renesas/0074-ASoC-rsnd-clear-SSI_SYS_STATUSx-every-time.patch
deleted file mode 100644
index 626415ff9d2363..00000000000000
--- a/patches.renesas/0074-ASoC-rsnd-clear-SSI_SYS_STATUSx-every-time.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From 0c73351f2adf235407319946da8d174509ccdaa1 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 26 Oct 2016 04:29:21 +0000
-Subject: [PATCH 074/299] ASoC: rsnd: clear SSI_SYS_STATUSx every time
-
-Renesas sound SSIU has SSI_SYS_STATUS register whick will
-be changed if over/under run was occurred.
-Current rsnd driver is handling over/under run error on SSI/SRC,
-but doesn't on SSIU.
-HW guys can't guarantee correct behavior if it already had error bit
-on status register when it start.
-Thus, it should be cleared every start timing. This patch do it.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 814efe3ed72d1cad926e21b8d0869a1ea74bb9dd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/gen.c  |    8 ++++++++
- sound/soc/sh/rcar/rsnd.h |    8 ++++++++
- sound/soc/sh/rcar/ssiu.c |   20 ++++++++++++++++++++
- 3 files changed, 36 insertions(+)
-
---- a/sound/soc/sh/rcar/gen.c
-+++ b/sound/soc/sh/rcar/gen.c
-@@ -211,6 +211,14 @@ static int rsnd_gen2_probe(struct rsnd_p
- 		RSND_GEN_S_REG(SSI_MODE1,	0x804),
- 		RSND_GEN_S_REG(SSI_MODE2,	0x808),
- 		RSND_GEN_S_REG(SSI_CONTROL,	0x810),
-+		RSND_GEN_S_REG(SSI_SYS_STATUS0,	0x840),
-+		RSND_GEN_S_REG(SSI_SYS_STATUS1,	0x844),
-+		RSND_GEN_S_REG(SSI_SYS_STATUS2,	0x848),
-+		RSND_GEN_S_REG(SSI_SYS_STATUS3,	0x84c),
-+		RSND_GEN_S_REG(SSI_SYS_STATUS4,	0x880),
-+		RSND_GEN_S_REG(SSI_SYS_STATUS5,	0x884),
-+		RSND_GEN_S_REG(SSI_SYS_STATUS6,	0x888),
-+		RSND_GEN_S_REG(SSI_SYS_STATUS7,	0x88c),
- 
- 		/* FIXME: it needs SSI_MODE2/3 in the future */
- 		RSND_GEN_M_REG(SSI_BUSIF_MODE,	0x0,	0x80),
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -161,6 +161,14 @@ enum rsnd_reg {
- 	RSND_REG_SSI_BUSIF_ADINR,
- 	RSND_REG_SSI_BUSIF_DALIGN,
- 	RSND_REG_SSI_INT_ENABLE,
-+	RSND_REG_SSI_SYS_STATUS0,
-+	RSND_REG_SSI_SYS_STATUS1,
-+	RSND_REG_SSI_SYS_STATUS2,
-+	RSND_REG_SSI_SYS_STATUS3,
-+	RSND_REG_SSI_SYS_STATUS4,
-+	RSND_REG_SSI_SYS_STATUS5,
-+	RSND_REG_SSI_SYS_STATUS6,
-+	RSND_REG_SSI_SYS_STATUS7,
- 
- 	/* SSI */
- 	RSND_REG_SSICR,
---- a/sound/soc/sh/rcar/ssiu.c
-+++ b/sound/soc/sh/rcar/ssiu.c
-@@ -33,6 +33,26 @@ static int rsnd_ssiu_init(struct rsnd_mo
- 	u32 mask1, val1;
- 	u32 mask2, val2;
- 
-+	/* clear status */
-+	switch (id) {
-+	case 0:
-+	case 1:
-+	case 2:
-+	case 3:
-+	case 4:
-+		rsnd_mod_write(mod, SSI_SYS_STATUS0, 0xf << (id * 4));
-+		rsnd_mod_write(mod, SSI_SYS_STATUS2, 0xf << (id * 4));
-+		rsnd_mod_write(mod, SSI_SYS_STATUS4, 0xf << (id * 4));
-+		rsnd_mod_write(mod, SSI_SYS_STATUS6, 0xf << (id * 4));
-+		break;
-+	case 9:
-+		rsnd_mod_write(mod, SSI_SYS_STATUS1, 0xf << 4);
-+		rsnd_mod_write(mod, SSI_SYS_STATUS3, 0xf << 4);
-+		rsnd_mod_write(mod, SSI_SYS_STATUS5, 0xf << 4);
-+		rsnd_mod_write(mod, SSI_SYS_STATUS7, 0xf << 4);
-+		break;
-+	}
-+
- 	/*
- 	 * SSI_MODE0
- 	 */
diff --git a/patches.renesas/0075-ARM-dts-marzen-Drop-superfluous-status-update-for-fr.patch b/patches.renesas/0075-ARM-dts-marzen-Drop-superfluous-status-update-for-fr.patch
deleted file mode 100644
index 0628794a66ea79..00000000000000
--- a/patches.renesas/0075-ARM-dts-marzen-Drop-superfluous-status-update-for-fr.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 981301245b0ce242cd402189ee5d7bb2137aa060 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:19:06 +0100
-Subject: [PATCH 075/286] ARM: dts: marzen: Drop superfluous status update for
- frequency override
-
-The scif_clk device node is already enabled in r8a7779.dtsi, so there is
-no need to update its status again.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2f69fd8cb2187631ad68531a07406ad6b179b122)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779-marzen.dts |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7779-marzen.dts
-+++ b/arch/arm/boot/dts/r8a7779-marzen.dts
-@@ -236,7 +236,6 @@
- 
- &scif_clk {
- 	clock-frequency = <14745600>;
--	status = "okay";
- };
- 
- &sdhi0 {
diff --git a/patches.renesas/0075-ARM-dts-r8a7791-Use-R-Car-Gen-2-fallback-binding-for.patch b/patches.renesas/0075-ARM-dts-r8a7791-Use-R-Car-Gen-2-fallback-binding-for.patch
deleted file mode 100644
index 5c6896c27e5c47..00000000000000
--- a/patches.renesas/0075-ARM-dts-r8a7791-Use-R-Car-Gen-2-fallback-binding-for.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From cc8c1076576fbdfe87a8c25a94ee0ae99bf8e5b5 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Dec 2016 12:45:50 +0100
-Subject: [PATCH 075/255] ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding
- for i2c nodes
-
-Use recently added R-Car Gen 2 fallback binding for i2c nodes in
-DT for r8a7791 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7791 and the
-fallback binding for R-Car Gen 2.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit c7407ca7ef61ff91cfa3c130de59061171102cf3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi |   12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -443,7 +443,7 @@
- 	i2c0: i2c@e6508000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7791";
-+		compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6508000 0 0x40>;
- 		interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7791_CLK_I2C0>;
-@@ -455,7 +455,7 @@
- 	i2c1: i2c@e6518000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7791";
-+		compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6518000 0 0x40>;
- 		interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7791_CLK_I2C1>;
-@@ -467,7 +467,7 @@
- 	i2c2: i2c@e6530000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7791";
-+		compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6530000 0 0x40>;
- 		interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7791_CLK_I2C2>;
-@@ -479,7 +479,7 @@
- 	i2c3: i2c@e6540000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7791";
-+		compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6540000 0 0x40>;
- 		interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7791_CLK_I2C3>;
-@@ -491,7 +491,7 @@
- 	i2c4: i2c@e6520000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7791";
-+		compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6520000 0 0x40>;
- 		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7791_CLK_I2C4>;
-@@ -504,7 +504,7 @@
- 		/* doesn't need pinmux */
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7791";
-+		compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6528000 0 0x40>;
- 		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7791_CLK_I2C5>;
diff --git a/patches.renesas/0075-ASoC-rsnd-enable-SRC-sync-even-FIN-FOUT.patch b/patches.renesas/0075-ASoC-rsnd-enable-SRC-sync-even-FIN-FOUT.patch
deleted file mode 100644
index 7bb6ea508fc406..00000000000000
--- a/patches.renesas/0075-ASoC-rsnd-enable-SRC-sync-even-FIN-FOUT.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 55834deb6e4694353aa7c2b8dc6abb6549acabfd Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 27 Oct 2016 01:05:21 +0000
-Subject: [PATCH 075/299] ASoC: rsnd: enable SRC sync even FIN = FOUT
-
-Current SRC (= Sampling Rate Converter) is supporting
-SYNC mode and ASYNC mode. Current src.c cares SRC if FIN != FOUT.
-Here, SYNC mode will be used for tweak, so it will be used
-even FIN = FOUT. This patch enables SRC sync in such situation
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
-Tested-by: Yuichi Takagi <yuichi.takagi.uh@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 67923f779b8d9d210c5ec98ffb68d9fe5a68df18)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/src.c |    7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
---- a/sound/soc/sh/rcar/src.c
-+++ b/sound/soc/sh/rcar/src.c
-@@ -189,6 +189,7 @@ static void rsnd_src_set_convert_rate(st
- 	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
- 	struct device *dev = rsnd_priv_to_dev(priv);
- 	struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
-+	int use_src = 0;
- 	u32 fin, fout;
- 	u32 ifscr, fsrate, adinr;
- 	u32 cr, route;
-@@ -214,6 +215,8 @@ static void rsnd_src_set_convert_rate(st
- 		return;
- 	}
- 
-+	use_src = (fin != fout) | rsnd_src_sync_is_enabled(mod);
-+
- 	/*
- 	 *	SRC_ADINR
- 	 */
-@@ -225,7 +228,7 @@ static void rsnd_src_set_convert_rate(st
- 	 */
- 	ifscr = 0;
- 	fsrate = 0;
--	if (fin != fout) {
-+	if (use_src) {
- 		u64 n;
- 
- 		ifscr = 1;
-@@ -239,7 +242,7 @@ static void rsnd_src_set_convert_rate(st
- 	 */
- 	cr	= 0x00011110;
- 	route	= 0x0;
--	if (fin != fout) {
-+	if (use_src) {
- 		route	= 0x1;
- 
- 		if (rsnd_src_sync_is_enabled(mod)) {
diff --git a/patches.renesas/0076-ARM-dts-lager-Drop-superfluous-status-update-for-fre.patch b/patches.renesas/0076-ARM-dts-lager-Drop-superfluous-status-update-for-fre.patch
deleted file mode 100644
index 0982b653901613..00000000000000
--- a/patches.renesas/0076-ARM-dts-lager-Drop-superfluous-status-update-for-fre.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 5ef4a097d908a4895092210588f09c194c85bd93 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:19:07 +0100
-Subject: [PATCH 076/286] ARM: dts: lager: Drop superfluous status update for
- frequency override
-
-The scif_clk device node is already enabled in r8a7790.dtsi, so there is
-no need to update its status again.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2507e3d41a3f0f09e7d756b34e3bb953d6d3b76d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790-lager.dts |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7790-lager.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager.dts
-@@ -581,7 +581,6 @@
- 
- &scif_clk {
- 	clock-frequency = <14745600>;
--	status = "okay";
- };
- 
- &msiof1 {
diff --git a/patches.renesas/0076-ARM-dts-r8a7792-Use-R-Car-Gen-2-fallback-binding-for.patch b/patches.renesas/0076-ARM-dts-r8a7792-Use-R-Car-Gen-2-fallback-binding-for.patch
deleted file mode 100644
index a6b91278763258..00000000000000
--- a/patches.renesas/0076-ARM-dts-r8a7792-Use-R-Car-Gen-2-fallback-binding-for.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From afe7b3495f783d870d1f3886f9ea744a3c31a724 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Dec 2016 12:45:51 +0100
-Subject: [PATCH 076/255] ARM: dts: r8a7792: Use R-Car Gen 2 fallback binding
- for i2c nodes
-
-Use recently added R-Car Gen 2 fallback binding for i2c nodes in
-DT for r8a7792 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7792 and the
-fallback binding for R-Car Gen 2.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit cfcb93b33f35879cfe06add3859fd869e3d1c9e2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7792.dtsi |   18 ++++++++++++------
- 1 file changed, 12 insertions(+), 6 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7792.dtsi
-+++ b/arch/arm/boot/dts/r8a7792.dtsi
-@@ -497,7 +497,8 @@
- 
- 		/* I2C doesn't need pinmux */
- 		i2c0: i2c@e6508000 {
--			compatible = "renesas,i2c-r8a7792";
-+			compatible = "renesas,i2c-r8a7792",
-+				     "renesas,rcar-gen2-i2c";
- 			reg = <0 0xe6508000 0 0x40>;
- 			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&mstp9_clks R8A7792_CLK_I2C0>;
-@@ -509,7 +510,8 @@
- 		};
- 
- 		i2c1: i2c@e6518000 {
--			compatible = "renesas,i2c-r8a7792";
-+			compatible = "renesas,i2c-r8a7792",
-+				     "renesas,rcar-gen2-i2c";
- 			reg = <0 0xe6518000 0 0x40>;
- 			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&mstp9_clks R8A7792_CLK_I2C1>;
-@@ -521,7 +523,8 @@
- 		};
- 
- 		i2c2: i2c@e6530000 {
--			compatible = "renesas,i2c-r8a7792";
-+			compatible = "renesas,i2c-r8a7792",
-+				     "renesas,rcar-gen2-i2c";
- 			reg = <0 0xe6530000 0 0x40>;
- 			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&mstp9_clks R8A7792_CLK_I2C2>;
-@@ -533,7 +536,8 @@
- 		};
- 
- 		i2c3: i2c@e6540000 {
--			compatible = "renesas,i2c-r8a7792";
-+			compatible = "renesas,i2c-r8a7792",
-+				     "renesas,rcar-gen2-i2c";
- 			reg = <0 0xe6540000 0 0x40>;
- 			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&mstp9_clks R8A7792_CLK_I2C3>;
-@@ -545,7 +549,8 @@
- 		};
- 
- 		i2c4: i2c@e6520000 {
--			compatible = "renesas,i2c-r8a7792";
-+			compatible = "renesas,i2c-r8a7792",
-+				     "renesas,rcar-gen2-i2c";
- 			reg = <0 0xe6520000 0 0x40>;
- 			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&mstp9_clks R8A7792_CLK_I2C4>;
-@@ -557,7 +562,8 @@
- 		};
- 
- 		i2c5: i2c@e6528000 {
--			compatible = "renesas,i2c-r8a7792";
-+			compatible = "renesas,i2c-r8a7792",
-+				     "renesas,rcar-gen2-i2c";
- 			reg = <0 0xe6528000 0 0x40>;
- 			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&mstp9_clks R8A7792_CLK_I2C5>;
diff --git a/patches.renesas/0076-ASoC-rsnd-use-BRGCKR-instead-of-SSICKR.patch b/patches.renesas/0076-ASoC-rsnd-use-BRGCKR-instead-of-SSICKR.patch
deleted file mode 100644
index 8f44a0bbe44aa5..00000000000000
--- a/patches.renesas/0076-ASoC-rsnd-use-BRGCKR-instead-of-SSICKR.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 1bc6edeffbd22ba3c61231b68d4f6f4c0100ef78 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 28 Oct 2016 04:12:40 +0000
-Subject: [PATCH 076/299] ASoC: rsnd: use BRGCKR instead of SSICKR
-
-Current register name of "SSICKR" was came from R-Car Gen1
-which is very old style. It is called as "BRGCKR" on R-Car Gen2/Gen3.
-Let's rename it
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 3e58690b8dbddefb4422295b57a6f214e8aa03fd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/adg.c  |    6 +++---
- sound/soc/sh/rcar/gen.c  |    4 ++--
- sound/soc/sh/rcar/rsnd.h |    2 +-
- 3 files changed, 6 insertions(+), 6 deletions(-)
-
---- a/sound/soc/sh/rcar/adg.c
-+++ b/sound/soc/sh/rcar/adg.c
-@@ -366,7 +366,7 @@ found_clock:
- 		if (0 == (rate % 8000))
- 			ckr = 0x80000000;
- 
--		rsnd_mod_bset(adg_mod, SSICKR, 0x80000000, ckr);
-+		rsnd_mod_bset(adg_mod, BRGCKR, 0x80000000, ckr);
- 	}
- 
- 	dev_dbg(dev, "ADG: %s[%d] selects 0x%x for %d\n",
-@@ -532,13 +532,13 @@ static void rsnd_adg_get_clkout(struct r
- 		}
- 	}
- 
--	rsnd_mod_bset(adg_mod, SSICKR, 0x80FF0000, ckr);
-+	rsnd_mod_bset(adg_mod, BRGCKR, 0x80FF0000, ckr);
- 	rsnd_mod_write(adg_mod, BRRA,  rbga);
- 	rsnd_mod_write(adg_mod, BRRB,  rbgb);
- 
- 	for_each_rsnd_clkout(clk, adg, i)
- 		dev_dbg(dev, "clkout %d : %p : %ld\n", i, clk, clk_get_rate(clk));
--	dev_dbg(dev, "SSICKR = 0x%08x, BRRA/BRRB = 0x%x/0x%x\n",
-+	dev_dbg(dev, "BRGCKR = 0x%08x, BRRA/BRRB = 0x%x/0x%x\n",
- 		ckr, rbga, rbgb);
- }
- 
---- a/sound/soc/sh/rcar/gen.c
-+++ b/sound/soc/sh/rcar/gen.c
-@@ -319,7 +319,7 @@ static int rsnd_gen2_probe(struct rsnd_p
- 	static const struct rsnd_regmap_field_conf conf_adg[] = {
- 		RSND_GEN_S_REG(BRRA,		0x00),
- 		RSND_GEN_S_REG(BRRB,		0x04),
--		RSND_GEN_S_REG(SSICKR,		0x08),
-+		RSND_GEN_S_REG(BRGCKR,		0x08),
- 		RSND_GEN_S_REG(AUDIO_CLK_SEL0,	0x0c),
- 		RSND_GEN_S_REG(AUDIO_CLK_SEL1,	0x10),
- 		RSND_GEN_S_REG(AUDIO_CLK_SEL2,	0x14),
-@@ -370,7 +370,7 @@ static int rsnd_gen1_probe(struct rsnd_p
- 	static const struct rsnd_regmap_field_conf conf_adg[] = {
- 		RSND_GEN_S_REG(BRRA,		0x00),
- 		RSND_GEN_S_REG(BRRB,		0x04),
--		RSND_GEN_S_REG(SSICKR,		0x08),
-+		RSND_GEN_S_REG(BRGCKR,		0x08),
- 		RSND_GEN_S_REG(AUDIO_CLK_SEL0,	0x0c),
- 		RSND_GEN_S_REG(AUDIO_CLK_SEL1,	0x10),
- 	};
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -144,7 +144,7 @@ enum rsnd_reg {
- 	/* ADG */
- 	RSND_REG_BRRA,
- 	RSND_REG_BRRB,
--	RSND_REG_SSICKR,
-+	RSND_REG_BRGCKR,
- 	RSND_REG_DIV_EN,
- 	RSND_REG_AUDIO_CLK_SEL0,
- 	RSND_REG_AUDIO_CLK_SEL1,
diff --git a/patches.renesas/0077-ARM-dts-koelsch-Drop-superfluous-status-updates-for-.patch b/patches.renesas/0077-ARM-dts-koelsch-Drop-superfluous-status-updates-for-.patch
deleted file mode 100644
index 4aaa6e273ae34c..00000000000000
--- a/patches.renesas/0077-ARM-dts-koelsch-Drop-superfluous-status-updates-for-.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 993ce94fb09b4165d1a6037320e537aa61bbee3c Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:19:08 +0100
-Subject: [PATCH 077/286] ARM: dts: koelsch: Drop superfluous status updates
- for frequency overrides
-
-The scif_clk and pcie_bus_clk device nodes are already enabled in
-r8a7791.dtsi, so there is no need to update their statuses again.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b20b1de4b542749a500c426796bb7fa400b03e58)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791-koelsch.dts |    2 --
- 1 file changed, 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7791-koelsch.dts
-+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
-@@ -516,7 +516,6 @@
- 
- &scif_clk {
- 	clock-frequency = <14745600>;
--	status = "okay";
- };
- 
- &sdhi0 {
-@@ -767,7 +766,6 @@
- 
- &pcie_bus_clk {
- 	clock-frequency = <100000000>;
--	status = "okay";
- };
- 
- &pciec {
diff --git a/patches.renesas/0077-ARM-dts-r8a7793-Use-R-Car-Gen-2-fallback-binding-for.patch b/patches.renesas/0077-ARM-dts-r8a7793-Use-R-Car-Gen-2-fallback-binding-for.patch
deleted file mode 100644
index c219e39ba9aad1..00000000000000
--- a/patches.renesas/0077-ARM-dts-r8a7793-Use-R-Car-Gen-2-fallback-binding-for.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 68b934d17b17dbee5017d481ac702527d16d077c Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Dec 2016 12:45:52 +0100
-Subject: [PATCH 077/255] ARM: dts: r8a7793: Use R-Car Gen 2 fallback binding
- for i2c nodes
-
-Use recently added R-Car Gen 2 fallback binding for i2c nodes in
-DT for r8a7793 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7793 and the
-fallback binding for R-Car Gen 2.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit b3bb35a862007712aa277bfa94bdf80be67772da)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7793.dtsi |   12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7793.dtsi
-+++ b/arch/arm/boot/dts/r8a7793.dtsi
-@@ -410,7 +410,7 @@
- 	i2c0: i2c@e6508000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7793";
-+		compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6508000 0 0x40>;
- 		interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7793_CLK_I2C0>;
-@@ -422,7 +422,7 @@
- 	i2c1: i2c@e6518000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7793";
-+		compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6518000 0 0x40>;
- 		interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7793_CLK_I2C1>;
-@@ -434,7 +434,7 @@
- 	i2c2: i2c@e6530000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7793";
-+		compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6530000 0 0x40>;
- 		interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7793_CLK_I2C2>;
-@@ -446,7 +446,7 @@
- 	i2c3: i2c@e6540000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7793";
-+		compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6540000 0 0x40>;
- 		interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7793_CLK_I2C3>;
-@@ -458,7 +458,7 @@
- 	i2c4: i2c@e6520000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7793";
-+		compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6520000 0 0x40>;
- 		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7793_CLK_I2C4>;
-@@ -471,7 +471,7 @@
- 		/* doesn't need pinmux */
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,i2c-r8a7793";
-+		compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6528000 0 0x40>;
- 		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7793_CLK_I2C5>;
diff --git a/patches.renesas/0077-ASoC-rsnd-Request-Release-DMA-channel-each-time.patch b/patches.renesas/0077-ASoC-rsnd-Request-Release-DMA-channel-each-time.patch
deleted file mode 100644
index cda7877a7d24d7..00000000000000
--- a/patches.renesas/0077-ASoC-rsnd-Request-Release-DMA-channel-each-time.patch
+++ /dev/null
@@ -1,276 +0,0 @@
-From ed7e63c420402c420cbc0b7e68fafa39ce857087 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 14 Nov 2016 04:20:40 +0000
-Subject: [PATCH 077/299] ASoC: rsnd: Request/Release DMA channel each time
-
-Current Renesas Sound driver requests DMA channel when .probe timing,
-and release it when .remove timing. And use DMA on .start/.stop
-But, Audio DMAC power ON was handled when request timing (= .probe),
-and power OFF was when release timing (= .remove).
-This means Audio DMAC power is always ON during driver was enabled.
-The best choice to solve this issue is that DMAEngine side handle
-this. But current DMAEngine API design can't solve atmic/non-atmic
-context issue for power ON/OFF. So next better choice is sound
-driver request/release DMA channel each time. This patch do it
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit edce5c496c6af3e5ca6e1bb18f7cf4f6ef6226fa)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/dma.c |  182 +++++++++++++++++++++++++++---------------------
- 1 file changed, 106 insertions(+), 76 deletions(-)
-
---- a/sound/soc/sh/rcar/dma.c
-+++ b/sound/soc/sh/rcar/dma.c
-@@ -34,6 +34,8 @@ struct rsnd_dmapp {
- 
- struct rsnd_dma {
- 	struct rsnd_mod		mod;
-+	struct rsnd_mod		*mod_from;
-+	struct rsnd_mod		*mod_to;
- 	dma_addr_t		src_addr;
- 	dma_addr_t		dst_addr;
- 	union {
-@@ -92,6 +94,20 @@ static void rsnd_dmaen_complete(void *da
- 	rsnd_mod_interrupt(mod, __rsnd_dmaen_complete);
- }
- 
-+static struct dma_chan *rsnd_dmaen_request_channel(struct rsnd_dai_stream *io,
-+						   struct rsnd_mod *mod_from,
-+						   struct rsnd_mod *mod_to)
-+{
-+	if ((!mod_from && !mod_to) ||
-+	    (mod_from && mod_to))
-+		return NULL;
-+
-+	if (mod_from)
-+		return rsnd_mod_dma_req(io, mod_from);
-+	else
-+		return rsnd_mod_dma_req(io, mod_to);
-+}
-+
- static int rsnd_dmaen_stop(struct rsnd_mod *mod,
- 			   struct rsnd_dai_stream *io,
- 			   struct rsnd_priv *priv)
-@@ -99,7 +115,61 @@ static int rsnd_dmaen_stop(struct rsnd_m
- 	struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
- 	struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
- 
--	dmaengine_terminate_all(dmaen->chan);
-+	if (dmaen->chan) {
-+		dmaengine_terminate_all(dmaen->chan);
-+	}
-+
-+	return 0;
-+}
-+
-+static int rsnd_dmaen_nolock_stop(struct rsnd_mod *mod,
-+				   struct rsnd_dai_stream *io,
-+				   struct rsnd_priv *priv)
-+{
-+	struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
-+	struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
-+
-+	/*
-+	 * DMAEngine release uses mutex lock.
-+	 * Thus, it shouldn't be called under spinlock.
-+	 * Let's call it under nolock_start
-+	 */
-+	if (dmaen->chan)
-+		dma_release_channel(dmaen->chan);
-+
-+	dmaen->chan = NULL;
-+
-+	return 0;
-+}
-+
-+static int rsnd_dmaen_nolock_start(struct rsnd_mod *mod,
-+			    struct rsnd_dai_stream *io,
-+			    struct rsnd_priv *priv)
-+{
-+	struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
-+	struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+
-+	if (dmaen->chan) {
-+		dev_err(dev, "it already has dma channel\n");
-+		return -EIO;
-+	}
-+
-+	/*
-+	 * DMAEngine request uses mutex lock.
-+	 * Thus, it shouldn't be called under spinlock.
-+	 * Let's call it under nolock_start
-+	 */
-+	dmaen->chan = rsnd_dmaen_request_channel(io,
-+						 dma->mod_from,
-+						 dma->mod_to);
-+	if (IS_ERR_OR_NULL(dmaen->chan)) {
-+		int ret = PTR_ERR(dmaen->chan);
-+
-+		dmaen->chan = NULL;
-+		dev_err(dev, "can't get dma channel\n");
-+		return ret;
-+	}
- 
- 	return 0;
- }
-@@ -113,7 +183,23 @@ static int rsnd_dmaen_start(struct rsnd_
- 	struct snd_pcm_substream *substream = io->substream;
- 	struct device *dev = rsnd_priv_to_dev(priv);
- 	struct dma_async_tx_descriptor *desc;
-+	struct dma_slave_config cfg = {};
- 	int is_play = rsnd_io_is_play(io);
-+	int ret;
-+
-+	cfg.direction	= is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
-+	cfg.src_addr	= dma->src_addr;
-+	cfg.dst_addr	= dma->dst_addr;
-+	cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
-+	cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
-+
-+	dev_dbg(dev, "%s[%d] %pad -> %pad\n",
-+		rsnd_mod_name(mod), rsnd_mod_id(mod),
-+		&cfg.src_addr, &cfg.dst_addr);
-+
-+	ret = dmaengine_slave_config(dmaen->chan, &cfg);
-+	if (ret < 0)
-+		return ret;
- 
- 	desc = dmaengine_prep_dma_cyclic(dmaen->chan,
- 					 substream->runtime->dma_addr,
-@@ -159,97 +245,39 @@ struct dma_chan *rsnd_dma_request_channe
- 	return chan;
- }
- 
--static struct dma_chan *rsnd_dmaen_request_channel(struct rsnd_dai_stream *io,
--						   struct rsnd_mod *mod_from,
--						   struct rsnd_mod *mod_to)
--{
--	if ((!mod_from && !mod_to) ||
--	    (mod_from && mod_to))
--		return NULL;
--
--	if (mod_from)
--		return rsnd_mod_dma_req(io, mod_from);
--	else
--		return rsnd_mod_dma_req(io, mod_to);
--}
--
--static int rsnd_dmaen_remove(struct rsnd_mod *mod,
--			      struct rsnd_dai_stream *io,
--			      struct rsnd_priv *priv)
--{
--	struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
--	struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
--
--	if (dmaen->chan)
--		dma_release_channel(dmaen->chan);
--
--	dmaen->chan = NULL;
--
--	return 0;
--}
--
- static int rsnd_dmaen_attach(struct rsnd_dai_stream *io,
- 			   struct rsnd_dma *dma,
- 			   struct rsnd_mod *mod_from, struct rsnd_mod *mod_to)
- {
--	struct rsnd_mod *mod = rsnd_mod_get(dma);
--	struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
- 	struct rsnd_priv *priv = rsnd_io_to_priv(io);
- 	struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv);
--	struct device *dev = rsnd_priv_to_dev(priv);
--	struct dma_slave_config cfg = {};
--	int is_play = rsnd_io_is_play(io);
--	int ret;
--
--	if (dmaen->chan) {
--		dev_err(dev, "it already has dma channel\n");
--		return -EIO;
--	}
-+	struct dma_chan *chan;
- 
--	dmaen->chan = rsnd_dmaen_request_channel(io, mod_from, mod_to);
--
--	if (IS_ERR_OR_NULL(dmaen->chan)) {
--		dmaen->chan = NULL;
--		dev_err(dev, "can't get dma channel\n");
--		goto rsnd_dma_channel_err;
-+	/* try to get DMAEngine channel */
-+	chan = rsnd_dmaen_request_channel(io, mod_from, mod_to);
-+	if (IS_ERR_OR_NULL(chan)) {
-+		/*
-+		 * DMA failed. try to PIO mode
-+		 * see
-+		 *	rsnd_ssi_fallback()
-+		 *	rsnd_rdai_continuance_probe()
-+		 */
-+		return -EAGAIN;
- 	}
- 
--	cfg.direction	= is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
--	cfg.src_addr	= dma->src_addr;
--	cfg.dst_addr	= dma->dst_addr;
--	cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
--	cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
--
--	dev_dbg(dev, "%s[%d] %pad -> %pad\n",
--		rsnd_mod_name(mod), rsnd_mod_id(mod),
--		&cfg.src_addr, &cfg.dst_addr);
--
--	ret = dmaengine_slave_config(dmaen->chan, &cfg);
--	if (ret < 0)
--		goto rsnd_dma_attach_err;
-+	dma_release_channel(chan);
- 
- 	dmac->dmaen_num++;
- 
- 	return 0;
--
--rsnd_dma_attach_err:
--	rsnd_dmaen_remove(mod, io, priv);
--rsnd_dma_channel_err:
--
--	/*
--	 * DMA failed. try to PIO mode
--	 * see
--	 *	rsnd_ssi_fallback()
--	 *	rsnd_rdai_continuance_probe()
--	 */
--	return -EAGAIN;
- }
- 
- static struct rsnd_mod_ops rsnd_dmaen_ops = {
- 	.name	= "audmac",
-+	.nolock_start = rsnd_dmaen_nolock_start,
-+	.nolock_stop  = rsnd_dmaen_nolock_stop,
- 	.start	= rsnd_dmaen_start,
- 	.stop	= rsnd_dmaen_stop,
--	.remove	= rsnd_dmaen_remove,
- };
- 
- /*
-@@ -685,9 +713,6 @@ int rsnd_dma_attach(struct rsnd_dai_stre
- 
- 		*dma_mod = rsnd_mod_get(dma);
- 
--		dma->src_addr = rsnd_dma_addr(io, mod_from, is_play, 1);
--		dma->dst_addr = rsnd_dma_addr(io, mod_to,   is_play, 0);
--
- 		ret = rsnd_mod_init(priv, *dma_mod, ops, NULL,
- 				    rsnd_mod_get_status, type, dma_id);
- 		if (ret < 0)
-@@ -701,6 +726,11 @@ int rsnd_dma_attach(struct rsnd_dai_stre
- 		ret = attach(io, dma, mod_from, mod_to);
- 		if (ret < 0)
- 			return ret;
-+
-+		dma->src_addr = rsnd_dma_addr(io, mod_from, is_play, 1);
-+		dma->dst_addr = rsnd_dma_addr(io, mod_to,   is_play, 0);
-+		dma->mod_from = mod_from;
-+		dma->mod_to   = mod_to;
- 	}
- 
- 	ret = rsnd_dai_connect(*dma_mod, io, type);
diff --git a/patches.renesas/0078-ARM-dts-porter-Drop-superfluous-status-update-for-fr.patch b/patches.renesas/0078-ARM-dts-porter-Drop-superfluous-status-update-for-fr.patch
deleted file mode 100644
index 269fbeb0a4d58f..00000000000000
--- a/patches.renesas/0078-ARM-dts-porter-Drop-superfluous-status-update-for-fr.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 62e32bac42b235f2b1f7139e19f0d414a3956e04 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:19:09 +0100
-Subject: [PATCH 078/286] ARM: dts: porter: Drop superfluous status update for
- frequency override
-
-The pcie_bus_clk device node is already enabled in r8a7791.dtsi, so
-there is no need to update its status again.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b546d090c8ecca05c83e71d931f6d9ad72a8d730)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791-porter.dts |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7791-porter.dts
-+++ b/arch/arm/boot/dts/r8a7791-porter.dts
-@@ -401,7 +401,6 @@
- 
- &pcie_bus_clk {
- 	clock-frequency = <100000000>;
--	status = "okay";
- };
- 
- &pciec {
diff --git a/patches.renesas/0078-ARM-dts-r8a7794-Use-R-Car-Gen-2-fallback-binding-for.patch b/patches.renesas/0078-ARM-dts-r8a7794-Use-R-Car-Gen-2-fallback-binding-for.patch
deleted file mode 100644
index 8b3cdcb7e72e7a..00000000000000
--- a/patches.renesas/0078-ARM-dts-r8a7794-Use-R-Car-Gen-2-fallback-binding-for.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 6095913292c0adc173fcd6ae48ae433a8835ab9a Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Dec 2016 12:45:53 +0100
-Subject: [PATCH 078/255] ARM: dts: r8a7794: Use R-Car Gen 2 fallback binding
- for i2c nodes
-
-Use recently added R-Car Gen 2 fallback binding for i2c nodes in
-DT for r8a7794 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7794 and the
-fallback binding for R-Car Gen 2.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 5e6173897c03f13366edefca98dd4712d3ddb0d4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794.dtsi |   12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7794.dtsi
-+++ b/arch/arm/boot/dts/r8a7794.dtsi
-@@ -610,7 +610,7 @@
- 
- 	/* The memory map in the User's Manual maps the cores to bus numbers */
- 	i2c0: i2c@e6508000 {
--		compatible = "renesas,i2c-r8a7794";
-+		compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6508000 0 0x40>;
- 		interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7794_CLK_I2C0>;
-@@ -622,7 +622,7 @@
- 	};
- 
- 	i2c1: i2c@e6518000 {
--		compatible = "renesas,i2c-r8a7794";
-+		compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6518000 0 0x40>;
- 		interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7794_CLK_I2C1>;
-@@ -634,7 +634,7 @@
- 	};
- 
- 	i2c2: i2c@e6530000 {
--		compatible = "renesas,i2c-r8a7794";
-+		compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6530000 0 0x40>;
- 		interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7794_CLK_I2C2>;
-@@ -646,7 +646,7 @@
- 	};
- 
- 	i2c3: i2c@e6540000 {
--		compatible = "renesas,i2c-r8a7794";
-+		compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6540000 0 0x40>;
- 		interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7794_CLK_I2C3>;
-@@ -658,7 +658,7 @@
- 	};
- 
- 	i2c4: i2c@e6520000 {
--		compatible = "renesas,i2c-r8a7794";
-+		compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6520000 0 0x40>;
- 		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7794_CLK_I2C4>;
-@@ -670,7 +670,7 @@
- 	};
- 
- 	i2c5: i2c@e6528000 {
--		compatible = "renesas,i2c-r8a7794";
-+		compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- 		reg = <0 0xe6528000 0 0x40>;
- 		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7794_CLK_I2C5>;
diff --git a/patches.renesas/0078-ASoC-rsnd-use-dma_sync_single_for_xxx-for-IOMMU.patch b/patches.renesas/0078-ASoC-rsnd-use-dma_sync_single_for_xxx-for-IOMMU.patch
deleted file mode 100644
index 61774b411fe2d6..00000000000000
--- a/patches.renesas/0078-ASoC-rsnd-use-dma_sync_single_for_xxx-for-IOMMU.patch
+++ /dev/null
@@ -1,177 +0,0 @@
-From 4f30fb6fdf0737472e5cef1046d0b33aa97379f7 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 14 Nov 2016 04:20:56 +0000
-Subject: [PATCH 078/299] ASoC: rsnd: use dma_sync_single_for_xxx() for IOMMU
-
-IOMMU needs DMA mapping function to use it. One solution is that
-we can use DMA mapped dev on snd_pcm_lib_preallocate_pages_for_all()
-for SNDRV_DMA_TYPE_DEV. But pcm_new and dma map timing are mismatched.
-Thus, this patch uses SNDRV_DMA_TYPE_CONTINUOUS for pcm_new,
-and use dma_sync_single_for_xxx() for each transfer.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 4821d914fe747a91453021675a74069776f0b819)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c |    4 +-
- sound/soc/sh/rcar/dma.c  |   84 ++++++++++++++++++++++++++++++++++++++++++++---
- 2 files changed, 82 insertions(+), 6 deletions(-)
-
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -1124,8 +1124,8 @@ static int rsnd_pcm_new(struct snd_soc_p
- 
- 	return snd_pcm_lib_preallocate_pages_for_all(
- 		rtd->pcm,
--		SNDRV_DMA_TYPE_DEV,
--		rtd->card->snd_card->dev,
-+		SNDRV_DMA_TYPE_CONTINUOUS,
-+		snd_dma_continuous_data(GFP_KERNEL),
- 		PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
- }
- 
---- a/sound/soc/sh/rcar/dma.c
-+++ b/sound/soc/sh/rcar/dma.c
-@@ -25,6 +25,10 @@
- 
- struct rsnd_dmaen {
- 	struct dma_chan		*chan;
-+	dma_addr_t		dma_buf;
-+	unsigned int		dma_len;
-+	unsigned int		dma_period;
-+	unsigned int		dma_cnt;
- };
- 
- struct rsnd_dmapp {
-@@ -58,10 +62,38 @@ struct rsnd_dma_ctrl {
- /*
-  *		Audio DMAC
-  */
-+#define rsnd_dmaen_sync(dmaen, io, i)	__rsnd_dmaen_sync(dmaen, io, i, 1)
-+#define rsnd_dmaen_unsync(dmaen, io, i)	__rsnd_dmaen_sync(dmaen, io, i, 0)
-+static void __rsnd_dmaen_sync(struct rsnd_dmaen *dmaen, struct rsnd_dai_stream *io,
-+			      int i, int sync)
-+{
-+	struct device *dev = dmaen->chan->device->dev;
-+	enum dma_data_direction dir;
-+	int is_play = rsnd_io_is_play(io);
-+	dma_addr_t buf;
-+	int len, max;
-+	size_t period;
-+
-+	len	= dmaen->dma_len;
-+	period	= dmaen->dma_period;
-+	max	= len / period;
-+	i	= i % max;
-+	buf	= dmaen->dma_buf + (period * i);
-+
-+	dir = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
-+
-+	if (sync)
-+		dma_sync_single_for_device(dev, buf, period, dir);
-+	else
-+		dma_sync_single_for_cpu(dev, buf, period, dir);
-+}
-+
- static void __rsnd_dmaen_complete(struct rsnd_mod *mod,
- 				  struct rsnd_dai_stream *io)
- {
- 	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+	struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
-+	struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
- 	bool elapsed = false;
- 	unsigned long flags;
- 
-@@ -78,9 +110,22 @@ static void __rsnd_dmaen_complete(struct
- 	 */
- 	spin_lock_irqsave(&priv->lock, flags);
- 
--	if (rsnd_io_is_working(io))
-+	if (rsnd_io_is_working(io)) {
-+		rsnd_dmaen_unsync(dmaen, io, dmaen->dma_cnt);
-+
-+		/*
-+		 * Next period is already started.
-+		 * Let's sync Next Next period
-+		 * see
-+		 *	rsnd_dmaen_start()
-+		 */
-+		rsnd_dmaen_sync(dmaen, io, dmaen->dma_cnt + 2);
-+
- 		elapsed = rsnd_dai_pointer_update(io, io->byte_per_period);
- 
-+		dmaen->dma_cnt++;
-+	}
-+
- 	spin_unlock_irqrestore(&priv->lock, flags);
- 
- 	if (elapsed)
-@@ -116,7 +161,12 @@ static int rsnd_dmaen_stop(struct rsnd_m
- 	struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
- 
- 	if (dmaen->chan) {
-+		int is_play = rsnd_io_is_play(io);
-+
- 		dmaengine_terminate_all(dmaen->chan);
-+		dma_unmap_single(dmaen->chan->device->dev,
-+				 dmaen->dma_buf, dmaen->dma_len,
-+				 is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
- 	}
- 
- 	return 0;
-@@ -184,7 +234,11 @@ static int rsnd_dmaen_start(struct rsnd_
- 	struct device *dev = rsnd_priv_to_dev(priv);
- 	struct dma_async_tx_descriptor *desc;
- 	struct dma_slave_config cfg = {};
-+	dma_addr_t buf;
-+	size_t len;
-+	size_t period;
- 	int is_play = rsnd_io_is_play(io);
-+	int i;
- 	int ret;
- 
- 	cfg.direction	= is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
-@@ -201,10 +255,19 @@ static int rsnd_dmaen_start(struct rsnd_
- 	if (ret < 0)
- 		return ret;
- 
-+	len	= snd_pcm_lib_buffer_bytes(substream);
-+	period	= snd_pcm_lib_period_bytes(substream);
-+	buf	= dma_map_single(dmaen->chan->device->dev,
-+				 substream->runtime->dma_area,
-+				 len,
-+				 is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
-+	if (dma_mapping_error(dmaen->chan->device->dev, buf)) {
-+		dev_err(dev, "dma map failed\n");
-+		return -EIO;
-+	}
-+
- 	desc = dmaengine_prep_dma_cyclic(dmaen->chan,
--					 substream->runtime->dma_addr,
--					 snd_pcm_lib_buffer_bytes(substream),
--					 snd_pcm_lib_period_bytes(substream),
-+					 buf, len, period,
- 					 is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
- 					 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
- 
-@@ -216,6 +279,19 @@ static int rsnd_dmaen_start(struct rsnd_
- 	desc->callback		= rsnd_dmaen_complete;
- 	desc->callback_param	= rsnd_mod_get(dma);
- 
-+	dmaen->dma_buf		= buf;
-+	dmaen->dma_len		= len;
-+	dmaen->dma_period	= period;
-+	dmaen->dma_cnt		= 0;
-+
-+	/*
-+	 * synchronize this and next period
-+	 * see
-+	 *	__rsnd_dmaen_complete()
-+	 */
-+	for (i = 0; i < 2; i++)
-+		rsnd_dmaen_sync(dmaen, io, i);
-+
- 	if (dmaengine_submit(desc) < 0) {
- 		dev_err(dev, "dmaengine_submit() fail\n");
- 		return -EIO;
diff --git a/patches.renesas/0079-ARM-dts-gose-Drop-superfluous-status-update-for-freq.patch b/patches.renesas/0079-ARM-dts-gose-Drop-superfluous-status-update-for-freq.patch
deleted file mode 100644
index 997f9549ed09ac..00000000000000
--- a/patches.renesas/0079-ARM-dts-gose-Drop-superfluous-status-update-for-freq.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From ab460d3eda1bedd36298055ad30c17ba19afbd02 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:19:10 +0100
-Subject: [PATCH 079/286] ARM: dts: gose: Drop superfluous status update for
- frequency override
-
-The scif_clk device node is already enabled in r8a7793.dtsi, so there is
-no need to update its status again.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e68f8b428d84c304ca534505eafa98cb02a5bae0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7793-gose.dts |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7793-gose.dts
-+++ b/arch/arm/boot/dts/r8a7793-gose.dts
-@@ -412,7 +412,6 @@
- 
- &scif_clk {
- 	clock-frequency = <14745600>;
--	status = "okay";
- };
- 
- &sdhi0 {
diff --git a/patches.renesas/0079-ARM-dts-r8a7790-Use-R-Car-Gen-2-fallback-binding-for.patch b/patches.renesas/0079-ARM-dts-r8a7790-Use-R-Car-Gen-2-fallback-binding-for.patch
deleted file mode 100644
index 5a8edc562fc0e8..00000000000000
--- a/patches.renesas/0079-ARM-dts-r8a7790-Use-R-Car-Gen-2-fallback-binding-for.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From bdbf79deae2d18a3f0d2d02865630bc4bd9ce4e5 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Dec 2016 12:45:56 +0100
-Subject: [PATCH 079/255] ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding
- for iic nodes
-
-Use recently added R-Car Gen 2 fallback binding for iic nodes in
-DT for r8a7790 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7790 and the
-fallback binding for R-Car Gen 2.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit b8075eea36546f55aca0d645561b6713d9ae562e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi |   12 ++++++++----
- 1 file changed, 8 insertions(+), 4 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -528,7 +528,8 @@
- 	iic0: i2c@e6500000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
-+		compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
-+			     "renesas,rmobile-iic";
- 		reg = <0 0xe6500000 0 0x425>;
- 		interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
-@@ -542,7 +543,8 @@
- 	iic1: i2c@e6510000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
-+		compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
-+			     "renesas,rmobile-iic";
- 		reg = <0 0xe6510000 0 0x425>;
- 		interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
-@@ -556,7 +558,8 @@
- 	iic2: i2c@e6520000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
-+		compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
-+			     "renesas,rmobile-iic";
- 		reg = <0 0xe6520000 0 0x425>;
- 		interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
-@@ -570,7 +573,8 @@
- 	iic3: i2c@e60b0000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
-+		compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
-+			     "renesas,rmobile-iic";
- 		reg = <0 0xe60b0000 0 0x425>;
- 		interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
diff --git a/patches.renesas/0079-ASoC-rsnd-rsnd_get_dalign-needs-to-care-SSIU-not-SSI.patch b/patches.renesas/0079-ASoC-rsnd-rsnd_get_dalign-needs-to-care-SSIU-not-SSI.patch
deleted file mode 100644
index 59f3f554f8fd5a..00000000000000
--- a/patches.renesas/0079-ASoC-rsnd-rsnd_get_dalign-needs-to-care-SSIU-not-SSI.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 12bba2f55ba10d05a92e258e359040b318bd0e91 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 2 Dec 2016 02:44:23 +0000
-Subject: [PATCH 079/299] ASoC: rsnd: rsnd_get_dalign() needs to care SSIU, not
- SSI
-
-SSIU was controlled by SSI before, but
-commit c7f69ab53("ASoC: rsnd: use mod base common method on SSIU")
-separated it into ssiu.c
-
-But, it didn't care about rsnd_get_dalign() for judging SSI_BUSIF_DALIGN
-register value which changes the stream data order.
-This function will be called from cmd/src/ssiu now, but current code
-still cares ssi, not ssiu.
-This patch fix it up
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 3ce2959d162a8f2d69a83582df619a20ff3f6645)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c |    6 +++---
- sound/soc/sh/rcar/rsnd.h |    1 +
- 2 files changed, 4 insertions(+), 3 deletions(-)
-
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -306,7 +306,7 @@ u32 rsnd_get_adinr_bit(struct rsnd_mod *
-  */
- u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io)
- {
--	struct rsnd_mod *ssi = rsnd_io_to_mod_ssi(io);
-+	struct rsnd_mod *ssiu = rsnd_io_to_mod_ssiu(io);
- 	struct rsnd_mod *target;
- 	struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
- 	u32 val = 0x76543210;
-@@ -315,11 +315,11 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod
- 	if (rsnd_io_is_play(io)) {
- 		struct rsnd_mod *src = rsnd_io_to_mod_src(io);
- 
--		target = src ? src : ssi;
-+		target = src ? src : ssiu;
- 	} else {
- 		struct rsnd_mod *cmd = rsnd_io_to_mod_cmd(io);
- 
--		target = cmd ? cmd : ssi;
-+		target = cmd ? cmd : ssiu;
- 	}
- 
- 	mask <<= runtime->channels * 4;
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -428,6 +428,7 @@ struct rsnd_dai_stream {
- };
- #define rsnd_io_to_mod(io, i)	((i) < RSND_MOD_MAX ? (io)->mod[(i)] : NULL)
- #define rsnd_io_to_mod_ssi(io)	rsnd_io_to_mod((io), RSND_MOD_SSI)
-+#define rsnd_io_to_mod_ssiu(io)	rsnd_io_to_mod((io), RSND_MOD_SSIU)
- #define rsnd_io_to_mod_ssip(io)	rsnd_io_to_mod((io), RSND_MOD_SSIP)
- #define rsnd_io_to_mod_src(io)	rsnd_io_to_mod((io), RSND_MOD_SRC)
- #define rsnd_io_to_mod_ctu(io)	rsnd_io_to_mod((io), RSND_MOD_CTU)
diff --git a/patches.renesas/0080-ARM-dts-alt-Drop-superfluous-status-update-for-frequ.patch b/patches.renesas/0080-ARM-dts-alt-Drop-superfluous-status-update-for-frequ.patch
deleted file mode 100644
index 1417fd4aeb0794..00000000000000
--- a/patches.renesas/0080-ARM-dts-alt-Drop-superfluous-status-update-for-frequ.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From ee2e5d232d77c705101316163b801b8fdd013289 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:19:11 +0100
-Subject: [PATCH 080/286] ARM: dts: alt: Drop superfluous status update for
- frequency override
-
-The scif_clk device node is already enabled in r8a7794.dtsi, so there is
-no need to update its status again.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e5fada0cf2131b901e411bb65c22ddc98b6dcf98)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794-alt.dts |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7794-alt.dts
-+++ b/arch/arm/boot/dts/r8a7794-alt.dts
-@@ -375,7 +375,6 @@
- 
- &scif_clk {
- 	clock-frequency = <14745600>;
--	status = "okay";
- };
- 
- &qspi {
diff --git a/patches.renesas/0080-ARM-dts-r8a7791-Use-R-Car-Gen-2-fallback-binding-for.patch b/patches.renesas/0080-ARM-dts-r8a7791-Use-R-Car-Gen-2-fallback-binding-for.patch
deleted file mode 100644
index 031d08a911c72a..00000000000000
--- a/patches.renesas/0080-ARM-dts-r8a7791-Use-R-Car-Gen-2-fallback-binding-for.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From bf9e60c8e6a8363510e5e423a2cf99917cbe2a10 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Dec 2016 12:45:57 +0100
-Subject: [PATCH 080/255] ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding
- for iic nodes
-
-Use recently added R-Car Gen 2 fallback binding for iic nodes in
-DT for r8a7791 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7791 and the
-fallback binding for R-Car Gen 2.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8d76bf8a6a6b3201b309faa623842ba3ec426b7a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi |    9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -517,7 +517,8 @@
- 		/* doesn't need pinmux */
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
-+		compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
-+			     "renesas,rmobile-iic";
- 		reg = <0 0xe60b0000 0 0x425>;
- 		interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
-@@ -531,7 +532,8 @@
- 	i2c7: i2c@e6500000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
-+		compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
-+			     "renesas,rmobile-iic";
- 		reg = <0 0xe6500000 0 0x425>;
- 		interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
-@@ -545,7 +547,8 @@
- 	i2c8: i2c@e6510000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
-+		compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
-+			     "renesas,rmobile-iic";
- 		reg = <0 0xe6510000 0 0x425>;
- 		interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
diff --git a/patches.renesas/0080-ASoC-rsnd-tidyup-ssi-usrcnt-counter-check-in-hw_para.patch b/patches.renesas/0080-ASoC-rsnd-tidyup-ssi-usrcnt-counter-check-in-hw_para.patch
deleted file mode 100644
index 795848f71b68cf..00000000000000
--- a/patches.renesas/0080-ASoC-rsnd-tidyup-ssi-usrcnt-counter-check-in-hw_para.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 759d45bc106a2893d09473b28490572eca053354 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 7 Dec 2016 02:05:22 +0000
-Subject: [PATCH 080/299] ASoC: rsnd: tidyup ssi->usrcnt counter check in
- hw_params
-
-ssi->usrcnt will be updated on snd_soc_dai_ops::trigger,
-but snd_pcm_ops::hw_params will be called *before* it.
-Thus, ssi->usrcnt is still 0 when 1st call.
-rsnd_ssi_hw_params() needs to check its called count, this means
-trigger should be if (ssi->usrcnt) instead of if (ssi->usrcnt > 1).
-
-Reported-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 6bf66b1c35870e08359cb03c49a94e7fef529ef5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/ssi.c |    9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
-
---- a/sound/soc/sh/rcar/ssi.c
-+++ b/sound/soc/sh/rcar/ssi.c
-@@ -431,11 +431,14 @@ static int rsnd_ssi_hw_params(struct rsn
- 	int chan = params_channels(params);
- 
- 	/*
--	 * Already working.
--	 * It will happen if SSI has parent/child connection.
-+	 * snd_pcm_ops::hw_params will be called *before*
-+	 * snd_soc_dai_ops::trigger. Thus, ssi->usrcnt is 0
-+	 * in 1st call.
- 	 */
--	if (ssi->usrcnt > 1) {
-+	if (ssi->usrcnt) {
- 		/*
-+		 * Already working.
-+		 * It will happen if SSI has parent/child connection.
- 		 * it is error if child <-> parent SSI uses
- 		 * different channels.
- 		 */
diff --git a/patches.renesas/0081-ARM-dts-r8a7793-Use-R-Car-Gen-2-fallback-binding-for.patch b/patches.renesas/0081-ARM-dts-r8a7793-Use-R-Car-Gen-2-fallback-binding-for.patch
deleted file mode 100644
index a36a93e8b49461..00000000000000
--- a/patches.renesas/0081-ARM-dts-r8a7793-Use-R-Car-Gen-2-fallback-binding-for.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 1c7a5b193c3e302c7c6983ecc3289767b4a700c1 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Dec 2016 12:45:58 +0100
-Subject: [PATCH 081/255] ARM: dts: r8a7793: Use R-Car Gen 2 fallback binding
- for iic nodes
-
-Use recently added R-Car Gen 2 fallback binding for iic nodes in
-DT for r8a7793 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7793 and the
-fallback binding for R-Car Gen 2.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 21b3f9862943acd6ec92ad02d36ffdfe353e6b66)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7793.dtsi |    9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7793.dtsi
-+++ b/arch/arm/boot/dts/r8a7793.dtsi
-@@ -484,7 +484,8 @@
- 		/* doesn't need pinmux */
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic";
-+		compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
-+			     "renesas,rmobile-iic";
- 		reg = <0 0xe60b0000 0 0x425>;
- 		interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp9_clks R8A7793_CLK_IICDVFS>;
-@@ -498,7 +499,8 @@
- 	i2c7: i2c@e6500000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic";
-+		compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
-+			     "renesas,rmobile-iic";
- 		reg = <0 0xe6500000 0 0x425>;
- 		interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp3_clks R8A7793_CLK_IIC0>;
-@@ -512,7 +514,8 @@
- 	i2c8: i2c@e6510000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic";
-+		compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
-+			     "renesas,rmobile-iic";
- 		reg = <0 0xe6510000 0 0x425>;
- 		interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp3_clks R8A7793_CLK_IIC1>;
diff --git a/patches.renesas/0081-ARM-dts-silk-Drop-superfluous-status-update-for-freq.patch b/patches.renesas/0081-ARM-dts-silk-Drop-superfluous-status-update-for-freq.patch
deleted file mode 100644
index 1115ada51487d4..00000000000000
--- a/patches.renesas/0081-ARM-dts-silk-Drop-superfluous-status-update-for-freq.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 67256c05d4c35bf5f112d07dbf3b44785cfb7565 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:19:12 +0100
-Subject: [PATCH 081/286] ARM: dts: silk: Drop superfluous status update for
- frequency override
-
-The scif_clk device node is already enabled in r8a7794.dtsi, so there is
-no need to update its status again.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d01ff18992218f3a13f45f45a886b3bf8f250f14)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794-silk.dts |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7794-silk.dts
-+++ b/arch/arm/boot/dts/r8a7794-silk.dts
-@@ -248,7 +248,6 @@
- 
- &scif_clk {
- 	clock-frequency = <14745600>;
--	status = "okay";
- };
- 
- &ether {
diff --git a/patches.renesas/0081-ASoC-rsnd-enable-disable-ADG-when-suspend-resume-tim.patch b/patches.renesas/0081-ASoC-rsnd-enable-disable-ADG-when-suspend-resume-tim.patch
deleted file mode 100644
index 695901f1db79a5..00000000000000
--- a/patches.renesas/0081-ASoC-rsnd-enable-disable-ADG-when-suspend-resume-tim.patch
+++ /dev/null
@@ -1,141 +0,0 @@
-From 6d3c7273a9e9d73bbd7a90c6d3bc6a8ca63bf4dd Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 7 Dec 2016 00:29:02 +0000
-Subject: [PATCH 081/299] ASoC: rsnd: enable/disable ADG when suspend/resume
- timing
-
-Current rsnd driver enables ADG clock when .probe timing,
-but it breaks sound after Suspend/Resume. These should be setups
-every suspend/resume timing too.
-This patch is tested on R-Car Gen3 Salvator-X board
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Tested-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit c2d3171847611e8a33d3e10a9942f6c065d05c1f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/adg.c  |   38 ++++++++++++++++++++++++--------------
- sound/soc/sh/rcar/core.c |   24 ++++++++++++++++++++++++
- sound/soc/sh/rcar/rsnd.h |    3 +++
- 3 files changed, 51 insertions(+), 14 deletions(-)
-
---- a/sound/soc/sh/rcar/adg.c
-+++ b/sound/soc/sh/rcar/adg.c
-@@ -376,6 +376,25 @@ found_clock:
- 	return 0;
- }
- 
-+void rsnd_adg_clk_control(struct rsnd_priv *priv, int enable)
-+{
-+	struct rsnd_adg *adg = rsnd_priv_to_adg(priv);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	struct clk *clk;
-+	int i, ret;
-+
-+	for_each_rsnd_clk(clk, adg, i) {
-+		ret = 0;
-+		if (enable)
-+			ret = clk_prepare_enable(clk);
-+		else
-+			clk_disable_unprepare(clk);
-+
-+		if (ret < 0)
-+			dev_warn(dev, "can't use clk %d\n", i);
-+	}
-+}
-+
- static void rsnd_adg_get_clkin(struct rsnd_priv *priv,
- 			       struct rsnd_adg *adg)
- {
-@@ -387,20 +406,15 @@ static void rsnd_adg_get_clkin(struct rs
- 		[CLKC]	= "clk_c",
- 		[CLKI]	= "clk_i",
- 	};
--	int i, ret;
-+	int i;
- 
- 	for (i = 0; i < CLKMAX; i++) {
- 		clk = devm_clk_get(dev, clk_name[i]);
- 		adg->clk[i] = IS_ERR(clk) ? NULL : clk;
- 	}
- 
--	for_each_rsnd_clk(clk, adg, i) {
--		ret = clk_prepare_enable(clk);
--		if (ret < 0)
--			dev_warn(dev, "can't use clk %d\n", i);
--
-+	for_each_rsnd_clk(clk, adg, i)
- 		dev_dbg(dev, "clk %d : %p : %ld\n", i, clk, clk_get_rate(clk));
--	}
- }
- 
- static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
-@@ -565,16 +579,12 @@ int rsnd_adg_probe(struct rsnd_priv *pri
- 
- 	priv->adg = adg;
- 
-+	rsnd_adg_clk_enable(priv);
-+
- 	return 0;
- }
- 
- void rsnd_adg_remove(struct rsnd_priv *priv)
- {
--	struct rsnd_adg *adg = rsnd_priv_to_adg(priv);
--	struct clk *clk;
--	int i;
--
--	for_each_rsnd_clk(clk, adg, i) {
--		clk_disable_unprepare(clk);
--	}
-+	rsnd_adg_clk_disable(priv);
- }
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -1306,9 +1306,33 @@ static int rsnd_remove(struct platform_d
- 	return ret;
- }
- 
-+static int rsnd_suspend(struct device *dev)
-+{
-+	struct rsnd_priv *priv = dev_get_drvdata(dev);
-+
-+	rsnd_adg_clk_disable(priv);
-+
-+	return 0;
-+}
-+
-+static int rsnd_resume(struct device *dev)
-+{
-+	struct rsnd_priv *priv = dev_get_drvdata(dev);
-+
-+	rsnd_adg_clk_enable(priv);
-+
-+	return 0;
-+}
-+
-+static struct dev_pm_ops rsnd_pm_ops = {
-+	.suspend		= rsnd_suspend,
-+	.resume			= rsnd_resume,
-+};
-+
- static struct platform_driver rsnd_driver = {
- 	.driver	= {
- 		.name	= "rcar_sound",
-+		.pm	= &rsnd_pm_ops,
- 		.of_match_table = rsnd_of_match,
- 	},
- 	.probe		= rsnd_probe,
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -499,6 +499,9 @@ int rsnd_adg_set_src_timesel_gen2(struct
- 				  unsigned int out_rate);
- int rsnd_adg_set_cmd_timsel_gen2(struct rsnd_mod *mod,
- 				 struct rsnd_dai_stream *io);
-+#define rsnd_adg_clk_enable(priv)	rsnd_adg_clk_control(priv, 1)
-+#define rsnd_adg_clk_disable(priv)	rsnd_adg_clk_control(priv, 0)
-+void rsnd_adg_clk_control(struct rsnd_priv *priv, int enable);
- 
- /*
-  *	R-Car sound priv
diff --git a/patches.renesas/0082-ARM-dts-r8a7794-Use-R-Car-Gen-2-fallback-binding-for.patch b/patches.renesas/0082-ARM-dts-r8a7794-Use-R-Car-Gen-2-fallback-binding-for.patch
deleted file mode 100644
index bc845a34a8b492..00000000000000
--- a/patches.renesas/0082-ARM-dts-r8a7794-Use-R-Car-Gen-2-fallback-binding-for.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From b9b3cff83ef6ecf62457f6601501d9df3364cfd8 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Dec 2016 12:45:59 +0100
-Subject: [PATCH 082/255] ARM: dts: r8a7794: Use R-Car Gen 2 fallback binding
- for iic nodes
-
-Use recently added R-Car Gen 2 fallback binding for iic nodes in
-DT for r8a7794 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7794 and the
-fallback binding for R-Car Gen 2.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 40a99dbb99b1a50c11b95578d7300e5756e7662f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794.dtsi |    6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7794.dtsi
-+++ b/arch/arm/boot/dts/r8a7794.dtsi
-@@ -682,7 +682,8 @@
- 	};
- 
- 	i2c6: i2c@e6500000 {
--		compatible = "renesas,iic-r8a7794", "renesas,rmobile-iic";
-+		compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
-+			     "renesas,rmobile-iic";
- 		reg = <0 0xe6500000 0 0x425>;
- 		interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp3_clks R8A7794_CLK_IIC0>;
-@@ -696,7 +697,8 @@
- 	};
- 
- 	i2c7: i2c@e6510000 {
--		compatible = "renesas,iic-r8a7794", "renesas,rmobile-iic";
-+		compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
-+			     "renesas,rmobile-iic";
- 		reg = <0 0xe6510000 0 0x425>;
- 		interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp3_clks R8A7794_CLK_IIC1>;
diff --git a/patches.renesas/0082-ARM-shmobile-Document-RZ-G1H-SoC-DT-binding.patch b/patches.renesas/0082-ARM-shmobile-Document-RZ-G1H-SoC-DT-binding.patch
deleted file mode 100644
index 2e12fc925f5791..00000000000000
--- a/patches.renesas/0082-ARM-shmobile-Document-RZ-G1H-SoC-DT-binding.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From c87818d71cc24ce1d07c0db397ae4f6d718995b9 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:48:27 +0100
-Subject: [PATCH 082/286] ARM: shmobile: Document RZ/G1H SoC DT binding
-
-Document the RZ/G1H (r8a7742) SoC.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 368d03531f39ffaa793a98b9a17c79d660b1cd1a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/arm/shmobile.txt |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/Documentation/devicetree/bindings/arm/shmobile.txt
-+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
-@@ -13,6 +13,8 @@ SoCs:
-     compatible = "renesas,r8a73a4"
-   - R-Mobile A1 (R8A77400)
-     compatible = "renesas,r8a7740"
-+  - RZ/G1H (R8A77420)
-+    compatible = "renesas,r8a7742"
-   - RZ/G1M (R8A77430)
-     compatible = "renesas,r8a7743"
-   - RZ/G1E (R8A77450)
diff --git a/patches.renesas/0082-ASoC-rsnd-setup-BRGCKR-BRRA-BRRB-when-starting.patch b/patches.renesas/0082-ASoC-rsnd-setup-BRGCKR-BRRA-BRRB-when-starting.patch
deleted file mode 100644
index edfe604f243a1b..00000000000000
--- a/patches.renesas/0082-ASoC-rsnd-setup-BRGCKR-BRRA-BRRB-when-starting.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From b7636b5265b4dd5ff5ed03601ea8c1f44ac5648a Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 7 Dec 2016 00:28:11 +0000
-Subject: [PATCH 082/299] ASoC: rsnd: setup BRGCKR/BRRA/BRRB when starting
-
-Current rsnd driver setups BRGCKR/BRRA/BRRB when .probe timing.
-But it breaks sound after Suspend/Resume. These should be setups
-every start timing.
-This patch is tested on R-Car Gen3 Salvator-X board
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Tested-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit b99258a3151a70da9b4125f940c4dcc091df84c1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/adg.c |   21 ++++++++++++---------
- 1 file changed, 12 insertions(+), 9 deletions(-)
-
---- a/sound/soc/sh/rcar/adg.c
-+++ b/sound/soc/sh/rcar/adg.c
-@@ -34,6 +34,9 @@ struct rsnd_adg {
- 	struct clk_onecell_data onecell;
- 	struct rsnd_mod mod;
- 	u32 flags;
-+	u32 ckr;
-+	u32 rbga;
-+	u32 rbgb;
- 
- 	int rbga_rate_for_441khz; /* RBGA */
- 	int rbgb_rate_for_48khz;  /* RBGB */
-@@ -316,9 +319,11 @@ int rsnd_adg_ssi_clk_try_start(struct rs
- 	struct rsnd_priv *priv = rsnd_mod_to_priv(ssi_mod);
- 	struct rsnd_adg *adg = rsnd_priv_to_adg(priv);
- 	struct device *dev = rsnd_priv_to_dev(priv);
-+	struct rsnd_mod *adg_mod = rsnd_mod_get(adg);
- 	struct clk *clk;
- 	int i;
- 	u32 data;
-+	u32 ckr = 0;
- 	int sel_table[] = {
- 		[CLKA] = 0x1,
- 		[CLKB] = 0x2,
-@@ -360,15 +365,14 @@ found_clock:
- 	rsnd_adg_set_ssi_clk(ssi_mod, data);
- 
- 	if (!(adg_mode_flags(adg) & LRCLK_ASYNC)) {
--		struct rsnd_mod *adg_mod = rsnd_mod_get(adg);
--		u32 ckr = 0;
--
- 		if (0 == (rate % 8000))
- 			ckr = 0x80000000;
--
--		rsnd_mod_bset(adg_mod, BRGCKR, 0x80000000, ckr);
- 	}
- 
-+	rsnd_mod_bset(adg_mod, BRGCKR, 0x80FF0000, adg->ckr | ckr);
-+	rsnd_mod_write(adg_mod, BRRA,  adg->rbga);
-+	rsnd_mod_write(adg_mod, BRRB,  adg->rbgb);
-+
- 	dev_dbg(dev, "ADG: %s[%d] selects 0x%x for %d\n",
- 		rsnd_mod_name(ssi_mod), rsnd_mod_id(ssi_mod),
- 		data, rate);
-@@ -421,7 +425,6 @@ static void rsnd_adg_get_clkout(struct r
- 				struct rsnd_adg *adg)
- {
- 	struct clk *clk;
--	struct rsnd_mod *adg_mod = rsnd_mod_get(adg);
- 	struct device *dev = rsnd_priv_to_dev(priv);
- 	struct device_node *np = dev->of_node;
- 	u32 ckr, rbgx, rbga, rbgb;
-@@ -546,9 +549,9 @@ static void rsnd_adg_get_clkout(struct r
- 		}
- 	}
- 
--	rsnd_mod_bset(adg_mod, BRGCKR, 0x80FF0000, ckr);
--	rsnd_mod_write(adg_mod, BRRA,  rbga);
--	rsnd_mod_write(adg_mod, BRRB,  rbgb);
-+	adg->ckr = ckr;
-+	adg->rbga = rbga;
-+	adg->rbgb = rbgb;
- 
- 	for_each_rsnd_clkout(clk, adg, i)
- 		dev_dbg(dev, "clkout %d : %p : %ld\n", i, clk, clk_get_rate(clk));
diff --git a/patches.renesas/0083-ARM-dts-r8a7791-Use-R-Car-Gen-2-fallback-binding-for.patch b/patches.renesas/0083-ARM-dts-r8a7791-Use-R-Car-Gen-2-fallback-binding-for.patch
deleted file mode 100644
index 26c6879af5548d..00000000000000
--- a/patches.renesas/0083-ARM-dts-r8a7791-Use-R-Car-Gen-2-fallback-binding-for.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From a3d9cc012f16951b812aeb3d802cc7c8eb8e1768 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 20 Dec 2016 11:32:37 +0100
-Subject: [PATCH 083/255] ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding
- for msiof nodes
-
-Use recently added R-Car Gen 2 fallback binding for msiof nodes in
-DT for r8a7791 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7791 and the
-fallback binding for R-Car Gen 2.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit fdda1f9e23f17effe32fd349aefab665b58b8d64)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi |    9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -1523,7 +1523,8 @@
- 	};
- 
- 	msiof0: spi@e6e20000 {
--		compatible = "renesas,msiof-r8a7791";
-+		compatible = "renesas,msiof-r8a7791",
-+			     "renesas,rcar-gen2-msiof";
- 		reg = <0 0xe6e20000 0 0x0064>;
- 		interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
-@@ -1537,7 +1538,8 @@
- 	};
- 
- 	msiof1: spi@e6e10000 {
--		compatible = "renesas,msiof-r8a7791";
-+		compatible = "renesas,msiof-r8a7791",
-+			     "renesas,rcar-gen2-msiof";
- 		reg = <0 0xe6e10000 0 0x0064>;
- 		interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
-@@ -1551,7 +1553,8 @@
- 	};
- 
- 	msiof2: spi@e6e00000 {
--		compatible = "renesas,msiof-r8a7791";
-+		compatible = "renesas,msiof-r8a7791",
-+			     "renesas,rcar-gen2-msiof";
- 		reg = <0 0xe6e00000 0 0x0064>;
- 		interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
diff --git a/patches.renesas/0083-ARM-shmobile-Document-RZ-G1N-SoC-DT-binding.patch b/patches.renesas/0083-ARM-shmobile-Document-RZ-G1N-SoC-DT-binding.patch
deleted file mode 100644
index 39286095fc2b10..00000000000000
--- a/patches.renesas/0083-ARM-shmobile-Document-RZ-G1N-SoC-DT-binding.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From efcb2dcbf18f63019eb8312f05d954237568db23 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:48:28 +0100
-Subject: [PATCH 083/286] ARM: shmobile: Document RZ/G1N SoC DT binding
-
-Document the RZ/G1N (r8a7744) SoC.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cfb9f93437eb6663ca99e85c47bb3656ccfe59c5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/arm/shmobile.txt |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/Documentation/devicetree/bindings/arm/shmobile.txt
-+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
-@@ -17,6 +17,8 @@ SoCs:
-     compatible = "renesas,r8a7742"
-   - RZ/G1M (R8A77430)
-     compatible = "renesas,r8a7743"
-+  - RZ/G1N (R8A77440)
-+    compatible = "renesas,r8a7744"
-   - RZ/G1E (R8A77450)
-     compatible = "renesas,r8a7745"
-   - R-Car M1A (R8A77781)
diff --git a/patches.renesas/0084-ARM-8660-1-shmobile-r7s72100-Enable-L2-cache.patch b/patches.renesas/0084-ARM-8660-1-shmobile-r7s72100-Enable-L2-cache.patch
deleted file mode 100644
index 12fdca68fb66ba..00000000000000
--- a/patches.renesas/0084-ARM-8660-1-shmobile-r7s72100-Enable-L2-cache.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 44190534ecc21378fe400df0ba872f720f4578ff Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Thu, 16 Feb 2017 18:54:39 +0100
-Subject: [PATCH 084/286] ARM: 8660/1: shmobile: r7s72100: Enable L2 cache
-
-Even though L2C is specified in the DT, you still need to add the aux
-settings in the machine_desc.
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
-(cherry picked from commit a96bb197693eb9e7a7221867bd944ccd6b6e12e6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r7s72100.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/arch/arm/mach-shmobile/setup-r7s72100.c
-+++ b/arch/arm/mach-shmobile/setup-r7s72100.c
-@@ -26,6 +26,8 @@ static const char *const r7s72100_boards
- };
- 
- DT_MACHINE_START(R7S72100_DT, "Generic R7S72100 (Flattened Device Tree)")
-+	.l2c_aux_val    = 0,
-+	.l2c_aux_mask   = ~0,
- 	.init_early	= shmobile_init_delay,
- 	.init_late	= shmobile_init_late,
- 	.dt_compat	= r7s72100_boards_compat_dt,
diff --git a/patches.renesas/0084-ARM-dts-r8a7792-Use-R-Car-Gen-2-fallback-binding-for.patch b/patches.renesas/0084-ARM-dts-r8a7792-Use-R-Car-Gen-2-fallback-binding-for.patch
deleted file mode 100644
index 31feaa782eb24c..00000000000000
--- a/patches.renesas/0084-ARM-dts-r8a7792-Use-R-Car-Gen-2-fallback-binding-for.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 868b7a493dd27ce1af87206b2d65fd5a9cfaba30 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 20 Dec 2016 11:32:38 +0100
-Subject: [PATCH 084/255] ARM: dts: r8a7792: Use R-Car Gen 2 fallback binding
- for msiof nodes
-
-Use recently added R-Car Gen 2 fallback binding for msiof nodes in
-DT for r8a7792 SoC.
-
-This has no run-time effect for the current driver as the initialisation
-sequence is the same for the SoC-specific binding for r8a7792 and the
-fallback binding for R-Car Gen 2.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 50a15093c6f1bf5f89b9954075b27b52c0322beb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7792.dtsi |    6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7792.dtsi
-+++ b/arch/arm/boot/dts/r8a7792.dtsi
-@@ -590,7 +590,8 @@
- 		};
- 
- 		msiof0: spi@e6e20000 {
--			compatible = "renesas,msiof-r8a7792";
-+			compatible = "renesas,msiof-r8a7792",
-+				     "renesas,rcar-gen2-msiof";
- 			reg = <0 0xe6e20000 0 0x0064>;
- 			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&mstp0_clks R8A7792_CLK_MSIOF0>;
-@@ -604,7 +605,8 @@
- 		};
- 
- 		msiof1: spi@e6e10000 {
--			compatible = "renesas,msiof-r8a7792";
-+			compatible = "renesas,msiof-r8a7792",
-+				     "renesas,rcar-gen2-msiof";
- 			reg = <0 0xe6e10000 0 0x0064>;
- 			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&mstp2_clks R8A7792_CLK_MSIOF1>;
diff --git a/patches.renesas/0084-spi-rspi-supports-32bytes-buffer-for-DUAL-and-QUAD.patch b/patches.renesas/0084-spi-rspi-supports-32bytes-buffer-for-DUAL-and-QUAD.patch
deleted file mode 100644
index e32dc34e3ae3dd..00000000000000
--- a/patches.renesas/0084-spi-rspi-supports-32bytes-buffer-for-DUAL-and-QUAD.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From ff475225d3a9b8f14a7d33cce32517d75e2ccaa0 Mon Sep 17 00:00:00 2001
-From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
-Date: Fri, 4 Nov 2016 17:38:54 +0900
-Subject: [PATCH 084/299] spi: rspi: supports 32bytes buffer for DUAL and QUAD
-
-This patch supports 32bytes of buffer for DUAL and QUAD in QSPI by
-Using Transmit/Receive Buffer Data Triggering Number.
-In order to improve the DUAL and QUAD's performance of SPI
-while transferring data in PIO mode, it sends/receives each 32bytes
-data instead of each byte data as current situation.
-
-Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 3be09bec42a800d4f8ead8119c462f3eb4fad435)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/spi-rspi.c |   52 ++++++++++++++++++++++++++++++++++++++++++++++---
- 1 file changed, 49 insertions(+), 3 deletions(-)
-
---- a/drivers/spi/spi-rspi.c
-+++ b/drivers/spi/spi-rspi.c
-@@ -413,7 +413,7 @@ static unsigned int qspi_set_send_trigge
- 	return n;
- }
- 
--static void qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len)
-+static int qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len)
- {
- 	unsigned int n;
- 
-@@ -428,6 +428,7 @@ static void qspi_set_receive_trigger(str
- 		qspi_update(rspi, SPBFCR_RXTRG_MASK,
- 			     SPBFCR_RXTRG_1B, QSPI_SPBFCR);
- 	}
-+	return n;
- }
- 
- #define set_config_register(spi, n) spi->ops->set_config_register(spi, n)
-@@ -514,6 +515,51 @@ static int rspi_pio_transfer(struct rspi
- 	return 0;
- }
- 
-+static int rspi_pio_transfer_in_or_our(struct rspi_data *rspi, const u8 *tx,
-+				       u8 *rx, unsigned int n)
-+{
-+	unsigned int i, len;
-+	int ret;
-+
-+	while (n > 0) {
-+		if (tx) {
-+			len = qspi_set_send_trigger(rspi, n);
-+			if (len == QSPI_BUFFER_SIZE) {
-+				ret = rspi_wait_for_tx_empty(rspi);
-+				if (ret < 0) {
-+					dev_err(&rspi->master->dev, "transmit timeout\n");
-+					return ret;
-+				}
-+				for (i = 0; i < len; i++)
-+					rspi_write_data(rspi, *tx++);
-+			} else {
-+				ret = rspi_pio_transfer(rspi, tx, NULL, n);
-+				if (ret < 0)
-+					return ret;
-+			}
-+		}
-+		if (rx) {
-+			len = qspi_set_receive_trigger(rspi, n);
-+			if (len == QSPI_BUFFER_SIZE) {
-+				ret = rspi_wait_for_rx_full(rspi);
-+				if (ret < 0) {
-+					dev_err(&rspi->master->dev, "receive timeout\n");
-+					return ret;
-+				}
-+				for (i = 0; i < len; i++)
-+					*rx++ = rspi_read_data(rspi);
-+			} else {
-+				ret = rspi_pio_transfer(rspi, NULL, rx, n);
-+				if (ret < 0)
-+					return ret;
-+				*rx++ = ret;
-+			}
-+		}
-+		n -= len;
-+	}
-+	return 0;
-+}
-+
- static void rspi_dma_complete(void *arg)
- {
- 	struct rspi_data *rspi = arg;
-@@ -793,7 +839,7 @@ static int qspi_transfer_out(struct rspi
- 			return ret;
- 	}
- 
--	ret = rspi_pio_transfer(rspi, xfer->tx_buf, NULL, xfer->len);
-+	ret = rspi_pio_transfer_in_or_our(rspi, xfer->tx_buf, NULL, xfer->len);
- 	if (ret < 0)
- 		return ret;
- 
-@@ -811,7 +857,7 @@ static int qspi_transfer_in(struct rspi_
- 			return ret;
- 	}
- 
--	return rspi_pio_transfer(rspi, NULL, xfer->rx_buf, xfer->len);
-+	return rspi_pio_transfer_in_or_our(rspi, NULL, xfer->rx_buf, xfer->len);
- }
- 
- static int qspi_transfer_one(struct spi_master *master, struct spi_device *spi,
diff --git a/patches.renesas/0085-phy-rcar-gen3-usb2-fix-implementation-for-runtime-PM.patch b/patches.renesas/0085-phy-rcar-gen3-usb2-fix-implementation-for-runtime-PM.patch
deleted file mode 100644
index 6289d73de1b6c7..00000000000000
--- a/patches.renesas/0085-phy-rcar-gen3-usb2-fix-implementation-for-runtime-PM.patch
+++ /dev/null
@@ -1,103 +0,0 @@
-From 7d5313842c13ce15381188961da37b1919c1b842 Mon Sep 17 00:00:00 2001
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Date: Tue, 14 Mar 2017 08:37:40 +0900
-Subject: [PATCH 085/286] phy: rcar-gen3-usb2: fix implementation for runtime
- PM
-
-This patch fixes an issue that this driver doesn't take care of the runtime
-PM. This code assumed that devm_phy_create() called pm_runtime_enable(dev),
-but it misunderstood the dev_phy_create()'s specification.
-This driver should call its own pm_runtime_enable() before
-dev_phy_create().
-
-Fixes: f3b5a8d9b50d ("phy: rcar-gen3-usb2: Add R-Car Gen3 USB2 PHY driver")
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
-(cherry picked from commit 441a681b8843474c9796b50c35794ff102701f37)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/phy/phy-rcar-gen3-usb2.c |   31 ++++++++++++++++++++++++-------
- 1 file changed, 24 insertions(+), 7 deletions(-)
-
---- a/drivers/phy/phy-rcar-gen3-usb2.c
-+++ b/drivers/phy/phy-rcar-gen3-usb2.c
-@@ -20,6 +20,7 @@
- #include <linux/of_address.h>
- #include <linux/phy/phy.h>
- #include <linux/platform_device.h>
-+#include <linux/pm_runtime.h>
- #include <linux/regulator/consumer.h>
- #include <linux/workqueue.h>
- 
-@@ -395,7 +396,7 @@ static int rcar_gen3_phy_usb2_probe(stru
- 	struct rcar_gen3_chan *channel;
- 	struct phy_provider *provider;
- 	struct resource *res;
--	int irq;
-+	int irq, ret = 0;
- 
- 	if (!dev->of_node) {
- 		dev_err(dev, "This driver needs device tree\n");
-@@ -434,17 +435,24 @@ static int rcar_gen3_phy_usb2_probe(stru
- 		}
- 	}
- 
--	/* devm_phy_create() will call pm_runtime_enable(dev); */
-+	/*
-+	 * devm_phy_create() will call pm_runtime_enable(&phy->dev);
-+	 * And then, phy-core will manage runtime pm for this device.
-+	 */
-+	pm_runtime_enable(dev);
- 	channel->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb2_ops);
- 	if (IS_ERR(channel->phy)) {
- 		dev_err(dev, "Failed to create USB2 PHY\n");
--		return PTR_ERR(channel->phy);
-+		ret = PTR_ERR(channel->phy);
-+		goto error;
- 	}
- 
- 	channel->vbus = devm_regulator_get_optional(dev, "vbus");
- 	if (IS_ERR(channel->vbus)) {
--		if (PTR_ERR(channel->vbus) == -EPROBE_DEFER)
--			return PTR_ERR(channel->vbus);
-+		if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
-+			ret = PTR_ERR(channel->vbus);
-+			goto error;
-+		}
- 		channel->vbus = NULL;
- 	}
- 
-@@ -454,15 +462,22 @@ static int rcar_gen3_phy_usb2_probe(stru
- 	provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
- 	if (IS_ERR(provider)) {
- 		dev_err(dev, "Failed to register PHY provider\n");
-+		ret = PTR_ERR(provider);
-+		goto error;
- 	} else if (channel->has_otg) {
- 		int ret;
- 
- 		ret = device_create_file(dev, &dev_attr_role);
- 		if (ret < 0)
--			return ret;
-+			goto error;
- 	}
- 
--	return PTR_ERR_OR_ZERO(provider);
-+	return 0;
-+
-+error:
-+	pm_runtime_disable(dev);
-+
-+	return ret;
- }
- 
- static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
-@@ -472,6 +487,8 @@ static int rcar_gen3_phy_usb2_remove(str
- 	if (channel->has_otg)
- 		device_remove_file(&pdev->dev, &dev_attr_role);
- 
-+	pm_runtime_disable(&pdev->dev);
-+
- 	return 0;
- };
- 
diff --git a/patches.renesas/0085-spi-rspi-avoid-uninitialized-variable-access.patch b/patches.renesas/0085-spi-rspi-avoid-uninitialized-variable-access.patch
deleted file mode 100644
index 256a4bf2c40ecb..00000000000000
--- a/patches.renesas/0085-spi-rspi-avoid-uninitialized-variable-access.patch
+++ /dev/null
@@ -1,160 +0,0 @@
-From 5b0c2772f585fe93e1043f5576dcc25048319459 Mon Sep 17 00:00:00 2001
-From: Arnd Bergmann <arnd@arndb.de>
-Date: Tue, 8 Nov 2016 14:46:12 +0100
-Subject: [PATCH 085/299] spi: rspi: avoid uninitialized variable access
-
-The newly introduced rspi_pio_transfer_in_or_our() function must
-take either a valid 'rx' or 'tx' pointer, and has undefined behavior
-if both are NULL, as found by 'gcc -Wmaybe-unintialized':
-
-drivers/spi/spi-rspi.c: In function 'rspi_pio_transfer_in_or_our':
-drivers/spi/spi-rspi.c:558:5: error: 'len' may be used uninitialized in this function [-Werror=maybe-uninitialized]
-
-The analysis of the function is correct in principle, but the code
-is currently safe because both callers always pass exactly one
-of the two pointers.
-
-Looking closer at this function shows that having a combined
-method for rx and tx here actually increases the complexity
-and the size of the file. This simplifies it again by keeping
-the two separate, which then ends up avoiding that warning.
-
-Fixes: 3be09bec42a8 ("spi: rspi: supports 32bytes buffer for DUAL and QUAD")
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit db30083813b559e98e10ae26bd09d3dc69be7fb7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/spi-rspi.c |   94 +++++++++++++++++++++++--------------------------
- 1 file changed, 45 insertions(+), 49 deletions(-)
-
---- a/drivers/spi/spi-rspi.c
-+++ b/drivers/spi/spi-rspi.c
-@@ -515,51 +515,6 @@ static int rspi_pio_transfer(struct rspi
- 	return 0;
- }
- 
--static int rspi_pio_transfer_in_or_our(struct rspi_data *rspi, const u8 *tx,
--				       u8 *rx, unsigned int n)
--{
--	unsigned int i, len;
--	int ret;
--
--	while (n > 0) {
--		if (tx) {
--			len = qspi_set_send_trigger(rspi, n);
--			if (len == QSPI_BUFFER_SIZE) {
--				ret = rspi_wait_for_tx_empty(rspi);
--				if (ret < 0) {
--					dev_err(&rspi->master->dev, "transmit timeout\n");
--					return ret;
--				}
--				for (i = 0; i < len; i++)
--					rspi_write_data(rspi, *tx++);
--			} else {
--				ret = rspi_pio_transfer(rspi, tx, NULL, n);
--				if (ret < 0)
--					return ret;
--			}
--		}
--		if (rx) {
--			len = qspi_set_receive_trigger(rspi, n);
--			if (len == QSPI_BUFFER_SIZE) {
--				ret = rspi_wait_for_rx_full(rspi);
--				if (ret < 0) {
--					dev_err(&rspi->master->dev, "receive timeout\n");
--					return ret;
--				}
--				for (i = 0; i < len; i++)
--					*rx++ = rspi_read_data(rspi);
--			} else {
--				ret = rspi_pio_transfer(rspi, NULL, rx, n);
--				if (ret < 0)
--					return ret;
--				*rx++ = ret;
--			}
--		}
--		n -= len;
--	}
--	return 0;
--}
--
- static void rspi_dma_complete(void *arg)
- {
- 	struct rspi_data *rspi = arg;
-@@ -831,6 +786,9 @@ static int qspi_transfer_out_in(struct r
- 
- static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer)
- {
-+	const u8 *tx = xfer->tx_buf;
-+	unsigned int n = xfer->len;
-+	unsigned int i, len;
- 	int ret;
- 
- 	if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer)) {
-@@ -839,9 +797,23 @@ static int qspi_transfer_out(struct rspi
- 			return ret;
- 	}
- 
--	ret = rspi_pio_transfer_in_or_our(rspi, xfer->tx_buf, NULL, xfer->len);
--	if (ret < 0)
--		return ret;
-+	while (n > 0) {
-+		len = qspi_set_send_trigger(rspi, n);
-+		if (len == QSPI_BUFFER_SIZE) {
-+			ret = rspi_wait_for_tx_empty(rspi);
-+			if (ret < 0) {
-+				dev_err(&rspi->master->dev, "transmit timeout\n");
-+				return ret;
-+			}
-+			for (i = 0; i < len; i++)
-+				rspi_write_data(rspi, *tx++);
-+		} else {
-+			ret = rspi_pio_transfer(rspi, tx, NULL, n);
-+			if (ret < 0)
-+				return ret;
-+		}
-+		n -= len;
-+	}
- 
- 	/* Wait for the last transmission */
- 	rspi_wait_for_tx_empty(rspi);
-@@ -851,13 +823,37 @@ static int qspi_transfer_out(struct rspi
- 
- static int qspi_transfer_in(struct rspi_data *rspi, struct spi_transfer *xfer)
- {
-+	u8 *rx = xfer->rx_buf;
-+	unsigned int n = xfer->len;
-+	unsigned int i, len;
-+	int ret;
-+
- 	if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer)) {
- 		int ret = rspi_dma_transfer(rspi, NULL, &xfer->rx_sg);
- 		if (ret != -EAGAIN)
- 			return ret;
- 	}
- 
--	return rspi_pio_transfer_in_or_our(rspi, NULL, xfer->rx_buf, xfer->len);
-+	while (n > 0) {
-+		len = qspi_set_receive_trigger(rspi, n);
-+		if (len == QSPI_BUFFER_SIZE) {
-+			ret = rspi_wait_for_rx_full(rspi);
-+			if (ret < 0) {
-+				dev_err(&rspi->master->dev, "receive timeout\n");
-+				return ret;
-+			}
-+			for (i = 0; i < len; i++)
-+				*rx++ = rspi_read_data(rspi);
-+		} else {
-+			ret = rspi_pio_transfer(rspi, NULL, rx, n);
-+			if (ret < 0)
-+				return ret;
-+			*rx++ = ret;
-+		}
-+		n -= len;
-+	}
-+
-+	return 0;
- }
- 
- static int qspi_transfer_one(struct spi_master *master, struct spi_device *spi,
diff --git a/patches.renesas/0086-ARM-shmobile-apmu-Add-more-register-documentation.patch b/patches.renesas/0086-ARM-shmobile-apmu-Add-more-register-documentation.patch
deleted file mode 100644
index 473b4b71e3c973..00000000000000
--- a/patches.renesas/0086-ARM-shmobile-apmu-Add-more-register-documentation.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 948417ce5dfce9b4c4397df3baa542a32a652592 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 5 Dec 2016 11:39:37 +0100
-Subject: [PATCH 086/255] ARM: shmobile: apmu: Add more register documentation
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 460d4117a4714f3e9ae600974df03632139728ec)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/platsmp-apmu.c |   14 ++++++++++----
- 1 file changed, 10 insertions(+), 4 deletions(-)
-
---- a/arch/arm/mach-shmobile/platsmp-apmu.c
-+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
-@@ -31,9 +31,15 @@ static struct {
- 	int bit;
- } apmu_cpus[NR_CPUS];
- 
--#define WUPCR_OFFS 0x10
--#define PSTR_OFFS 0x40
--#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
-+#define WUPCR_OFFS	 0x10		/* Wake Up Control Register */
-+#define PSTR_OFFS	 0x40		/* Power Status Register */
-+#define CPUNCR_OFFS(n)	(0x100 + (0x10 * (n)))
-+					/* CPUn Power Status Control Register */
-+
-+/* Power Status Register */
-+#define CPUNST(r, n)	(((r) >> (n * 4)) & 3)	/* CPUn Status Bit */
-+#define CPUST_RUN	0		/* Run Mode */
-+#define CPUST_STANDBY	3		/* CoreStandby Mode */
- 
- static int __maybe_unused apmu_power_on(void __iomem *p, int bit)
- {
-@@ -59,7 +65,7 @@ static int __maybe_unused apmu_power_off
- 	int k;
- 
- 	for (k = 0; k < 1000; k++) {
--		if (((readl_relaxed(p + PSTR_OFFS) >> (bit * 4)) & 0x03) == 3)
-+		if (CPUNST(readl_relaxed(p + PSTR_OFFS), bit) == CPUST_STANDBY)
- 			return 1;
- 
- 		mdelay(1);
diff --git a/patches.renesas/0086-dmaengine-rcar-dmac-enable-descriptor-mode-on-40bit.patch b/patches.renesas/0086-dmaengine-rcar-dmac-enable-descriptor-mode-on-40bit.patch
deleted file mode 100644
index f65d006d00e526..00000000000000
--- a/patches.renesas/0086-dmaengine-rcar-dmac-enable-descriptor-mode-on-40bit.patch
+++ /dev/null
@@ -1,128 +0,0 @@
-From bf0a6232ae78482a78127bb1a39e7ec09d1cfb37 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 22 Mar 2017 04:22:36 +0000
-Subject: [PATCH 086/286] dmaengine: rcar-dmac: enable descriptor mode on 40bit
-
-SYS-DMAC can use 40bit address transfer, and it supports Descriptor
-Mode too. Current SYS-DMAC driver disables Descriptor Mode if it was
-40bit address today. But it can use Descriptor Mode with 40bit if
-transfer Source/Destination address are located in same 4GiB region
-in the 40 bit address space.
-This patch enables it if all condition was clear
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 1175f83cdb7a321b8b7b061d18846d58490b2654)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/dma/sh/rcar-dmac.c |   52 +++++++++++++++++++++++++++------------------
- 1 file changed, 32 insertions(+), 20 deletions(-)
-
---- a/drivers/dma/sh/rcar-dmac.c
-+++ b/drivers/dma/sh/rcar-dmac.c
-@@ -344,13 +344,19 @@ static void rcar_dmac_chan_start_xfer(st
- 		rcar_dmac_chan_write(chan, RCAR_DMARS, chan->mid_rid);
- 
- 	if (desc->hwdescs.use) {
--		struct rcar_dmac_xfer_chunk *chunk;
-+		struct rcar_dmac_xfer_chunk *chunk =
-+			list_first_entry(&desc->chunks,
-+					 struct rcar_dmac_xfer_chunk, node);
- 
- 		dev_dbg(chan->chan.device->dev,
- 			"chan%u: queue desc %p: %u@%pad\n",
- 			chan->index, desc, desc->nchunks, &desc->hwdescs.dma);
- 
- #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
-+		rcar_dmac_chan_write(chan, RCAR_DMAFIXSAR,
-+				     chunk->src_addr >> 32);
-+		rcar_dmac_chan_write(chan, RCAR_DMAFIXDAR,
-+				     chunk->dst_addr >> 32);
- 		rcar_dmac_chan_write(chan, RCAR_DMAFIXDPBASE,
- 				     desc->hwdescs.dma >> 32);
- #endif
-@@ -368,8 +374,6 @@ static void rcar_dmac_chan_start_xfer(st
- 		 * should. Initialize it manually with the destination address
- 		 * of the first chunk.
- 		 */
--		chunk = list_first_entry(&desc->chunks,
--					 struct rcar_dmac_xfer_chunk, node);
- 		rcar_dmac_chan_write(chan, RCAR_DMADAR,
- 				     chunk->dst_addr & 0xffffffff);
- 
-@@ -855,8 +859,12 @@ rcar_dmac_chan_prep_sg(struct rcar_dmac_
- 	unsigned int nchunks = 0;
- 	unsigned int max_chunk_size;
- 	unsigned int full_size = 0;
--	bool highmem = false;
-+	bool cross_boundary = false;
- 	unsigned int i;
-+#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
-+	u32 high_dev_addr;
-+	u32 high_mem_addr;
-+#endif
- 
- 	desc = rcar_dmac_desc_get(chan);
- 	if (!desc)
-@@ -882,6 +890,16 @@ rcar_dmac_chan_prep_sg(struct rcar_dmac_
- 
- 		full_size += len;
- 
-+#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
-+		if (i == 0) {
-+			high_dev_addr = dev_addr >> 32;
-+			high_mem_addr = mem_addr >> 32;
-+		}
-+
-+		if ((dev_addr >> 32 != high_dev_addr) ||
-+		    (mem_addr >> 32 != high_mem_addr))
-+			cross_boundary = true;
-+#endif
- 		while (len) {
- 			unsigned int size = min(len, max_chunk_size);
- 
-@@ -890,18 +908,14 @@ rcar_dmac_chan_prep_sg(struct rcar_dmac_
- 			 * Prevent individual transfers from crossing 4GB
- 			 * boundaries.
- 			 */
--			if (dev_addr >> 32 != (dev_addr + size - 1) >> 32)
-+			if (dev_addr >> 32 != (dev_addr + size - 1) >> 32) {
- 				size = ALIGN(dev_addr, 1ULL << 32) - dev_addr;
--			if (mem_addr >> 32 != (mem_addr + size - 1) >> 32)
-+				cross_boundary = true;
-+			}
-+			if (mem_addr >> 32 != (mem_addr + size - 1) >> 32) {
- 				size = ALIGN(mem_addr, 1ULL << 32) - mem_addr;
--
--			/*
--			 * Check if either of the source or destination address
--			 * can't be expressed in 32 bits. If so we can't use
--			 * hardware descriptor lists.
--			 */
--			if (dev_addr >> 32 || mem_addr >> 32)
--				highmem = true;
-+				cross_boundary = true;
-+			}
- #endif
- 
- 			chunk = rcar_dmac_xfer_chunk_get(chan);
-@@ -943,13 +957,11 @@ rcar_dmac_chan_prep_sg(struct rcar_dmac_
- 	 * Use hardware descriptor lists if possible when more than one chunk
- 	 * needs to be transferred (otherwise they don't make much sense).
- 	 *
--	 * The highmem check currently covers the whole transfer. As an
--	 * optimization we could use descriptor lists for consecutive lowmem
--	 * chunks and direct manual mode for highmem chunks. Whether the
--	 * performance improvement would be significant enough compared to the
--	 * additional complexity remains to be investigated.
-+	 * Source/Destination address should be located in same 4GiB region
-+	 * in the 40bit address space when it uses Hardware descriptor,
-+	 * and cross_boundary is checking it.
- 	 */
--	desc->hwdescs.use = !highmem && nchunks > 1;
-+	desc->hwdescs.use = !cross_boundary && nchunks > 1;
- 	if (desc->hwdescs.use) {
- 		if (rcar_dmac_fill_hwdesc(chan, desc) < 0)
- 			desc->hwdescs.use = false;
diff --git a/patches.renesas/0086-mmc-sh_mmcif-Document-r8a73a4-r8a7778-and-sh73a0-DT-.patch b/patches.renesas/0086-mmc-sh_mmcif-Document-r8a73a4-r8a7778-and-sh73a0-DT-.patch
deleted file mode 100644
index 909d77657f5133..00000000000000
--- a/patches.renesas/0086-mmc-sh_mmcif-Document-r8a73a4-r8a7778-and-sh73a0-DT-.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From b0c74bd8be6652874bdb5e692358fd208b682b5b Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Fri, 25 Nov 2016 08:56:14 +0100
-Subject: [PATCH 086/299] mmc: sh_mmcif: Document r8a73a4, r8a7778 and sh73a0
- DT bindings
-
-Simply document new compatibility strings as the driver is already
-activated using a fallback compatibility string.
-
-These compat strings are in keeping with those for all other
-Renesas ARM based SoCs with sh_mmcif enabled in mainline.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit fb3470f795ab4fea7bb9abd01b6055453b737832)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/mmc/renesas,mmcif.txt |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
-+++ b/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
-@@ -8,11 +8,14 @@ Required properties:
- 
- - compatible: should be "renesas,mmcif-<soctype>", "renesas,sh-mmcif" as a
-   fallback. Examples with <soctype> are:
-+	- "renesas,mmcif-r8a73a4" for the MMCIF found in r8a73a4 SoCs
- 	- "renesas,mmcif-r8a7740" for the MMCIF found in r8a7740 SoCs
-+	- "renesas,mmcif-r8a7778" for the MMCIF found in r8a7778 SoCs
- 	- "renesas,mmcif-r8a7790" for the MMCIF found in r8a7790 SoCs
- 	- "renesas,mmcif-r8a7791" for the MMCIF found in r8a7791 SoCs
- 	- "renesas,mmcif-r8a7793" for the MMCIF found in r8a7793 SoCs
- 	- "renesas,mmcif-r8a7794" for the MMCIF found in r8a7794 SoCs
-+	- "renesas,mmcif-sh73a0" for the MMCIF found in sh73a0 SoCs
- 
- - clocks: reference to the functional clock
- 
diff --git a/patches.renesas/0087-ARM-shmobile-apmu-Add-debug-resource-reset-for-secon.patch b/patches.renesas/0087-ARM-shmobile-apmu-Add-debug-resource-reset-for-secon.patch
deleted file mode 100644
index 0f3ce9d1fe7098..00000000000000
--- a/patches.renesas/0087-ARM-shmobile-apmu-Add-debug-resource-reset-for-secon.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 463cf90aea2706afe2d5b3b7d95957c4a14f8b1e Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 5 Dec 2016 11:39:38 +0100
-Subject: [PATCH 087/255] ARM: shmobile: apmu: Add debug resource reset for
- secondary CPU boot
-
-In debug mode (MD21=1), reset requests derived from power-shutoff to the
-AP-system CPU cores must be enabled before the AP-system CPU cores
-resume from power-shutoff for the first time. Else resume may fail,
-causing the system to hang during boot.
-
-As setting these bits is a no-op in normal mode, there's no need to
-check the actual state of MD21 first.
-
-Inspired by CPU-specific patches in the BSP by Hisashi Nakamura
-<hisashi.nakamura.ak@renesas.com>.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 10f778a97845e8b10af8878af99c9cfe6c31baf9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/platsmp-apmu.c |   13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/arch/arm/mach-shmobile/platsmp-apmu.c
-+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
-@@ -35,12 +35,18 @@ static struct {
- #define PSTR_OFFS	 0x40		/* Power Status Register */
- #define CPUNCR_OFFS(n)	(0x100 + (0x10 * (n)))
- 					/* CPUn Power Status Control Register */
-+#define DBGRCR_OFFS	0x180		/* Debug Resource Reset Control Reg. */
- 
- /* Power Status Register */
- #define CPUNST(r, n)	(((r) >> (n * 4)) & 3)	/* CPUn Status Bit */
- #define CPUST_RUN	0		/* Run Mode */
- #define CPUST_STANDBY	3		/* CoreStandby Mode */
- 
-+/* Debug Resource Reset Control Register */
-+#define DBGCPUREN	BIT(24)		/* CPU Other Reset Request Enable */
-+#define DBGCPUNREN(n)	BIT((n) + 20)	/* CPUn Reset Request Enable */
-+#define DBGCPUPREN	BIT(19)		/* CPU Peripheral Reset Req. Enable */
-+
- static int __maybe_unused apmu_power_on(void __iomem *p, int bit)
- {
- 	/* request power on */
-@@ -84,6 +90,8 @@ static int __maybe_unused apmu_wrap(int
- #ifdef CONFIG_SMP
- static void apmu_init_cpu(struct resource *res, int cpu, int bit)
- {
-+	u32 x;
-+
- 	if ((cpu >= ARRAY_SIZE(apmu_cpus)) || apmu_cpus[cpu].iomem)
- 		return;
- 
-@@ -91,6 +99,11 @@ static void apmu_init_cpu(struct resourc
- 	apmu_cpus[cpu].bit = bit;
- 
- 	pr_debug("apmu ioremap %d %d %pr\n", cpu, bit, res);
-+
-+	/* Setup for debug mode */
-+	x = readl(apmu_cpus[cpu].iomem + DBGRCR_OFFS);
-+	x |= DBGCPUREN | DBGCPUNREN(bit) | DBGCPUPREN;
-+	writel(x, apmu_cpus[cpu].iomem + DBGRCR_OFFS);
- }
- 
- static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit),
diff --git a/patches.renesas/0087-mmc-sh_mobile_sdhi-add-ocr_mask-option.patch b/patches.renesas/0087-mmc-sh_mobile_sdhi-add-ocr_mask-option.patch
deleted file mode 100644
index 6103137d32d7b3..00000000000000
--- a/patches.renesas/0087-mmc-sh_mobile_sdhi-add-ocr_mask-option.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 2075076c197cf793b193f26a87df772cfad29a10 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Mon, 12 Sep 2016 10:15:05 -0400
-Subject: [PATCH 087/299] mmc: sh_mobile_sdhi: add ocr_mask option
-
-In moving platforms from board files to DT, there still needs to be a way
-to set the ocr_mask setting for the tmio driver during probe. Without this
-setting, the probe will fail because the supported voltages are not known.
-
-This patch will also traditional platform registration platforms to
-migrate to DT.
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit f19417f38264f9a2f7b4627aa4060133c237b211)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -49,6 +49,7 @@
- 
- struct sh_mobile_sdhi_of_data {
- 	unsigned long tmio_flags;
-+	u32	      tmio_ocr_mask;
- 	unsigned long capabilities;
- 	unsigned long capabilities2;
- 	enum dma_slave_buswidth dma_buswidth;
-@@ -364,6 +365,7 @@ static int sh_mobile_sdhi_probe(struct p
- 		const struct sh_mobile_sdhi_of_data *of_data = of_id->data;
- 
- 		mmc_data->flags |= of_data->tmio_flags;
-+		mmc_data->ocr_mask = of_data->tmio_ocr_mask;
- 		mmc_data->capabilities |= of_data->capabilities;
- 		mmc_data->capabilities2 |= of_data->capabilities2;
- 		mmc_data->dma_rx_offset = of_data->dma_rx_offset;
diff --git a/patches.renesas/0087-rcar-dmac-fixup-descriptor-pointer-for-descriptor-mo.patch b/patches.renesas/0087-rcar-dmac-fixup-descriptor-pointer-for-descriptor-mo.patch
deleted file mode 100644
index 7832d9cea2c83e..00000000000000
--- a/patches.renesas/0087-rcar-dmac-fixup-descriptor-pointer-for-descriptor-mo.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From acd40bdff4c20d4f347a1baa9df718a9fd3a0286 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 23 May 2017 07:08:43 +0000
-Subject: [PATCH 087/286] rcar-dmac: fixup descriptor pointer for descriptor
- mode
-
-In descriptor mode, the descriptor running pointer is not maintained
-by the interrupt handler, thus, driver finds the running descriptor
-from the descriptor pointer field in the CHCRB register.
-But, CHCRB::DPTR indicates *next* descriptor pointer, not current.
-Thus, The residue calculation will be missed. This patch fixup it.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 56b177055adb246cdeca174331dbf92fc49bfccd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/dma/sh/rcar-dmac.c |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/drivers/dma/sh/rcar-dmac.c
-+++ b/drivers/dma/sh/rcar-dmac.c
-@@ -1296,6 +1296,9 @@ static unsigned int rcar_dmac_chan_get_r
- 	if (desc->hwdescs.use) {
- 		dptr = (rcar_dmac_chan_read(chan, RCAR_DMACHCRB) &
- 			RCAR_DMACHCRB_DPTR_MASK) >> RCAR_DMACHCRB_DPTR_SHIFT;
-+		if (dptr == 0)
-+			dptr = desc->nchunks;
-+		dptr--;
- 		WARN_ON(dptr >= desc->nchunks);
- 	} else {
- 		running = desc->running;
diff --git a/patches.renesas/0088-ARM-shmobile-apmu-Allow-booting-secondary-CPU-cores-.patch b/patches.renesas/0088-ARM-shmobile-apmu-Allow-booting-secondary-CPU-cores-.patch
deleted file mode 100644
index 5c971bf6a76f09..00000000000000
--- a/patches.renesas/0088-ARM-shmobile-apmu-Allow-booting-secondary-CPU-cores-.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 3cff35bc630d64b3e63a939ee91a86f80da415e9 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 5 Dec 2016 11:39:39 +0100
-Subject: [PATCH 088/255] ARM: shmobile: apmu: Allow booting secondary CPU
- cores in debug mode
-
-Now debug resource reset is handled properly, allow booting secondary
-CPU cores when hardware debug mode is enabled (MD21=1) on SoCs using the
-"renesas,apmu" enable method.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d03c8f78d03af2a46127537dd1daa67164e53c09)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/platsmp-apmu.c |   14 +-------------
- 1 file changed, 1 insertion(+), 13 deletions(-)
-
---- a/arch/arm/mach-shmobile/platsmp-apmu.c
-+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
-@@ -216,21 +216,9 @@ static void __init shmobile_smp_apmu_pre
- 	rcar_gen2_pm_init();
- }
- 
--static int shmobile_smp_apmu_boot_secondary_md21(unsigned int cpu,
--						 struct task_struct *idle)
--{
--	/* Error out when hardware debug mode is enabled */
--	if (rcar_gen2_read_mode_pins() & BIT(21)) {
--		pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
--		return -ENOTSUPP;
--	}
--
--	return shmobile_smp_apmu_boot_secondary(cpu, idle);
--}
--
- static struct smp_operations apmu_smp_ops __initdata = {
- 	.smp_prepare_cpus	= shmobile_smp_apmu_prepare_cpus_dt,
--	.smp_boot_secondary	= shmobile_smp_apmu_boot_secondary_md21,
-+	.smp_boot_secondary	= shmobile_smp_apmu_boot_secondary,
- #ifdef CONFIG_HOTPLUG_CPU
- 	.cpu_can_disable	= shmobile_smp_cpu_can_disable,
- 	.cpu_die		= shmobile_smp_apmu_cpu_die,
diff --git a/patches.renesas/0088-mmc-tmio-mmc-add-support-for-32bit-data-port.patch b/patches.renesas/0088-mmc-tmio-mmc-add-support-for-32bit-data-port.patch
deleted file mode 100644
index ea18ad3eef3d0e..00000000000000
--- a/patches.renesas/0088-mmc-tmio-mmc-add-support-for-32bit-data-port.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From d74835ce22d1293cdd58bab101f8ce72ba1c9808 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Mon, 12 Sep 2016 10:15:06 -0400
-Subject: [PATCH 088/299] mmc: tmio-mmc: add support for 32bit data port
-
-For the r7s72100 SOC, the DATA_PORT register was changed to 32-bits wide.
-Therefore a new flag has been created that will allow 32-bit reads/writes
-to the DATA_PORT register instead of 16-bit (because 16-bits accesses are
-not supported).
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 8185e51f358a8dd4801b67e8c66f03eb9eeaba75)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc.h     |   12 ++++++++++++
- drivers/mmc/host/tmio_mmc_pio.c |   30 ++++++++++++++++++++++++++++++
- include/linux/mfd/tmio.h        |    5 +++++
- 3 files changed, 47 insertions(+)
-
---- a/drivers/mmc/host/tmio_mmc.h
-+++ b/drivers/mmc/host/tmio_mmc.h
-@@ -245,6 +245,12 @@ static inline u32 sd_ctrl_read16_and_16_
- 	       readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
- }
- 
-+static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
-+		u32 *buf, int count)
-+{
-+	readsl(host->ctl + (addr << host->bus_shift), buf, count);
-+}
-+
- static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, u16 val)
- {
- 	/* If there is a hook and it returns non-zero then there
-@@ -267,4 +273,10 @@ static inline void sd_ctrl_write32_as_16
- 	writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
- }
- 
-+static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
-+		const u32 *buf, int count)
-+{
-+	writesl(host->ctl + (addr << host->bus_shift), buf, count);
-+}
-+
- #endif
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -393,6 +393,36 @@ static void tmio_mmc_transfer_data(struc
- 	/*
- 	 * Transfer the data
- 	 */
-+	if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
-+		u8 data[4] = { };
-+
-+		if (is_read)
-+			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
-+					   count >> 2);
-+		else
-+			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
-+					    count >> 2);
-+
-+		/* if count was multiple of 4 */
-+		if (!(count & 0x3))
-+			return;
-+
-+		buf8 = (u8 *)(buf + (count >> 2));
-+		count %= 4;
-+
-+		if (is_read) {
-+			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT,
-+					   (u32 *)data, 1);
-+			memcpy(buf8, data, count);
-+		} else {
-+			memcpy(data, buf8, count);
-+			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT,
-+					    (u32 *)data, 1);
-+		}
-+
-+		return;
-+	}
-+
- 	if (is_read)
- 		sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
- 	else
---- a/include/linux/mfd/tmio.h
-+++ b/include/linux/mfd/tmio.h
-@@ -100,6 +100,11 @@
- #define TMIO_MMC_SDIO_STATUS_QUIRK	(1 << 8)
- 
- /*
-+ * Some controllers have a 32-bit wide data port register
-+ */
-+#define TMIO_MMC_32BIT_DATA_PORT	(1 << 9)
-+
-+/*
-  * Some controllers allows to set SDx actual clock
-  */
- #define TMIO_MMC_CLK_ACTUAL		(1 << 10)
diff --git a/patches.renesas/0088-soc-renesas-Provide-dummy-rcar_rst_read_mode_pins-fo.patch b/patches.renesas/0088-soc-renesas-Provide-dummy-rcar_rst_read_mode_pins-fo.patch
deleted file mode 100644
index cb6751fe155c3d..00000000000000
--- a/patches.renesas/0088-soc-renesas-Provide-dummy-rcar_rst_read_mode_pins-fo.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 1b2556d563072a770f7d9efb1a175d4d9dd5bd16 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 25 Apr 2017 19:36:25 +0200
-Subject: [PATCH 088/286] soc: renesas: Provide dummy rcar_rst_read_mode_pins()
- for compile-testing
-
-If the R-Car RST driver is not included, compile-testing R-Car clock
-drivers fails with a link error:
-
-    undefined reference to `rcar_rst_read_mode_pins'
-
-To fix this, provide a dummy version.  Use the exact same test logic as
-in drivers/soc/renesas/Makefile, as there is no Kconfig symbol (yet) to
-control compilation of the R-Car RST driver.
-
-Fixes: 527c02f66d263d2e ("soc: renesas: Add R-Car RST driver")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7b4ccb3c466f62bbf2f4dd5d6a143d945a6f3051)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/linux/soc/renesas/rcar-rst.h |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/include/linux/soc/renesas/rcar-rst.h
-+++ b/include/linux/soc/renesas/rcar-rst.h
-@@ -1,6 +1,11 @@
- #ifndef __LINUX_SOC_RENESAS_RCAR_RST_H__
- #define __LINUX_SOC_RENESAS_RCAR_RST_H__
- 
-+#if defined(CONFIG_ARCH_RCAR_GEN1) || defined(CONFIG_ARCH_RCAR_GEN2) || \
-+    defined(CONFIG_ARCH_R8A7795) || defined(CONFIG_ARCH_R8A7796)
- int rcar_rst_read_mode_pins(u32 *mode);
-+#else
-+static inline int rcar_rst_read_mode_pins(u32 *mode) { return -ENODEV; }
-+#endif
- 
- #endif /* __LINUX_SOC_RENESAS_RCAR_RST_H__ */
diff --git a/patches.renesas/0089-ARM-shmobile-r8a7791-Allow-booting-secondary-CPU-cor.patch b/patches.renesas/0089-ARM-shmobile-r8a7791-Allow-booting-secondary-CPU-cor.patch
deleted file mode 100644
index 8c3decc62427f0..00000000000000
--- a/patches.renesas/0089-ARM-shmobile-r8a7791-Allow-booting-secondary-CPU-cor.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 4acd9cfff9819a1ad0fd0759a24f7da6a32be934 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 5 Dec 2016 11:39:40 +0100
-Subject: [PATCH 089/255] ARM: shmobile: r8a7791: Allow booting secondary CPU
- cores in debug mode
-
-Now debug resource reset is handled properly, allow booting secondary
-CPU cores when hardware debug mode is enabled (MD21=1, SW8-4=OFF on
-koelsch) on legacy r8a7791.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 367ed998fa3e04d8bde42f431e880cd3e5922095)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/smp-r8a7791.c |   14 +-------------
- 1 file changed, 1 insertion(+), 13 deletions(-)
-
---- a/arch/arm/mach-shmobile/smp-r8a7791.c
-+++ b/arch/arm/mach-shmobile/smp-r8a7791.c
-@@ -42,21 +42,9 @@ static void __init r8a7791_smp_prepare_c
- 	rcar_gen2_pm_init();
- }
- 
--static int r8a7791_smp_boot_secondary(unsigned int cpu,
--				      struct task_struct *idle)
--{
--	/* Error out when hardware debug mode is enabled */
--	if (rcar_gen2_read_mode_pins() & BIT(21)) {
--		pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
--		return -ENOTSUPP;
--	}
--
--	return shmobile_smp_apmu_boot_secondary(cpu, idle);
--}
--
- const struct smp_operations r8a7791_smp_ops __initconst = {
- 	.smp_prepare_cpus	= r8a7791_smp_prepare_cpus,
--	.smp_boot_secondary	= r8a7791_smp_boot_secondary,
-+	.smp_boot_secondary	= shmobile_smp_apmu_boot_secondary,
- #ifdef CONFIG_HOTPLUG_CPU
- 	.cpu_can_disable	= shmobile_smp_cpu_can_disable,
- 	.cpu_die		= shmobile_smp_apmu_cpu_die,
diff --git a/patches.renesas/0089-ASoC-rsnd-drop-useles-self-assignments.patch b/patches.renesas/0089-ASoC-rsnd-drop-useles-self-assignments.patch
deleted file mode 100644
index 83cd9d210354c6..00000000000000
--- a/patches.renesas/0089-ASoC-rsnd-drop-useles-self-assignments.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From fc91b2c92c7e301c0089745ad96a77bbdc006a03 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Mon, 20 Feb 2017 21:58:34 +0100
-Subject: [PATCH 089/286] ASoC: rsnd: drop useles self-assignments
-
-Coverity reported (CID 1397992) this self-assignment. I think the code
-stays readable even with the assignments removed.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 34157f7bec8276b4296cf2ec172fc13385ac8af7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c |    2 --
- 1 file changed, 2 deletions(-)
-
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -674,12 +674,10 @@ static int rsnd_soc_dai_set_fmt(struct s
- 	/* set clock inversion */
- 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
- 	case SND_SOC_DAIFMT_NB_IF:
--		rdai->bit_clk_inv =  rdai->bit_clk_inv;
- 		rdai->frm_clk_inv = !rdai->frm_clk_inv;
- 		break;
- 	case SND_SOC_DAIFMT_IB_NF:
- 		rdai->bit_clk_inv = !rdai->bit_clk_inv;
--		rdai->frm_clk_inv =  rdai->frm_clk_inv;
- 		break;
- 	case SND_SOC_DAIFMT_IB_IF:
- 		rdai->bit_clk_inv = !rdai->bit_clk_inv;
diff --git a/patches.renesas/0089-mmc-sh_mobile_sdhi-Add-r7s72100-support.patch b/patches.renesas/0089-mmc-sh_mobile_sdhi-Add-r7s72100-support.patch
deleted file mode 100644
index 354a4fd4493d5d..00000000000000
--- a/patches.renesas/0089-mmc-sh_mobile_sdhi-Add-r7s72100-support.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From c9918cb65013eb48d51bb2ae11661e8ac3b70424 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Mon, 12 Sep 2016 10:15:07 -0400
-Subject: [PATCH 089/299] mmc: sh_mobile_sdhi: Add r7s72100 support
-
-Add support for r7s72100 SoC.
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 0963dd56b1cf2ad2ad8553cb07e438c31e98e1af)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/mmc/tmio_mmc.txt |    1 +
- drivers/mmc/host/sh_mobile_sdhi.c                  |    7 +++++++
- 2 files changed, 8 insertions(+)
-
---- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
-+++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
-@@ -13,6 +13,7 @@ Required properties:
- - compatible:	"renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit
- 		"renesas,sdhi-sh7372" - SDHI IP on SH7372 SoC
- 		"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
-+		"renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
- 		"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
- 		"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
- 		"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -61,6 +61,12 @@ static const struct sh_mobile_sdhi_of_da
- 	.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
- };
- 
-+static const struct sh_mobile_sdhi_of_data of_rz_compatible = {
-+	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT,
-+	.tmio_ocr_mask	= MMC_VDD_32_33,
-+	.capabilities	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
-+};
-+
- static const struct sh_mobile_sdhi_of_data of_rcar_gen1_compatible = {
- 	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
- 			  TMIO_MMC_CLK_ACTUAL,
-@@ -87,6 +93,7 @@ static const struct of_device_id sh_mobi
- 	{ .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
- 	{ .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
- 	{ .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
-+	{ .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
- 	{ .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
- 	{ .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
- 	{ .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
diff --git a/patches.renesas/0090-ARM-shmobile-rcar-gen2-Remove-unused-rcar_gen2_read_.patch b/patches.renesas/0090-ARM-shmobile-rcar-gen2-Remove-unused-rcar_gen2_read_.patch
deleted file mode 100644
index a29356536492e2..00000000000000
--- a/patches.renesas/0090-ARM-shmobile-rcar-gen2-Remove-unused-rcar_gen2_read_.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 9aae041bed378e3f58a9f29a3b02f3184386d0ad Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 5 Dec 2016 11:39:41 +0100
-Subject: [PATCH 090/255] ARM: shmobile: rcar-gen2: Remove unused
- rcar_gen2_read_mode_pins()
-
-After
-  1. commit 9f5ce39ddb8f68b3 ("ARM: shmobile: rcar-gen2: Obtain extal
-     frequency from DT"),
-  2. commit 80951f04c3f92533 ("ARM: shmobile: rcar-gen2: Stop passing
-     mode pins state to clock driver"),
-  3. and handling of debug resource reset,
-there are no more users of rcar_gen2_read_mode_pins() left.
-Remove the function and its support definitions.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 70def3e53694a65c5583fb5f411491a5074bab18)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/rcar-gen2.h       |    2 --
- arch/arm/mach-shmobile/setup-rcar-gen2.c |   18 ------------------
- 2 files changed, 20 deletions(-)
-
---- a/arch/arm/mach-shmobile/rcar-gen2.h
-+++ b/arch/arm/mach-shmobile/rcar-gen2.h
-@@ -2,8 +2,6 @@
- #define __ASM_RCAR_GEN2_H__
- 
- void rcar_gen2_timer_init(void);
--#define MD(nr) BIT(nr)
--u32 rcar_gen2_read_mode_pins(void);
- void rcar_gen2_reserve(void);
- void rcar_gen2_pm_init(void);
- 
---- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
-+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
-@@ -29,24 +29,6 @@
- #include "common.h"
- #include "rcar-gen2.h"
- 
--#define MODEMR 0xe6160060
--
--u32 rcar_gen2_read_mode_pins(void)
--{
--	static u32 mode;
--	static bool mode_valid;
--
--	if (!mode_valid) {
--		void __iomem *modemr = ioremap_nocache(MODEMR, 4);
--		BUG_ON(!modemr);
--		mode = ioread32(modemr);
--		iounmap(modemr);
--		mode_valid = true;
--	}
--
--	return mode;
--}
--
- static unsigned int __init get_extal_freq(void)
- {
- 	struct device_node *cpg, *extal;
diff --git a/patches.renesas/0090-ASoC-rsnd-check-return-value-of-init-function.patch b/patches.renesas/0090-ASoC-rsnd-check-return-value-of-init-function.patch
deleted file mode 100644
index 0851c663554f65..00000000000000
--- a/patches.renesas/0090-ASoC-rsnd-check-return-value-of-init-function.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 50813a270801972fe172e06ea55fbe310fa25822 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Mon, 20 Feb 2017 22:05:07 +0100
-Subject: [PATCH 090/286] ASoC: rsnd: check return value of init function
-
-Currently, this function cannot fail for the ADG case. Still, let's
-apply defensive programming techniques to make sure we fail gracefully
-whenever rsnd_mod_init() gets extended with another failure case.
-Reported by Coverity (CID 1397893).
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 56d2c61d611a50e58dba521be1325dc90f9cc933)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/adg.c |    5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
---- a/sound/soc/sh/rcar/adg.c
-+++ b/sound/soc/sh/rcar/adg.c
-@@ -564,6 +564,7 @@ int rsnd_adg_probe(struct rsnd_priv *pri
- 	struct rsnd_adg *adg;
- 	struct device *dev = rsnd_priv_to_dev(priv);
- 	struct device_node *np = dev->of_node;
-+	int ret;
- 
- 	adg = devm_kzalloc(dev, sizeof(*adg), GFP_KERNEL);
- 	if (!adg) {
-@@ -571,8 +572,10 @@ int rsnd_adg_probe(struct rsnd_priv *pri
- 		return -ENOMEM;
- 	}
- 
--	rsnd_mod_init(priv, &adg->mod, &adg_ops,
-+	ret = rsnd_mod_init(priv, &adg->mod, &adg_ops,
- 		      NULL, NULL, 0, 0);
-+	if (ret)
-+		return ret;
- 
- 	rsnd_adg_get_clkin(priv, adg);
- 	rsnd_adg_get_clkout(priv, adg);
diff --git a/patches.renesas/0090-spi-sh-msiof-Add-support-for-R-Car-M3-W.patch b/patches.renesas/0090-spi-sh-msiof-Add-support-for-R-Car-M3-W.patch
deleted file mode 100644
index cadc34afc1445b..00000000000000
--- a/patches.renesas/0090-spi-sh-msiof-Add-support-for-R-Car-M3-W.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From f6a9f258b5f8d73fb11ff1cde12aaa8a91a14d98 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 21 Nov 2016 18:24:55 +0100
-Subject: [PATCH 090/299] spi: sh-msiof: Add support for R-Car M3-W
-
-MSIOF in R-Car M3-W (r8a7796) is handled fine by the existing driver.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit eb51cffa743de5c78cfbf44f576b0f1eccc784f4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/spi/sh-msiof.txt |    1 +
- drivers/spi/spi-sh-msiof.c                         |    1 +
- 2 files changed, 2 insertions(+)
-
---- a/Documentation/devicetree/bindings/spi/sh-msiof.txt
-+++ b/Documentation/devicetree/bindings/spi/sh-msiof.txt
-@@ -10,6 +10,7 @@ Required properties:
- 			 "renesas,msiof-r8a7792" (R-Car V2H)
- 			 "renesas,msiof-r8a7793" (R-Car M2-N)
- 			 "renesas,msiof-r8a7794" (R-Car E2)
-+			 "renesas,msiof-r8a7796" (R-Car M3-W)
- 			 "renesas,msiof-sh73a0" (SH-Mobile AG5)
- - reg                  : A list of offsets and lengths of the register sets for
- 			 the device.
---- a/drivers/spi/spi-sh-msiof.c
-+++ b/drivers/spi/spi-sh-msiof.c
-@@ -980,6 +980,7 @@ static const struct of_device_id sh_msio
- 	{ .compatible = "renesas,msiof-r8a7792",   .data = &r8a779x_data },
- 	{ .compatible = "renesas,msiof-r8a7793",   .data = &r8a779x_data },
- 	{ .compatible = "renesas,msiof-r8a7794",   .data = &r8a779x_data },
-+	{ .compatible = "renesas,msiof-r8a7796",   .data = &r8a779x_data },
- 	{},
- };
- MODULE_DEVICE_TABLE(of, sh_msiof_match);
diff --git a/patches.renesas/0091-ARM-dts-r8a7779-marzen-Fix-sata-device-status.patch b/patches.renesas/0091-ARM-dts-r8a7779-marzen-Fix-sata-device-status.patch
deleted file mode 100644
index ff7e19ab3255dd..00000000000000
--- a/patches.renesas/0091-ARM-dts-r8a7779-marzen-Fix-sata-device-status.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 7030bfbcc59fb0c891c85cf1da755ca8643bc00c Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 16 Jan 2017 17:56:53 +0100
-Subject: [PATCH 091/255] ARM: dts: r8a7779, marzen: Fix sata device status
-
-Device nodes representing I/O devices should be marked disabled in the
-SoC-specific DTS, and overridden by board-specific DTSes where needed.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e8aa6811ca9547bc82baa6ed44c38dde01fb0d86)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779-marzen.dts |    4 ++++
- arch/arm/boot/dts/r8a7779.dtsi       |    1 +
- 2 files changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7779-marzen.dts
-+++ b/arch/arm/boot/dts/r8a7779-marzen.dts
-@@ -216,6 +216,10 @@
- 	};
- };
- 
-+&sata {
-+	status = "okay";
-+};
-+
- &scif2 {
- 	pinctrl-0 = <&scif2_pins>;
- 	pinctrl-names = "default";
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -347,6 +347,7 @@
- 		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp1_clks R8A7779_CLK_SATA>;
- 		power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
-+		status = "disabled";
- 	};
- 
- 	sdhi0: sd@ffe4c000 {
diff --git a/patches.renesas/0091-ASoC-rcar-enable-PCM-RATE-untile-192000.patch b/patches.renesas/0091-ASoC-rcar-enable-PCM-RATE-untile-192000.patch
deleted file mode 100644
index 507d57791b592c..00000000000000
--- a/patches.renesas/0091-ASoC-rcar-enable-PCM-RATE-untile-192000.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 252ca21bffaf817c340f53af3339ef879147e0c0 Mon Sep 17 00:00:00 2001
-From: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
-Date: Wed, 22 Mar 2017 05:43:35 +0000
-Subject: [PATCH 091/286] ASoC: rcar: enable PCM RATE untile 192000
-
-R-Car sound can handle untile 192000 rate.
-
-Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit dc2721564f6da549f6eb29ac5bca28d65beadcb7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -96,7 +96,7 @@
- #include <linux/pm_runtime.h>
- #include "rsnd.h"
- 
--#define RSND_RATES SNDRV_PCM_RATE_8000_96000
-+#define RSND_RATES SNDRV_PCM_RATE_8000_192000
- #define RSND_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
- 
- static const struct of_device_id rsnd_of_match[] = {
diff --git a/patches.renesas/0091-spi-sh-msiof-Add-R-Car-Gen-2-and-3-fallback-bindings.patch b/patches.renesas/0091-spi-sh-msiof-Add-R-Car-Gen-2-and-3-fallback-bindings.patch
deleted file mode 100644
index 4dcc82e4d1122a..00000000000000
--- a/patches.renesas/0091-spi-sh-msiof-Add-R-Car-Gen-2-and-3-fallback-bindings.patch
+++ /dev/null
@@ -1,95 +0,0 @@
-From 79424266f7ace0f0972d66393fe0bb55abae6ceb Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Mon, 12 Dec 2016 10:49:35 +0100
-Subject: [PATCH 091/299] spi: sh-msiof: Add R-Car Gen 2 and 3 fallback
- bindings
-
-In the case of Renesas R-Car hardware we know that there are generations of
-SoCs, e.g. Gen 2 and Gen 3. But beyond that it's not clear what the
-relationship between IP blocks might be. For example, I believe that
-r8a7790 is older than r8a7791 but that doesn't imply that the latter is a
-descendant of the former or vice versa.
-
-We can, however, by examining the documentation and behaviour of the
-hardware at run-time observe that the current driver implementation appears
-to be compatible with the IP blocks on SoCs within a given generation.
-
-For the above reasons and convenience when enabling new SoCs a
-per-generation fallback compatibility string scheme is being adopted for
-drivers for Renesas SoCs.
-
-Also:
-* Deprecate renesas,sh-msiof. It seems poorly named as it is only
-  compatible with SH-Mobile. It also appears unused in mainline.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 4286db8456f4fa0c6af2b6b9abc5991a7e7da69c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/spi/sh-msiof.txt |   19 +++++++++++++------
- drivers/spi/spi-sh-msiof.c                         |    4 +++-
- 2 files changed, 16 insertions(+), 7 deletions(-)
-
---- a/Documentation/devicetree/bindings/spi/sh-msiof.txt
-+++ b/Documentation/devicetree/bindings/spi/sh-msiof.txt
-@@ -1,17 +1,23 @@
- Renesas MSIOF spi controller
- 
- Required properties:
--- compatible           : "renesas,msiof-<soctype>" for SoCs,
--			 "renesas,sh-msiof" for SuperH, or
--			 "renesas,sh-mobile-msiof" for SH Mobile series.
--			 Examples with soctypes are:
--			 "renesas,msiof-r8a7790" (R-Car H2)
-+- compatible           : "renesas,msiof-r8a7790" (R-Car H2)
- 			 "renesas,msiof-r8a7791" (R-Car M2-W)
- 			 "renesas,msiof-r8a7792" (R-Car V2H)
- 			 "renesas,msiof-r8a7793" (R-Car M2-N)
- 			 "renesas,msiof-r8a7794" (R-Car E2)
- 			 "renesas,msiof-r8a7796" (R-Car M3-W)
- 			 "renesas,msiof-sh73a0" (SH-Mobile AG5)
-+			 "renesas,sh-mobile-msiof" (generic SH-Mobile compatibile device)
-+			 "renesas,rcar-gen2-msiof" (generic R-Car Gen2 compatible device)
-+			 "renesas,rcar-gen3-msiof" (generic R-Car Gen3 compatible device)
-+			 "renesas,sh-msiof"      (deprecated)
-+
-+			 When compatible with the generic version, nodes
-+			 must list the SoC-specific version corresponding
-+			 to the platform first followed by the generic
-+			 version.
-+
- - reg                  : A list of offsets and lengths of the register sets for
- 			 the device.
- 			 If only one register set is present, it is to be used
-@@ -61,7 +67,8 @@ Documentation/devicetree/bindings/pinctr
- Example:
- 
- 	msiof0: spi@e6e20000 {
--		compatible = "renesas,msiof-r8a7791";
-+		compatible = "renesas,msiof-r8a7791",
-+			     "renesas,rcar-gen2-msiof";
- 		reg = <0 0xe6e20000 0 0x0064>;
- 		interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
---- a/drivers/spi/spi-sh-msiof.c
-+++ b/drivers/spi/spi-sh-msiof.c
-@@ -973,14 +973,16 @@ static const struct sh_msiof_chipdata r8
- };
- 
- static const struct of_device_id sh_msiof_match[] = {
--	{ .compatible = "renesas,sh-msiof",        .data = &sh_data },
- 	{ .compatible = "renesas,sh-mobile-msiof", .data = &sh_data },
- 	{ .compatible = "renesas,msiof-r8a7790",   .data = &r8a779x_data },
- 	{ .compatible = "renesas,msiof-r8a7791",   .data = &r8a779x_data },
- 	{ .compatible = "renesas,msiof-r8a7792",   .data = &r8a779x_data },
- 	{ .compatible = "renesas,msiof-r8a7793",   .data = &r8a779x_data },
- 	{ .compatible = "renesas,msiof-r8a7794",   .data = &r8a779x_data },
-+	{ .compatible = "renesas,rcar-gen2-msiof", .data = &r8a779x_data },
- 	{ .compatible = "renesas,msiof-r8a7796",   .data = &r8a779x_data },
-+	{ .compatible = "renesas,rcar-gen3-msiof", .data = &r8a779x_data },
-+	{ .compatible = "renesas,sh-msiof",        .data = &sh_data }, // Deprecated
- 	{},
- };
- MODULE_DEVICE_TABLE(of, sh_msiof_match);
diff --git a/patches.renesas/0092-ARM-dts-r8a7743-Link-ARM-GIC-to-clock-and-clock-doma.patch b/patches.renesas/0092-ARM-dts-r8a7743-Link-ARM-GIC-to-clock-and-clock-doma.patch
deleted file mode 100644
index c0d6e112353d82..00000000000000
--- a/patches.renesas/0092-ARM-dts-r8a7743-Link-ARM-GIC-to-clock-and-clock-doma.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 857bf66c19ef49738c8d960ed14ab01d2439c76a Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 17 Jan 2017 13:49:17 +0100
-Subject: [PATCH 092/255] ARM: dts: r8a7743: Link ARM GIC to clock and clock
- domain
-
-Link the ARM GIC to the INTC-SYS module clock, and add it to the SYSC
-"always-on" PM Domain, so it can be power managed using that clock.
-
-Note that currently the GIC-400 driver doesn't support module clocks nor
-Runtime PM, so this must be handled as a critical clock.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7add1da17ac8d5c4a2ecc967843ca5b55ce35fa6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7743.dtsi |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7743.dtsi
-+++ b/arch/arm/boot/dts/r8a7743.dtsi
-@@ -60,6 +60,9 @@
- 			      <0 0xf1006000 0 0x2000>;
- 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
- 						 IRQ_TYPE_LEVEL_HIGH)>;
-+			clocks = <&cpg CPG_MOD 408>;
-+			clock-names = "clk";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- 		};
- 
- 		irqc: interrupt-controller@e61c0000 {
diff --git a/patches.renesas/0092-ASoC-rcar-ssi-don-t-set-SSICR.CKDV-000-with-SSIWSR.C.patch b/patches.renesas/0092-ASoC-rcar-ssi-don-t-set-SSICR.CKDV-000-with-SSIWSR.C.patch
deleted file mode 100644
index 3ba05b1b5b1458..00000000000000
--- a/patches.renesas/0092-ASoC-rcar-ssi-don-t-set-SSICR.CKDV-000-with-SSIWSR.C.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 30441b6767296017619be3dab7e658c204d526ab Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 22 Mar 2017 04:02:43 +0000
-Subject: [PATCH 092/286] ASoC: rcar: ssi: don't set SSICR.CKDV = 000 with
- SSIWSR.CONT
-
-R-Car Datasheet is indicating "SSICR.CKDV = 000 is invalid when
-SSIWSR.WS_MODE = 1 or SSIWSR.CONT = 1".
-Current driver will set CONT, thus, we shouldn't use CKDV = 000.
-This patch fixup it.
-
-Reported-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 6b8530cc056efd4a11b034ca5b1e9f7e9563f553)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/ssi.c |    9 +++++++++
- 1 file changed, 9 insertions(+)
-
---- a/sound/soc/sh/rcar/ssi.c
-+++ b/sound/soc/sh/rcar/ssi.c
-@@ -242,6 +242,15 @@ static int rsnd_ssi_master_clk_start(str
- 			continue;
- 
- 		/*
-+		 * It will set SSIWSR.CONT here, but SSICR.CKDV = 000
-+		 * with it is not allowed. (SSIWSR.WS_MODE with
-+		 * SSICR.CKDV = 000 is not allowed either).
-+		 * Skip it. See SSICR.CKDV
-+		 */
-+		if (j == 0)
-+			continue;
-+
-+		/*
- 		 * this driver is assuming that
- 		 * system word is 32bit x chan
- 		 * see rsnd_ssi_init()
diff --git a/patches.renesas/0092-spi-sh-msiof-Do-not-use-C-style-comment.patch b/patches.renesas/0092-spi-sh-msiof-Do-not-use-C-style-comment.patch
deleted file mode 100644
index 609e7eb38fd955..00000000000000
--- a/patches.renesas/0092-spi-sh-msiof-Do-not-use-C-style-comment.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 8f418b9a8f03f29ef24185fc1639255f8673b807 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 20 Dec 2016 11:21:16 +0100
-Subject: [PATCH 092/299] spi: sh-msiof: Do not use C++ style comment
-
-4286db8456f4 ("spi: sh-msiof: Add R-Car Gen 2 and 3 fallback bindings")
-added a C++ style comment. This is not in keeping with the style used
-for comments elsewhere in this fine. Update it accordingly.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 264c3e8de4fbda1d1342213c78fb3788a43cfd41)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/spi-sh-msiof.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/spi/spi-sh-msiof.c
-+++ b/drivers/spi/spi-sh-msiof.c
-@@ -982,7 +982,7 @@ static const struct of_device_id sh_msio
- 	{ .compatible = "renesas,rcar-gen2-msiof", .data = &r8a779x_data },
- 	{ .compatible = "renesas,msiof-r8a7796",   .data = &r8a779x_data },
- 	{ .compatible = "renesas,rcar-gen3-msiof", .data = &r8a779x_data },
--	{ .compatible = "renesas,sh-msiof",        .data = &sh_data }, // Deprecated
-+	{ .compatible = "renesas,sh-msiof",        .data = &sh_data }, /* Deprecated */
- 	{},
- };
- MODULE_DEVICE_TABLE(of, sh_msiof_match);
diff --git a/patches.renesas/0093-ARM-dts-r8a7745-Link-ARM-GIC-to-clock-and-clock-doma.patch b/patches.renesas/0093-ARM-dts-r8a7745-Link-ARM-GIC-to-clock-and-clock-doma.patch
deleted file mode 100644
index 7c5827508976b8..00000000000000
--- a/patches.renesas/0093-ARM-dts-r8a7745-Link-ARM-GIC-to-clock-and-clock-doma.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 89b2bf953de2edb3b6c8a2e20cfe763181960b3d Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 17 Jan 2017 13:49:18 +0100
-Subject: [PATCH 093/255] ARM: dts: r8a7745: Link ARM GIC to clock and clock
- domain
-
-Link the ARM GIC to the INTC-SYS module clock, and add it to the SYSC
-"always-on" PM Domain, so it can be power managed using that clock.
-
-Note that currently the GIC-400 driver doesn't support module clocks nor
-Runtime PM, so this must be handled as a critical clock.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit db017f399639f68827edc954205803272ef20b24)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7745.dtsi |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7745.dtsi
-+++ b/arch/arm/boot/dts/r8a7745.dtsi
-@@ -60,6 +60,9 @@
- 			      <0 0xf1006000 0 0x2000>;
- 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
- 						 IRQ_TYPE_LEVEL_HIGH)>;
-+			clocks = <&cpg CPG_MOD 408>;
-+			clock-names = "clk";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
- 		};
- 
- 		irqc: interrupt-controller@e61c0000 {
diff --git a/patches.renesas/0093-ASoC-rcar-remove-rsnd_kctrl_remove.patch b/patches.renesas/0093-ASoC-rcar-remove-rsnd_kctrl_remove.patch
deleted file mode 100644
index 2ed082f7afcfaa..00000000000000
--- a/patches.renesas/0093-ASoC-rcar-remove-rsnd_kctrl_remove.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From 4af6bb2bc9279f9acb617ae18c3d57d98ec59bc7 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 28 Mar 2017 02:31:23 +0000
-Subject: [PATCH 093/286] ASoC: rcar: remove rsnd_kctrl_remove()
-
-Current rcar driver is trying to remove kctrl when remove time.
-But, 1) rcar driver can't/shouldn't remove before removing sound
-card driver, 2) sound card driver will call snd_ctl_dev_free()
-and removes all kctrls by snd_ctl_remove().
-Thus, rsnd_kctrl_remove() is not necessary. Current implementation
-will get Oops when removing rcar driver after sound card.
-This patch fix this issue.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit e0c4211854bfebd5507761a2bfddaa9e37074230)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c |    9 ---------
- sound/soc/sh/rcar/dvc.c  |   16 ----------------
- sound/soc/sh/rcar/rsnd.h |    3 ---
- 3 files changed, 28 deletions(-)
-
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -1037,15 +1037,6 @@ static int __rsnd_kctrl_new(struct rsnd_
- 	return 0;
- }
- 
--void _rsnd_kctrl_remove(struct rsnd_kctrl_cfg *cfg)
--{
--	if (cfg->card && cfg->kctrl)
--		snd_ctl_remove(cfg->card, cfg->kctrl);
--
--	cfg->card = NULL;
--	cfg->kctrl = NULL;
--}
--
- int rsnd_kctrl_new_m(struct rsnd_mod *mod,
- 		     struct rsnd_dai_stream *io,
- 		     struct snd_soc_pcm_runtime *rtd,
---- a/sound/soc/sh/rcar/dvc.c
-+++ b/sound/soc/sh/rcar/dvc.c
-@@ -218,21 +218,6 @@ static int rsnd_dvc_probe_(struct rsnd_m
- 	return rsnd_cmd_attach(io, rsnd_mod_id(mod));
- }
- 
--static int rsnd_dvc_remove_(struct rsnd_mod *mod,
--			    struct rsnd_dai_stream *io,
--			    struct rsnd_priv *priv)
--{
--	struct rsnd_dvc *dvc = rsnd_mod_to_dvc(mod);
--
--	rsnd_kctrl_remove(dvc->volume);
--	rsnd_kctrl_remove(dvc->mute);
--	rsnd_kctrl_remove(dvc->ren);
--	rsnd_kctrl_remove(dvc->rup);
--	rsnd_kctrl_remove(dvc->rdown);
--
--	return 0;
--}
--
- static int rsnd_dvc_init(struct rsnd_mod *mod,
- 			 struct rsnd_dai_stream *io,
- 			 struct rsnd_priv *priv)
-@@ -332,7 +317,6 @@ static struct rsnd_mod_ops rsnd_dvc_ops
- 	.name		= DVC_NAME,
- 	.dma_req	= rsnd_dvc_dma_req,
- 	.probe		= rsnd_dvc_probe_,
--	.remove		= rsnd_dvc_remove_,
- 	.init		= rsnd_dvc_init,
- 	.quit		= rsnd_dvc_quit,
- 	.pcm_new	= rsnd_dvc_pcm_new,
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -611,9 +611,6 @@ struct rsnd_kctrl_cfg_s {
- 	u32 val;
- };
- 
--void _rsnd_kctrl_remove(struct rsnd_kctrl_cfg *cfg);
--#define rsnd_kctrl_remove(_cfg)	_rsnd_kctrl_remove(&((_cfg).cfg))
--
- int rsnd_kctrl_new_m(struct rsnd_mod *mod,
- 		     struct rsnd_dai_stream *io,
- 		     struct snd_soc_pcm_runtime *rtd,
diff --git a/patches.renesas/0093-pinctrl-sh-pfc-r8a7796-Add-I2C-pin-support.patch b/patches.renesas/0093-pinctrl-sh-pfc-r8a7796-Add-I2C-pin-support.patch
deleted file mode 100644
index 39015f3461f168..00000000000000
--- a/patches.renesas/0093-pinctrl-sh-pfc-r8a7796-Add-I2C-pin-support.patch
+++ /dev/null
@@ -1,120 +0,0 @@
-From 20f2d83a6f6ff587465f047f114a4b102616f64a Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Wed, 14 Sep 2016 18:46:08 +0200
-Subject: [PATCH 093/299] pinctrl: sh-pfc: r8a7796: Add I2C pin support
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 02609a2335fd21c34288ef2ab532a0c2e9f20b6a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7796.c |   77 +++++++++++++++++++++++++++++++++++
- 1 file changed, 77 insertions(+)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-@@ -1490,6 +1490,57 @@ static const struct sh_pfc_pin pinmux_pi
- 	PINMUX_GPIO_GP_ALL(),
- };
- 
-+/* - I2C -------------------------------------------------------------------- */
-+static const unsigned int i2c1_a_pins[] = {
-+	/* SDA, SCL */
-+	RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10),
-+};
-+static const unsigned int i2c1_a_mux[] = {
-+	SDA1_A_MARK, SCL1_A_MARK,
-+};
-+static const unsigned int i2c1_b_pins[] = {
-+	/* SDA, SCL */
-+	RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 23),
-+};
-+static const unsigned int i2c1_b_mux[] = {
-+	SDA1_B_MARK, SCL1_B_MARK,
-+};
-+static const unsigned int i2c2_a_pins[] = {
-+	/* SDA, SCL */
-+	RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4),
-+};
-+static const unsigned int i2c2_a_mux[] = {
-+	SDA2_A_MARK, SCL2_A_MARK,
-+};
-+static const unsigned int i2c2_b_pins[] = {
-+	/* SDA, SCL */
-+	RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 12),
-+};
-+static const unsigned int i2c2_b_mux[] = {
-+	SDA2_B_MARK, SCL2_B_MARK,
-+};
-+static const unsigned int i2c6_a_pins[] = {
-+	/* SDA, SCL */
-+	RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
-+};
-+static const unsigned int i2c6_a_mux[] = {
-+	SDA6_A_MARK, SCL6_A_MARK,
-+};
-+static const unsigned int i2c6_b_pins[] = {
-+	/* SDA, SCL */
-+	RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
-+};
-+static const unsigned int i2c6_b_mux[] = {
-+	SDA6_B_MARK, SCL6_B_MARK,
-+};
-+static const unsigned int i2c6_c_pins[] = {
-+	/* SDA, SCL */
-+	RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14),
-+};
-+static const unsigned int i2c6_c_mux[] = {
-+	SDA6_C_MARK, SCL6_C_MARK,
-+};
-+
- /* - SCIF0 ------------------------------------------------------------------ */
- static const unsigned int scif0_data_pins[] = {
- 	/* RX, TX */
-@@ -1912,6 +1963,13 @@ static const unsigned int sdhi3_ds_mux[]
- };
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
-+	SH_PFC_PIN_GROUP(i2c1_a),
-+	SH_PFC_PIN_GROUP(i2c1_b),
-+	SH_PFC_PIN_GROUP(i2c2_a),
-+	SH_PFC_PIN_GROUP(i2c2_b),
-+	SH_PFC_PIN_GROUP(i2c6_a),
-+	SH_PFC_PIN_GROUP(i2c6_b),
-+	SH_PFC_PIN_GROUP(i2c6_c),
- 	SH_PFC_PIN_GROUP(scif0_data),
- 	SH_PFC_PIN_GROUP(scif0_clk),
- 	SH_PFC_PIN_GROUP(scif0_ctrl),
-@@ -1969,6 +2027,22 @@ static const struct sh_pfc_pin_group pin
- 	SH_PFC_PIN_GROUP(sdhi3_ds),
- };
- 
-+static const char * const i2c1_groups[] = {
-+	"i2c1_a",
-+	"i2c1_b",
-+};
-+
-+static const char * const i2c2_groups[] = {
-+	"i2c2_a",
-+	"i2c2_b",
-+};
-+
-+static const char * const i2c6_groups[] = {
-+	"i2c6_a",
-+	"i2c6_b",
-+	"i2c6_c",
-+};
-+
- static const char * const scif0_groups[] = {
- 	"scif0_data",
- 	"scif0_clk",
-@@ -2058,6 +2132,9 @@ static const char * const sdhi3_groups[]
- };
- 
- static const struct sh_pfc_function pinmux_functions[] = {
-+	SH_PFC_FUNCTION(i2c1),
-+	SH_PFC_FUNCTION(i2c2),
-+	SH_PFC_FUNCTION(i2c6),
- 	SH_PFC_FUNCTION(scif0),
- 	SH_PFC_FUNCTION(scif1),
- 	SH_PFC_FUNCTION(scif2),
diff --git a/patches.renesas/0094-ARM-dts-r7s72100-add-ostm-to-device-tree.patch b/patches.renesas/0094-ARM-dts-r7s72100-add-ostm-to-device-tree.patch
deleted file mode 100644
index b68aeaf1d12638..00000000000000
--- a/patches.renesas/0094-ARM-dts-r7s72100-add-ostm-to-device-tree.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From ed99342207c376ac3b4fbd5239160f2634e24ced Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Mon, 23 Jan 2017 08:55:19 -0500
-Subject: [PATCH 094/255] ARM: dts: r7s72100: add ostm to device tree
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 69b5c6dceaa138859f03ca20e3adca7ddec6bae7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100.dtsi |   18 ++++++++++++++++++
- 1 file changed, 18 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100.dtsi
-+++ b/arch/arm/boot/dts/r7s72100.dtsi
-@@ -505,4 +505,22 @@
- 		cap-sdio-irq;
- 		status = "disabled";
- 	};
-+
-+	ostm0: timer@fcfec000 {
-+		compatible = "renesas,r7s72100-ostm", "renesas,ostm";
-+		reg = <0xfcfec000 0x30>;
-+		interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;
-+		clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;
-+		power-domains = <&cpg_clocks>;
-+		status = "disabled";
-+	};
-+
-+	ostm1: timer@fcfec400 {
-+		compatible = "renesas,r7s72100-ostm", "renesas,ostm";
-+		reg = <0xfcfec400 0x30>;
-+		interrupts = <GIC_SPI 103 IRQ_TYPE_EDGE_RISING>;
-+		clocks = <&mstp5_clks R7S72100_CLK_OSTM1>;
-+		power-domains = <&cpg_clocks>;
-+		status = "disabled";
-+	};
- };
diff --git a/patches.renesas/0094-ASoC-rcar-fixup-of_clk_add_provider-usage-for-multi-.patch b/patches.renesas/0094-ASoC-rcar-fixup-of_clk_add_provider-usage-for-multi-.patch
deleted file mode 100644
index 665245a13b9cda..00000000000000
--- a/patches.renesas/0094-ASoC-rcar-fixup-of_clk_add_provider-usage-for-multi-.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 420dadd1d49dc0e4a8d32543cc5c5495205350e8 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 30 Mar 2017 01:49:06 +0000
-Subject: [PATCH 094/286] ASoC: rcar: fixup of_clk_add_provider() usage for
- multi clkout
-
-Current adg is calling of_clk_add_povider() multiple times,
-but it is not correct usage. This patch fixup its parameter
-and call it once.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit d7f298197a22f11b38059f257842dac7c30a564c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/adg.c |   14 ++++++--------
- 1 file changed, 6 insertions(+), 8 deletions(-)
-
---- a/sound/soc/sh/rcar/adg.c
-+++ b/sound/soc/sh/rcar/adg.c
-@@ -537,16 +537,14 @@ static void rsnd_adg_get_clkout(struct r
- 			clk = clk_register_fixed_rate(dev, clkout_name[i],
- 						      parent_clk_name, 0,
- 						      req_rate);
--			if (!IS_ERR(clk)) {
--				adg->onecell.clks	= adg->clkout;
--				adg->onecell.clk_num	= CLKOUTMAX;
--
-+			adg->clkout[i] = ERR_PTR(-ENOENT);
-+			if (!IS_ERR(clk))
- 				adg->clkout[i] = clk;
--
--				of_clk_add_provider(np, of_clk_src_onecell_get,
--						    &adg->onecell);
--			}
- 		}
-+		adg->onecell.clks	= adg->clkout;
-+		adg->onecell.clk_num	= CLKOUTMAX;
-+		of_clk_add_provider(np, of_clk_src_onecell_get,
-+				    &adg->onecell);
- 	}
- 
- 	adg->ckr = ckr;
diff --git a/patches.renesas/0094-pinctrl-sh-pfc-r8a7796-Add-DRIF-support.patch b/patches.renesas/0094-pinctrl-sh-pfc-r8a7796-Add-DRIF-support.patch
deleted file mode 100644
index 02129e43d70c6e..00000000000000
--- a/patches.renesas/0094-pinctrl-sh-pfc-r8a7796-Add-DRIF-support.patch
+++ /dev/null
@@ -1,336 +0,0 @@
-From 83fae191e06ed9623195939adbe40a2cde6fd9cb Mon Sep 17 00:00:00 2001
-From: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
-Date: Thu, 13 Oct 2016 10:29:14 +0100
-Subject: [PATCH 094/299] pinctrl: sh-pfc: r8a7796: Add DRIF support
-
-This patch adds DRIF[0-3] pinmux support for r8a7796 SoC.
-
-Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit fb0828316bf655d26c74321240bbf83b2a1d89ad)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7796.c |  291 +++++++++++++++++++++++++++++++++++
- 1 file changed, 291 insertions(+)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-@@ -1490,6 +1490,221 @@ static const struct sh_pfc_pin pinmux_pi
- 	PINMUX_GPIO_GP_ALL(),
- };
- 
-+/* - DRIF0 --------------------------------------------------------------- */
-+static const unsigned int drif0_ctrl_a_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
-+};
-+static const unsigned int drif0_ctrl_a_mux[] = {
-+	RIF0_CLK_A_MARK, RIF0_SYNC_A_MARK,
-+};
-+static const unsigned int drif0_data0_a_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(6, 10),
-+};
-+static const unsigned int drif0_data0_a_mux[] = {
-+	RIF0_D0_A_MARK,
-+};
-+static const unsigned int drif0_data1_a_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(6, 7),
-+};
-+static const unsigned int drif0_data1_a_mux[] = {
-+	RIF0_D1_A_MARK,
-+};
-+static const unsigned int drif0_ctrl_b_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4),
-+};
-+static const unsigned int drif0_ctrl_b_mux[] = {
-+	RIF0_CLK_B_MARK, RIF0_SYNC_B_MARK,
-+};
-+static const unsigned int drif0_data0_b_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(5, 1),
-+};
-+static const unsigned int drif0_data0_b_mux[] = {
-+	RIF0_D0_B_MARK,
-+};
-+static const unsigned int drif0_data1_b_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(5, 2),
-+};
-+static const unsigned int drif0_data1_b_mux[] = {
-+	RIF0_D1_B_MARK,
-+};
-+static const unsigned int drif0_ctrl_c_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 15),
-+};
-+static const unsigned int drif0_ctrl_c_mux[] = {
-+	RIF0_CLK_C_MARK, RIF0_SYNC_C_MARK,
-+};
-+static const unsigned int drif0_data0_c_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(5, 13),
-+};
-+static const unsigned int drif0_data0_c_mux[] = {
-+	RIF0_D0_C_MARK,
-+};
-+static const unsigned int drif0_data1_c_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(5, 14),
-+};
-+static const unsigned int drif0_data1_c_mux[] = {
-+	RIF0_D1_C_MARK,
-+};
-+/* - DRIF1 --------------------------------------------------------------- */
-+static const unsigned int drif1_ctrl_a_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
-+};
-+static const unsigned int drif1_ctrl_a_mux[] = {
-+	RIF1_CLK_A_MARK, RIF1_SYNC_A_MARK,
-+};
-+static const unsigned int drif1_data0_a_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(6, 19),
-+};
-+static const unsigned int drif1_data0_a_mux[] = {
-+	RIF1_D0_A_MARK,
-+};
-+static const unsigned int drif1_data1_a_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(6, 20),
-+};
-+static const unsigned int drif1_data1_a_mux[] = {
-+	RIF1_D1_A_MARK,
-+};
-+static const unsigned int drif1_ctrl_b_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 3),
-+};
-+static const unsigned int drif1_ctrl_b_mux[] = {
-+	RIF1_CLK_B_MARK, RIF1_SYNC_B_MARK,
-+};
-+static const unsigned int drif1_data0_b_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(5, 7),
-+};
-+static const unsigned int drif1_data0_b_mux[] = {
-+	RIF1_D0_B_MARK,
-+};
-+static const unsigned int drif1_data1_b_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(5, 8),
-+};
-+static const unsigned int drif1_data1_b_mux[] = {
-+	RIF1_D1_B_MARK,
-+};
-+static const unsigned int drif1_ctrl_c_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11),
-+};
-+static const unsigned int drif1_ctrl_c_mux[] = {
-+	RIF1_CLK_C_MARK, RIF1_SYNC_C_MARK,
-+};
-+static const unsigned int drif1_data0_c_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(5, 6),
-+};
-+static const unsigned int drif1_data0_c_mux[] = {
-+	RIF1_D0_C_MARK,
-+};
-+static const unsigned int drif1_data1_c_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(5, 10),
-+};
-+static const unsigned int drif1_data1_c_mux[] = {
-+	RIF1_D1_C_MARK,
-+};
-+/* - DRIF2 --------------------------------------------------------------- */
-+static const unsigned int drif2_ctrl_a_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
-+};
-+static const unsigned int drif2_ctrl_a_mux[] = {
-+	RIF2_CLK_A_MARK, RIF2_SYNC_A_MARK,
-+};
-+static const unsigned int drif2_data0_a_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(6, 7),
-+};
-+static const unsigned int drif2_data0_a_mux[] = {
-+	RIF2_D0_A_MARK,
-+};
-+static const unsigned int drif2_data1_a_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(6, 10),
-+};
-+static const unsigned int drif2_data1_a_mux[] = {
-+	RIF2_D1_A_MARK,
-+};
-+static const unsigned int drif2_ctrl_b_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),
-+};
-+static const unsigned int drif2_ctrl_b_mux[] = {
-+	RIF2_CLK_B_MARK, RIF2_SYNC_B_MARK,
-+};
-+static const unsigned int drif2_data0_b_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(6, 30),
-+};
-+static const unsigned int drif2_data0_b_mux[] = {
-+	RIF2_D0_B_MARK,
-+};
-+static const unsigned int drif2_data1_b_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(6, 31),
-+};
-+static const unsigned int drif2_data1_b_mux[] = {
-+	RIF2_D1_B_MARK,
-+};
-+/* - DRIF3 --------------------------------------------------------------- */
-+static const unsigned int drif3_ctrl_a_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
-+};
-+static const unsigned int drif3_ctrl_a_mux[] = {
-+	RIF3_CLK_A_MARK, RIF3_SYNC_A_MARK,
-+};
-+static const unsigned int drif3_data0_a_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(6, 19),
-+};
-+static const unsigned int drif3_data0_a_mux[] = {
-+	RIF3_D0_A_MARK,
-+};
-+static const unsigned int drif3_data1_a_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(6, 20),
-+};
-+static const unsigned int drif3_data1_a_mux[] = {
-+	RIF3_D1_A_MARK,
-+};
-+static const unsigned int drif3_ctrl_b_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25),
-+};
-+static const unsigned int drif3_ctrl_b_mux[] = {
-+	RIF3_CLK_B_MARK, RIF3_SYNC_B_MARK,
-+};
-+static const unsigned int drif3_data0_b_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(6, 28),
-+};
-+static const unsigned int drif3_data0_b_mux[] = {
-+	RIF3_D0_B_MARK,
-+};
-+static const unsigned int drif3_data1_b_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(6, 29),
-+};
-+static const unsigned int drif3_data1_b_mux[] = {
-+	RIF3_D1_B_MARK,
-+};
-+
- /* - I2C -------------------------------------------------------------------- */
- static const unsigned int i2c1_a_pins[] = {
- 	/* SDA, SCL */
-@@ -1963,6 +2178,36 @@ static const unsigned int sdhi3_ds_mux[]
- };
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
-+	SH_PFC_PIN_GROUP(drif0_ctrl_a),
-+	SH_PFC_PIN_GROUP(drif0_data0_a),
-+	SH_PFC_PIN_GROUP(drif0_data1_a),
-+	SH_PFC_PIN_GROUP(drif0_ctrl_b),
-+	SH_PFC_PIN_GROUP(drif0_data0_b),
-+	SH_PFC_PIN_GROUP(drif0_data1_b),
-+	SH_PFC_PIN_GROUP(drif0_ctrl_c),
-+	SH_PFC_PIN_GROUP(drif0_data0_c),
-+	SH_PFC_PIN_GROUP(drif0_data1_c),
-+	SH_PFC_PIN_GROUP(drif1_ctrl_a),
-+	SH_PFC_PIN_GROUP(drif1_data0_a),
-+	SH_PFC_PIN_GROUP(drif1_data1_a),
-+	SH_PFC_PIN_GROUP(drif1_ctrl_b),
-+	SH_PFC_PIN_GROUP(drif1_data0_b),
-+	SH_PFC_PIN_GROUP(drif1_data1_b),
-+	SH_PFC_PIN_GROUP(drif1_ctrl_c),
-+	SH_PFC_PIN_GROUP(drif1_data0_c),
-+	SH_PFC_PIN_GROUP(drif1_data1_c),
-+	SH_PFC_PIN_GROUP(drif2_ctrl_a),
-+	SH_PFC_PIN_GROUP(drif2_data0_a),
-+	SH_PFC_PIN_GROUP(drif2_data1_a),
-+	SH_PFC_PIN_GROUP(drif2_ctrl_b),
-+	SH_PFC_PIN_GROUP(drif2_data0_b),
-+	SH_PFC_PIN_GROUP(drif2_data1_b),
-+	SH_PFC_PIN_GROUP(drif3_ctrl_a),
-+	SH_PFC_PIN_GROUP(drif3_data0_a),
-+	SH_PFC_PIN_GROUP(drif3_data1_a),
-+	SH_PFC_PIN_GROUP(drif3_ctrl_b),
-+	SH_PFC_PIN_GROUP(drif3_data0_b),
-+	SH_PFC_PIN_GROUP(drif3_data1_b),
- 	SH_PFC_PIN_GROUP(i2c1_a),
- 	SH_PFC_PIN_GROUP(i2c1_b),
- 	SH_PFC_PIN_GROUP(i2c2_a),
-@@ -2027,6 +2272,48 @@ static const struct sh_pfc_pin_group pin
- 	SH_PFC_PIN_GROUP(sdhi3_ds),
- };
- 
-+static const char * const drif0_groups[] = {
-+	"drif0_ctrl_a",
-+	"drif0_data0_a",
-+	"drif0_data1_a",
-+	"drif0_ctrl_b",
-+	"drif0_data0_b",
-+	"drif0_data1_b",
-+	"drif0_ctrl_c",
-+	"drif0_data0_c",
-+	"drif0_data1_c",
-+};
-+
-+static const char * const drif1_groups[] = {
-+	"drif1_ctrl_a",
-+	"drif1_data0_a",
-+	"drif1_data1_a",
-+	"drif1_ctrl_b",
-+	"drif1_data0_b",
-+	"drif1_data1_b",
-+	"drif1_ctrl_c",
-+	"drif1_data0_c",
-+	"drif1_data1_c",
-+};
-+
-+static const char * const drif2_groups[] = {
-+	"drif2_ctrl_a",
-+	"drif2_data0_a",
-+	"drif2_data1_a",
-+	"drif2_ctrl_b",
-+	"drif2_data0_b",
-+	"drif2_data1_b",
-+};
-+
-+static const char * const drif3_groups[] = {
-+	"drif3_ctrl_a",
-+	"drif3_data0_a",
-+	"drif3_data1_a",
-+	"drif3_ctrl_b",
-+	"drif3_data0_b",
-+	"drif3_data1_b",
-+};
-+
- static const char * const i2c1_groups[] = {
- 	"i2c1_a",
- 	"i2c1_b",
-@@ -2132,6 +2419,10 @@ static const char * const sdhi3_groups[]
- };
- 
- static const struct sh_pfc_function pinmux_functions[] = {
-+	SH_PFC_FUNCTION(drif0),
-+	SH_PFC_FUNCTION(drif1),
-+	SH_PFC_FUNCTION(drif2),
-+	SH_PFC_FUNCTION(drif3),
- 	SH_PFC_FUNCTION(i2c1),
- 	SH_PFC_FUNCTION(i2c2),
- 	SH_PFC_FUNCTION(i2c6),
diff --git a/patches.renesas/0095-ARM-dts-rskrza1-add-ostm-DT-support.patch b/patches.renesas/0095-ARM-dts-rskrza1-add-ostm-DT-support.patch
deleted file mode 100644
index e28376be61e50e..00000000000000
--- a/patches.renesas/0095-ARM-dts-rskrza1-add-ostm-DT-support.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 33c31760ff927144b6787520998658854f475732 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Mon, 23 Jan 2017 08:55:20 -0500
-Subject: [PATCH 095/255] ARM: dts: rskrza1: add ostm DT support
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 37dfe2afc5618d42d3214a61ed017ce4bbc12254)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100-rskrza1.dts |    8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100-rskrza1.dts
-+++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
-@@ -61,6 +61,14 @@
- 	status = "okay";
- };
- 
-+&ostm0 {
-+	status = "okay";
-+};
-+
-+&ostm1 {
-+	status = "okay";
-+};
-+
- &scif2 {
- 	status = "okay";
- };
diff --git a/patches.renesas/0095-ASoC-rcar-call-missing-of_clk_del_provider-when-remo.patch b/patches.renesas/0095-ASoC-rcar-call-missing-of_clk_del_provider-when-remo.patch
deleted file mode 100644
index 03d62765907bea..00000000000000
--- a/patches.renesas/0095-ASoC-rcar-call-missing-of_clk_del_provider-when-remo.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 6353731d1067bdacf9759317c51c880924db1f22 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 30 Mar 2017 01:49:27 +0000
-Subject: [PATCH 095/286] ASoC: rcar: call missing of_clk_del_provider() when
- remove
-
-adg is calling of_clk_add_provider() when probe time,
-thus, remove should call of_clk_del_provider(), it doesn't now.
-This patch fix this issue.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit b5aac5a9adf667f907c34c520e023bc19f8c226c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/adg.c |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/sound/soc/sh/rcar/adg.c
-+++ b/sound/soc/sh/rcar/adg.c
-@@ -590,5 +590,10 @@ int rsnd_adg_probe(struct rsnd_priv *pri
- 
- void rsnd_adg_remove(struct rsnd_priv *priv)
- {
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	struct device_node *np = dev->of_node;
-+
-+	of_clk_del_provider(np);
-+
- 	rsnd_adg_clk_disable(priv);
- }
diff --git a/patches.renesas/0095-pinctrl-sh-pfc-r8a7796-Fix-GPSR-definitions-for-SDHI.patch b/patches.renesas/0095-pinctrl-sh-pfc-r8a7796-Fix-GPSR-definitions-for-SDHI.patch
deleted file mode 100644
index 00fd7609475da0..00000000000000
--- a/patches.renesas/0095-pinctrl-sh-pfc-r8a7796-Fix-GPSR-definitions-for-SDHI.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From 95d78a928262ee5868334f40fb233cea28a8a62f Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 21 Oct 2016 17:30:59 +0200
-Subject: [PATCH 095/299] pinctrl: sh-pfc: r8a7796: Fix GPSR definitions for
- SDHI2/3
-
-Fix off-by-one (row and/or register) errors in links to Peripheral
-Function Select Register bitfields from GPIO/Peripheral Function Select
-Register 4 macros for SDHI2 and SDHI3 pins.
-
-Based on rev. 0.52E of the R-Car Gen3 User's Manual.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Tested-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0f866a9679215838328e1c0ed1892224672bb396)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7796.c |   20 ++++++++++----------
- 1 file changed, 10 insertions(+), 10 deletions(-)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-@@ -122,22 +122,22 @@
- #define GPSR3_0		F_(SD0_CLK,		IP7_19_16)
- 
- /* GPSR4 */
--#define GPSR4_17	F_(SD3_DS,		IP11_11_8)
--#define GPSR4_16	F_(SD3_DAT7,		IP10_7_4)
--#define GPSR4_15	F_(SD3_DAT6,		IP10_3_0)
--#define GPSR4_14	F_(SD3_DAT5,		IP9_31_28)
--#define GPSR4_13	F_(SD3_DAT4,		IP9_27_24)
-+#define GPSR4_17	F_(SD3_DS,		IP11_7_4)
-+#define GPSR4_16	F_(SD3_DAT7,		IP11_3_0)
-+#define GPSR4_15	F_(SD3_DAT6,		IP10_31_28)
-+#define GPSR4_14	F_(SD3_DAT5,		IP10_27_24)
-+#define GPSR4_13	F_(SD3_DAT4,		IP10_23_20)
- #define GPSR4_12	F_(SD3_DAT3,		IP10_19_16)
- #define GPSR4_11	F_(SD3_DAT2,		IP10_15_12)
- #define GPSR4_10	F_(SD3_DAT1,		IP10_11_8)
- #define GPSR4_9		F_(SD3_DAT0,		IP10_7_4)
- #define GPSR4_8		F_(SD3_CMD,		IP10_3_0)
- #define GPSR4_7		F_(SD3_CLK,		IP9_31_28)
--#define GPSR4_6		F_(SD2_DS,		IP9_23_20)
--#define GPSR4_5		F_(SD2_DAT3,		IP9_19_16)
--#define GPSR4_4		F_(SD2_DAT2,		IP9_15_12)
--#define GPSR4_3		F_(SD2_DAT1,		IP9_11_8)
--#define GPSR4_2		F_(SD2_DAT0,		IP9_7_4)
-+#define GPSR4_6		F_(SD2_DS,		IP9_27_24)
-+#define GPSR4_5		F_(SD2_DAT3,		IP9_23_20)
-+#define GPSR4_4		F_(SD2_DAT2,		IP9_19_16)
-+#define GPSR4_3		F_(SD2_DAT1,		IP9_15_12)
-+#define GPSR4_2		F_(SD2_DAT0,		IP9_11_8)
- #define GPSR4_1		F_(SD2_CMD,		IP9_7_4)
- #define GPSR4_0		F_(SD2_CLK,		IP9_3_0)
- 
diff --git a/patches.renesas/0096-ARM-shmobile-rcar-gen2-Add-more-register-documentati.patch b/patches.renesas/0096-ARM-shmobile-rcar-gen2-Add-more-register-documentati.patch
deleted file mode 100644
index 3f12b86bd59ec8..00000000000000
--- a/patches.renesas/0096-ARM-shmobile-rcar-gen2-Add-more-register-documentati.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From cc2657f086566fb81b3b01edbe2926a7de51cf58 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 25 Jan 2017 10:02:13 +0100
-Subject: [PATCH 096/255] ARM: shmobile: rcar-gen2: Add more register
- documentation
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit aa7f39d51e33555fc45645c08bc74a74e22b166f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/pm-rcar-gen2.c |   40 ++++++++++++++++++++++++----------
- 1 file changed, 29 insertions(+), 11 deletions(-)
-
---- a/arch/arm/mach-shmobile/pm-rcar-gen2.c
-+++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
-@@ -20,14 +20,30 @@
- 
- /* RST */
- #define RST		0xe6160000
--#define CA15BAR		0x0020
--#define CA7BAR		0x0030
--#define CA15RESCNT	0x0040
--#define CA7RESCNT	0x0044
-+
-+#define CA15BAR		0x0020		/* CA15 Boot Address Register */
-+#define CA7BAR		0x0030		/* CA7 Boot Address Register */
-+#define CA15RESCNT	0x0040		/* CA15 Reset Control Register */
-+#define CA7RESCNT	0x0044		/* CA7 Reset Control Register */
-+
-+/* SYS Boot Address Register */
-+#define SBAR_BAREN	BIT(4)		/* SBAR is valid */
-+
-+/* Reset Control Registers */
-+#define CA15RESCNT_CODE	0xa5a50000
-+#define CA15RESCNT_CPUS	0xf		/* CPU0-3 */
-+#define CA7RESCNT_CODE	0x5a5a0000
-+#define CA7RESCNT_CPUS	0xf		/* CPU0-3 */
-+
- 
- /* On-chip RAM */
- #define ICRAM1		0xe63c0000	/* Inter Connect RAM1 (4 KiB) */
- 
-+static inline u32 phys_to_sbar(phys_addr_t addr)
-+{
-+	return (addr >> 8) & 0xfffffc00;
-+}
-+
- /* SYSC */
- #define SYSCIER 0x0c
- #define SYSCIMR 0x10
-@@ -82,22 +98,24 @@ void __init rcar_gen2_pm_init(void)
- 
- 	/* setup reset vectors */
- 	p = ioremap_nocache(RST, 0x63);
--	bar = (boot_vector_addr >> 8) & 0xfffffc00;
-+	bar = phys_to_sbar(boot_vector_addr);
- 	if (has_a15) {
- 		writel_relaxed(bar, p + CA15BAR);
--		writel_relaxed(bar | 0x10, p + CA15BAR);
-+		writel_relaxed(bar | SBAR_BAREN, p + CA15BAR);
- 
- 		/* de-assert reset for CA15 CPUs */
--		writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) |
--				0xa5a50000, p + CA15RESCNT);
-+		writel_relaxed((readl_relaxed(p + CA15RESCNT) &
-+				~CA15RESCNT_CPUS) | CA15RESCNT_CODE,
-+			       p + CA15RESCNT);
- 	}
- 	if (has_a7) {
- 		writel_relaxed(bar, p + CA7BAR);
--		writel_relaxed(bar | 0x10, p + CA7BAR);
-+		writel_relaxed(bar | SBAR_BAREN, p + CA7BAR);
- 
- 		/* de-assert reset for CA7 CPUs */
--		writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) |
--				0x5a5a0000, p + CA7RESCNT);
-+		writel_relaxed((readl_relaxed(p + CA7RESCNT) &
-+				~CA7RESCNT_CPUS) | CA7RESCNT_CODE,
-+			       p + CA7RESCNT);
- 	}
- 	iounmap(p);
- 
diff --git a/patches.renesas/0096-ASoC-rsnd-tidyup-src-convert_rate-reset-timing.patch b/patches.renesas/0096-ASoC-rsnd-tidyup-src-convert_rate-reset-timing.patch
deleted file mode 100644
index 9e816e862addd6..00000000000000
--- a/patches.renesas/0096-ASoC-rsnd-tidyup-src-convert_rate-reset-timing.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From bcf8ce0f63df36c4b9741a8e2589dedfbbfcb367 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 6 Apr 2017 07:24:36 +0000
-Subject: [PATCH 096/286] ASoC: rsnd: tidyup src->convert_rate reset timing
-
-Current src->convert_rate will be set on .hw_param, and
-be reset on .quit timing.
-But, .hw_param will not be called again if user did Ctrl-Z + fg.
-It should be reset on initial of .hw_param to keep its value.
-Here, ctu.c already do this.
-This patch solves this issue, other wise, MIXed sound will be
-strange if user did like below.
-
-	> aplay -D plughw:0,0 sound_44100.wav &
-	> aplay -D plughw:0,1 sound_96000.wav
-	> Ctrl-Z
-	> fg # 96kHz will be played as 44.1kHz
-
-Reported-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit fc99d23f6d3ec6b17772915114018444393e0ad1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/src.c |    3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
---- a/sound/soc/sh/rcar/src.c
-+++ b/sound/soc/sh/rcar/src.c
-@@ -167,6 +167,7 @@ static int rsnd_src_hw_params(struct rsn
- 	 *	dpcm_fe_dai_hw_params()
- 	 *	dpcm_be_dai_hw_params()
- 	 */
-+	src->convert_rate = 0;
- 	if (fe->dai_link->dynamic) {
- 		int stream = substream->stream;
- 		struct snd_soc_dpcm *dpcm;
-@@ -414,8 +415,6 @@ static int rsnd_src_quit(struct rsnd_mod
- 
- 	rsnd_mod_power_off(mod);
- 
--	src->convert_rate = 0;
--
- 	/* reset sync convert_rate */
- 	src->sync.val = 0;
- 
diff --git a/patches.renesas/0096-pinctrl-sh-pfc-r8a7796-Add-EtherAVB-pins-groups-and-.patch b/patches.renesas/0096-pinctrl-sh-pfc-r8a7796-Add-EtherAVB-pins-groups-and-.patch
deleted file mode 100644
index 930d85918d0d72..00000000000000
--- a/patches.renesas/0096-pinctrl-sh-pfc-r8a7796-Add-EtherAVB-pins-groups-and-.patch
+++ /dev/null
@@ -1,135 +0,0 @@
-From faae9b03b7da87c425cbbf00e5d78f1ba613a8ca Mon Sep 17 00:00:00 2001
-From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Date: Wed, 16 Mar 2016 11:44:19 +0900
-Subject: [PATCH 096/299] pinctrl: sh-pfc: r8a7796: Add EtherAVB pins, groups
- and functions
-
-This patch adds AVB_LINK, AVB_MAGIC, AVB_PHY_INT, AVB_MDC, AVB_AVTP_PPS,
-AVB_AVTP_MATCH, AVB_AVTP_CAPTURE pins, groups and functions to R8A7796
-SoC.
-
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 9c99a63ec74f34f7afef6a475a89062caf14bd86)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7796.c |   87 +++++++++++++++++++++++++++++++++++
- 1 file changed, 87 insertions(+)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-@@ -1490,6 +1490,71 @@ static const struct sh_pfc_pin pinmux_pi
- 	PINMUX_GPIO_GP_ALL(),
- };
- 
-+/* - EtherAVB --------------------------------------------------------------- */
-+static const unsigned int avb_link_pins[] = {
-+	/* AVB_LINK */
-+	RCAR_GP_PIN(2, 12),
-+};
-+static const unsigned int avb_link_mux[] = {
-+	AVB_LINK_MARK,
-+};
-+static const unsigned int avb_magic_pins[] = {
-+	/* AVB_MAGIC_ */
-+	RCAR_GP_PIN(2, 10),
-+};
-+static const unsigned int avb_magic_mux[] = {
-+	AVB_MAGIC_MARK,
-+};
-+static const unsigned int avb_phy_int_pins[] = {
-+	/* AVB_PHY_INT */
-+	RCAR_GP_PIN(2, 11),
-+};
-+static const unsigned int avb_phy_int_mux[] = {
-+	AVB_PHY_INT_MARK,
-+};
-+static const unsigned int avb_mdc_pins[] = {
-+	/* AVB_MDC */
-+	RCAR_GP_PIN(2, 9),
-+};
-+static const unsigned int avb_mdc_mux[] = {
-+	AVB_MDC_MARK,
-+};
-+static const unsigned int avb_avtp_pps_pins[] = {
-+	/* AVB_AVTP_PPS */
-+	RCAR_GP_PIN(2, 6),
-+};
-+static const unsigned int avb_avtp_pps_mux[] = {
-+	AVB_AVTP_PPS_MARK,
-+};
-+static const unsigned int avb_avtp_match_a_pins[] = {
-+	/* AVB_AVTP_MATCH_A */
-+	RCAR_GP_PIN(2, 13),
-+};
-+static const unsigned int avb_avtp_match_a_mux[] = {
-+	AVB_AVTP_MATCH_A_MARK,
-+};
-+static const unsigned int avb_avtp_capture_a_pins[] = {
-+	/* AVB_AVTP_CAPTURE_A */
-+	RCAR_GP_PIN(2, 14),
-+};
-+static const unsigned int avb_avtp_capture_a_mux[] = {
-+	AVB_AVTP_CAPTURE_A_MARK,
-+};
-+static const unsigned int avb_avtp_match_b_pins[] = {
-+	/*  AVB_AVTP_MATCH_B */
-+	RCAR_GP_PIN(1, 8),
-+};
-+static const unsigned int avb_avtp_match_b_mux[] = {
-+	AVB_AVTP_MATCH_B_MARK,
-+};
-+static const unsigned int avb_avtp_capture_b_pins[] = {
-+	/* AVB_AVTP_CAPTURE_B */
-+	RCAR_GP_PIN(1, 11),
-+};
-+static const unsigned int avb_avtp_capture_b_mux[] = {
-+	AVB_AVTP_CAPTURE_B_MARK,
-+};
-+
- /* - DRIF0 --------------------------------------------------------------- */
- static const unsigned int drif0_ctrl_a_pins[] = {
- 	/* CLK, SYNC */
-@@ -2178,6 +2243,15 @@ static const unsigned int sdhi3_ds_mux[]
- };
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
-+	SH_PFC_PIN_GROUP(avb_link),
-+	SH_PFC_PIN_GROUP(avb_magic),
-+	SH_PFC_PIN_GROUP(avb_phy_int),
-+	SH_PFC_PIN_GROUP(avb_mdc),
-+	SH_PFC_PIN_GROUP(avb_avtp_pps),
-+	SH_PFC_PIN_GROUP(avb_avtp_match_a),
-+	SH_PFC_PIN_GROUP(avb_avtp_capture_a),
-+	SH_PFC_PIN_GROUP(avb_avtp_match_b),
-+	SH_PFC_PIN_GROUP(avb_avtp_capture_b),
- 	SH_PFC_PIN_GROUP(drif0_ctrl_a),
- 	SH_PFC_PIN_GROUP(drif0_data0_a),
- 	SH_PFC_PIN_GROUP(drif0_data1_a),
-@@ -2272,6 +2346,18 @@ static const struct sh_pfc_pin_group pin
- 	SH_PFC_PIN_GROUP(sdhi3_ds),
- };
- 
-+static const char * const avb_groups[] = {
-+	"avb_link",
-+	"avb_magic",
-+	"avb_phy_int",
-+	"avb_mdc",
-+	"avb_avtp_pps",
-+	"avb_avtp_match_a",
-+	"avb_avtp_capture_a",
-+	"avb_avtp_match_b",
-+	"avb_avtp_capture_b",
-+};
-+
- static const char * const drif0_groups[] = {
- 	"drif0_ctrl_a",
- 	"drif0_data0_a",
-@@ -2419,6 +2505,7 @@ static const char * const sdhi3_groups[]
- };
- 
- static const struct sh_pfc_function pinmux_functions[] = {
-+	SH_PFC_FUNCTION(avb),
- 	SH_PFC_FUNCTION(drif0),
- 	SH_PFC_FUNCTION(drif1),
- 	SH_PFC_FUNCTION(drif2),
diff --git a/patches.renesas/0097-ARM-dts-r7s72100-add-power-domains-to-mmcif.patch b/patches.renesas/0097-ARM-dts-r7s72100-add-power-domains-to-mmcif.patch
deleted file mode 100644
index 7418e70e7181fc..00000000000000
--- a/patches.renesas/0097-ARM-dts-r7s72100-add-power-domains-to-mmcif.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From cb50333d5a96772dcaf7b33f94df768ea08bf36a Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Mon, 23 Jan 2017 09:13:49 -0500
-Subject: [PATCH 097/255] ARM: dts: r7s72100: add power-domains to mmcif
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5786ac14239a0809ca13e6a6f77147e6bb04aa29)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100.dtsi |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/boot/dts/r7s72100.dtsi
-+++ b/arch/arm/boot/dts/r7s72100.dtsi
-@@ -475,6 +475,7 @@
- 			      GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH
- 			      GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp8_clks R7S72100_CLK_MMCIF>;
-+		power-domains = <&cpg_clocks>;
- 		reg-io-width = <4>;
- 		bus-width = <8>;
- 		status = "disabled";
diff --git a/patches.renesas/0097-ASoC-rsnd-merge-rsnd_kctrl_new_m-s-e-into-rsnd_kctrl.patch b/patches.renesas/0097-ASoC-rsnd-merge-rsnd_kctrl_new_m-s-e-into-rsnd_kctrl.patch
deleted file mode 100644
index fd64fd3a2c6f2e..00000000000000
--- a/patches.renesas/0097-ASoC-rsnd-merge-rsnd_kctrl_new_m-s-e-into-rsnd_kctrl.patch
+++ /dev/null
@@ -1,228 +0,0 @@
-From 51ebea31c27d49c9d12270062e64269b9fef4bad Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 6 Apr 2017 07:25:13 +0000
-Subject: [PATCH 097/286] ASoC: rsnd: merge rsnd_kctrl_new_m/s/e into
- rsnd_kctrl_new()
-
-Current rsnd driver is using rsnd_kctrl_new_m/s/e function,
-but the differences are very few.
-This patch merge these rsnd_kctrl_new_m/s/e into rsnd_kctrl_new
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 32973dcf71ebee8806a6ee552665c5fad6857e16)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c |   96 ++++++++++++++++-------------------------------
- sound/soc/sh/rcar/dvc.c  |    8 +--
- sound/soc/sh/rcar/rsnd.h |   50 +++++++++++-------------
- 3 files changed, 62 insertions(+), 92 deletions(-)
-
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -1000,13 +1000,30 @@ static int rsnd_kctrl_put(struct snd_kco
- 	return change;
- }
- 
--static int __rsnd_kctrl_new(struct rsnd_mod *mod,
--			    struct rsnd_dai_stream *io,
--			    struct snd_soc_pcm_runtime *rtd,
--			    const unsigned char *name,
--			    struct rsnd_kctrl_cfg *cfg,
--			    void (*update)(struct rsnd_dai_stream *io,
--					   struct rsnd_mod *mod))
-+struct rsnd_kctrl_cfg *rsnd_kctrl_init_m(struct rsnd_kctrl_cfg_m *cfg)
-+{
-+	cfg->cfg.val = cfg->val;
-+
-+	return &cfg->cfg;
-+}
-+
-+struct rsnd_kctrl_cfg *rsnd_kctrl_init_s(struct rsnd_kctrl_cfg_s *cfg)
-+{
-+	cfg->cfg.val = &cfg->val;
-+
-+	return &cfg->cfg;
-+}
-+
-+int rsnd_kctrl_new(struct rsnd_mod *mod,
-+		   struct rsnd_dai_stream *io,
-+		   struct snd_soc_pcm_runtime *rtd,
-+		   const unsigned char *name,
-+		   void (*update)(struct rsnd_dai_stream *io,
-+				  struct rsnd_mod *mod),
-+		   struct rsnd_kctrl_cfg *cfg,
-+		   const char * const *texts,
-+		   int size,
-+		   u32 max)
- {
- 	struct snd_card *card = rtd->card->snd_card;
- 	struct snd_kcontrol *kctrl;
-@@ -1021,6 +1038,9 @@ static int __rsnd_kctrl_new(struct rsnd_
- 	};
- 	int ret;
- 
-+	if (size > RSND_MAX_CHANNELS)
-+		return -EINVAL;
-+
- 	kctrl = snd_ctl_new1(&knew, mod);
- 	if (!kctrl)
- 		return -ENOMEM;
-@@ -1029,65 +1049,17 @@ static int __rsnd_kctrl_new(struct rsnd_
- 	if (ret < 0)
- 		return ret;
- 
--	cfg->update = update;
--	cfg->card = card;
--	cfg->kctrl = kctrl;
--	cfg->io = io;
-+	cfg->texts	= texts;
-+	cfg->max	= max;
-+	cfg->size	= size;
-+	cfg->update	= update;
-+	cfg->card	= card;
-+	cfg->kctrl	= kctrl;
-+	cfg->io		= io;
- 
- 	return 0;
- }
- 
--int rsnd_kctrl_new_m(struct rsnd_mod *mod,
--		     struct rsnd_dai_stream *io,
--		     struct snd_soc_pcm_runtime *rtd,
--		     const unsigned char *name,
--		     void (*update)(struct rsnd_dai_stream *io,
--				    struct rsnd_mod *mod),
--		     struct rsnd_kctrl_cfg_m *_cfg,
--		     int ch_size,
--		     u32 max)
--{
--	if (ch_size > RSND_MAX_CHANNELS)
--		return -EINVAL;
--
--	_cfg->cfg.max	= max;
--	_cfg->cfg.size	= ch_size;
--	_cfg->cfg.val	= _cfg->val;
--	return __rsnd_kctrl_new(mod, io, rtd, name, &_cfg->cfg, update);
--}
--
--int rsnd_kctrl_new_s(struct rsnd_mod *mod,
--		     struct rsnd_dai_stream *io,
--		     struct snd_soc_pcm_runtime *rtd,
--		     const unsigned char *name,
--		     void (*update)(struct rsnd_dai_stream *io,
--				    struct rsnd_mod *mod),
--		     struct rsnd_kctrl_cfg_s *_cfg,
--		     u32 max)
--{
--	_cfg->cfg.max	= max;
--	_cfg->cfg.size	= 1;
--	_cfg->cfg.val	= &_cfg->val;
--	return __rsnd_kctrl_new(mod, io, rtd, name, &_cfg->cfg, update);
--}
--
--int rsnd_kctrl_new_e(struct rsnd_mod *mod,
--		     struct rsnd_dai_stream *io,
--		     struct snd_soc_pcm_runtime *rtd,
--		     const unsigned char *name,
--		     struct rsnd_kctrl_cfg_s *_cfg,
--		     void (*update)(struct rsnd_dai_stream *io,
--				    struct rsnd_mod *mod),
--		     const char * const *texts,
--		     u32 max)
--{
--	_cfg->cfg.max	= max;
--	_cfg->cfg.size	= 1;
--	_cfg->cfg.val	= &_cfg->val;
--	_cfg->cfg.texts	= texts;
--	return __rsnd_kctrl_new(mod, io, rtd, name, &_cfg->cfg, update);
--}
--
- /*
-  *		snd_soc_platform
-  */
---- a/sound/soc/sh/rcar/dvc.c
-+++ b/sound/soc/sh/rcar/dvc.c
-@@ -285,18 +285,18 @@ static int rsnd_dvc_pcm_new(struct rsnd_
- 	ret = rsnd_kctrl_new_e(mod, io, rtd,
- 			is_play ?
- 			"DVC Out Ramp Up Rate" : "DVC In Ramp Up Rate",
--			&dvc->rup,
- 			rsnd_dvc_volume_update,
--			dvc_ramp_rate, ARRAY_SIZE(dvc_ramp_rate));
-+			&dvc->rup,
-+			dvc_ramp_rate);
- 	if (ret < 0)
- 		return ret;
- 
- 	ret = rsnd_kctrl_new_e(mod, io, rtd,
- 			is_play ?
- 			"DVC Out Ramp Down Rate" : "DVC In Ramp Down Rate",
--			&dvc->rdown,
- 			rsnd_dvc_volume_update,
--			dvc_ramp_rate, ARRAY_SIZE(dvc_ramp_rate));
-+			&dvc->rdown,
-+			dvc_ramp_rate);
- 
- 	if (ret < 0)
- 		return ret;
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -611,32 +611,30 @@ struct rsnd_kctrl_cfg_s {
- 	u32 val;
- };
- 
--int rsnd_kctrl_new_m(struct rsnd_mod *mod,
--		     struct rsnd_dai_stream *io,
--		     struct snd_soc_pcm_runtime *rtd,
--		     const unsigned char *name,
--		     void (*update)(struct rsnd_dai_stream *io,
--				    struct rsnd_mod *mod),
--		     struct rsnd_kctrl_cfg_m *_cfg,
--		     int ch_size,
--		     u32 max);
--int rsnd_kctrl_new_s(struct rsnd_mod *mod,
--		     struct rsnd_dai_stream *io,
--		     struct snd_soc_pcm_runtime *rtd,
--		     const unsigned char *name,
--		     void (*update)(struct rsnd_dai_stream *io,
--				    struct rsnd_mod *mod),
--		     struct rsnd_kctrl_cfg_s *_cfg,
--		     u32 max);
--int rsnd_kctrl_new_e(struct rsnd_mod *mod,
--		     struct rsnd_dai_stream *io,
--		     struct snd_soc_pcm_runtime *rtd,
--		     const unsigned char *name,
--		     struct rsnd_kctrl_cfg_s *_cfg,
--		     void (*update)(struct rsnd_dai_stream *io,
--				    struct rsnd_mod *mod),
--		     const char * const *texts,
--		     u32 max);
-+struct rsnd_kctrl_cfg *rsnd_kctrl_init_m(struct rsnd_kctrl_cfg_m *cfg);
-+struct rsnd_kctrl_cfg *rsnd_kctrl_init_s(struct rsnd_kctrl_cfg_s *cfg);
-+int rsnd_kctrl_new(struct rsnd_mod *mod,
-+		   struct rsnd_dai_stream *io,
-+		   struct snd_soc_pcm_runtime *rtd,
-+		   const unsigned char *name,
-+		   void (*update)(struct rsnd_dai_stream *io,
-+				  struct rsnd_mod *mod),
-+		   struct rsnd_kctrl_cfg *cfg,
-+		   const char * const *texts,
-+		   int size,
-+		   u32 max);
-+
-+#define rsnd_kctrl_new_m(mod, io, rtd, name, update, cfg, size, max) \
-+	rsnd_kctrl_new(mod, io, rtd, name, update, rsnd_kctrl_init_m(cfg), \
-+		       NULL, size, max)
-+
-+#define rsnd_kctrl_new_s(mod, io, rtd, name, update, cfg, max)	\
-+	rsnd_kctrl_new(mod, io, rtd, name, update, rsnd_kctrl_init_s(cfg), \
-+		       NULL, 1, max)
-+
-+#define rsnd_kctrl_new_e(mod, io, rtd, name, update, cfg, texts)	\
-+	rsnd_kctrl_new(mod, io, rtd, name, update, rsnd_kctrl_init_s(cfg), \
-+		       texts, 1, ARRAY_SIZE(texts))
- 
- /*
-  *	R-Car SSI
diff --git a/patches.renesas/0097-pinctrl-sh-pfc-r8a7796-Add-DU-support.patch b/patches.renesas/0097-pinctrl-sh-pfc-r8a7796-Add-DU-support.patch
deleted file mode 100644
index b48a1eef9b5f6c..00000000000000
--- a/patches.renesas/0097-pinctrl-sh-pfc-r8a7796-Add-DU-support.patch
+++ /dev/null
@@ -1,153 +0,0 @@
-From 005ffe875025652452adfbf2fe27497950d9e994 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Fri, 11 Nov 2016 21:40:03 +0100
-Subject: [PATCH 097/299] pinctrl: sh-pfc: r8a7796: Add DU support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Only the DU parallel RGB output signals are included, HDMI and TCON pins
-will be added in separate groups. Based on a similar patch from Laurent
-Pinchart for the r8a7795 PFC driver.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit cccc618a0b74867efb2211be6573ecf729a56ed0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7796.c |  101 +++++++++++++++++++++++++++++++++++
- 1 file changed, 101 insertions(+)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-@@ -1770,6 +1770,87 @@ static const unsigned int drif3_data1_b_
- 	RIF3_D1_B_MARK,
- };
- 
-+/* - DU --------------------------------------------------------------------- */
-+static const unsigned int du_rgb666_pins[] = {
-+	/* R[7:2], G[7:2], B[7:2] */
-+	RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13),
-+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
-+	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
-+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
-+	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
-+	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
-+};
-+static const unsigned int du_rgb666_mux[] = {
-+	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
-+	DU_DR3_MARK, DU_DR2_MARK,
-+	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
-+	DU_DG3_MARK, DU_DG2_MARK,
-+	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
-+	DU_DB3_MARK, DU_DB2_MARK,
-+};
-+static const unsigned int du_rgb888_pins[] = {
-+	/* R[7:0], G[7:0], B[7:0] */
-+	RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13),
-+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
-+	RCAR_GP_PIN(0, 9),  RCAR_GP_PIN(0, 8),
-+	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
-+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
-+	RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16),
-+	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
-+	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
-+	RCAR_GP_PIN(1, 1),  RCAR_GP_PIN(1, 0),
-+};
-+static const unsigned int du_rgb888_mux[] = {
-+	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
-+	DU_DR3_MARK, DU_DR2_MARK, DU_DR1_MARK, DU_DR0_MARK,
-+	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
-+	DU_DG3_MARK, DU_DG2_MARK, DU_DG1_MARK, DU_DG0_MARK,
-+	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
-+	DU_DB3_MARK, DU_DB2_MARK, DU_DB1_MARK, DU_DB0_MARK,
-+};
-+static const unsigned int du_clk_out_0_pins[] = {
-+	/* CLKOUT */
-+	RCAR_GP_PIN(1, 27),
-+};
-+static const unsigned int du_clk_out_0_mux[] = {
-+	DU_DOTCLKOUT0_MARK
-+};
-+static const unsigned int du_clk_out_1_pins[] = {
-+	/* CLKOUT */
-+	RCAR_GP_PIN(2, 3),
-+};
-+static const unsigned int du_clk_out_1_mux[] = {
-+	DU_DOTCLKOUT1_MARK
-+};
-+static const unsigned int du_sync_pins[] = {
-+	/* EXVSYNC/VSYNC, EXHSYNC/HSYNC */
-+	RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 4),
-+};
-+static const unsigned int du_sync_mux[] = {
-+	DU_EXVSYNC_DU_VSYNC_MARK, DU_EXHSYNC_DU_HSYNC_MARK
-+};
-+static const unsigned int du_oddf_pins[] = {
-+	/* EXDISP/EXODDF/EXCDE */
-+	RCAR_GP_PIN(2, 2),
-+};
-+static const unsigned int du_oddf_mux[] = {
-+	DU_EXODDF_DU_ODDF_DISP_CDE_MARK,
-+};
-+static const unsigned int du_cde_pins[] = {
-+	/* CDE */
-+	RCAR_GP_PIN(2, 0),
-+};
-+static const unsigned int du_cde_mux[] = {
-+	DU_CDE_MARK,
-+};
-+static const unsigned int du_disp_pins[] = {
-+	/* DISP */
-+	RCAR_GP_PIN(2, 1),
-+};
-+static const unsigned int du_disp_mux[] = {
-+	DU_DISP_MARK,
-+};
-+
- /* - I2C -------------------------------------------------------------------- */
- static const unsigned int i2c1_a_pins[] = {
- 	/* SDA, SCL */
-@@ -2282,6 +2363,14 @@ static const struct sh_pfc_pin_group pin
- 	SH_PFC_PIN_GROUP(drif3_ctrl_b),
- 	SH_PFC_PIN_GROUP(drif3_data0_b),
- 	SH_PFC_PIN_GROUP(drif3_data1_b),
-+	SH_PFC_PIN_GROUP(du_rgb666),
-+	SH_PFC_PIN_GROUP(du_rgb888),
-+	SH_PFC_PIN_GROUP(du_clk_out_0),
-+	SH_PFC_PIN_GROUP(du_clk_out_1),
-+	SH_PFC_PIN_GROUP(du_sync),
-+	SH_PFC_PIN_GROUP(du_oddf),
-+	SH_PFC_PIN_GROUP(du_cde),
-+	SH_PFC_PIN_GROUP(du_disp),
- 	SH_PFC_PIN_GROUP(i2c1_a),
- 	SH_PFC_PIN_GROUP(i2c1_b),
- 	SH_PFC_PIN_GROUP(i2c2_a),
-@@ -2400,6 +2489,17 @@ static const char * const drif3_groups[]
- 	"drif3_data1_b",
- };
- 
-+static const char * const du_groups[] = {
-+	"du_rgb666",
-+	"du_rgb888",
-+	"du_clk_out_0",
-+	"du_clk_out_1",
-+	"du_sync",
-+	"du_oddf",
-+	"du_cde",
-+	"du_disp",
-+};
-+
- static const char * const i2c1_groups[] = {
- 	"i2c1_a",
- 	"i2c1_b",
-@@ -2510,6 +2610,7 @@ static const struct sh_pfc_function pinm
- 	SH_PFC_FUNCTION(drif1),
- 	SH_PFC_FUNCTION(drif2),
- 	SH_PFC_FUNCTION(drif3),
-+	SH_PFC_FUNCTION(du),
- 	SH_PFC_FUNCTION(i2c1),
- 	SH_PFC_FUNCTION(i2c2),
- 	SH_PFC_FUNCTION(i2c6),
diff --git a/patches.renesas/0098-ARM-DTS-Fix-register-map-for-virt-capable-GIC.patch b/patches.renesas/0098-ARM-DTS-Fix-register-map-for-virt-capable-GIC.patch
deleted file mode 100644
index b966bc39c5cd84..00000000000000
--- a/patches.renesas/0098-ARM-DTS-Fix-register-map-for-virt-capable-GIC.patch
+++ /dev/null
@@ -1,499 +0,0 @@
-From 7a197c474987b18e90026842698f0175a10b9834 Mon Sep 17 00:00:00 2001
-From: Marc Zyngier <marc.zyngier@arm.com>
-Date: Wed, 18 Jan 2017 09:27:28 +0000
-Subject: [PATCH 098/255] ARM: DTS: Fix register map for virt-capable GIC
-
-Since everybody copied my own mistake from the DT binding example,
-let's address all the offenders in one swift go.
-
-Most of them got the CPU interface size wrong (4kB, while it should
-be 8kB), except for both keystone platforms which got the control
-interface wrong (4kB instead of 8kB).
-
-In a few cases where I knew for sure what implementation was used,
-I've added the "arm,gic-400" compatible string. I'm 99% sure that
-this is what everyone is using, but short of having the TRM for
-all the other SoCs, I've left them alone.
-
-Acked-by: Shawn Guo <shawnguo@kernel.org>
-Acked-by: Tony Lindgren <tony@atomide.com>
-Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
-Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
-Acked-by: Heiko Stuebner <heiko@sntech.de>
-Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
-Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-(cherry picked from commit 387720c93812f1e702c20c667cb003a356e24a6c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/boot/dts/rk1108.dtsi
----
- arch/arm/boot/dts/alpine.dtsi        |    2 +-
- arch/arm/boot/dts/axm55xx.dtsi       |    2 +-
- arch/arm/boot/dts/dra7.dtsi          |    2 +-
- arch/arm/boot/dts/ecx-2000.dts       |    2 +-
- arch/arm/boot/dts/exynos3250.dtsi    |    2 +-
- arch/arm/boot/dts/exynos5.dtsi       |    4 ++--
- arch/arm/boot/dts/exynos5260.dtsi    |    2 +-
- arch/arm/boot/dts/exynos5440.dtsi    |    2 +-
- arch/arm/boot/dts/imx6ul.dtsi        |    4 ++--
- arch/arm/boot/dts/keystone-k2g.dtsi  |    4 ++--
- arch/arm/boot/dts/keystone.dtsi      |    4 ++--
- arch/arm/boot/dts/ls1021a.dtsi       |    4 ++--
- arch/arm/boot/dts/mt2701.dtsi        |    2 +-
- arch/arm/boot/dts/mt6580.dtsi        |    2 +-
- arch/arm/boot/dts/mt6589.dtsi        |    2 +-
- arch/arm/boot/dts/mt7623.dtsi        |    2 +-
- arch/arm/boot/dts/mt8127.dtsi        |    2 +-
- arch/arm/boot/dts/mt8135.dtsi        |    2 +-
- arch/arm/boot/dts/omap5.dtsi         |    2 +-
- arch/arm/boot/dts/r8a73a4.dtsi       |    2 +-
- arch/arm/boot/dts/r8a7743.dtsi       |    2 +-
- arch/arm/boot/dts/r8a7745.dtsi       |    2 +-
- arch/arm/boot/dts/r8a7790.dtsi       |    2 +-
- arch/arm/boot/dts/r8a7791.dtsi       |    2 +-
- arch/arm/boot/dts/r8a7792.dtsi       |    2 +-
- arch/arm/boot/dts/r8a7793.dtsi       |    2 +-
- arch/arm/boot/dts/r8a7794.dtsi       |    2 +-
- arch/arm/boot/dts/rk3036.dtsi        |    2 +-
- arch/arm/boot/dts/rk322x.dtsi        |    2 +-
- arch/arm/boot/dts/rk3288.dtsi        |    2 +-
- arch/arm/boot/dts/sun6i-a31.dtsi     |    2 +-
- arch/arm/boot/dts/sun7i-a20.dtsi     |    4 ++--
- arch/arm/boot/dts/sun8i-a23-a33.dtsi |    2 +-
- arch/arm/boot/dts/sun8i-a83t.dtsi    |    2 +-
- arch/arm/boot/dts/sun8i-h3.dtsi      |    2 +-
- arch/arm/boot/dts/sun9i-a80.dtsi     |    2 +-
- 36 files changed, 42 insertions(+), 42 deletions(-)
-
---- a/arch/arm/boot/dts/alpine.dtsi
-+++ b/arch/arm/boot/dts/alpine.dtsi
-@@ -93,7 +93,7 @@
- 			interrupt-controller;
- 			reg = <0x0 0xfb001000 0x0 0x1000>,
- 			      <0x0 0xfb002000 0x0 0x2000>,
--			      <0x0 0xfb004000 0x0 0x1000>,
-+			      <0x0 0xfb004000 0x0 0x2000>,
- 			      <0x0 0xfb006000 0x0 0x2000>;
- 			interrupts =
- 				<GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
---- a/arch/arm/boot/dts/axm55xx.dtsi
-+++ b/arch/arm/boot/dts/axm55xx.dtsi
-@@ -62,7 +62,7 @@
- 		#address-cells = <0>;
- 		interrupt-controller;
- 		reg = <0x20 0x01001000 0 0x1000>,
--		      <0x20 0x01002000 0 0x1000>,
-+		      <0x20 0x01002000 0 0x2000>,
- 		      <0x20 0x01004000 0 0x2000>,
- 		      <0x20 0x01006000 0 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
---- a/arch/arm/boot/dts/dra7.dtsi
-+++ b/arch/arm/boot/dts/dra7.dtsi
-@@ -57,7 +57,7 @@
- 		interrupt-controller;
- 		#interrupt-cells = <3>;
- 		reg = <0x0 0x48211000 0x0 0x1000>,
--		      <0x0 0x48212000 0x0 0x1000>,
-+		      <0x0 0x48212000 0x0 0x2000>,
- 		      <0x0 0x48214000 0x0 0x2000>,
- 		      <0x0 0x48216000 0x0 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
---- a/arch/arm/boot/dts/ecx-2000.dts
-+++ b/arch/arm/boot/dts/ecx-2000.dts
-@@ -99,7 +99,7 @@
- 			interrupt-controller;
- 			interrupts = <1 9 0xf04>;
- 			reg = <0xfff11000 0x1000>,
--			      <0xfff12000 0x1000>,
-+			      <0xfff12000 0x2000>,
- 			      <0xfff14000 0x2000>,
- 			      <0xfff16000 0x2000>;
- 		};
---- a/arch/arm/boot/dts/exynos3250.dtsi
-+++ b/arch/arm/boot/dts/exynos3250.dtsi
-@@ -231,7 +231,7 @@
- 			#interrupt-cells = <3>;
- 			interrupt-controller;
- 			reg = <0x10481000 0x1000>,
--			      <0x10482000 0x1000>,
-+			      <0x10482000 0x2000>,
- 			      <0x10484000 0x2000>,
- 			      <0x10486000 0x2000>;
- 			interrupts = <1 9 0xf04>;
---- a/arch/arm/boot/dts/exynos5.dtsi
-+++ b/arch/arm/boot/dts/exynos5.dtsi
-@@ -64,11 +64,11 @@
- 		};
- 
- 		gic: interrupt-controller@10481000 {
--			compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
-+			compatible = "arm,gic-400", "arm,cortex-a15-gic", "arm,cortex-a9-gic";
- 			#interrupt-cells = <3>;
- 			interrupt-controller;
- 			reg =	<0x10481000 0x1000>,
--				<0x10482000 0x1000>,
-+				<0x10482000 0x2000>,
- 				<0x10484000 0x2000>,
- 				<0x10486000 0x2000>;
- 			interrupts = <1 9 0xf04>;
---- a/arch/arm/boot/dts/exynos5260.dtsi
-+++ b/arch/arm/boot/dts/exynos5260.dtsi
-@@ -165,7 +165,7 @@
- 			#size-cells = <0>;
- 			interrupt-controller;
- 			reg = <0x10481000 0x1000>,
--				<0x10482000 0x1000>,
-+				<0x10482000 0x2000>,
- 				<0x10484000 0x2000>,
- 				<0x10486000 0x2000>;
- 			interrupts = <1 9 0xf04>;
---- a/arch/arm/boot/dts/exynos5440.dtsi
-+++ b/arch/arm/boot/dts/exynos5440.dtsi
-@@ -38,7 +38,7 @@
- 		#interrupt-cells = <3>;
- 		interrupt-controller;
- 		reg =	<0x2E1000 0x1000>,
--			<0x2E2000 0x1000>,
-+			<0x2E2000 0x2000>,
- 			<0x2E4000 0x2000>,
- 			<0x2E6000 0x2000>;
- 		interrupts = <1 9 0xf04>;
---- a/arch/arm/boot/dts/imx6ul.dtsi
-+++ b/arch/arm/boot/dts/imx6ul.dtsi
-@@ -89,11 +89,11 @@
- 	};
- 
- 	intc: interrupt-controller@00a01000 {
--		compatible = "arm,cortex-a7-gic";
-+		compatible = "arm,gic-400", "arm,cortex-a7-gic";
- 		#interrupt-cells = <3>;
- 		interrupt-controller;
- 		reg = <0x00a01000 0x1000>,
--		      <0x00a02000 0x1000>,
-+		      <0x00a02000 0x2000>,
- 		      <0x00a04000 0x2000>,
- 		      <0x00a06000 0x2000>;
- 	};
---- a/arch/arm/boot/dts/keystone-k2g.dtsi
-+++ b/arch/arm/boot/dts/keystone-k2g.dtsi
-@@ -40,12 +40,12 @@
- 	};
- 
- 	gic: interrupt-controller@02561000 {
--		compatible = "arm,cortex-a15-gic";
-+		compatible = "arm,gic-400", "arm,cortex-a15-gic";
- 		#interrupt-cells = <3>;
- 		interrupt-controller;
- 		reg = <0x0 0x02561000 0x0 0x1000>,
- 		      <0x0 0x02562000 0x0 0x2000>,
--		      <0x0 0x02564000 0x0 0x1000>,
-+		      <0x0 0x02564000 0x0 0x2000>,
- 		      <0x0 0x02566000 0x0 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
- 				IRQ_TYPE_LEVEL_HIGH)>;
---- a/arch/arm/boot/dts/keystone.dtsi
-+++ b/arch/arm/boot/dts/keystone.dtsi
-@@ -30,12 +30,12 @@
- 	};
- 
- 	gic: interrupt-controller {
--		compatible = "arm,cortex-a15-gic";
-+		compatible = "arm,gic-400", "arm,cortex-a15-gic";
- 		#interrupt-cells = <3>;
- 		interrupt-controller;
- 		reg = <0x0 0x02561000 0x0 0x1000>,
- 		      <0x0 0x02562000 0x0 0x2000>,
--		      <0x0 0x02564000 0x0 0x1000>,
-+		      <0x0 0x02564000 0x0 0x2000>,
- 		      <0x0 0x02566000 0x0 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
- 				IRQ_TYPE_LEVEL_HIGH)>;
---- a/arch/arm/boot/dts/ls1021a.dtsi
-+++ b/arch/arm/boot/dts/ls1021a.dtsi
-@@ -108,11 +108,11 @@
- 		ranges;
- 
- 		gic: interrupt-controller@1400000 {
--			compatible = "arm,cortex-a7-gic";
-+			compatible = "arm,gic-400", "arm,cortex-a7-gic";
- 			#interrupt-cells = <3>;
- 			interrupt-controller;
- 			reg = <0x0 0x1401000 0x0 0x1000>,
--			      <0x0 0x1402000 0x0 0x1000>,
-+			      <0x0 0x1402000 0x0 0x2000>,
- 			      <0x0 0x1404000 0x0 0x2000>,
- 			      <0x0 0x1406000 0x0 0x2000>;
- 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
---- a/arch/arm/boot/dts/mt2701.dtsi
-+++ b/arch/arm/boot/dts/mt2701.dtsi
-@@ -134,7 +134,7 @@
- 		#interrupt-cells = <3>;
- 		interrupt-parent = <&gic>;
- 		reg = <0 0x10211000 0 0x1000>,
--		      <0 0x10212000 0 0x1000>,
-+		      <0 0x10212000 0 0x2000>,
- 		      <0 0x10214000 0 0x2000>,
- 		      <0 0x10216000 0 0x2000>;
- 	};
---- a/arch/arm/boot/dts/mt6580.dtsi
-+++ b/arch/arm/boot/dts/mt6580.dtsi
-@@ -91,7 +91,7 @@
- 		#interrupt-cells = <3>;
- 		interrupt-parent = <&gic>;
- 		reg = <0x10211000 0x1000>,
--		      <0x10212000 0x1000>,
-+		      <0x10212000 0x2000>,
- 		      <0x10214000 0x2000>,
- 		      <0x10216000 0x2000>;
- 	};
---- a/arch/arm/boot/dts/mt6589.dtsi
-+++ b/arch/arm/boot/dts/mt6589.dtsi
-@@ -102,7 +102,7 @@
- 			#interrupt-cells = <3>;
- 			interrupt-parent = <&gic>;
- 			reg = <0x10211000 0x1000>,
--			      <0x10212000 0x1000>,
-+			      <0x10212000 0x2000>,
- 			      <0x10214000 0x2000>,
- 			      <0x10216000 0x2000>;
- 		};
---- a/arch/arm/boot/dts/mt7623.dtsi
-+++ b/arch/arm/boot/dts/mt7623.dtsi
-@@ -104,7 +104,7 @@
- 		#interrupt-cells = <3>;
- 		interrupt-parent = <&gic>;
- 		reg = <0 0x10211000 0 0x1000>,
--		      <0 0x10212000 0 0x1000>,
-+		      <0 0x10212000 0 0x2000>,
- 		      <0 0x10214000 0 0x2000>,
- 		      <0 0x10216000 0 0x2000>;
- 	};
---- a/arch/arm/boot/dts/mt8127.dtsi
-+++ b/arch/arm/boot/dts/mt8127.dtsi
-@@ -129,7 +129,7 @@
- 			#interrupt-cells = <3>;
- 			interrupt-parent = <&gic>;
- 			reg = <0 0x10211000 0 0x1000>,
--			      <0 0x10212000 0 0x1000>,
-+			      <0 0x10212000 0 0x2000>,
- 			      <0 0x10214000 0 0x2000>,
- 			      <0 0x10216000 0 0x2000>;
- 		};
---- a/arch/arm/boot/dts/mt8135.dtsi
-+++ b/arch/arm/boot/dts/mt8135.dtsi
-@@ -221,7 +221,7 @@
- 			#interrupt-cells = <3>;
- 			interrupt-parent = <&gic>;
- 			reg = <0 0x10211000 0 0x1000>,
--			      <0 0x10212000 0 0x1000>,
-+			      <0 0x10212000 0 0x2000>,
- 			      <0 0x10214000 0 0x2000>,
- 			      <0 0x10216000 0 0x2000>;
- 		};
---- a/arch/arm/boot/dts/omap5.dtsi
-+++ b/arch/arm/boot/dts/omap5.dtsi
-@@ -92,7 +92,7 @@
- 		interrupt-controller;
- 		#interrupt-cells = <3>;
- 		reg = <0 0x48211000 0 0x1000>,
--		      <0 0x48212000 0 0x1000>,
-+		      <0 0x48212000 0 0x2000>,
- 		      <0 0x48214000 0 0x2000>,
- 		      <0 0x48216000 0 0x2000>;
- 		interrupt-parent = <&gic>;
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -465,7 +465,7 @@
- 		#address-cells = <0>;
- 		interrupt-controller;
- 		reg = <0 0xf1001000 0 0x1000>,
--			<0 0xf1002000 0 0x1000>,
-+			<0 0xf1002000 0 0x2000>,
- 			<0 0xf1004000 0 0x2000>,
- 			<0 0xf1006000 0 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
---- a/arch/arm/boot/dts/r8a7743.dtsi
-+++ b/arch/arm/boot/dts/r8a7743.dtsi
-@@ -55,7 +55,7 @@
- 			#address-cells = <0>;
- 			interrupt-controller;
- 			reg = <0 0xf1001000 0 0x1000>,
--			      <0 0xf1002000 0 0x1000>,
-+			      <0 0xf1002000 0 0x2000>,
- 			      <0 0xf1004000 0 0x2000>,
- 			      <0 0xf1006000 0 0x2000>;
- 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
---- a/arch/arm/boot/dts/r8a7745.dtsi
-+++ b/arch/arm/boot/dts/r8a7745.dtsi
-@@ -55,7 +55,7 @@
- 			#address-cells = <0>;
- 			interrupt-controller;
- 			reg = <0 0xf1001000 0 0x1000>,
--			      <0 0xf1002000 0 0x1000>,
-+			      <0 0xf1002000 0 0x2000>,
- 			      <0 0xf1004000 0 0x2000>,
- 			      <0 0xf1006000 0 0x2000>;
- 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -183,7 +183,7 @@
- 		#address-cells = <0>;
- 		interrupt-controller;
- 		reg = <0 0xf1001000 0 0x1000>,
--			<0 0xf1002000 0 0x1000>,
-+			<0 0xf1002000 0 0x2000>,
- 			<0 0xf1004000 0 0x2000>,
- 			<0 0xf1006000 0 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -113,7 +113,7 @@
- 		#address-cells = <0>;
- 		interrupt-controller;
- 		reg = <0 0xf1001000 0 0x1000>,
--			<0 0xf1002000 0 0x1000>,
-+			<0 0xf1002000 0 0x2000>,
- 			<0 0xf1004000 0 0x2000>,
- 			<0 0xf1006000 0 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
---- a/arch/arm/boot/dts/r8a7792.dtsi
-+++ b/arch/arm/boot/dts/r8a7792.dtsi
-@@ -87,7 +87,7 @@
- 			#interrupt-cells = <3>;
- 			interrupt-controller;
- 			reg = <0 0xf1001000 0 0x1000>,
--			      <0 0xf1002000 0 0x1000>,
-+			      <0 0xf1002000 0 0x2000>,
- 			      <0 0xf1004000 0 0x2000>,
- 			      <0 0xf1006000 0 0x2000>;
- 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
---- a/arch/arm/boot/dts/r8a7793.dtsi
-+++ b/arch/arm/boot/dts/r8a7793.dtsi
-@@ -104,7 +104,7 @@
- 		#address-cells = <0>;
- 		interrupt-controller;
- 		reg = <0 0xf1001000 0 0x1000>,
--			<0 0xf1002000 0 0x1000>,
-+			<0 0xf1002000 0 0x2000>,
- 			<0 0xf1004000 0 0x2000>,
- 			<0 0xf1006000 0 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
---- a/arch/arm/boot/dts/r8a7794.dtsi
-+++ b/arch/arm/boot/dts/r8a7794.dtsi
-@@ -70,7 +70,7 @@
- 		#address-cells = <0>;
- 		interrupt-controller;
- 		reg = <0 0xf1001000 0 0x1000>,
--			<0 0xf1002000 0 0x1000>,
-+			<0 0xf1002000 0 0x2000>,
- 			<0 0xf1004000 0 0x2000>,
- 			<0 0xf1006000 0 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
---- a/arch/arm/boot/dts/rk3036.dtsi
-+++ b/arch/arm/boot/dts/rk3036.dtsi
-@@ -187,7 +187,7 @@
- 		#address-cells = <0>;
- 
- 		reg = <0x10139000 0x1000>,
--		      <0x1013a000 0x1000>,
-+		      <0x1013a000 0x2000>,
- 		      <0x1013c000 0x2000>,
- 		      <0x1013e000 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
---- a/arch/arm/boot/dts/rk322x.dtsi
-+++ b/arch/arm/boot/dts/rk322x.dtsi
-@@ -441,7 +441,7 @@
- 		#address-cells = <0>;
- 
- 		reg = <0x32011000 0x1000>,
--		      <0x32012000 0x1000>,
-+		      <0x32012000 0x2000>,
- 		      <0x32014000 0x2000>,
- 		      <0x32016000 0x2000>;
- 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -1109,7 +1109,7 @@
- 		#address-cells = <0>;
- 
- 		reg = <0xffc01000 0x1000>,
--		      <0xffc02000 0x1000>,
-+		      <0xffc02000 0x2000>,
- 		      <0xffc04000 0x2000>,
- 		      <0xffc06000 0x2000>;
- 		interrupts = <GIC_PPI 9 0xf04>;
---- a/arch/arm/boot/dts/sun6i-a31.dtsi
-+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
-@@ -791,7 +791,7 @@
- 		gic: interrupt-controller@01c81000 {
- 			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
- 			reg = <0x01c81000 0x1000>,
--			      <0x01c82000 0x1000>,
-+			      <0x01c82000 0x2000>,
- 			      <0x01c84000 0x2000>,
- 			      <0x01c86000 0x2000>;
- 			interrupt-controller;
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -1685,9 +1685,9 @@
- 		};
- 
- 		gic: interrupt-controller@01c81000 {
--			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
-+			compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic";
- 			reg = <0x01c81000 0x1000>,
--			      <0x01c82000 0x1000>,
-+			      <0x01c82000 0x2000>,
- 			      <0x01c84000 0x2000>,
- 			      <0x01c86000 0x2000>;
- 			interrupt-controller;
---- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
-+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
-@@ -488,7 +488,7 @@
- 		gic: interrupt-controller@01c81000 {
- 			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
- 			reg = <0x01c81000 0x1000>,
--			      <0x01c82000 0x1000>,
-+			      <0x01c82000 0x2000>,
- 			      <0x01c84000 0x2000>,
- 			      <0x01c86000 0x2000>;
- 			interrupt-controller;
---- a/arch/arm/boot/dts/sun8i-a83t.dtsi
-+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
-@@ -217,7 +217,7 @@
- 		gic: interrupt-controller@01c81000 {
- 			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
- 			reg = <0x01c81000 0x1000>,
--			      <0x01c82000 0x1000>,
-+			      <0x01c82000 0x2000>,
- 			      <0x01c84000 0x2000>,
- 			      <0x01c86000 0x2000>;
- 			interrupt-controller;
---- a/arch/arm/boot/dts/sun8i-h3.dtsi
-+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
-@@ -533,7 +533,7 @@
- 		gic: interrupt-controller@01c81000 {
- 			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
- 			reg = <0x01c81000 0x1000>,
--			      <0x01c82000 0x1000>,
-+			      <0x01c82000 0x2000>,
- 			      <0x01c84000 0x2000>,
- 			      <0x01c86000 0x2000>;
- 			interrupt-controller;
---- a/arch/arm/boot/dts/sun9i-a80.dtsi
-+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
-@@ -613,7 +613,7 @@
- 		gic: interrupt-controller@01c41000 {
- 			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
- 			reg = <0x01c41000 0x1000>,
--			      <0x01c42000 0x1000>,
-+			      <0x01c42000 0x2000>,
- 			      <0x01c44000 0x2000>,
- 			      <0x01c46000 0x2000>;
- 			interrupt-controller;
diff --git a/patches.renesas/0098-ASoC-rsnd-rsnd_mod_make_sure-is-not-under-DEBUG.patch b/patches.renesas/0098-ASoC-rsnd-rsnd_mod_make_sure-is-not-under-DEBUG.patch
deleted file mode 100644
index 48254f7bbec0a9..00000000000000
--- a/patches.renesas/0098-ASoC-rsnd-rsnd_mod_make_sure-is-not-under-DEBUG.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 2f2c00ce9b9915cc70995ecdee13a059a70ef6d4 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 19 Apr 2017 00:41:24 +0000
-Subject: [PATCH 098/286] ASoC: rsnd: rsnd_mod_make_sure() is not under DEBUG
-
-rsnd_mod_make_sure() will be used any situation,
-thus, under DEBUG is not realistic.
-This patch move it to non DEBUG area
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 9ca5e57d78446c8bd42adff3dcae693703f91d9c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c |    2 --
- sound/soc/sh/rcar/rsnd.h |    2 +-
- 2 files changed, 1 insertion(+), 3 deletions(-)
-
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -110,7 +110,6 @@ MODULE_DEVICE_TABLE(of, rsnd_of_match);
- /*
-  *	rsnd_mod functions
-  */
--#ifdef DEBUG
- void rsnd_mod_make_sure(struct rsnd_mod *mod, enum rsnd_mod_type type)
- {
- 	if (mod->type != type) {
-@@ -121,7 +120,6 @@ void rsnd_mod_make_sure(struct rsnd_mod
- 			 rsnd_mod_name(mod), rsnd_mod_id(mod));
- 	}
- }
--#endif
- 
- char *rsnd_mod_name(struct rsnd_mod *mod)
- {
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -727,8 +727,8 @@ void rsnd_cmd_remove(struct rsnd_priv *p
- int rsnd_cmd_attach(struct rsnd_dai_stream *io, int id);
- struct rsnd_mod *rsnd_cmd_mod_get(struct rsnd_priv *priv, int id);
- 
--#ifdef DEBUG
- void rsnd_mod_make_sure(struct rsnd_mod *mod, enum rsnd_mod_type type);
-+#ifdef DEBUG
- #define rsnd_mod_confirm_ssi(mssi)	rsnd_mod_make_sure(mssi, RSND_MOD_SSI)
- #define rsnd_mod_confirm_src(msrc)	rsnd_mod_make_sure(msrc, RSND_MOD_SRC)
- #define rsnd_mod_confirm_dvc(mdvc)	rsnd_mod_make_sure(mdvc, RSND_MOD_DVC)
diff --git a/patches.renesas/0098-pinctrl-sh-pfc-r8a7795-Simplify-get-bias-logic.patch b/patches.renesas/0098-pinctrl-sh-pfc-r8a7795-Simplify-get-bias-logic.patch
deleted file mode 100644
index 9812d9666578c7..00000000000000
--- a/patches.renesas/0098-pinctrl-sh-pfc-r8a7795-Simplify-get-bias-logic.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From fb2e5c612b9977b359e110eb3b82671b33a2dd83 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Sat, 12 Nov 2016 17:04:26 +0100
-Subject: [PATCH 098/299] pinctrl: sh-pfc: r8a7795: Simplify get bias logic
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The last else statement is missing braces, and the indentation level can
-be reduced.
-
-Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 42831cf96531bf4dd9035fb8a94afe8e1fc235b3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7795.c |   11 +++++------
- 1 file changed, 5 insertions(+), 6 deletions(-)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-@@ -5366,13 +5366,12 @@ static unsigned int r8a7795_pinmux_get_b
- 	reg = info->reg;
- 	bit = BIT(info->bit);
- 
--	if (sh_pfc_read_reg(pfc, PUEN + reg, 32) & bit) {
--		if (sh_pfc_read_reg(pfc, PUD + reg, 32) & bit)
--			return PIN_CONFIG_BIAS_PULL_UP;
--		else
--			return PIN_CONFIG_BIAS_PULL_DOWN;
--	} else
-+	if (!(sh_pfc_read_reg(pfc, PUEN + reg, 32) & bit))
- 		return PIN_CONFIG_BIAS_DISABLE;
-+	else if (sh_pfc_read_reg(pfc, PUD + reg, 32) & bit)
-+		return PIN_CONFIG_BIAS_PULL_UP;
-+	else
-+		return PIN_CONFIG_BIAS_PULL_DOWN;
- }
- 
- static void r8a7795_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
diff --git a/patches.renesas/0099-ASoC-rsnd-enable-clock-frequency-for-both-44.1kHz-48.patch b/patches.renesas/0099-ASoC-rsnd-enable-clock-frequency-for-both-44.1kHz-48.patch
deleted file mode 100644
index 59fcd2ca3b96a2..00000000000000
--- a/patches.renesas/0099-ASoC-rsnd-enable-clock-frequency-for-both-44.1kHz-48.patch
+++ /dev/null
@@ -1,126 +0,0 @@
-From c637f5ea01d84bb11aa2f31c1a07b73b37b81c73 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 19 Apr 2017 00:45:52 +0000
-Subject: [PATCH 099/286] ASoC: rsnd: enable clock-frequency for both
- 44.1kHz/48kHz
-
-Current clock-frequency allows only 1 clock, but ADG can
-handle both 44.1kHz/48kHz base clocks. This patch enables these.
-
-On Salvator-X board, AUDIO_CLKOUT which is generated by ADG
-is connected to ak4613 MCKI, and it should be synchronized with
-LRCK. Thus, we need both 44.1kHz/48kHz base clock-frequency.
-Otherwise, either one sounds strange in high frequency sound.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 25165f79adc76b812bfb4d8f2ab120aafb28d0e6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/adg.c |   39 ++++++++++++++++++++++++++-------------
- 1 file changed, 26 insertions(+), 13 deletions(-)
-
---- a/sound/soc/sh/rcar/adg.c
-+++ b/sound/soc/sh/rcar/adg.c
-@@ -43,6 +43,7 @@ struct rsnd_adg {
- };
- 
- #define LRCLK_ASYNC	(1 << 0)
-+#define AUDIO_OUT_48	(1 << 1)
- #define adg_mode_flags(adg)	(adg->flags)
- 
- #define for_each_rsnd_clk(pos, adg, i)		\
-@@ -364,7 +365,10 @@ found_clock:
- 
- 	rsnd_adg_set_ssi_clk(ssi_mod, data);
- 
--	if (!(adg_mode_flags(adg) & LRCLK_ASYNC)) {
-+	if (adg_mode_flags(adg) & LRCLK_ASYNC) {
-+		if (adg_mode_flags(adg) & AUDIO_OUT_48)
-+			ckr = 0x80000000;
-+	} else {
- 		if (0 == (rate % 8000))
- 			ckr = 0x80000000;
- 	}
-@@ -427,11 +431,14 @@ static void rsnd_adg_get_clkout(struct r
- 	struct clk *clk;
- 	struct device *dev = rsnd_priv_to_dev(priv);
- 	struct device_node *np = dev->of_node;
-+	struct property *prop;
- 	u32 ckr, rbgx, rbga, rbgb;
--	u32 rate, req_rate = 0, div;
-+	u32 rate, div;
-+#define REQ_SIZE 2
-+	u32 req_rate[REQ_SIZE] = {};
- 	uint32_t count = 0;
- 	unsigned long req_48kHz_rate, req_441kHz_rate;
--	int i;
-+	int i, req_size;
- 	const char *parent_clk_name = NULL;
- 	static const char * const clkout_name[] = {
- 		[CLKOUT]  = "audio_clkout",
-@@ -452,13 +459,18 @@ static void rsnd_adg_get_clkout(struct r
- 	 * ADG supports BRRA/BRRB output only
- 	 * this means all clkout0/1/2/3 will be same rate
- 	 */
--	of_property_read_u32(np, "clock-frequency", &req_rate);
-+	prop = of_find_property(np, "clock-frequency", NULL);;
-+	req_size = prop->length / sizeof(u32);
-+
-+	of_property_read_u32_array(np, "clock-frequency", req_rate, req_size);
- 	req_48kHz_rate = 0;
- 	req_441kHz_rate = 0;
--	if (0 == (req_rate % 44100))
--		req_441kHz_rate = req_rate;
--	if (0 == (req_rate % 48000))
--		req_48kHz_rate = req_rate;
-+	for (i = 0; i < req_size; i++) {
-+		if (0 == (req_rate[i] % 44100))
-+			req_441kHz_rate = req_rate[i];
-+		if (0 == (req_rate[i] % 48000))
-+			req_48kHz_rate = req_rate[i];
-+	}
- 
- 	/*
- 	 * This driver is assuming that AUDIO_CLKA/AUDIO_CLKB/AUDIO_CLKC
-@@ -505,10 +517,8 @@ static void rsnd_adg_get_clkout(struct r
- 				rbgb = rbgx;
- 				adg->rbgb_rate_for_48khz = rate / div;
- 				ckr |= brg_table[i] << 16;
--				if (req_48kHz_rate) {
-+				if (req_48kHz_rate)
- 					parent_clk_name = __clk_get_name(clk);
--					ckr |= 0x80000000;
--				}
- 			}
- 		}
- 	}
-@@ -523,7 +533,7 @@ static void rsnd_adg_get_clkout(struct r
- 	 */
- 	if (!count) {
- 		clk = clk_register_fixed_rate(dev, clkout_name[CLKOUT],
--					      parent_clk_name, 0, req_rate);
-+					      parent_clk_name, 0, req_rate[0]);
- 		if (!IS_ERR(clk)) {
- 			adg->clkout[CLKOUT] = clk;
- 			of_clk_add_provider(np, of_clk_src_simple_get, clk);
-@@ -536,7 +546,7 @@ static void rsnd_adg_get_clkout(struct r
- 		for (i = 0; i < CLKOUTMAX; i++) {
- 			clk = clk_register_fixed_rate(dev, clkout_name[i],
- 						      parent_clk_name, 0,
--						      req_rate);
-+						      req_rate[0]);
- 			adg->clkout[i] = ERR_PTR(-ENOENT);
- 			if (!IS_ERR(clk))
- 				adg->clkout[i] = clk;
-@@ -551,6 +561,9 @@ static void rsnd_adg_get_clkout(struct r
- 	adg->rbga = rbga;
- 	adg->rbgb = rbgb;
- 
-+	if (req_rate[0] % 48000 == 0)
-+		adg->flags = AUDIO_OUT_48;
-+
- 	for_each_rsnd_clkout(clk, adg, i)
- 		dev_dbg(dev, "clkout %d : %p : %ld\n", i, clk, clk_get_rate(clk));
- 	dev_dbg(dev, "BRGCKR = 0x%08x, BRRA/BRRB = 0x%x/0x%x\n",
diff --git a/patches.renesas/0099-clocksource-drivers-ostm-Document-renesas-ostm-timer.patch b/patches.renesas/0099-clocksource-drivers-ostm-Document-renesas-ostm-timer.patch
deleted file mode 100644
index 465dc0950f57f9..00000000000000
--- a/patches.renesas/0099-clocksource-drivers-ostm-Document-renesas-ostm-timer.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 85354f1d98b2cc8f4969b23601a8ee19a6693aca Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Fri, 27 Jan 2017 15:02:14 -0500
-Subject: [PATCH 099/255] clocksource/drivers/ostm: Document renesas-ostm timer
- DT bindings
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-(cherry picked from commit a1966cd29d5fee2fada47b82dcb73126eb65dfd4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/timer/renesas,ostm.txt |   30 +++++++++++++++
- 1 file changed, 30 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/timer/renesas,ostm.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/timer/renesas,ostm.txt
-@@ -0,0 +1,30 @@
-+* Renesas OS Timer (OSTM)
-+
-+The OSTM is a multi-channel 32-bit timer/counter with fixed clock
-+source that can operate in either interval count down timer or free-running
-+compare match mode.
-+
-+Channels are independent from each other.
-+
-+Required Properties:
-+
-+  - compatible: must be one or more of the following:
-+    - "renesas,r7s72100-ostm" for the r7s72100 OSTM
-+    - "renesas,ostm" for any OSTM
-+		This is a fallback for the above renesas,*-ostm entries
-+
-+  - reg: base address and length of the register block for a timer channel.
-+
-+  - interrupts: interrupt specifier for the timer channel.
-+
-+  - clocks: clock specifier for the timer channel.
-+
-+Example: R7S72100 (RZ/A1H) OSTM node
-+
-+	ostm0: timer@fcfec000 {
-+		compatible = "renesas,r7s72100-ostm", "renesas,ostm";
-+		reg = <0xfcfec000 0x30>;
-+		interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;
-+		clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;
-+		power-domains = <&cpg_clocks>;
-+	};
diff --git a/patches.renesas/0099-pinctrl-sh-pfc-r8a7778-Use-lookup-function-for-bias-.patch b/patches.renesas/0099-pinctrl-sh-pfc-r8a7778-Use-lookup-function-for-bias-.patch
deleted file mode 100644
index 8f6ee545ecd165..00000000000000
--- a/patches.renesas/0099-pinctrl-sh-pfc-r8a7778-Use-lookup-function-for-bias-.patch
+++ /dev/null
@@ -1,404 +0,0 @@
-From 2b28d9df2de0c95ba90ea67f1d3d48d593e9a255 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Sat, 12 Nov 2016 17:04:28 +0100
-Subject: [PATCH 099/299] pinctrl: sh-pfc: r8a7778: Use lookup function for
- bias data
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Change the data structure and use the generic sh_pfc_pin_to_bias_info()
-function to get the register offset and bit information.
-
-Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 5c296f69ab71c9a91bc7992b549eda824dfc4a43)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c |  342 +++++++++++++++++------------------
- 1 file changed, 172 insertions(+), 170 deletions(-)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -24,6 +24,7 @@
- #include <linux/kernel.h>
- #include <linux/pinctrl/pinconf-generic.h>
- 
-+#include "core.h"
- #include "sh_pfc.h"
- 
- #define PORT_GP_PUP_1(bank, pin, fn, sfx)	\
-@@ -2918,183 +2919,182 @@ static const struct pinmux_cfg_reg pinmu
- #define PUPR4	0x110
- #define PUPR5	0x114
- 
--static const struct {
--	u16 reg : 11;
--	u16 bit : 5;
--} pullups[] = {
--	[RCAR_GP_PIN(0,  6)] = { PUPR0,  0 },	/* A0 */
--	[RCAR_GP_PIN(0,  7)] = { PUPR0,  1 },	/* A1 */
--	[RCAR_GP_PIN(0,  8)] = { PUPR0,  2 },	/* A2 */
--	[RCAR_GP_PIN(0,  9)] = { PUPR0,  3 },	/* A3 */
--	[RCAR_GP_PIN(0, 10)] = { PUPR0,  4 },	/* A4 */
--	[RCAR_GP_PIN(0, 11)] = { PUPR0,  5 },	/* A5 */
--	[RCAR_GP_PIN(0, 12)] = { PUPR0,  6 },	/* A6 */
--	[RCAR_GP_PIN(0, 13)] = { PUPR0,  7 },	/* A7 */
--	[RCAR_GP_PIN(0, 14)] = { PUPR0,  8 },	/* A8 */
--	[RCAR_GP_PIN(0, 15)] = { PUPR0,  9 },	/* A9 */
--	[RCAR_GP_PIN(0, 16)] = { PUPR0, 10 },	/* A10 */
--	[RCAR_GP_PIN(0, 17)] = { PUPR0, 11 },	/* A11 */
--	[RCAR_GP_PIN(0, 18)] = { PUPR0, 12 },	/* A12 */
--	[RCAR_GP_PIN(0, 19)] = { PUPR0, 13 },	/* A13 */
--	[RCAR_GP_PIN(0, 20)] = { PUPR0, 14 },	/* A14 */
--	[RCAR_GP_PIN(0, 21)] = { PUPR0, 15 },	/* A15 */
--	[RCAR_GP_PIN(0, 22)] = { PUPR0, 16 },	/* A16 */
--	[RCAR_GP_PIN(0, 23)] = { PUPR0, 17 },	/* A17 */
--	[RCAR_GP_PIN(0, 24)] = { PUPR0, 18 },	/* A18 */
--	[RCAR_GP_PIN(0, 25)] = { PUPR0, 19 },	/* A19 */
--	[RCAR_GP_PIN(0, 26)] = { PUPR0, 20 },	/* A20 */
--	[RCAR_GP_PIN(0, 27)] = { PUPR0, 21 },	/* A21 */
--	[RCAR_GP_PIN(0, 28)] = { PUPR0, 22 },	/* A22 */
--	[RCAR_GP_PIN(0, 29)] = { PUPR0, 23 },	/* A23 */
--	[RCAR_GP_PIN(0, 30)] = { PUPR0, 24 },	/* A24 */
--	[RCAR_GP_PIN(0, 31)] = { PUPR0, 25 },	/* A25 */
--	[RCAR_GP_PIN(1,  3)] = { PUPR0, 26 },	/* /EX_CS0 */
--	[RCAR_GP_PIN(1,  4)] = { PUPR0, 27 },	/* /EX_CS1 */
--	[RCAR_GP_PIN(1,  5)] = { PUPR0, 28 },	/* /EX_CS2 */
--	[RCAR_GP_PIN(1,  6)] = { PUPR0, 29 },	/* /EX_CS3 */
--	[RCAR_GP_PIN(1,  7)] = { PUPR0, 30 },	/* /EX_CS4 */
--	[RCAR_GP_PIN(1,  8)] = { PUPR0, 31 },	/* /EX_CS5 */
--
--	[RCAR_GP_PIN(0,  0)] = { PUPR1,  0 },	/* /PRESETOUT	*/
--	[RCAR_GP_PIN(0,  5)] = { PUPR1,  1 },	/* /BS		*/
--	[RCAR_GP_PIN(1,  0)] = { PUPR1,  2 },	/* RD//WR	*/
--	[RCAR_GP_PIN(1,  1)] = { PUPR1,  3 },	/* /WE0		*/
--	[RCAR_GP_PIN(1,  2)] = { PUPR1,  4 },	/* /WE1		*/
--	[RCAR_GP_PIN(1, 11)] = { PUPR1,  5 },	/* EX_WAIT0	*/
--	[RCAR_GP_PIN(1,  9)] = { PUPR1,  6 },	/* DREQ0	*/
--	[RCAR_GP_PIN(1, 10)] = { PUPR1,  7 },	/* DACK0	*/
--	[RCAR_GP_PIN(1, 12)] = { PUPR1,  8 },	/* IRQ0		*/
--	[RCAR_GP_PIN(1, 13)] = { PUPR1,  9 },	/* IRQ1		*/
--
--	[RCAR_GP_PIN(1, 22)] = { PUPR2,  0 },	/* DU0_DR0	*/
--	[RCAR_GP_PIN(1, 23)] = { PUPR2,  1 },	/* DU0_DR1	*/
--	[RCAR_GP_PIN(1, 24)] = { PUPR2,  2 },	/* DU0_DR2	*/
--	[RCAR_GP_PIN(1, 25)] = { PUPR2,  3 },	/* DU0_DR3	*/
--	[RCAR_GP_PIN(1, 26)] = { PUPR2,  4 },	/* DU0_DR4	*/
--	[RCAR_GP_PIN(1, 27)] = { PUPR2,  5 },	/* DU0_DR5	*/
--	[RCAR_GP_PIN(1, 28)] = { PUPR2,  6 },	/* DU0_DR6	*/
--	[RCAR_GP_PIN(1, 29)] = { PUPR2,  7 },	/* DU0_DR7	*/
--	[RCAR_GP_PIN(1, 30)] = { PUPR2,  8 },	/* DU0_DG0	*/
--	[RCAR_GP_PIN(1, 31)] = { PUPR2,  9 },	/* DU0_DG1	*/
--	[RCAR_GP_PIN(2,  0)] = { PUPR2, 10 },	/* DU0_DG2	*/
--	[RCAR_GP_PIN(2,  1)] = { PUPR2, 11 },	/* DU0_DG3	*/
--	[RCAR_GP_PIN(2,  2)] = { PUPR2, 12 },	/* DU0_DG4	*/
--	[RCAR_GP_PIN(2,  3)] = { PUPR2, 13 },	/* DU0_DG5	*/
--	[RCAR_GP_PIN(2,  4)] = { PUPR2, 14 },	/* DU0_DG6	*/
--	[RCAR_GP_PIN(2,  5)] = { PUPR2, 15 },	/* DU0_DG7	*/
--	[RCAR_GP_PIN(2,  6)] = { PUPR2, 16 },	/* DU0_DB0	*/
--	[RCAR_GP_PIN(2,  7)] = { PUPR2, 17 },	/* DU0_DB1	*/
--	[RCAR_GP_PIN(2,  8)] = { PUPR2, 18 },	/* DU0_DB2	*/
--	[RCAR_GP_PIN(2,  9)] = { PUPR2, 19 },	/* DU0_DB3	*/
--	[RCAR_GP_PIN(2, 10)] = { PUPR2, 20 },	/* DU0_DB4	*/
--	[RCAR_GP_PIN(2, 11)] = { PUPR2, 21 },	/* DU0_DB5	*/
--	[RCAR_GP_PIN(2, 12)] = { PUPR2, 22 },	/* DU0_DB6	*/
--	[RCAR_GP_PIN(2, 13)] = { PUPR2, 23 },	/* DU0_DB7	*/
--	[RCAR_GP_PIN(2, 14)] = { PUPR2, 24 },	/* DU0_DOTCLKIN	*/
--	[RCAR_GP_PIN(2, 15)] = { PUPR2, 25 },	/* DU0_DOTCLKOUT0 */
--	[RCAR_GP_PIN(2, 17)] = { PUPR2, 26 },	/* DU0_HSYNC	*/
--	[RCAR_GP_PIN(2, 18)] = { PUPR2, 27 },	/* DU0_VSYNC	*/
--	[RCAR_GP_PIN(2, 19)] = { PUPR2, 28 },	/* DU0_EXODDF	*/
--	[RCAR_GP_PIN(2, 20)] = { PUPR2, 29 },	/* DU0_DISP	*/
--	[RCAR_GP_PIN(2, 21)] = { PUPR2, 30 },	/* DU0_CDE	*/
--	[RCAR_GP_PIN(2, 16)] = { PUPR2, 31 },	/* DU0_DOTCLKOUT1 */
--
--	[RCAR_GP_PIN(3, 24)] = { PUPR3,  0 },	/* VI0_CLK	*/
--	[RCAR_GP_PIN(3, 25)] = { PUPR3,  1 },	/* VI0_CLKENB	*/
--	[RCAR_GP_PIN(3, 26)] = { PUPR3,  2 },	/* VI0_FIELD	*/
--	[RCAR_GP_PIN(3, 27)] = { PUPR3,  3 },	/* /VI0_HSYNC	*/
--	[RCAR_GP_PIN(3, 28)] = { PUPR3,  4 },	/* /VI0_VSYNC	*/
--	[RCAR_GP_PIN(3, 29)] = { PUPR3,  5 },	/* VI0_DATA0	*/
--	[RCAR_GP_PIN(3, 30)] = { PUPR3,  6 },	/* VI0_DATA1	*/
--	[RCAR_GP_PIN(3, 31)] = { PUPR3,  7 },	/* VI0_DATA2	*/
--	[RCAR_GP_PIN(4,  0)] = { PUPR3,  8 },	/* VI0_DATA3	*/
--	[RCAR_GP_PIN(4,  1)] = { PUPR3,  9 },	/* VI0_DATA4	*/
--	[RCAR_GP_PIN(4,  2)] = { PUPR3, 10 },	/* VI0_DATA5	*/
--	[RCAR_GP_PIN(4,  3)] = { PUPR3, 11 },	/* VI0_DATA6	*/
--	[RCAR_GP_PIN(4,  4)] = { PUPR3, 12 },	/* VI0_DATA7	*/
--	[RCAR_GP_PIN(4,  5)] = { PUPR3, 13 },	/* VI0_G2	*/
--	[RCAR_GP_PIN(4,  6)] = { PUPR3, 14 },	/* VI0_G3	*/
--	[RCAR_GP_PIN(4,  7)] = { PUPR3, 15 },	/* VI0_G4	*/
--	[RCAR_GP_PIN(4,  8)] = { PUPR3, 16 },	/* VI0_G5	*/
--	[RCAR_GP_PIN(4, 21)] = { PUPR3, 17 },	/* VI1_DATA12	*/
--	[RCAR_GP_PIN(4, 22)] = { PUPR3, 18 },	/* VI1_DATA13	*/
--	[RCAR_GP_PIN(4, 23)] = { PUPR3, 19 },	/* VI1_DATA14	*/
--	[RCAR_GP_PIN(4, 24)] = { PUPR3, 20 },	/* VI1_DATA15	*/
--	[RCAR_GP_PIN(4,  9)] = { PUPR3, 21 },	/* ETH_REF_CLK	*/
--	[RCAR_GP_PIN(4, 10)] = { PUPR3, 22 },	/* ETH_TXD0	*/
--	[RCAR_GP_PIN(4, 11)] = { PUPR3, 23 },	/* ETH_TXD1	*/
--	[RCAR_GP_PIN(4, 12)] = { PUPR3, 24 },	/* ETH_CRS_DV	*/
--	[RCAR_GP_PIN(4, 13)] = { PUPR3, 25 },	/* ETH_TX_EN	*/
--	[RCAR_GP_PIN(4, 14)] = { PUPR3, 26 },	/* ETH_RX_ER	*/
--	[RCAR_GP_PIN(4, 15)] = { PUPR3, 27 },	/* ETH_RXD0	*/
--	[RCAR_GP_PIN(4, 16)] = { PUPR3, 28 },	/* ETH_RXD1	*/
--	[RCAR_GP_PIN(4, 17)] = { PUPR3, 29 },	/* ETH_MDC	*/
--	[RCAR_GP_PIN(4, 18)] = { PUPR3, 30 },	/* ETH_MDIO	*/
--	[RCAR_GP_PIN(4, 19)] = { PUPR3, 31 },	/* ETH_LINK	*/
--
--	[RCAR_GP_PIN(3,  6)] = { PUPR4,  0 },	/* SSI_SCK012	*/
--	[RCAR_GP_PIN(3,  7)] = { PUPR4,  1 },	/* SSI_WS012	*/
--	[RCAR_GP_PIN(3, 10)] = { PUPR4,  2 },	/* SSI_SDATA0	*/
--	[RCAR_GP_PIN(3,  9)] = { PUPR4,  3 },	/* SSI_SDATA1	*/
--	[RCAR_GP_PIN(3,  8)] = { PUPR4,  4 },	/* SSI_SDATA2	*/
--	[RCAR_GP_PIN(3,  2)] = { PUPR4,  5 },	/* SSI_SCK34	*/
--	[RCAR_GP_PIN(3,  3)] = { PUPR4,  6 },	/* SSI_WS34	*/
--	[RCAR_GP_PIN(3,  5)] = { PUPR4,  7 },	/* SSI_SDATA3	*/
--	[RCAR_GP_PIN(3,  4)] = { PUPR4,  8 },	/* SSI_SDATA4	*/
--	[RCAR_GP_PIN(2, 31)] = { PUPR4,  9 },	/* SSI_SCK5	*/
--	[RCAR_GP_PIN(3,  0)] = { PUPR4, 10 },	/* SSI_WS5	*/
--	[RCAR_GP_PIN(3,  1)] = { PUPR4, 11 },	/* SSI_SDATA5	*/
--	[RCAR_GP_PIN(2, 28)] = { PUPR4, 12 },	/* SSI_SCK6	*/
--	[RCAR_GP_PIN(2, 29)] = { PUPR4, 13 },	/* SSI_WS6	*/
--	[RCAR_GP_PIN(2, 30)] = { PUPR4, 14 },	/* SSI_SDATA6	*/
--	[RCAR_GP_PIN(2, 24)] = { PUPR4, 15 },	/* SSI_SCK78	*/
--	[RCAR_GP_PIN(2, 25)] = { PUPR4, 16 },	/* SSI_WS78	*/
--	[RCAR_GP_PIN(2, 27)] = { PUPR4, 17 },	/* SSI_SDATA7	*/
--	[RCAR_GP_PIN(2, 26)] = { PUPR4, 18 },	/* SSI_SDATA8	*/
--	[RCAR_GP_PIN(3, 23)] = { PUPR4, 19 },	/* TCLK0	*/
--	[RCAR_GP_PIN(3, 11)] = { PUPR4, 20 },	/* SD0_CLK	*/
--	[RCAR_GP_PIN(3, 12)] = { PUPR4, 21 },	/* SD0_CMD	*/
--	[RCAR_GP_PIN(3, 13)] = { PUPR4, 22 },	/* SD0_DAT0	*/
--	[RCAR_GP_PIN(3, 14)] = { PUPR4, 23 },	/* SD0_DAT1	*/
--	[RCAR_GP_PIN(3, 15)] = { PUPR4, 24 },	/* SD0_DAT2	*/
--	[RCAR_GP_PIN(3, 16)] = { PUPR4, 25 },	/* SD0_DAT3	*/
--	[RCAR_GP_PIN(3, 17)] = { PUPR4, 26 },	/* SD0_CD	*/
--	[RCAR_GP_PIN(3, 18)] = { PUPR4, 27 },	/* SD0_WP	*/
--	[RCAR_GP_PIN(2, 22)] = { PUPR4, 28 },	/* AUDIO_CLKA	*/
--	[RCAR_GP_PIN(2, 23)] = { PUPR4, 29 },	/* AUDIO_CLKB	*/
--	[RCAR_GP_PIN(1, 14)] = { PUPR4, 30 },	/* IRQ2		*/
--	[RCAR_GP_PIN(1, 15)] = { PUPR4, 31 },	/* IRQ3		*/
--
--	[RCAR_GP_PIN(0,  1)] = { PUPR5,  0 },	/* PENC0	*/
--	[RCAR_GP_PIN(0,  2)] = { PUPR5,  1 },	/* PENC1	*/
--	[RCAR_GP_PIN(0,  3)] = { PUPR5,  2 },	/* USB_OVC0	*/
--	[RCAR_GP_PIN(0,  4)] = { PUPR5,  3 },	/* USB_OVC1	*/
--	[RCAR_GP_PIN(1, 16)] = { PUPR5,  4 },	/* SCIF_CLK	*/
--	[RCAR_GP_PIN(1, 17)] = { PUPR5,  5 },	/* TX0		*/
--	[RCAR_GP_PIN(1, 18)] = { PUPR5,  6 },	/* RX0		*/
--	[RCAR_GP_PIN(1, 19)] = { PUPR5,  7 },	/* SCK0		*/
--	[RCAR_GP_PIN(1, 20)] = { PUPR5,  8 },	/* /CTS0	*/
--	[RCAR_GP_PIN(1, 21)] = { PUPR5,  9 },	/* /RTS0	*/
--	[RCAR_GP_PIN(3, 19)] = { PUPR5, 10 },	/* HSPI_CLK0	*/
--	[RCAR_GP_PIN(3, 20)] = { PUPR5, 11 },	/* /HSPI_CS0	*/
--	[RCAR_GP_PIN(3, 21)] = { PUPR5, 12 },	/* HSPI_RX0	*/
--	[RCAR_GP_PIN(3, 22)] = { PUPR5, 13 },	/* HSPI_TX0	*/
--	[RCAR_GP_PIN(4, 20)] = { PUPR5, 14 },	/* ETH_MAGIC	*/
--	[RCAR_GP_PIN(4, 25)] = { PUPR5, 15 },	/* AVS1		*/
--	[RCAR_GP_PIN(4, 26)] = { PUPR5, 16 },	/* AVS2		*/
-+static const struct sh_pfc_bias_info bias_info[] = {
-+	{ RCAR_GP_PIN(0,  6), PUPR0,  0 },	/* A0 */
-+	{ RCAR_GP_PIN(0,  7), PUPR0,  1 },	/* A1 */
-+	{ RCAR_GP_PIN(0,  8), PUPR0,  2 },	/* A2 */
-+	{ RCAR_GP_PIN(0,  9), PUPR0,  3 },	/* A3 */
-+	{ RCAR_GP_PIN(0, 10), PUPR0,  4 },	/* A4 */
-+	{ RCAR_GP_PIN(0, 11), PUPR0,  5 },	/* A5 */
-+	{ RCAR_GP_PIN(0, 12), PUPR0,  6 },	/* A6 */
-+	{ RCAR_GP_PIN(0, 13), PUPR0,  7 },	/* A7 */
-+	{ RCAR_GP_PIN(0, 14), PUPR0,  8 },	/* A8 */
-+	{ RCAR_GP_PIN(0, 15), PUPR0,  9 },	/* A9 */
-+	{ RCAR_GP_PIN(0, 16), PUPR0, 10 },	/* A10 */
-+	{ RCAR_GP_PIN(0, 17), PUPR0, 11 },	/* A11 */
-+	{ RCAR_GP_PIN(0, 18), PUPR0, 12 },	/* A12 */
-+	{ RCAR_GP_PIN(0, 19), PUPR0, 13 },	/* A13 */
-+	{ RCAR_GP_PIN(0, 20), PUPR0, 14 },	/* A14 */
-+	{ RCAR_GP_PIN(0, 21), PUPR0, 15 },	/* A15 */
-+	{ RCAR_GP_PIN(0, 22), PUPR0, 16 },	/* A16 */
-+	{ RCAR_GP_PIN(0, 23), PUPR0, 17 },	/* A17 */
-+	{ RCAR_GP_PIN(0, 24), PUPR0, 18 },	/* A18 */
-+	{ RCAR_GP_PIN(0, 25), PUPR0, 19 },	/* A19 */
-+	{ RCAR_GP_PIN(0, 26), PUPR0, 20 },	/* A20 */
-+	{ RCAR_GP_PIN(0, 27), PUPR0, 21 },	/* A21 */
-+	{ RCAR_GP_PIN(0, 28), PUPR0, 22 },	/* A22 */
-+	{ RCAR_GP_PIN(0, 29), PUPR0, 23 },	/* A23 */
-+	{ RCAR_GP_PIN(0, 30), PUPR0, 24 },	/* A24 */
-+	{ RCAR_GP_PIN(0, 31), PUPR0, 25 },	/* A25 */
-+	{ RCAR_GP_PIN(1,  3), PUPR0, 26 },	/* /EX_CS0 */
-+	{ RCAR_GP_PIN(1,  4), PUPR0, 27 },	/* /EX_CS1 */
-+	{ RCAR_GP_PIN(1,  5), PUPR0, 28 },	/* /EX_CS2 */
-+	{ RCAR_GP_PIN(1,  6), PUPR0, 29 },	/* /EX_CS3 */
-+	{ RCAR_GP_PIN(1,  7), PUPR0, 30 },	/* /EX_CS4 */
-+	{ RCAR_GP_PIN(1,  8), PUPR0, 31 },	/* /EX_CS5 */
-+
-+	{ RCAR_GP_PIN(0,  0), PUPR1,  0 },	/* /PRESETOUT	*/
-+	{ RCAR_GP_PIN(0,  5), PUPR1,  1 },	/* /BS		*/
-+	{ RCAR_GP_PIN(1,  0), PUPR1,  2 },	/* RD//WR	*/
-+	{ RCAR_GP_PIN(1,  1), PUPR1,  3 },	/* /WE0		*/
-+	{ RCAR_GP_PIN(1,  2), PUPR1,  4 },	/* /WE1		*/
-+	{ RCAR_GP_PIN(1, 11), PUPR1,  5 },	/* EX_WAIT0	*/
-+	{ RCAR_GP_PIN(1,  9), PUPR1,  6 },	/* DREQ0	*/
-+	{ RCAR_GP_PIN(1, 10), PUPR1,  7 },	/* DACK0	*/
-+	{ RCAR_GP_PIN(1, 12), PUPR1,  8 },	/* IRQ0		*/
-+	{ RCAR_GP_PIN(1, 13), PUPR1,  9 },	/* IRQ1		*/
-+
-+	{ RCAR_GP_PIN(1, 22), PUPR2,  0 },	/* DU0_DR0	*/
-+	{ RCAR_GP_PIN(1, 23), PUPR2,  1 },	/* DU0_DR1	*/
-+	{ RCAR_GP_PIN(1, 24), PUPR2,  2 },	/* DU0_DR2	*/
-+	{ RCAR_GP_PIN(1, 25), PUPR2,  3 },	/* DU0_DR3	*/
-+	{ RCAR_GP_PIN(1, 26), PUPR2,  4 },	/* DU0_DR4	*/
-+	{ RCAR_GP_PIN(1, 27), PUPR2,  5 },	/* DU0_DR5	*/
-+	{ RCAR_GP_PIN(1, 28), PUPR2,  6 },	/* DU0_DR6	*/
-+	{ RCAR_GP_PIN(1, 29), PUPR2,  7 },	/* DU0_DR7	*/
-+	{ RCAR_GP_PIN(1, 30), PUPR2,  8 },	/* DU0_DG0	*/
-+	{ RCAR_GP_PIN(1, 31), PUPR2,  9 },	/* DU0_DG1	*/
-+	{ RCAR_GP_PIN(2,  0), PUPR2, 10 },	/* DU0_DG2	*/
-+	{ RCAR_GP_PIN(2,  1), PUPR2, 11 },	/* DU0_DG3	*/
-+	{ RCAR_GP_PIN(2,  2), PUPR2, 12 },	/* DU0_DG4	*/
-+	{ RCAR_GP_PIN(2,  3), PUPR2, 13 },	/* DU0_DG5	*/
-+	{ RCAR_GP_PIN(2,  4), PUPR2, 14 },	/* DU0_DG6	*/
-+	{ RCAR_GP_PIN(2,  5), PUPR2, 15 },	/* DU0_DG7	*/
-+	{ RCAR_GP_PIN(2,  6), PUPR2, 16 },	/* DU0_DB0	*/
-+	{ RCAR_GP_PIN(2,  7), PUPR2, 17 },	/* DU0_DB1	*/
-+	{ RCAR_GP_PIN(2,  8), PUPR2, 18 },	/* DU0_DB2	*/
-+	{ RCAR_GP_PIN(2,  9), PUPR2, 19 },	/* DU0_DB3	*/
-+	{ RCAR_GP_PIN(2, 10), PUPR2, 20 },	/* DU0_DB4	*/
-+	{ RCAR_GP_PIN(2, 11), PUPR2, 21 },	/* DU0_DB5	*/
-+	{ RCAR_GP_PIN(2, 12), PUPR2, 22 },	/* DU0_DB6	*/
-+	{ RCAR_GP_PIN(2, 13), PUPR2, 23 },	/* DU0_DB7	*/
-+	{ RCAR_GP_PIN(2, 14), PUPR2, 24 },	/* DU0_DOTCLKIN	*/
-+	{ RCAR_GP_PIN(2, 15), PUPR2, 25 },	/* DU0_DOTCLKOUT0 */
-+	{ RCAR_GP_PIN(2, 17), PUPR2, 26 },	/* DU0_HSYNC	*/
-+	{ RCAR_GP_PIN(2, 18), PUPR2, 27 },	/* DU0_VSYNC	*/
-+	{ RCAR_GP_PIN(2, 19), PUPR2, 28 },	/* DU0_EXODDF	*/
-+	{ RCAR_GP_PIN(2, 20), PUPR2, 29 },	/* DU0_DISP	*/
-+	{ RCAR_GP_PIN(2, 21), PUPR2, 30 },	/* DU0_CDE	*/
-+	{ RCAR_GP_PIN(2, 16), PUPR2, 31 },	/* DU0_DOTCLKOUT1 */
-+
-+	{ RCAR_GP_PIN(3, 24), PUPR3,  0 },	/* VI0_CLK	*/
-+	{ RCAR_GP_PIN(3, 25), PUPR3,  1 },	/* VI0_CLKENB	*/
-+	{ RCAR_GP_PIN(3, 26), PUPR3,  2 },	/* VI0_FIELD	*/
-+	{ RCAR_GP_PIN(3, 27), PUPR3,  3 },	/* /VI0_HSYNC	*/
-+	{ RCAR_GP_PIN(3, 28), PUPR3,  4 },	/* /VI0_VSYNC	*/
-+	{ RCAR_GP_PIN(3, 29), PUPR3,  5 },	/* VI0_DATA0	*/
-+	{ RCAR_GP_PIN(3, 30), PUPR3,  6 },	/* VI0_DATA1	*/
-+	{ RCAR_GP_PIN(3, 31), PUPR3,  7 },	/* VI0_DATA2	*/
-+	{ RCAR_GP_PIN(4,  0), PUPR3,  8 },	/* VI0_DATA3	*/
-+	{ RCAR_GP_PIN(4,  1), PUPR3,  9 },	/* VI0_DATA4	*/
-+	{ RCAR_GP_PIN(4,  2), PUPR3, 10 },	/* VI0_DATA5	*/
-+	{ RCAR_GP_PIN(4,  3), PUPR3, 11 },	/* VI0_DATA6	*/
-+	{ RCAR_GP_PIN(4,  4), PUPR3, 12 },	/* VI0_DATA7	*/
-+	{ RCAR_GP_PIN(4,  5), PUPR3, 13 },	/* VI0_G2	*/
-+	{ RCAR_GP_PIN(4,  6), PUPR3, 14 },	/* VI0_G3	*/
-+	{ RCAR_GP_PIN(4,  7), PUPR3, 15 },	/* VI0_G4	*/
-+	{ RCAR_GP_PIN(4,  8), PUPR3, 16 },	/* VI0_G5	*/
-+	{ RCAR_GP_PIN(4, 21), PUPR3, 17 },	/* VI1_DATA12	*/
-+	{ RCAR_GP_PIN(4, 22), PUPR3, 18 },	/* VI1_DATA13	*/
-+	{ RCAR_GP_PIN(4, 23), PUPR3, 19 },	/* VI1_DATA14	*/
-+	{ RCAR_GP_PIN(4, 24), PUPR3, 20 },	/* VI1_DATA15	*/
-+	{ RCAR_GP_PIN(4,  9), PUPR3, 21 },	/* ETH_REF_CLK	*/
-+	{ RCAR_GP_PIN(4, 10), PUPR3, 22 },	/* ETH_TXD0	*/
-+	{ RCAR_GP_PIN(4, 11), PUPR3, 23 },	/* ETH_TXD1	*/
-+	{ RCAR_GP_PIN(4, 12), PUPR3, 24 },	/* ETH_CRS_DV	*/
-+	{ RCAR_GP_PIN(4, 13), PUPR3, 25 },	/* ETH_TX_EN	*/
-+	{ RCAR_GP_PIN(4, 14), PUPR3, 26 },	/* ETH_RX_ER	*/
-+	{ RCAR_GP_PIN(4, 15), PUPR3, 27 },	/* ETH_RXD0	*/
-+	{ RCAR_GP_PIN(4, 16), PUPR3, 28 },	/* ETH_RXD1	*/
-+	{ RCAR_GP_PIN(4, 17), PUPR3, 29 },	/* ETH_MDC	*/
-+	{ RCAR_GP_PIN(4, 18), PUPR3, 30 },	/* ETH_MDIO	*/
-+	{ RCAR_GP_PIN(4, 19), PUPR3, 31 },	/* ETH_LINK	*/
-+
-+	{ RCAR_GP_PIN(3,  6), PUPR4,  0 },	/* SSI_SCK012	*/
-+	{ RCAR_GP_PIN(3,  7), PUPR4,  1 },	/* SSI_WS012	*/
-+	{ RCAR_GP_PIN(3, 10), PUPR4,  2 },	/* SSI_SDATA0	*/
-+	{ RCAR_GP_PIN(3,  9), PUPR4,  3 },	/* SSI_SDATA1	*/
-+	{ RCAR_GP_PIN(3,  8), PUPR4,  4 },	/* SSI_SDATA2	*/
-+	{ RCAR_GP_PIN(3,  2), PUPR4,  5 },	/* SSI_SCK34	*/
-+	{ RCAR_GP_PIN(3,  3), PUPR4,  6 },	/* SSI_WS34	*/
-+	{ RCAR_GP_PIN(3,  5), PUPR4,  7 },	/* SSI_SDATA3	*/
-+	{ RCAR_GP_PIN(3,  4), PUPR4,  8 },	/* SSI_SDATA4	*/
-+	{ RCAR_GP_PIN(2, 31), PUPR4,  9 },	/* SSI_SCK5	*/
-+	{ RCAR_GP_PIN(3,  0), PUPR4, 10 },	/* SSI_WS5	*/
-+	{ RCAR_GP_PIN(3,  1), PUPR4, 11 },	/* SSI_SDATA5	*/
-+	{ RCAR_GP_PIN(2, 28), PUPR4, 12 },	/* SSI_SCK6	*/
-+	{ RCAR_GP_PIN(2, 29), PUPR4, 13 },	/* SSI_WS6	*/
-+	{ RCAR_GP_PIN(2, 30), PUPR4, 14 },	/* SSI_SDATA6	*/
-+	{ RCAR_GP_PIN(2, 24), PUPR4, 15 },	/* SSI_SCK78	*/
-+	{ RCAR_GP_PIN(2, 25), PUPR4, 16 },	/* SSI_WS78	*/
-+	{ RCAR_GP_PIN(2, 27), PUPR4, 17 },	/* SSI_SDATA7	*/
-+	{ RCAR_GP_PIN(2, 26), PUPR4, 18 },	/* SSI_SDATA8	*/
-+	{ RCAR_GP_PIN(3, 23), PUPR4, 19 },	/* TCLK0	*/
-+	{ RCAR_GP_PIN(3, 11), PUPR4, 20 },	/* SD0_CLK	*/
-+	{ RCAR_GP_PIN(3, 12), PUPR4, 21 },	/* SD0_CMD	*/
-+	{ RCAR_GP_PIN(3, 13), PUPR4, 22 },	/* SD0_DAT0	*/
-+	{ RCAR_GP_PIN(3, 14), PUPR4, 23 },	/* SD0_DAT1	*/
-+	{ RCAR_GP_PIN(3, 15), PUPR4, 24 },	/* SD0_DAT2	*/
-+	{ RCAR_GP_PIN(3, 16), PUPR4, 25 },	/* SD0_DAT3	*/
-+	{ RCAR_GP_PIN(3, 17), PUPR4, 26 },	/* SD0_CD	*/
-+	{ RCAR_GP_PIN(3, 18), PUPR4, 27 },	/* SD0_WP	*/
-+	{ RCAR_GP_PIN(2, 22), PUPR4, 28 },	/* AUDIO_CLKA	*/
-+	{ RCAR_GP_PIN(2, 23), PUPR4, 29 },	/* AUDIO_CLKB	*/
-+	{ RCAR_GP_PIN(1, 14), PUPR4, 30 },	/* IRQ2		*/
-+	{ RCAR_GP_PIN(1, 15), PUPR4, 31 },	/* IRQ3		*/
-+
-+	{ RCAR_GP_PIN(0,  1), PUPR5,  0 },	/* PENC0	*/
-+	{ RCAR_GP_PIN(0,  2), PUPR5,  1 },	/* PENC1	*/
-+	{ RCAR_GP_PIN(0,  3), PUPR5,  2 },	/* USB_OVC0	*/
-+	{ RCAR_GP_PIN(0,  4), PUPR5,  3 },	/* USB_OVC1	*/
-+	{ RCAR_GP_PIN(1, 16), PUPR5,  4 },	/* SCIF_CLK	*/
-+	{ RCAR_GP_PIN(1, 17), PUPR5,  5 },	/* TX0		*/
-+	{ RCAR_GP_PIN(1, 18), PUPR5,  6 },	/* RX0		*/
-+	{ RCAR_GP_PIN(1, 19), PUPR5,  7 },	/* SCK0		*/
-+	{ RCAR_GP_PIN(1, 20), PUPR5,  8 },	/* /CTS0	*/
-+	{ RCAR_GP_PIN(1, 21), PUPR5,  9 },	/* /RTS0	*/
-+	{ RCAR_GP_PIN(3, 19), PUPR5, 10 },	/* HSPI_CLK0	*/
-+	{ RCAR_GP_PIN(3, 20), PUPR5, 11 },	/* /HSPI_CS0	*/
-+	{ RCAR_GP_PIN(3, 21), PUPR5, 12 },	/* HSPI_RX0	*/
-+	{ RCAR_GP_PIN(3, 22), PUPR5, 13 },	/* HSPI_TX0	*/
-+	{ RCAR_GP_PIN(4, 20), PUPR5, 14 },	/* ETH_MAGIC	*/
-+	{ RCAR_GP_PIN(4, 25), PUPR5, 15 },	/* AVS1		*/
-+	{ RCAR_GP_PIN(4, 26), PUPR5, 16 },	/* AVS2		*/
- };
- 
- static unsigned int r8a7778_pinmux_get_bias(struct sh_pfc *pfc,
- 					    unsigned int pin)
- {
-+	const struct sh_pfc_bias_info *info;
- 	void __iomem *addr;
- 
--	if (WARN_ON_ONCE(!pullups[pin].reg))
-+	info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
-+	if (!info)
- 		return PIN_CONFIG_BIAS_DISABLE;
- 
--	addr = pfc->windows->virt + pullups[pin].reg;
-+	addr = pfc->windows->virt + info->reg;
- 
--	if (ioread32(addr) & BIT(pullups[pin].bit))
-+	if (ioread32(addr) & BIT(info->bit))
- 		return PIN_CONFIG_BIAS_PULL_UP;
- 	else
- 		return PIN_CONFIG_BIAS_DISABLE;
-@@ -3103,15 +3103,17 @@ static unsigned int r8a7778_pinmux_get_b
- static void r8a7778_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
- 				   unsigned int bias)
- {
-+	const struct sh_pfc_bias_info *info;
- 	void __iomem *addr;
- 	u32 value;
- 	u32 bit;
- 
--	if (WARN_ON_ONCE(!pullups[pin].reg))
-+	info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
-+	if (!info)
- 		return;
- 
--	addr = pfc->windows->virt + pullups[pin].reg;
--	bit = BIT(pullups[pin].bit);
-+	addr = pfc->windows->virt + info->reg;
-+	bit = BIT(info->bit);
- 
- 	value = ioread32(addr) & ~bit;
- 	if (bias == PIN_CONFIG_BIAS_PULL_UP)
diff --git a/patches.renesas/0100-ASoC-rsnd-fix-semicolon.cocci-warnings.patch b/patches.renesas/0100-ASoC-rsnd-fix-semicolon.cocci-warnings.patch
deleted file mode 100644
index 124b8e14ec163e..00000000000000
--- a/patches.renesas/0100-ASoC-rsnd-fix-semicolon.cocci-warnings.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 5f5411d9434584fc9a0baa4033ec6e0e733b2bab Mon Sep 17 00:00:00 2001
-From: kbuild test robot <fengguang.wu@intel.com>
-Date: Fri, 21 Apr 2017 13:02:57 +0800
-Subject: [PATCH 100/286] ASoC: rsnd: fix semicolon.cocci warnings
-
-sound/soc/sh/rcar/adg.c:462:54-55: Unneeded semicolon
-
- Remove unneeded semicolon.
-
-Generated by: scripts/coccinelle/misc/semicolon.cocci
-
-Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 75f9e4adb56fbb8ffaab7d316f0c02df00e4b755)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/adg.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/sound/soc/sh/rcar/adg.c
-+++ b/sound/soc/sh/rcar/adg.c
-@@ -459,7 +459,7 @@ static void rsnd_adg_get_clkout(struct r
- 	 * ADG supports BRRA/BRRB output only
- 	 * this means all clkout0/1/2/3 will be same rate
- 	 */
--	prop = of_find_property(np, "clock-frequency", NULL);;
-+	prop = of_find_property(np, "clock-frequency", NULL);
- 	req_size = prop->length / sizeof(u32);
- 
- 	of_property_read_u32_array(np, "clock-frequency", req_rate, req_size);
diff --git a/patches.renesas/0100-clocksource-drivers-ostm-Add-renesas-ostm-timer-driv.patch b/patches.renesas/0100-clocksource-drivers-ostm-Add-renesas-ostm-timer-driv.patch
deleted file mode 100644
index f42c82eebe7d45..00000000000000
--- a/patches.renesas/0100-clocksource-drivers-ostm-Add-renesas-ostm-timer-driv.patch
+++ /dev/null
@@ -1,328 +0,0 @@
-From 3a270a74650943e0e033f0552536169c5f6966d8 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Fri, 27 Jan 2017 15:02:15 -0500
-Subject: [PATCH 100/255] clocksource/drivers/ostm: Add renesas-ostm timer
- driver
-
-This patch adds a OSTM driver for the Renesas architecture.
-The OS Timer (OSTM) has independent channels that can be
-used as a freerun or interval times.
-This driver uses the first probed device as a clocksource
-and then any additional devices as clock events.
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-(cherry picked from commit fb6002a8268c493435d0e6d0d6ad17873919a7f6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig     |    1 
- drivers/clocksource/Kconfig        |    7 
- drivers/clocksource/Makefile       |    1 
- drivers/clocksource/renesas-ostm.c |  265 +++++++++++++++++++++++++++++++++++++
- 4 files changed, 274 insertions(+)
- create mode 100644 drivers/clocksource/renesas-ostm.c
-
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -57,6 +57,7 @@ config ARCH_R7S72100
- 	select PM
- 	select PM_GENERIC_DOMAINS
- 	select SYS_SUPPORTS_SH_MTU2
-+	select RENESAS_OSTM
- 
- config ARCH_R8A73A4
- 	bool "R-Mobile APE6 (R8A73A40)"
---- a/drivers/clocksource/Kconfig
-+++ b/drivers/clocksource/Kconfig
-@@ -447,6 +447,13 @@ config SH_TIMER_MTU2
- 	  Timer Pulse Unit 2 (MTU2) hardware available on SoCs from Renesas.
- 	  This hardware comes with 16 bit-timer registers.
- 
-+config RENESAS_OSTM
-+	bool "Renesas OSTM timer driver" if COMPILE_TEST
-+	depends on GENERIC_CLOCKEVENTS
-+	select CLKSRC_MMIO
-+	help
-+	  Enables the support for the Renesas OSTM.
-+
- config SH_TIMER_TMU
- 	bool "Renesas TMU timer driver" if COMPILE_TEST
- 	depends on GENERIC_CLOCKEVENTS
---- a/drivers/clocksource/Makefile
-+++ b/drivers/clocksource/Makefile
-@@ -8,6 +8,7 @@ obj-$(CONFIG_CS5535_CLOCK_EVENT_SRC)	+=
- obj-$(CONFIG_CLKSRC_JCORE_PIT)		+= jcore-pit.o
- obj-$(CONFIG_SH_TIMER_CMT)	+= sh_cmt.o
- obj-$(CONFIG_SH_TIMER_MTU2)	+= sh_mtu2.o
-+obj-$(CONFIG_RENESAS_OSTM)	+= renesas-ostm.o
- obj-$(CONFIG_SH_TIMER_TMU)	+= sh_tmu.o
- obj-$(CONFIG_EM_TIMER_STI)	+= em_sti.o
- obj-$(CONFIG_CLKBLD_I8253)	+= i8253.o
---- /dev/null
-+++ b/drivers/clocksource/renesas-ostm.c
-@@ -0,0 +1,265 @@
-+/*
-+ * Renesas Timer Support - OSTM
-+ *
-+ * Copyright (C) 2017 Renesas Electronics America, Inc.
-+ * Copyright (C) 2017 Chris Brandt
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ */
-+
-+#include <linux/of_address.h>
-+#include <linux/of_irq.h>
-+#include <linux/clk.h>
-+#include <linux/clockchips.h>
-+#include <linux/interrupt.h>
-+#include <linux/sched_clock.h>
-+#include <linux/slab.h>
-+
-+/*
-+ * The OSTM contains independent channels.
-+ * The first OSTM channel probed will be set up as a free running
-+ * clocksource. Additionally we will use this clocksource for the system
-+ * schedule timer sched_clock().
-+ *
-+ * The second (or more) channel probed will be set up as an interrupt
-+ * driven clock event.
-+ */
-+
-+struct ostm_device {
-+	void __iomem *base;
-+	unsigned long ticks_per_jiffy;
-+	struct clock_event_device ced;
-+};
-+
-+static void __iomem *system_clock;	/* For sched_clock() */
-+
-+/* OSTM REGISTERS */
-+#define	OSTM_CMP		0x000	/* RW,32 */
-+#define	OSTM_CNT		0x004	/* R,32 */
-+#define	OSTM_TE			0x010	/* R,8 */
-+#define	OSTM_TS			0x014	/* W,8 */
-+#define	OSTM_TT			0x018	/* W,8 */
-+#define	OSTM_CTL		0x020	/* RW,8 */
-+
-+#define	TE			0x01
-+#define	TS			0x01
-+#define	TT			0x01
-+#define	CTL_PERIODIC		0x00
-+#define	CTL_ONESHOT		0x02
-+#define	CTL_FREERUN		0x02
-+
-+static struct ostm_device *ced_to_ostm(struct clock_event_device *ced)
-+{
-+	return container_of(ced, struct ostm_device, ced);
-+}
-+
-+static void ostm_timer_stop(struct ostm_device *ostm)
-+{
-+	if (readb(ostm->base + OSTM_TE) & TE) {
-+		writeb(TT, ostm->base + OSTM_TT);
-+
-+		/*
-+		 * Read back the register simply to confirm the write operation
-+		 * has completed since I/O writes can sometimes get queued by
-+		 * the bus architecture.
-+		 */
-+		while (readb(ostm->base + OSTM_TE) & TE)
-+			;
-+	}
-+}
-+
-+static int __init ostm_init_clksrc(struct ostm_device *ostm, unsigned long rate)
-+{
-+	/*
-+	 * irq not used (clock sources don't use interrupts)
-+	 */
-+
-+	ostm_timer_stop(ostm);
-+
-+	writel(0, ostm->base + OSTM_CMP);
-+	writeb(CTL_FREERUN, ostm->base + OSTM_CTL);
-+	writeb(TS, ostm->base + OSTM_TS);
-+
-+	return clocksource_mmio_init(ostm->base + OSTM_CNT,
-+			"ostm", rate,
-+			300, 32, clocksource_mmio_readl_up);
-+}
-+
-+static u64 notrace ostm_read_sched_clock(void)
-+{
-+	return readl(system_clock);
-+}
-+
-+static void __init ostm_init_sched_clock(struct ostm_device *ostm,
-+			unsigned long rate)
-+{
-+	system_clock = ostm->base + OSTM_CNT;
-+	sched_clock_register(ostm_read_sched_clock, 32, rate);
-+}
-+
-+static int ostm_clock_event_next(unsigned long delta,
-+				     struct clock_event_device *ced)
-+{
-+	struct ostm_device *ostm = ced_to_ostm(ced);
-+
-+	ostm_timer_stop(ostm);
-+
-+	writel(delta, ostm->base + OSTM_CMP);
-+	writeb(CTL_ONESHOT, ostm->base + OSTM_CTL);
-+	writeb(TS, ostm->base + OSTM_TS);
-+
-+	return 0;
-+}
-+
-+static int ostm_shutdown(struct clock_event_device *ced)
-+{
-+	struct ostm_device *ostm = ced_to_ostm(ced);
-+
-+	ostm_timer_stop(ostm);
-+
-+	return 0;
-+}
-+static int ostm_set_periodic(struct clock_event_device *ced)
-+{
-+	struct ostm_device *ostm = ced_to_ostm(ced);
-+
-+	if (clockevent_state_oneshot(ced) || clockevent_state_periodic(ced))
-+		ostm_timer_stop(ostm);
-+
-+	writel(ostm->ticks_per_jiffy - 1, ostm->base + OSTM_CMP);
-+	writeb(CTL_PERIODIC, ostm->base + OSTM_CTL);
-+	writeb(TS, ostm->base + OSTM_TS);
-+
-+	return 0;
-+}
-+
-+static int ostm_set_oneshot(struct clock_event_device *ced)
-+{
-+	struct ostm_device *ostm = ced_to_ostm(ced);
-+
-+	ostm_timer_stop(ostm);
-+
-+	return 0;
-+}
-+
-+static irqreturn_t ostm_timer_interrupt(int irq, void *dev_id)
-+{
-+	struct ostm_device *ostm = dev_id;
-+
-+	if (clockevent_state_oneshot(&ostm->ced))
-+		ostm_timer_stop(ostm);
-+
-+	/* notify clockevent layer */
-+	if (ostm->ced.event_handler)
-+		ostm->ced.event_handler(&ostm->ced);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static int __init ostm_init_clkevt(struct ostm_device *ostm, int irq,
-+			unsigned long rate)
-+{
-+	struct clock_event_device *ced = &ostm->ced;
-+	int ret = -ENXIO;
-+
-+	ret = request_irq(irq, ostm_timer_interrupt,
-+			  IRQF_TIMER | IRQF_IRQPOLL,
-+			  "ostm", ostm);
-+	if (ret) {
-+		pr_err("ostm: failed to request irq\n");
-+		return ret;
-+	}
-+
-+	ced->name = "ostm";
-+	ced->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC;
-+	ced->set_state_shutdown = ostm_shutdown;
-+	ced->set_state_periodic = ostm_set_periodic;
-+	ced->set_state_oneshot = ostm_set_oneshot;
-+	ced->set_next_event = ostm_clock_event_next;
-+	ced->shift = 32;
-+	ced->rating = 300;
-+	ced->cpumask = cpumask_of(0);
-+	clockevents_config_and_register(ced, rate, 0xf, 0xffffffff);
-+
-+	return 0;
-+}
-+
-+static int __init ostm_init(struct device_node *np)
-+{
-+	struct ostm_device *ostm;
-+	int ret = -EFAULT;
-+	struct clk *ostm_clk = NULL;
-+	int irq;
-+	unsigned long rate;
-+
-+	ostm = kzalloc(sizeof(*ostm), GFP_KERNEL);
-+	if (!ostm)
-+		return -ENOMEM;
-+
-+	ostm->base = of_iomap(np, 0);
-+	if (!ostm->base) {
-+		pr_err("ostm: failed to remap I/O memory\n");
-+		goto err;
-+	}
-+
-+	irq = irq_of_parse_and_map(np, 0);
-+	if (irq < 0) {
-+		pr_err("ostm: Failed to get irq\n");
-+		goto err;
-+	}
-+
-+	ostm_clk = of_clk_get(np, 0);
-+	if (IS_ERR(ostm_clk)) {
-+		pr_err("ostm: Failed to get clock\n");
-+		ostm_clk = NULL;
-+		goto err;
-+	}
-+
-+	ret = clk_prepare_enable(ostm_clk);
-+	if (ret) {
-+		pr_err("ostm: Failed to enable clock\n");
-+		goto err;
-+	}
-+
-+	rate = clk_get_rate(ostm_clk);
-+	ostm->ticks_per_jiffy = (rate + HZ / 2) / HZ;
-+
-+	/*
-+	 * First probed device will be used as system clocksource. Any
-+	 * additional devices will be used as clock events.
-+	 */
-+	if (!system_clock) {
-+		ret = ostm_init_clksrc(ostm, rate);
-+
-+		if (!ret) {
-+			ostm_init_sched_clock(ostm, rate);
-+			pr_info("ostm: used for clocksource\n");
-+		}
-+
-+	} else {
-+		ret = ostm_init_clkevt(ostm, irq, rate);
-+
-+		if (!ret)
-+			pr_info("ostm: used for clock events\n");
-+	}
-+
-+err:
-+	if (ret) {
-+		clk_disable_unprepare(ostm_clk);
-+		iounmap(ostm->base);
-+		kfree(ostm);
-+		return ret;
-+	}
-+
-+	return 0;
-+}
-+
-+CLOCKSOURCE_OF_DECLARE(ostm, "renesas,ostm", ostm_init);
diff --git a/patches.renesas/0100-pinctrl-sh-pfc-Support-named-pins-with-custom-config.patch b/patches.renesas/0100-pinctrl-sh-pfc-Support-named-pins-with-custom-config.patch
deleted file mode 100644
index f5df06cb3cf1a1..00000000000000
--- a/patches.renesas/0100-pinctrl-sh-pfc-Support-named-pins-with-custom-config.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From aaeb7b39c71c6e29094a96925d51d07eb3144804 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Sat, 12 Nov 2016 17:04:29 +0100
-Subject: [PATCH 100/299] pinctrl: sh-pfc: Support named pins with custom
- configuration
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Pins not associated with a GPIO port can still have other configuration
-parameters. Add a new macro SH_PFC_PIN_NAMED_CFG which allows for named
-pins to be declared with a set of configurations. The new macro is an
-modification of SH_PFC_PIN_NAMED to allow for optional configuration to
-be assigned.
-
-The flag SH_PFC_PIN_CFG_NO_GPIO is still enforced as this should only be
-used to define pins not associated with a GPIO port.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 1ce56aea7cf4002f77891808ca4e06aa4e2b4ca6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/sh_pfc.h |    8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -546,6 +546,14 @@ extern const struct sh_pfc_soc_info shx3
- 		.configs = SH_PFC_PIN_CFG_NO_GPIO,			\
- 	}
- 
-+/* SH_PFC_PIN_NAMED_CFG - Expand to a sh_pfc_pin entry with the given name */
-+#define SH_PFC_PIN_NAMED_CFG(row, col, _name, cfgs)			\
-+	{								\
-+		.pin = PIN_NUMBER(row, col),				\
-+		.name = __stringify(PIN_##_name),			\
-+		.configs = SH_PFC_PIN_CFG_NO_GPIO | cfgs,		\
-+	}
-+
- /* PINMUX_DATA_ALL - Expand to a list of PORT_name_DATA, PORT_name_FN0,
-  *		     PORT_name_OUT, PORT_name_IN marks
-  */
diff --git a/patches.renesas/0101-ASoC-rsnd-Fix-possible-NULL-pointer-dereference.patch b/patches.renesas/0101-ASoC-rsnd-Fix-possible-NULL-pointer-dereference.patch
deleted file mode 100644
index 6bd586815d4bd0..00000000000000
--- a/patches.renesas/0101-ASoC-rsnd-Fix-possible-NULL-pointer-dereference.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From ff192f55348f2b8a96118f72bb287e5ffd5cfdd2 Mon Sep 17 00:00:00 2001
-From: Marek Vasut <marek.vasut+renesas@gmail.com>
-Date: Fri, 21 Apr 2017 00:41:20 +0000
-Subject: [PATCH 101/286] ASoC: rsnd: Fix possible NULL pointer dereference
-
-25165f79adc76b812bfb4d8f2ab120aafb28d0e6
-("ASoC: rsnd: enable clock-frequency for both 44.1kHz/48kHz")
-supports both 44.1kHz/48kHz clock-frequency settings for ADG
-which will be used for AUDIO_OLKOUTn.
-But some board doesn't need it, thus, it is not mandatory.
-
-But, above patch didn't care about the case of "clock-frequency" DT
-property was not present.
-This patch ignores ADG settings if AUDIO_OLKOUTn was not used.
-
-Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
-[Kuninori: tidyup not to break non AUDIO_OLKOUTn case]
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-
-(cherry picked from commit e8dffe6c2004278c588b3bb441a3dbe998a3f2e4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/adg.c |   18 +++++++++++-------
- 1 file changed, 11 insertions(+), 7 deletions(-)
-
---- a/sound/soc/sh/rcar/adg.c
-+++ b/sound/soc/sh/rcar/adg.c
-@@ -453,13 +453,18 @@ static void rsnd_adg_get_clkout(struct r
- 		[CLKI] = 0x2,
- 	};
- 
--	of_property_read_u32(np, "#clock-cells", &count);
-+	ckr = 0;
-+	rbga = 2; /* default 1/6 */
-+	rbgb = 2; /* default 1/6 */
- 
- 	/*
- 	 * ADG supports BRRA/BRRB output only
- 	 * this means all clkout0/1/2/3 will be same rate
- 	 */
- 	prop = of_find_property(np, "clock-frequency", NULL);
-+	if (!prop)
-+		goto rsnd_adg_get_clkout_end;
-+
- 	req_size = prop->length / sizeof(u32);
- 
- 	of_property_read_u32_array(np, "clock-frequency", req_rate, req_size);
-@@ -472,6 +477,9 @@ static void rsnd_adg_get_clkout(struct r
- 			req_48kHz_rate = req_rate[i];
- 	}
- 
-+	if (req_rate[0] % 48000 == 0)
-+		adg->flags = AUDIO_OUT_48;
-+
- 	/*
- 	 * This driver is assuming that AUDIO_CLKA/AUDIO_CLKB/AUDIO_CLKC
- 	 * have 44.1kHz or 48kHz base clocks for now.
-@@ -481,9 +489,6 @@ static void rsnd_adg_get_clkout(struct r
- 	 *	rsnd_adg_ssi_clk_try_start()
- 	 *	rsnd_ssi_master_clk_start()
- 	 */
--	ckr = 0;
--	rbga = 2; /* default 1/6 */
--	rbgb = 2; /* default 1/6 */
- 	adg->rbga_rate_for_441khz	= 0;
- 	adg->rbgb_rate_for_48khz	= 0;
- 	for_each_rsnd_clk(clk, adg, i) {
-@@ -528,6 +533,7 @@ static void rsnd_adg_get_clkout(struct r
- 	 * this means all clkout0/1/2/3 will be * same rate
- 	 */
- 
-+	of_property_read_u32(np, "#clock-cells", &count);
- 	/*
- 	 * for clkout
- 	 */
-@@ -557,13 +563,11 @@ static void rsnd_adg_get_clkout(struct r
- 				    &adg->onecell);
- 	}
- 
-+rsnd_adg_get_clkout_end:
- 	adg->ckr = ckr;
- 	adg->rbga = rbga;
- 	adg->rbgb = rbgb;
- 
--	if (req_rate[0] % 48000 == 0)
--		adg->flags = AUDIO_OUT_48;
--
- 	for_each_rsnd_clkout(clk, adg, i)
- 		dev_dbg(dev, "clkout %d : %p : %ld\n", i, clk, clk_get_rate(clk));
- 	dev_dbg(dev, "BRGCKR = 0x%08x, BRRA/BRRB = 0x%x/0x%x\n",
diff --git a/patches.renesas/0101-PCI-rcar-Return-ENODEV-from-host-bridge-probe-when-n.patch b/patches.renesas/0101-PCI-rcar-Return-ENODEV-from-host-bridge-probe-when-n.patch
deleted file mode 100644
index a71b62b7a18192..00000000000000
--- a/patches.renesas/0101-PCI-rcar-Return-ENODEV-from-host-bridge-probe-when-n.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 73582cecf60fca9237d71dfbd398c44f9d6bc3e6 Mon Sep 17 00:00:00 2001
-From: Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com>
-Date: Fri, 16 Dec 2016 12:50:04 +0100
-Subject: [PATCH 101/255] PCI: rcar: Return -ENODEV from host bridge probe when
- no card present
-
-R-Car PCIe does not support hotplug so it is appropriate to treat the
-absence of a PCIe card as an -ENODEV error.
-
-Signed-off-by: Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com>
-[simon: updated changelog]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-(cherry picked from commit e94888d23736cec51ba851f6e798d0eeb9ef5f41)
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pci/host/pcie-rcar.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/pci/host/pcie-rcar.c
-+++ b/drivers/pci/host/pcie-rcar.c
-@@ -1165,7 +1165,7 @@ static int rcar_pcie_probe(struct platfo
- 	err = hw_init_fn(pcie);
- 	if (err) {
- 		dev_info(dev, "PCIe link down\n");
--		err = 0;
-+		err = -ENODEV;
- 		goto err_pm_put;
- 	}
- 
diff --git a/patches.renesas/0101-pinctrl-sh-pfc-r8a7795-Support-none-GPIO-pins-with-c.patch b/patches.renesas/0101-pinctrl-sh-pfc-r8a7795-Support-none-GPIO-pins-with-c.patch
deleted file mode 100644
index c024d21c4aaf88..00000000000000
--- a/patches.renesas/0101-pinctrl-sh-pfc-r8a7795-Support-none-GPIO-pins-with-c.patch
+++ /dev/null
@@ -1,254 +0,0 @@
-From f20cde4ac5df717efff0bd8f0939c144c66e3977 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Fri, 11 Nov 2016 21:33:39 +0100
-Subject: [PATCH 101/299] pinctrl: sh-pfc: r8a7795: Support none GPIO pins with
- configurable drive-strength
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-There are pins on the r8a7795 which are not part of a GPIO bank nor
-can be muxed between different functions. They do however allow for the
-drive-strength to be configured. Add those pins to the list of pins and
-to the drive-strength configuration registers.
-
-The pins can now be referred to in DT by function names and their
-drive-strength modified.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit ea9c740583c6857b07ffc310eca967bc39ff6a21)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7795.c |  163 +++++++++++++++++++++++++++++++----
- 1 file changed, 148 insertions(+), 15 deletions(-)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-@@ -523,6 +523,22 @@ MOD_SEL0_2_1		MOD_SEL1_2 \
- 			MOD_SEL1_1 \
- 			MOD_SEL1_0		MOD_SEL2_0
- 
-+/*
-+ * These pins are not able to be muxed but have other properties
-+ * that can be set, such as drive-strength or pull-up/pull-down enable.
-+ */
-+#define PINMUX_STATIC \
-+	FM(QSPI0_SPCLK) FM(QSPI0_SSL) FM(QSPI0_MOSI_IO0) FM(QSPI0_MISO_IO1) \
-+	FM(QSPI0_IO2) FM(QSPI0_IO3) \
-+	FM(QSPI1_SPCLK) FM(QSPI1_SSL) FM(QSPI1_MOSI_IO0) FM(QSPI1_MISO_IO1) \
-+	FM(QSPI1_IO2) FM(QSPI1_IO3) \
-+	FM(RPC_INT) FM(RPC_WP) FM(RPC_RESET) \
-+	FM(AVB_TX_CTL) FM(AVB_TXC) FM(AVB_TD0) FM(AVB_TD1) FM(AVB_TD2) FM(AVB_TD3) \
-+	FM(AVB_RX_CTL) FM(AVB_RXC) FM(AVB_RD0) FM(AVB_RD1) FM(AVB_RD2) FM(AVB_RD3) \
-+	FM(AVB_TXCREFCLK) FM(AVB_MDIO) \
-+	FM(CLKOUT) FM(PRESETOUT) \
-+	FM(DU_DOTCLKIN0) FM(DU_DOTCLKIN1) FM(DU_DOTCLKIN2) FM(DU_DOTCLKIN3) \
-+	FM(TMS) FM(TDO) FM(ASEBRK) FM(MLB_REF)
- 
- enum {
- 	PINMUX_RESERVED = 0,
-@@ -548,6 +564,7 @@ enum {
- 	PINMUX_GPSR
- 	PINMUX_IPSR
- 	PINMUX_MOD_SELS
-+	PINMUX_STATIC
- 	PINMUX_MARK_END,
- #undef F_
- #undef FM
-@@ -1412,10 +1429,78 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MSEL(IP17_7_4,	STP_ISSYNC_0_E,		SEL_SSP1_0_4),
- 	PINMUX_IPSR_MSEL(IP17_7_4,	RIF2_D1_B,		SEL_DRIF2_1),
- 	PINMUX_IPSR_GPSR(IP17_7_4,	TPU0TO3),
-+
-+/*
-+ * Static pins can not be muxed between different functions but
-+ * still needs a mark entry in the pinmux list. Add each static
-+ * pin to the list without an associated function. The sh-pfc
-+ * core will do the right thing and skip trying to mux then pin
-+ * while still applying configuration to it
-+ */
-+#define FM(x)	PINMUX_DATA(x##_MARK, 0),
-+	PINMUX_STATIC
-+#undef FM
- };
- 
-+/*
-+ * R8A7795 has 8 banks with 32 PGIOS in each => 256 GPIOs.
-+ * Physical layout rows: A - AW, cols: 1 - 39.
-+ */
-+#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r))
-+#define PIN_NUMBER(r, c) (((r) - 'A') * 39 + (c) + 300)
-+#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c)
-+
- static const struct sh_pfc_pin pinmux_pins[] = {
- 	PINMUX_GPIO_GP_ALL(),
-+
-+	/*
-+	 * Pins not associated with a GPIO port.
-+	 *
-+	 * The pin positions are different between different r8a7795
-+	 * packages, all that is needed for the pfc driver is a unique
-+	 * number for each pin. To this end use the pin layout from
-+	 * R-Car H3SiP to calculate a unique number for each pin.
-+	 */
-+	SH_PFC_PIN_NAMED_CFG('A',  8, AVB_TX_CTL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A',  9, AVB_MDIO, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('C',  1, PRESETOUT#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('F',  1, CLKOUT, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('V',  3, QSPI1_SPCLK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('V',  5, QSPI1_SSL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('V',  6, RPC_WP#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('V',  7, RPC_RESET#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('W',  3, QSPI0_SPCLK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('Y',  3, QSPI0_SSL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('Y',  6, QSPI0_IO2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('Y',  7, RPC_INT#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'),  4, QSPI0_MISO_IO1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'),  6, QSPI0_IO3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  3, QSPI1_IO3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  5, QSPI0_MOSI_IO0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  7, QSPI1_MOSI_IO0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'),  4, QSPI1_IO2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'),  5, QSPI1_MISO_IO1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'),  7, DU_DOTCLKIN0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'),  8, DU_DOTCLKIN1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'),  7, DU_DOTCLKIN2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'),  8, DU_DOTCLKIN3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 28, TDO, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
- };
- 
- /* - AUDIO CLOCK ------------------------------------------------------------ */
-@@ -4962,10 +5047,45 @@ static const struct pinmux_cfg_reg pinmu
- };
- 
- static const struct pinmux_drive_reg pinmux_drive_regs[] = {
-+	{ PINMUX_DRIVE_REG("DRVCTRL0", 0xe6060300) {
-+		{ PIN_NUMBER('W', 3),   28, 2 },	/* QSPI0_SPCLK */
-+		{ PIN_A_NUMBER('C', 5), 24, 2 },	/* QSPI0_MOSI_IO0 */
-+		{ PIN_A_NUMBER('B', 4), 20, 2 },	/* QSPI0_MISO_IO1 */
-+		{ PIN_NUMBER('Y', 6),   16, 2 },	/* QSPI0_IO2 */
-+		{ PIN_A_NUMBER('B', 6), 12, 2 },	/* QSPI0_IO3 */
-+		{ PIN_NUMBER('Y', 3),    8, 2 },	/* QSPI0_SSL */
-+		{ PIN_NUMBER('V', 3),    4, 2 },	/* QSPI1_SPCLK */
-+		{ PIN_A_NUMBER('C', 7),  0, 2 },	/* QSPI1_MOSI_IO0 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL1", 0xe6060304) {
-+		{ PIN_A_NUMBER('E', 5), 28, 2 },	/* QSPI1_MISO_IO1 */
-+		{ PIN_A_NUMBER('E', 4), 24, 2 },	/* QSPI1_IO2 */
-+		{ PIN_A_NUMBER('C', 3), 20, 2 },	/* QSPI1_IO3 */
-+		{ PIN_NUMBER('V', 5),   16, 2 },	/* QSPI1_SSL */
-+		{ PIN_NUMBER('Y', 7),   12, 2 },	/* RPC_INT# */
-+		{ PIN_NUMBER('V', 6),    8, 2 },	/* RPC_WP# */
-+		{ PIN_NUMBER('V', 7),    4, 2 },	/* RPC_RESET# */
-+		{ PIN_NUMBER('A', 16),   0, 3 },	/* AVB_RX_CTL */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL2", 0xe6060308) {
-+		{ PIN_NUMBER('B', 19),  28, 3 },	/* AVB_RXC */
-+		{ PIN_NUMBER('A', 13),  24, 3 },	/* AVB_RD0 */
-+		{ PIN_NUMBER('B', 13),  20, 3 },	/* AVB_RD1 */
-+		{ PIN_NUMBER('A', 14),  16, 3 },	/* AVB_RD2 */
-+		{ PIN_NUMBER('B', 14),  12, 3 },	/* AVB_RD3 */
-+		{ PIN_NUMBER('A', 8),    8, 3 },	/* AVB_TX_CTL */
-+		{ PIN_NUMBER('A', 19),   4, 3 },	/* AVB_TXC */
-+		{ PIN_NUMBER('A', 18),   0, 3 },	/* AVB_TD0 */
-+	} },
- 	{ PINMUX_DRIVE_REG("DRVCTRL3", 0xe606030c) {
--		{ RCAR_GP_PIN(2,  9),  8, 3 },	/* AVB_MDC */
--		{ RCAR_GP_PIN(2, 10),  4, 3 },	/* AVB_MAGIC */
--		{ RCAR_GP_PIN(2, 11),  0, 3 },	/* AVB_PHY_INT */
-+		{ PIN_NUMBER('B', 18),  28, 3 },	/* AVB_TD1 */
-+		{ PIN_NUMBER('A', 17),  24, 3 },	/* AVB_TD2 */
-+		{ PIN_NUMBER('B', 17),  20, 3 },	/* AVB_TD3 */
-+		{ PIN_NUMBER('A', 12),  16, 3 },	/* AVB_TXCREFCLK */
-+		{ PIN_NUMBER('A', 9),   12, 3 },	/* AVB_MDIO */
-+		{ RCAR_GP_PIN(2,  9),    8, 3 },	/* AVB_MDC */
-+		{ RCAR_GP_PIN(2, 10),    4, 3 },	/* AVB_MAGIC */
-+		{ RCAR_GP_PIN(2, 11),    0, 3 },	/* AVB_PHY_INT */
- 	} },
- 	{ PINMUX_DRIVE_REG("DRVCTRL4", 0xe6060310) {
- 		{ RCAR_GP_PIN(2, 12), 28, 3 },	/* AVB_LINK */
-@@ -5008,6 +5128,7 @@ static const struct pinmux_drive_reg pin
- 		{ RCAR_GP_PIN(1, 19),  0, 3 },	/* A19 */
- 	} },
- 	{ PINMUX_DRIVE_REG("DRVCTRL8", 0xe6060320) {
-+		{ PIN_NUMBER('F', 1), 28, 3 },	/* CLKOUT */
- 		{ RCAR_GP_PIN(1, 20), 24, 3 },	/* CS0 */
- 		{ RCAR_GP_PIN(1, 21), 20, 3 },	/* CS1_A26 */
- 		{ RCAR_GP_PIN(1, 22), 16, 3 },	/* BS */
-@@ -5018,6 +5139,7 @@ static const struct pinmux_drive_reg pin
- 	} },
- 	{ PINMUX_DRIVE_REG("DRVCTRL9", 0xe6060324) {
- 		{ RCAR_GP_PIN(1, 27), 28, 3 },	/* EX_WAIT0 */
-+		{ PIN_NUMBER('C', 1), 24, 3 },	/* PRESETOUT# */
- 		{ RCAR_GP_PIN(0,  0), 20, 3 },	/* D0 */
- 		{ RCAR_GP_PIN(0,  1), 16, 3 },	/* D1 */
- 		{ RCAR_GP_PIN(0,  2), 12, 3 },	/* D2 */
-@@ -5036,20 +5158,30 @@ static const struct pinmux_drive_reg pin
- 		{ RCAR_GP_PIN(0, 13),  0, 3 },	/* D13 */
- 	} },
- 	{ PINMUX_DRIVE_REG("DRVCTRL11", 0xe606032c) {
--		{ RCAR_GP_PIN(0, 14), 28, 3 },	/* D14 */
--		{ RCAR_GP_PIN(0, 15), 24, 3 },	/* D15 */
--		{ RCAR_GP_PIN(7,  0), 20, 3 },	/* AVS1 */
--		{ RCAR_GP_PIN(7,  1), 16, 3 },	/* AVS2 */
--		{ RCAR_GP_PIN(7,  2), 12, 3 },	/* HDMI0_CEC */
--		{ RCAR_GP_PIN(7,  3),  8, 3 },	/* HDMI1_CEC */
-+		{ RCAR_GP_PIN(0, 14),   28, 3 },	/* D14 */
-+		{ RCAR_GP_PIN(0, 15),   24, 3 },	/* D15 */
-+		{ RCAR_GP_PIN(7,  0),   20, 3 },	/* AVS1 */
-+		{ RCAR_GP_PIN(7,  1),   16, 3 },	/* AVS2 */
-+		{ RCAR_GP_PIN(7,  2),   12, 3 },	/* HDMI0_CEC */
-+		{ RCAR_GP_PIN(7,  3),    8, 3 },	/* HDMI1_CEC */
-+		{ PIN_A_NUMBER('P', 7),  4, 2 },	/* DU_DOTCLKIN0 */
-+		{ PIN_A_NUMBER('P', 8),  0, 2 },	/* DU_DOTCLKIN1 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL12", 0xe6060330) {
-+		{ PIN_A_NUMBER('R', 7),  28, 2 },	/* DU_DOTCLKIN2 */
-+		{ PIN_A_NUMBER('R', 8),  24, 2 },	/* DU_DOTCLKIN3 */
-+		{ PIN_A_NUMBER('D', 38), 20, 2 },	/* FSCLKST# */
-+		{ PIN_A_NUMBER('R', 30),  4, 2 },	/* TMS */
- 	} },
- 	{ PINMUX_DRIVE_REG("DRVCTRL13", 0xe6060334) {
--		{ RCAR_GP_PIN(3,  0), 20, 3 },	/* SD0_CLK */
--		{ RCAR_GP_PIN(3,  1), 16, 3 },	/* SD0_CMD */
--		{ RCAR_GP_PIN(3,  2), 12, 3 },	/* SD0_DAT0 */
--		{ RCAR_GP_PIN(3,  3),  8, 3 },	/* SD0_DAT1 */
--		{ RCAR_GP_PIN(3,  4),  4, 3 },	/* SD0_DAT2 */
--		{ RCAR_GP_PIN(3,  5),  0, 3 },	/* SD0_DAT3 */
-+		{ PIN_A_NUMBER('T', 28), 28, 2 },	/* TDO */
-+		{ PIN_A_NUMBER('T', 30), 24, 2 },	/* ASEBRK */
-+		{ RCAR_GP_PIN(3,  0),    20, 3 },	/* SD0_CLK */
-+		{ RCAR_GP_PIN(3,  1),    16, 3 },	/* SD0_CMD */
-+		{ RCAR_GP_PIN(3,  2),    12, 3 },	/* SD0_DAT0 */
-+		{ RCAR_GP_PIN(3,  3),     8, 3 },	/* SD0_DAT1 */
-+		{ RCAR_GP_PIN(3,  4),     4, 3 },	/* SD0_DAT2 */
-+		{ RCAR_GP_PIN(3,  5),     0, 3 },	/* SD0_DAT3 */
- 	} },
- 	{ PINMUX_DRIVE_REG("DRVCTRL14", 0xe6060338) {
- 		{ RCAR_GP_PIN(3,  6), 28, 3 },	/* SD1_CLK */
-@@ -5118,6 +5250,7 @@ static const struct pinmux_drive_reg pin
- 		{ RCAR_GP_PIN(5, 23), 16, 3 },	/* MLB_CLK */
- 		{ RCAR_GP_PIN(5, 24), 12, 3 },	/* MLB_SIG */
- 		{ RCAR_GP_PIN(5, 25),  8, 3 },	/* MLB_DAT */
-+		{ PIN_NUMBER('H', 37),  4, 3 },	/* MLB_REF */
- 		{ RCAR_GP_PIN(6,  0),  0, 3 },	/* SSI_SCK01239 */
- 	} },
- 	{ PINMUX_DRIVE_REG("DRVCTRL21", 0xe6060354) {
diff --git a/patches.renesas/0102-ASoC-rsnd-don-t-use-PDTA-bit-for-24bit-on-SSI.patch b/patches.renesas/0102-ASoC-rsnd-don-t-use-PDTA-bit-for-24bit-on-SSI.patch
deleted file mode 100644
index 59998475bf64e3..00000000000000
--- a/patches.renesas/0102-ASoC-rsnd-don-t-use-PDTA-bit-for-24bit-on-SSI.patch
+++ /dev/null
@@ -1,189 +0,0 @@
-From 86f119e18638ed97072aa2d521dbd4bcf4592b1c Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 16 May 2017 01:51:41 +0000
-Subject: [PATCH 102/286] ASoC: rsnd: don't use PDTA bit for 24bit on SSI
-
-Current SSI uses PDTA bit which indicates data that Input/Output
-data are Right-Aligned. But, 24bit sound should be Left-Aligned
-in this HW. Because Linux is using Right-Aligned data, and HW uses
-Left-Aligned data, current 24bit data is missing lower 8bit.
-To fix this issue, this patch removes PDTA bit, and shift 8bit
-in necessary module
-
-Reported-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 90431eb49bff6d79814cbf0c96e13597ad53095c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/cmd.c  |    1 
- sound/soc/sh/rcar/core.c |   51 +++++++++++++++++++++++++++++++++++++++++++++++
- sound/soc/sh/rcar/gen.c  |    1 
- sound/soc/sh/rcar/rsnd.h |    2 +
- sound/soc/sh/rcar/src.c  |   12 +++++++++--
- sound/soc/sh/rcar/ssi.c  |    2 -
- sound/soc/sh/rcar/ssiu.c |    3 +-
- 7 files changed, 68 insertions(+), 4 deletions(-)
-
---- a/sound/soc/sh/rcar/cmd.c
-+++ b/sound/soc/sh/rcar/cmd.c
-@@ -92,6 +92,7 @@ static int rsnd_cmd_init(struct rsnd_mod
- 	dev_dbg(dev, "ctu/mix path = 0x%08x", data);
- 
- 	rsnd_mod_write(mod, CMD_ROUTE_SLCT, data);
-+	rsnd_mod_write(mod, CMD_BUSIF_MODE, rsnd_get_busif_shift(io, mod) | 1);
- 	rsnd_mod_write(mod, CMD_BUSIF_DALIGN, rsnd_get_dalign(mod, io));
- 
- 	rsnd_adg_set_cmd_timsel_gen2(mod, io);
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -343,6 +343,57 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod
- 		return 0x76543210;
- }
- 
-+u32 rsnd_get_busif_shift(struct rsnd_dai_stream *io, struct rsnd_mod *mod)
-+{
-+	enum rsnd_mod_type playback_mods[] = {
-+		RSND_MOD_SRC,
-+		RSND_MOD_CMD,
-+		RSND_MOD_SSIU,
-+	};
-+	enum rsnd_mod_type capture_mods[] = {
-+		RSND_MOD_CMD,
-+		RSND_MOD_SRC,
-+		RSND_MOD_SSIU,
-+	};
-+	struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
-+	struct rsnd_mod *tmod = NULL;
-+	enum rsnd_mod_type *mods =
-+		rsnd_io_is_play(io) ?
-+		playback_mods : capture_mods;
-+	int i;
-+
-+	/*
-+	 * This is needed for 24bit data
-+	 * We need to shift 8bit
-+	 *
-+	 * Linux 24bit data is located as 0x00******
-+	 * HW    24bit data is located as 0x******00
-+	 *
-+	 */
-+	switch (runtime->sample_bits) {
-+	case 16:
-+		return 0;
-+	case 32:
-+		break;
-+	}
-+
-+	for (i = 0; i < ARRAY_SIZE(playback_mods); i++) {
-+		tmod = rsnd_io_to_mod(io, mods[i]);
-+		if (tmod)
-+			break;
-+	}
-+
-+	if (tmod != mod)
-+		return 0;
-+
-+	if (rsnd_io_is_play(io))
-+		return  (0 << 20) | /* shift to Left */
-+			(8 << 16);  /* 8bit */
-+	else
-+		return  (1 << 20) | /* shift to Right */
-+			(8 << 16);  /* 8bit */
-+}
-+
- /*
-  *	rsnd_dai functions
-  */
---- a/sound/soc/sh/rcar/gen.c
-+++ b/sound/soc/sh/rcar/gen.c
-@@ -236,6 +236,7 @@ static int rsnd_gen2_probe(struct rsnd_p
- 		RSND_GEN_M_REG(SRC_ROUTE_MODE0,	0xc,	0x20),
- 		RSND_GEN_M_REG(SRC_CTRL,	0x10,	0x20),
- 		RSND_GEN_M_REG(SRC_INT_ENABLE0,	0x18,	0x20),
-+		RSND_GEN_M_REG(CMD_BUSIF_MODE,	0x184,	0x20),
- 		RSND_GEN_M_REG(CMD_BUSIF_DALIGN,0x188,	0x20),
- 		RSND_GEN_M_REG(CMD_ROUTE_SLCT,	0x18c,	0x20),
- 		RSND_GEN_M_REG(CMD_CTRL,	0x190,	0x20),
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -73,6 +73,7 @@ enum rsnd_reg {
- 	RSND_REG_SCU_SYS_INT_EN0,
- 	RSND_REG_SCU_SYS_INT_EN1,
- 	RSND_REG_CMD_CTRL,
-+	RSND_REG_CMD_BUSIF_MODE,
- 	RSND_REG_CMD_BUSIF_DALIGN,
- 	RSND_REG_CMD_ROUTE_SLCT,
- 	RSND_REG_CMDOUT_TIMSEL,
-@@ -204,6 +205,7 @@ void rsnd_bset(struct rsnd_priv *priv, s
- 		    u32 mask, u32 data);
- u32 rsnd_get_adinr_bit(struct rsnd_mod *mod, struct rsnd_dai_stream *io);
- u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io);
-+u32 rsnd_get_busif_shift(struct rsnd_dai_stream *io, struct rsnd_mod *mod);
- 
- /*
-  *	R-Car DMA
---- a/sound/soc/sh/rcar/src.c
-+++ b/sound/soc/sh/rcar/src.c
-@@ -190,11 +190,13 @@ static void rsnd_src_set_convert_rate(st
- 	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
- 	struct device *dev = rsnd_priv_to_dev(priv);
- 	struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
-+	int is_play = rsnd_io_is_play(io);
- 	int use_src = 0;
- 	u32 fin, fout;
- 	u32 ifscr, fsrate, adinr;
- 	u32 cr, route;
- 	u32 bsdsr, bsisr;
-+	u32 i_busif, o_busif, tmp;
- 	uint ratio;
- 
- 	if (!runtime)
-@@ -270,6 +272,11 @@ static void rsnd_src_set_convert_rate(st
- 		break;
- 	}
- 
-+	/* BUSIF_MODE */
-+	tmp = rsnd_get_busif_shift(io, mod);
-+	i_busif = ( is_play ? tmp : 0) | 1;
-+	o_busif = (!is_play ? tmp : 0) | 1;
-+
- 	rsnd_mod_write(mod, SRC_ROUTE_MODE0, route);
- 
- 	rsnd_mod_write(mod, SRC_SRCIR, 1);	/* initialize */
-@@ -281,8 +288,9 @@ static void rsnd_src_set_convert_rate(st
- 	rsnd_mod_write(mod, SRC_BSISR, bsisr);
- 	rsnd_mod_write(mod, SRC_SRCIR, 0);	/* cancel initialize */
- 
--	rsnd_mod_write(mod, SRC_I_BUSIF_MODE, 1);
--	rsnd_mod_write(mod, SRC_O_BUSIF_MODE, 1);
-+	rsnd_mod_write(mod, SRC_I_BUSIF_MODE, i_busif);
-+	rsnd_mod_write(mod, SRC_O_BUSIF_MODE, o_busif);
-+
- 	rsnd_mod_write(mod, SRC_BUSIF_DALIGN, rsnd_get_dalign(mod, io));
- 
- 	rsnd_adg_set_src_timesel_gen2(mod, io, fin, fout);
---- a/sound/soc/sh/rcar/ssi.c
-+++ b/sound/soc/sh/rcar/ssi.c
-@@ -316,7 +316,7 @@ static void rsnd_ssi_config_init(struct
- 	 * always use 32bit system word.
- 	 * see also rsnd_ssi_master_clk_enable()
- 	 */
--	cr_own = FORCE | SWL_32 | PDTA;
-+	cr_own = FORCE | SWL_32;
- 
- 	if (rdai->bit_clk_inv)
- 		cr_own |= SCKP;
---- a/sound/soc/sh/rcar/ssiu.c
-+++ b/sound/soc/sh/rcar/ssiu.c
-@@ -144,7 +144,8 @@ static int rsnd_ssiu_init_gen2(struct rs
- 			       (rsnd_io_is_play(io) ?
- 				rsnd_runtime_channel_after_ctu(io) :
- 				rsnd_runtime_channel_original(io)));
--		rsnd_mod_write(mod, SSI_BUSIF_MODE,  1);
-+		rsnd_mod_write(mod, SSI_BUSIF_MODE,
-+			       rsnd_get_busif_shift(io, mod) | 1);
- 		rsnd_mod_write(mod, SSI_BUSIF_DALIGN,
- 			       rsnd_get_dalign(mod, io));
- 	}
diff --git a/patches.renesas/0102-PCI-rcar-Add-compatible-string-for-r8a7796.patch b/patches.renesas/0102-PCI-rcar-Add-compatible-string-for-r8a7796.patch
deleted file mode 100644
index b65dcf0a538188..00000000000000
--- a/patches.renesas/0102-PCI-rcar-Add-compatible-string-for-r8a7796.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 5b0a75f9115dc0c2e0a7520ed306015ea1302540 Mon Sep 17 00:00:00 2001
-From: Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com>
-Date: Wed, 21 Dec 2016 03:37:06 +0900
-Subject: [PATCH 102/255] PCI: rcar: Add compatible string for r8a7796
-
-Add support for r8a7796.
-
-Signed-off-by: Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com>
-Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Rob Herring <robh@kernel.org>
-(cherry picked from commit 8267b07526cabe2e2afc834a138ece8644af87ed)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/pci/rcar-pci.txt |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/Documentation/devicetree/bindings/pci/rcar-pci.txt
-+++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt
-@@ -6,6 +6,7 @@ compatible: "renesas,pcie-r8a7779" for t
- 	    "renesas,pcie-r8a7791" for the R8A7791 SoC;
- 	    "renesas,pcie-r8a7793" for the R8A7793 SoC;
- 	    "renesas,pcie-r8a7795" for the R8A7795 SoC;
-+	    "renesas,pcie-r8a7796" for the R8A7796 SoC;
- 	    "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device.
- 	    "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device.
- 
diff --git a/patches.renesas/0102-pinctrl-sh-pfc-r8a7795-Add-group-for-AVB-MDIO-and-MI.patch b/patches.renesas/0102-pinctrl-sh-pfc-r8a7795-Add-group-for-AVB-MDIO-and-MI.patch
deleted file mode 100644
index f44f40302abcb8..00000000000000
--- a/patches.renesas/0102-pinctrl-sh-pfc-r8a7795-Add-group-for-AVB-MDIO-and-MI.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From 4cc08b22ce6f82d5ce6d70d5fe18f2cef864619a Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Fri, 11 Nov 2016 21:33:40 +0100
-Subject: [PATCH 102/299] pinctrl: sh-pfc: r8a7795: Add group for AVB MDIO and
- MII pins
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Group the AVB pins into similar groups found in other sh-pfc drivers.
-The pins can not be muxed between functions other then AVB but their
-drive strength can be controlled.
-
-The group avb_mdc containing ADV_MDC and ADV_MDIO are on other SoCs
-called avb_mdio. In pfc-r8a7795 the avb_mdc group already existed and
-is in use in DT. Therefore add the ADV_MDIO pin to the existing group
-instead of renaming it.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit b25719eb938eb39aeaaa9535f7b70405d6ff2700)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7795.c |   30 +++++++++++++++++++++++++++---
- 1 file changed, 27 insertions(+), 3 deletions(-)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-@@ -1648,11 +1648,33 @@ static const unsigned int avb_phy_int_mu
- 	AVB_PHY_INT_MARK,
- };
- static const unsigned int avb_mdc_pins[] = {
--	/* AVB_MDC */
--	RCAR_GP_PIN(2, 9),
-+	/* AVB_MDC, AVB_MDIO */
-+	RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9),
- };
- static const unsigned int avb_mdc_mux[] = {
--	AVB_MDC_MARK,
-+	AVB_MDC_MARK, AVB_MDIO_MARK,
-+};
-+static const unsigned int avb_mii_pins[] = {
-+	/*
-+	 * AVB_TX_CTL, AVB_TXC, AVB_TD0,
-+	 * AVB_TD1, AVB_TD2, AVB_TD3,
-+	 * AVB_RX_CTL, AVB_RXC, AVB_RD0,
-+	 * AVB_RD1, AVB_RD2, AVB_RD3,
-+	 * AVB_TXCREFCLK
-+	 */
-+	PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18),
-+	PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17),
-+	PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13),
-+	PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14),
-+	PIN_NUMBER('A', 12),
-+
-+};
-+static const unsigned int avb_mii_mux[] = {
-+	AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK,
-+	AVB_TD1_MARK, AVB_TD2_MARK, AVB_TD3_MARK,
-+	AVB_RX_CTL_MARK, AVB_RXC_MARK, AVB_RD0_MARK,
-+	AVB_RD1_MARK, AVB_RD2_MARK, AVB_RD3_MARK,
-+	AVB_TXCREFCLK_MARK,
- };
- static const unsigned int avb_avtp_pps_pins[] = {
- 	/* AVB_AVTP_PPS */
-@@ -3720,6 +3742,7 @@ static const struct sh_pfc_pin_group pin
- 	SH_PFC_PIN_GROUP(avb_magic),
- 	SH_PFC_PIN_GROUP(avb_phy_int),
- 	SH_PFC_PIN_GROUP(avb_mdc),
-+	SH_PFC_PIN_GROUP(avb_mii),
- 	SH_PFC_PIN_GROUP(avb_avtp_pps),
- 	SH_PFC_PIN_GROUP(avb_avtp_match_a),
- 	SH_PFC_PIN_GROUP(avb_avtp_capture_a),
-@@ -4024,6 +4047,7 @@ static const char * const avb_groups[] =
- 	"avb_magic",
- 	"avb_phy_int",
- 	"avb_mdc",
-+	"avb_mii",
- 	"avb_avtp_pps",
- 	"avb_avtp_match_a",
- 	"avb_avtp_capture_a",
diff --git a/patches.renesas/0103-ASoC-rsnd-don-t-call-free_irq-on-Parent-SSI.patch b/patches.renesas/0103-ASoC-rsnd-don-t-call-free_irq-on-Parent-SSI.patch
deleted file mode 100644
index bbc1d1973be035..00000000000000
--- a/patches.renesas/0103-ASoC-rsnd-don-t-call-free_irq-on-Parent-SSI.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 7c80502b95e9d1eebb2f2357cf1cae89fe6df45c Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 16 May 2017 01:48:24 +0000
-Subject: [PATCH 103/286] ASoC: rsnd: don't call free_irq() on Parent SSI
-
-If SSI uses shared pin, some SSI will be used as parent SSI.
-Then, normal SSI's remove and Parent SSI's remove
-(these are same SSI) will be called when unbind or remove timing.
-In this case, free_irq() will be called twice.
-This patch solve this issue.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
-Reported-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 1f8754d4daea5f257370a52a30fcb22798c54516)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/ssi.c |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/sound/soc/sh/rcar/ssi.c
-+++ b/sound/soc/sh/rcar/ssi.c
-@@ -872,6 +872,11 @@ struct rsnd_mod *rsnd_ssi_mod_get(struct
- int __rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod)
- {
- 	struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
-+	struct rsnd_mod *ssi_parent_mod = rsnd_io_to_mod_ssip(io);
-+
-+	/* Do nothing for SSI parent mod */
-+	if (ssi_parent_mod == mod)
-+		return 0;
- 
- 	return !!(rsnd_ssi_mode_flags(ssi) & RSND_SSI_CLK_PIN_SHARE);
- }
diff --git a/patches.renesas/0103-PCI-rcar-Use-of_device_get_match_data-to-simplify-pr.patch b/patches.renesas/0103-PCI-rcar-Use-of_device_get_match_data-to-simplify-pr.patch
deleted file mode 100644
index 02703bbb320096..00000000000000
--- a/patches.renesas/0103-PCI-rcar-Use-of_device_get_match_data-to-simplify-pr.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 7719ec7e0ca111c8af43e71e64ee98c33b6daac5 Mon Sep 17 00:00:00 2001
-From: Bjorn Helgaas <bhelgaas@google.com>
-Date: Tue, 31 Jan 2017 16:35:42 -0600
-Subject: [PATCH 103/255] PCI: rcar: Use of_device_get_match_data() to simplify
- probe
-
-This is a DT-only driver, so the only way to call rcar_pcie_probe() is to
-match an entry in rcar_pcie_of_match[], so of_id cannot be NULL.
-
-Furthermore, of_id->data can only be NULL if an rcar_pcie_of_match[] entry
-has a NULL .data member.  That's a driver defect, and we don't want to
-return -EINVAL, which is easy to ignore.  We'd rather take the NULL pointer
-dereference so we notice the problem and fix it.
-
-Use of_device_get_match_data() to retrieve the hw_init_fn pointer.  No
-functional change intended.
-
-Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ff1677e231651205e7e19770a677057dea05cb70)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pci/host/pcie-rcar.c |    7 +------
- 1 file changed, 1 insertion(+), 6 deletions(-)
-
---- a/drivers/pci/host/pcie-rcar.c
-+++ b/drivers/pci/host/pcie-rcar.c
-@@ -1125,7 +1125,6 @@ static int rcar_pcie_probe(struct platfo
- 	struct device *dev = &pdev->dev;
- 	struct rcar_pcie *pcie;
- 	unsigned int data;
--	const struct of_device_id *of_id;
- 	int err;
- 	int (*hw_init_fn)(struct rcar_pcie *);
- 
-@@ -1149,11 +1148,6 @@ static int rcar_pcie_probe(struct platfo
- 	if (err)
- 		return err;
- 
--	of_id = of_match_device(rcar_pcie_of_match, dev);
--	if (!of_id || !of_id->data)
--		return -EINVAL;
--	hw_init_fn = of_id->data;
--
- 	pm_runtime_enable(dev);
- 	err = pm_runtime_get_sync(dev);
- 	if (err < 0) {
-@@ -1162,6 +1156,7 @@ static int rcar_pcie_probe(struct platfo
- 	}
- 
- 	/* Failure to get a link might just be that no cards are inserted */
-+	hw_init_fn = of_device_get_match_data(dev);
- 	err = hw_init_fn(pcie);
- 	if (err) {
- 		dev_info(dev, "PCIe link down\n");
diff --git a/patches.renesas/0103-pinctrl-sh-pfc-r8a7795-Add-group-for-QSPI0-and-QSPI1.patch b/patches.renesas/0103-pinctrl-sh-pfc-r8a7795-Add-group-for-QSPI0-and-QSPI1.patch
deleted file mode 100644
index 3b2e4abff3f0ff..00000000000000
--- a/patches.renesas/0103-pinctrl-sh-pfc-r8a7795-Add-group-for-QSPI0-and-QSPI1.patch
+++ /dev/null
@@ -1,121 +0,0 @@
-From 6c4c1f858a06ee12eb2c02771a9b7db5ff489a0f Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Fri, 11 Nov 2016 21:33:41 +0100
-Subject: [PATCH 103/299] pinctrl: sh-pfc: r8a7795: Add group for QSPI0 and
- QSPI1 pins
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Group the QSPI0 and QSPI1 pins into similar groups found in other sh-pfc
-drivers. The pins can not be muxed between functions other than QSPI,
-but their drive strength can be controlled.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 1fa1522f61f1fa53b2518c82bb3c667161836e10)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7795.c |   69 +++++++++++++++++++++++++++++++++++
- 1 file changed, 69 insertions(+)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-@@ -3720,6 +3720,55 @@ static const unsigned int usb2_mux[] = {
- 	USB2_PWEN_MARK, USB2_OVC_MARK,
- };
- 
-+/* - QSPI0 ------------------------------------------------------------------ */
-+static const unsigned int qspi0_ctrl_pins[] = {
-+	/* QSPI0_SPCLK, QSPI0_SSL */
-+	PIN_NUMBER('W', 3), PIN_NUMBER('Y', 3),
-+};
-+static const unsigned int qspi0_ctrl_mux[] = {
-+	QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
-+};
-+static const unsigned int qspi0_data2_pins[] = {
-+	/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
-+	PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
-+};
-+static const unsigned int qspi0_data2_mux[] = {
-+	QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
-+};
-+static const unsigned int qspi0_data4_pins[] = {
-+	/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1, QSPI0_IO2, QSPI0_IO3 */
-+	PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
-+	PIN_NUMBER('Y', 6), PIN_A_NUMBER('B', 6),
-+};
-+static const unsigned int qspi0_data4_mux[] = {
-+	QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
-+	QSPI0_IO2_MARK, QSPI0_IO3_MARK,
-+};
-+/* - QSPI1 ------------------------------------------------------------------ */
-+static const unsigned int qspi1_ctrl_pins[] = {
-+	/* QSPI1_SPCLK, QSPI1_SSL */
-+	PIN_NUMBER('V', 3), PIN_NUMBER('V', 5),
-+};
-+static const unsigned int qspi1_ctrl_mux[] = {
-+	QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
-+};
-+static const unsigned int qspi1_data2_pins[] = {
-+	/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
-+	PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
-+};
-+static const unsigned int qspi1_data2_mux[] = {
-+	QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
-+};
-+static const unsigned int qspi1_data4_pins[] = {
-+	/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1, QSPI1_IO2, QSPI1_IO3 */
-+	PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
-+	PIN_A_NUMBER('E', 4), PIN_A_NUMBER('C', 3),
-+};
-+static const unsigned int qspi1_data4_mux[] = {
-+	QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
-+	QSPI1_IO2_MARK, QSPI1_IO3_MARK,
-+};
-+
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(audio_clk_a_a),
- 	SH_PFC_PIN_GROUP(audio_clk_a_b),
-@@ -4020,6 +4069,12 @@ static const struct sh_pfc_pin_group pin
- 	SH_PFC_PIN_GROUP(usb0),
- 	SH_PFC_PIN_GROUP(usb1),
- 	SH_PFC_PIN_GROUP(usb2),
-+	SH_PFC_PIN_GROUP(qspi0_ctrl),
-+	SH_PFC_PIN_GROUP(qspi0_data2),
-+	SH_PFC_PIN_GROUP(qspi0_data4),
-+	SH_PFC_PIN_GROUP(qspi1_ctrl),
-+	SH_PFC_PIN_GROUP(qspi1_data2),
-+	SH_PFC_PIN_GROUP(qspi1_data4),
- };
- 
- static const char * const audio_clk_groups[] = {
-@@ -4465,6 +4520,18 @@ static const char * const usb2_groups[]
- 	"usb2",
- };
- 
-+static const char * const qspi0_groups[] = {
-+	"qspi0_ctrl",
-+	"qspi0_data2",
-+	"qspi0_data4",
-+};
-+
-+static const char * const qspi1_groups[] = {
-+	"qspi1_ctrl",
-+	"qspi1_data2",
-+	"qspi1_data4",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(audio_clk),
- 	SH_PFC_FUNCTION(avb),
-@@ -4514,6 +4581,8 @@ static const struct sh_pfc_function pinm
- 	SH_PFC_FUNCTION(usb0),
- 	SH_PFC_FUNCTION(usb1),
- 	SH_PFC_FUNCTION(usb2),
-+	SH_PFC_FUNCTION(qspi0),
-+	SH_PFC_FUNCTION(qspi1),
- };
- 
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
diff --git a/patches.renesas/0104-serial-sh-sci-Fix-deadlock-caused-by-serial-output-r.patch b/patches.renesas/0104-serial-sh-sci-Fix-deadlock-caused-by-serial-output-r.patch
deleted file mode 100644
index e7dea942e4e007..00000000000000
--- a/patches.renesas/0104-serial-sh-sci-Fix-deadlock-caused-by-serial-output-r.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From c7a8465db9172e278a9427e04ed69092a9351bd2 Mon Sep 17 00:00:00 2001
-From: Takatoshi Akiyama <takatoshi.akiyama.kj@ps.hitachi-solutions.com>
-Date: Mon, 7 Nov 2016 16:56:50 +0100
-Subject: [PATCH 104/299] serial: sh-sci: Fix deadlock caused by serial output
- request
-
-While spin is already locked, serial output request causes the deadlock,
-because serial output process also tries to lock the spin.
-This patch removes serial output with spin locked.
-
-Signed-off-by: Takatoshi Akiyama <takatoshi.akiyama.kj@ps.hitachi-solutions.com>
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 6fc5a520429e29ae84cb9ce8e8c584166a54a1ee)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |   20 +++++---------------
- 1 file changed, 5 insertions(+), 15 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -1143,11 +1143,8 @@ static int sci_dma_rx_push(struct sci_po
- 	int copied;
- 
- 	copied = tty_insert_flip_string(tport, buf, count);
--	if (copied < count) {
--		dev_warn(port->dev, "Rx overrun: dropping %zu bytes\n",
--			 count - copied);
-+	if (copied < count)
- 		port->icount.buf_overrun++;
--	}
- 
- 	port->icount.rx += copied;
- 
-@@ -1162,8 +1159,6 @@ static int sci_dma_rx_find_active(struct
- 		if (s->active_rx == s->cookie_rx[i])
- 			return i;
- 
--	dev_err(s->port.dev, "%s: Rx cookie %d not found!\n", __func__,
--		s->active_rx);
- 	return -1;
- }
- 
-@@ -1224,9 +1219,9 @@ static void sci_dma_rx_complete(void *ar
- 
- 	dma_async_issue_pending(chan);
- 
-+	spin_unlock_irqrestore(&port->lock, flags);
- 	dev_dbg(port->dev, "%s: cookie %d #%d, new active cookie %d\n",
- 		__func__, s->cookie_rx[active], active, s->active_rx);
--	spin_unlock_irqrestore(&port->lock, flags);
- 	return;
- 
- fail:
-@@ -1274,8 +1269,6 @@ static void sci_submit_rx(struct sci_por
- 		if (dma_submit_error(s->cookie_rx[i]))
- 			goto fail;
- 
--		dev_dbg(s->port.dev, "%s(): cookie %d to #%d\n", __func__,
--			s->cookie_rx[i], i);
- 	}
- 
- 	s->active_rx = s->cookie_rx[0];
-@@ -1289,7 +1282,6 @@ fail:
- 	for (i = 0; i < 2; i++)
- 		s->cookie_rx[i] = -EINVAL;
- 	s->active_rx = -EINVAL;
--	dev_warn(s->port.dev, "Failed to re-start Rx DMA, using PIO\n");
- 	sci_rx_dma_release(s, true);
- }
- 
-@@ -1359,10 +1351,10 @@ static void rx_timer_fn(unsigned long ar
- 	int active, count;
- 	u16 scr;
- 
--	spin_lock_irqsave(&port->lock, flags);
--
- 	dev_dbg(port->dev, "DMA Rx timed out\n");
- 
-+	spin_lock_irqsave(&port->lock, flags);
-+
- 	active = sci_dma_rx_find_active(s);
- 	if (active < 0) {
- 		spin_unlock_irqrestore(&port->lock, flags);
-@@ -1371,9 +1363,9 @@ static void rx_timer_fn(unsigned long ar
- 
- 	status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state);
- 	if (status == DMA_COMPLETE) {
-+		spin_unlock_irqrestore(&port->lock, flags);
- 		dev_dbg(port->dev, "Cookie %d #%d has already completed\n",
- 			s->active_rx, active);
--		spin_unlock_irqrestore(&port->lock, flags);
- 
- 		/* Let packet complete handler take care of the packet */
- 		return;
-@@ -1397,8 +1389,6 @@ static void rx_timer_fn(unsigned long ar
- 	/* Handle incomplete DMA receive */
- 	dmaengine_terminate_all(s->chan_rx);
- 	read = sg_dma_len(&s->sg_rx[active]) - state.residue;
--	dev_dbg(port->dev, "Read %u bytes with cookie %d\n", read,
--		s->active_rx);
- 
- 	if (read) {
- 		count = sci_dma_rx_push(s, s->rx_buf[active], read);
diff --git a/patches.renesas/0105-ASoC-constify-snd_soc_ops-structures.patch b/patches.renesas/0105-ASoC-constify-snd_soc_ops-structures.patch
deleted file mode 100644
index a0346bd6b56007..00000000000000
--- a/patches.renesas/0105-ASoC-constify-snd_soc_ops-structures.patch
+++ /dev/null
@@ -1,401 +0,0 @@
-From 0d61075bbb9fb12ffc895fdb4bc2bf9842c30816 Mon Sep 17 00:00:00 2001
-From: Julia Lawall <Julia.Lawall@lip6.fr>
-Date: Sat, 15 Oct 2016 16:55:49 +0200
-Subject: [PATCH 105/299] ASoC: constify snd_soc_ops structures
-
-Check for snd_soc_ops structures that are only stored in the ops field of a
-snd_soc_dai_link structure.  This field is declared const, so snd_soc_ops
-structures that have this property can be declared as const also.
-
-The semantic patch that makes this change is as follows:
-(http://coccinelle.lip6.fr/)
-
-// <smpl>
-@r disable optional_qualifier@
-identifier i;
-position p;
-@@
-static struct snd_soc_ops i@p = { ... };
-
-@ok1@
-identifier r.i;
-struct snd_soc_dai_link e;
-position p;
-@@
-e.ops = &i@p;
-
-@ok2@
-identifier r.i, e;
-position p;
-@@
-struct snd_soc_dai_link e[] = { ..., { .ops = &i@p, }, ..., };
-
-@bad@
-position p != {r.p,ok1.p,ok2.p};
-identifier r.i;
-struct snd_soc_ops e;
-@@
-e@i@p
-
-@depends on !bad disable optional_qualifier@
-identifier r.i;
-@@
-static
-+const
- struct snd_soc_ops i = { ... };
-// </smpl>
-
-The effect on the layout of the .o files is shown by the following output
-of the size command, first before then after the transformation:
-
-   text    data     bss     dec     hex filename
-   4500     696       0    5196    144c sound/soc/generic/simple-card.o
-   4564     632       0    5196    144c sound/soc/generic/simple-card.o
-
-   text    data     bss     dec     hex filename
-   3018     608       0    3626     e2a sound/soc/generic/simple-scu-card.o
-   3074     544       0    3618     e22 sound/soc/generic/simple-scu-card.o
-
-   text    data     bss     dec     hex filename
-   4148    2448     768    7364    1cc4 sound/soc/intel/boards/bdw-rt5677.o
-   4212    2384     768    7364    1cc4 sound/soc/intel/boards/bdw-rt5677.o
-
-   text    data     bss     dec     hex filename
-   5403    4628     384   10415    28af sound/soc/intel/boards/bxt_da7219_max98357a.o
-   5531    4516     384   10431    28bf sound/soc/intel/boards/bxt_da7219_max98357a.o
-
-   text    data     bss     dec     hex filename
-   5275    4496     384   10155    27ab sound/soc/intel/boards/bxt_rt298.o
-   5403    4368     384   10155    27ab sound/soc/intel/boards/bxt_rt298.o
-
-   text    data     bss     dec     hex filename
-  10017    2344      48   12409    3079 sound/soc/intel/boards/bytcr_rt5640.o
-  10145    2232      48   12425    3089 sound/soc/intel/boards/bytcr_rt5640.o
-
-   text    data     bss     dec     hex filename
-   3719    2356       0    6075    17bb sound/soc/intel/boards/bytcr_rt5651.o
-   3847    2244       0    6091    17cb sound/soc/intel/boards/bytcr_rt5651.o
-
-   text    data     bss     dec     hex filename
-   3598    2392       0    5990    1766 sound/soc/intel/boards/cht_bsw_max98090_ti.o
-   3726    2280       0    6006    1776 sound/soc/intel/boards/cht_bsw_max98090_ti.o
-
-   text    data     bss     dec     hex filename
-   5343    3624      16    8983    2317 sound/soc/intel/boards/cht_bsw_rt5645.o
-   5471    3496      16    8983    2317 sound/soc/intel/boards/cht_bsw_rt5645.o
-
-   text    data     bss     dec     hex filename
-   4662    2592     384    7638    1dd6 sound/soc/intel/boards/cht_bsw_rt5672.o
-   4790    2464     384    7638    1dd6 sound/soc/intel/boards/cht_bsw_rt5672.o
-
-   text    data     bss     dec     hex filename
-   1595    2528       0    4123    101b sound/soc/intel/boards/haswell.o
-   1659    2472       0    4131    1023 sound/soc/intel/boards/haswell.o
-
-   text    data     bss     dec     hex filename
-   6272    4760     416   11448    2cb8 sound/soc/intel/boards/skl_nau88l25_max98357a.o
-   6464    4568     416   11448    2cb8 sound/soc/intel/boards/skl_nau88l25_max98357a.o
-
-   text    data     bss     dec     hex filename
-   7075    4888     416   12379    305b sound/soc/intel/boards/skl_nau88l25_ssm4567.o
-   7267    4696     416   12379    305b sound/soc/intel/boards/skl_nau88l25_ssm4567.o
-
-   text    data     bss     dec     hex filename
-   5659    4496     384   10539    292b sound/soc/intel/boards/skl_rt286.o
-   5787    4368     384   10539    292b sound/soc/intel/boards/skl_rt286.o
-
-   text    data     bss     dec     hex filename
-   1721    2048       0    3769     eb9 sound/soc/kirkwood/armada-370-db.o
-   1769    1976       0    3745     ea1 sound/soc/kirkwood/armada-370-db.o
-
-   text    data     bss     dec     hex filename
-   1363    1792       0    3155     c53 sound/soc/mxs/mxs-sgtl5000.o
-   1427    1728       0    3155     c53 sound/soc/mxs/mxs-sgtl5000.o
-
-Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 9b6fdef62b37714af9495d09eab1d0c8ba0509bd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/generic/simple-card.c                 |    2 +-
- sound/soc/generic/simple-scu-card.c             |    2 +-
- sound/soc/intel/boards/bdw-rt5677.c             |    2 +-
- sound/soc/intel/boards/bxt_da7219_max98357a.c   |    4 ++--
- sound/soc/intel/boards/bxt_rt298.c              |    4 ++--
- sound/soc/intel/boards/bytcr_rt5640.c           |    4 ++--
- sound/soc/intel/boards/bytcr_rt5651.c           |    4 ++--
- sound/soc/intel/boards/cht_bsw_max98090_ti.c    |    4 ++--
- sound/soc/intel/boards/cht_bsw_rt5645.c         |    4 ++--
- sound/soc/intel/boards/cht_bsw_rt5672.c         |    4 ++--
- sound/soc/intel/boards/haswell.c                |    2 +-
- sound/soc/intel/boards/skl_nau88l25_max98357a.c |    6 +++---
- sound/soc/intel/boards/skl_nau88l25_ssm4567.c   |    6 +++---
- sound/soc/intel/boards/skl_rt286.c              |    4 ++--
- sound/soc/kirkwood/armada-370-db.c              |    2 +-
- sound/soc/mxs/mxs-sgtl5000.c                    |    2 +-
- 16 files changed, 28 insertions(+), 28 deletions(-)
-
---- a/sound/soc/generic/simple-card.c
-+++ b/sound/soc/generic/simple-card.c
-@@ -174,7 +174,7 @@ err:
- 	return ret;
- }
- 
--static struct snd_soc_ops asoc_simple_card_ops = {
-+static const struct snd_soc_ops asoc_simple_card_ops = {
- 	.startup = asoc_simple_card_startup,
- 	.shutdown = asoc_simple_card_shutdown,
- 	.hw_params = asoc_simple_card_hw_params,
---- a/sound/soc/generic/simple-scu-card.c
-+++ b/sound/soc/generic/simple-scu-card.c
-@@ -59,7 +59,7 @@ static void asoc_simple_card_shutdown(st
- 	clk_disable_unprepare(dai_props->clk);
- }
- 
--static struct snd_soc_ops asoc_simple_card_ops = {
-+static const struct snd_soc_ops asoc_simple_card_ops = {
- 	.startup = asoc_simple_card_startup,
- 	.shutdown = asoc_simple_card_shutdown,
- };
---- a/sound/soc/intel/boards/bdw-rt5677.c
-+++ b/sound/soc/intel/boards/bdw-rt5677.c
-@@ -156,7 +156,7 @@ static int bdw_rt5677_hw_params(struct s
- 	return ret;
- }
- 
--static struct snd_soc_ops bdw_rt5677_ops = {
-+static const struct snd_soc_ops bdw_rt5677_ops = {
- 	.hw_params = bdw_rt5677_hw_params,
- };
- 
---- a/sound/soc/intel/boards/bxt_da7219_max98357a.c
-+++ b/sound/soc/intel/boards/bxt_da7219_max98357a.c
-@@ -248,7 +248,7 @@ static int broxton_da7219_hw_free(struct
- 	return ret;
- }
- 
--static struct snd_soc_ops broxton_da7219_ops = {
-+static const struct snd_soc_ops broxton_da7219_ops = {
- 	.hw_params = broxton_da7219_hw_params,
- 	.hw_free = broxton_da7219_hw_free,
- };
-@@ -295,7 +295,7 @@ static int broxton_refcap_startup(struct
- 			&constraints_16000);
- };
- 
--static struct snd_soc_ops broxton_refcap_ops = {
-+static const struct snd_soc_ops broxton_refcap_ops = {
- 	.startup = broxton_refcap_startup,
- };
- 
---- a/sound/soc/intel/boards/bxt_rt298.c
-+++ b/sound/soc/intel/boards/bxt_rt298.c
-@@ -181,7 +181,7 @@ static int broxton_rt298_hw_params(struc
- 	return ret;
- }
- 
--static struct snd_soc_ops broxton_rt298_ops = {
-+static const struct snd_soc_ops broxton_rt298_ops = {
- 	.hw_params = broxton_rt298_hw_params,
- };
- 
-@@ -230,7 +230,7 @@ static int broxton_dmic_startup(struct s
- 				SNDRV_PCM_HW_PARAM_RATE, &constraints_rates);
- }
- 
--static struct snd_soc_ops broxton_dmic_ops = {
-+static const struct snd_soc_ops broxton_dmic_ops = {
- 	.startup = broxton_dmic_startup,
- };
- 
---- a/sound/soc/intel/boards/bytcr_rt5640.c
-+++ b/sound/soc/intel/boards/bytcr_rt5640.c
-@@ -605,11 +605,11 @@ static int byt_rt5640_aif1_startup(struc
- 			SNDRV_PCM_HW_PARAM_RATE, 48000);
- }
- 
--static struct snd_soc_ops byt_rt5640_aif1_ops = {
-+static const struct snd_soc_ops byt_rt5640_aif1_ops = {
- 	.startup = byt_rt5640_aif1_startup,
- };
- 
--static struct snd_soc_ops byt_rt5640_be_ssp2_ops = {
-+static const struct snd_soc_ops byt_rt5640_be_ssp2_ops = {
- 	.hw_params = byt_rt5640_aif1_hw_params,
- };
- 
---- a/sound/soc/intel/boards/bytcr_rt5651.c
-+++ b/sound/soc/intel/boards/bytcr_rt5651.c
-@@ -219,11 +219,11 @@ static int byt_rt5651_aif1_startup(struc
- 			&constraints_48000);
- }
- 
--static struct snd_soc_ops byt_rt5651_aif1_ops = {
-+static const struct snd_soc_ops byt_rt5651_aif1_ops = {
- 	.startup = byt_rt5651_aif1_startup,
- };
- 
--static struct snd_soc_ops byt_rt5651_be_ssp2_ops = {
-+static const struct snd_soc_ops byt_rt5651_be_ssp2_ops = {
- 	.hw_params = byt_rt5651_aif1_hw_params,
- };
- 
---- a/sound/soc/intel/boards/cht_bsw_max98090_ti.c
-+++ b/sound/soc/intel/boards/cht_bsw_max98090_ti.c
-@@ -221,11 +221,11 @@ static int cht_max98090_headset_init(str
- 	return ts3a227e_enable_jack_detect(component, &ctx->jack);
- }
- 
--static struct snd_soc_ops cht_aif1_ops = {
-+static const struct snd_soc_ops cht_aif1_ops = {
- 	.startup = cht_aif1_startup,
- };
- 
--static struct snd_soc_ops cht_be_ssp2_ops = {
-+static const struct snd_soc_ops cht_be_ssp2_ops = {
- 	.hw_params = cht_aif1_hw_params,
- };
- 
---- a/sound/soc/intel/boards/cht_bsw_rt5645.c
-+++ b/sound/soc/intel/boards/cht_bsw_rt5645.c
-@@ -294,11 +294,11 @@ static int cht_aif1_startup(struct snd_p
- 			SNDRV_PCM_HW_PARAM_RATE, 48000);
- }
- 
--static struct snd_soc_ops cht_aif1_ops = {
-+static const struct snd_soc_ops cht_aif1_ops = {
- 	.startup = cht_aif1_startup,
- };
- 
--static struct snd_soc_ops cht_be_ssp2_ops = {
-+static const struct snd_soc_ops cht_be_ssp2_ops = {
- 	.hw_params = cht_aif1_hw_params,
- };
- 
---- a/sound/soc/intel/boards/cht_bsw_rt5672.c
-+++ b/sound/soc/intel/boards/cht_bsw_rt5672.c
-@@ -225,11 +225,11 @@ static int cht_aif1_startup(struct snd_p
- 			SNDRV_PCM_HW_PARAM_RATE, 48000);
- }
- 
--static struct snd_soc_ops cht_aif1_ops = {
-+static const struct snd_soc_ops cht_aif1_ops = {
- 	.startup = cht_aif1_startup,
- };
- 
--static struct snd_soc_ops cht_be_ssp2_ops = {
-+static const struct snd_soc_ops cht_be_ssp2_ops = {
- 	.hw_params = cht_aif1_hw_params,
- };
- 
---- a/sound/soc/intel/boards/haswell.c
-+++ b/sound/soc/intel/boards/haswell.c
-@@ -81,7 +81,7 @@ static int haswell_rt5640_hw_params(stru
- 	return ret;
- }
- 
--static struct snd_soc_ops haswell_rt5640_ops = {
-+static const struct snd_soc_ops haswell_rt5640_ops = {
- 	.hw_params = haswell_rt5640_hw_params,
- };
- 
---- a/sound/soc/intel/boards/skl_nau88l25_max98357a.c
-+++ b/sound/soc/intel/boards/skl_nau88l25_max98357a.c
-@@ -332,7 +332,7 @@ static int skylake_nau8825_hw_params(str
- 	return ret;
- }
- 
--static struct snd_soc_ops skylake_nau8825_ops = {
-+static const struct snd_soc_ops skylake_nau8825_ops = {
- 	.hw_params = skylake_nau8825_hw_params,
- };
- 
-@@ -382,7 +382,7 @@ static int skylake_dmic_startup(struct s
- 			SNDRV_PCM_HW_PARAM_RATE, &constraints_rates);
- }
- 
--static struct snd_soc_ops skylake_dmic_ops = {
-+static const struct snd_soc_ops skylake_dmic_ops = {
- 	.startup = skylake_dmic_startup,
- };
- 
-@@ -416,7 +416,7 @@ static int skylake_refcap_startup(struct
- 				&constraints_16000);
- }
- 
--static struct snd_soc_ops skylaye_refcap_ops = {
-+static const struct snd_soc_ops skylaye_refcap_ops = {
- 	.startup = skylake_refcap_startup,
- };
- 
---- a/sound/soc/intel/boards/skl_nau88l25_ssm4567.c
-+++ b/sound/soc/intel/boards/skl_nau88l25_ssm4567.c
-@@ -394,7 +394,7 @@ static int skylake_nau8825_hw_params(str
- 	return ret;
- }
- 
--static struct snd_soc_ops skylake_nau8825_ops = {
-+static const struct snd_soc_ops skylake_nau8825_ops = {
- 	.hw_params = skylake_nau8825_hw_params,
- };
- 
-@@ -430,7 +430,7 @@ static int skylake_dmic_startup(struct s
- 			SNDRV_PCM_HW_PARAM_RATE, &constraints_rates);
- }
- 
--static struct snd_soc_ops skylake_dmic_ops = {
-+static const struct snd_soc_ops skylake_dmic_ops = {
- 	.startup = skylake_dmic_startup,
- };
- 
-@@ -464,7 +464,7 @@ static int skylake_refcap_startup(struct
- 			&constraints_16000);
- }
- 
--static struct snd_soc_ops skylaye_refcap_ops = {
-+static const struct snd_soc_ops skylaye_refcap_ops = {
- 	.startup = skylake_refcap_startup,
- };
- 
---- a/sound/soc/intel/boards/skl_rt286.c
-+++ b/sound/soc/intel/boards/skl_rt286.c
-@@ -250,7 +250,7 @@ static int skylake_rt286_hw_params(struc
- 	return ret;
- }
- 
--static struct snd_soc_ops skylake_rt286_ops = {
-+static const struct snd_soc_ops skylake_rt286_ops = {
- 	.hw_params = skylake_rt286_hw_params,
- };
- 
-@@ -289,7 +289,7 @@ static int skylake_dmic_startup(struct s
- 			SNDRV_PCM_HW_PARAM_RATE, &constraints_rates);
- }
- 
--static struct snd_soc_ops skylake_dmic_ops = {
-+static const struct snd_soc_ops skylake_dmic_ops = {
- 	.startup = skylake_dmic_startup,
- };
- 
---- a/sound/soc/kirkwood/armada-370-db.c
-+++ b/sound/soc/kirkwood/armada-370-db.c
-@@ -42,7 +42,7 @@ static int a370db_hw_params(struct snd_p
- 	return snd_soc_dai_set_sysclk(codec_dai, 0, freq, SND_SOC_CLOCK_IN);
- }
- 
--static struct snd_soc_ops a370db_ops = {
-+static const struct snd_soc_ops a370db_ops = {
- 	.hw_params = a370db_hw_params,
- };
- 
---- a/sound/soc/mxs/mxs-sgtl5000.c
-+++ b/sound/soc/mxs/mxs-sgtl5000.c
-@@ -68,7 +68,7 @@ static int mxs_sgtl5000_hw_params(struct
- 	return 0;
- }
- 
--static struct snd_soc_ops mxs_sgtl5000_hifi_ops = {
-+static const struct snd_soc_ops mxs_sgtl5000_hifi_ops = {
- 	.hw_params = mxs_sgtl5000_hw_params,
- };
- 
diff --git a/patches.renesas/0105-ASoC-rsnd-fixup-parent_clk_name-of-AUDIO_CLKOUTx.patch b/patches.renesas/0105-ASoC-rsnd-fixup-parent_clk_name-of-AUDIO_CLKOUTx.patch
deleted file mode 100644
index ff091701017fea..00000000000000
--- a/patches.renesas/0105-ASoC-rsnd-fixup-parent_clk_name-of-AUDIO_CLKOUTx.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From b12b392f643bed70c859a953ca4ff8c5c3a8bf42 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 26 May 2017 01:44:19 +0000
-Subject: [PATCH 105/286] ASoC: rsnd: fixup parent_clk_name of AUDIO_CLKOUTx
-
-commit 25165f79adc7 ("ASoC: rsnd: enable clock-frequency for both
-44.1kHz/48kHz") supported both 44.1kHz/48kHz for AUDIO_CLKOUTx,
-but it didn't care its parent clock name.
-This patch fixes it.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit e8a3ce1130134046e9da132aa4d043566df8237d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/adg.c |    6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
---- a/sound/soc/sh/rcar/adg.c
-+++ b/sound/soc/sh/rcar/adg.c
-@@ -507,7 +507,8 @@ static void rsnd_adg_get_clkout(struct r
- 				rbga = rbgx;
- 				adg->rbga_rate_for_441khz = rate / div;
- 				ckr |= brg_table[i] << 20;
--				if (req_441kHz_rate)
-+				if (req_441kHz_rate &&
-+				    !(adg_mode_flags(adg) & AUDIO_OUT_48))
- 					parent_clk_name = __clk_get_name(clk);
- 			}
- 		}
-@@ -522,7 +523,8 @@ static void rsnd_adg_get_clkout(struct r
- 				rbgb = rbgx;
- 				adg->rbgb_rate_for_48khz = rate / div;
- 				ckr |= brg_table[i] << 16;
--				if (req_48kHz_rate)
-+				if (req_48kHz_rate &&
-+				    (adg_mode_flags(adg) & AUDIO_OUT_48))
- 					parent_clk_name = __clk_get_name(clk);
- 			}
- 		}
diff --git a/patches.renesas/0105-Revert-phy-micrel-Disable-auto-negotiation-on-startu.patch b/patches.renesas/0105-Revert-phy-micrel-Disable-auto-negotiation-on-startu.patch
deleted file mode 100644
index 6d1264efd3900b..00000000000000
--- a/patches.renesas/0105-Revert-phy-micrel-Disable-auto-negotiation-on-startu.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 966c476ad2b363ea14edb8e9050412b875397774 Mon Sep 17 00:00:00 2001
-From: "David S. Miller" <davem@davemloft.net>
-Date: Wed, 26 Apr 2017 14:33:14 -0400
-Subject: [PATCH 105/255] Revert "phy: micrel: Disable auto negotiation on
- startup"
-
-This reverts commit 99f81afc139c6edd14d77a91ee91685a414a1c66.
-
-It was papering over the real problem, which is fixed by commit
-f555f34fdc58 ("net: phy: fix auto-negotiation stall due to unavailable
-interrupt")
-
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit b43bd72835a5f7adef81fe53fa1fbe7b0e43df8e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/phy/micrel.c |   11 -----------
- 1 file changed, 11 deletions(-)
-
---- a/drivers/net/phy/micrel.c
-+++ b/drivers/net/phy/micrel.c
-@@ -297,17 +297,6 @@ static int kszphy_config_init(struct phy
- 	if (priv->led_mode >= 0)
- 		kszphy_setup_led(phydev, type->led_mode_reg, priv->led_mode);
- 
--	if (phy_interrupt_is_valid(phydev)) {
--		int ctl = phy_read(phydev, MII_BMCR);
--
--		if (ctl < 0)
--			return ctl;
--
--		ret = phy_write(phydev, MII_BMCR, ctl & ~BMCR_ANENABLE);
--		if (ret < 0)
--			return ret;
--	}
--
- 	return 0;
- }
- 
diff --git a/patches.renesas/0106-ASoC-simple-scu-card-code-sync-follow-to-simple-fami.patch b/patches.renesas/0106-ASoC-simple-scu-card-code-sync-follow-to-simple-fami.patch
deleted file mode 100644
index dc7f1c41231389..00000000000000
--- a/patches.renesas/0106-ASoC-simple-scu-card-code-sync-follow-to-simple-fami.patch
+++ /dev/null
@@ -1,175 +0,0 @@
-From e0cb1e3601f815ee5634fc82577a7078081f2466 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 28 Oct 2016 03:37:26 +0000
-Subject: [PATCH 106/299] ASoC: simple-scu-card: code sync: follow to simple
- family style
-
-simple sound card family are using very similar style, but because of its
-historical reason, there are small differences. For example pointer style,
-function name, caller postion etc...
-This patch synchronized simple card style to other simple card family
-
-Current simple-scu-card function naming is different from other simple card
-family. And related to it, the necessary operation position is also
-different. This patch synchronize these to other simple card family.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 15a190ffec3b3f5e632faaa01b92f4cef32d63a3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/generic/simple-scu-card.c |   99 +++++++++++++++---------------------
- 1 file changed, 43 insertions(+), 56 deletions(-)
-
---- a/sound/soc/generic/simple-scu-card.c
-+++ b/sound/soc/generic/simple-scu-card.c
-@@ -101,7 +101,7 @@ static int asoc_simple_card_be_hw_params
- 	return 0;
- }
- 
--static int asoc_simple_card_parse_links(struct device_node *np,
-+static int asoc_simple_card_dai_link_of(struct device_node *np,
- 					struct asoc_simple_card_priv *priv,
- 					unsigned int daifmt,
- 					int idx, bool is_fe)
-@@ -195,22 +195,35 @@ static int asoc_simple_card_parse_links(
- 	return 0;
- }
- 
--static int asoc_simple_card_dai_link_of(struct device_node *node,
--				 struct asoc_simple_card_priv *priv)
-+static int asoc_simple_card_parse_of(struct device_node *node,
-+				     struct asoc_simple_card_priv *priv)
-+
- {
- 	struct device *dev = simple_priv_to_dev(priv);
- 	struct device_node *np;
- 	unsigned int daifmt = 0;
--	int ret, i;
- 	bool is_fe;
-+	int ret, i;
-+
-+	if (!node)
-+		return -EINVAL;
-+
-+	ret = snd_soc_of_parse_audio_routing(&priv->snd_card, PREFIX "routing");
-+	if (ret < 0)
-+		return ret;
-+
-+	/* sampling rate convert */
-+	of_property_read_u32(node, PREFIX "convert-rate", &priv->convert_rate);
-+
-+	/* channels transfer */
-+	of_property_read_u32(node, PREFIX "convert-channels", &priv->convert_channels);
- 
- 	/* find 1st codec */
- 	np = of_get_child_by_name(node, PREFIX "codec");
- 	if (!np)
- 		return -ENODEV;
- 
--	ret = asoc_simple_card_parse_daifmt(dev, node, np,
--					    PREFIX, &daifmt);
-+	ret = asoc_simple_card_parse_daifmt(dev, node, np, PREFIX, &daifmt);
- 	if (ret < 0)
- 		return ret;
- 
-@@ -220,58 +233,12 @@ static int asoc_simple_card_dai_link_of(
- 		if (strcmp(np->name, PREFIX "cpu") == 0)
- 			is_fe = true;
- 
--		ret = asoc_simple_card_parse_links(np, priv, daifmt, i, is_fe);
-+		ret = asoc_simple_card_dai_link_of(np, priv, daifmt, i, is_fe);
- 		if (ret < 0)
- 			return ret;
- 		i++;
- 	}
- 
--	return 0;
--}
--
--static int asoc_simple_card_parse_of(struct device_node *node,
--			      struct asoc_simple_card_priv *priv,
--			      struct device *dev)
--{
--	struct asoc_simple_dai *props;
--	struct snd_soc_dai_link *links;
--	int ret;
--	int num;
--
--	if (!node)
--		return -EINVAL;
--
--	num = of_get_child_count(node);
--	props = devm_kzalloc(dev, sizeof(*props) * num, GFP_KERNEL);
--	links = devm_kzalloc(dev, sizeof(*links) * num, GFP_KERNEL);
--	if (!props || !links)
--		return -ENOMEM;
--
--	priv->dai_props	= props;
--	priv->dai_link	= links;
--
--	/* Init snd_soc_card */
--	priv->snd_card.owner			= THIS_MODULE;
--	priv->snd_card.dev			= dev;
--	priv->snd_card.dai_link			= priv->dai_link;
--	priv->snd_card.num_links		= num;
--	priv->snd_card.codec_conf		= &priv->codec_conf;
--	priv->snd_card.num_configs		= 1;
--
--	ret = snd_soc_of_parse_audio_routing(&priv->snd_card, PREFIX "routing");
--	if (ret < 0)
--		return ret;
--
--	/* sampling rate convert */
--	of_property_read_u32(node, PREFIX "convert-rate", &priv->convert_rate);
--
--	/* channels transfer */
--	of_property_read_u32(node, PREFIX "convert-channels", &priv->convert_channels);
--
--	ret = asoc_simple_card_dai_link_of(node, priv);
--	if (ret < 0)
--		return ret;
--
- 	ret = asoc_simple_card_parse_card_name(&priv->snd_card, PREFIX);
- 	if (ret < 0)
- 		return ret;
-@@ -287,16 +254,36 @@ static int asoc_simple_card_parse_of(str
- static int asoc_simple_card_probe(struct platform_device *pdev)
- {
- 	struct asoc_simple_card_priv *priv;
--	struct device_node *np = pdev->dev.of_node;
-+	struct snd_soc_dai_link *links;
-+	struct asoc_simple_dai *props;
- 	struct device *dev = &pdev->dev;
--	int ret;
-+	struct device_node *np = pdev->dev.of_node;
-+	int num, ret;
- 
- 	/* Allocate the private data */
- 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- 	if (!priv)
- 		return -ENOMEM;
- 
--	ret = asoc_simple_card_parse_of(np, priv, dev);
-+	num = of_get_child_count(np);
-+
-+	props = devm_kzalloc(dev, sizeof(*props) * num, GFP_KERNEL);
-+	links = devm_kzalloc(dev, sizeof(*links) * num, GFP_KERNEL);
-+	if (!props || !links)
-+		return -ENOMEM;
-+
-+	priv->dai_props				= props;
-+	priv->dai_link				= links;
-+
-+	/* Init snd_soc_card */
-+	priv->snd_card.owner			= THIS_MODULE;
-+	priv->snd_card.dev			= dev;
-+	priv->snd_card.dai_link			= priv->dai_link;
-+	priv->snd_card.num_links		= num;
-+	priv->snd_card.codec_conf		= &priv->codec_conf;
-+	priv->snd_card.num_configs		= 1;
-+
-+	ret = asoc_simple_card_parse_of(np, priv);
- 	if (ret < 0) {
- 		if (ret != -EPROBE_DEFER)
- 			dev_err(dev, "parse error %d\n", ret);
diff --git a/patches.renesas/0106-phy-rcar-gen3-usb2-Replace-the-deprecated-extcon-API.patch b/patches.renesas/0106-phy-rcar-gen3-usb2-Replace-the-deprecated-extcon-API.patch
deleted file mode 100644
index abf570b1412507..00000000000000
--- a/patches.renesas/0106-phy-rcar-gen3-usb2-Replace-the-deprecated-extcon-API.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From d1e2af75c79e808aa5e3ab142a97bb90fc3bdbdb Mon Sep 17 00:00:00 2001
-From: Chanwoo Choi <cw00.choi@samsung.com>
-Date: Fri, 30 Dec 2016 13:11:28 +0900
-Subject: [PATCH 106/255] phy: rcar-gen3-usb2: Replace the deprecated extcon
- API
-
-This patch replaces the deprecated extcon API as following:
-- extcon_set_cable_state_() -> extcon_set_state_sync()
-
-Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
-Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
-(cherry picked from commit c6f30a5b8eaa4b4421989ef1e788db30a1f2e142)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/phy/phy-rcar-gen3-usb2.c |    8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/phy/phy-rcar-gen3-usb2.c
-+++ b/drivers/phy/phy-rcar-gen3-usb2.c
-@@ -94,11 +94,11 @@ static void rcar_gen3_phy_usb2_work(stru
- 						 work);
- 
- 	if (ch->extcon_host) {
--		extcon_set_cable_state_(ch->extcon, EXTCON_USB_HOST, true);
--		extcon_set_cable_state_(ch->extcon, EXTCON_USB, false);
-+		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
-+		extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
- 	} else {
--		extcon_set_cable_state_(ch->extcon, EXTCON_USB_HOST, false);
--		extcon_set_cable_state_(ch->extcon, EXTCON_USB, true);
-+		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
-+		extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
- 	}
- }
- 
diff --git a/patches.renesas/0106-soc-renesas-Identify-RZ-G1H.patch b/patches.renesas/0106-soc-renesas-Identify-RZ-G1H.patch
deleted file mode 100644
index 547db7f4455b7a..00000000000000
--- a/patches.renesas/0106-soc-renesas-Identify-RZ-G1H.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From bf263b778b4c2a544c6fdfc5ea3d68b94b2a3af6 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:48:29 +0100
-Subject: [PATCH 106/286] soc: renesas: Identify RZ/G1H
-
-Add support for identifying the RZ/G1H (r8a7742) SoC.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8848e1b14231a40ed66229fb3ee98519b32f2ae7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/soc/renesas/renesas-soc.c |    8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/soc/renesas/renesas-soc.c
-+++ b/drivers/soc/renesas/renesas-soc.c
-@@ -80,6 +80,11 @@ static const struct renesas_soc soc_rmob
- 	.id	= 0x40,
- };
- 
-+static const struct renesas_soc soc_rz_g1h __initconst __maybe_unused = {
-+	.family	= &fam_rzg,
-+	.id	= 0x45,
-+};
-+
- static const struct renesas_soc soc_rz_g1m __initconst __maybe_unused = {
- 	.family	= &fam_rzg,
- 	.id	= 0x47,
-@@ -150,6 +155,9 @@ static const struct of_device_id renesas
- #ifdef CONFIG_ARCH_R8A7740
- 	{ .compatible = "renesas,r8a7740",	.data = &soc_rmobile_a1 },
- #endif
-+#ifdef CONFIG_ARCH_R8A7742
-+	{ .compatible = "renesas,r8a7742",	.data = &soc_rz_g1h },
-+#endif
- #ifdef CONFIG_ARCH_R8A7743
- 	{ .compatible = "renesas,r8a7743",	.data = &soc_rz_g1m },
- #endif
diff --git a/patches.renesas/0107-ASoC-simple-scu-card-code-sync-rename-asoc_simple_ca.patch b/patches.renesas/0107-ASoC-simple-scu-card-code-sync-rename-asoc_simple_ca.patch
deleted file mode 100644
index a76f31d0b13b6a..00000000000000
--- a/patches.renesas/0107-ASoC-simple-scu-card-code-sync-rename-asoc_simple_ca.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From 4839d817c2ce87d2737e1c7e4c968d0e09bb4a82 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 28 Oct 2016 03:37:44 +0000
-Subject: [PATCH 107/299] ASoC: simple-scu-card: code sync: rename
- asoc_simple_card_priv
-
-simple sound card family are using very similar style, but because of its
-historical reason, there are small differences. For example pointer style,
-function name, caller postion etc...
-This patch synchronized simple card style to other simple card family
-
-This patch renames asoc_simple_card_priv to simple_card_data,
-same as other simple card family.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 6910e8679ff4d256028003be2451deb31f13948e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/generic/simple-scu-card.c |   16 ++++++++--------
- 1 file changed, 8 insertions(+), 8 deletions(-)
-
---- a/sound/soc/generic/simple-scu-card.c
-+++ b/sound/soc/generic/simple-scu-card.c
-@@ -22,7 +22,7 @@
- #include <sound/soc-dai.h>
- #include <sound/simple_card_utils.h>
- 
--struct asoc_simple_card_priv {
-+struct simple_card_data {
- 	struct snd_soc_card snd_card;
- 	struct snd_soc_codec_conf codec_conf;
- 	struct asoc_simple_dai *dai_props;
-@@ -42,7 +42,7 @@ struct asoc_simple_card_priv {
- static int asoc_simple_card_startup(struct snd_pcm_substream *substream)
- {
- 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
--	struct asoc_simple_card_priv *priv =	snd_soc_card_get_drvdata(rtd->card);
-+	struct simple_card_data *priv =	snd_soc_card_get_drvdata(rtd->card);
- 	struct asoc_simple_dai *dai_props =
- 		simple_priv_to_props(priv, rtd->num);
- 
-@@ -52,7 +52,7 @@ static int asoc_simple_card_startup(stru
- static void asoc_simple_card_shutdown(struct snd_pcm_substream *substream)
- {
- 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
--	struct asoc_simple_card_priv *priv =	snd_soc_card_get_drvdata(rtd->card);
-+	struct simple_card_data *priv =	snd_soc_card_get_drvdata(rtd->card);
- 	struct asoc_simple_dai *dai_props =
- 		simple_priv_to_props(priv, rtd->num);
- 
-@@ -66,7 +66,7 @@ static const struct snd_soc_ops asoc_sim
- 
- static int asoc_simple_card_dai_init(struct snd_soc_pcm_runtime *rtd)
- {
--	struct asoc_simple_card_priv *priv = snd_soc_card_get_drvdata(rtd->card);
-+	struct simple_card_data *priv = snd_soc_card_get_drvdata(rtd->card);
- 	struct snd_soc_dai *dai;
- 	struct snd_soc_dai_link *dai_link;
- 	struct asoc_simple_dai *dai_props;
-@@ -84,7 +84,7 @@ static int asoc_simple_card_dai_init(str
- static int asoc_simple_card_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
- 					struct snd_pcm_hw_params *params)
- {
--	struct asoc_simple_card_priv *priv = snd_soc_card_get_drvdata(rtd->card);
-+	struct simple_card_data *priv = snd_soc_card_get_drvdata(rtd->card);
- 	struct snd_interval *rate = hw_param_interval(params,
- 						      SNDRV_PCM_HW_PARAM_RATE);
- 	struct snd_interval *channels = hw_param_interval(params,
-@@ -102,7 +102,7 @@ static int asoc_simple_card_be_hw_params
- }
- 
- static int asoc_simple_card_dai_link_of(struct device_node *np,
--					struct asoc_simple_card_priv *priv,
-+					struct simple_card_data *priv,
- 					unsigned int daifmt,
- 					int idx, bool is_fe)
- {
-@@ -196,7 +196,7 @@ static int asoc_simple_card_dai_link_of(
- }
- 
- static int asoc_simple_card_parse_of(struct device_node *node,
--				     struct asoc_simple_card_priv *priv)
-+				     struct simple_card_data *priv)
- 
- {
- 	struct device *dev = simple_priv_to_dev(priv);
-@@ -253,7 +253,7 @@ static int asoc_simple_card_parse_of(str
- 
- static int asoc_simple_card_probe(struct platform_device *pdev)
- {
--	struct asoc_simple_card_priv *priv;
-+	struct simple_card_data *priv;
- 	struct snd_soc_dai_link *links;
- 	struct asoc_simple_dai *props;
- 	struct device *dev = &pdev->dev;
diff --git a/patches.renesas/0107-can-rcar_can-Do-not-print-virtual-addresses.patch b/patches.renesas/0107-can-rcar_can-Do-not-print-virtual-addresses.patch
deleted file mode 100644
index 3980a980a7f786..00000000000000
--- a/patches.renesas/0107-can-rcar_can-Do-not-print-virtual-addresses.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From f7b7695a93d8e1a605721f3deaa6b09dc472192f Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 3 Apr 2017 12:11:26 +0200
-Subject: [PATCH 107/255] can: rcar_can: Do not print virtual addresses
-
-During probe, the rcar_can driver prints:
-
-    rcar_can e6e80000.can: device registered (regs @ e08bc000, IRQ76)
-
-The "regs" value is a virtual address, exposing internal information,
-hence stop printing it.  The (useful) physical address is already
-printed as part of the device name.
-
-Fixes: fd1159318e55e901 ("can: add Renesas R-Car CAN driver")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
-(cherry picked from commit ca257b9e2d807ab6cb2678ecc7b74aaf4651f597)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/can/rcar/rcar_can.c |    3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
---- a/drivers/net/can/rcar/rcar_can.c
-+++ b/drivers/net/can/rcar/rcar_can.c
-@@ -826,8 +826,7 @@ static int rcar_can_probe(struct platfor
- 
- 	devm_can_led_init(ndev);
- 
--	dev_info(&pdev->dev, "device registered (regs @ %p, IRQ%d)\n",
--		 priv->regs, ndev->irq);
-+	dev_info(&pdev->dev, "device registered (IRQ%d)\n", ndev->irq);
- 
- 	return 0;
- fail_candev:
diff --git a/patches.renesas/0107-soc-renesas-Identify-RZ-G1N.patch b/patches.renesas/0107-soc-renesas-Identify-RZ-G1N.patch
deleted file mode 100644
index 87de90d73a0b62..00000000000000
--- a/patches.renesas/0107-soc-renesas-Identify-RZ-G1N.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 1b8a2f707ba20da6c91df51a973b509e05c4e257 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 14:48:30 +0100
-Subject: [PATCH 107/286] soc: renesas: Identify RZ/G1N
-
-Add support for identifying the RZ/G1N (r8a7744) SoC.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cd59de80dd34dd2d1a3ca97d7a6e712c048b135a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/soc/renesas/renesas-soc.c |    8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/soc/renesas/renesas-soc.c
-+++ b/drivers/soc/renesas/renesas-soc.c
-@@ -90,6 +90,11 @@ static const struct renesas_soc soc_rz_g
- 	.id	= 0x47,
- };
- 
-+static const struct renesas_soc soc_rz_g1n __initconst __maybe_unused = {
-+	.family	= &fam_rzg,
-+	.id	= 0x4b,
-+};
-+
- static const struct renesas_soc soc_rz_g1e __initconst __maybe_unused = {
- 	.family	= &fam_rzg,
- 	.id	= 0x4c,
-@@ -161,6 +166,9 @@ static const struct of_device_id renesas
- #ifdef CONFIG_ARCH_R8A7743
- 	{ .compatible = "renesas,r8a7743",	.data = &soc_rz_g1m },
- #endif
-+#ifdef CONFIG_ARCH_R8A7744
-+	{ .compatible = "renesas,r8a7744",	.data = &soc_rz_g1n },
-+#endif
- #ifdef CONFIG_ARCH_R8A7745
- 	{ .compatible = "renesas,r8a7745",	.data = &soc_rz_g1e },
- #endif
diff --git a/patches.renesas/0108-ASoC-simple-scu-card-code-sync-tidyup-props-link-nam.patch b/patches.renesas/0108-ASoC-simple-scu-card-code-sync-tidyup-props-link-nam.patch
deleted file mode 100644
index 44be22c7761273..00000000000000
--- a/patches.renesas/0108-ASoC-simple-scu-card-code-sync-tidyup-props-link-nam.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From f0bf067eb8f8b3cd115960cad74cfe98ff388978 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 28 Oct 2016 03:38:00 +0000
-Subject: [PATCH 108/299] ASoC: simple-scu-card: code sync: tidyup props/link
- naming
-
-simple sound card family are using very similar style, but because of its
-historical reason, there are small differences. For example pointer style,
-function name, caller postion etc...
-This patch synchronizes style to other simple card family so that be enable
-to easy reviewing.
-
-This patch uses dai_link/dai_props instead of links/props.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 193599264f3eb632f43f83f738b17241f91dbd5a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/generic/simple-scu-card.c |   14 +++++++-------
- 1 file changed, 7 insertions(+), 7 deletions(-)
-
---- a/sound/soc/generic/simple-scu-card.c
-+++ b/sound/soc/generic/simple-scu-card.c
-@@ -254,8 +254,8 @@ static int asoc_simple_card_parse_of(str
- static int asoc_simple_card_probe(struct platform_device *pdev)
- {
- 	struct simple_card_data *priv;
--	struct snd_soc_dai_link *links;
--	struct asoc_simple_dai *props;
-+	struct snd_soc_dai_link *dai_link;
-+	struct asoc_simple_dai *dai_props;
- 	struct device *dev = &pdev->dev;
- 	struct device_node *np = pdev->dev.of_node;
- 	int num, ret;
-@@ -267,13 +267,13 @@ static int asoc_simple_card_probe(struct
- 
- 	num = of_get_child_count(np);
- 
--	props = devm_kzalloc(dev, sizeof(*props) * num, GFP_KERNEL);
--	links = devm_kzalloc(dev, sizeof(*links) * num, GFP_KERNEL);
--	if (!props || !links)
-+	dai_props = devm_kzalloc(dev, sizeof(*dai_props) * num, GFP_KERNEL);
-+	dai_link  = devm_kzalloc(dev, sizeof(*dai_link)  * num, GFP_KERNEL);
-+	if (!dai_props || !dai_link)
- 		return -ENOMEM;
- 
--	priv->dai_props				= props;
--	priv->dai_link				= links;
-+	priv->dai_props				= dai_props;
-+	priv->dai_link				= dai_link;
- 
- 	/* Init snd_soc_card */
- 	priv->snd_card.owner			= THIS_MODULE;
diff --git a/patches.renesas/0108-dmaengine-rcar-dmac-Widen-DMA-mask-to-40-bits.patch b/patches.renesas/0108-dmaengine-rcar-dmac-Widen-DMA-mask-to-40-bits.patch
deleted file mode 100644
index 3c53c0dda7dd27..00000000000000
--- a/patches.renesas/0108-dmaengine-rcar-dmac-Widen-DMA-mask-to-40-bits.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From e5ec9c4d40d011885447f89d80214b2c72ae854d Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 13 Feb 2017 12:00:26 +0100
-Subject: [PATCH 108/255] dmaengine: rcar-dmac: Widen DMA mask to 40 bits
-
-By default, the DMA mask covers only the low 32-bit address space, which
-causes SWIOTLB on arm64 to fall back to a bounce buffer for DMA
-transfers involving memory outside the 32-bit address space.
-
-The R-Car DMA controller hardware supports a 40-bit address space, hence
-widen the DMA mask to 40 bits to actually make use of this feature.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit dc312349e87526dfe6387c1a82fafded706f0572)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/dma/sh/rcar-dmac.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/dma/sh/rcar-dmac.c
-+++ b/drivers/dma/sh/rcar-dmac.c
-@@ -1733,6 +1733,7 @@ static int rcar_dmac_probe(struct platfo
- 
- 	dmac->dev = &pdev->dev;
- 	platform_set_drvdata(pdev, dmac);
-+	dma_set_mask_and_coherent(dmac->dev, DMA_BIT_MASK(40));
- 
- 	ret = rcar_dmac_parse_of(&pdev->dev, dmac);
- 	if (ret < 0)
diff --git a/patches.renesas/0108-soc-renesas-Register-SoC-device-early.patch b/patches.renesas/0108-soc-renesas-Register-SoC-device-early.patch
deleted file mode 100644
index d8820f98a1cde8..00000000000000
--- a/patches.renesas/0108-soc-renesas-Register-SoC-device-early.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 5ff959f7308aec42e22f94ddd60c4015639d8863 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 31 Mar 2017 11:01:54 +0200
-Subject: [PATCH 108/286] soc: renesas: Register SoC device early
-
-The r8a7795 SYSC driver manages PM Domains, and thus is initialized from
-an early_initcall().  However, this means the driver cannot check the
-SoC revision, as the SoC device hasn't been registered yet.
-
-Change renesas_soc_init() from a core_initcall() to an early_initcall()
-to fix this (renesas-soc.o is listed before rcar-sysc.o in the Makefile).
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b1d134ba9de2b7a136406530e34fc8b110ba6efd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/soc/renesas/renesas-soc.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/soc/renesas/renesas-soc.c
-+++ b/drivers/soc/renesas/renesas-soc.c
-@@ -270,4 +270,4 @@ static int __init renesas_soc_init(void)
- 
- 	return 0;
- }
--core_initcall(renesas_soc_init);
-+early_initcall(renesas_soc_init);
diff --git a/patches.renesas/0109-ata-sata_rcar-Handle-return-value-of-clk_prepare_ena.patch b/patches.renesas/0109-ata-sata_rcar-Handle-return-value-of-clk_prepare_ena.patch
deleted file mode 100644
index 340010d9dbce5a..00000000000000
--- a/patches.renesas/0109-ata-sata_rcar-Handle-return-value-of-clk_prepare_ena.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 37ca7df9881ca9ef9440fede4b128272fb4dbbcc Mon Sep 17 00:00:00 2001
-From: Arvind Yadav <arvind.yadav.cs@gmail.com>
-Date: Tue, 9 May 2017 16:00:28 +0530
-Subject: [PATCH 109/286] ata: sata_rcar: Handle return value of
- clk_prepare_enable
-
-Here, Clock enable can failed. So adding an error check for
-clk_prepare_enable.
-
-tj: minor style updates
-
-Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
-Signed-off-by: Tejun Heo <tj@kernel.org>
-(cherry picked from commit 5dc63fdcc09f47fb226b8bc7d83a61feb787d817)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/ata/sata_rcar.c |   15 ++++++++++++---
- 1 file changed, 12 insertions(+), 3 deletions(-)
-
---- a/drivers/ata/sata_rcar.c
-+++ b/drivers/ata/sata_rcar.c
-@@ -890,7 +890,10 @@ static int sata_rcar_probe(struct platfo
- 		dev_err(&pdev->dev, "failed to get access to sata clock\n");
- 		return PTR_ERR(priv->clk);
- 	}
--	clk_prepare_enable(priv->clk);
-+
-+	ret = clk_prepare_enable(priv->clk);
-+	if (ret)
-+		return ret;
- 
- 	host = ata_host_alloc(&pdev->dev, 1);
- 	if (!host) {
-@@ -970,8 +973,11 @@ static int sata_rcar_resume(struct devic
- 	struct ata_host *host = dev_get_drvdata(dev);
- 	struct sata_rcar_priv *priv = host->private_data;
- 	void __iomem *base = priv->base;
-+	int ret;
- 
--	clk_prepare_enable(priv->clk);
-+	ret = clk_prepare_enable(priv->clk);
-+	if (ret)
-+		return ret;
- 
- 	/* ack and mask */
- 	iowrite32(0, base + SATAINTSTAT_REG);
-@@ -988,8 +994,11 @@ static int sata_rcar_restore(struct devi
- {
- 	struct ata_host *host = dev_get_drvdata(dev);
- 	struct sata_rcar_priv *priv = host->private_data;
-+	int ret;
- 
--	clk_prepare_enable(priv->clk);
-+	ret = clk_prepare_enable(priv->clk);
-+	if (ret)
-+		return ret;
- 
- 	sata_rcar_setup_port(host);
- 
diff --git a/patches.renesas/0109-media-v4l-vsp1-Adapt-vsp1_du_setup_lif-interface-to-.patch b/patches.renesas/0109-media-v4l-vsp1-Adapt-vsp1_du_setup_lif-interface-to-.patch
deleted file mode 100644
index 88b9d94f0dea3b..00000000000000
--- a/patches.renesas/0109-media-v4l-vsp1-Adapt-vsp1_du_setup_lif-interface-to-.patch
+++ /dev/null
@@ -1,165 +0,0 @@
-From dceaa86e92c24794bb5a4043686129d4774d6d60 Mon Sep 17 00:00:00 2001
-From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-Date: Fri, 3 Mar 2017 06:31:48 -0300
-Subject: [PATCH 109/255] [media] v4l: vsp1: Adapt vsp1_du_setup_lif()
- interface to use a structure
-
-The interface to configure the LIF in the VSP1 requires adapting the
-function prototype for any changes. This makes extending the interface
-difficult.
-
-Change the function prototype to pass a structure which can be easily
-extended.
-
-This changes the means of disabling the pipeline, by now passing a NULL
-configuration rather than passing either a 0 width or height.
-
-[Fixed kerneldoc, made vsp1_du_setup_lif() cfg argument const]
-
-Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Dave Airlie <airlied@redhat.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 8c71fff434e5ecf5ff27bd61db1bc9ac4c2b2a1b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_vsp.c  |    8 ++++++--
- drivers/media/platform/vsp1/vsp1_drm.c |   33 ++++++++++++++++-----------------
- include/media/vsp1.h                   |   13 +++++++++++--
- 3 files changed, 33 insertions(+), 21 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
-@@ -32,6 +32,10 @@ void rcar_du_vsp_enable(struct rcar_du_c
- {
- 	const struct drm_display_mode *mode = &crtc->crtc.state->adjusted_mode;
- 	struct rcar_du_device *rcdu = crtc->group->dev;
-+	struct vsp1_du_lif_config cfg = {
-+		.width = mode->hdisplay,
-+		.height = mode->vdisplay,
-+	};
- 	struct rcar_du_plane_state state = {
- 		.state = {
- 			.crtc = &crtc->crtc,
-@@ -66,12 +70,12 @@ void rcar_du_vsp_enable(struct rcar_du_c
- 	 */
- 	crtc->group->need_restart = true;
- 
--	vsp1_du_setup_lif(crtc->vsp->vsp, mode->hdisplay, mode->vdisplay);
-+	vsp1_du_setup_lif(crtc->vsp->vsp, &cfg);
- }
- 
- void rcar_du_vsp_disable(struct rcar_du_crtc *crtc)
- {
--	vsp1_du_setup_lif(crtc->vsp->vsp, 0, 0);
-+	vsp1_du_setup_lif(crtc->vsp->vsp, NULL);
- }
- 
- void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc)
---- a/drivers/media/platform/vsp1/vsp1_drm.c
-+++ b/drivers/media/platform/vsp1/vsp1_drm.c
-@@ -54,12 +54,11 @@ EXPORT_SYMBOL_GPL(vsp1_du_init);
- /**
-  * vsp1_du_setup_lif - Setup the output part of the VSP pipeline
-  * @dev: the VSP device
-- * @width: output frame width in pixels
-- * @height: output frame height in pixels
-+ * @cfg: the LIF configuration
-  *
-- * Configure the output part of VSP DRM pipeline for the given frame @width and
-- * @height. This sets up formats on the BRU source pad, the WPF0 sink and source
-- * pads, and the LIF sink pad.
-+ * Configure the output part of VSP DRM pipeline for the given frame @cfg.width
-+ * and @cfg.height. This sets up formats on the BRU source pad, the WPF0 sink
-+ * and source pads, and the LIF sink pad.
-  *
-  * As the media bus code on the BRU source pad is conditioned by the
-  * configuration of the BRU sink 0 pad, we also set up the formats on all BRU
-@@ -69,8 +68,7 @@ EXPORT_SYMBOL_GPL(vsp1_du_init);
-  *
-  * Return 0 on success or a negative error code on failure.
-  */
--int vsp1_du_setup_lif(struct device *dev, unsigned int width,
--		      unsigned int height)
-+int vsp1_du_setup_lif(struct device *dev, const struct vsp1_du_lif_config *cfg)
- {
- 	struct vsp1_device *vsp1 = dev_get_drvdata(dev);
- 	struct vsp1_pipeline *pipe = &vsp1->drm->pipe;
-@@ -79,11 +77,8 @@ int vsp1_du_setup_lif(struct device *dev
- 	unsigned int i;
- 	int ret;
- 
--	dev_dbg(vsp1->dev, "%s: configuring LIF with format %ux%u\n",
--		__func__, width, height);
--
--	if (width == 0 || height == 0) {
--		/* Zero width or height means the CRTC is being disabled, stop
-+	if (!cfg) {
-+		/* NULL configuration means the CRTC is being disabled, stop
- 		 * the pipeline and turn the light off.
- 		 */
- 		ret = vsp1_pipeline_stop(pipe);
-@@ -108,6 +103,9 @@ int vsp1_du_setup_lif(struct device *dev
- 		return 0;
- 	}
- 
-+	dev_dbg(vsp1->dev, "%s: configuring LIF with format %ux%u\n",
-+		__func__, cfg->width, cfg->height);
-+
- 	/* Configure the format at the BRU sinks and propagate it through the
- 	 * pipeline.
- 	 */
-@@ -117,8 +115,8 @@ int vsp1_du_setup_lif(struct device *dev
- 	for (i = 0; i < bru->entity.source_pad; ++i) {
- 		format.pad = i;
- 
--		format.format.width = width;
--		format.format.height = height;
-+		format.format.width = cfg->width;
-+		format.format.height = cfg->height;
- 		format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32;
- 		format.format.field = V4L2_FIELD_NONE;
- 
-@@ -133,8 +131,8 @@ int vsp1_du_setup_lif(struct device *dev
- 	}
- 
- 	format.pad = bru->entity.source_pad;
--	format.format.width = width;
--	format.format.height = height;
-+	format.format.width = cfg->width;
-+	format.format.height = cfg->height;
- 	format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32;
- 	format.format.field = V4L2_FIELD_NONE;
- 
-@@ -180,7 +178,8 @@ int vsp1_du_setup_lif(struct device *dev
- 	/* Verify that the format at the output of the pipeline matches the
- 	 * requested frame size and media bus code.
- 	 */
--	if (format.format.width != width || format.format.height != height ||
-+	if (format.format.width != cfg->width ||
-+	    format.format.height != cfg->height ||
- 	    format.format.code != MEDIA_BUS_FMT_ARGB8888_1X32) {
- 		dev_dbg(vsp1->dev, "%s: format mismatch\n", __func__);
- 		return -EPIPE;
---- a/include/media/vsp1.h
-+++ b/include/media/vsp1.h
-@@ -20,8 +20,17 @@ struct device;
- 
- int vsp1_du_init(struct device *dev);
- 
--int vsp1_du_setup_lif(struct device *dev, unsigned int width,
--		      unsigned int height);
-+/**
-+ * struct vsp1_du_lif_config - VSP LIF configuration
-+ * @width: output frame width
-+ * @height: output frame height
-+ */
-+struct vsp1_du_lif_config {
-+	unsigned int width;
-+	unsigned int height;
-+};
-+
-+int vsp1_du_setup_lif(struct device *dev, const struct vsp1_du_lif_config *cfg);
- 
- struct vsp1_du_atomic_config {
- 	u32 pixelformat;
diff --git a/patches.renesas/0109-usb-renesas_usbhs-cleanup-with-list_first_entry_or_n.patch b/patches.renesas/0109-usb-renesas_usbhs-cleanup-with-list_first_entry_or_n.patch
deleted file mode 100644
index 8184a3fbf1f3c1..00000000000000
--- a/patches.renesas/0109-usb-renesas_usbhs-cleanup-with-list_first_entry_or_n.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 0234d40a1a0e45a5bb1ea38f8da6601517f2cb1d Mon Sep 17 00:00:00 2001
-From: Masahiro Yamada <yamada.masahiro@socionext.com>
-Date: Mon, 19 Sep 2016 01:03:15 +0900
-Subject: [PATCH 109/299] usb: renesas_usbhs: cleanup with
- list_first_entry_or_null()
-
-The combo of list_empty() check and return list_first_entry()
-can be replaced with list_first_entry_or_null().
-
-Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-(cherry picked from commit 31faf878bd8c7e2c078a3b75f65efe64f23b0f18)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/renesas_usbhs/fifo.c |    5 +----
- 1 file changed, 1 insertion(+), 4 deletions(-)
-
---- a/drivers/usb/renesas_usbhs/fifo.c
-+++ b/drivers/usb/renesas_usbhs/fifo.c
-@@ -100,10 +100,7 @@ static void __usbhsf_pkt_del(struct usbh
- 
- static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
- {
--	if (list_empty(&pipe->list))
--		return NULL;
--
--	return list_first_entry(&pipe->list, struct usbhs_pkt, node);
-+	return list_first_entry_or_null(&pipe->list, struct usbhs_pkt, node);
- }
- 
- static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
diff --git a/patches.renesas/0110-clocksource-sh_cmt-Compute-rate-before-registration-.patch b/patches.renesas/0110-clocksource-sh_cmt-Compute-rate-before-registration-.patch
deleted file mode 100644
index 61e69e2f2d0703..00000000000000
--- a/patches.renesas/0110-clocksource-sh_cmt-Compute-rate-before-registration-.patch
+++ /dev/null
@@ -1,183 +0,0 @@
-From ab67f3126a94453061629edcb5ccb8bcc53ac499 Mon Sep 17 00:00:00 2001
-From: Nicolai Stange <nicstange@gmail.com>
-Date: Mon, 6 Feb 2017 22:11:59 +0100
-Subject: [PATCH 110/286] clocksource: sh_cmt: Compute rate before registration
- again
-
-With the upcoming NTP correction related rate adjustments to be implemented
-in the clockevents core, the latter needs to get informed about every rate
-change of a clockevent device made after its registration.
-
-Currently, sh_cmt violates this requirement in that it registers its
-clockevent device with a dummy rate and sets its final ->mult and ->shift
-values from its ->set_state_oneshot() and ->set_state_periodic() functions
-respectively.
-
-This patch moves the setting of the clockevent device's ->mult and ->shift
-values to before its registration.
-
-Note that there has been some back and forth regarding this question with
-respect to the clocksource also provided by this driver:
-  commit f4d7c3565c16 ("clocksource: sh_cmt: compute mult and shift before
-                        registration")
-moves the rate determination from the clocksource's ->enable() function to
-before its registration. OTOH, the later
-  commit 3593f5fe40a1 ("clocksource: sh_cmt: __clocksource_updatefreq_hz()
-                        update")
-basically reverts this, saying
-  "Without this patch the old code uses clocksource_register() together
-   with a hack that assumes a never changing clock rate."
-
-However, I checked all current sh_cmt users in arch/sh as well as in
-arch/arm/mach-shmobile carefully and right now, none of them changes any
-rate in any clock tree relevant to sh_cmt after their respective
-time_init(). Since all sh_cmt instances are created after time_init(), none
-of them should ever observe any clock rate changes.
-
-What's more, both, a clocksource as well as a clockevent device, can
-immediately get selected for use at their registration and thus, enabled
-at this point already. So it's probably safer to assume a "never changing
-clock rate" here.
-
-- Move the struct sh_cmt_channel's ->rate member to struct sh_cmt_device:
-  it's a property of the underlying clock which is in turn specific to
-  the sh_cmt_device.
-- Determine the ->rate value in sh_cmt_setup() at device probing rather
-  than at first usage.
-- Set the clockevent device's ->mult and ->shift values right before its
-  registration.
-- Although not strictly necessary for the upcoming clockevent core changes,
-  set the clocksource's rate at its registration for consistency.
-
-Signed-off-by: Nicolai Stange <nicstange@gmail.com>
-Signed-off-by: John Stultz <john.stultz@linaro.org>
-(cherry picked from commit 890f423b266623e1cfb3a97b864f3e5039bdfbb9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clocksource/sh_cmt.c |   45 +++++++++++++++++++++++--------------------
- 1 file changed, 25 insertions(+), 20 deletions(-)
-
---- a/drivers/clocksource/sh_cmt.c
-+++ b/drivers/clocksource/sh_cmt.c
-@@ -103,7 +103,6 @@ struct sh_cmt_channel {
- 	unsigned long match_value;
- 	unsigned long next_match_value;
- 	unsigned long max_match_value;
--	unsigned long rate;
- 	raw_spinlock_t lock;
- 	struct clock_event_device ced;
- 	struct clocksource cs;
-@@ -118,6 +117,7 @@ struct sh_cmt_device {
- 
- 	void __iomem *mapbase;
- 	struct clk *clk;
-+	unsigned long rate;
- 
- 	raw_spinlock_t lock; /* Protect the shared start/stop register */
- 
-@@ -320,7 +320,7 @@ static void sh_cmt_start_stop_ch(struct
- 	raw_spin_unlock_irqrestore(&ch->cmt->lock, flags);
- }
- 
--static int sh_cmt_enable(struct sh_cmt_channel *ch, unsigned long *rate)
-+static int sh_cmt_enable(struct sh_cmt_channel *ch)
- {
- 	int k, ret;
- 
-@@ -340,11 +340,9 @@ static int sh_cmt_enable(struct sh_cmt_c
- 
- 	/* configure channel, periodic mode and maximum timeout */
- 	if (ch->cmt->info->width == 16) {
--		*rate = clk_get_rate(ch->cmt->clk) / 512;
- 		sh_cmt_write_cmcsr(ch, SH_CMT16_CMCSR_CMIE |
- 				   SH_CMT16_CMCSR_CKS512);
- 	} else {
--		*rate = clk_get_rate(ch->cmt->clk) / 8;
- 		sh_cmt_write_cmcsr(ch, SH_CMT32_CMCSR_CMM |
- 				   SH_CMT32_CMCSR_CMTOUT_IE |
- 				   SH_CMT32_CMCSR_CMR_IRQ |
-@@ -572,7 +570,7 @@ static int sh_cmt_start(struct sh_cmt_ch
- 	raw_spin_lock_irqsave(&ch->lock, flags);
- 
- 	if (!(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE)))
--		ret = sh_cmt_enable(ch, &ch->rate);
-+		ret = sh_cmt_enable(ch);
- 
- 	if (ret)
- 		goto out;
-@@ -640,10 +638,9 @@ static int sh_cmt_clocksource_enable(str
- 	ch->total_cycles = 0;
- 
- 	ret = sh_cmt_start(ch, FLAG_CLOCKSOURCE);
--	if (!ret) {
--		__clocksource_update_freq_hz(cs, ch->rate);
-+	if (!ret)
- 		ch->cs_enabled = true;
--	}
-+
- 	return ret;
- }
- 
-@@ -697,8 +694,7 @@ static int sh_cmt_register_clocksource(s
- 	dev_info(&ch->cmt->pdev->dev, "ch%u: used as clock source\n",
- 		 ch->index);
- 
--	/* Register with dummy 1 Hz value, gets updated in ->enable() */
--	clocksource_register_hz(cs, 1);
-+	clocksource_register_hz(cs, ch->cmt->rate);
- 	return 0;
- }
- 
-@@ -709,19 +705,10 @@ static struct sh_cmt_channel *ced_to_sh_
- 
- static void sh_cmt_clock_event_start(struct sh_cmt_channel *ch, int periodic)
- {
--	struct clock_event_device *ced = &ch->ced;
--
- 	sh_cmt_start(ch, FLAG_CLOCKEVENT);
- 
--	/* TODO: calculate good shift from rate and counter bit width */
--
--	ced->shift = 32;
--	ced->mult = div_sc(ch->rate, NSEC_PER_SEC, ced->shift);
--	ced->max_delta_ns = clockevent_delta2ns(ch->max_match_value, ced);
--	ced->min_delta_ns = clockevent_delta2ns(0x1f, ced);
--
- 	if (periodic)
--		sh_cmt_set_next(ch, ((ch->rate + HZ/2) / HZ) - 1);
-+		sh_cmt_set_next(ch, ((ch->cmt->rate + HZ/2) / HZ) - 1);
- 	else
- 		sh_cmt_set_next(ch, ch->max_match_value);
- }
-@@ -824,6 +811,12 @@ static int sh_cmt_register_clockevent(st
- 	ced->suspend = sh_cmt_clock_event_suspend;
- 	ced->resume = sh_cmt_clock_event_resume;
- 
-+	/* TODO: calculate good shift from rate and counter bit width */
-+	ced->shift = 32;
-+	ced->mult = div_sc(ch->cmt->rate, NSEC_PER_SEC, ced->shift);
-+	ced->max_delta_ns = clockevent_delta2ns(ch->max_match_value, ced);
-+	ced->min_delta_ns = clockevent_delta2ns(0x1f, ced);
-+
- 	dev_info(&ch->cmt->pdev->dev, "ch%u: used for clock events\n",
- 		 ch->index);
- 	clockevents_register_device(ced);
-@@ -996,6 +989,18 @@ static int sh_cmt_setup(struct sh_cmt_de
- 	if (ret < 0)
- 		goto err_clk_put;
- 
-+	/* Determine clock rate. */
-+	ret = clk_enable(cmt->clk);
-+	if (ret < 0)
-+		goto err_clk_unprepare;
-+
-+	if (cmt->info->width == 16)
-+		cmt->rate = clk_get_rate(cmt->clk) / 512;
-+	else
-+		cmt->rate = clk_get_rate(cmt->clk) / 8;
-+
-+	clk_disable(cmt->clk);
-+
- 	/* Map the memory resource(s). */
- 	ret = sh_cmt_map_memory(cmt);
- 	if (ret < 0)
diff --git a/patches.renesas/0110-media-v4l-rcar_fdp1-use-4.4s-to-format-a-4-byte-stri.patch b/patches.renesas/0110-media-v4l-rcar_fdp1-use-4.4s-to-format-a-4-byte-stri.patch
deleted file mode 100644
index 290dc6f4fa950f..00000000000000
--- a/patches.renesas/0110-media-v4l-rcar_fdp1-use-4.4s-to-format-a-4-byte-stri.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From d58f0edde79809384658d35ae052517a22486b08 Mon Sep 17 00:00:00 2001
-From: Nicolas Iooss <nicolas.iooss_linux@m4x.org>
-Date: Mon, 26 Dec 2016 11:31:39 -0200
-Subject: [PATCH 110/255] [media] v4l: rcar_fdp1: use %4.4s to format a 4-byte
- string
-
-Using %4s to format f->fmt.pix_mp.pixelformat in fdp1_try_fmt() and
-fdp1_s_fmt() may lead to more characters being printed (when the byte
-following field pixelformat is not zero).
-
-Add ".4" to the format specifier to limit the number of printed
-characters to four. The resulting format specifier "%4.4s" is also used
-by other media drivers to print pixelformat value.
-
-Signed-off-by: Nicolas Iooss <nicolas.iooss_linux@m4x.org>
-Reviewed-by: Kieran Bingham <kieran@bingham.xyz>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 4c171636bc2beca81b25b07fbe4ac2a6ab27f982)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/rcar_fdp1.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/media/platform/rcar_fdp1.c
-+++ b/drivers/media/platform/rcar_fdp1.c
-@@ -1596,7 +1596,7 @@ static int fdp1_try_fmt(struct file *fil
- 	else
- 		fdp1_try_fmt_capture(ctx, NULL, &f->fmt.pix_mp);
- 
--	dprintk(ctx->fdp1, "Try %s format: %4s (0x%08x) %ux%u field %u\n",
-+	dprintk(ctx->fdp1, "Try %s format: %4.4s (0x%08x) %ux%u field %u\n",
- 		V4L2_TYPE_IS_OUTPUT(f->type) ? "output" : "capture",
- 		(char *)&f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.pixelformat,
- 		f->fmt.pix_mp.width, f->fmt.pix_mp.height, f->fmt.pix_mp.field);
-@@ -1671,7 +1671,7 @@ static int fdp1_s_fmt(struct file *file,
- 
- 	fdp1_set_format(ctx, &f->fmt.pix_mp, f->type);
- 
--	dprintk(ctx->fdp1, "Set %s format: %4s (0x%08x) %ux%u field %u\n",
-+	dprintk(ctx->fdp1, "Set %s format: %4.4s (0x%08x) %ux%u field %u\n",
- 		V4L2_TYPE_IS_OUTPUT(f->type) ? "output" : "capture",
- 		(char *)&f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.pixelformat,
- 		f->fmt.pix_mp.width, f->fmt.pix_mp.height, f->fmt.pix_mp.field);
diff --git a/patches.renesas/0110-media-v4l-vsp1-Add-support-for-capture-and-output-in.patch b/patches.renesas/0110-media-v4l-vsp1-Add-support-for-capture-and-output-in.patch
deleted file mode 100644
index 842583ee773697..00000000000000
--- a/patches.renesas/0110-media-v4l-vsp1-Add-support-for-capture-and-output-in.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From b2fdfacf21cd7d444eebbd1def80eec28990f1cb Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 6 Sep 2016 21:04:53 -0300
-Subject: [PATCH 110/299] [media] v4l: vsp1: Add support for capture and output
- in HSV formats
-
-Support both the HSV24 and HSV32 formats. From a hardware point of view
-pretend the formats are RGB, the RPF and WPF will just pass the data
-through without performing any processing.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit bc9b91e6be38b54a7b245969d0a9247791705e6a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_pipe.c  |    8 ++++++++
- drivers/media/platform/vsp1/vsp1_rwpf.c  |    2 ++
- drivers/media/platform/vsp1/vsp1_video.c |    5 +++++
- 3 files changed, 15 insertions(+)
-
---- a/drivers/media/platform/vsp1/vsp1_pipe.c
-+++ b/drivers/media/platform/vsp1/vsp1_pipe.c
-@@ -78,6 +78,14 @@ static const struct vsp1_format_info vsp
- 	  VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
- 	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
- 	  1, { 32, 0, 0 }, false, false, 1, 1, false },
-+	{ V4L2_PIX_FMT_HSV24, MEDIA_BUS_FMT_AHSV8888_1X32,
-+	  VI6_FMT_RGB_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
-+	  1, { 24, 0, 0 }, false, false, 1, 1, false },
-+	{ V4L2_PIX_FMT_HSV32, MEDIA_BUS_FMT_AHSV8888_1X32,
-+	  VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
-+	  1, { 32, 0, 0 }, false, false, 1, 1, false },
- 	{ V4L2_PIX_FMT_UYVY, MEDIA_BUS_FMT_AYUV8_1X32,
- 	  VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
- 	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
---- a/drivers/media/platform/vsp1/vsp1_rwpf.c
-+++ b/drivers/media/platform/vsp1/vsp1_rwpf.c
-@@ -37,6 +37,7 @@ static int vsp1_rwpf_enum_mbus_code(stru
- {
- 	static const unsigned int codes[] = {
- 		MEDIA_BUS_FMT_ARGB8888_1X32,
-+		MEDIA_BUS_FMT_AHSV8888_1X32,
- 		MEDIA_BUS_FMT_AYUV8_1X32,
- 	};
- 
-@@ -78,6 +79,7 @@ static int vsp1_rwpf_set_format(struct v
- 
- 	/* Default to YUV if the requested format is not supported. */
- 	if (fmt->format.code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
-+	    fmt->format.code != MEDIA_BUS_FMT_AHSV8888_1X32 &&
- 	    fmt->format.code != MEDIA_BUS_FMT_AYUV8_1X32)
- 		fmt->format.code = MEDIA_BUS_FMT_AYUV8_1X32;
- 
---- a/drivers/media/platform/vsp1/vsp1_video.c
-+++ b/drivers/media/platform/vsp1/vsp1_video.c
-@@ -124,6 +124,11 @@ static int __vsp1_video_try_format(struc
- 	pix->pixelformat = info->fourcc;
- 	pix->colorspace = V4L2_COLORSPACE_SRGB;
- 	pix->field = V4L2_FIELD_NONE;
-+
-+	if (info->fourcc == V4L2_PIX_FMT_HSV24 ||
-+	    info->fourcc == V4L2_PIX_FMT_HSV32)
-+		pix->hsv_enc = V4L2_HSV_ENC_256;
-+
- 	memset(pix->reserved, 0, sizeof(pix->reserved));
- 
- 	/* Align the width and height for YUV 4:2:2 and 4:2:0 formats. */
diff --git a/patches.renesas/0111-clockevents-drivers-sh_cmt-Set-min_delta_ticks-and-m.patch b/patches.renesas/0111-clockevents-drivers-sh_cmt-Set-min_delta_ticks-and-m.patch
deleted file mode 100644
index 6eee213ac46060..00000000000000
--- a/patches.renesas/0111-clockevents-drivers-sh_cmt-Set-min_delta_ticks-and-m.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 51b1edb2e3af7fc16e3c6d1e91eba33e0e79d4fe Mon Sep 17 00:00:00 2001
-From: Nicolai Stange <nicstange@gmail.com>
-Date: Thu, 30 Mar 2017 22:09:12 +0200
-Subject: [PATCH 111/286] clockevents/drivers/sh_cmt: Set ->min_delta_ticks and
- ->max_delta_ticks
-
-In preparation for making the clockevents core NTP correction aware,
-all clockevent device drivers must set ->min_delta_ticks and
-->max_delta_ticks rather than ->min_delta_ns and ->max_delta_ns: a
-clockevent device's rate is going to change dynamically and thus, the
-ratio of ns to ticks ceases to stay invariant.
-
-Make the sh_cmt clockevent driver initialize these fields properly.
-
-This patch alone doesn't introduce any change in functionality as the
-clockevents core still looks exclusively at the (untouched) ->min_delta_ns
-and ->max_delta_ns. As soon as this has changed, a followup patch will
-purge the initialization of ->min_delta_ns and ->max_delta_ns from this
-driver.
-
-Cc: Ingo Molnar <mingo@redhat.com>
-Cc: Thomas Gleixner <tglx@linutronix.de>
-Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
-Cc: Richard Cochran <richardcochran@gmail.com>
-Cc: Prarit Bhargava <prarit@redhat.com>
-Cc: Stephen Boyd <sboyd@codeaurora.org>
-Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-Signed-off-by: Nicolai Stange <nicstange@gmail.com>
-Signed-off-by: John Stultz <john.stultz@linaro.org>
-(cherry picked from commit bb2e94ac0cf4628f5e5f778c8de4a376dac43558)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clocksource/sh_cmt.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/clocksource/sh_cmt.c
-+++ b/drivers/clocksource/sh_cmt.c
-@@ -815,7 +815,9 @@ static int sh_cmt_register_clockevent(st
- 	ced->shift = 32;
- 	ced->mult = div_sc(ch->cmt->rate, NSEC_PER_SEC, ced->shift);
- 	ced->max_delta_ns = clockevent_delta2ns(ch->max_match_value, ced);
-+	ced->max_delta_ticks = ch->max_match_value;
- 	ced->min_delta_ns = clockevent_delta2ns(0x1f, ced);
-+	ced->min_delta_ticks = 0x1f;
- 
- 	dev_info(&ch->cmt->pdev->dev, "ch%u: used for clock events\n",
- 		 ch->index);
diff --git a/patches.renesas/0111-iio-adc-Add-Renesas-GyroADC-bindings.patch b/patches.renesas/0111-iio-adc-Add-Renesas-GyroADC-bindings.patch
deleted file mode 100644
index 86235a1dcd14b7..00000000000000
--- a/patches.renesas/0111-iio-adc-Add-Renesas-GyroADC-bindings.patch
+++ /dev/null
@@ -1,128 +0,0 @@
-From f6623987f1a47c73cd2ba222dcda7a108f5d9aed Mon Sep 17 00:00:00 2001
-From: Marek Vasut <marek.vasut+renesas@gmail.com>
-Date: Sat, 28 Jan 2017 00:08:36 +0100
-Subject: [PATCH 111/255] iio: adc: Add Renesas GyroADC bindings
-
-Add DT bindings for the Renesas RCar GyroADC block. This block is
-a simple 4/8-channel ADC which samples 12/15/24 bits of data every
-cycle from all channels.
-
-Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
-Cc: Geert Uytterhoeven <geert+renesas@glider.be>
-Cc: Simon Horman <horms+renesas@verge.net.au>
-Cc: Jonathan Cameron <jic23@kernel.org>
-Cc: linux-renesas-soc@vger.kernel.org
-Cc: Wolfram Sang <wsa@the-dreams.de>
-Cc: Rob Herring <robh@kernel.org>
-Acked-by: Rob Herring <robh@kernel.org>
-Cc: devicetree@vger.kernel.org
-Signed-off-by: Jonathan Cameron <jic23@kernel.org>
-(cherry picked from commit ec2ef15335547d6b96dcfb92e2dcebe08e156bc2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/iio/adc/renesas,gyroadc.txt |   99 ++++++++++
- 1 file changed, 99 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/iio/adc/renesas,gyroadc.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/iio/adc/renesas,gyroadc.txt
-@@ -0,0 +1,99 @@
-+* Renesas RCar GyroADC device driver
-+
-+The GyroADC block is a reduced SPI block with up to 8 chipselect lines,
-+which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs
-+are sampled by the GyroADC block in a round-robin fashion and the result
-+presented in the GyroADC registers.
-+
-+Required properties:
-+- compatible:	Should be "<soc-specific>", "renesas,rcar-gyroadc".
-+                The <soc-specific> should be one of:
-+		renesas,r8a7791-gyroadc - for the GyroADC block present
-+					  in r8a7791 SoC
-+		renesas,r8a7792-gyroadc - for the GyroADC with interrupt
-+					  block present in r8a7792 SoC
-+- reg:		Address and length of the register set for the device
-+- clocks:	References to all the clocks specified in the clock-names
-+		property as specified in
-+		Documentation/devicetree/bindings/clock/clock-bindings.txt.
-+- clock-names:	Shall contain "fck" and "if". The "fck" is the GyroADC block
-+		clock, the "if" is the interface clock.
-+- power-domains: Must contain a reference to the PM domain, if available.
-+- #address-cells: Should be <1> (setting for the subnodes) for all ADCs
-+		except for "fujitsu,mb88101a". Should be <0> (setting for
-+		only subnode) for "fujitsu,mb88101a".
-+- #size-cells:	Should be <0> (setting for the subnodes)
-+
-+Sub-nodes:
-+You must define subnode(s) which select the connected ADC type and reference
-+voltage for the GyroADC channels.
-+
-+Required properties for subnodes:
-+- compatible:	Should be either of:
-+		"fujitsu,mb88101a"
-+			- Fujitsu MB88101A compatible mode,
-+			  12bit sampling, up to 4 channels can be sampled in
-+			  round-robin fashion. One Fujitsu chip supplies four
-+			  GyroADC channels with data as it contains four ADCs
-+			  on the chip and thus for 4-channel operation, single
-+			  MB88101A is required. The Cx chipselect lines of the
-+			  MB88101A connect directly to two CHS lines of the
-+			  GyroADC, no demuxer is required. The data out line
-+			  of each MB88101A connects to a shared input pin of
-+			  the GyroADC.
-+		"ti,adcs7476" or "ti,adc121" or "adi,ad7476"
-+			- TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode,
-+			  15bit sampling, up to 8 channels can be sampled in
-+			  round-robin fashion. One TI/ADI chip supplies single
-+			  ADC channel with data, thus for 8-channel operation,
-+			  8 chips are required. A 3:8 chipselect demuxer is
-+			  required to connect the nCS line of the TI/ADI chips
-+			  to the GyroADC, while MISO line of each TI/ADI ADC
-+			  connects to a shared input pin of the GyroADC.
-+		"maxim,max1162" or "maxim,max11100"
-+			- Maxim MAX1162 / Maxim MAX11100 compatible mode,
-+			  16bit sampling, up to 8 channels can be sampled in
-+			  round-robin fashion. One Maxim chip supplies single
-+			  ADC channel with data, thus for 8-channel operation,
-+			  8 chips are required. A 3:8 chipselect demuxer is
-+			  required to connect the nCS line of the MAX chips
-+			  to the GyroADC, while MISO line of each Maxim ADC
-+			  connects to a shared input pin of the GyroADC.
-+- reg:		Should be the number of the analog input. Should be present
-+		for all ADCs except "fujitsu,mb88101a".
-+- vref-supply:	Reference to the channel reference voltage regulator.
-+
-+Example:
-+	vref_max1162: regulator-vref-max1162 {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "MAX1162 Vref";
-+		regulator-min-microvolt = <4096000>;
-+		regulator-max-microvolt = <4096000>;
-+	};
-+
-+	adc@e6e54000 {
-+		compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
-+		reg = <0 0xe6e54000 0 64>;
-+		clocks = <&mstp9_clks R8A7791_CLK_GYROADC>, <&clk_65m>;
-+		clock-names = "fck", "if";
-+		power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
-+
-+		pinctrl-0 = <&adc_pins>;
-+		pinctrl-names = "default";
-+
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		adc@0 {
-+			reg = <0>;
-+			compatible = "maxim,max1162";
-+			vref-supply = <&vref_max1162>;
-+		};
-+
-+		adc@1 {
-+			reg = <1>;
-+			compatible = "maxim,max1162";
-+			vref-supply = <&vref_max1162>;
-+		};
-+	};
diff --git a/patches.renesas/0111-media-v4l-vsp1-Fix-module-autoload-for-OF-registrati.patch b/patches.renesas/0111-media-v4l-vsp1-Fix-module-autoload-for-OF-registrati.patch
deleted file mode 100644
index cba5b47054ff64..00000000000000
--- a/patches.renesas/0111-media-v4l-vsp1-Fix-module-autoload-for-OF-registrati.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 8a5a9120158f7e426c7a0634fc5c46e1c26b32a6 Mon Sep 17 00:00:00 2001
-From: Javier Martinez Canillas <javier@osg.samsung.com>
-Date: Mon, 17 Oct 2016 13:44:08 -0200
-Subject: [PATCH 111/299] [media] v4l: vsp1: Fix module autoload for OF
- registration
-
-If the driver is built as a module, autoload won't work because the module
-alias information is not filled. So user-space can't match the registered
-device with the corresponding module.
-
-Export the module alias information using the MODULE_DEVICE_TABLE() macro.
-
-Before this patch:
-
-$ modinfo drivers/media/platform/vsp1/vsp1.ko | grep alias
-alias:          vsp1
-
-After this patch:
-
-$ modinfo drivers/media/platform/vsp1/vsp1.ko | grep alias
-alias:          vsp1
-alias:          of:N*T*Crenesas,vsp2C*
-alias:          of:N*T*Crenesas,vsp2
-alias:          of:N*T*Crenesas,vsp1C*
-alias:          of:N*T*Crenesas,vsp1
-
-Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 3184c3bf67d1360a303dd02edccab41e37a637bd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_drv.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/media/platform/vsp1/vsp1_drv.c
-+++ b/drivers/media/platform/vsp1/vsp1_drv.c
-@@ -782,6 +782,7 @@ static const struct of_device_id vsp1_of
- 	{ .compatible = "renesas,vsp2" },
- 	{ },
- };
-+MODULE_DEVICE_TABLE(of, vsp1_of_match);
- 
- static struct platform_driver vsp1_platform_driver = {
- 	.probe		= vsp1_probe,
diff --git a/patches.renesas/0112-ASoC-wm8978-Adjust-clock-indices-so-that-simple-card.patch b/patches.renesas/0112-ASoC-wm8978-Adjust-clock-indices-so-that-simple-card.patch
deleted file mode 100644
index 82ec6479c0182f..00000000000000
--- a/patches.renesas/0112-ASoC-wm8978-Adjust-clock-indices-so-that-simple-card.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From c6ba6292f93b9ab95a4f8c4e9b2805019453cb38 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Mon, 7 Nov 2016 14:08:20 +0100
-Subject: [PATCH 112/299] ASoC: wm8978: Adjust clock indices so that simple
- card works
-
-Using simple-card with the wm8978 doesn't work because simple card calls
-set_sysclk on the clock index 0, which is not the MCLK in the WM8978.
-
-Adjust the clock definition so that the clock 0 is the MCLK.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit fbd972d7f4a60677f6fbe558dc23e4029dc2d45d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/codecs/wm8978.h |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/sound/soc/codecs/wm8978.h
-+++ b/sound/soc/codecs/wm8978.h
-@@ -78,8 +78,8 @@ enum wm8978_clk_id {
- };
- 
- enum wm8978_sysclk_src {
-+	WM8978_MCLK = 0,
- 	WM8978_PLL,
--	WM8978_MCLK
- };
- 
- #endif	/* __WM8978_H__ */
diff --git a/patches.renesas/0112-iio-adc-Add-Renesas-GyroADC-driver.patch b/patches.renesas/0112-iio-adc-Add-Renesas-GyroADC-driver.patch
deleted file mode 100644
index 0443039d953711..00000000000000
--- a/patches.renesas/0112-iio-adc-Add-Renesas-GyroADC-driver.patch
+++ /dev/null
@@ -1,707 +0,0 @@
-From 52dc4fbaf3f5b42ab0faa58ca2866523a5bccb6f Mon Sep 17 00:00:00 2001
-From: Marek Vasut <marek.vasut+renesas@gmail.com>
-Date: Sat, 28 Jan 2017 00:08:37 +0100
-Subject: [PATCH 112/255] iio: adc: Add Renesas GyroADC driver
-
-Add IIO driver for the Renesas RCar GyroADC block. This block is a
-simple 4/8-channel ADC which samples 12/15/24 bits of data every
-cycle from all channels.
-
-Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
-Cc: Geert Uytterhoeven <geert+renesas@glider.be>
-Cc: Simon Horman <horms+renesas@verge.net.au>
-Cc: Jonathan Cameron <jic23@kernel.org>
-Cc: linux-renesas-soc@vger.kernel.org
-Cc: Wolfram Sang <wsa@the-dreams.de>
-Signed-off-by: Jonathan Cameron <jic23@kernel.org>
-(cherry picked from commit 059c53b3232960cfd38cc46de0a7bedd642021f5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- MAINTAINERS                    |    6 
- drivers/iio/adc/Kconfig        |   13 
- drivers/iio/adc/Makefile       |    1 
- drivers/iio/adc/rcar-gyroadc.c |  631 +++++++++++++++++++++++++++++++++++++++++
- 4 files changed, 651 insertions(+)
- create mode 100644 drivers/iio/adc/rcar-gyroadc.c
-
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -10225,6 +10225,12 @@ L:	linux-renesas-soc@vger.kernel.org
- F:	drivers/net/ethernet/renesas/
- F:	include/linux/sh_eth.h
- 
-+RENESAS R-CAR GYROADC DRIVER
-+M:	Marek Vasut <marek.vasut@gmail.com>
-+L:	linux-iio@vger.kernel.org
-+S:	Supported
-+F:	drivers/iio/adc/rcar_gyro_adc.c
-+
- RENESAS USB2 PHY DRIVER
- M:	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
- L:	linux-renesas-soc@vger.kernel.org
---- a/drivers/iio/adc/Kconfig
-+++ b/drivers/iio/adc/Kconfig
-@@ -408,6 +408,19 @@ config QCOM_SPMI_VADC
- 	  To compile this driver as a module, choose M here: the module will
- 	  be called qcom-spmi-vadc.
- 
-+config RCAR_GYRO_ADC
-+	tristate "Renesas R-Car GyroADC driver"
-+	depends on ARCH_RCAR_GEN2 || (ARM && COMPILE_TEST)
-+	help
-+	  Say yes here to build support for the GyroADC found in Renesas
-+	  R-Car Gen2 SoCs. This block is a simple SPI offload engine for
-+	  reading data out of attached compatible ADCs in a round-robin
-+	  fashion. Up to 4 or 8 ADC channels are supported by this block,
-+	  depending on which ADCs are attached.
-+
-+	  To compile this driver as a module, choose M here: the
-+	  module will be called rcar-gyroadc.
-+
- config ROCKCHIP_SARADC
- 	tristate "Rockchip SARADC driver"
- 	depends on ARCH_ROCKCHIP || (ARM && COMPILE_TEST)
---- a/drivers/iio/adc/Makefile
-+++ b/drivers/iio/adc/Makefile
-@@ -39,6 +39,7 @@ obj-$(CONFIG_NAU7802) += nau7802.o
- obj-$(CONFIG_PALMAS_GPADC) += palmas_gpadc.o
- obj-$(CONFIG_QCOM_SPMI_IADC) += qcom-spmi-iadc.o
- obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o
-+obj-$(CONFIG_RCAR_GYRO_ADC) += rcar-gyroadc.o
- obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
- obj-$(CONFIG_STX104) += stx104.o
- obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
---- /dev/null
-+++ b/drivers/iio/adc/rcar-gyroadc.c
-@@ -0,0 +1,631 @@
-+/*
-+ * Renesas R-Car GyroADC driver
-+ *
-+ * Copyright 2016 Marek Vasut <marek.vasut@gmail.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/delay.h>
-+#include <linux/kernel.h>
-+#include <linux/slab.h>
-+#include <linux/io.h>
-+#include <linux/clk.h>
-+#include <linux/of.h>
-+#include <linux/of_irq.h>
-+#include <linux/regulator/consumer.h>
-+#include <linux/of_platform.h>
-+#include <linux/err.h>
-+#include <linux/pm_runtime.h>
-+
-+#include <linux/iio/iio.h>
-+#include <linux/iio/sysfs.h>
-+#include <linux/iio/trigger.h>
-+
-+#define DRIVER_NAME				"rcar-gyroadc"
-+
-+/* GyroADC registers. */
-+#define RCAR_GYROADC_MODE_SELECT		0x00
-+#define RCAR_GYROADC_MODE_SELECT_1_MB88101A	0x0
-+#define RCAR_GYROADC_MODE_SELECT_2_ADCS7476	0x1
-+#define RCAR_GYROADC_MODE_SELECT_3_MAX1162	0x3
-+
-+#define RCAR_GYROADC_START_STOP			0x04
-+#define RCAR_GYROADC_START_STOP_START		BIT(0)
-+
-+#define RCAR_GYROADC_CLOCK_LENGTH		0x08
-+#define RCAR_GYROADC_1_25MS_LENGTH		0x0c
-+
-+#define RCAR_GYROADC_REALTIME_DATA(ch)		(0x10 + ((ch) * 4))
-+#define RCAR_GYROADC_100MS_ADDED_DATA(ch)	(0x30 + ((ch) * 4))
-+#define RCAR_GYROADC_10MS_AVG_DATA(ch)		(0x50 + ((ch) * 4))
-+
-+#define RCAR_GYROADC_FIFO_STATUS		0x70
-+#define RCAR_GYROADC_FIFO_STATUS_EMPTY(ch)	BIT(0 + (4 * (ch)))
-+#define RCAR_GYROADC_FIFO_STATUS_FULL(ch)	BIT(1 + (4 * (ch)))
-+#define RCAR_GYROADC_FIFO_STATUS_ERROR(ch)	BIT(2 + (4 * (ch)))
-+
-+#define RCAR_GYROADC_INTR			0x74
-+#define RCAR_GYROADC_INTR_INT			BIT(0)
-+
-+#define RCAR_GYROADC_INTENR			0x78
-+#define RCAR_GYROADC_INTENR_INTEN		BIT(0)
-+
-+#define RCAR_GYROADC_SAMPLE_RATE		800	/* Hz */
-+
-+#define RCAR_GYROADC_RUNTIME_PM_DELAY_MS	2000
-+
-+enum rcar_gyroadc_model {
-+	RCAR_GYROADC_MODEL_DEFAULT,
-+	RCAR_GYROADC_MODEL_R8A7792,
-+};
-+
-+struct rcar_gyroadc {
-+	struct device			*dev;
-+	void __iomem			*regs;
-+	struct clk			*iclk;
-+	struct regulator		*vref[8];
-+	unsigned int			num_channels;
-+	enum rcar_gyroadc_model		model;
-+	unsigned int			mode;
-+	unsigned int			sample_width;
-+};
-+
-+static void rcar_gyroadc_hw_init(struct rcar_gyroadc *priv)
-+{
-+	const unsigned long clk_mhz = clk_get_rate(priv->iclk) / 1000000;
-+	const unsigned long clk_mul =
-+		(priv->mode == RCAR_GYROADC_MODE_SELECT_1_MB88101A) ? 10 : 5;
-+	unsigned long clk_len = clk_mhz * clk_mul;
-+
-+	/*
-+	 * According to the R-Car Gen2 datasheet Rev. 1.01, Sept 08 2014,
-+	 * page 77-7, clock length must be even number. If it's odd number,
-+	 * add one.
-+	 */
-+	if (clk_len & 1)
-+		clk_len++;
-+
-+	/* Stop the GyroADC. */
-+	writel(0, priv->regs + RCAR_GYROADC_START_STOP);
-+
-+	/* Disable IRQ on V2H. */
-+	if (priv->model == RCAR_GYROADC_MODEL_R8A7792)
-+		writel(0, priv->regs + RCAR_GYROADC_INTENR);
-+
-+	/* Set mode and timing. */
-+	writel(priv->mode, priv->regs + RCAR_GYROADC_MODE_SELECT);
-+	writel(clk_len, priv->regs + RCAR_GYROADC_CLOCK_LENGTH);
-+	writel(clk_mhz * 1250, priv->regs + RCAR_GYROADC_1_25MS_LENGTH);
-+}
-+
-+static void rcar_gyroadc_hw_start(struct rcar_gyroadc *priv)
-+{
-+	/* Start sampling. */
-+	writel(RCAR_GYROADC_START_STOP_START,
-+	       priv->regs + RCAR_GYROADC_START_STOP);
-+
-+	/*
-+	 * Wait for the first conversion to complete. This is longer than
-+	 * the 1.25 mS in the datasheet because 1.25 mS is not enough for
-+	 * the hardware to deliver the first sample and the hardware does
-+	 * then return zeroes instead of valid data.
-+	 */
-+	mdelay(3);
-+}
-+
-+static void rcar_gyroadc_hw_stop(struct rcar_gyroadc *priv)
-+{
-+	/* Stop the GyroADC. */
-+	writel(0, priv->regs + RCAR_GYROADC_START_STOP);
-+}
-+
-+#define RCAR_GYROADC_CHAN(_idx) {				\
-+	.type			= IIO_VOLTAGE,			\
-+	.indexed		= 1,				\
-+	.channel		= (_idx),			\
-+	.info_mask_separate	= BIT(IIO_CHAN_INFO_RAW) |	\
-+				  BIT(IIO_CHAN_INFO_SCALE),	\
-+	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
-+}
-+
-+static const struct iio_chan_spec rcar_gyroadc_iio_channels_1[] = {
-+	RCAR_GYROADC_CHAN(0),
-+	RCAR_GYROADC_CHAN(1),
-+	RCAR_GYROADC_CHAN(2),
-+	RCAR_GYROADC_CHAN(3),
-+};
-+
-+static const struct iio_chan_spec rcar_gyroadc_iio_channels_2[] = {
-+	RCAR_GYROADC_CHAN(0),
-+	RCAR_GYROADC_CHAN(1),
-+	RCAR_GYROADC_CHAN(2),
-+	RCAR_GYROADC_CHAN(3),
-+	RCAR_GYROADC_CHAN(4),
-+	RCAR_GYROADC_CHAN(5),
-+	RCAR_GYROADC_CHAN(6),
-+	RCAR_GYROADC_CHAN(7),
-+};
-+
-+static const struct iio_chan_spec rcar_gyroadc_iio_channels_3[] = {
-+	RCAR_GYROADC_CHAN(0),
-+	RCAR_GYROADC_CHAN(1),
-+	RCAR_GYROADC_CHAN(2),
-+	RCAR_GYROADC_CHAN(3),
-+	RCAR_GYROADC_CHAN(4),
-+	RCAR_GYROADC_CHAN(5),
-+	RCAR_GYROADC_CHAN(6),
-+	RCAR_GYROADC_CHAN(7),
-+};
-+
-+static int rcar_gyroadc_set_power(struct rcar_gyroadc *priv, bool on)
-+{
-+	struct device *dev = priv->dev;
-+	int ret;
-+
-+	if (on) {
-+		ret = pm_runtime_get_sync(dev);
-+		if (ret < 0)
-+			pm_runtime_put_noidle(dev);
-+	} else {
-+		pm_runtime_mark_last_busy(dev);
-+		ret = pm_runtime_put_autosuspend(dev);
-+	}
-+
-+	return ret;
-+}
-+
-+static int rcar_gyroadc_read_raw(struct iio_dev *indio_dev,
-+				 struct iio_chan_spec const *chan,
-+				 int *val, int *val2, long mask)
-+{
-+	struct rcar_gyroadc *priv = iio_priv(indio_dev);
-+	struct regulator *consumer;
-+	unsigned int datareg = RCAR_GYROADC_REALTIME_DATA(chan->channel);
-+	unsigned int vref;
-+	int ret;
-+
-+	/*
-+	 * MB88101 is special in that it has only single regulator for
-+	 * all four channels.
-+	 */
-+	if (priv->mode == RCAR_GYROADC_MODE_SELECT_1_MB88101A)
-+		consumer = priv->vref[0];
-+	else
-+		consumer = priv->vref[chan->channel];
-+
-+	switch (mask) {
-+	case IIO_CHAN_INFO_RAW:
-+		if (chan->type != IIO_VOLTAGE)
-+			return -EINVAL;
-+
-+		/* Channel not connected. */
-+		if (!consumer)
-+			return -EINVAL;
-+
-+		ret = iio_device_claim_direct_mode(indio_dev);
-+		if (ret)
-+			return ret;
-+
-+		ret = rcar_gyroadc_set_power(priv, true);
-+		if (ret < 0) {
-+			iio_device_release_direct_mode(indio_dev);
-+			return ret;
-+		}
-+
-+		*val = readl(priv->regs + datareg);
-+		*val &= BIT(priv->sample_width) - 1;
-+
-+		ret = rcar_gyroadc_set_power(priv, false);
-+		iio_device_release_direct_mode(indio_dev);
-+		if (ret < 0)
-+			return ret;
-+
-+		return IIO_VAL_INT;
-+	case IIO_CHAN_INFO_SCALE:
-+		/* Channel not connected. */
-+		if (!consumer)
-+			return -EINVAL;
-+
-+		vref = regulator_get_voltage(consumer);
-+		*val = vref / 1000;
-+		*val2 = 1 << priv->sample_width;
-+
-+		return IIO_VAL_FRACTIONAL;
-+	case IIO_CHAN_INFO_SAMP_FREQ:
-+		*val = RCAR_GYROADC_SAMPLE_RATE;
-+
-+		return IIO_VAL_INT;
-+	default:
-+		return -EINVAL;
-+	}
-+}
-+
-+static int rcar_gyroadc_reg_access(struct iio_dev *indio_dev,
-+				   unsigned int reg, unsigned int writeval,
-+				   unsigned int *readval)
-+{
-+	struct rcar_gyroadc *priv = iio_priv(indio_dev);
-+	unsigned int maxreg = RCAR_GYROADC_FIFO_STATUS;
-+
-+	if (readval == NULL)
-+		return -EINVAL;
-+
-+	if (reg % 4)
-+		return -EINVAL;
-+
-+	/* Handle the V2H case with extra interrupt block. */
-+	if (priv->model == RCAR_GYROADC_MODEL_R8A7792)
-+		maxreg = RCAR_GYROADC_INTENR;
-+
-+	if (reg > maxreg)
-+		return -EINVAL;
-+
-+	*readval = readl(priv->regs + reg);
-+
-+	return 0;
-+}
-+
-+static const struct iio_info rcar_gyroadc_iio_info = {
-+	.driver_module		= THIS_MODULE,
-+	.read_raw		= rcar_gyroadc_read_raw,
-+	.debugfs_reg_access	= rcar_gyroadc_reg_access,
-+};
-+
-+static const struct of_device_id rcar_gyroadc_match[] = {
-+	{
-+		/* R-Car compatible GyroADC */
-+		.compatible	= "renesas,rcar-gyroadc",
-+		.data		= (void *)RCAR_GYROADC_MODEL_DEFAULT,
-+	}, {
-+		/* R-Car V2H specialty with interrupt registers. */
-+		.compatible	= "renesas,r8a7792-gyroadc",
-+		.data		= (void *)RCAR_GYROADC_MODEL_R8A7792,
-+	}, {
-+		/* sentinel */
-+	}
-+};
-+
-+MODULE_DEVICE_TABLE(of, rcar_gyroadc_match);
-+
-+static const struct of_device_id rcar_gyroadc_child_match[] = {
-+	/* Mode 1 ADCs */
-+	{
-+		.compatible	= "fujitsu,mb88101a",
-+		.data		= (void *)RCAR_GYROADC_MODE_SELECT_1_MB88101A,
-+	},
-+	/* Mode 2 ADCs */
-+	{
-+		.compatible	= "ti,adcs7476",
-+		.data		= (void *)RCAR_GYROADC_MODE_SELECT_2_ADCS7476,
-+	}, {
-+		.compatible	= "ti,adc121",
-+		.data		= (void *)RCAR_GYROADC_MODE_SELECT_2_ADCS7476,
-+	}, {
-+		.compatible	= "adi,ad7476",
-+		.data		= (void *)RCAR_GYROADC_MODE_SELECT_2_ADCS7476,
-+	},
-+	/* Mode 3 ADCs */
-+	{
-+		.compatible	= "maxim,max1162",
-+		.data		= (void *)RCAR_GYROADC_MODE_SELECT_3_MAX1162,
-+	}, {
-+		.compatible	= "maxim,max11100",
-+		.data		= (void *)RCAR_GYROADC_MODE_SELECT_3_MAX1162,
-+	},
-+	{ /* sentinel */ }
-+};
-+
-+static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev)
-+{
-+	const struct of_device_id *of_id;
-+	const struct iio_chan_spec *channels;
-+	struct rcar_gyroadc *priv = iio_priv(indio_dev);
-+	struct device *dev = priv->dev;
-+	struct device_node *np = dev->of_node;
-+	struct device_node *child;
-+	struct regulator *vref;
-+	unsigned int reg;
-+	unsigned int adcmode, childmode;
-+	unsigned int sample_width;
-+	unsigned int num_channels;
-+	int ret, first = 1;
-+
-+	for_each_child_of_node(np, child) {
-+		of_id = of_match_node(rcar_gyroadc_child_match, child);
-+		if (!of_id) {
-+			dev_err(dev, "Ignoring unsupported ADC \"%s\".",
-+				child->name);
-+			continue;
-+		}
-+
-+		childmode = (unsigned int)of_id->data;
-+		switch (childmode) {
-+		case RCAR_GYROADC_MODE_SELECT_1_MB88101A:
-+			sample_width = 12;
-+			channels = rcar_gyroadc_iio_channels_1;
-+			num_channels = ARRAY_SIZE(rcar_gyroadc_iio_channels_1);
-+			break;
-+		case RCAR_GYROADC_MODE_SELECT_2_ADCS7476:
-+			sample_width = 15;
-+			channels = rcar_gyroadc_iio_channels_2;
-+			num_channels = ARRAY_SIZE(rcar_gyroadc_iio_channels_2);
-+			break;
-+		case RCAR_GYROADC_MODE_SELECT_3_MAX1162:
-+			sample_width = 16;
-+			channels = rcar_gyroadc_iio_channels_3;
-+			num_channels = ARRAY_SIZE(rcar_gyroadc_iio_channels_3);
-+			break;
-+		}
-+
-+		/*
-+		 * MB88101 is special in that it's only a single chip taking
-+		 * up all the CHS lines. Thus, the DT binding is also special
-+		 * and has no reg property. If we run into such ADC, handle
-+		 * it here.
-+		 */
-+		if (childmode == RCAR_GYROADC_MODE_SELECT_1_MB88101A) {
-+			reg = 0;
-+		} else {
-+			ret = of_property_read_u32(child, "reg", &reg);
-+			if (ret) {
-+				dev_err(dev,
-+					"Failed to get child reg property of ADC \"%s\".\n",
-+					child->name);
-+				return ret;
-+			}
-+
-+			/* Channel number is too high. */
-+			if (reg >= num_channels) {
-+				dev_err(dev,
-+					"Only %i channels supported with %s, but reg = <%i>.\n",
-+					num_channels, child->name, reg);
-+				return ret;
-+			}
-+		}
-+
-+		/* Child node selected different mode than the rest. */
-+		if (!first && (adcmode != childmode)) {
-+			dev_err(dev,
-+				"Channel %i uses different ADC mode than the rest.\n",
-+				reg);
-+			return ret;
-+		}
-+
-+		/* Channel is valid, grab the regulator. */
-+		dev->of_node = child;
-+		vref = devm_regulator_get(dev, "vref");
-+		dev->of_node = np;
-+		if (IS_ERR(vref)) {
-+			dev_dbg(dev, "Channel %i 'vref' supply not connected.\n",
-+				reg);
-+			return PTR_ERR(vref);
-+		}
-+
-+		priv->vref[reg] = vref;
-+
-+		if (!first)
-+			continue;
-+
-+		/* First child node which passed sanity tests. */
-+		adcmode = childmode;
-+		first = 0;
-+
-+		priv->num_channels = num_channels;
-+		priv->mode = childmode;
-+		priv->sample_width = sample_width;
-+
-+		indio_dev->channels = channels;
-+		indio_dev->num_channels = num_channels;
-+
-+		/*
-+		 * MB88101 is special and we only have one such device
-+		 * attached to the GyroADC at a time, so if we found it,
-+		 * we can stop parsing here.
-+		 */
-+		if (childmode == RCAR_GYROADC_MODE_SELECT_1_MB88101A)
-+			break;
-+	}
-+
-+	if (first) {
-+		dev_err(dev, "No valid ADC channels found, aborting.\n");
-+		return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+static void rcar_gyroadc_deinit_supplies(struct iio_dev *indio_dev)
-+{
-+	struct rcar_gyroadc *priv = iio_priv(indio_dev);
-+	unsigned int i;
-+
-+	for (i = 0; i < priv->num_channels; i++) {
-+		if (!priv->vref[i])
-+			continue;
-+
-+		regulator_disable(priv->vref[i]);
-+	}
-+}
-+
-+static int rcar_gyroadc_init_supplies(struct iio_dev *indio_dev)
-+{
-+	struct rcar_gyroadc *priv = iio_priv(indio_dev);
-+	struct device *dev = priv->dev;
-+	unsigned int i;
-+	int ret;
-+
-+	for (i = 0; i < priv->num_channels; i++) {
-+		if (!priv->vref[i])
-+			continue;
-+
-+		ret = regulator_enable(priv->vref[i]);
-+		if (ret) {
-+			dev_err(dev, "Failed to enable regulator %i (ret=%i)\n",
-+				i, ret);
-+			goto err;
-+		}
-+	}
-+
-+	return 0;
-+
-+err:
-+	rcar_gyroadc_deinit_supplies(indio_dev);
-+	return ret;
-+}
-+
-+static int rcar_gyroadc_probe(struct platform_device *pdev)
-+{
-+	const struct of_device_id *of_id =
-+		of_match_device(rcar_gyroadc_match, &pdev->dev);
-+	struct device *dev = &pdev->dev;
-+	struct rcar_gyroadc *priv;
-+	struct iio_dev *indio_dev;
-+	struct resource *mem;
-+	int ret;
-+
-+	indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
-+	if (!indio_dev) {
-+		dev_err(dev, "Failed to allocate IIO device.\n");
-+		return -ENOMEM;
-+	}
-+
-+	priv = iio_priv(indio_dev);
-+	priv->dev = dev;
-+
-+	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	priv->regs = devm_ioremap_resource(dev, mem);
-+	if (IS_ERR(priv->regs))
-+		return PTR_ERR(priv->regs);
-+
-+	priv->iclk = devm_clk_get(dev, "if");
-+	if (IS_ERR(priv->iclk)) {
-+		ret = PTR_ERR(priv->iclk);
-+		if (ret != -EPROBE_DEFER)
-+			dev_err(dev, "Failed to get IF clock (ret=%i)\n", ret);
-+		return ret;
-+	}
-+
-+	ret = rcar_gyroadc_parse_subdevs(indio_dev);
-+	if (ret)
-+		return ret;
-+
-+	ret = rcar_gyroadc_init_supplies(indio_dev);
-+	if (ret)
-+		return ret;
-+
-+	priv->model = (enum rcar_gyroadc_model)of_id->data;
-+
-+	platform_set_drvdata(pdev, indio_dev);
-+
-+	indio_dev->name = DRIVER_NAME;
-+	indio_dev->dev.parent = dev;
-+	indio_dev->dev.of_node = pdev->dev.of_node;
-+	indio_dev->info = &rcar_gyroadc_iio_info;
-+	indio_dev->modes = INDIO_DIRECT_MODE;
-+
-+	ret = clk_prepare_enable(priv->iclk);
-+	if (ret) {
-+		dev_err(dev, "Could not prepare or enable the IF clock.\n");
-+		goto err_clk_if_enable;
-+	}
-+
-+	pm_runtime_set_autosuspend_delay(dev, RCAR_GYROADC_RUNTIME_PM_DELAY_MS);
-+	pm_runtime_use_autosuspend(dev);
-+	pm_runtime_enable(dev);
-+
-+	pm_runtime_get_sync(dev);
-+	rcar_gyroadc_hw_init(priv);
-+	rcar_gyroadc_hw_start(priv);
-+
-+	ret = iio_device_register(indio_dev);
-+	if (ret) {
-+		dev_err(dev, "Couldn't register IIO device.\n");
-+		goto err_iio_device_register;
-+	}
-+
-+	pm_runtime_put_sync(dev);
-+
-+	return 0;
-+
-+err_iio_device_register:
-+	rcar_gyroadc_hw_stop(priv);
-+	pm_runtime_put_sync(dev);
-+	pm_runtime_disable(dev);
-+	pm_runtime_set_suspended(dev);
-+	clk_disable_unprepare(priv->iclk);
-+err_clk_if_enable:
-+	rcar_gyroadc_deinit_supplies(indio_dev);
-+
-+	return ret;
-+}
-+
-+static int rcar_gyroadc_remove(struct platform_device *pdev)
-+{
-+	struct iio_dev *indio_dev = platform_get_drvdata(pdev);
-+	struct rcar_gyroadc *priv = iio_priv(indio_dev);
-+	struct device *dev = priv->dev;
-+
-+	iio_device_unregister(indio_dev);
-+	pm_runtime_get_sync(dev);
-+	rcar_gyroadc_hw_stop(priv);
-+	pm_runtime_put_sync(dev);
-+	pm_runtime_disable(dev);
-+	pm_runtime_set_suspended(dev);
-+	clk_disable_unprepare(priv->iclk);
-+	rcar_gyroadc_deinit_supplies(indio_dev);
-+
-+	return 0;
-+}
-+
-+#if defined(CONFIG_PM)
-+static int rcar_gyroadc_suspend(struct device *dev)
-+{
-+	struct iio_dev *indio_dev = dev_get_drvdata(dev);
-+	struct rcar_gyroadc *priv = iio_priv(indio_dev);
-+
-+	rcar_gyroadc_hw_stop(priv);
-+
-+	return 0;
-+}
-+
-+static int rcar_gyroadc_resume(struct device *dev)
-+{
-+	struct iio_dev *indio_dev = dev_get_drvdata(dev);
-+	struct rcar_gyroadc *priv = iio_priv(indio_dev);
-+
-+	rcar_gyroadc_hw_start(priv);
-+
-+	return 0;
-+}
-+#endif
-+
-+static const struct dev_pm_ops rcar_gyroadc_pm_ops = {
-+	SET_RUNTIME_PM_OPS(rcar_gyroadc_suspend, rcar_gyroadc_resume, NULL)
-+};
-+
-+static struct platform_driver rcar_gyroadc_driver = {
-+	.probe          = rcar_gyroadc_probe,
-+	.remove         = rcar_gyroadc_remove,
-+	.driver         = {
-+		.name		= DRIVER_NAME,
-+		.of_match_table	= rcar_gyroadc_match,
-+		.pm		= &rcar_gyroadc_pm_ops,
-+	},
-+};
-+
-+module_platform_driver(rcar_gyroadc_driver);
-+
-+MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>");
-+MODULE_DESCRIPTION("Renesas R-Car GyroADC driver");
-+MODULE_LICENSE("GPL");
diff --git a/patches.renesas/0113-iio-adc-handle-unknow-of_device_id-data.patch b/patches.renesas/0113-iio-adc-handle-unknow-of_device_id-data.patch
deleted file mode 100644
index 49986e3b657e4c..00000000000000
--- a/patches.renesas/0113-iio-adc-handle-unknow-of_device_id-data.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 1d0272792aeca824e55424e5b057602594c65b23 Mon Sep 17 00:00:00 2001
-From: Arnd Bergmann <arnd@arndb.de>
-Date: Fri, 3 Feb 2017 18:01:23 +0100
-Subject: [PATCH 113/255] iio: adc: handle unknow of_device_id data
-
-If we get an unknown 'childmode' value, a number of variables are not
-initialized properly:
-
-drivers/iio/adc/rcar-gyroadc.c: In function 'rcar_gyroadc_probe':
-drivers/iio/adc/rcar-gyroadc.c:390:5: error: 'num_channels' may be used uninitialized in this function [-Werror=maybe-uninitialized]
-drivers/iio/adc/rcar-gyroadc.c:426:22: error: 'sample_width' may be used uninitialized in this function [-Werror=maybe-uninitialized]
-drivers/iio/adc/rcar-gyroadc.c:428:23: error: 'channels' may be used uninitialized in this function [-Werror=maybe-uninitialized]
-
-The driver is currently correct, but handling this properly is more robust
-for possible modifications.
-
-There is also a false-positive warning about adcmode being possibly uninitialized,
-but that cannot happen as we also check the 'first' flag:
-
-drivers/iio/adc/rcar-gyroadc.c:398:26: error: 'adcmode' may be used uninitialized in this function [-Werror=maybe-uninitialized]
-
-This adds an initialization for 'adcmode' and bails out for any unknown childmode.
-
-Fixes: 059c53b32329 ("iio: adc: Add Renesas GyroADC driver")
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-Acked-by: Marek Vasut <marek.vasut@gmail.com>
-Signed-off-by: Jonathan Cameron <jic23@kernel.org>
-(cherry picked from commit 17fa2dcbd6325ab877651bef04fca9dd828a2758)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/iio/adc/rcar-gyroadc.c |    4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
---- a/drivers/iio/adc/rcar-gyroadc.c
-+++ b/drivers/iio/adc/rcar-gyroadc.c
-@@ -336,7 +336,7 @@ static int rcar_gyroadc_parse_subdevs(st
- 	struct device_node *child;
- 	struct regulator *vref;
- 	unsigned int reg;
--	unsigned int adcmode, childmode;
-+	unsigned int adcmode = -1, childmode;
- 	unsigned int sample_width;
- 	unsigned int num_channels;
- 	int ret, first = 1;
-@@ -366,6 +366,8 @@ static int rcar_gyroadc_parse_subdevs(st
- 			channels = rcar_gyroadc_iio_channels_3;
- 			num_channels = ARRAY_SIZE(rcar_gyroadc_iio_channels_3);
- 			break;
-+		default:
-+			return -EINVAL;
- 		}
- 
- 		/*
diff --git a/patches.renesas/0113-sh_eth-Do-not-print-an-error-message-for-probe-defer.patch b/patches.renesas/0113-sh_eth-Do-not-print-an-error-message-for-probe-defer.patch
deleted file mode 100644
index ca3a9999aa26f9..00000000000000
--- a/patches.renesas/0113-sh_eth-Do-not-print-an-error-message-for-probe-defer.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From d83a040b8a8b34e8fa6f7858533a5964e92f4b87 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Thu, 18 May 2017 15:01:35 +0200
-Subject: [PATCH 113/286] sh_eth: Do not print an error message for probe
- deferral
-
-EPROBE_DEFER is not an error, hence printing an error message like
-
-    sh-eth ee700000.ethernet: failed to initialise MDIO
-
-may confuse the user.
-
-To fix this, suppress the error message in case of probe deferral.
-While at it, shorten the message, and add the actual error code.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit b7ce520e9f71ff65d0aa0ad86223f94ae4095fae)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -3214,7 +3214,8 @@ static int sh_eth_drv_probe(struct platf
- 	/* MDIO bus init */
- 	ret = sh_mdio_init(mdp, pd);
- 	if (ret) {
--		dev_err(&pdev->dev, "failed to initialise MDIO\n");
-+		if (ret != -EPROBE_DEFER)
-+			dev_err(&pdev->dev, "MDIO init failed: %d\n", ret);
- 		goto out_release;
- 	}
- 
diff --git a/patches.renesas/0113-usb-host-xhci-rcar-add-a-new-firmware-version-for-r8.patch b/patches.renesas/0113-usb-host-xhci-rcar-add-a-new-firmware-version-for-r8.patch
deleted file mode 100644
index 6311fa01cbb2a7..00000000000000
--- a/patches.renesas/0113-usb-host-xhci-rcar-add-a-new-firmware-version-for-r8.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 4e6d2d9449c95e80ec2638c306dead05595cf1c3 Mon Sep 17 00:00:00 2001
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Date: Fri, 11 Nov 2016 15:13:26 +0200
-Subject: [PATCH 113/299] usb: host: xhci: rcar: add a new firmware version for
- r8a7796
-
-This patch adds a new firmware version "V3" for r8a7796. This patch
-also adds explanation of each version's information.
-
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 125f0c0ca06555f7992ededc538580454c9b6996)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-rcar.c |    3 +++
- drivers/usb/host/xhci-rcar.h |    1 +
- 2 files changed, 4 insertions(+)
-
---- a/drivers/usb/host/xhci-rcar.c
-+++ b/drivers/usb/host/xhci-rcar.c
-@@ -19,6 +19,8 @@
- #include "xhci-rcar.h"
- 
- /*
-+* - The V3 firmware is for r8a7796 (with good performance).
-+* - The V2 firmware can be used on both r8a7795 (es1.x) and r8a7796.
- * - The V2 firmware is possible to use on R-Car Gen2. However, the V2 causes
- *   performance degradation. So, this driver continues to use the V1 if R-Car
- *   Gen2.
-@@ -26,6 +28,7 @@
- */
- MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V1);
- MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V2);
-+MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V3);
- 
- /*** Register Offset ***/
- #define RCAR_USB3_INT_ENA	0x224	/* Interrupt Enable */
---- a/drivers/usb/host/xhci-rcar.h
-+++ b/drivers/usb/host/xhci-rcar.h
-@@ -13,6 +13,7 @@
- 
- #define XHCI_RCAR_FIRMWARE_NAME_V1	"r8a779x_usb3_v1.dlmem"
- #define XHCI_RCAR_FIRMWARE_NAME_V2	"r8a779x_usb3_v2.dlmem"
-+#define XHCI_RCAR_FIRMWARE_NAME_V3	"r8a779x_usb3_v3.dlmem"
- 
- #if IS_ENABLED(CONFIG_USB_XHCI_RCAR)
- void xhci_rcar_start(struct usb_hcd *hcd);
diff --git a/patches.renesas/0114-ASoC-rsnd-fixup-for_each_rsnd_mod_array-s-iterator-i.patch b/patches.renesas/0114-ASoC-rsnd-fixup-for_each_rsnd_mod_array-s-iterator-i.patch
deleted file mode 100644
index 9ac12a47e0fd6b..00000000000000
--- a/patches.renesas/0114-ASoC-rsnd-fixup-for_each_rsnd_mod_array-s-iterator-i.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 0eb77118591ff58856547a14e840f598c163096b Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 20 Jan 2017 04:23:29 +0000
-Subject: [PATCH 114/255] ASoC: rsnd: fixup for_each_rsnd_mod_array{s} iterator
- increment
-
-commit 5f222a292 ("ASoC: rsnd: use for_each_rsnd_mod_xxx() ...")
-modifies rsnd_dai_call() to use for_each_rsnd_mod_arrays().
-
-Current rsnd is incrementing iterator in rsnd_mod_next(),
-but the iterator will indicate +1 position in for_each loop in
-this case. Incremental position should be inside for()
-
-Reported-by: Hoan Nguyen An <na-hoan@jinso.co.jp>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 90ffc1ecc500c04bf43a45d804bb151505c0d6a6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c |    2 --
- sound/soc/sh/rcar/rsnd.h |    4 ++--
- 2 files changed, 2 insertions(+), 4 deletions(-)
-
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -363,8 +363,6 @@ struct rsnd_mod *rsnd_mod_next(int *iter
- 		if (!mod)
- 			continue;
- 
--		(*iterator)++;
--
- 		return mod;
- 	}
- 
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -374,10 +374,10 @@ struct rsnd_mod *rsnd_mod_next(int *iter
- 			       int array_size);
- #define for_each_rsnd_mod(iterator, pos, io)				\
- 	for (iterator = 0;						\
--	     (pos = rsnd_mod_next(&iterator, io, NULL, 0));)
-+	     (pos = rsnd_mod_next(&iterator, io, NULL, 0)); iterator++)
- #define for_each_rsnd_mod_arrays(iterator, pos, io, array, size)	\
- 	for (iterator = 0;						\
--	     (pos = rsnd_mod_next(&iterator, io, array, size));)
-+	     (pos = rsnd_mod_next(&iterator, io, array, size)); iterator++)
- #define for_each_rsnd_mod_array(iterator, pos, io, array)		\
- 	for_each_rsnd_mod_arrays(iterator, pos, io, array, ARRAY_SIZE(array))
- 
diff --git a/patches.renesas/0114-mmc-sh_mmcif-Document-r7s72100-DT-bindings.patch b/patches.renesas/0114-mmc-sh_mmcif-Document-r7s72100-DT-bindings.patch
deleted file mode 100644
index 0e613227ed4b34..00000000000000
--- a/patches.renesas/0114-mmc-sh_mmcif-Document-r7s72100-DT-bindings.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From b38149f99928f4601691501cb88dd0df1aca39ae Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Wed, 22 Mar 2017 10:42:09 -0400
-Subject: [PATCH 114/286] mmc: sh_mmcif: Document r7s72100 DT bindings
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 474e25e15f508889d4f8c672ab54323743ee595b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/mmc/renesas,mmcif.txt |    8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
-+++ b/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
-@@ -8,6 +8,7 @@ Required properties:
- 
- - compatible: should be "renesas,mmcif-<soctype>", "renesas,sh-mmcif" as a
-   fallback. Examples with <soctype> are:
-+	- "renesas,mmcif-r7s72100" for the MMCIF found in r7s72100 SoCs
- 	- "renesas,mmcif-r8a73a4" for the MMCIF found in r8a73a4 SoCs
- 	- "renesas,mmcif-r8a7740" for the MMCIF found in r8a7740 SoCs
- 	- "renesas,mmcif-r8a7778" for the MMCIF found in r8a7778 SoCs
-@@ -17,6 +18,13 @@ Required properties:
- 	- "renesas,mmcif-r8a7794" for the MMCIF found in r8a7794 SoCs
- 	- "renesas,mmcif-sh73a0" for the MMCIF found in sh73a0 SoCs
- 
-+- interrupts: Some SoCs have only 1 shared interrupt, while others have either
-+  2 or 3 individual interrupts (error, int, card detect). Below is the number
-+  of interrupts for each SoC:
-+    1: r8a73a4, r8a7778, r8a7790, r8a7791, r8a7793, r8a7794
-+    2: r8a7740, sh73a0
-+    3: r7s72100
-+
- - clocks: reference to the functional clock
- 
- - dmas: reference to the DMA channels, one per channel name listed in the
diff --git a/patches.renesas/0114-usb-host-xhci-plat-add-support-for-Renesas-r8a7796-S.patch b/patches.renesas/0114-usb-host-xhci-plat-add-support-for-Renesas-r8a7796-S.patch
deleted file mode 100644
index c5c49a2f8ef926..00000000000000
--- a/patches.renesas/0114-usb-host-xhci-plat-add-support-for-Renesas-r8a7796-S.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 23ca96ebebce4b4e3dbe8968a5f20cd25b300e56 Mon Sep 17 00:00:00 2001
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Date: Fri, 11 Nov 2016 15:13:27 +0200
-Subject: [PATCH 114/299] usb: host: xhci: plat: add support for Renesas
- r8a7796 SoC
-
-This patch adds support for Renesas r8a7796 SoC. This SoC is not
-compatible with r8a7795 because using firmware version differs.
-
-Since the "V2" firmware can be used on both r8a7795 (es1.x) and r8a7796,
-the "renesas,rcar-gen3-xhci" keeps to use the "V2" for now.
-
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 3f1dae6b19c9b4ba51ad016e30ec17399819bb6d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/usb/usb-xhci.txt |    1 +
- drivers/usb/host/xhci-plat.c                       |    9 +++++++++
- drivers/usb/host/xhci-rcar.c                       |    1 +
- 3 files changed, 11 insertions(+)
-
---- a/Documentation/devicetree/bindings/usb/usb-xhci.txt
-+++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt
-@@ -11,6 +11,7 @@ Required properties:
-     - "renesas,xhci-r8a7791" for r8a7791 SoC
-     - "renesas,xhci-r8a7793" for r8a7793 SoC
-     - "renesas,xhci-r8a7795" for r8a7795 SoC
-+    - "renesas,xhci-r8a7796" for r8a7796 SoC
-     - "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 compatible device
-     - "renesas,rcar-gen3-xhci" for a generic R-Car Gen3 compatible device
-     - "xhci-platform" (deprecated)
---- a/drivers/usb/host/xhci-plat.c
-+++ b/drivers/usb/host/xhci-plat.c
-@@ -100,6 +100,12 @@ static const struct xhci_plat_priv xhci_
- 	.plat_start = xhci_rcar_start,
- };
- 
-+static const struct xhci_plat_priv xhci_plat_renesas_rcar_r8a7796 = {
-+	.firmware_name = XHCI_RCAR_FIRMWARE_NAME_V3,
-+	.init_quirk = xhci_rcar_init_quirk,
-+	.plat_start = xhci_rcar_start,
-+};
-+
- static const struct of_device_id usb_xhci_of_match[] = {
- 	{
- 		.compatible = "generic-xhci",
-@@ -124,6 +130,9 @@ static const struct of_device_id usb_xhc
- 		.compatible = "renesas,xhci-r8a7795",
- 		.data = &xhci_plat_renesas_rcar_gen3,
- 	}, {
-+		.compatible = "renesas,xhci-r8a7796",
-+		.data = &xhci_plat_renesas_rcar_r8a7796,
-+	}, {
- 		.compatible = "renesas,rcar-gen2-xhci",
- 		.data = &xhci_plat_renesas_rcar_gen2,
- 	}, {
---- a/drivers/usb/host/xhci-rcar.c
-+++ b/drivers/usb/host/xhci-rcar.c
-@@ -95,6 +95,7 @@ static int xhci_rcar_is_gen3(struct devi
- 	struct device_node *node = dev->of_node;
- 
- 	return of_device_is_compatible(node, "renesas,xhci-r8a7795") ||
-+		of_device_is_compatible(node, "renesas,xhci-r8a7796") ||
- 		of_device_is_compatible(node, "renesas,rcar-gen3-xhci");
- }
- 
diff --git a/patches.renesas/0115-ASoC-rsnd-fixup-reset-timing-of-sync-convert_rate.patch b/patches.renesas/0115-ASoC-rsnd-fixup-reset-timing-of-sync-convert_rate.patch
deleted file mode 100644
index c7e747aedfe972..00000000000000
--- a/patches.renesas/0115-ASoC-rsnd-fixup-reset-timing-of-sync-convert_rate.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 621972565ead9343b491066ce4754e12602982a7 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 2 Feb 2017 05:01:05 +0000
-Subject: [PATCH 115/255] ASoC: rsnd: fixup reset timing of sync convert_rate
-
-Sync convert rate settings should be availabled *after* Playing.
-Thus, src->sync should be reset first of init function.
-Otherwise, it will set remaining settings when it start playing.
-This patch fixes it. Thanks to Yokoyama-san
-
-Reported-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit ef30da1c52c633a6eaa017ad0d075aaa809a6154)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/src.c |    6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/sound/soc/sh/rcar/src.c
-+++ b/sound/soc/sh/rcar/src.c
-@@ -390,6 +390,9 @@ static int rsnd_src_init(struct rsnd_mod
- {
- 	struct rsnd_src *src = rsnd_mod_to_src(mod);
- 
-+	/* reset sync convert_rate */
-+	src->sync.val = 0;
-+
- 	rsnd_mod_power_on(mod);
- 
- 	rsnd_src_activation(mod);
-@@ -398,9 +401,6 @@ static int rsnd_src_init(struct rsnd_mod
- 
- 	rsnd_src_status_clear(mod);
- 
--	/* reset sync convert_rate */
--	src->sync.val = 0;
--
- 	return 0;
- }
- 
diff --git a/patches.renesas/0115-media-sh_mobile_ceu_camera-use-module_platform_drive.patch b/patches.renesas/0115-media-sh_mobile_ceu_camera-use-module_platform_drive.patch
deleted file mode 100644
index 96df464ed2dea5..00000000000000
--- a/patches.renesas/0115-media-sh_mobile_ceu_camera-use-module_platform_drive.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From e5604c25c48d06089ad2ccaf1f870317320cf06e Mon Sep 17 00:00:00 2001
-From: Geliang Tang <geliangtang@gmail.com>
-Date: Tue, 15 Nov 2016 10:58:35 -0200
-Subject: [PATCH 115/286] [media] sh_mobile_ceu_camera: use
- module_platform_driver
-
-Use module_platform_driver() helper to simplify the code.
-
-Signed-off-by: Geliang Tang <geliangtang@gmail.com>
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 855749a75609122b57b2d4ebd872944836388a14)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c |   13 +------------
- 1 file changed, 1 insertion(+), 12 deletions(-)
-
---- a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-+++ b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-@@ -1801,18 +1801,7 @@ static struct platform_driver sh_mobile_
- 	.remove		= sh_mobile_ceu_remove,
- };
- 
--static int __init sh_mobile_ceu_init(void)
--{
--	return platform_driver_register(&sh_mobile_ceu_driver);
--}
--
--static void __exit sh_mobile_ceu_exit(void)
--{
--	platform_driver_unregister(&sh_mobile_ceu_driver);
--}
--
--module_init(sh_mobile_ceu_init);
--module_exit(sh_mobile_ceu_exit);
-+module_platform_driver(sh_mobile_ceu_driver);
- 
- MODULE_DESCRIPTION("SuperH Mobile CEU driver");
- MODULE_AUTHOR("Magnus Damm");
diff --git a/patches.renesas/0115-sh_eth-fix-branch-prediction-in-sh_eth_interrupt.patch b/patches.renesas/0115-sh_eth-fix-branch-prediction-in-sh_eth_interrupt.patch
deleted file mode 100644
index 9d670385bf555b..00000000000000
--- a/patches.renesas/0115-sh_eth-fix-branch-prediction-in-sh_eth_interrupt.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From f1782b1d0fd0e4b7f40e23789548298a9ea3cb90 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 30 Dec 2016 00:07:38 +0300
-Subject: [PATCH 115/299] sh_eth: fix branch prediction in sh_eth_interrupt()
-
-IIUC, likely()/unlikely() should apply to the whole *if* statement's
-expression, not a part of it  -- fix such expression in  sh_eth_interrupt()
-accordingly...
-
-Fixes: 283e38db65e7 ("sh_eth: Fix serialisation of interrupt disable with interrupt & NAPI handlers")
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 2344ef3c86a7fe41f97bf66c7936001b6132860b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -1670,7 +1670,7 @@ static irqreturn_t sh_eth_interrupt(int
- 	else
- 		goto out;
- 
--	if (!likely(mdp->irq_enabled)) {
-+	if (unlikely(!mdp->irq_enabled)) {
- 		sh_eth_write(ndev, 0, EESIPR);
- 		goto out;
- 	}
diff --git a/patches.renesas/0116-mmc-tmio-ensure-end-of-DMA-and-SD-access-are-in-sync.patch b/patches.renesas/0116-mmc-tmio-ensure-end-of-DMA-and-SD-access-are-in-sync.patch
deleted file mode 100644
index be85fe76cd33c1..00000000000000
--- a/patches.renesas/0116-mmc-tmio-ensure-end-of-DMA-and-SD-access-are-in-sync.patch
+++ /dev/null
@@ -1,155 +0,0 @@
-From 0ea0d11e069936d066faeb6e1d561dc1fb961312 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Fri, 17 Feb 2017 19:22:41 +0100
-Subject: [PATCH 116/286] mmc: tmio: ensure end of DMA and SD access are in
- sync
-
-The current code assumes that DMA is finished before SD access end is
-flagged. Thus, it schedules the 'dma_complete' tasklet in the SD card
-interrupt routine when DATAEND is set. The assumption is not safe,
-though. Even by mounting an SD card, it can be seen that sometimes DMA
-complete is first, sometimes DATAEND. It seems they are usually close
-enough timewise to not cause problems. However, a customer reported that
-with CMD53 sometimes things really break apart. As a result, the BSP has
-a patch which introduces flags for both events and makes sure both flags
-are set before scheduling the tasklet. The customer accepted the patch,
-yet it doesn't seem a proper upstream solution to me.
-
-This patch refactors the code to replace the tasklet with already
-existing and more lightweight mechanisms. First of all, we set the
-callback in a DMA descriptor to automatically get notified when DMA is
-done. In the callback, we then use a completion to make sure the SD
-access has already ended. Then, we proceed as before.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 52ad9a8e854ca13151f4af8140297f73d49e318a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc.h     |    2 -
- drivers/mmc/host/tmio_mmc_dma.c |   58 +++++++++++++++++++++++-----------------
- drivers/mmc/host/tmio_mmc_pio.c |    4 +-
- 3 files changed, 37 insertions(+), 27 deletions(-)
-
---- a/drivers/mmc/host/tmio_mmc.h
-+++ b/drivers/mmc/host/tmio_mmc.h
-@@ -136,7 +136,7 @@ struct tmio_mmc_host {
- 	bool			force_pio;
- 	struct dma_chan		*chan_rx;
- 	struct dma_chan		*chan_tx;
--	struct tasklet_struct	dma_complete;
-+	struct completion	dma_dataend;
- 	struct tasklet_struct	dma_issue;
- 	struct scatterlist	bounce_sg;
- 	u8			*bounce_buf;
---- a/drivers/mmc/host/tmio_mmc_dma.c
-+++ b/drivers/mmc/host/tmio_mmc_dma.c
-@@ -43,6 +43,31 @@ void tmio_mmc_abort_dma(struct tmio_mmc_
- 	tmio_mmc_enable_dma(host, true);
- }
- 
-+static void tmio_mmc_dma_callback(void *arg)
-+{
-+	struct tmio_mmc_host *host = arg;
-+
-+	wait_for_completion(&host->dma_dataend);
-+
-+	spin_lock_irq(&host->lock);
-+
-+	if (!host->data)
-+		goto out;
-+
-+	if (host->data->flags & MMC_DATA_READ)
-+		dma_unmap_sg(host->chan_rx->device->dev,
-+			     host->sg_ptr, host->sg_len,
-+			     DMA_FROM_DEVICE);
-+	else
-+		dma_unmap_sg(host->chan_tx->device->dev,
-+			     host->sg_ptr, host->sg_len,
-+			     DMA_TO_DEVICE);
-+
-+	tmio_mmc_do_data_irq(host);
-+out:
-+	spin_unlock_irq(&host->lock);
-+}
-+
- static void tmio_mmc_start_dma_rx(struct tmio_mmc_host *host)
- {
- 	struct scatterlist *sg = host->sg_ptr, *sg_tmp;
-@@ -88,6 +113,10 @@ static void tmio_mmc_start_dma_rx(struct
- 			DMA_DEV_TO_MEM, DMA_CTRL_ACK);
- 
- 	if (desc) {
-+		reinit_completion(&host->dma_dataend);
-+		desc->callback = tmio_mmc_dma_callback;
-+		desc->callback_param = host;
-+
- 		cookie = dmaengine_submit(desc);
- 		if (cookie < 0) {
- 			desc = NULL;
-@@ -162,6 +191,10 @@ static void tmio_mmc_start_dma_tx(struct
- 			DMA_MEM_TO_DEV, DMA_CTRL_ACK);
- 
- 	if (desc) {
-+		reinit_completion(&host->dma_dataend);
-+		desc->callback = tmio_mmc_dma_callback;
-+		desc->callback_param = host;
-+
- 		cookie = dmaengine_submit(desc);
- 		if (cookie < 0) {
- 			desc = NULL;
-@@ -221,29 +254,6 @@ static void tmio_mmc_issue_tasklet_fn(un
- 		dma_async_issue_pending(chan);
- }
- 
--static void tmio_mmc_tasklet_fn(unsigned long arg)
--{
--	struct tmio_mmc_host *host = (struct tmio_mmc_host *)arg;
--
--	spin_lock_irq(&host->lock);
--
--	if (!host->data)
--		goto out;
--
--	if (host->data->flags & MMC_DATA_READ)
--		dma_unmap_sg(host->chan_rx->device->dev,
--			     host->sg_ptr, host->sg_len,
--			     DMA_FROM_DEVICE);
--	else
--		dma_unmap_sg(host->chan_tx->device->dev,
--			     host->sg_ptr, host->sg_len,
--			     DMA_TO_DEVICE);
--
--	tmio_mmc_do_data_irq(host);
--out:
--	spin_unlock_irq(&host->lock);
--}
--
- void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata)
- {
- 	/* We can only either use DMA for both Tx and Rx or not use it at all */
-@@ -306,7 +316,7 @@ void tmio_mmc_request_dma(struct tmio_mm
- 		if (!host->bounce_buf)
- 			goto ebouncebuf;
- 
--		tasklet_init(&host->dma_complete, tmio_mmc_tasklet_fn, (unsigned long)host);
-+		init_completion(&host->dma_dataend);
- 		tasklet_init(&host->dma_issue, tmio_mmc_issue_tasklet_fn, (unsigned long)host);
- 	}
- 
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -596,11 +596,11 @@ static void tmio_mmc_data_irq(struct tmi
- 
- 		if (done) {
- 			tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
--			tasklet_schedule(&host->dma_complete);
-+			complete(&host->dma_dataend);
- 		}
- 	} else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
- 		tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
--		tasklet_schedule(&host->dma_complete);
-+		complete(&host->dma_dataend);
- 	} else {
- 		tmio_mmc_do_data_irq(host);
- 		tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
diff --git a/patches.renesas/0117-mmc-host-tmio-use-defines-for-CTL_STOP_INTERNAL_ACTI.patch b/patches.renesas/0117-mmc-host-tmio-use-defines-for-CTL_STOP_INTERNAL_ACTI.patch
deleted file mode 100644
index 0703cc8fdeba24..00000000000000
--- a/patches.renesas/0117-mmc-host-tmio-use-defines-for-CTL_STOP_INTERNAL_ACTI.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 9c30ff8daad8d73f4a02636fb1915e16a42f1346 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Tue, 14 Mar 2017 11:09:16 +0100
-Subject: [PATCH 117/286] mmc: host: tmio: use defines for
- CTL_STOP_INTERNAL_ACTION values
-
-Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 9afcbf4a6f1995f3b47088764eaef7b56154beb9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc.h     |    4 ++++
- drivers/mmc/host/tmio_mmc_pio.c |    6 +++---
- 2 files changed, 7 insertions(+), 3 deletions(-)
-
---- a/drivers/mmc/host/tmio_mmc.h
-+++ b/drivers/mmc/host/tmio_mmc.h
-@@ -49,6 +49,10 @@
- #define CTL_CLK_AND_WAIT_CTL 0x138
- #define CTL_RESET_SDIO 0x1e0
- 
-+/* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */
-+#define TMIO_STOP_STP		BIT(0)
-+#define TMIO_STOP_SEC		BIT(8)
-+
- /* Definitions for values the CTRL_STATUS register can take. */
- #define TMIO_STAT_CMDRESPEND    BIT(0)
- #define TMIO_STAT_DATAEND       BIT(2)
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -340,7 +340,7 @@ static int tmio_mmc_start_command(struct
- 
- 	/* CMD12 is handled by hardware */
- 	if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) {
--		sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
-+		sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_STP);
- 		return 0;
- 	}
- 
-@@ -367,7 +367,7 @@ static int tmio_mmc_start_command(struct
- 	if (data) {
- 		c |= DATA_PRESENT;
- 		if (data->blocks > 1) {
--			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
-+			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
- 			c |= TRANSFER_MULTI;
- 
- 			/*
-@@ -554,7 +554,7 @@ void tmio_mmc_do_data_irq(struct tmio_mm
- 
- 	if (stop) {
- 		if (stop->opcode == MMC_STOP_TRANSMISSION && !stop->arg)
--			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
-+			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
- 		else
- 			BUG();
- 	}
diff --git a/patches.renesas/0118-mmc-host-tmio-fix-minor-typos-in-comments.patch b/patches.renesas/0118-mmc-host-tmio-fix-minor-typos-in-comments.patch
deleted file mode 100644
index e7c18f7aa39176..00000000000000
--- a/patches.renesas/0118-mmc-host-tmio-fix-minor-typos-in-comments.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 97a33e2c1f9472f18c1fe963065900eb4cb74564 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Tue, 14 Mar 2017 11:09:17 +0100
-Subject: [PATCH 118/286] mmc: host: tmio: fix minor typos in comments
-
-Making sure we match the actual register names.
-
-Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit d8acd16c84c32a65a291e8f16ba4cb3b6d182e30)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc.h |    6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/mmc/host/tmio_mmc.h
-+++ b/drivers/mmc/host/tmio_mmc.h
-@@ -53,7 +53,7 @@
- #define TMIO_STOP_STP		BIT(0)
- #define TMIO_STOP_SEC		BIT(8)
- 
--/* Definitions for values the CTRL_STATUS register can take. */
-+/* Definitions for values the CTL_STATUS register can take */
- #define TMIO_STAT_CMDRESPEND    BIT(0)
- #define TMIO_STAT_DATAEND       BIT(2)
- #define TMIO_STAT_CARD_REMOVE   BIT(3)
-@@ -64,7 +64,7 @@
- #define TMIO_STAT_CARD_INSERT_A BIT(9)
- #define TMIO_STAT_SIGSTATE_A    BIT(10)
- 
--/* These belong technically to CTRL_STATUS2, but the driver merges them */
-+/* These belong technically to CTL_STATUS2, but the driver merges them */
- #define TMIO_STAT_CMD_IDX_ERR   BIT(16)
- #define TMIO_STAT_CRCFAIL       BIT(17)
- #define TMIO_STAT_STOPBIT_ERR   BIT(18)
-@@ -88,7 +88,7 @@
- 
- #define TMIO_BBS		512		/* Boot block size */
- 
--/* Definitions for values the CTRL_SDIO_STATUS register can take. */
-+/* Definitions for values the CTL_SDIO_STATUS register can take */
- #define TMIO_SDIO_STAT_IOIRQ	0x0001
- #define TMIO_SDIO_STAT_EXPUB52	0x4000
- #define TMIO_SDIO_STAT_EXWT	0x8000
diff --git a/patches.renesas/0119-ASoC-rcar-dma-remove-unnecessary-volatile.patch b/patches.renesas/0119-ASoC-rcar-dma-remove-unnecessary-volatile.patch
deleted file mode 100644
index 0726891b38901a..00000000000000
--- a/patches.renesas/0119-ASoC-rcar-dma-remove-unnecessary-volatile.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 9022d90c85e7ba3e9efb1782d8e49b50dfab5ef1 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 16 Mar 2017 04:22:09 +0000
-Subject: [PATCH 119/255] ASoC: rcar: dma: remove unnecessary "volatile"
-
-commit 2a3af642eb20("ASoC: rcar: clear DE bit only in PDMACHCR...")
-added rsnd_dmapp_bset(), but it used copy-paste. Thus, it had
-unnecessary "volatile", and had below warning on x86.
-This patch fix it.
-
-   sound/soc/sh/rcar/dma.c: In function 'rsnd_dmapp_bset':
->> sound/soc/sh/rcar/dma.c:463:21: warning: passing argument 1 of \
-   'ioread32' discards 'volatile' qualifier from pointer target \
-   type [-Wdiscarded-qualifiers]
-     u32 val = ioread32(addr);
-                        ^~~~
-   In file included from arch/x86/include/asm/io.h:203:0,
-                    from arch/x86/include/asm/realmode.h:5,
-                    from arch/x86/include/asm/acpi.h:33,
-                    from arch/x86/include/asm/fixmap.h:19,
-                    from arch/x86/include/asm/apic.h:10,
-                    from arch/x86/include/asm/smp.h:12,
-                    from include/linux/smp.h:59,
-                    from include/linux/topology.h:33,
-                    from include/linux/gfp.h:8,
-                    from include/linux/idr.h:16,
-                    from include/linux/kernfs.h:14,
-                    from include/linux/sysfs.h:15,
-                    from include/linux/kobject.h:21,
-                    from include/linux/of.h:21,
-                    from include/linux/of_dma.h:16,
-                    from sound/soc/sh/rcar/dma.c:12:
-   include/asm-generic/iomap.h:31:21: note: expected 'void *' \
-   but argument is of type 'volatile void *'
-    extern unsigned int ioread32(void __iomem *);
-                        ^~~~~~~~
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-
-(cherry picked from commit 9986943ef5d61a9bea3c86000d91d3b789f0060e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/dma.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/sound/soc/sh/rcar/dma.c
-+++ b/sound/soc/sh/rcar/dma.c
-@@ -459,7 +459,7 @@ static void rsnd_dmapp_bset(struct rsnd_
- 	struct rsnd_mod *mod = rsnd_mod_get(dma);
- 	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
- 	struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv);
--	volatile void __iomem *addr = rsnd_dmapp_addr(dmac, dma, reg);
-+	void __iomem *addr = rsnd_dmapp_addr(dmac, dma, reg);
- 	u32 val = ioread32(addr);
- 
- 	val &= ~mask;
diff --git a/patches.renesas/0119-arm64-dts-r8a7796-salvator-x-enable-SDHI0-3.patch b/patches.renesas/0119-arm64-dts-r8a7796-salvator-x-enable-SDHI0-3.patch
deleted file mode 100644
index f6c27c2acdf780..00000000000000
--- a/patches.renesas/0119-arm64-dts-r8a7796-salvator-x-enable-SDHI0-3.patch
+++ /dev/null
@@ -1,131 +0,0 @@
-From ff47c8efef6dbeab04dfdea3b85acde2e90507a7 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 16 Aug 2016 10:55:04 +0200
-Subject: [PATCH 119/299] arm64: dts: r8a7796: salvator-x: enable SDHI0 & 3
-
-Enable the exposed SD card slots in the DT of the r8a7796/salvator-x.
-
-Based on work for the r8a7795/salvator-x by Ai Kyuse.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit e2420b92de4941bdca05d7c93acfddb48f036d0b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts |   84 +++++++++++++++++++++
- 1 file changed, 84 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-@@ -10,6 +10,7 @@
- 
- /dts-v1/;
- #include "r8a7796.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
- 
- / {
- 	model = "Renesas Salvator-X board based on r8a7796";
-@@ -29,6 +30,55 @@
- 		/* first 128MB is reserved for secure area. */
- 		reg = <0x0 0x48000000 0x0 0x78000000>;
- 	};
-+
-+	vcc_sdhi0: regulator-vcc-sdhi0 {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "SDHI0 Vcc";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+	};
-+
-+	vccq_sdhi0: regulator-vccq-sdhi0 {
-+		compatible = "regulator-gpio";
-+
-+		regulator-name = "SDHI0 VccQ";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
-+		gpios-states = <1>;
-+		states = <3300000 1
-+			  1800000 0>;
-+	};
-+
-+	vcc_sdhi3: regulator-vcc-sdhi3 {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "SDHI3 Vcc";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+	};
-+
-+	vccq_sdhi3: regulator-vccq-sdhi3 {
-+		compatible = "regulator-gpio";
-+
-+		regulator-name = "SDHI3 VccQ";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
-+		gpios-states = <1>;
-+		states = <3300000 1
-+			  1800000 0>;
-+	};
-+
- };
- 
- &pfc {
-@@ -43,6 +93,16 @@
- 		groups = "scif_clk_a";
- 		function = "scif_clk";
- 	};
-+
-+	sdhi0_pins: sd0 {
-+		groups = "sdhi0_data4", "sdhi0_ctrl";
-+		function = "sdhi0";
-+	};
-+
-+	sdhi3_pins: sd3 {
-+		groups = "sdhi3_data4", "sdhi3_ctrl";
-+		function = "sdhi3";
-+	};
- };
- 
- &extal_clk {
-@@ -53,6 +113,30 @@
- 	clock-frequency = <32768>;
- };
- 
-+&sdhi0 {
-+	pinctrl-0 = <&sdhi0_pins>;
-+	pinctrl-names = "default";
-+
-+	vmmc-supply = <&vcc_sdhi0>;
-+	vqmmc-supply = <&vccq_sdhi0>;
-+	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
-+	wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
-+	bus-width = <4>;
-+	status = "okay";
-+};
-+
-+&sdhi3 {
-+	pinctrl-0 = <&sdhi3_pins>;
-+	pinctrl-names = "default";
-+
-+	vmmc-supply = <&vcc_sdhi3>;
-+	vqmmc-supply = <&vccq_sdhi3>;
-+	cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
-+	wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
-+	bus-width = <4>;
-+	status = "okay";
-+};
-+
- &scif2 {
- 	pinctrl-0 = <&scif2_pins>;
- 	pinctrl-names = "default";
diff --git a/patches.renesas/0119-mmc-host-tmio-don-t-BUG-on-unsupported-stop-commands.patch b/patches.renesas/0119-mmc-host-tmio-don-t-BUG-on-unsupported-stop-commands.patch
deleted file mode 100644
index 42bb2be1627753..00000000000000
--- a/patches.renesas/0119-mmc-host-tmio-don-t-BUG-on-unsupported-stop-commands.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 028b6f9e2b0adc8c6f75a05fcbdd0e66345bb708 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Tue, 14 Mar 2017 11:09:18 +0100
-Subject: [PATCH 119/286] mmc: host: tmio: don't BUG on unsupported stop
- commands
-
-Halting the kernel on an unsupported stop command seems overkill, report
-the error and say what we already did (due to autocmd12) instead.
-
-Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 022f731e03d190d0e4f52f2b1bd90fae0eadd56d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c |    9 +++++----
- 1 file changed, 5 insertions(+), 4 deletions(-)
-
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -553,10 +553,11 @@ void tmio_mmc_do_data_irq(struct tmio_mm
- 	}
- 
- 	if (stop) {
--		if (stop->opcode == MMC_STOP_TRANSMISSION && !stop->arg)
--			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
--		else
--			BUG();
-+		if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
-+			dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
-+				stop->opcode, stop->arg);
-+
-+		sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
- 	}
- 
- 	schedule_work(&host->done);
diff --git a/patches.renesas/0120-arm64-dts-r8a7796-salvator-x-enable-UHS-for-SDHI-0-3.patch b/patches.renesas/0120-arm64-dts-r8a7796-salvator-x-enable-UHS-for-SDHI-0-3.patch
deleted file mode 100644
index 081b1fa0e53d3d..00000000000000
--- a/patches.renesas/0120-arm64-dts-r8a7796-salvator-x-enable-UHS-for-SDHI-0-3.patch
+++ /dev/null
@@ -1,76 +0,0 @@
-From 2f0469a4f92f24e14bc9a1d0f94104423bcbb4e5 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Sep 2016 12:57:07 +0200
-Subject: [PATCH 120/299] arm64: dts: r8a7796: salvator-x: enable UHS for SDHI
- 0 & 3
-
-Based on work for the r8a7796 by Wolfram Sang.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-(cherry picked from commit af3cf72f5f4b158d34935d6995908989afbe756c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts |   22 +++++++++++++++++++--
- 1 file changed, 20 insertions(+), 2 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-@@ -97,11 +97,25 @@
- 	sdhi0_pins: sd0 {
- 		groups = "sdhi0_data4", "sdhi0_ctrl";
- 		function = "sdhi0";
-+		power-source = <3300>;
-+	};
-+
-+	sdhi0_pins_uhs: sd0_uhs {
-+		groups = "sdhi0_data4", "sdhi0_ctrl";
-+		function = "sdhi0";
-+		power-source = <1800>;
- 	};
- 
- 	sdhi3_pins: sd3 {
- 		groups = "sdhi3_data4", "sdhi3_ctrl";
- 		function = "sdhi3";
-+		power-source = <3300>;
-+	};
-+
-+	sdhi3_pins_uhs: sd3_uhs {
-+		groups = "sdhi3_data4", "sdhi3_ctrl";
-+		function = "sdhi3";
-+		power-source = <1800>;
- 	};
- };
- 
-@@ -115,25 +129,29 @@
- 
- &sdhi0 {
- 	pinctrl-0 = <&sdhi0_pins>;
--	pinctrl-names = "default";
-+	pinctrl-1 = <&sdhi0_pins_uhs>;
-+	pinctrl-names = "default", "state_uhs";
- 
- 	vmmc-supply = <&vcc_sdhi0>;
- 	vqmmc-supply = <&vccq_sdhi0>;
- 	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
- 	wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
- 	bus-width = <4>;
-+	sd-uhs-sdr50;
- 	status = "okay";
- };
- 
- &sdhi3 {
- 	pinctrl-0 = <&sdhi3_pins>;
--	pinctrl-names = "default";
-+	pinctrl-1 = <&sdhi3_pins_uhs>;
-+	pinctrl-names = "default", "state_uhs";
- 
- 	vmmc-supply = <&vcc_sdhi3>;
- 	vqmmc-supply = <&vccq_sdhi3>;
- 	cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
- 	wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
- 	bus-width = <4>;
-+	sd-uhs-sdr50;
- 	status = "okay";
- };
- 
diff --git a/patches.renesas/0120-mmc-host-tmio-fill-in-response-from-auto-cmd12.patch b/patches.renesas/0120-mmc-host-tmio-fill-in-response-from-auto-cmd12.patch
deleted file mode 100644
index 88c02155b5c7e0..00000000000000
--- a/patches.renesas/0120-mmc-host-tmio-fill-in-response-from-auto-cmd12.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From d1863b53a1de4d7be9354ca30af40523b44b77d2 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Tue, 14 Mar 2017 11:09:19 +0100
-Subject: [PATCH 120/286] mmc: host: tmio: fill in response from auto cmd12
-
-After we received the dataend interrupt, R1 response register carries
-the value from the automatically generated stop command. Report that
-info back to the MMC block layer, so we will be notified in case of e.g.
-ECC errors which happened during the last transfer.
-
-Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
-Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit eb7c00e1461124ad0e85f1a9a3954d7164809c13)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -557,6 +557,9 @@ void tmio_mmc_do_data_irq(struct tmio_mm
- 			dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
- 				stop->opcode, stop->arg);
- 
-+		/* fill in response from auto CMD12 */
-+		stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
-+
- 		sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
- 	}
- 
diff --git a/patches.renesas/0120-spi-rspi-Remove-useless-memory-allocation-failure-me.patch b/patches.renesas/0120-spi-rspi-Remove-useless-memory-allocation-failure-me.patch
deleted file mode 100644
index 17c6e6f9647c65..00000000000000
--- a/patches.renesas/0120-spi-rspi-Remove-useless-memory-allocation-failure-me.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 6a3aee90392d5dafc14a73c9c098eb52b9a97ba1 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 4 Jan 2017 11:15:07 +0100
-Subject: [PATCH 120/255] spi: rspi: Remove useless memory allocation failure
- message
-
-Printing an error on memory allocation failure is unnecessary.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit ffcfae3823751c72b615b57f700e563667002d09)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/spi-rspi.c |    4 +---
- 1 file changed, 1 insertion(+), 3 deletions(-)
-
---- a/drivers/spi/spi-rspi.c
-+++ b/drivers/spi/spi-rspi.c
-@@ -1227,10 +1227,8 @@ static int rspi_probe(struct platform_de
- 	const struct spi_ops *ops;
- 
- 	master = spi_alloc_master(&pdev->dev, sizeof(struct rspi_data));
--	if (master == NULL) {
--		dev_err(&pdev->dev, "spi_alloc_master error.\n");
-+	if (master == NULL)
- 		return -ENOMEM;
--	}
- 
- 	of_id = of_match_device(rspi_of_match, &pdev->dev);
- 	if (of_id) {
diff --git a/patches.renesas/0121-arm64-dts-r8a7795-salvator-enable-on-board-eMMC.patch b/patches.renesas/0121-arm64-dts-r8a7795-salvator-enable-on-board-eMMC.patch
deleted file mode 100644
index 21a0b80064e001..00000000000000
--- a/patches.renesas/0121-arm64-dts-r8a7795-salvator-enable-on-board-eMMC.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From 0c74b2dfe06949b805d7c86cb4f4e933036e69a6 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Sun, 16 Oct 2016 10:27:47 +0200
-Subject: [PATCH 121/299] arm64: dts: r8a7795: salvator: enable on-board eMMC
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7c827d1fda99d4a80e317b1fbb1ba359b082bda2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |   43 +++++++++++++++++++++
- 1 file changed, 43 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-@@ -62,6 +62,24 @@
- 		clock-frequency = <24576000>;
- 	};
- 
-+	reg_1p8v: regulator0 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-1.8V";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+
-+	reg_3p3v: regulator1 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-3.3V";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+
- 	vcc_sdhi0: regulator-vcc-sdhi0 {
- 		compatible = "regulator-fixed";
- 
-@@ -250,6 +268,18 @@
- 		power-source = <1800>;
- 	};
- 
-+	sdhi2_pins: sd2 {
-+		groups = "sdhi2_data8", "sdhi2_ctrl";
-+		function = "sdhi2";
-+		power-source = <3300>;
-+	};
-+
-+	sdhi2_pins_uhs: sd2_uhs {
-+		groups = "sdhi2_data8", "sdhi2_ctrl";
-+		function = "sdhi2";
-+		power-source = <1800>;
-+	};
-+
- 	sdhi3_pins: sd3 {
- 		groups = "sdhi3_data4", "sdhi3_ctrl";
- 		function = "sdhi3";
-@@ -401,6 +431,19 @@
- 	status = "okay";
- };
- 
-+&sdhi2 {
-+	/* used for on-board 8bit eMMC */
-+	pinctrl-0 = <&sdhi2_pins>;
-+	pinctrl-1 = <&sdhi2_pins_uhs>;
-+	pinctrl-names = "default", "state_uhs";
-+
-+	vmmc-supply = <&reg_3p3v>;
-+	vqmmc-supply = <&reg_1p8v>;
-+	bus-width = <8>;
-+	non-removable;
-+	status = "okay";
-+};
-+
- &sdhi3 {
- 	pinctrl-0 = <&sdhi3_pins>;
- 	pinctrl-1 = <&sdhi3_pins_uhs>;
diff --git a/patches.renesas/0121-mmc-tmio-always-unmap-DMA-before-waiting-for-interru.patch b/patches.renesas/0121-mmc-tmio-always-unmap-DMA-before-waiting-for-interru.patch
deleted file mode 100644
index 4a3e7eaece85db..00000000000000
--- a/patches.renesas/0121-mmc-tmio-always-unmap-DMA-before-waiting-for-interru.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 4c4c55ec5ccc7ef42434a777c156dc1a0dd85000 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Thu, 16 Mar 2017 11:56:02 +0100
-Subject: [PATCH 121/286] mmc: tmio: always unmap DMA before waiting for
- interrupt
-
-In the (maybe academical) case, we don't get a DATAEND interrupt after
-DMA completed, we will wait endlessly for the completion to complete.
-This is not bad per se, since we have a more generic completion tracking
-a timeout. In that rare case, however, the DMA buffer will not get
-unmapped and we have a leak. Reorder the code, so unmapping will always
-take place.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 5f07ef8f603ace496ca8c20eef446c5ae7a10474)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_dma.c |    7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
---- a/drivers/mmc/host/tmio_mmc_dma.c
-+++ b/drivers/mmc/host/tmio_mmc_dma.c
-@@ -47,8 +47,6 @@ static void tmio_mmc_dma_callback(void *
- {
- 	struct tmio_mmc_host *host = arg;
- 
--	wait_for_completion(&host->dma_dataend);
--
- 	spin_lock_irq(&host->lock);
- 
- 	if (!host->data)
-@@ -63,6 +61,11 @@ static void tmio_mmc_dma_callback(void *
- 			     host->sg_ptr, host->sg_len,
- 			     DMA_TO_DEVICE);
- 
-+	spin_unlock_irq(&host->lock);
-+
-+	wait_for_completion(&host->dma_dataend);
-+
-+	spin_lock_irq(&host->lock);
- 	tmio_mmc_do_data_irq(host);
- out:
- 	spin_unlock_irq(&host->lock);
diff --git a/patches.renesas/0121-spi-rspi-Fixes-bogus-received-byte-in-qspi_transfer_.patch b/patches.renesas/0121-spi-rspi-Fixes-bogus-received-byte-in-qspi_transfer_.patch
deleted file mode 100644
index 053b2c197767c4..00000000000000
--- a/patches.renesas/0121-spi-rspi-Fixes-bogus-received-byte-in-qspi_transfer_.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From aa695f54c79bb72710fce2a1c8dbd657afb8334d Mon Sep 17 00:00:00 2001
-From: DongCV <cv-dong@jinso.co.jp>
-Date: Wed, 15 Feb 2017 19:50:51 +0900
-Subject: [PATCH 121/255] spi: rspi: Fixes bogus received byte in
- qspi_transfer_in()
-
-In qspi_transfer_in(), when receiving the last n (or len) bytes of data,
-one bogus byte was written in the receive buffer.
-This code leads to a buffer overflow.
-
-"jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found
-at 0x03b40000: 0x1900 instead
-jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found
-at 0x03b40004: 0x000c instead"
-
-The error message above happens when trying to mount, unmount,
-and remount a jffs2-formatted device.
-This patch removed the bogus write to fixes: 3be09bec42a800d4
-"spi: rspi: supports 32bytes buffer for DUAL and QUAD"
-
-And here is Geert's comment:
-
-"spi: rspi: Fix bogus received byte in qspi_transfer_in()
-When there are less than QSPI_BUFFER_SIZE remaining bytes to be received,
-qspi_transfer_in() writes one bogus byte in the receive buffer, possibly
-leading to a buffer overflow.
-This can be reproduced by mounting, unmounting, and remounting a
-jffs2-formatted device, causing lots of warnings like:
-
-"jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found
-at 0x03b40000: 0x1900 instead"
-
-Remove the bogus write to fix this. "
-
-Signed-off-by: DongCV <cv-dong@jinso.co.jp>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 7264abc7000d601726aefb05189ea524ee3995ba)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/spi-rspi.c |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/drivers/spi/spi-rspi.c
-+++ b/drivers/spi/spi-rspi.c
-@@ -848,7 +848,6 @@ static int qspi_transfer_in(struct rspi_
- 			ret = rspi_pio_transfer(rspi, NULL, rx, n);
- 			if (ret < 0)
- 				return ret;
--			*rx++ = ret;
- 		}
- 		n -= len;
- 	}
diff --git a/patches.renesas/0122-arm64-dts-r8a7796-salvator-enable-on-board-eMMC.patch b/patches.renesas/0122-arm64-dts-r8a7796-salvator-enable-on-board-eMMC.patch
deleted file mode 100644
index a8f5084467231d..00000000000000
--- a/patches.renesas/0122-arm64-dts-r8a7796-salvator-enable-on-board-eMMC.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From 3f88d80a5f431d79ddeddfc20dccb9674b2cc88b Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Tue, 6 Sep 2016 10:52:25 +0200
-Subject: [PATCH 122/299] arm64: dts: r8a7796: salvator: enable on board eMMC
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 38548328fe3ff931063ce81ed3c3b5867c5fb233)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts |   44 ++++++++++++++++++++-
- 1 file changed, 43 insertions(+), 1 deletion(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-@@ -31,6 +31,24 @@
- 		reg = <0x0 0x48000000 0x0 0x78000000>;
- 	};
- 
-+	reg_1p8v: regulator0 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-1.8V";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+
-+	reg_3p3v: regulator1 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-3.3V";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+
- 	vcc_sdhi0: regulator-vcc-sdhi0 {
- 		compatible = "regulator-fixed";
- 
-@@ -78,7 +96,6 @@
- 		states = <3300000 1
- 			  1800000 0>;
- 	};
--
- };
- 
- &pfc {
-@@ -106,6 +123,18 @@
- 		power-source = <1800>;
- 	};
- 
-+	sdhi2_pins: sd2 {
-+		groups = "sdhi2_data8", "sdhi2_ctrl";
-+		function = "sdhi2";
-+		power-source = <3300>;
-+	};
-+
-+	sdhi2_pins_uhs: sd2_uhs {
-+		groups = "sdhi2_data8", "sdhi2_ctrl";
-+		function = "sdhi2";
-+		power-source = <1800>;
-+	};
-+
- 	sdhi3_pins: sd3 {
- 		groups = "sdhi3_data4", "sdhi3_ctrl";
- 		function = "sdhi3";
-@@ -141,6 +170,19 @@
- 	status = "okay";
- };
- 
-+&sdhi2 {
-+	/* used for on-board 8bit eMMC */
-+	pinctrl-0 = <&sdhi2_pins>;
-+	pinctrl-1 = <&sdhi2_pins_uhs>;
-+	pinctrl-names = "default", "state_uhs";
-+
-+	vmmc-supply = <&reg_3p3v>;
-+	vqmmc-supply = <&reg_1p8v>;
-+	bus-width = <8>;
-+	non-removable;
-+	status = "okay";
-+};
-+
- &sdhi3 {
- 	pinctrl-0 = <&sdhi3_pins>;
- 	pinctrl-1 = <&sdhi3_pins_uhs>;
diff --git a/patches.renesas/0122-mmc-tmio-always-get-number-of-taps.patch b/patches.renesas/0122-mmc-tmio-always-get-number-of-taps.patch
deleted file mode 100644
index 2649afeef16fb7..00000000000000
--- a/patches.renesas/0122-mmc-tmio-always-get-number-of-taps.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From bc21d58162e277dd0cac98d4c65e24b508cd520d Mon Sep 17 00:00:00 2001
-From: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com>
-Date: Fri, 17 Mar 2017 10:04:50 +0100
-Subject: [PATCH 122/286] mmc: tmio: always get number of taps
-
-Current code gets number of taps only once and keeps the value. This is
-not correct, we need to obtain it every time before executing tuning,
-so remove the outer if-block.
-
-Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com>
-[wsa: extracted from a larger patch and reworded commit message]
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-
-(cherry picked from commit 43b0b361b0170030603cf76f70b099f3323edcf3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c |   16 +++++++---------
- 1 file changed, 7 insertions(+), 9 deletions(-)
-
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -815,16 +815,14 @@ static int tmio_mmc_execute_tuning(struc
- 	struct tmio_mmc_host *host = mmc_priv(mmc);
- 	int i, ret = 0;
- 
--	if (!host->tap_num) {
--		if (!host->init_tuning || !host->select_tuning)
--			/* Tuning is not supported */
--			goto out;
-+	if (!host->init_tuning || !host->select_tuning)
-+		/* Tuning is not supported */
-+		goto out;
- 
--		host->tap_num = host->init_tuning(host);
--		if (!host->tap_num)
--			/* Tuning is not supported */
--			goto out;
--	}
-+	host->tap_num = host->init_tuning(host);
-+	if (!host->tap_num)
-+		/* Tuning is not supported */
-+		goto out;
- 
- 	if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
- 		dev_warn_once(&host->pdev->dev,
diff --git a/patches.renesas/0122-spi-rspi-Replaces-n-by-len-in-qspi_transfer_.patch b/patches.renesas/0122-spi-rspi-Replaces-n-by-len-in-qspi_transfer_.patch
deleted file mode 100644
index e1cbf18d66655c..00000000000000
--- a/patches.renesas/0122-spi-rspi-Replaces-n-by-len-in-qspi_transfer_.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 1e36189ab13e82d3789cbff04b957622ac53e1be Mon Sep 17 00:00:00 2001
-From: DongCV <cv-dong@jinso.co.jp>
-Date: Wed, 15 Feb 2017 19:50:52 +0900
-Subject: [PATCH 122/255] spi: rspi: Replaces "n" by "len" in qspi_transfer_*()
-
-This patch replaced "n" by "len" bytes of data in qspi_transfer_in() and
-qspi_transfer_out() function. This will make improving readability.
-
-Signed-off-by: DongCV <cv-dong@jinso.co.jp>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit ad16d4a83ddc86151b4a6efe257ba74eb30f9f8e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/spi-rspi.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/spi/spi-rspi.c
-+++ b/drivers/spi/spi-rspi.c
-@@ -808,7 +808,7 @@ static int qspi_transfer_out(struct rspi
- 			for (i = 0; i < len; i++)
- 				rspi_write_data(rspi, *tx++);
- 		} else {
--			ret = rspi_pio_transfer(rspi, tx, NULL, n);
-+			ret = rspi_pio_transfer(rspi, tx, NULL, len);
- 			if (ret < 0)
- 				return ret;
- 		}
-@@ -845,7 +845,7 @@ static int qspi_transfer_in(struct rspi_
- 			for (i = 0; i < len; i++)
- 				*rx++ = rspi_read_data(rspi);
- 		} else {
--			ret = rspi_pio_transfer(rspi, NULL, rx, n);
-+			ret = rspi_pio_transfer(rspi, NULL, rx, len);
- 			if (ret < 0)
- 				return ret;
- 		}
diff --git a/patches.renesas/0123-arm64-dts-r8a7795-salvator-x-add-bias-setting-for-us.patch b/patches.renesas/0123-arm64-dts-r8a7795-salvator-x-add-bias-setting-for-us.patch
deleted file mode 100644
index 70186e0be034d8..00000000000000
--- a/patches.renesas/0123-arm64-dts-r8a7795-salvator-x-add-bias-setting-for-us.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 4bdc12c1f3a45ee6d0ea897c2d01d7ff12cad296 Mon Sep 17 00:00:00 2001
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Date: Thu, 27 Oct 2016 19:29:27 +0900
-Subject: [PATCH 123/299] arm64: dts: r8a7795: salvator-x: add bias setting for
- usb1_pins
-
-Since this board doesn't mount pull-up/down registers for
-USB1_{OVC,PWEN} pins, we should enable bias setting to pull these
-pins up/down.
-
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0751e1bd1e9e989df2d5f6a52c28b16093bc9c78)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |   16 ++++++++++++++--
- 1 file changed, 14 insertions(+), 2 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
-@@ -309,8 +309,20 @@
- 	};
- 
- 	usb1_pins: usb1 {
--		groups = "usb1";
--		function = "usb1";
-+		mux {
-+			groups = "usb1";
-+			function = "usb1";
-+		};
-+
-+		ovc {
-+			pins = "GP_6_27";
-+			bias-pull-up;
-+		};
-+
-+		pwen {
-+			pins = "GP_6_26";
-+			bias-pull-down;
-+		};
- 	};
- 
- 	usb2_pins: usb2 {
diff --git a/patches.renesas/0123-ata-pass-queued-command-to-sff_data_xfer-method.patch b/patches.renesas/0123-ata-pass-queued-command-to-sff_data_xfer-method.patch
deleted file mode 100644
index 12b0c507eb11a9..00000000000000
--- a/patches.renesas/0123-ata-pass-queued-command-to-sff_data_xfer-method.patch
+++ /dev/null
@@ -1,408 +0,0 @@
-From e534be0ba9c7a92163d493455e7fb533af05c3ec Mon Sep 17 00:00:00 2001
-From: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
-Date: Fri, 30 Dec 2016 15:01:17 +0100
-Subject: [PATCH 123/255] ata: pass queued command to ->sff_data_xfer method
-
-For Atari Falcon PATA support we need to check the current command
-in its ->sff_data_xfer method.  Update core code and all users
-accordingly.
-
-There should be no functional changes caused by this patch.
-
-Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
-Signed-off-by: Tejun Heo <tj@kernel.org>
-(cherry picked from commit 989e0aac1a801e9e9580632c9fd448a7aaca596a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/ata/libata-sff.c      |   29 +++++++++++++++--------------
- drivers/ata/pata_at91.c       |    6 +++---
- drivers/ata/pata_bf54x.c      |    7 ++++---
- drivers/ata/pata_ep93xx.c     |    4 ++--
- drivers/ata/pata_ixp4xx_cf.c  |    4 ++--
- drivers/ata/pata_legacy.c     |   15 +++++++++------
- drivers/ata/pata_octeon_cf.c  |   12 ++++++------
- drivers/ata/pata_pcmcia.c     |    6 +++---
- drivers/ata/pata_samsung_cf.c |    4 ++--
- drivers/ata/sata_rcar.c       |    4 ++--
- include/linux/libata.h        |    8 ++++----
- 11 files changed, 52 insertions(+), 47 deletions(-)
-
---- a/drivers/ata/libata-sff.c
-+++ b/drivers/ata/libata-sff.c
-@@ -542,7 +542,7 @@ static inline void ata_tf_to_host(struct
- 
- /**
-  *	ata_sff_data_xfer - Transfer data by PIO
-- *	@dev: device to target
-+ *	@qc: queued command
-  *	@buf: data buffer
-  *	@buflen: buffer length
-  *	@rw: read/write
-@@ -555,10 +555,10 @@ static inline void ata_tf_to_host(struct
-  *	RETURNS:
-  *	Bytes consumed.
-  */
--unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf,
-+unsigned int ata_sff_data_xfer(struct ata_queued_cmd *qc, unsigned char *buf,
- 			       unsigned int buflen, int rw)
- {
--	struct ata_port *ap = dev->link->ap;
-+	struct ata_port *ap = qc->dev->link->ap;
- 	void __iomem *data_addr = ap->ioaddr.data_addr;
- 	unsigned int words = buflen >> 1;
- 
-@@ -595,7 +595,7 @@ EXPORT_SYMBOL_GPL(ata_sff_data_xfer);
- 
- /**
-  *	ata_sff_data_xfer32 - Transfer data by PIO
-- *	@dev: device to target
-+ *	@qc: queued command
-  *	@buf: data buffer
-  *	@buflen: buffer length
-  *	@rw: read/write
-@@ -610,16 +610,17 @@ EXPORT_SYMBOL_GPL(ata_sff_data_xfer);
-  *	Bytes consumed.
-  */
- 
--unsigned int ata_sff_data_xfer32(struct ata_device *dev, unsigned char *buf,
-+unsigned int ata_sff_data_xfer32(struct ata_queued_cmd *qc, unsigned char *buf,
- 			       unsigned int buflen, int rw)
- {
-+	struct ata_device *dev = qc->dev;
- 	struct ata_port *ap = dev->link->ap;
- 	void __iomem *data_addr = ap->ioaddr.data_addr;
- 	unsigned int words = buflen >> 2;
- 	int slop = buflen & 3;
- 
- 	if (!(ap->pflags & ATA_PFLAG_PIO32))
--		return ata_sff_data_xfer(dev, buf, buflen, rw);
-+		return ata_sff_data_xfer(qc, buf, buflen, rw);
- 
- 	/* Transfer multiple of 4 bytes */
- 	if (rw == READ)
-@@ -658,7 +659,7 @@ EXPORT_SYMBOL_GPL(ata_sff_data_xfer32);
- 
- /**
-  *	ata_sff_data_xfer_noirq - Transfer data by PIO
-- *	@dev: device to target
-+ *	@qc: queued command
-  *	@buf: data buffer
-  *	@buflen: buffer length
-  *	@rw: read/write
-@@ -672,14 +673,14 @@ EXPORT_SYMBOL_GPL(ata_sff_data_xfer32);
-  *	RETURNS:
-  *	Bytes consumed.
-  */
--unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev, unsigned char *buf,
-+unsigned int ata_sff_data_xfer_noirq(struct ata_queued_cmd *qc, unsigned char *buf,
- 				     unsigned int buflen, int rw)
- {
- 	unsigned long flags;
- 	unsigned int consumed;
- 
- 	local_irq_save(flags);
--	consumed = ata_sff_data_xfer32(dev, buf, buflen, rw);
-+	consumed = ata_sff_data_xfer32(qc, buf, buflen, rw);
- 	local_irq_restore(flags);
- 
- 	return consumed;
-@@ -723,14 +724,14 @@ static void ata_pio_sector(struct ata_qu
- 		buf = kmap_atomic(page);
- 
- 		/* do the actual data transfer */
--		ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
-+		ap->ops->sff_data_xfer(qc, buf + offset, qc->sect_size,
- 				       do_write);
- 
- 		kunmap_atomic(buf);
- 		local_irq_restore(flags);
- 	} else {
- 		buf = page_address(page);
--		ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
-+		ap->ops->sff_data_xfer(qc, buf + offset, qc->sect_size,
- 				       do_write);
- 	}
- 
-@@ -791,7 +792,7 @@ static void atapi_send_cdb(struct ata_po
- 	DPRINTK("send cdb\n");
- 	WARN_ON_ONCE(qc->dev->cdb_len < 12);
- 
--	ap->ops->sff_data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
-+	ap->ops->sff_data_xfer(qc, qc->cdb, qc->dev->cdb_len, 1);
- 	ata_sff_sync(ap);
- 	/* FIXME: If the CDB is for DMA do we need to do the transition delay
- 	   or is bmdma_start guaranteed to do it ? */
-@@ -868,14 +869,14 @@ next_sg:
- 		buf = kmap_atomic(page);
- 
- 		/* do the actual data transfer */
--		consumed = ap->ops->sff_data_xfer(dev,  buf + offset,
-+		consumed = ap->ops->sff_data_xfer(qc, buf + offset,
- 								count, rw);
- 
- 		kunmap_atomic(buf);
- 		local_irq_restore(flags);
- 	} else {
- 		buf = page_address(page);
--		consumed = ap->ops->sff_data_xfer(dev,  buf + offset,
-+		consumed = ap->ops->sff_data_xfer(qc, buf + offset,
- 								count, rw);
- 	}
- 
---- a/drivers/ata/pata_at91.c
-+++ b/drivers/ata/pata_at91.c
-@@ -286,10 +286,10 @@ static void pata_at91_set_piomode(struct
- 	set_smc_timing(ap->dev, adev, info, &timing);
- }
- 
--static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
-+static unsigned int pata_at91_data_xfer_noirq(struct ata_queued_cmd *qc,
- 		unsigned char *buf, unsigned int buflen, int rw)
- {
--	struct at91_ide_info *info = dev->link->ap->host->private_data;
-+	struct at91_ide_info *info = qc->dev->link->ap->host->private_data;
- 	unsigned int consumed;
- 	unsigned int mode;
- 	unsigned long flags;
-@@ -301,7 +301,7 @@ static unsigned int pata_at91_data_xfer_
- 	regmap_fields_write(fields.mode, info->cs, (mode & ~AT91_SMC_DBW) |
- 			    AT91_SMC_DBW_16);
- 
--	consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
-+	consumed = ata_sff_data_xfer(qc, buf, buflen, rw);
- 
- 	/* restore 8bit mode after data is written */
- 	regmap_fields_write(fields.mode, info->cs, (mode & ~AT91_SMC_DBW) |
---- a/drivers/ata/pata_bf54x.c
-+++ b/drivers/ata/pata_bf54x.c
-@@ -1143,7 +1143,7 @@ static unsigned char bfin_bmdma_status(s
- 
- /**
-  *	bfin_data_xfer - Transfer data by PIO
-- *	@adev: device for this I/O
-+ *	@qc: queued command
-  *	@buf: data buffer
-  *	@buflen: buffer length
-  *	@write_data: read/write
-@@ -1151,10 +1151,11 @@ static unsigned char bfin_bmdma_status(s
-  *	Note: Original code is ata_sff_data_xfer().
-  */
- 
--static unsigned int bfin_data_xfer(struct ata_device *dev, unsigned char *buf,
-+static unsigned int bfin_data_xfer(struct ata_queued_cmd *qc,
-+				   unsigned char *buf,
- 				   unsigned int buflen, int rw)
- {
--	struct ata_port *ap = dev->link->ap;
-+	struct ata_port *ap = qc->dev->link->ap;
- 	void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
- 	unsigned int words = buflen >> 1;
- 	unsigned short *buf16 = (u16 *)buf;
---- a/drivers/ata/pata_ep93xx.c
-+++ b/drivers/ata/pata_ep93xx.c
-@@ -474,11 +474,11 @@ static void ep93xx_pata_set_devctl(struc
- }
- 
- /* Note: original code is ata_sff_data_xfer */
--static unsigned int ep93xx_pata_data_xfer(struct ata_device *adev,
-+static unsigned int ep93xx_pata_data_xfer(struct ata_queued_cmd *qc,
- 					  unsigned char *buf,
- 					  unsigned int buflen, int rw)
- {
--	struct ata_port *ap = adev->link->ap;
-+	struct ata_port *ap = qc->dev->link->ap;
- 	struct ep93xx_pata_data *drv_data = ap->host->private_data;
- 	u16 *data = (u16 *)buf;
- 	unsigned int words = buflen >> 1;
---- a/drivers/ata/pata_ixp4xx_cf.c
-+++ b/drivers/ata/pata_ixp4xx_cf.c
-@@ -40,13 +40,13 @@ static int ixp4xx_set_mode(struct ata_li
- 	return 0;
- }
- 
--static unsigned int ixp4xx_mmio_data_xfer(struct ata_device *dev,
-+static unsigned int ixp4xx_mmio_data_xfer(struct ata_queued_cmd *qc,
- 				unsigned char *buf, unsigned int buflen, int rw)
- {
- 	unsigned int i;
- 	unsigned int words = buflen >> 1;
- 	u16 *buf16 = (u16 *) buf;
--	struct ata_port *ap = dev->link->ap;
-+	struct ata_port *ap = qc->dev->link->ap;
- 	void __iomem *mmio = ap->ioaddr.data_addr;
- 	struct ixp4xx_pata_data *data = dev_get_platdata(ap->host->dev);
- 
---- a/drivers/ata/pata_legacy.c
-+++ b/drivers/ata/pata_legacy.c
-@@ -303,11 +303,12 @@ static void pdc20230_set_piomode(struct
- 
- }
- 
--static unsigned int pdc_data_xfer_vlb(struct ata_device *dev,
-+static unsigned int pdc_data_xfer_vlb(struct ata_queued_cmd *qc,
- 			unsigned char *buf, unsigned int buflen, int rw)
- {
--	int slop = buflen & 3;
-+	struct ata_device *dev = qc->dev;
- 	struct ata_port *ap = dev->link->ap;
-+	int slop = buflen & 3;
- 
- 	/* 32bit I/O capable *and* we need to write a whole number of dwords */
- 	if (ata_id_has_dword_io(dev->id) && (slop == 0 || slop == 3)
-@@ -340,7 +341,7 @@ static unsigned int pdc_data_xfer_vlb(st
- 		}
- 		local_irq_restore(flags);
- 	} else
--		buflen = ata_sff_data_xfer_noirq(dev, buf, buflen, rw);
-+		buflen = ata_sff_data_xfer_noirq(qc, buf, buflen, rw);
- 
- 	return buflen;
- }
-@@ -702,9 +703,11 @@ static unsigned int qdi_qc_issue(struct
- 	return ata_sff_qc_issue(qc);
- }
- 
--static unsigned int vlb32_data_xfer(struct ata_device *adev, unsigned char *buf,
--					unsigned int buflen, int rw)
-+static unsigned int vlb32_data_xfer(struct ata_queued_cmd *qc,
-+				    unsigned char *buf,
-+				    unsigned int buflen, int rw)
- {
-+	struct ata_device *adev = qc->dev;
- 	struct ata_port *ap = adev->link->ap;
- 	int slop = buflen & 3;
- 
-@@ -727,7 +730,7 @@ static unsigned int vlb32_data_xfer(stru
- 		}
- 		return (buflen + 3) & ~3;
- 	} else
--		return ata_sff_data_xfer(adev, buf, buflen, rw);
-+		return ata_sff_data_xfer(qc, buf, buflen, rw);
- }
- 
- static int qdi_port(struct platform_device *dev,
---- a/drivers/ata/pata_octeon_cf.c
-+++ b/drivers/ata/pata_octeon_cf.c
-@@ -293,17 +293,17 @@ static void octeon_cf_set_dmamode(struct
- /**
-  * Handle an 8 bit I/O request.
-  *
-- * @dev:        Device to access
-+ * @qc:         Queued command
-  * @buffer:     Data buffer
-  * @buflen:     Length of the buffer.
-  * @rw:         True to write.
-  */
--static unsigned int octeon_cf_data_xfer8(struct ata_device *dev,
-+static unsigned int octeon_cf_data_xfer8(struct ata_queued_cmd *qc,
- 					 unsigned char *buffer,
- 					 unsigned int buflen,
- 					 int rw)
- {
--	struct ata_port *ap		= dev->link->ap;
-+	struct ata_port *ap		= qc->dev->link->ap;
- 	void __iomem *data_addr		= ap->ioaddr.data_addr;
- 	unsigned long words;
- 	int count;
-@@ -332,17 +332,17 @@ static unsigned int octeon_cf_data_xfer8
- /**
-  * Handle a 16 bit I/O request.
-  *
-- * @dev:        Device to access
-+ * @qc:         Queued command
-  * @buffer:     Data buffer
-  * @buflen:     Length of the buffer.
-  * @rw:         True to write.
-  */
--static unsigned int octeon_cf_data_xfer16(struct ata_device *dev,
-+static unsigned int octeon_cf_data_xfer16(struct ata_queued_cmd *qc,
- 					  unsigned char *buffer,
- 					  unsigned int buflen,
- 					  int rw)
- {
--	struct ata_port *ap		= dev->link->ap;
-+	struct ata_port *ap		= qc->dev->link->ap;
- 	void __iomem *data_addr		= ap->ioaddr.data_addr;
- 	unsigned long words;
- 	int count;
---- a/drivers/ata/pata_pcmcia.c
-+++ b/drivers/ata/pata_pcmcia.c
-@@ -90,7 +90,7 @@ static int pcmcia_set_mode_8bit(struct a
- 
- /**
-  *	ata_data_xfer_8bit	 -	Transfer data by 8bit PIO
-- *	@dev: device to target
-+ *	@qc: queued command
-  *	@buf: data buffer
-  *	@buflen: buffer length
-  *	@rw: read/write
-@@ -101,10 +101,10 @@ static int pcmcia_set_mode_8bit(struct a
-  *	Inherited from caller.
-  */
- 
--static unsigned int ata_data_xfer_8bit(struct ata_device *dev,
-+static unsigned int ata_data_xfer_8bit(struct ata_queued_cmd *qc,
- 				unsigned char *buf, unsigned int buflen, int rw)
- {
--	struct ata_port *ap = dev->link->ap;
-+	struct ata_port *ap = qc->dev->link->ap;
- 
- 	if (rw == READ)
- 		ioread8_rep(ap->ioaddr.data_addr, buf, buflen);
---- a/drivers/ata/pata_samsung_cf.c
-+++ b/drivers/ata/pata_samsung_cf.c
-@@ -263,10 +263,10 @@ static u8 pata_s3c_check_altstatus(struc
- /*
-  * pata_s3c_data_xfer - Transfer data by PIO
-  */
--static unsigned int pata_s3c_data_xfer(struct ata_device *dev,
-+static unsigned int pata_s3c_data_xfer(struct ata_queued_cmd *qc,
- 				unsigned char *buf, unsigned int buflen, int rw)
- {
--	struct ata_port *ap = dev->link->ap;
-+	struct ata_port *ap = qc->dev->link->ap;
- 	struct s3c_ide_info *info = ap->host->private_data;
- 	void __iomem *data_addr = ap->ioaddr.data_addr;
- 	unsigned int words = buflen >> 1, i;
---- a/drivers/ata/sata_rcar.c
-+++ b/drivers/ata/sata_rcar.c
-@@ -447,11 +447,11 @@ static void sata_rcar_exec_command(struc
- 	ata_sff_pause(ap);
- }
- 
--static unsigned int sata_rcar_data_xfer(struct ata_device *dev,
-+static unsigned int sata_rcar_data_xfer(struct ata_queued_cmd *qc,
- 					      unsigned char *buf,
- 					      unsigned int buflen, int rw)
- {
--	struct ata_port *ap = dev->link->ap;
-+	struct ata_port *ap = qc->dev->link->ap;
- 	void __iomem *data_addr = ap->ioaddr.data_addr;
- 	unsigned int words = buflen >> 1;
- 
---- a/include/linux/libata.h
-+++ b/include/linux/libata.h
-@@ -964,7 +964,7 @@ struct ata_port_operations {
- 	void (*sff_tf_read)(struct ata_port *ap, struct ata_taskfile *tf);
- 	void (*sff_exec_command)(struct ata_port *ap,
- 				 const struct ata_taskfile *tf);
--	unsigned int (*sff_data_xfer)(struct ata_device *dev,
-+	unsigned int (*sff_data_xfer)(struct ata_queued_cmd *qc,
- 			unsigned char *buf, unsigned int buflen, int rw);
- 	void (*sff_irq_on)(struct ata_port *);
- 	bool (*sff_irq_check)(struct ata_port *);
-@@ -1819,11 +1819,11 @@ extern void ata_sff_tf_load(struct ata_p
- extern void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
- extern void ata_sff_exec_command(struct ata_port *ap,
- 				 const struct ata_taskfile *tf);
--extern unsigned int ata_sff_data_xfer(struct ata_device *dev,
-+extern unsigned int ata_sff_data_xfer(struct ata_queued_cmd *qc,
- 			unsigned char *buf, unsigned int buflen, int rw);
--extern unsigned int ata_sff_data_xfer32(struct ata_device *dev,
-+extern unsigned int ata_sff_data_xfer32(struct ata_queued_cmd *qc,
- 			unsigned char *buf, unsigned int buflen, int rw);
--extern unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev,
-+extern unsigned int ata_sff_data_xfer_noirq(struct ata_queued_cmd *qc,
- 			unsigned char *buf, unsigned int buflen, int rw);
- extern void ata_sff_irq_on(struct ata_port *ap);
- extern void ata_sff_irq_clear(struct ata_port *ap);
diff --git a/patches.renesas/0123-rtc-sh-add-support-for-rza-series.patch b/patches.renesas/0123-rtc-sh-add-support-for-rza-series.patch
deleted file mode 100644
index 796571d2a69b3e..00000000000000
--- a/patches.renesas/0123-rtc-sh-add-support-for-rza-series.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From 5bfac81a8cb4ffbbe4b361ad9939c9bcf2d4c688 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Wed, 29 Mar 2017 10:30:29 -0700
-Subject: [PATCH 123/286] rtc: sh: add support for rza series
-
-This same RTC is used in RZ/A series MPUs, therefore with some slight
-changes, this driver can be reused. Additionally, since ARM architectures
-require Device Tree configurations, device tree support has been added.
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-(cherry picked from commit dab5aec64bf5907f65926675807e4ebe83b3b10e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/rtc/Kconfig  |    4 ++--
- drivers/rtc/rtc-sh.c |   35 +++++++++++++++++++++++++++++------
- 2 files changed, 31 insertions(+), 8 deletions(-)
-
---- a/drivers/rtc/Kconfig
-+++ b/drivers/rtc/Kconfig
-@@ -1301,10 +1301,10 @@ config RTC_DRV_SA1100
- 
- config RTC_DRV_SH
- 	tristate "SuperH On-Chip RTC"
--	depends on SUPERH && HAVE_CLK
-+	depends on SUPERH || ARCH_RENESAS
- 	help
- 	  Say Y here to enable support for the on-chip RTC found in
--	  most SuperH processors.
-+	  most SuperH processors. This RTC is also found in RZ/A SoCs.
- 
- 	  To compile this driver as a module, choose M here: the
- 	  module will be called rtc-sh.
---- a/drivers/rtc/rtc-sh.c
-+++ b/drivers/rtc/rtc-sh.c
-@@ -27,7 +27,15 @@
- #include <linux/log2.h>
- #include <linux/clk.h>
- #include <linux/slab.h>
-+#ifdef CONFIG_SUPERH
- #include <asm/rtc.h>
-+#else
-+/* Default values for RZ/A RTC */
-+#define rtc_reg_size		sizeof(u16)
-+#define RTC_BIT_INVERTED        0	/* no chip bugs */
-+#define RTC_CAP_4_DIGIT_YEAR    (1 << 0)
-+#define RTC_DEF_CAPABILITIES    RTC_CAP_4_DIGIT_YEAR
-+#endif
- 
- #define DRV_NAME	"sh-rtc"
- 
-@@ -570,6 +578,8 @@ static int __init sh_rtc_probe(struct pl
- 	rtc->alarm_irq = platform_get_irq(pdev, 2);
- 
- 	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
-+	if (!res)
-+		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	if (unlikely(res == NULL)) {
- 		dev_err(&pdev->dev, "No IO resource\n");
- 		return -ENOENT;
-@@ -587,12 +597,15 @@ static int __init sh_rtc_probe(struct pl
- 	if (unlikely(!rtc->regbase))
- 		return -EINVAL;
- 
--	clk_id = pdev->id;
--	/* With a single device, the clock id is still "rtc0" */
--	if (clk_id < 0)
--		clk_id = 0;
--
--	snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id);
-+	if (!pdev->dev.of_node) {
-+		clk_id = pdev->id;
-+		/* With a single device, the clock id is still "rtc0" */
-+		if (clk_id < 0)
-+			clk_id = 0;
-+
-+		snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id);
-+	} else
-+		snprintf(clk_name, sizeof(clk_name), "fck");
- 
- 	rtc->clk = devm_clk_get(&pdev->dev, clk_name);
- 	if (IS_ERR(rtc->clk)) {
-@@ -608,6 +621,8 @@ static int __init sh_rtc_probe(struct pl
- 	clk_enable(rtc->clk);
- 
- 	rtc->capabilities = RTC_DEF_CAPABILITIES;
-+
-+#ifdef CONFIG_SUPERH
- 	if (dev_get_platdata(&pdev->dev)) {
- 		struct sh_rtc_platform_info *pinfo =
- 			dev_get_platdata(&pdev->dev);
-@@ -618,6 +633,7 @@ static int __init sh_rtc_probe(struct pl
- 		 */
- 		rtc->capabilities |= pinfo->capabilities;
- 	}
-+#endif
- 
- 	if (rtc->carry_irq <= 0) {
- 		/* register shared periodic/carry/alarm irq */
-@@ -738,10 +754,17 @@ static int sh_rtc_resume(struct device *
- 
- static SIMPLE_DEV_PM_OPS(sh_rtc_pm_ops, sh_rtc_suspend, sh_rtc_resume);
- 
-+static const struct of_device_id sh_rtc_of_match[] = {
-+	{ .compatible = "renesas,sh-rtc", },
-+	{ /* sentinel */ }
-+};
-+MODULE_DEVICE_TABLE(of, sh_rtc_of_match);
-+
- static struct platform_driver sh_rtc_platform_driver = {
- 	.driver		= {
- 		.name	= DRV_NAME,
- 		.pm	= &sh_rtc_pm_ops,
-+		.of_match_table = sh_rtc_of_match,
- 	},
- 	.remove		= __exit_p(sh_rtc_remove),
- };
diff --git a/patches.renesas/0124-arm64-renesas-r8a7796-add-SYS-DMAC-controller-nodes.patch b/patches.renesas/0124-arm64-renesas-r8a7796-add-SYS-DMAC-controller-nodes.patch
deleted file mode 100644
index 7ebf108cd6eb52..00000000000000
--- a/patches.renesas/0124-arm64-renesas-r8a7796-add-SYS-DMAC-controller-nodes.patch
+++ /dev/null
@@ -1,123 +0,0 @@
-From 3f33095e57b1e74e1f9e48f97530d1f9d8935788 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Wed, 14 Sep 2016 18:45:48 +0200
-Subject: [PATCH 124/299] arm64: renesas: r8a7796: add SYS-DMAC controller
- nodes
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 935085209343a0c507e3d9a3e01883b25c8f743e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   99 +++++++++++++++++++++++++++++++
- 1 file changed, 99 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -251,6 +251,105 @@
- 			status = "disabled";
- 		};
- 
-+		dmac0: dma-controller@e6700000 {
-+			compatible = "renesas,dmac-r8a7796",
-+				     "renesas,rcar-dmac";
-+			reg = <0 0xe6700000 0 0x10000>;
-+			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-names = "error",
-+					"ch0", "ch1", "ch2", "ch3",
-+					"ch4", "ch5", "ch6", "ch7",
-+					"ch8", "ch9", "ch10", "ch11",
-+					"ch12", "ch13", "ch14", "ch15";
-+			clocks = <&cpg CPG_MOD 219>;
-+			clock-names = "fck";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			#dma-cells = <1>;
-+			dma-channels = <16>;
-+		};
-+
-+		dmac1: dma-controller@e7300000 {
-+			compatible = "renesas,dmac-r8a7796",
-+				     "renesas,rcar-dmac";
-+			reg = <0 0xe7300000 0 0x10000>;
-+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-names = "error",
-+					"ch0", "ch1", "ch2", "ch3",
-+					"ch4", "ch5", "ch6", "ch7",
-+					"ch8", "ch9", "ch10", "ch11",
-+					"ch12", "ch13", "ch14", "ch15";
-+			clocks = <&cpg CPG_MOD 218>;
-+			clock-names = "fck";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			#dma-cells = <1>;
-+			dma-channels = <16>;
-+		};
-+
-+		dmac2: dma-controller@e7310000 {
-+			compatible = "renesas,dmac-r8a7796",
-+				     "renesas,rcar-dmac";
-+			reg = <0 0xe7310000 0 0x10000>;
-+			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-names = "error",
-+					"ch0", "ch1", "ch2", "ch3",
-+					"ch4", "ch5", "ch6", "ch7",
-+					"ch8", "ch9", "ch10", "ch11",
-+					"ch12", "ch13", "ch14", "ch15";
-+			clocks = <&cpg CPG_MOD 217>;
-+			clock-names = "fck";
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			#dma-cells = <1>;
-+			dma-channels = <16>;
-+		};
-+
- 		sdhi0: sd@ee100000 {
- 			compatible = "renesas,sdhi-r8a7796";
- 			reg = <0 0xee100000 0 0x2000>;
diff --git a/patches.renesas/0124-dt-bindings-rtc-document-the-rtc-sh-bindings.patch b/patches.renesas/0124-dt-bindings-rtc-document-the-rtc-sh-bindings.patch
deleted file mode 100644
index 54fd7ae1927a73..00000000000000
--- a/patches.renesas/0124-dt-bindings-rtc-document-the-rtc-sh-bindings.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 68d9f0eaf76cb8ade7f976925039504881cca766 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Wed, 29 Mar 2017 10:30:30 -0700
-Subject: [PATCH 124/286] dt-bindings: rtc: document the rtc-sh bindings
-
-Add the binding documentation for rtc-sh which is an RTC for
-SuperH and RZ/A SoCs.
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-(cherry picked from commit 04767b9fc2315c90a1e4bfdee883c0cbc122f30f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/rtc/rtc-sh.txt |   28 +++++++++++++++++++++++
- 1 file changed, 28 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/rtc/rtc-sh.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/rtc/rtc-sh.txt
-@@ -0,0 +1,28 @@
-+* Real Time Clock for Renesas SH and ARM SoCs
-+
-+Required properties:
-+- compatible: Should be "renesas,r7s72100-rtc" and "renesas,sh-rtc" as a
-+  fallback.
-+- reg: physical base address and length of memory mapped region.
-+- interrupts: 3 interrupts for alarm, period, and carry.
-+- interrupt-names: The interrupts should be labeled as "alarm", "period", and
-+  "carry".
-+- clocks: The functional clock source for the RTC controller must be listed
-+  first (if exists). Additionally, potential clock counting sources are to be
-+  listed.
-+- clock-names: The functional clock must be labeled as "fck". Other clocks
-+  may be named in accordance to the SoC hardware manuals.
-+
-+
-+Example:
-+rtc: rtc@fcff1000 {
-+	compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc";
-+	reg = <0xfcff1000 0x2e>;
-+	interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING
-+		      GIC_SPI 277 IRQ_TYPE_EDGE_RISING
-+		      GIC_SPI 278 IRQ_TYPE_EDGE_RISING>;
-+	interrupt-names = "alarm", "period", "carry";
-+	clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>,
-+		 <&rtc_x3_clk>, <&extal_clk>;
-+	clock-names = "fck", "rtc_x1", "rtc_x3", "extal";
-+};
diff --git a/patches.renesas/0124-sh_eth-handle-only-enabled-E-MAC-interrupts.patch b/patches.renesas/0124-sh_eth-handle-only-enabled-E-MAC-interrupts.patch
deleted file mode 100644
index 6bf84d206c91d1..00000000000000
--- a/patches.renesas/0124-sh_eth-handle-only-enabled-E-MAC-interrupts.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From f03ad6c2af0ae8d76fd119961d39d553f0a0f2f2 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 4 Jan 2017 15:10:21 +0300
-Subject: [PATCH 124/255] sh_eth: handle only enabled E-MAC interrupts
-
-The driver should only handle the enabled E-MAC interrupts, like it does
-for the E-DMAC interrupts since commit 3893b27345ac ("sh_eth: workaround
-for spurious ECI interrupt"),  so mask ECSR with  ECSIPR when reading it
-in sh_eth_error().
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 4063469971af9611648382559c2d399cce03ae67)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -1549,7 +1549,8 @@ static void sh_eth_error(struct net_devi
- 	u32 mask;
- 
- 	if (intr_status & EESR_ECI) {
--		felic_stat = sh_eth_read(ndev, ECSR);
-+		felic_stat = sh_eth_read(ndev, ECSR) &
-+			     sh_eth_read(ndev, ECSIPR);
- 		sh_eth_write(ndev, felic_stat, ECSR);	/* clear int */
- 		if (felic_stat & ECSR_ICD)
- 			ndev->stats.tx_carrier_errors++;
diff --git a/patches.renesas/0125-arm64-dts-r8a7796-add-I2C-support.patch b/patches.renesas/0125-arm64-dts-r8a7796-add-I2C-support.patch
deleted file mode 100644
index 9d5cca966f179d..00000000000000
--- a/patches.renesas/0125-arm64-dts-r8a7796-add-I2C-support.patch
+++ /dev/null
@@ -1,126 +0,0 @@
-From 1d7766984ea449f7142a53b6ba637e56ab6799fc Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Wed, 26 Oct 2016 16:14:07 +0200
-Subject: [PATCH 125/299] arm64: dts: r8a7796: add I2C support
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fcb008a75702c9932f54e5425e7c12b0ea5cf487)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   94 +++++++++++++++++++++++++++++++
- 1 file changed, 94 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -17,6 +17,16 @@
- 	#address-cells = <2>;
- 	#size-cells = <2>;
- 
-+	aliases {
-+		i2c0 = &i2c0;
-+		i2c1 = &i2c1;
-+		i2c2 = &i2c2;
-+		i2c3 = &i2c3;
-+		i2c4 = &i2c4;
-+		i2c5 = &i2c5;
-+		i2c6 = &i2c6;
-+	};
-+
- 	psci {
- 		compatible = "arm,psci-0.2";
- 		method = "smc";
-@@ -238,6 +248,90 @@
- 			#power-domain-cells = <1>;
- 		};
- 
-+		i2c0: i2c@e6500000 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			compatible = "renesas,i2c-r8a7796";
-+			reg = <0 0xe6500000 0 0x40>;
-+			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 931>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			i2c-scl-internal-delay-ns = <110>;
-+			status = "disabled";
-+		};
-+
-+		i2c1: i2c@e6508000 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			compatible = "renesas,i2c-r8a7796";
-+			reg = <0 0xe6508000 0 0x40>;
-+			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 930>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			i2c-scl-internal-delay-ns = <6>;
-+			status = "disabled";
-+		};
-+
-+		i2c2: i2c@e6510000 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			compatible = "renesas,i2c-r8a7796";
-+			reg = <0 0xe6510000 0 0x40>;
-+			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 929>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			i2c-scl-internal-delay-ns = <6>;
-+			status = "disabled";
-+		};
-+
-+		i2c3: i2c@e66d0000 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			compatible = "renesas,i2c-r8a7796";
-+			reg = <0 0xe66d0000 0 0x40>;
-+			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 928>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			i2c-scl-internal-delay-ns = <110>;
-+			status = "disabled";
-+		};
-+
-+		i2c4: i2c@e66d8000 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			compatible = "renesas,i2c-r8a7796";
-+			reg = <0 0xe66d8000 0 0x40>;
-+			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 927>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			i2c-scl-internal-delay-ns = <110>;
-+			status = "disabled";
-+		};
-+
-+		i2c5: i2c@e66e0000 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			compatible = "renesas,i2c-r8a7796";
-+			reg = <0 0xe66e0000 0 0x40>;
-+			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 919>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			i2c-scl-internal-delay-ns = <110>;
-+			status = "disabled";
-+		};
-+
-+		i2c6: i2c@e66e8000 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			compatible = "renesas,i2c-r8a7796";
-+			reg = <0 0xe66e8000 0 0x40>;
-+			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 918>;
-+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			i2c-scl-internal-delay-ns = <6>;
-+			status = "disabled";
-+		};
-+
- 		scif2: serial@e6e88000 {
- 			compatible = "renesas,scif-r8a7796",
- 				     "renesas,rcar-gen3-scif", "renesas,scif";
diff --git a/patches.renesas/0125-rtc-sh-mark-PM-functions-as-unused.patch b/patches.renesas/0125-rtc-sh-mark-PM-functions-as-unused.patch
deleted file mode 100644
index e2ff000d174714..00000000000000
--- a/patches.renesas/0125-rtc-sh-mark-PM-functions-as-unused.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 36115074d0ca9886383cf2d948a17fd685bd1806 Mon Sep 17 00:00:00 2001
-From: Arnd Bergmann <arnd@arndb.de>
-Date: Wed, 19 Apr 2017 19:52:43 +0200
-Subject: [PATCH 125/286] rtc: sh: mark PM functions as unused
-
-The sh_rtc_set_irq_wake() function is only called from the suspend/resume handlers
-that may be hidden, causing a harmless warning:
-
-drivers/rtc/rtc-sh.c:724:13: error: 'sh_rtc_set_irq_wake' defined but not used [-Werror=unused-function]
- static void sh_rtc_set_irq_wake(struct device *dev, int enabled)
-
-The most reliable way to avoid the warning is to remove the existing #ifdef
-and mark the two functions as __maybe_unused so the compiler can silently
-drop all three when there is no reference.
-
-Fixes: dab5aec64bf5 ("rtc: sh: add support for rza series")
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-(cherry picked from commit 5d05e81516cfe7606ee0cd8278fe225314dccfbe)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/rtc/rtc-sh.c |    6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
---- a/drivers/rtc/rtc-sh.c
-+++ b/drivers/rtc/rtc-sh.c
-@@ -734,8 +734,7 @@ static void sh_rtc_set_irq_wake(struct d
- 	}
- }
- 
--#ifdef CONFIG_PM_SLEEP
--static int sh_rtc_suspend(struct device *dev)
-+static int __maybe_unused sh_rtc_suspend(struct device *dev)
- {
- 	if (device_may_wakeup(dev))
- 		sh_rtc_set_irq_wake(dev, 1);
-@@ -743,14 +742,13 @@ static int sh_rtc_suspend(struct device
- 	return 0;
- }
- 
--static int sh_rtc_resume(struct device *dev)
-+static int __maybe_unused sh_rtc_resume(struct device *dev)
- {
- 	if (device_may_wakeup(dev))
- 		sh_rtc_set_irq_wake(dev, 0);
- 
- 	return 0;
- }
--#endif
- 
- static SIMPLE_DEV_PM_OPS(sh_rtc_pm_ops, sh_rtc_suspend, sh_rtc_resume);
- 
diff --git a/patches.renesas/0125-sh_eth-no-need-for-else-after-goto.patch b/patches.renesas/0125-sh_eth-no-need-for-else-after-goto.patch
deleted file mode 100644
index a7304feec6c3b2..00000000000000
--- a/patches.renesas/0125-sh_eth-no-need-for-else-after-goto.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 955ebb247da75101463bbe090d3362d6ce26ab0a Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 4 Jan 2017 15:10:50 +0300
-Subject: [PATCH 125/255] sh_eth: no need for *else* after *goto*
-
-Well, checkpatch.pl complains about *else* after *return* and *break* but
-not after *goto*... and it probably should have complained about the code
-in sh_eth_error().  Win couple LoCs by removing that *else*. :-)
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 1940f240769ada7efe9d459991fe5dd80db3771a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |   10 ++++------
- 1 file changed, 4 insertions(+), 6 deletions(-)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -1556,13 +1556,11 @@ static void sh_eth_error(struct net_devi
- 			ndev->stats.tx_carrier_errors++;
- 		if (felic_stat & ECSR_LCHNG) {
- 			/* Link Changed */
--			if (mdp->cd->no_psr || mdp->no_ether_link) {
-+			if (mdp->cd->no_psr || mdp->no_ether_link)
- 				goto ignore_link;
--			} else {
--				link_stat = (sh_eth_read(ndev, PSR));
--				if (mdp->ether_link_active_low)
--					link_stat = ~link_stat;
--			}
-+			link_stat = sh_eth_read(ndev, PSR);
-+			if (mdp->ether_link_active_low)
-+				link_stat = ~link_stat;
- 			if (!(link_stat & PHY_ST_LINK)) {
- 				sh_eth_rcv_snd_disable(ndev);
- 			} else {
diff --git a/patches.renesas/0126-arm64-dts-r8a7796-Enable-I2C-DMA.patch b/patches.renesas/0126-arm64-dts-r8a7796-Enable-I2C-DMA.patch
deleted file mode 100644
index e393cfa98685d4..00000000000000
--- a/patches.renesas/0126-arm64-dts-r8a7796-Enable-I2C-DMA.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 7ae8c361d05a7a92fd788794c475f913d055e8d1 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Wed, 26 Oct 2016 16:14:08 +0200
-Subject: [PATCH 126/299] arm64: dts: r8a7796: Enable I2C DMA
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c758f4e333ee7473056484f7ea2294cb1e58c9d5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |   17 +++++++++++++++++
- 1 file changed, 17 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -256,6 +256,9 @@
- 			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 931>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			dmas = <&dmac1 0x91>, <&dmac1 0x90>,
-+			       <&dmac2 0x91>, <&dmac2 0x90>;
-+			dma-names = "tx", "rx", "tx", "rx";
- 			i2c-scl-internal-delay-ns = <110>;
- 			status = "disabled";
- 		};
-@@ -268,6 +271,9 @@
- 			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 930>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			dmas = <&dmac1 0x93>, <&dmac1 0x92>,
-+			       <&dmac2 0x93>, <&dmac2 0x92>;
-+			dma-names = "tx", "rx", "tx", "rx";
- 			i2c-scl-internal-delay-ns = <6>;
- 			status = "disabled";
- 		};
-@@ -280,6 +286,9 @@
- 			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 929>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			dmas = <&dmac1 0x95>, <&dmac1 0x94>,
-+			       <&dmac2 0x95>, <&dmac2 0x94>;
-+			dma-names = "tx", "rx", "tx", "rx";
- 			i2c-scl-internal-delay-ns = <6>;
- 			status = "disabled";
- 		};
-@@ -292,6 +301,8 @@
- 			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 928>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			dmas = <&dmac0 0x97>, <&dmac0 0x96>;
-+			dma-names = "tx", "rx";
- 			i2c-scl-internal-delay-ns = <110>;
- 			status = "disabled";
- 		};
-@@ -304,6 +315,8 @@
- 			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 927>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			dmas = <&dmac0 0x99>, <&dmac0 0x98>;
-+			dma-names = "tx", "rx";
- 			i2c-scl-internal-delay-ns = <110>;
- 			status = "disabled";
- 		};
-@@ -316,6 +329,8 @@
- 			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 919>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
-+			dma-names = "tx", "rx";
- 			i2c-scl-internal-delay-ns = <110>;
- 			status = "disabled";
- 		};
-@@ -328,6 +343,8 @@
- 			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 918>;
- 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
-+			dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
-+			dma-names = "tx", "rx";
- 			i2c-scl-internal-delay-ns = <6>;
- 			status = "disabled";
- 		};
diff --git a/patches.renesas/0126-serial-sh-sci-Fix-hang-in-sci_reset.patch b/patches.renesas/0126-serial-sh-sci-Fix-hang-in-sci_reset.patch
deleted file mode 100644
index 9b5009274ad850..00000000000000
--- a/patches.renesas/0126-serial-sh-sci-Fix-hang-in-sci_reset.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 5300c730b0d6a6dfdbf92bc9db438f603e5d2a67 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 28 Mar 2017 11:13:44 +0200
-Subject: [PATCH 126/286] serial: sh-sci: Fix hang in sci_reset()
-
-When the .set_termios() callback resets the UART, it first waits (busy
-loops) until all characters in the transmit FIFO have been transmitted,
-to prevent a port configuration change from impacting these characters.
-
-However, if the UART has dedicated RTS/CTS hardware flow control
-enabled, these characters may have been stuck in the FIFO due to CTS not
-being asserted by the remote side.
-
-  - When a new user opens the port, .set_termios() is called while
-    transmission is still disabled, leading to an infinite loop:
-
-	NMI watchdog: BUG: soft lockup - CPU#0 stuck for 22s!
-
-  - When an active user changes port configuration without waiting for
-    the draining of the transmit FIFO, this may also block indefinitely,
-    until CTS is asserted by the remote side.
-
-This has been observed with SCIFA (on r8a7740/armadillo), and SCIFB and
-HSCIF (on r8a7791/koelsch).
-
-To fix this, remove the code that waits for the draining of the transmit
-FIFO.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit e37f712f760478a3bce8a68b8d85b5b0bf6642eb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |    4 ----
- 1 file changed, 4 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -2172,10 +2172,6 @@ static void sci_reset(struct uart_port *
- 	unsigned int status;
- 	struct sci_port *s = to_sci_port(port);
- 
--	do {
--		status = serial_port_in(port, SCxSR);
--	} while (!(status & SCxSR_TEND(port)));
--
- 	serial_port_out(port, SCSCR, 0x00);	/* TE=0, RE=0, CKE1=0 */
- 
- 	reg = sci_getreg(port, SCFCR);
diff --git a/patches.renesas/0126-sh_eth-factor-out-sh_eth_emac_interrupt.patch b/patches.renesas/0126-sh_eth-factor-out-sh_eth_emac_interrupt.patch
deleted file mode 100644
index 6fad390c19ab0a..00000000000000
--- a/patches.renesas/0126-sh_eth-factor-out-sh_eth_emac_interrupt.patch
+++ /dev/null
@@ -1,240 +0,0 @@
-From c39b1f565ccbaedd3a0ba47e7b6a23bc9a4cc1d3 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 4 Jan 2017 15:11:21 +0300
-Subject: [PATCH 126/255] sh_eth: factor out sh_eth_emac_interrupt()
-
-The E-MAC interrupt (EESR.ECI) is not always caused  by an error condition,
-so  it really shouldn't be handled by sh_eth_error(). Factor out the E-MAC
-interrupt handler, sh_eth_emac_interrupt(),  removing the ECI bit from the
-EESR's values throughout the driver...
-
-Update Cogent Embedded's copyright and clean up the whitespace in Renesas'
-copyright, while at it...
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 9b39f05ce8e0cf2857c37b72c0b3b92e6a026ed5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |  102 +++++++++++++++++-----------------
- drivers/net/ethernet/renesas/sh_eth.h |    2 
- 2 files changed, 53 insertions(+), 51 deletions(-)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -1,9 +1,9 @@
- /*  SuperH Ethernet device driver
-  *
-- *  Copyright (C) 2014  Renesas Electronics Corporation
-+ *  Copyright (C) 2014 Renesas Electronics Corporation
-  *  Copyright (C) 2006-2012 Nobuhiro Iwamatsu
-  *  Copyright (C) 2008-2014 Renesas Solutions Corp.
-- *  Copyright (C) 2013-2016 Cogent Embedded, Inc.
-+ *  Copyright (C) 2013-2017 Cogent Embedded, Inc.
-  *  Copyright (C) 2014 Codethink Limited
-  *
-  *  This program is free software; you can redistribute it and/or modify it
-@@ -523,7 +523,7 @@ static struct sh_eth_cpu_data r7s72100_d
- 	.tx_check	= EESR_TC1 | EESR_FTC,
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
- 			  EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE |
--			  EESR_TDE | EESR_ECI,
-+			  EESR_TDE,
- 	.fdr_value	= 0x0000070f,
- 
- 	.no_psr		= 1,
-@@ -562,7 +562,7 @@ static struct sh_eth_cpu_data r8a7740_da
- 	.tx_check	= EESR_TC1 | EESR_FTC,
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
- 			  EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE |
--			  EESR_TDE | EESR_ECI,
-+			  EESR_TDE,
- 	.fdr_value	= 0x0000070f,
- 
- 	.apr		= 1,
-@@ -608,8 +608,7 @@ static struct sh_eth_cpu_data r8a777x_da
- 
- 	.tx_check	= EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
- 	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
--			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE |
--			  EESR_ECI,
-+			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE,
- 	.fdr_value	= 0x00000f0f,
- 
- 	.apr		= 1,
-@@ -631,8 +630,7 @@ static struct sh_eth_cpu_data r8a779x_da
- 
- 	.tx_check	= EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
- 	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
--			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE |
--			  EESR_ECI,
-+			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE,
- 	.fdr_value	= 0x00000f0f,
- 
- 	.trscer_err_mask = DESC_I_RINT8,
-@@ -672,8 +670,7 @@ static struct sh_eth_cpu_data sh7724_dat
- 
- 	.tx_check	= EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
- 	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
--			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE |
--			  EESR_ECI,
-+			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE,
- 
- 	.apr		= 1,
- 	.mpr		= 1,
-@@ -708,8 +705,7 @@ static struct sh_eth_cpu_data sh7757_dat
- 
- 	.tx_check	= EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
- 	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
--			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE |
--			  EESR_ECI,
-+			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE,
- 
- 	.irq_flags	= IRQF_SHARED,
- 	.apr		= 1,
-@@ -777,7 +773,7 @@ static struct sh_eth_cpu_data sh7757_dat
- 	.tx_check	= EESR_TC1 | EESR_FTC,
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
- 			  EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE |
--			  EESR_TDE | EESR_ECI,
-+			  EESR_TDE,
- 	.fdr_value	= 0x0000072f,
- 
- 	.irq_flags	= IRQF_SHARED,
-@@ -808,7 +804,7 @@ static struct sh_eth_cpu_data sh7734_dat
- 	.tx_check	= EESR_TC1 | EESR_FTC,
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
- 			  EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE |
--			  EESR_TDE | EESR_ECI,
-+			  EESR_TDE,
- 
- 	.apr		= 1,
- 	.mpr		= 1,
-@@ -837,8 +833,7 @@ static struct sh_eth_cpu_data sh7763_dat
- 
- 	.tx_check	= EESR_TC1 | EESR_FTC,
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
--			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE |
--			  EESR_ECI,
-+			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE,
- 
- 	.apr		= 1,
- 	.mpr		= 1,
-@@ -1540,43 +1535,44 @@ static void sh_eth_rcv_snd_enable(struct
- 	sh_eth_modify(ndev, ECMR, ECMR_RE | ECMR_TE, ECMR_RE | ECMR_TE);
- }
- 
--/* error control function */
--static void sh_eth_error(struct net_device *ndev, u32 intr_status)
-+/* E-MAC interrupt handler */
-+static void sh_eth_emac_interrupt(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
- 	u32 felic_stat;
- 	u32 link_stat;
--	u32 mask;
- 
--	if (intr_status & EESR_ECI) {
--		felic_stat = sh_eth_read(ndev, ECSR) &
--			     sh_eth_read(ndev, ECSIPR);
--		sh_eth_write(ndev, felic_stat, ECSR);	/* clear int */
--		if (felic_stat & ECSR_ICD)
--			ndev->stats.tx_carrier_errors++;
--		if (felic_stat & ECSR_LCHNG) {
--			/* Link Changed */
--			if (mdp->cd->no_psr || mdp->no_ether_link)
--				goto ignore_link;
--			link_stat = sh_eth_read(ndev, PSR);
--			if (mdp->ether_link_active_low)
--				link_stat = ~link_stat;
--			if (!(link_stat & PHY_ST_LINK)) {
--				sh_eth_rcv_snd_disable(ndev);
--			} else {
--				/* Link Up */
--				sh_eth_modify(ndev, EESIPR, DMAC_M_ECI, 0);
--				/* clear int */
--				sh_eth_modify(ndev, ECSR, 0, 0);
--				sh_eth_modify(ndev, EESIPR, DMAC_M_ECI,
--					      DMAC_M_ECI);
--				/* enable tx and rx */
--				sh_eth_rcv_snd_enable(ndev);
--			}
-+	felic_stat = sh_eth_read(ndev, ECSR) & sh_eth_read(ndev, ECSIPR);
-+	sh_eth_write(ndev, felic_stat, ECSR);	/* clear int */
-+	if (felic_stat & ECSR_ICD)
-+		ndev->stats.tx_carrier_errors++;
-+	if (felic_stat & ECSR_LCHNG) {
-+		/* Link Changed */
-+		if (mdp->cd->no_psr || mdp->no_ether_link)
-+			return;
-+		link_stat = sh_eth_read(ndev, PSR);
-+		if (mdp->ether_link_active_low)
-+			link_stat = ~link_stat;
-+		if (!(link_stat & PHY_ST_LINK)) {
-+			sh_eth_rcv_snd_disable(ndev);
-+		} else {
-+			/* Link Up */
-+			sh_eth_modify(ndev, EESIPR, DMAC_M_ECI, 0);
-+			/* clear int */
-+			sh_eth_modify(ndev, ECSR, 0, 0);
-+			sh_eth_modify(ndev, EESIPR, DMAC_M_ECI, DMAC_M_ECI);
-+			/* enable tx and rx */
-+			sh_eth_rcv_snd_enable(ndev);
- 		}
- 	}
-+}
-+
-+/* error control function */
-+static void sh_eth_error(struct net_device *ndev, u32 intr_status)
-+{
-+	struct sh_eth_private *mdp = netdev_priv(ndev);
-+	u32 mask;
- 
--ignore_link:
- 	if (intr_status & EESR_TWB) {
- 		/* Unused write back interrupt */
- 		if (intr_status & EESR_TABT) {	/* Transmit Abort int */
-@@ -1657,14 +1653,16 @@ static irqreturn_t sh_eth_interrupt(int
- 
- 	/* Get interrupt status */
- 	intr_status = sh_eth_read(ndev, EESR);
--	/* Mask it with the interrupt mask, forcing ECI interrupt to be always
--	 * enabled since it's the one that  comes thru regardless of the mask,
--	 * and we need to fully handle it in sh_eth_error() in order to quench
--	 * it as it doesn't get cleared by just writing 1 to the ECI bit...
-+	/* Mask it with the interrupt mask, forcing ECI interrupt  to be always
-+	 * enabled since it's the one that  comes  thru regardless of the mask,
-+	 * and  we need to fully handle it  in sh_eth_emac_interrupt() in order
-+	 * to quench it as it doesn't get cleared by just writing 1 to the  ECI
-+	 * bit...
- 	 */
- 	intr_enable = sh_eth_read(ndev, EESIPR);
- 	intr_status &= intr_enable | DMAC_M_ECI;
--	if (intr_status & (EESR_RX_CHECK | cd->tx_check | cd->eesr_err_check))
-+	if (intr_status & (EESR_RX_CHECK | cd->tx_check | EESR_ECI |
-+			   cd->eesr_err_check))
- 		ret = IRQ_HANDLED;
- 	else
- 		goto out;
-@@ -1696,6 +1694,10 @@ static irqreturn_t sh_eth_interrupt(int
- 		netif_wake_queue(ndev);
- 	}
- 
-+	/* E-MAC interrupt */
-+	if (intr_status & EESR_ECI)
-+		sh_eth_emac_interrupt(ndev);
-+
- 	if (intr_status & cd->eesr_err_check) {
- 		/* Clear error interrupts */
- 		sh_eth_write(ndev, intr_status & cd->eesr_err_check, EESR);
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -265,7 +265,7 @@ enum EESR_BIT {
- 				 EESR_RTO)
- #define DEFAULT_EESR_ERR_CHECK	(EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE | \
- 				 EESR_RDE | EESR_RFRMER | EESR_ADE | \
--				 EESR_TFE | EESR_TDE | EESR_ECI)
-+				 EESR_TFE | EESR_TDE)
- 
- /* EESIPR */
- enum DMAC_IM_BIT {
diff --git a/patches.renesas/0127-arm64-dts-r8a7796-salvator-x-enable-I2C.patch b/patches.renesas/0127-arm64-dts-r8a7796-salvator-x-enable-I2C.patch
deleted file mode 100644
index afd75b85a889c2..00000000000000
--- a/patches.renesas/0127-arm64-dts-r8a7796-salvator-x-enable-I2C.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 63bcd71ee2f9cbf16b7a7adea57b1b62dff7d5f8 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Wed, 26 Oct 2016 16:14:09 +0200
-Subject: [PATCH 127/299] arm64: dts: r8a7796: salvator-x: enable I2C
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 20b93fbb08bd38f094186f604e4e5bdafe23f817)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts |   12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
-@@ -111,6 +111,11 @@
- 		function = "scif_clk";
- 	};
- 
-+	i2c2_pins: i2c2 {
-+		groups = "i2c2_a";
-+		function = "i2c2";
-+	};
-+
- 	sdhi0_pins: sd0 {
- 		groups = "sdhi0_data4", "sdhi0_ctrl";
- 		function = "sdhi0";
-@@ -208,6 +213,13 @@
- 	status = "okay";
- };
- 
-+&i2c2 {
-+	pinctrl-0 = <&i2c2_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+};
-+
- &wdt0 {
- 	timeout-sec = <60>;
- 	status = "okay";
diff --git a/patches.renesas/0127-serial-sh-sci-Fix-late-enablement-of-AUTORTS.patch b/patches.renesas/0127-serial-sh-sci-Fix-late-enablement-of-AUTORTS.patch
deleted file mode 100644
index 80a3507dfe0ade..00000000000000
--- a/patches.renesas/0127-serial-sh-sci-Fix-late-enablement-of-AUTORTS.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From a7731cf682c4d2cac37ded614ec428dba109269d Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 28 Mar 2017 11:13:45 +0200
-Subject: [PATCH 127/286] serial: sh-sci: Fix late enablement of AUTORTS
-
-When changing hardware control flow for a UART with dedicated RTS/CTS
-pins, the new AUTORTS state is not immediately reflected in the
-hardware, but only when RTS is raised.  However, the serial core does
-not call .set_mctrl() after .set_termios(), hence AUTORTS may only
-become effective when the port is closed, and reopened later.
-Note that this problem does not happen when manually using stty to
-change CRTSCTS, as AUTORTS will work fine on next open.
-
-To fix this, call .set_mctrl() from .set_termios() when dedicated
-RTS/CTS pins are present, to refresh the AUTORTS or RTS state.
-This is similar to what other drivers supporting AUTORTS do (e.g.
-omap-serial).
-
-Reported-by: Baumann, Christoph (C.) <cbaumann@visteon.com>
-Fixes: 33f50ffc253854cf ("serial: sh-sci: Fix support for hardware-assisted RTS/CTS")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 5f76895e4c712b1b5af450cf344389b8c53ac2c2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -2385,6 +2385,10 @@ done:
- 
- 		serial_port_out(port, SCFCR, ctrl);
- 	}
-+	if (port->flags & UPF_HARD_FLOW) {
-+		/* Refresh (Auto) RTS */
-+		sci_set_mctrl(port, port->mctrl);
-+	}
- 
- 	scr_val |= SCSCR_RE | SCSCR_TE |
- 		   (s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0));
diff --git a/patches.renesas/0127-sh_eth-get-rid-of-sh_eth_cpu_data-shift_rd0.patch b/patches.renesas/0127-sh_eth-get-rid-of-sh_eth_cpu_data-shift_rd0.patch
deleted file mode 100644
index 7c11592a402527..00000000000000
--- a/patches.renesas/0127-sh_eth-get-rid-of-sh_eth_cpu_data-shift_rd0.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 0e0771aeae67214186e2af31366ce805b88a19c3 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sat, 7 Jan 2017 00:02:52 +0300
-Subject: [PATCH 127/255] sh_eth: get rid of 'sh_eth_cpu_data::shift_rd0'
-
-After checking all  the available manuals,  I have enough information to
-conclude  that the 'shift_rd0' flag is only relevant  for the Ether cores
-supporting so called "intelligent checksum" (and hence having CSMR) which
-is indicated  by the 'hw_crc' flag.  Since  all the relevant SoCs now have
-both these flags set, we can  at last  get  rid of the former flag...
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 2e653ff0758ae8e47499d588666eb77f6a0fc755)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |    5 +----
- drivers/net/ethernet/renesas/sh_eth.h |    1 -
- 2 files changed, 1 insertion(+), 5 deletions(-)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -537,7 +537,6 @@ static struct sh_eth_cpu_data r7s72100_d
- 	.no_ade		= 1,
- 	.hw_crc		= 1,
- 	.tsu		= 1,
--	.shift_rd0	= 1,
- };
- 
- static void sh_eth_chip_reset_r8a7740(struct net_device *ndev)
-@@ -577,7 +576,6 @@ static struct sh_eth_cpu_data r8a7740_da
- 	.hw_crc		= 1,
- 	.tsu		= 1,
- 	.select_mii	= 1,
--	.shift_rd0	= 1,
- };
- 
- /* There is CPU dependent code */
-@@ -816,7 +814,6 @@ static struct sh_eth_cpu_data sh7734_dat
- 	.tsu		= 1,
- 	.hw_crc		= 1,
- 	.select_mii	= 1,
--	.shift_rd0	= 1,
- };
- 
- /* SH7763 */
-@@ -1428,7 +1425,7 @@ static int sh_eth_rx(struct net_device *
- 		 * the RFS bits are from bit 25 to bit 16. So, the
- 		 * driver needs right shifting by 16.
- 		 */
--		if (mdp->cd->shift_rd0)
-+		if (mdp->cd->hw_crc)
- 			desc_status >>= 16;
- 
- 		skb = mdp->rx_skbuff[entry];
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -490,7 +490,6 @@ struct sh_eth_cpu_data {
- 	unsigned no_ade:1;	/* E-DMAC DO NOT have ADE bit in EESR */
- 	unsigned hw_crc:1;	/* E-DMAC have CSMR */
- 	unsigned select_mii:1;	/* EtherC have RMII_MII (MII select register) */
--	unsigned shift_rd0:1;	/* shift Rx descriptor word 0 right by 16 */
- 	unsigned rmiimode:1;	/* EtherC has RMIIMODE register */
- 	unsigned rtrate:1;	/* EtherC has RTRATE register */
- };
diff --git a/patches.renesas/0128-arm64-dts-h3ulcb-update-documentation-with-official-.patch b/patches.renesas/0128-arm64-dts-h3ulcb-update-documentation-with-official-.patch
deleted file mode 100644
index 45f29146ec481a..00000000000000
--- a/patches.renesas/0128-arm64-dts-h3ulcb-update-documentation-with-official-.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From e5978b03ec7323f34918ffb62cbf54fca0d61f36 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 3 Nov 2016 21:04:44 +0300
-Subject: [PATCH 128/299] arm64: dts: h3ulcb: update documentation with
- official board name
-
-This updates H3ULCB Device tree bindings Documentation with
-official board name
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d65e3e4a7b31328522642882fd8bb9bde11e77d8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/arm/shmobile.txt |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/Documentation/devicetree/bindings/arm/shmobile.txt
-+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
-@@ -49,7 +49,7 @@ Boards:
-     compatible = "renesas,genmai", "renesas,r7s72100"
-   - Gose
-     compatible = "renesas,gose", "renesas,r8a7793"
--  - H3ULCB (RTP0RC7795SKB00010S)
-+  - H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKB00010S)
-     compatible = "renesas,h3ulcb", "renesas,r8a7795";
-   - Henninger
-     compatible = "renesas,henninger", "renesas,r8a7791"
diff --git a/patches.renesas/0128-serial-sh-sci-Fix-AUTO-RTS-in-sci_init_pins.patch b/patches.renesas/0128-serial-sh-sci-Fix-AUTO-RTS-in-sci_init_pins.patch
deleted file mode 100644
index e2e3491f421fae..00000000000000
--- a/patches.renesas/0128-serial-sh-sci-Fix-AUTO-RTS-in-sci_init_pins.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From f0abb3a9917717e58b130674f099c6493c46624b Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 28 Mar 2017 11:13:46 +0200
-Subject: [PATCH 128/286] serial: sh-sci: Fix (AUTO)RTS in sci_init_pins()
-
-If a UART has dedicated RTS/CTS pins, and hardware control flow is
-disabled (or AUTORTS is not yet effective), changing any serial port
-configuration deasserts RTS, as .set_termios() calls sci_init_pins().
-
-To fix this, consider the current (AUTO)RTS state when (re)initializing
-the pins.  Note that for SCIFA/SCIFB, AUTORTS needs explicit
-configuration of the RTS# pin function, while (H)SCIF handles this
-automatically.
-
-Fixes: d2b9775d795ec05f ("serial: sh-sci: Correct pin initialization on (H)SCIF")
-Fixes: e9d7a45a03991349 ("serial: sh-sci: Add pin initialization for SCIFA/SCIFB")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit cfa6eb239154315e6efcdda1d929e024097f927b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |   25 +++++++++++++++++++------
- 1 file changed, 19 insertions(+), 6 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -683,24 +683,37 @@ static void sci_init_pins(struct uart_po
- 	}
- 
- 	if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
-+		u16 data = serial_port_in(port, SCPDR);
- 		u16 ctrl = serial_port_in(port, SCPCR);
- 
- 		/* Enable RXD and TXD pin functions */
- 		ctrl &= ~(SCPCR_RXDC | SCPCR_TXDC);
- 		if (to_sci_port(port)->has_rtscts) {
--			/* RTS# is output, driven 1 */
--			ctrl |= SCPCR_RTSC;
--			serial_port_out(port, SCPDR,
--				serial_port_in(port, SCPDR) | SCPDR_RTSD);
-+			/* RTS# is output, active low, unless autorts */
-+			if (!(port->mctrl & TIOCM_RTS)) {
-+				ctrl |= SCPCR_RTSC;
-+				data |= SCPDR_RTSD;
-+			} else if (!s->autorts) {
-+				ctrl |= SCPCR_RTSC;
-+				data &= ~SCPDR_RTSD;
-+			} else {
-+				/* Enable RTS# pin function */
-+				ctrl &= ~SCPCR_RTSC;
-+			}
- 			/* Enable CTS# pin function */
- 			ctrl &= ~SCPCR_CTSC;
- 		}
-+		serial_port_out(port, SCPDR, data);
- 		serial_port_out(port, SCPCR, ctrl);
- 	} else if (sci_getreg(port, SCSPTR)->size) {
- 		u16 status = serial_port_in(port, SCSPTR);
- 
--		/* RTS# is output, driven 1 */
--		status |= SCSPTR_RTSIO | SCSPTR_RTSDT;
-+		/* RTS# is always output; and active low, unless autorts */
-+		status |= SCSPTR_RTSIO;
-+		if (!(port->mctrl & TIOCM_RTS))
-+			status |= SCSPTR_RTSDT;
-+		else if (!s->autorts)
-+			status &= ~SCSPTR_RTSDT;
- 		/* CTS# and SCK are inputs */
- 		status &= ~(SCSPTR_CTSIO | SCSPTR_SCKIO);
- 		serial_port_out(port, SCSPTR, status);
diff --git a/patches.renesas/0128-sh_eth-rename-sh_eth_cpu_data-hw_crc.patch b/patches.renesas/0128-sh_eth-rename-sh_eth_cpu_data-hw_crc.patch
deleted file mode 100644
index 5c31e2af0c7d5d..00000000000000
--- a/patches.renesas/0128-sh_eth-rename-sh_eth_cpu_data-hw_crc.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From 540b4904331b6a08d85b36a258bda411444dd77f Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sat, 7 Jan 2017 00:03:37 +0300
-Subject: [PATCH 128/255] sh_eth: rename 'sh_eth_cpu_data::hw_crc'
-
-The 'struct sh_eth_cpu_data' field indicating the "intelligent checksum"
-support was misnamed 'hw_crc' -- rename it to 'hw_checksum'.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 62e04b7e0e3c2926bdcbcced9feb22478258d0c3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |   12 ++++++------
- drivers/net/ethernet/renesas/sh_eth.h |    2 +-
- 2 files changed, 7 insertions(+), 7 deletions(-)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -535,7 +535,7 @@ static struct sh_eth_cpu_data r7s72100_d
- 	.rpadir_value   = 2 << 16,
- 	.no_trimd	= 1,
- 	.no_ade		= 1,
--	.hw_crc		= 1,
-+	.hw_checksum	= 1,
- 	.tsu		= 1,
- };
- 
-@@ -573,7 +573,7 @@ static struct sh_eth_cpu_data r8a7740_da
- 	.rpadir_value   = 2 << 16,
- 	.no_trimd	= 1,
- 	.no_ade		= 1,
--	.hw_crc		= 1,
-+	.hw_checksum	= 1,
- 	.tsu		= 1,
- 	.select_mii	= 1,
- };
-@@ -812,7 +812,7 @@ static struct sh_eth_cpu_data sh7734_dat
- 	.no_trimd	= 1,
- 	.no_ade		= 1,
- 	.tsu		= 1,
--	.hw_crc		= 1,
-+	.hw_checksum	= 1,
- 	.select_mii	= 1,
- };
- 
-@@ -928,7 +928,7 @@ static int sh_eth_reset(struct net_devic
- 		sh_eth_write(ndev, 0x0, RDFFR);
- 
- 		/* Reset HW CRC register */
--		if (mdp->cd->hw_crc)
-+		if (mdp->cd->hw_checksum)
- 			sh_eth_write(ndev, 0x0, CSMR);
- 
- 		/* Select MII mode */
-@@ -1425,7 +1425,7 @@ static int sh_eth_rx(struct net_device *
- 		 * the RFS bits are from bit 25 to bit 16. So, the
- 		 * driver needs right shifting by 16.
- 		 */
--		if (mdp->cd->hw_crc)
-+		if (mdp->cd->hw_checksum)
- 			desc_status >>= 16;
- 
- 		skb = mdp->rx_skbuff[entry];
-@@ -1980,7 +1980,7 @@ static size_t __sh_eth_get_regs(struct n
- 	add_reg(MAFCR);
- 	if (cd->rtrate)
- 		add_reg(RTRATE);
--	if (cd->hw_crc)
-+	if (cd->hw_checksum)
- 		add_reg(CSMR);
- 	if (cd->select_mii)
- 		add_reg(RMII_MII);
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -488,7 +488,7 @@ struct sh_eth_cpu_data {
- 	unsigned rpadir:1;	/* E-DMAC have RPADIR */
- 	unsigned no_trimd:1;	/* E-DMAC DO NOT have TRIMD */
- 	unsigned no_ade:1;	/* E-DMAC DO NOT have ADE bit in EESR */
--	unsigned hw_crc:1;	/* E-DMAC have CSMR */
-+	unsigned hw_checksum:1;	/* E-DMAC has CSMR */
- 	unsigned select_mii:1;	/* EtherC have RMII_MII (MII select register) */
- 	unsigned rmiimode:1;	/* EtherC has RMIIMODE register */
- 	unsigned rtrate:1;	/* EtherC has RTRATE register */
diff --git a/patches.renesas/0129-arm64-dts-h3ulcb-update-header.patch b/patches.renesas/0129-arm64-dts-h3ulcb-update-header.patch
deleted file mode 100644
index 9e87b6bc855a8b..00000000000000
--- a/patches.renesas/0129-arm64-dts-h3ulcb-update-header.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-From 98d2ad8570c0f78dbc8a2f5a1f1c02007ea746ab Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 3 Nov 2016 21:04:54 +0300
-Subject: [PATCH 129/299] arm64: dts: h3ulcb: update header
-
-This updates H3ULCB device tree header with official board name
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c77c97557614f07c72393eafa09ef826e0924293)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-@@ -1,5 +1,5 @@
- /*
-- * Device Tree Source for the H3ULCB board
-+ * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board
-  *
-  * Copyright (C) 2016 Renesas Electronics Corp.
-  * Copyright (C) 2016 Cogent Embedded, Inc.
diff --git a/patches.renesas/0129-clocksource-sh_tmu-Compute-rate-before-registration-.patch b/patches.renesas/0129-clocksource-sh_tmu-Compute-rate-before-registration-.patch
deleted file mode 100644
index d4fd838a5435d2..00000000000000
--- a/patches.renesas/0129-clocksource-sh_tmu-Compute-rate-before-registration-.patch
+++ /dev/null
@@ -1,146 +0,0 @@
-From 82f4b40ec43c886c8c16939ca9bf9f37bfc8e6bc Mon Sep 17 00:00:00 2001
-From: Nicolai Stange <nicstange@gmail.com>
-Date: Mon, 6 Feb 2017 22:12:00 +0100
-Subject: [PATCH 129/286] clocksource: sh_tmu: Compute rate before registration
- again
-
-With the upcoming NTP correction related rate adjustments to be implemented
-in the clockevents core, the latter needs to get informed about every rate
-change of a clockevent device made after its registration.
-
-Currently, sh_tmu violates this requirement in that it registers its
-clockevent device with a dummy rate and sets its final rate through
-clockevents_config() called from its ->set_state_oneshot() and
-->set_state_periodic() functions respectively.
-
-This patch moves the setting of the clockevent device's rate to its
-registration.
-
-Note that there has been some back and forth regarding this question with
-respect to the clocksource also provided by this driver:
-  commit 66f49121ffa4 ("clocksource: sh_tmu: compute mult and shift before
-                        registration")
-moves the rate determination from the clocksource's ->enable() function to
-before its registration. OTOH, the later
-  commit 0aeac458d9eb ("clocksource: sh_tmu: __clocksource_updatefreq_hz()
-                        update")
-basically reverts this, saying
-  "Without this patch the old code uses clocksource_register() together
-   with a hack that assumes a never changing clock rate."
-
-However, I checked all current sh_tmu users in arch/sh as well as in
-arch/arm/mach-shmobile carefully and right now, none of them changes any
-rate in any clock tree relevant to sh_tmu after their respective
-time_init(). Since all sh_tmu instances are created after time_init(), none
-of them should ever observe any clock rate changes.
-
-What's more, both, a clocksource as well as a clockevent device, can
-immediately get selected for use at their registration and thus, enabled
-at this point already. So it's probably safer to assume a "never changing
-clock rate" here.
-
-- Move the struct sh_tmu_channel's ->rate member to struct sh_tmu_device:
-  it's a property of the underlying clock which is in turn specific to
-  the sh_tmu_device.
-- Determine the ->rate value in sh_tmu_setup() at device probing rather
-  than at first usage.
-- Set the clockevent device's rate at its registration.
-- Although not strictly necessary for the upcoming clockevent core changes,
-  set the clocksource's rate at its registration for consistency.
-
-Signed-off-by: Nicolai Stange <nicstange@gmail.com>
-Signed-off-by: John Stultz <john.stultz@linaro.org>
-(cherry picked from commit c3c0a20df9fc55e2243a31f91a943b3e8ba61289)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clocksource/sh_tmu.c |   26 +++++++++++++-------------
- 1 file changed, 13 insertions(+), 13 deletions(-)
-
---- a/drivers/clocksource/sh_tmu.c
-+++ b/drivers/clocksource/sh_tmu.c
-@@ -46,7 +46,6 @@ struct sh_tmu_channel {
- 	void __iomem *base;
- 	int irq;
- 
--	unsigned long rate;
- 	unsigned long periodic;
- 	struct clock_event_device ced;
- 	struct clocksource cs;
-@@ -59,6 +58,7 @@ struct sh_tmu_device {
- 
- 	void __iomem *mapbase;
- 	struct clk *clk;
-+	unsigned long rate;
- 
- 	enum sh_tmu_model model;
- 
-@@ -165,7 +165,6 @@ static int __sh_tmu_enable(struct sh_tmu
- 	sh_tmu_write(ch, TCNT, 0xffffffff);
- 
- 	/* configure channel to parent clock / 4, irq off */
--	ch->rate = clk_get_rate(ch->tmu->clk) / 4;
- 	sh_tmu_write(ch, TCR, TCR_TPSC_CLK4);
- 
- 	/* enable channel */
-@@ -271,10 +270,8 @@ static int sh_tmu_clocksource_enable(str
- 		return 0;
- 
- 	ret = sh_tmu_enable(ch);
--	if (!ret) {
--		__clocksource_update_freq_hz(cs, ch->rate);
-+	if (!ret)
- 		ch->cs_enabled = true;
--	}
- 
- 	return ret;
- }
-@@ -334,8 +331,7 @@ static int sh_tmu_register_clocksource(s
- 	dev_info(&ch->tmu->pdev->dev, "ch%u: used as clock source\n",
- 		 ch->index);
- 
--	/* Register with dummy 1 Hz value, gets updated in ->enable() */
--	clocksource_register_hz(cs, 1);
-+	clocksource_register_hz(cs, ch->tmu->rate);
- 	return 0;
- }
- 
-@@ -346,14 +342,10 @@ static struct sh_tmu_channel *ced_to_sh_
- 
- static void sh_tmu_clock_event_start(struct sh_tmu_channel *ch, int periodic)
- {
--	struct clock_event_device *ced = &ch->ced;
--
- 	sh_tmu_enable(ch);
- 
--	clockevents_config(ced, ch->rate);
--
- 	if (periodic) {
--		ch->periodic = (ch->rate + HZ/2) / HZ;
-+		ch->periodic = (ch->tmu->rate + HZ/2) / HZ;
- 		sh_tmu_set_next(ch, ch->periodic, 1);
- 	}
- }
-@@ -435,7 +427,7 @@ static void sh_tmu_register_clockevent(s
- 	dev_info(&ch->tmu->pdev->dev, "ch%u: used for clock events\n",
- 		 ch->index);
- 
--	clockevents_config_and_register(ced, 1, 0x300, 0xffffffff);
-+	clockevents_config_and_register(ced, ch->tmu->rate, 0x300, 0xffffffff);
- 
- 	ret = request_irq(ch->irq, sh_tmu_interrupt,
- 			  IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
-@@ -561,6 +553,14 @@ static int sh_tmu_setup(struct sh_tmu_de
- 	if (ret < 0)
- 		goto err_clk_put;
- 
-+	/* Determine clock rate. */
-+	ret = clk_enable(tmu->clk);
-+	if (ret < 0)
-+		goto err_clk_unprepare;
-+
-+	tmu->rate = clk_get_rate(tmu->clk) / 4;
-+	clk_disable(tmu->clk);
-+
- 	/* Map the memory resource. */
- 	ret = sh_tmu_map_memory(tmu);
- 	if (ret < 0) {
diff --git a/patches.renesas/0130-ASoC-simple-scu-card-use-defined-dev-on-probe.patch b/patches.renesas/0130-ASoC-simple-scu-card-use-defined-dev-on-probe.patch
deleted file mode 100644
index 3c649fc1c2b273..00000000000000
--- a/patches.renesas/0130-ASoC-simple-scu-card-use-defined-dev-on-probe.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From d195cb8da0880a5fbf1963bf3bab55a739270283 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 15 Mar 2017 04:43:40 +0000
-Subject: [PATCH 130/286] ASoC: simple-scu-card: use defined dev on probe()
-
-Current asoc_simple_card_probe() already has dev definition,
-but some place doesn't use it. Let's fix this issue.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 40b68dac75a1d16266d3c89244ccf7b899afac3e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/generic/simple-scu-card.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/sound/soc/generic/simple-scu-card.c
-+++ b/sound/soc/generic/simple-scu-card.c
-@@ -257,7 +257,7 @@ static int asoc_simple_card_probe(struct
- 	struct snd_soc_dai_link *dai_link;
- 	struct asoc_simple_dai *dai_props;
- 	struct device *dev = &pdev->dev;
--	struct device_node *np = pdev->dev.of_node;
-+	struct device_node *np = dev->of_node;
- 	int num, ret;
- 
- 	/* Allocate the private data */
-@@ -292,7 +292,7 @@ static int asoc_simple_card_probe(struct
- 
- 	snd_soc_card_set_drvdata(&priv->snd_card, priv);
- 
--	ret = devm_snd_soc_register_card(&pdev->dev, &priv->snd_card);
-+	ret = devm_snd_soc_register_card(dev, &priv->snd_card);
- 	if (ret >= 0)
- 		return ret;
- err:
diff --git a/patches.renesas/0130-arm64-dts-m3ulcb-add-M3ULCB-board-DT-bindings.patch b/patches.renesas/0130-arm64-dts-m3ulcb-add-M3ULCB-board-DT-bindings.patch
deleted file mode 100644
index b5134892164b76..00000000000000
--- a/patches.renesas/0130-arm64-dts-m3ulcb-add-M3ULCB-board-DT-bindings.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 4c8c7c992a51002cceaf6d32a07a2e1ed775f77a Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 3 Nov 2016 21:06:57 +0300
-Subject: [PATCH 130/299] arm64: dts: m3ulcb: add M3ULCB board DT bindings
-
-Add M3ULCB Device tree bindings Documentation, listing it as a supported
-board.
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 76b5bba9855e4cd572e3cb44cd7c95b2043f7aee)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/arm/shmobile.txt |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/Documentation/devicetree/bindings/arm/shmobile.txt
-+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
-@@ -61,6 +61,8 @@ Boards:
-     compatible = "renesas,kzm9g", "renesas,sh73a0"
-   - Lager (RTP0RC7790SEB00010S)
-     compatible = "renesas,lager", "renesas,r8a7790"
-+  - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKB00010S)
-+    compatible = "renesas,m3ulcb", "renesas,r8a7796";
-   - Marzen
-     compatible = "renesas,marzen", "renesas,r8a7779"
-   - Porter (M2-LCDP)
diff --git a/patches.renesas/0130-sh_eth-add-generic-wake-on-lan-support-via-magic-pac.patch b/patches.renesas/0130-sh_eth-add-generic-wake-on-lan-support-via-magic-pac.patch
deleted file mode 100644
index 555d868a6fe691..00000000000000
--- a/patches.renesas/0130-sh_eth-add-generic-wake-on-lan-support-via-magic-pac.patch
+++ /dev/null
@@ -1,240 +0,0 @@
-From af32eba20f34e1e9161e190398b03df6b76b3913 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Mon, 9 Jan 2017 16:34:05 +0100
-Subject: [PATCH 130/255] sh_eth: add generic wake-on-lan support via magic
- packet
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Add generic functionality to support Wake-on-LAN using MagicPacket which
-are supported by at least a few versions of sh_eth. Only add
-functionality for WoL, no specific sh_eth versions are marked to support
-WoL yet.
-
-WoL is enabled in the suspend callback by setting MagicPacket detection
-and disabling all interrupts expect MagicPacket. In the resume path the
-driver needs to reset the hardware to rearm the WoL logic, this prevents
-the driver from simply restoring the registers and to take advantage of
-that sh_eth was not suspended to reduce resume time. To reset the
-hardware the driver closes and reopens the device just like it would do
-in a normal suspend/resume scenario without WoL enabled, but it both
-closes and opens the device in the resume callback since the device
-needs to be open for WoL to work.
-
-One quirk needed for WoL is that the module clock needs to be prevented
-from being switched off by Runtime PM. To keep the clock alive the
-suspend callback need to call clk_enable() directly to increase the
-usage count of the clock. Then when Runtime PM decreases the clock usage
-count it won't reach 0 and be switched off.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit d8981d029da9d230955dabe596dbb30e7971b7b9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |  114 +++++++++++++++++++++++++++++++---
- drivers/net/ethernet/renesas/sh_eth.h |    3 
- 2 files changed, 109 insertions(+), 8 deletions(-)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -1562,6 +1562,8 @@ static void sh_eth_emac_interrupt(struct
- 			sh_eth_rcv_snd_enable(ndev);
- 		}
- 	}
-+	if (felic_stat & ECSR_MPD)
-+		pm_wakeup_event(&mdp->pdev->dev, 0);
- }
- 
- /* error control function */
-@@ -2184,6 +2186,33 @@ static int sh_eth_set_ringparam(struct n
- 	return 0;
- }
- 
-+static void sh_eth_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
-+{
-+	struct sh_eth_private *mdp = netdev_priv(ndev);
-+
-+	wol->supported = 0;
-+	wol->wolopts = 0;
-+
-+	if (mdp->cd->magic && mdp->clk) {
-+		wol->supported = WAKE_MAGIC;
-+		wol->wolopts = mdp->wol_enabled ? WAKE_MAGIC : 0;
-+	}
-+}
-+
-+static int sh_eth_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
-+{
-+	struct sh_eth_private *mdp = netdev_priv(ndev);
-+
-+	if (!mdp->cd->magic || !mdp->clk || wol->wolopts & ~WAKE_MAGIC)
-+		return -EOPNOTSUPP;
-+
-+	mdp->wol_enabled = !!(wol->wolopts & WAKE_MAGIC);
-+
-+	device_set_wakeup_enable(&mdp->pdev->dev, mdp->wol_enabled);
-+
-+	return 0;
-+}
-+
- static const struct ethtool_ops sh_eth_ethtool_ops = {
- 	.get_regs_len	= sh_eth_get_regs_len,
- 	.get_regs	= sh_eth_get_regs,
-@@ -2198,6 +2227,8 @@ static const struct ethtool_ops sh_eth_e
- 	.set_ringparam	= sh_eth_set_ringparam,
- 	.get_link_ksettings = sh_eth_get_link_ksettings,
- 	.set_link_ksettings = sh_eth_set_link_ksettings,
-+	.get_wol	= sh_eth_get_wol,
-+	.set_wol	= sh_eth_set_wol,
- };
- 
- /* network device open function */
-@@ -3002,6 +3033,11 @@ static int sh_eth_drv_probe(struct platf
- 		goto out_release;
- 	}
- 
-+	/* Get clock, if not found that's OK but Wake-On-Lan is unavailable */
-+	mdp->clk = devm_clk_get(&pdev->dev, NULL);
-+	if (IS_ERR(mdp->clk))
-+		mdp->clk = NULL;
-+
- 	ndev->base_addr = res->start;
- 
- 	spin_lock_init(&mdp->lock);
-@@ -3115,6 +3151,9 @@ static int sh_eth_drv_probe(struct platf
- 	if (ret)
- 		goto out_napi_del;
- 
-+	if (mdp->cd->magic && mdp->clk)
-+		device_set_wakeup_capable(&pdev->dev, 1);
-+
- 	/* print device information */
- 	netdev_info(ndev, "Base address at 0x%x, %pM, IRQ %d.\n",
- 		    (u32)ndev->base_addr, ndev->dev_addr, ndev->irq);
-@@ -3154,15 +3193,67 @@ static int sh_eth_drv_remove(struct plat
- 
- #ifdef CONFIG_PM
- #ifdef CONFIG_PM_SLEEP
-+static int sh_eth_wol_setup(struct net_device *ndev)
-+{
-+	struct sh_eth_private *mdp = netdev_priv(ndev);
-+
-+	/* Only allow ECI interrupts */
-+	synchronize_irq(ndev->irq);
-+	napi_disable(&mdp->napi);
-+	sh_eth_write(ndev, DMAC_M_ECI, EESIPR);
-+
-+	/* Enable MagicPacket */
-+	sh_eth_modify(ndev, ECMR, 0, ECMR_MPDE);
-+
-+	/* Increased clock usage so device won't be suspended */
-+	clk_enable(mdp->clk);
-+
-+	return enable_irq_wake(ndev->irq);
-+}
-+
-+static int sh_eth_wol_restore(struct net_device *ndev)
-+{
-+	struct sh_eth_private *mdp = netdev_priv(ndev);
-+	int ret;
-+
-+	napi_enable(&mdp->napi);
-+
-+	/* Disable MagicPacket */
-+	sh_eth_modify(ndev, ECMR, ECMR_MPDE, 0);
-+
-+	/* The device needs to be reset to restore MagicPacket logic
-+	 * for next wakeup. If we close and open the device it will
-+	 * both be reset and all registers restored. This is what
-+	 * happens during suspend and resume without WoL enabled.
-+	 */
-+	ret = sh_eth_close(ndev);
-+	if (ret < 0)
-+		return ret;
-+	ret = sh_eth_open(ndev);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Restore clock usage count */
-+	clk_disable(mdp->clk);
-+
-+	return disable_irq_wake(ndev->irq);
-+}
-+
- static int sh_eth_suspend(struct device *dev)
- {
- 	struct net_device *ndev = dev_get_drvdata(dev);
-+	struct sh_eth_private *mdp = netdev_priv(ndev);
- 	int ret = 0;
- 
--	if (netif_running(ndev)) {
--		netif_device_detach(ndev);
-+	if (!netif_running(ndev))
-+		return 0;
-+
-+	netif_device_detach(ndev);
-+
-+	if (mdp->wol_enabled)
-+		ret = sh_eth_wol_setup(ndev);
-+	else
- 		ret = sh_eth_close(ndev);
--	}
- 
- 	return ret;
- }
-@@ -3170,14 +3261,21 @@ static int sh_eth_suspend(struct device
- static int sh_eth_resume(struct device *dev)
- {
- 	struct net_device *ndev = dev_get_drvdata(dev);
-+	struct sh_eth_private *mdp = netdev_priv(ndev);
- 	int ret = 0;
- 
--	if (netif_running(ndev)) {
-+	if (!netif_running(ndev))
-+		return 0;
-+
-+	if (mdp->wol_enabled)
-+		ret = sh_eth_wol_restore(ndev);
-+	else
- 		ret = sh_eth_open(ndev);
--		if (ret < 0)
--			return ret;
--		netif_device_attach(ndev);
--	}
-+
-+	if (ret < 0)
-+		return ret;
-+
-+	netif_device_attach(ndev);
- 
- 	return ret;
- }
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -492,6 +492,7 @@ struct sh_eth_cpu_data {
- 	unsigned select_mii:1;	/* EtherC have RMII_MII (MII select register) */
- 	unsigned rmiimode:1;	/* EtherC has RMIIMODE register */
- 	unsigned rtrate:1;	/* EtherC has RTRATE register */
-+	unsigned magic:1;	/* EtherC has ECMR.MPDE and ECSR.MPD */
- };
- 
- struct sh_eth_private {
-@@ -500,6 +501,7 @@ struct sh_eth_private {
- 	const u16 *reg_offset;
- 	void __iomem *addr;
- 	void __iomem *tsu_addr;
-+	struct clk *clk;
- 	u32 num_rx_ring;
- 	u32 num_tx_ring;
- 	dma_addr_t rx_desc_dma;
-@@ -528,6 +530,7 @@ struct sh_eth_private {
- 	unsigned no_ether_link:1;
- 	unsigned ether_link_active_low:1;
- 	unsigned is_opened:1;
-+	unsigned wol_enabled:1;
- };
- 
- static inline void sh_eth_soft_swap(char *src, int len)
diff --git a/patches.renesas/0131-ASoC-simple-scu-card-add-new-simple_priv_to_card-mac.patch b/patches.renesas/0131-ASoC-simple-scu-card-add-new-simple_priv_to_card-mac.patch
deleted file mode 100644
index 85da83e39bfa99..00000000000000
--- a/patches.renesas/0131-ASoC-simple-scu-card-add-new-simple_priv_to_card-mac.patch
+++ /dev/null
@@ -1,127 +0,0 @@
-From f50afccfe8e364866d0b849a542e6db5dec6b659 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 15 Mar 2017 04:44:16 +0000
-Subject: [PATCH 131/286] ASoC: simple-scu-card: add new simple_priv_to_card()
- macro
-
-Current simple card driver is directly calling priv->snd_card
-everywhere, but it makes unreadable code.
-Let's use simple_priv_to_card() macro for it
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit d27f3b4a2d81e873de4d11899e510a1a507da8e3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/generic/simple-scu-card.c |   35 ++++++++++++++++++++---------------
- 1 file changed, 20 insertions(+), 15 deletions(-)
-
---- a/sound/soc/generic/simple-scu-card.c
-+++ b/sound/soc/generic/simple-scu-card.c
-@@ -31,9 +31,10 @@ struct simple_card_data {
- 	u32 convert_channels;
- };
- 
--#define simple_priv_to_dev(priv) ((priv)->snd_card.dev)
--#define simple_priv_to_link(priv, i) ((priv)->snd_card.dai_link + (i))
-+#define simple_priv_to_card(priv) (&(priv)->snd_card)
- #define simple_priv_to_props(priv, i) ((priv)->dai_props + (i))
-+#define simple_priv_to_dev(priv) (simple_priv_to_card(priv)->dev)
-+#define simple_priv_to_link(priv, i) (simple_priv_to_card(priv)->dai_link + (i))
- 
- #define DAI	"sound-dai"
- #define CELL	"#sound-dai-cells"
-@@ -109,6 +110,7 @@ static int asoc_simple_card_dai_link_of(
- 	struct device *dev = simple_priv_to_dev(priv);
- 	struct snd_soc_dai_link *dai_link = simple_priv_to_link(priv, idx);
- 	struct asoc_simple_dai *dai_props = simple_priv_to_props(priv, idx);
-+	struct snd_soc_card *card = simple_priv_to_card(priv);
- 	int ret;
- 
- 	if (is_fe) {
-@@ -163,7 +165,7 @@ static int asoc_simple_card_dai_link_of(
- 		if (ret < 0)
- 			return ret;
- 
--		snd_soc_of_parse_audio_prefix(&priv->snd_card,
-+		snd_soc_of_parse_audio_prefix(card,
- 					      &priv->codec_conf,
- 					      dai_link->codec_of_node,
- 					      PREFIX "prefix");
-@@ -201,6 +203,7 @@ static int asoc_simple_card_parse_of(str
- {
- 	struct device *dev = simple_priv_to_dev(priv);
- 	struct device_node *np;
-+	struct snd_soc_card *card = simple_priv_to_card(priv);
- 	unsigned int daifmt = 0;
- 	bool is_fe;
- 	int ret, i;
-@@ -208,7 +211,7 @@ static int asoc_simple_card_parse_of(str
- 	if (!node)
- 		return -EINVAL;
- 
--	ret = snd_soc_of_parse_audio_routing(&priv->snd_card, PREFIX "routing");
-+	ret = snd_soc_of_parse_audio_routing(card, PREFIX "routing");
- 	if (ret < 0)
- 		return ret;
- 
-@@ -239,12 +242,12 @@ static int asoc_simple_card_parse_of(str
- 		i++;
- 	}
- 
--	ret = asoc_simple_card_parse_card_name(&priv->snd_card, PREFIX);
-+	ret = asoc_simple_card_parse_card_name(card, PREFIX);
- 	if (ret < 0)
- 		return ret;
- 
- 	dev_dbg(dev, "New card: %s\n",
--		priv->snd_card.name ? priv->snd_card.name : "");
-+		card->name ? card->name : "");
- 	dev_dbg(dev, "convert_rate     %d\n", priv->convert_rate);
- 	dev_dbg(dev, "convert_channels %d\n", priv->convert_channels);
- 
-@@ -256,6 +259,7 @@ static int asoc_simple_card_probe(struct
- 	struct simple_card_data *priv;
- 	struct snd_soc_dai_link *dai_link;
- 	struct asoc_simple_dai *dai_props;
-+	struct snd_soc_card *card;
- 	struct device *dev = &pdev->dev;
- 	struct device_node *np = dev->of_node;
- 	int num, ret;
-@@ -276,12 +280,13 @@ static int asoc_simple_card_probe(struct
- 	priv->dai_link				= dai_link;
- 
- 	/* Init snd_soc_card */
--	priv->snd_card.owner			= THIS_MODULE;
--	priv->snd_card.dev			= dev;
--	priv->snd_card.dai_link			= priv->dai_link;
--	priv->snd_card.num_links		= num;
--	priv->snd_card.codec_conf		= &priv->codec_conf;
--	priv->snd_card.num_configs		= 1;
-+	card = simple_priv_to_card(priv);
-+	card->owner		= THIS_MODULE;
-+	card->dev		= dev;
-+	card->dai_link		= priv->dai_link;
-+	card->num_links		= num;
-+	card->codec_conf	= &priv->codec_conf;
-+	card->num_configs	= 1;
- 
- 	ret = asoc_simple_card_parse_of(np, priv);
- 	if (ret < 0) {
-@@ -290,13 +295,13 @@ static int asoc_simple_card_probe(struct
- 		goto err;
- 	}
- 
--	snd_soc_card_set_drvdata(&priv->snd_card, priv);
-+	snd_soc_card_set_drvdata(card, priv);
- 
--	ret = devm_snd_soc_register_card(dev, &priv->snd_card);
-+	ret = devm_snd_soc_register_card(dev, card);
- 	if (ret >= 0)
- 		return ret;
- err:
--	asoc_simple_card_clean_reference(&priv->snd_card);
-+	asoc_simple_card_clean_reference(card);
- 
- 	return ret;
- }
diff --git a/patches.renesas/0131-arm64-dts-m3ulcb-initial-device-tree.patch b/patches.renesas/0131-arm64-dts-m3ulcb-initial-device-tree.patch
deleted file mode 100644
index ac0acd3e66fa92..00000000000000
--- a/patches.renesas/0131-arm64-dts-m3ulcb-initial-device-tree.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From c54344f37b65941084eeff49533165eec6b0a2bc Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 3 Nov 2016 21:07:09 +0300
-Subject: [PATCH 131/299] arm64: dts: m3ulcb: initial device tree
-
-Add the initial device tree for the R8A7796 SoC based M3ULCB low cost
-board (R-Car Starter Kit Pro)
-
-This commit supports the following peripherals:
-- SCIF (console)
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d9b1c753878310c90e8be178f6a8e119fd0aa25d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/Makefile           |    2 
- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts |   51 +++++++++++++++++++++++++
- 2 files changed, 52 insertions(+), 1 deletion(-)
- create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-
---- a/arch/arm64/boot/dts/renesas/Makefile
-+++ b/arch/arm64/boot/dts/renesas/Makefile
-@@ -1,5 +1,5 @@
- dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
--dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb
-+dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
- 
- always		:= $(dtb-y)
- clean-files	:= *.dtb
---- /dev/null
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-@@ -0,0 +1,51 @@
-+/*
-+ * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board
-+ *
-+ * Copyright (C) 2016 Renesas Electronics Corp.
-+ * Copyright (C) 2016 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+#include "r8a7796.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
-+
-+/ {
-+	model = "Renesas M3ULCB board based on r8a7796";
-+	compatible = "renesas,m3ulcb", "renesas,r8a7796";
-+
-+	aliases {
-+		serial0 = &scif2;
-+	};
-+
-+	chosen {
-+		stdout-path = "serial0:115200n8";
-+	};
-+
-+	memory@48000000 {
-+		device_type = "memory";
-+		/* first 128MB is reserved for secure area. */
-+		reg = <0x0 0x48000000 0x0 0x38000000>;
-+	};
-+};
-+
-+&extal_clk {
-+	clock-frequency = <16666666>;
-+};
-+
-+&pfc {
-+	scif2_pins: scif2 {
-+		groups = "scif2_data_a";
-+		function = "scif2";
-+	};
-+};
-+
-+&scif2 {
-+	pinctrl-0 = <&scif2_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+};
diff --git a/patches.renesas/0131-sh_eth-enable-wake-on-lan-for-R-Car-Gen2-devices.patch b/patches.renesas/0131-sh_eth-enable-wake-on-lan-for-R-Car-Gen2-devices.patch
deleted file mode 100644
index 7aad65f5d6e85c..00000000000000
--- a/patches.renesas/0131-sh_eth-enable-wake-on-lan-for-R-Car-Gen2-devices.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 5d19ffacfcffab22e15a62b0e3fbfc7045aad427 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Mon, 9 Jan 2017 16:34:06 +0100
-Subject: [PATCH 131/255] sh_eth: enable wake-on-lan for R-Car Gen2 devices
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Tested on Gen2 r8a7791/Koelsch.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit e410d86d4aa79a1a37231af6aacd93b2c4395c46)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |    6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -622,8 +622,9 @@ static struct sh_eth_cpu_data r8a779x_da
- 
- 	.register_type	= SH_ETH_REG_FAST_RCAR,
- 
--	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
--	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
-+	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD | ECSR_MPD,
-+	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP |
-+			  ECSIPR_MPDIP,
- 	.eesipr_value	= 0x01ff009f,
- 
- 	.tx_check	= EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
-@@ -638,6 +639,7 @@ static struct sh_eth_cpu_data r8a779x_da
- 	.tpauser	= 1,
- 	.hw_swap	= 1,
- 	.rmiimode	= 1,
-+	.magic		= 1,
- };
- #endif /* CONFIG_OF */
- 
diff --git a/patches.renesas/0132-arm64-dts-m3ulcb-enable-SCIF-clk-and-pins.patch b/patches.renesas/0132-arm64-dts-m3ulcb-enable-SCIF-clk-and-pins.patch
deleted file mode 100644
index 2cfb01d63b7617..00000000000000
--- a/patches.renesas/0132-arm64-dts-m3ulcb-enable-SCIF-clk-and-pins.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 4f20215fc1aac53917a0195c6b59ba69e22790cc Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 3 Nov 2016 21:07:20 +0300
-Subject: [PATCH 132/299] arm64: dts: m3ulcb: enable SCIF clk and pins
-
-This enables the external crystal for the SCIF_CLK and its pinctrl, to
-be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d92ce1a57480e17aff1fb8693cc919bb46a6e0fd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts |   13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-@@ -37,10 +37,18 @@
- };
- 
- &pfc {
-+	pinctrl-0 = <&scif_clk_pins>;
-+	pinctrl-names = "default";
-+
- 	scif2_pins: scif2 {
- 		groups = "scif2_data_a";
- 		function = "scif2";
- 	};
-+
-+	scif_clk_pins: scif_clk {
-+		groups = "scif_clk_a";
-+		function = "scif_clk";
-+	};
- };
- 
- &scif2 {
-@@ -49,3 +57,8 @@
- 
- 	status = "okay";
- };
-+
-+&scif_clk {
-+	clock-frequency = <14745600>;
-+	status = "okay";
-+};
diff --git a/patches.renesas/0132-sh_eth-enable-wake-on-lan-for-r8a7740-armadillo.patch b/patches.renesas/0132-sh_eth-enable-wake-on-lan-for-r8a7740-armadillo.patch
deleted file mode 100644
index 84578e45fd379e..00000000000000
--- a/patches.renesas/0132-sh_eth-enable-wake-on-lan-for-r8a7740-armadillo.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 05156d52187d6e3f11b3d811bfe4e9141c9b4f7a Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Mon, 9 Jan 2017 16:34:07 +0100
-Subject: [PATCH 132/255] sh_eth: enable wake-on-lan for r8a7740/armadillo
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Geert Uytterhoeven reported WoL worked on his Armadillo board.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 33017e240f489b6353e33f2630f2c5cbd2ad1d13)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -576,6 +576,7 @@ static struct sh_eth_cpu_data r8a7740_da
- 	.hw_checksum	= 1,
- 	.tsu		= 1,
- 	.select_mii	= 1,
-+	.magic		= 1,
- };
- 
- /* There is CPU dependent code */
diff --git a/patches.renesas/0132-smsc911x-Adding-support-for-Micochip-LAN9250-Etherne.patch b/patches.renesas/0132-smsc911x-Adding-support-for-Micochip-LAN9250-Etherne.patch
deleted file mode 100644
index 8feb47d2b10a6f..00000000000000
--- a/patches.renesas/0132-smsc911x-Adding-support-for-Micochip-LAN9250-Etherne.patch
+++ /dev/null
@@ -1,145 +0,0 @@
-From 181e06e684c052715499d9e5213e7f883f3282cc Mon Sep 17 00:00:00 2001
-From: David Cai <david.cai@microchip.com>
-Date: Tue, 2 May 2017 20:59:14 +0000
-Subject: [PATCH 132/286] smsc911x: Adding support for Micochip LAN9250
- Ethernet controller
-
-Adding support for Microchip LAN9250 Ethernet controller.
-
-Signed-off-by: David Cai <david.cai@microchip.com>
-Reviewed-by: Andrew Lunn <andrew@lunn.ch>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit f6fec61eb555e47e87234e8915ad726ba6c2d3f8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/smsc/smsc911x.c |   49 +++++++++++++++++++++--------------
- drivers/net/ethernet/smsc/smsc911x.h |   19 +++++++++++++
- 2 files changed, 49 insertions(+), 19 deletions(-)
-
---- a/drivers/net/ethernet/smsc/smsc911x.c
-+++ b/drivers/net/ethernet/smsc/smsc911x.c
-@@ -25,7 +25,7 @@
-  *   LAN9215, LAN9216, LAN9217, LAN9218
-  *   LAN9210, LAN9211
-  *   LAN9220, LAN9221
-- *   LAN89218
-+ *   LAN89218,LAN9250
-  *
-  */
- 
-@@ -1450,6 +1450,8 @@ static int smsc911x_soft_reset(struct sm
- 	unsigned int timeout;
- 	unsigned int temp;
- 	int ret;
-+	unsigned int reset_offset = HW_CFG;
-+	unsigned int reset_mask = HW_CFG_SRST_;
- 
- 	/*
- 	 * Make sure to power-up the PHY chip before doing a reset, otherwise
-@@ -1476,15 +1478,23 @@ static int smsc911x_soft_reset(struct sm
- 		}
- 	}
- 
-+	if ((pdata->idrev & 0xFFFF0000) == LAN9250) {
-+		/* special reset for  LAN9250 */
-+		reset_offset = RESET_CTL;
-+		reset_mask = RESET_CTL_DIGITAL_RST_;
-+	}
-+
- 	/* Reset the LAN911x */
--	smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
-+	smsc911x_reg_write(pdata, reset_offset, reset_mask);
-+
-+	/* verify reset bit is cleared */
- 	timeout = 10;
- 	do {
- 		udelay(10);
--		temp = smsc911x_reg_read(pdata, HW_CFG);
--	} while ((--timeout) && (temp & HW_CFG_SRST_));
-+		temp = smsc911x_reg_read(pdata, reset_offset);
-+	} while ((--timeout) && (temp & reset_mask));
- 
--	if (unlikely(temp & HW_CFG_SRST_)) {
-+	if (unlikely(temp & reset_mask)) {
- 		SMSC_WARN(pdata, drv, "Failed to complete reset");
- 		return -EIO;
- 	}
-@@ -2259,28 +2269,29 @@ static int smsc911x_init(struct net_devi
- 
- 	pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
- 	switch (pdata->idrev & 0xFFFF0000) {
--	case 0x01180000:
--	case 0x01170000:
--	case 0x01160000:
--	case 0x01150000:
--	case 0x218A0000:
-+	case LAN9118:
-+	case LAN9117:
-+	case LAN9116:
-+	case LAN9115:
-+	case LAN89218:
- 		/* LAN911[5678] family */
- 		pdata->generation = pdata->idrev & 0x0000FFFF;
- 		break;
- 
--	case 0x118A0000:
--	case 0x117A0000:
--	case 0x116A0000:
--	case 0x115A0000:
-+	case LAN9218:
-+	case LAN9217:
-+	case LAN9216:
-+	case LAN9215:
- 		/* LAN921[5678] family */
- 		pdata->generation = 3;
- 		break;
- 
--	case 0x92100000:
--	case 0x92110000:
--	case 0x92200000:
--	case 0x92210000:
--		/* LAN9210/LAN9211/LAN9220/LAN9221 */
-+	case LAN9210:
-+	case LAN9211:
-+	case LAN9220:
-+	case LAN9221:
-+	case LAN9250:
-+		/* LAN9210/LAN9211/LAN9220/LAN9221/LAN9250 */
- 		pdata->generation = 4;
- 		break;
- 
---- a/drivers/net/ethernet/smsc/smsc911x.h
-+++ b/drivers/net/ethernet/smsc/smsc911x.h
-@@ -20,6 +20,22 @@
- #ifndef __SMSC911X_H__
- #define __SMSC911X_H__
- 
-+/*Chip ID*/
-+#define LAN9115	0x01150000
-+#define LAN9116	0x01160000
-+#define LAN9117	0x01170000
-+#define LAN9118	0x01180000
-+#define LAN9215	0x115A0000
-+#define LAN9216	0x116A0000
-+#define LAN9217	0x117A0000
-+#define LAN9218	0x118A0000
-+#define LAN9210	0x92100000
-+#define LAN9211	0x92110000
-+#define LAN9220	0x92200000
-+#define LAN9221	0x92210000
-+#define LAN9250	0x92500000
-+#define LAN89218	0x218A0000
-+
- #define TX_FIFO_LOW_THRESHOLD	((u32)1600)
- #define SMSC911X_EEPROM_SIZE	((u32)128)
- #define USE_DEBUG		0
-@@ -303,6 +319,9 @@
- #define E2P_DATA_EEPROM_DATA_		0x000000FF
- #define LAN_REGISTER_EXTENT		0x00000100
- 
-+#define RESET_CTL			0x1F8
-+#define RESET_CTL_DIGITAL_RST_		0x00000001
-+
- /*
-  * MAC Control and Status Register (Indirect Address)
-  * Offset (through the MAC_CSR CMD and DATA port)
diff --git a/patches.renesas/0133-arm64-dts-m3ulcb-enable-GPIO-leds.patch b/patches.renesas/0133-arm64-dts-m3ulcb-enable-GPIO-leds.patch
deleted file mode 100644
index 166e2d3766e80d..00000000000000
--- a/patches.renesas/0133-arm64-dts-m3ulcb-enable-GPIO-leds.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From e80f77aaa1bb6a3d8f57d1c47cb148ed50cee4ed Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 3 Nov 2016 21:07:31 +0300
-Subject: [PATCH 133/299] arm64: dts: m3ulcb: enable GPIO leds
-
-This supports GPIO leds on M3ULCB board
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 811a0d07e68ed3bb576e2f193f2c9831bb25c04e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts |   11 +++++++++++
- 1 file changed, 11 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-@@ -30,6 +30,17 @@
- 		/* first 128MB is reserved for secure area. */
- 		reg = <0x0 0x48000000 0x0 0x38000000>;
- 	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		led5 {
-+			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
-+		};
-+		led6 {
-+			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
- };
- 
- &extal_clk {
diff --git a/patches.renesas/0133-sh_eth-enable-wake-on-lan-for-sh7734.patch b/patches.renesas/0133-sh_eth-enable-wake-on-lan-for-sh7734.patch
deleted file mode 100644
index 0ea4cd506ca3df..00000000000000
--- a/patches.renesas/0133-sh_eth-enable-wake-on-lan-for-sh7734.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From c5ef1300917211318e9499d17e6d5654fc1164cd Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Mon, 9 Jan 2017 16:34:08 +0100
-Subject: [PATCH 133/255] sh_eth: enable wake-on-lan for sh7734
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This is based on public datasheet for sh7734 which shows it has the
-same behavior and registers for WoL as other versions of sh_eth.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 159c2a90442c6d5ad0b3d085e348979cd9a0ac1b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -817,6 +817,7 @@ static struct sh_eth_cpu_data sh7734_dat
- 	.tsu		= 1,
- 	.hw_checksum	= 1,
- 	.select_mii	= 1,
-+	.magic		= 1,
- };
- 
- /* SH7763 */
diff --git a/patches.renesas/0133-usb-gadget-udc-renesas_usb3-add-USB-ID-signal-monito.patch b/patches.renesas/0133-usb-gadget-udc-renesas_usb3-add-USB-ID-signal-monito.patch
deleted file mode 100644
index ea76afcac49d5f..00000000000000
--- a/patches.renesas/0133-usb-gadget-udc-renesas_usb3-add-USB-ID-signal-monito.patch
+++ /dev/null
@@ -1,146 +0,0 @@
-From 63f957c06c366e02bb5ea89a0b57ea5971befd77 Mon Sep 17 00:00:00 2001
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Date: Thu, 30 Mar 2017 11:16:04 +0900
-Subject: [PATCH 133/286] usb: gadget: udc: renesas_usb3: add USB ID signal
- monitoring
-
-This usb 3.0 peripheral controller has a register (USB_OTG_STA) to monitor
-the USB ID signal. So, this patch adds the ID signal monitoring to change
-the mode to host (A-Host) or peripheral (B-Peripheral).
-This patch also removes hardcoded setting as B-Peripheral mode.
-
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-(cherry picked from commit 77172a1f886a696bab5b4d3006ccf55ee4b1bfe5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/gadget/udc/renesas_usb3.c |   67 +++++++++++++++++++++++++++++++---
- 1 file changed, 63 insertions(+), 4 deletions(-)
-
---- a/drivers/usb/gadget/udc/renesas_usb3.c
-+++ b/drivers/usb/gadget/udc/renesas_usb3.c
-@@ -37,6 +37,9 @@
- #define USB3_USB_INT_ENA_2	0x22c
- #define USB3_STUP_DAT_0		0x230
- #define USB3_STUP_DAT_1		0x234
-+#define USB3_USB_OTG_STA	0x268
-+#define USB3_USB_OTG_INT_STA	0x26c
-+#define USB3_USB_OTG_INT_ENA	0x270
- #define USB3_P0_MOD		0x280
- #define USB3_P0_CON		0x288
- #define USB3_P0_STA		0x28c
-@@ -124,6 +127,9 @@
- /* USB_INT_ENA_2 and USB_INT_STA_2 */
- #define USB_INT_2_PIPE(n)	BIT(n)
- 
-+/* USB_OTG_STA, USB_OTG_INT_STA and USB_OTG_INT_ENA */
-+#define USB_OTG_IDMON		BIT(4)
-+
- /* P0_MOD */
- #define P0_MOD_DIR		BIT(6)
- 
-@@ -362,10 +368,6 @@ static void usb3_init_axi_bridge(struct
- 
- static void usb3_init_epc_registers(struct renesas_usb3 *usb3)
- {
--	/* FIXME: How to change host / peripheral mode as well? */
--	usb3_set_bit(usb3, DRD_CON_PERI_CON, USB3_DRD_CON);
--	usb3_clear_bit(usb3, DRD_CON_VBOUT, USB3_DRD_CON);
--
- 	usb3_write(usb3, ~0, USB3_USB_INT_STA_1);
- 	usb3_enable_irq_1(usb3, USB_INT_1_VBUS_CNG);
- }
-@@ -545,11 +547,49 @@ static void usb3_check_vbus(struct renes
- 	}
- }
- 
-+static void usb3_set_mode(struct renesas_usb3 *usb3, bool host)
-+{
-+	if (host)
-+		usb3_clear_bit(usb3, DRD_CON_PERI_CON, USB3_DRD_CON);
-+	else
-+		usb3_set_bit(usb3, DRD_CON_PERI_CON, USB3_DRD_CON);
-+}
-+
-+static void usb3_vbus_out(struct renesas_usb3 *usb3, bool enable)
-+{
-+	if (enable)
-+		usb3_set_bit(usb3, DRD_CON_VBOUT, USB3_DRD_CON);
-+	else
-+		usb3_clear_bit(usb3, DRD_CON_VBOUT, USB3_DRD_CON);
-+}
-+
-+static void usb3_mode_config(struct renesas_usb3 *usb3, bool host, bool a_dev)
-+{
-+	usb3_set_mode(usb3, host);
-+	usb3_vbus_out(usb3, a_dev);
-+}
-+
-+static bool usb3_is_a_device(struct renesas_usb3 *usb3)
-+{
-+	return !(usb3_read(usb3, USB3_USB_OTG_STA) & USB_OTG_IDMON);
-+}
-+
-+static void usb3_check_id(struct renesas_usb3 *usb3)
-+{
-+	if (usb3_is_a_device(usb3))
-+		usb3_mode_config(usb3, true, true);
-+	else
-+		usb3_mode_config(usb3, false, false);
-+}
-+
- static void renesas_usb3_init_controller(struct renesas_usb3 *usb3)
- {
- 	usb3_init_axi_bridge(usb3);
- 	usb3_init_epc_registers(usb3);
-+	usb3_write(usb3, USB_OTG_IDMON, USB3_USB_OTG_INT_STA);
-+	usb3_write(usb3, USB_OTG_IDMON, USB3_USB_OTG_INT_ENA);
- 
-+	usb3_check_id(usb3);
- 	usb3_check_vbus(usb3);
- }
- 
-@@ -558,6 +598,7 @@ static void renesas_usb3_stop_controller
- 	usb3_disconnect(usb3);
- 	usb3_write(usb3, 0, USB3_P0_INT_ENA);
- 	usb3_write(usb3, 0, USB3_PN_INT_ENA);
-+	usb3_write(usb3, 0, USB3_USB_OTG_INT_ENA);
- 	usb3_write(usb3, 0, USB3_USB_INT_ENA_1);
- 	usb3_write(usb3, 0, USB3_USB_INT_ENA_2);
- 	usb3_write(usb3, 0, USB3_AXI_INT_ENA);
-@@ -1516,10 +1557,22 @@ static void usb3_irq_epc_int_2(struct re
- 	}
- }
- 
-+static void usb3_irq_idmon_change(struct renesas_usb3 *usb3)
-+{
-+	usb3_check_id(usb3);
-+}
-+
-+static void usb3_irq_otg_int(struct renesas_usb3 *usb3, u32 otg_int_sta)
-+{
-+	if (otg_int_sta & USB_OTG_IDMON)
-+		usb3_irq_idmon_change(usb3);
-+}
-+
- static void usb3_irq_epc(struct renesas_usb3 *usb3)
- {
- 	u32 int_sta_1 = usb3_read(usb3, USB3_USB_INT_STA_1);
- 	u32 int_sta_2 = usb3_read(usb3, USB3_USB_INT_STA_2);
-+	u32 otg_int_sta = usb3_read(usb3, USB3_USB_OTG_INT_STA);
- 
- 	int_sta_1 &= usb3_read(usb3, USB3_USB_INT_ENA_1);
- 	if (int_sta_1) {
-@@ -1530,6 +1583,12 @@ static void usb3_irq_epc(struct renesas_
- 	int_sta_2 &= usb3_read(usb3, USB3_USB_INT_ENA_2);
- 	if (int_sta_2)
- 		usb3_irq_epc_int_2(usb3, int_sta_2);
-+
-+	otg_int_sta &= usb3_read(usb3, USB3_USB_OTG_INT_ENA);
-+	if (otg_int_sta) {
-+		usb3_write(usb3, otg_int_sta, USB3_USB_OTG_INT_STA);
-+		usb3_irq_otg_int(usb3, otg_int_sta);
-+	}
- }
- 
- static irqreturn_t renesas_usb3_irq(int irq, void *_usb3)
diff --git a/patches.renesas/0134-arm64-dts-m3ulcb-enable-GPIO-keys.patch b/patches.renesas/0134-arm64-dts-m3ulcb-enable-GPIO-keys.patch
deleted file mode 100644
index 5101d910b7d588..00000000000000
--- a/patches.renesas/0134-arm64-dts-m3ulcb-enable-GPIO-keys.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 5fd4b04deff35866cc1ef20294e364861f9e3a47 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 3 Nov 2016 21:07:43 +0300
-Subject: [PATCH 134/299] arm64: dts: m3ulcb: enable GPIO keys
-
-This supports GPIO keys on M3ULCB board
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 96cc1e177c1260e53ac39a0fb109f5d9e7300b09)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts |   13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-@@ -12,6 +12,7 @@
- /dts-v1/;
- #include "r8a7796.dtsi"
- #include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
- 
- / {
- 	model = "Renesas M3ULCB board based on r8a7796";
-@@ -41,6 +42,18 @@
- 			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
- 		};
- 	};
-+
-+	keyboard {
-+		compatible = "gpio-keys";
-+
-+		key-1 {
-+			linux,code = <KEY_1>;
-+			label = "SW3";
-+			wakeup-source;
-+			debounce-interval = <20>;
-+			gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
-+		};
-+	};
- };
- 
- &extal_clk {
diff --git a/patches.renesas/0134-sh_eth-enable-wake-on-lan-for-sh7763.patch b/patches.renesas/0134-sh_eth-enable-wake-on-lan-for-sh7763.patch
deleted file mode 100644
index 33c3f0371ebe52..00000000000000
--- a/patches.renesas/0134-sh_eth-enable-wake-on-lan-for-sh7763.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From c387506d71ab35dc7ca5ab088224a6ea688a7aa9 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Mon, 9 Jan 2017 16:34:09 +0100
-Subject: [PATCH 134/255] sh_eth: enable wake-on-lan for sh7763
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This is based on public datasheet for sh7763 which shows it has the
-same behavior and registers for WoL as other versions of sh_eth.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 267e1d5c7473cdb264c3153bf2adeb9d0c4bcae3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -845,6 +845,7 @@ static struct sh_eth_cpu_data sh7763_dat
- 	.no_ade		= 1,
- 	.tsu		= 1,
- 	.irq_flags	= IRQF_SHARED,
-+	.magic		= 1,
- };
- 
- static struct sh_eth_cpu_data sh7619_data = {
diff --git a/patches.renesas/0134-usb-gadget-udc-renesas_usb3-add-extcon-support.patch b/patches.renesas/0134-usb-gadget-udc-renesas_usb3-add-extcon-support.patch
deleted file mode 100644
index c39e440069cf9a..00000000000000
--- a/patches.renesas/0134-usb-gadget-udc-renesas_usb3-add-extcon-support.patch
+++ /dev/null
@@ -1,133 +0,0 @@
-From afde35d3ceec87f8fc0a29deacd653aaf4a27ac3 Mon Sep 17 00:00:00 2001
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Date: Thu, 30 Mar 2017 11:16:05 +0900
-Subject: [PATCH 134/286] usb: gadget: udc: renesas_usb3: add extcon support
-
-This patch adds extcon support to see VBUS/ID signal states.
-
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-(cherry picked from commit 3b68e7ca388815459ef4466e17ed6661d0d67a5b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/gadget/udc/Kconfig        |    1 
- drivers/usb/gadget/udc/renesas_usb3.c |   43 ++++++++++++++++++++++++++++++++--
- 2 files changed, 42 insertions(+), 2 deletions(-)
-
---- a/drivers/usb/gadget/udc/Kconfig
-+++ b/drivers/usb/gadget/udc/Kconfig
-@@ -177,6 +177,7 @@ config USB_RENESAS_USBHS_UDC
- config USB_RENESAS_USB3
- 	tristate 'Renesas USB3.0 Peripheral controller'
- 	depends on ARCH_RENESAS || COMPILE_TEST
-+	depends on EXTCON
- 	help
- 	   Renesas USB3.0 Peripheral controller is a USB peripheral controller
- 	   that supports super, high, and full speed USB 3.0 data transfers.
---- a/drivers/usb/gadget/udc/renesas_usb3.c
-+++ b/drivers/usb/gadget/udc/renesas_usb3.c
-@@ -10,6 +10,7 @@
- 
- #include <linux/delay.h>
- #include <linux/err.h>
-+#include <linux/extcon.h>
- #include <linux/interrupt.h>
- #include <linux/io.h>
- #include <linux/module.h>
-@@ -263,6 +264,8 @@ struct renesas_usb3 {
- 
- 	struct usb_gadget gadget;
- 	struct usb_gadget_driver *driver;
-+	struct extcon_dev *extcon;
-+	struct work_struct extcon_work;
- 
- 	struct renesas_usb3_ep *usb3_ep;
- 	int num_usb3_eps;
-@@ -275,6 +278,8 @@ struct renesas_usb3 {
- 	u8 ep0_buf[USB3_EP0_BUF_SIZE];
- 	bool softconnect;
- 	bool workaround_for_vbus;
-+	bool extcon_host;		/* check id and set EXTCON_USB_HOST */
-+	bool extcon_usb;		/* check vbus and set EXTCON_USB */
- };
- 
- #define gadget_to_renesas_usb3(_gadget)	\
-@@ -338,6 +343,15 @@ static int usb3_wait(struct renesas_usb3
- 	return -EBUSY;
- }
- 
-+static void renesas_usb3_extcon_work(struct work_struct *work)
-+{
-+	struct renesas_usb3 *usb3 = container_of(work, struct renesas_usb3,
-+						 extcon_work);
-+
-+	extcon_set_state_sync(usb3->extcon, EXTCON_USB_HOST, usb3->extcon_host);
-+	extcon_set_state_sync(usb3->extcon, EXTCON_USB, usb3->extcon_usb);
-+}
-+
- static void usb3_enable_irq_1(struct renesas_usb3 *usb3, u32 bits)
- {
- 	usb3_set_bit(usb3, bits, USB3_USB_INT_ENA_1);
-@@ -540,10 +554,14 @@ static void usb3_check_vbus(struct renes
- 	if (usb3->workaround_for_vbus) {
- 		usb3_connect(usb3);
- 	} else {
--		if (usb3_read(usb3, USB3_USB_STA) & USB_STA_VBUS_STA)
-+		usb3->extcon_usb = !!(usb3_read(usb3, USB3_USB_STA) &
-+							USB_STA_VBUS_STA);
-+		if (usb3->extcon_usb)
- 			usb3_connect(usb3);
- 		else
- 			usb3_disconnect(usb3);
-+
-+		schedule_work(&usb3->extcon_work);
- 	}
- }
- 
-@@ -576,10 +594,14 @@ static bool usb3_is_a_device(struct rene
- 
- static void usb3_check_id(struct renesas_usb3 *usb3)
- {
--	if (usb3_is_a_device(usb3))
-+	usb3->extcon_host = usb3_is_a_device(usb3);
-+
-+	if (usb3->extcon_host)
- 		usb3_mode_config(usb3, true, true);
- 	else
- 		usb3_mode_config(usb3, false, false);
-+
-+	schedule_work(&usb3->extcon_work);
- }
- 
- static void renesas_usb3_init_controller(struct renesas_usb3 *usb3)
-@@ -2004,6 +2026,12 @@ static const struct of_device_id usb3_of
- };
- MODULE_DEVICE_TABLE(of, usb3_of_match);
- 
-+static const unsigned int renesas_usb3_cable[] = {
-+	EXTCON_USB,
-+	EXTCON_USB_HOST,
-+	EXTCON_NONE,
-+};
-+
- static int renesas_usb3_probe(struct platform_device *pdev)
- {
- 	struct renesas_usb3 *usb3;
-@@ -2047,6 +2075,17 @@ static int renesas_usb3_probe(struct pla
- 	if (ret < 0)
- 		return ret;
- 
-+	INIT_WORK(&usb3->extcon_work, renesas_usb3_extcon_work);
-+	usb3->extcon = devm_extcon_dev_allocate(&pdev->dev, renesas_usb3_cable);
-+	if (IS_ERR(usb3->extcon))
-+		return PTR_ERR(usb3->extcon);
-+
-+	ret = devm_extcon_dev_register(&pdev->dev, usb3->extcon);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "Failed to register extcon\n");
-+		return ret;
-+	}
-+
- 	/* for ep0 handling */
- 	usb3->ep0_req = __renesas_usb3_ep_alloc_request(GFP_KERNEL);
- 	if (!usb3->ep0_req)
diff --git a/patches.renesas/0135-arm64-dts-m3ulcb-enable-EXTALR-clk.patch b/patches.renesas/0135-arm64-dts-m3ulcb-enable-EXTALR-clk.patch
deleted file mode 100644
index 7f8733678f5bb4..00000000000000
--- a/patches.renesas/0135-arm64-dts-m3ulcb-enable-EXTALR-clk.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 46462227abe231fd21ecea2ac6f78ed71db45d0a Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 3 Nov 2016 21:08:02 +0300
-Subject: [PATCH 135/299] arm64: dts: m3ulcb: enable EXTALR clk
-
-This enables EXTALR clock that can be used for the watchdog.
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7be98b473d407583d29baad10df50639fd63b213)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-@@ -60,6 +60,10 @@
- 	clock-frequency = <16666666>;
- };
- 
-+&extalr_clk {
-+	clock-frequency = <32768>;
-+};
-+
- &pfc {
- 	pinctrl-0 = <&scif_clk_pins>;
- 	pinctrl-names = "default";
diff --git a/patches.renesas/0135-sh_eth-rename-EESIPR-bits.patch b/patches.renesas/0135-sh_eth-rename-EESIPR-bits.patch
deleted file mode 100644
index 0b0fcb3eabe8b4..00000000000000
--- a/patches.renesas/0135-sh_eth-rename-EESIPR-bits.patch
+++ /dev/null
@@ -1,163 +0,0 @@
-From a6267861befde50cf80aa74195f0854b914a6b38 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 29 Jan 2017 15:07:34 +0300
-Subject: [PATCH 135/255] sh_eth: rename EESIPR bits
-
-Since the  commit  b0ca2a21f769 ("sh_eth: Add support of SH7763 to sh_eth")
-the *enum* declaring the EESIPR bits (interrupt mask) went out of sync with
-the *enum* declaring the EESR bits (interrupt status) WRT  bit naming  and
-formatting. I'd like to restore the consistency by using EESIPR as the bit
-name prefix, renaming the *enum* to EESIPR_BIT, and (finally) renaming the
-bits according to the available  Renesas SH77{34|63} manuals; additionally,
-reconstruct  couple names using  the EESR bit declaration above...
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 1a0bee6c1e788218fd1d141db320db970aace7f0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |   22 ++++++++++----------
- drivers/net/ethernet/renesas/sh_eth.h |   36 +++++++++++++++++++++-------------
- 2 files changed, 34 insertions(+), 24 deletions(-)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -556,7 +556,7 @@ static struct sh_eth_cpu_data r8a7740_da
- 
- 	.ecsr_value	= ECSR_ICD | ECSR_MPD,
- 	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
--	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP | 0x003fffff,
- 
- 	.tx_check	= EESR_TC1 | EESR_FTC,
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
-@@ -702,7 +702,7 @@ static struct sh_eth_cpu_data sh7757_dat
- 
- 	.register_type	= SH_ETH_REG_FAST_SH4,
- 
--	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP | 0x003fffff,
- 
- 	.tx_check	= EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
- 	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
-@@ -769,7 +769,7 @@ static struct sh_eth_cpu_data sh7757_dat
- 
- 	.ecsr_value	= ECSR_ICD | ECSR_MPD,
- 	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
--	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP | 0x003fffff,
- 
- 	.tx_check	= EESR_TC1 | EESR_FTC,
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
-@@ -800,7 +800,7 @@ static struct sh_eth_cpu_data sh7734_dat
- 
- 	.ecsr_value	= ECSR_ICD | ECSR_MPD,
- 	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
--	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003f07ff,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP | 0x003f07ff,
- 
- 	.tx_check	= EESR_TC1 | EESR_FTC,
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
-@@ -830,7 +830,7 @@ static struct sh_eth_cpu_data sh7763_dat
- 
- 	.ecsr_value	= ECSR_ICD | ECSR_MPD,
- 	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
--	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003f07ff,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP | 0x003f07ff,
- 
- 	.tx_check	= EESR_TC1 | EESR_FTC,
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
-@@ -851,7 +851,7 @@ static struct sh_eth_cpu_data sh7763_dat
- static struct sh_eth_cpu_data sh7619_data = {
- 	.register_type	= SH_ETH_REG_FAST_SH3_SH2,
- 
--	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP | 0x003fffff,
- 
- 	.apr		= 1,
- 	.mpr		= 1,
-@@ -862,7 +862,7 @@ static struct sh_eth_cpu_data sh7619_dat
- static struct sh_eth_cpu_data sh771x_data = {
- 	.register_type	= SH_ETH_REG_FAST_SH3_SH2,
- 
--	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP | 0x003fffff,
- 	.tsu		= 1,
- };
- 
-@@ -1559,10 +1559,10 @@ static void sh_eth_emac_interrupt(struct
- 			sh_eth_rcv_snd_disable(ndev);
- 		} else {
- 			/* Link Up */
--			sh_eth_modify(ndev, EESIPR, DMAC_M_ECI, 0);
-+			sh_eth_modify(ndev, EESIPR, EESIPR_ECIIP, 0);
- 			/* clear int */
- 			sh_eth_modify(ndev, ECSR, 0, 0);
--			sh_eth_modify(ndev, EESIPR, DMAC_M_ECI, DMAC_M_ECI);
-+			sh_eth_modify(ndev, EESIPR, EESIPR_ECIIP, EESIPR_ECIIP);
- 			/* enable tx and rx */
- 			sh_eth_rcv_snd_enable(ndev);
- 		}
-@@ -1664,7 +1664,7 @@ static irqreturn_t sh_eth_interrupt(int
- 	 * bit...
- 	 */
- 	intr_enable = sh_eth_read(ndev, EESIPR);
--	intr_status &= intr_enable | DMAC_M_ECI;
-+	intr_status &= intr_enable | EESIPR_ECIIP;
- 	if (intr_status & (EESR_RX_CHECK | cd->tx_check | EESR_ECI |
- 			   cd->eesr_err_check))
- 		ret = IRQ_HANDLED;
-@@ -3205,7 +3205,7 @@ static int sh_eth_wol_setup(struct net_d
- 	/* Only allow ECI interrupts */
- 	synchronize_irq(ndev->irq);
- 	napi_disable(&mdp->napi);
--	sh_eth_write(ndev, DMAC_M_ECI, EESIPR);
-+	sh_eth_write(ndev, EESIPR_ECIIP, EESIPR);
- 
- 	/* Enable MagicPacket */
- 	sh_eth_modify(ndev, ECMR, 0, ECMR_MPDE);
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -268,19 +268,29 @@ enum EESR_BIT {
- 				 EESR_TFE | EESR_TDE)
- 
- /* EESIPR */
--enum DMAC_IM_BIT {
--	DMAC_M_TWB = 0x40000000, DMAC_M_TABT = 0x04000000,
--	DMAC_M_RABT = 0x02000000,
--	DMAC_M_RFRMER = 0x01000000, DMAC_M_ADF = 0x00800000,
--	DMAC_M_ECI = 0x00400000, DMAC_M_FTC = 0x00200000,
--	DMAC_M_TDE = 0x00100000, DMAC_M_TFE = 0x00080000,
--	DMAC_M_FRC = 0x00040000, DMAC_M_RDE = 0x00020000,
--	DMAC_M_RFE = 0x00010000, DMAC_M_TINT4 = 0x00000800,
--	DMAC_M_TINT3 = 0x00000400, DMAC_M_TINT2 = 0x00000200,
--	DMAC_M_TINT1 = 0x00000100, DMAC_M_RINT8 = 0x00000080,
--	DMAC_M_RINT5 = 0x00000010, DMAC_M_RINT4 = 0x00000008,
--	DMAC_M_RINT3 = 0x00000004, DMAC_M_RINT2 = 0x00000002,
--	DMAC_M_RINT1 = 0x00000001,
-+enum EESIPR_BIT {
-+	EESIPR_TWBIP	= 0x40000000,
-+	EESIPR_TABTIP	= 0x04000000,
-+	EESIPR_RABTIP	= 0x02000000,
-+	EESIPR_RFCOFIP	= 0x01000000,
-+	EESIPR_ADEIP	= 0x00800000,
-+	EESIPR_ECIIP	= 0x00400000,
-+	EESIPR_FTCIP	= 0x00200000,
-+	EESIPR_TDEIP	= 0x00100000,
-+	EESIPR_TFUFIP	= 0x00080000,
-+	EESIPR_FRIP	= 0x00040000,
-+	EESIPR_RDEIP	= 0x00020000,
-+	EESIPR_RFOFIP	= 0x00010000,
-+	EESIPR_CNDIP	= 0x00000800,
-+	EESIPR_DLCIP	= 0x00000400,
-+	EESIPR_CDIP	= 0x00000200,
-+	EESIPR_TROIP	= 0x00000100,
-+	EESIPR_RMAFIP	= 0x00000080,
-+	EESIPR_RRFIP	= 0x00000010,
-+	EESIPR_RTLFIP	= 0x00000008,
-+	EESIPR_RTSFIP	= 0x00000004,
-+	EESIPR_PREIP	= 0x00000002,
-+	EESIPR_CERFIP	= 0x00000001,
- };
- 
- /* Receive descriptor 0 bits */
diff --git a/patches.renesas/0135-usb-gadget-udc-renesas_usb3-add-support-for-usb-role.patch b/patches.renesas/0135-usb-gadget-udc-renesas_usb3-add-support-for-usb-role.patch
deleted file mode 100644
index 84ed12964ba5e8..00000000000000
--- a/patches.renesas/0135-usb-gadget-udc-renesas_usb3-add-support-for-usb-role.patch
+++ /dev/null
@@ -1,152 +0,0 @@
-From cc28c666d14e15e9d69e351da1c98439aab737e0 Mon Sep 17 00:00:00 2001
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Date: Fri, 31 Mar 2017 12:58:05 +0900
-Subject: [PATCH 135/286] usb: gadget: udc: renesas_usb3: add support for usb
- role swap
-
-This patch adds support for usb role swap via sysfs "role".
-
-For example:
- 1) Connect a usb cable using 2 Salvator-X boards.
-  - For A-Device, the cable is connected to CN11 (USB3.0 ch0).
-  - For B-Device, the cable is connected to CN9 (USB2.0 ch0).
- 2) On A-Device, you input the following command:
-  # echo peripheral > /sys/devices/platform/soc/ee020000.usb/role
- 3) On B-Device, you input the following command:
-  # echo host > /sys/devices/platform/soc/ee080200.usb-phy/role
-
-Then, the A-Device acts as a peripheral and the B-Device acts as
-a host. Please note that A-Device must input the following command
-if you want the board to act as a host again.
- # echo host > /sys/devices/platform/soc/ee020000.usb/role
-
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-(cherry picked from commit cc995c9ec1184b964ffdf8cf242250bb4319cd91)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/usb/gadget/udc/renesas_usb3.c
----
- Documentation/ABI/testing/sysfs-platform-renesas_usb3 |   15 ++++
- drivers/usb/gadget/udc/renesas_usb3.c                 |   56 ++++++++++++++++++
- 2 files changed, 71 insertions(+)
- create mode 100644 Documentation/ABI/testing/sysfs-platform-renesas_usb3
-
---- /dev/null
-+++ b/Documentation/ABI/testing/sysfs-platform-renesas_usb3
-@@ -0,0 +1,15 @@
-+What:		/sys/devices/platform/<renesas_usb3's name>/role
-+Date:		March 2017
-+KernelVersion:	4.13
-+Contact:	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-+Description:
-+		This file can be read and write.
-+		The file can show/change the drd mode of usb.
-+
-+		Write the following string to change the mode:
-+		 "host" - switching mode from peripheral to host.
-+		 "peripheral" - switching mode from host to peripheral.
-+
-+		Read the file, then it shows the following strings:
-+		 "host" - The mode is host now.
-+		 "peripheral" - The mode is peripheral now.
---- a/drivers/usb/gadget/udc/renesas_usb3.c
-+++ b/drivers/usb/gadget/udc/renesas_usb3.c
-@@ -372,6 +372,11 @@ static void usb3_disable_pipe_irq(struct
- 	usb3_clear_bit(usb3, USB_INT_2_PIPE(num), USB3_USB_INT_ENA_2);
- }
- 
-+static bool usb3_is_host(struct renesas_usb3 *usb3)
-+{
-+	return !(usb3_read(usb3, USB3_DRD_CON) & DRD_CON_PERI_CON);
-+}
-+
- static void usb3_init_axi_bridge(struct renesas_usb3 *usb3)
- {
- 	/* Set AXI_INT */
-@@ -583,8 +588,14 @@ static void usb3_vbus_out(struct renesas
- 
- static void usb3_mode_config(struct renesas_usb3 *usb3, bool host, bool a_dev)
- {
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&usb3->lock, flags);
- 	usb3_set_mode(usb3, host);
- 	usb3_vbus_out(usb3, a_dev);
-+	if (!host && a_dev)		/* for A-Peripheral */
-+		usb3_connect(usb3);
-+	spin_unlock_irqrestore(&usb3->lock, flags);
- }
- 
- static bool usb3_is_a_device(struct renesas_usb3 *usb3)
-@@ -1891,11 +1902,49 @@ static const struct usb_gadget_ops renes
- 	.set_selfpowered	= renesas_usb3_set_selfpowered,
- };
- 
-+static ssize_t role_store(struct device *dev, struct device_attribute *attr,
-+			  const char *buf, size_t count)
-+{
-+	struct renesas_usb3 *usb3 = dev_get_drvdata(dev);
-+	bool new_mode_is_host;
-+
-+	if (!usb3->driver)
-+		return -ENODEV;
-+
-+	if (!strncmp(buf, "host", strlen("host")))
-+		new_mode_is_host = true;
-+	else if (!strncmp(buf, "peripheral", strlen("peripheral")))
-+		new_mode_is_host = false;
-+	else
-+		return -EINVAL;
-+
-+	if (new_mode_is_host == usb3_is_host(usb3))
-+		return -EINVAL;
-+
-+	usb3_mode_config(usb3, new_mode_is_host, usb3_is_a_device(usb3));
-+
-+	return count;
-+}
-+
-+static ssize_t role_show(struct device *dev, struct device_attribute *attr,
-+			 char *buf)
-+{
-+	struct renesas_usb3 *usb3 = dev_get_drvdata(dev);
-+
-+	if (!usb3->driver)
-+		return -ENODEV;
-+
-+	return sprintf(buf, "%s\n", usb3_is_host(usb3) ? "host" : "peripheral");
-+}
-+static DEVICE_ATTR_RW(role);
-+
- /*------- platform_driver ------------------------------------------------*/
- static int renesas_usb3_remove(struct platform_device *pdev)
- {
- 	struct renesas_usb3 *usb3 = platform_get_drvdata(pdev);
- 
-+	device_remove_file(&pdev->dev, &dev_attr_role);
-+
- 	usb_del_gadget_udc(&usb3->gadget);
- 
- 	__renesas_usb3_ep_free_request(usb3->ep0_req);
-@@ -2095,12 +2144,19 @@ static int renesas_usb3_probe(struct pla
- 	if (ret < 0)
- 		goto err_add_udc;
- 
-+	ret = device_create_file(&pdev->dev, &dev_attr_role);
-+	if (ret < 0)
-+		goto err_dev_create;
-+
- 	usb3->workaround_for_vbus = priv->workaround_for_vbus;
- 
- 	dev_info(&pdev->dev, "probed\n");
- 
- 	return 0;
- 
-+err_dev_create:
-+	usb_del_gadget_udc(&usb3->gadget);
-+
- err_add_udc:
- 	__renesas_usb3_ep_free_request(usb3->ep0_req);
- 
diff --git a/patches.renesas/0136-arm64-dts-m3ulcb-enable-WDT.patch b/patches.renesas/0136-arm64-dts-m3ulcb-enable-WDT.patch
deleted file mode 100644
index ca7b80148255f3..00000000000000
--- a/patches.renesas/0136-arm64-dts-m3ulcb-enable-WDT.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 089ca605ca48326332893e0f641c8f3922c33b70 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 3 Nov 2016 21:08:12 +0300
-Subject: [PATCH 136/299] arm64: dts: m3ulcb: enable WDT
-
-This supports watchdog timer for M3ULCB board
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 31e12cb663b0392c9dda1c6edf0c4b22bf15232d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-@@ -90,3 +90,8 @@
- 	clock-frequency = <14745600>;
- 	status = "okay";
- };
-+
-+&wdt0 {
-+	timeout-sec = <60>;
-+	status = "okay";
-+};
diff --git a/patches.renesas/0136-sh_eth-add-missing-EESIPR-bits.patch b/patches.renesas/0136-sh_eth-add-missing-EESIPR-bits.patch
deleted file mode 100644
index a6a0cf440a8781..00000000000000
--- a/patches.renesas/0136-sh_eth-add-missing-EESIPR-bits.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 26ecbecd6029de480455b69fd8b37017a08f6be4 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 29 Jan 2017 15:08:09 +0300
-Subject: [PATCH 136/255] sh_eth: add missing EESIPR bits
-
-Renesas SH77{34|63} manuals  describe more EESIPR bits than the current
-driver. Declare the new bits with the end goal of using the bit names
-instead of the bare numbers  for  the 'sh_eth_cpu_data::eesipr_value'
-initializers...
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 00300b2aac27556e2829cfd047b787af0f13b081)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.h |   10 ++++++++--
- 1 file changed, 8 insertions(+), 2 deletions(-)
-
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -269,13 +269,17 @@ enum EESR_BIT {
- 
- /* EESIPR */
- enum EESIPR_BIT {
--	EESIPR_TWBIP	= 0x40000000,
-+	EESIPR_TWB1IP	= 0x80000000,
-+	EESIPR_TWBIP	= 0x40000000,	/* same as TWB0IP */
-+	EESIPR_TC1IP	= 0x20000000,
-+	EESIPR_TUCIP	= 0x10000000,
-+	EESIPR_ROCIP	= 0x08000000,
- 	EESIPR_TABTIP	= 0x04000000,
- 	EESIPR_RABTIP	= 0x02000000,
- 	EESIPR_RFCOFIP	= 0x01000000,
- 	EESIPR_ADEIP	= 0x00800000,
- 	EESIPR_ECIIP	= 0x00400000,
--	EESIPR_FTCIP	= 0x00200000,
-+	EESIPR_FTCIP	= 0x00200000,	/* same as TC0IP */
- 	EESIPR_TDEIP	= 0x00100000,
- 	EESIPR_TFUFIP	= 0x00080000,
- 	EESIPR_FRIP	= 0x00040000,
-@@ -286,6 +290,8 @@ enum EESIPR_BIT {
- 	EESIPR_CDIP	= 0x00000200,
- 	EESIPR_TROIP	= 0x00000100,
- 	EESIPR_RMAFIP	= 0x00000080,
-+	EESIPR_CEEFIP	= 0x00000040,
-+	EESIPR_CELFIP	= 0x00000020,
- 	EESIPR_RRFIP	= 0x00000010,
- 	EESIPR_RTLFIP	= 0x00000008,
- 	EESIPR_RTSFIP	= 0x00000004,
diff --git a/patches.renesas/0136-usb-gadget-udc-renesas_usb3-fix-pm_runtime-functions.patch b/patches.renesas/0136-usb-gadget-udc-renesas_usb3-fix-pm_runtime-functions.patch
deleted file mode 100644
index 1f0c69315334ad..00000000000000
--- a/patches.renesas/0136-usb-gadget-udc-renesas_usb3-fix-pm_runtime-functions.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 56d576361b399fa7936be32c5b4c4d0927c48351 Mon Sep 17 00:00:00 2001
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Date: Wed, 26 Apr 2017 20:50:07 +0900
-Subject: [PATCH 136/286] usb: gadget: udc: renesas_usb3: fix pm_runtime
- functions calling
-
-This patch fixes an issue that this driver is possible to access
-the registers before pm_runtime_get_sync() if a gadget driver is
-installed first. After that, oops happens on R-Car Gen3 environment.
-To avoid it, this patch changes the pm_runtime call timing from
-probe/remove to udc_start/udc_stop.
-
-Fixes: 746bfe63bba3 ("usb: gadget: renesas_usb3: add support for Renesas USB3.0 peripheral controller")
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-(cherry picked from commit cdc876877ebc3f0677b267756d4564e2a429e730)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/gadget/udc/renesas_usb3.c |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/drivers/usb/gadget/udc/renesas_usb3.c
-+++ b/drivers/usb/gadget/udc/renesas_usb3.c
-@@ -1870,6 +1870,9 @@ static int renesas_usb3_stop(struct usb_
- 	pm_runtime_put(usb3_to_dev(usb3));
- 	pm_runtime_disable(usb3_to_dev(usb3));
- 
-+	pm_runtime_put(usb3_to_dev(usb3));
-+	pm_runtime_disable(usb3_to_dev(usb3));
-+
- 	return 0;
- }
- 
diff --git a/patches.renesas/0137-arm64-dts-m3ulcb-enable-SDHI0.patch b/patches.renesas/0137-arm64-dts-m3ulcb-enable-SDHI0.patch
deleted file mode 100644
index a360ba05cafbb9..00000000000000
--- a/patches.renesas/0137-arm64-dts-m3ulcb-enable-SDHI0.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 8c1a354dbb8e44d73ed2e1d335ac1c213312b4ac Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Tue, 8 Nov 2016 17:14:21 +0300
-Subject: [PATCH 137/299] arm64: dts: m3ulcb: enable SDHI0
-
-This supports SDHI0 on M3ULCB board SD card slot
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5be54db85872fddf060ccec962a50b40d3b24625)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts |   49 +++++++++++++++++++++++++
- 1 file changed, 49 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-@@ -54,6 +54,30 @@
- 			gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
- 		};
- 	};
-+
-+	vcc_sdhi0: regulator-vcc-sdhi0 {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "SDHI0 Vcc";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+	};
-+
-+	vccq_sdhi0: regulator-vccq-sdhi0 {
-+		compatible = "regulator-gpio";
-+
-+		regulator-name = "SDHI0 VccQ";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
-+		gpios-states = <1>;
-+		states = <3300000 1
-+			  1800000 0>;
-+	};
- };
- 
- &extal_clk {
-@@ -77,6 +101,31 @@
- 		groups = "scif_clk_a";
- 		function = "scif_clk";
- 	};
-+
-+	sdhi0_pins: sd0 {
-+		groups = "sdhi0_data4", "sdhi0_ctrl";
-+		function = "sdhi0";
-+		power-source = <3300>;
-+	};
-+
-+	sdhi0_pins_uhs: sd0_uhs {
-+		groups = "sdhi0_data4", "sdhi0_ctrl";
-+		function = "sdhi0";
-+		power-source = <1800>;
-+	};
-+};
-+
-+&sdhi0 {
-+	pinctrl-0 = <&sdhi0_pins>;
-+	pinctrl-1 = <&sdhi0_pins_uhs>;
-+	pinctrl-names = "default", "state_uhs";
-+
-+	vmmc-supply = <&vcc_sdhi0>;
-+	vqmmc-supply = <&vccq_sdhi0>;
-+	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
-+	bus-width = <4>;
-+	sd-uhs-sdr50;
-+	status = "okay";
- };
- 
- &scif2 {
diff --git a/patches.renesas/0137-sh_eth-stop-using-bare-numbers-for-EESIPR-values.patch b/patches.renesas/0137-sh_eth-stop-using-bare-numbers-for-EESIPR-values.patch
deleted file mode 100644
index 485cfd81c7183b..00000000000000
--- a/patches.renesas/0137-sh_eth-stop-using-bare-numbers-for-EESIPR-values.patch
+++ /dev/null
@@ -1,189 +0,0 @@
-From d0255e529160e52320a2a30d9b7ed69fde33f5a6 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 29 Jan 2017 15:13:48 +0300
-Subject: [PATCH 137/255] sh_eth: stop using bare numbers for EESIPR values
-
-Now  that we  have almost all EESIPR bits declared (and those  that are
-still not are most probably reserved anyway) we can at last replace the
-bare  numbers used for 'sh_eth_cpu_data::eesipr_value' initializers with
-the bit names ORed together...
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 2b2d3eb41c920b47df2fcedd1489cf748bd09466)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |   91 +++++++++++++++++++++++++++++-----
- 1 file changed, 80 insertions(+), 11 deletions(-)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -518,7 +518,14 @@ static struct sh_eth_cpu_data r7s72100_d
- 
- 	.ecsr_value	= ECSR_ICD,
- 	.ecsipr_value	= ECSIPR_ICDIP,
--	.eesipr_value	= 0xe77f009f,
-+	.eesipr_value	= EESIPR_TWB1IP | EESIPR_TWBIP | EESIPR_TC1IP |
-+			  EESIPR_TABTIP | EESIPR_RABTIP | EESIPR_RFCOFIP |
-+			  EESIPR_ECIIP |
-+			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |
-+			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |
-+			  EESIPR_RMAFIP | EESIPR_RRFIP |
-+			  EESIPR_RTLFIP | EESIPR_RTSFIP |
-+			  EESIPR_PREIP | EESIPR_CERFIP,
- 
- 	.tx_check	= EESR_TC1 | EESR_FTC,
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
-@@ -556,7 +563,14 @@ static struct sh_eth_cpu_data r8a7740_da
- 
- 	.ecsr_value	= ECSR_ICD | ECSR_MPD,
- 	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
--	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP | 0x003fffff,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |
-+			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |
-+			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |
-+			  0x0000f000 | EESIPR_CNDIP | EESIPR_DLCIP |
-+			  EESIPR_CDIP | EESIPR_TROIP | EESIPR_RMAFIP |
-+			  EESIPR_CEEFIP | EESIPR_CELFIP |
-+			  EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
-+			  EESIPR_PREIP | EESIPR_CERFIP,
- 
- 	.tx_check	= EESR_TC1 | EESR_FTC,
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
-@@ -603,7 +617,12 @@ static struct sh_eth_cpu_data r8a777x_da
- 
- 	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
- 	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
--	.eesipr_value	= 0x01ff009f,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ADEIP | EESIPR_ECIIP |
-+			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |
-+			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |
-+			  EESIPR_RMAFIP | EESIPR_RRFIP |
-+			  EESIPR_RTLFIP | EESIPR_RTSFIP |
-+			  EESIPR_PREIP | EESIPR_CERFIP,
- 
- 	.tx_check	= EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
- 	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
-@@ -626,7 +645,12 @@ static struct sh_eth_cpu_data r8a779x_da
- 	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD | ECSR_MPD,
- 	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP |
- 			  ECSIPR_MPDIP,
--	.eesipr_value	= 0x01ff009f,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ADEIP | EESIPR_ECIIP |
-+			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |
-+			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |
-+			  EESIPR_RMAFIP | EESIPR_RRFIP |
-+			  EESIPR_RTLFIP | EESIPR_RTSFIP |
-+			  EESIPR_PREIP | EESIPR_CERFIP,
- 
- 	.tx_check	= EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
- 	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
-@@ -667,7 +691,12 @@ static struct sh_eth_cpu_data sh7724_dat
- 
- 	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
- 	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
--	.eesipr_value	= 0x01ff009f,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ADEIP | EESIPR_ECIIP |
-+			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |
-+			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |
-+			  EESIPR_RMAFIP | EESIPR_RRFIP |
-+			  EESIPR_RTLFIP | EESIPR_RTSFIP |
-+			  EESIPR_PREIP | EESIPR_CERFIP,
- 
- 	.tx_check	= EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
- 	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
-@@ -702,7 +731,14 @@ static struct sh_eth_cpu_data sh7757_dat
- 
- 	.register_type	= SH_ETH_REG_FAST_SH4,
- 
--	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP | 0x003fffff,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |
-+			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |
-+			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |
-+			  0x0000f000 | EESIPR_CNDIP | EESIPR_DLCIP |
-+			  EESIPR_CDIP | EESIPR_TROIP | EESIPR_RMAFIP |
-+			  EESIPR_CEEFIP | EESIPR_CELFIP |
-+			  EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
-+			  EESIPR_PREIP | EESIPR_CERFIP,
- 
- 	.tx_check	= EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
- 	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
-@@ -769,7 +805,14 @@ static struct sh_eth_cpu_data sh7757_dat
- 
- 	.ecsr_value	= ECSR_ICD | ECSR_MPD,
- 	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
--	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP | 0x003fffff,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |
-+			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |
-+			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |
-+			  0x0000f000 | EESIPR_CNDIP | EESIPR_DLCIP |
-+			  EESIPR_CDIP | EESIPR_TROIP | EESIPR_RMAFIP |
-+			  EESIPR_CEEFIP | EESIPR_CELFIP |
-+			  EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
-+			  EESIPR_PREIP | EESIPR_CERFIP,
- 
- 	.tx_check	= EESR_TC1 | EESR_FTC,
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
-@@ -800,7 +843,13 @@ static struct sh_eth_cpu_data sh7734_dat
- 
- 	.ecsr_value	= ECSR_ICD | ECSR_MPD,
- 	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
--	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP | 0x003f07ff,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |
-+			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |
-+			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |
-+			  EESIPR_DLCIP | EESIPR_CDIP | EESIPR_TROIP |
-+			  EESIPR_RMAFIP | EESIPR_CEEFIP | EESIPR_CELFIP |
-+			  EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
-+			  EESIPR_PREIP | EESIPR_CERFIP,
- 
- 	.tx_check	= EESR_TC1 | EESR_FTC,
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
-@@ -830,7 +879,13 @@ static struct sh_eth_cpu_data sh7763_dat
- 
- 	.ecsr_value	= ECSR_ICD | ECSR_MPD,
- 	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
--	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP | 0x003f07ff,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |
-+			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |
-+			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |
-+			  EESIPR_DLCIP | EESIPR_CDIP | EESIPR_TROIP |
-+			  EESIPR_RMAFIP | EESIPR_CEEFIP | EESIPR_CELFIP |
-+			  EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
-+			  EESIPR_PREIP | EESIPR_CERFIP,
- 
- 	.tx_check	= EESR_TC1 | EESR_FTC,
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
-@@ -851,7 +906,14 @@ static struct sh_eth_cpu_data sh7763_dat
- static struct sh_eth_cpu_data sh7619_data = {
- 	.register_type	= SH_ETH_REG_FAST_SH3_SH2,
- 
--	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP | 0x003fffff,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |
-+			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |
-+			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |
-+			  0x0000f000 | EESIPR_CNDIP | EESIPR_DLCIP |
-+			  EESIPR_CDIP | EESIPR_TROIP | EESIPR_RMAFIP |
-+			  EESIPR_CEEFIP | EESIPR_CELFIP |
-+			  EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
-+			  EESIPR_PREIP | EESIPR_CERFIP,
- 
- 	.apr		= 1,
- 	.mpr		= 1,
-@@ -862,7 +924,14 @@ static struct sh_eth_cpu_data sh7619_dat
- static struct sh_eth_cpu_data sh771x_data = {
- 	.register_type	= SH_ETH_REG_FAST_SH3_SH2,
- 
--	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP | 0x003fffff,
-+	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |
-+			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |
-+			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |
-+			  0x0000f000 | EESIPR_CNDIP | EESIPR_DLCIP |
-+			  EESIPR_CDIP | EESIPR_TROIP | EESIPR_RMAFIP |
-+			  EESIPR_CEEFIP | EESIPR_CELFIP |
-+			  EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
-+			  EESIPR_PREIP | EESIPR_CERFIP,
- 	.tsu		= 1,
- };
- 
diff --git a/patches.renesas/0137-usb-gadget-udc-renesas_usb3-fix-deadlock-by-spinlock.patch b/patches.renesas/0137-usb-gadget-udc-renesas_usb3-fix-deadlock-by-spinlock.patch
deleted file mode 100644
index 9cf92fb63a9674..00000000000000
--- a/patches.renesas/0137-usb-gadget-udc-renesas_usb3-fix-deadlock-by-spinlock.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From f4c60efb4fc4269eebae46ec0e348ee5ad51a49b Mon Sep 17 00:00:00 2001
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Date: Wed, 26 Apr 2017 20:50:08 +0900
-Subject: [PATCH 137/286] usb: gadget: udc: renesas_usb3: fix deadlock by
- spinlock
-
-This patch fixes an issue that this driver is possible to cause
-deadlock by double-spinclocked in renesas_usb3_stop_controller().
-So, this patch removes spinlock API calling in renesas_usb3_stop().
-(In other words, the previous code had a redundant lock.)
-
-Fixes: 746bfe63bba3 ("usb: gadget: renesas_usb3: add support for Renesas USB3.0 peripheral controller")
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-(cherry picked from commit 067d6fdc558d2c43f0bfdc7af99630dd5eb08dc5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/usb/gadget/udc/renesas_usb3.c
----
- drivers/usb/gadget/udc/renesas_usb3.c |    3 ---
- 1 file changed, 3 deletions(-)
-
---- a/drivers/usb/gadget/udc/renesas_usb3.c
-+++ b/drivers/usb/gadget/udc/renesas_usb3.c
-@@ -1870,9 +1870,6 @@ static int renesas_usb3_stop(struct usb_
- 	pm_runtime_put(usb3_to_dev(usb3));
- 	pm_runtime_disable(usb3_to_dev(usb3));
- 
--	pm_runtime_put(usb3_to_dev(usb3));
--	pm_runtime_disable(usb3_to_dev(usb3));
--
- 	return 0;
- }
- 
diff --git a/patches.renesas/0138-arm64-dts-m3ulcb-enable-SDHI2.patch b/patches.renesas/0138-arm64-dts-m3ulcb-enable-SDHI2.patch
deleted file mode 100644
index d9bdb31507b2fb..00000000000000
--- a/patches.renesas/0138-arm64-dts-m3ulcb-enable-SDHI2.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 10210cd97a3b21235822d271acf105c4daaca13d Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Tue, 8 Nov 2016 17:14:42 +0300
-Subject: [PATCH 138/299] arm64: dts: m3ulcb: enable SDHI2
-
-This supports SDHI2 for M3ULCB onboard eMMC
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fd51baee7abc388916b3e3b58dc062ef9c534150)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts |   43 +++++++++++++++++++++++++
- 1 file changed, 43 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
-@@ -55,6 +55,24 @@
- 		};
- 	};
- 
-+	reg_1p8v: regulator0 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-1.8V";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+
-+	reg_3p3v: regulator1 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-3.3V";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+
- 	vcc_sdhi0: regulator-vcc-sdhi0 {
- 		compatible = "regulator-fixed";
- 
-@@ -113,6 +131,18 @@
- 		function = "sdhi0";
- 		power-source = <1800>;
- 	};
-+
-+	sdhi2_pins: sd2 {
-+		groups = "sdhi2_data8", "sdhi2_ctrl";
-+		function = "sdhi2";
-+		power-source = <3300>;
-+	};
-+
-+	sdhi2_pins_uhs: sd2_uhs {
-+		groups = "sdhi2_data8", "sdhi2_ctrl";
-+		function = "sdhi2";
-+		power-source = <1800>;
-+	};
- };
- 
- &sdhi0 {
-@@ -128,6 +158,19 @@
- 	status = "okay";
- };
- 
-+&sdhi2 {
-+	/* used for on-board 8bit eMMC */
-+	pinctrl-0 = <&sdhi2_pins>;
-+	pinctrl-1 = <&sdhi2_pins_uhs>;
-+	pinctrl-names = "default", "state_uhs";
-+
-+	vmmc-supply = <&reg_3p3v>;
-+	vqmmc-supply = <&reg_1p8v>;
-+	bus-width = <8>;
-+	non-removable;
-+	status = "okay";
-+};
-+
- &scif2 {
- 	pinctrl-0 = <&scif2_pins>;
- 	pinctrl-names = "default";
diff --git a/patches.renesas/0138-sh_eth-align-usage-of-sh_eth_modify-with-rest-of-dri.patch b/patches.renesas/0138-sh_eth-align-usage-of-sh_eth_modify-with-rest-of-dri.patch
deleted file mode 100644
index c4b3ce73de0d61..00000000000000
--- a/patches.renesas/0138-sh_eth-align-usage-of-sh_eth_modify-with-rest-of-dri.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 30310fbf294abeb239bef88dfdfd33ce1e230f1c Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Wed, 1 Feb 2017 15:41:54 +0100
-Subject: [PATCH 138/255] sh_eth: align usage of sh_eth_modify() with rest of
- driver
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-To be consistent with the rest of the driver when setting bits using
-sh_eth_modify() the same bit should also be cleared. This have no
-functional change and should have been done from the start.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Suggested-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 5e2ed1329ee074229d5a2f4389035be818120980)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -3277,7 +3277,7 @@ static int sh_eth_wol_setup(struct net_d
- 	sh_eth_write(ndev, EESIPR_ECIIP, EESIPR);
- 
- 	/* Enable MagicPacket */
--	sh_eth_modify(ndev, ECMR, 0, ECMR_MPDE);
-+	sh_eth_modify(ndev, ECMR, ECMR_MPDE, ECMR_MPDE);
- 
- 	/* Increased clock usage so device won't be suspended */
- 	clk_enable(mdp->clk);
diff --git a/patches.renesas/0138-usb-gadget-udc-renesas_usb3-Fix-PN_INT_ENA-disabling.patch b/patches.renesas/0138-usb-gadget-udc-renesas_usb3-Fix-PN_INT_ENA-disabling.patch
deleted file mode 100644
index 0c4ae6dc377fa0..00000000000000
--- a/patches.renesas/0138-usb-gadget-udc-renesas_usb3-Fix-PN_INT_ENA-disabling.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From b34ed6237b6d70437330da9dcd93fdbf6e5ab4a4 Mon Sep 17 00:00:00 2001
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Date: Wed, 26 Apr 2017 20:50:10 +0900
-Subject: [PATCH 138/286] usb: gadget: udc: renesas_usb3: Fix PN_INT_ENA
- disabling timing
-
-The PN_INT_ENA register should be used after usb3_pn_change() is called.
-So, this patch moves the access from renesas_usb3_stop_controller() to
-usb3_disable_pipe_n().
-
-Fixes: 746bfe63bba3 ("usb: gadget: renesas_usb3: add support for Renesas USB3.0 peripheral controller")
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-(cherry picked from commit afbbc7913a288c29616bd31ae612548f6475151a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/gadget/udc/renesas_usb3.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/usb/gadget/udc/renesas_usb3.c
-+++ b/drivers/usb/gadget/udc/renesas_usb3.c
-@@ -630,7 +630,6 @@ static void renesas_usb3_stop_controller
- {
- 	usb3_disconnect(usb3);
- 	usb3_write(usb3, 0, USB3_P0_INT_ENA);
--	usb3_write(usb3, 0, USB3_PN_INT_ENA);
- 	usb3_write(usb3, 0, USB3_USB_OTG_INT_ENA);
- 	usb3_write(usb3, 0, USB3_USB_INT_ENA_1);
- 	usb3_write(usb3, 0, USB3_USB_INT_ENA_2);
-@@ -1711,6 +1710,7 @@ static int usb3_disable_pipe_n(struct re
- 
- 	spin_lock_irqsave(&usb3->lock, flags);
- 	if (!usb3_pn_change(usb3, usb3_ep->num)) {
-+		usb3_write(usb3, 0, USB3_PN_INT_ENA);
- 		usb3_write(usb3, 0, USB3_PN_RAMMAP);
- 		usb3_clear_bit(usb3, PN_CON_EN, USB3_PN_CON);
- 	}
diff --git a/patches.renesas/0139-arm64-dts-h3ulcb-enable-SDHI2.patch b/patches.renesas/0139-arm64-dts-h3ulcb-enable-SDHI2.patch
deleted file mode 100644
index 95ccd1c07cd0f5..00000000000000
--- a/patches.renesas/0139-arm64-dts-h3ulcb-enable-SDHI2.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 68662916b559606a96907789ad27b3058e8511fa Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Tue, 8 Nov 2016 17:16:19 +0300
-Subject: [PATCH 139/299] arm64: dts: h3ulcb: enable SDHI2
-
-This supports SDHI2 for H3ULCB onboard eMMC
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 274dc8916d4b4b2f6a2636e670771c806a7e6a96)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts |   43 +++++++++++++++++++++++++
- 1 file changed, 43 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-@@ -62,6 +62,24 @@
- 		clock-frequency = <24576000>;
- 	};
- 
-+	reg_1p8v: regulator0 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-1.8V";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+
-+	reg_3p3v: regulator1 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-3.3V";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+
- 	vcc_sdhi0: regulator-vcc-sdhi0 {
- 		compatible = "regulator-fixed";
- 
-@@ -157,6 +175,18 @@
- 		power-source = <1800>;
- 	};
- 
-+	sdhi2_pins: sd2 {
-+		groups = "sdhi2_data8", "sdhi2_ctrl";
-+		function = "sdhi2";
-+		power-source = <3300>;
-+	};
-+
-+	sdhi2_pins_uhs: sd2_uhs {
-+		groups = "sdhi2_data8", "sdhi2_ctrl";
-+		function = "sdhi2";
-+		power-source = <1800>;
-+	};
-+
- 	sound_pins: sound {
- 		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
- 		function = "ssi";
-@@ -273,6 +303,19 @@
- 	status = "okay";
- };
- 
-+&sdhi2 {
-+	/* used for on-board 8bit eMMC */
-+	pinctrl-0 = <&sdhi2_pins>;
-+	pinctrl-1 = <&sdhi2_pins_uhs>;
-+	pinctrl-names = "default", "state_uhs";
-+
-+	vmmc-supply = <&reg_3p3v>;
-+	vqmmc-supply = <&reg_1p8v>;
-+	bus-width = <8>;
-+	non-removable;
-+	status = "okay";
-+};
-+
- &ssi1 {
- 	shared-pin;
- };
diff --git a/patches.renesas/0139-media-v4l-vsp1-Fix-format-info-documentation.patch b/patches.renesas/0139-media-v4l-vsp1-Fix-format-info-documentation.patch
deleted file mode 100644
index 3e8eaab060af86..00000000000000
--- a/patches.renesas/0139-media-v4l-vsp1-Fix-format-info-documentation.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From cddde446001cdae0f52612b8bceed6d491d7cfa0 Mon Sep 17 00:00:00 2001
-From: Kieran Bingham <kieran@bingham.xyz>
-Date: Thu, 9 Jun 2016 14:57:02 -0300
-Subject: [PATCH 139/286] [media] v4l: vsp1: Fix format-info documentation
-
-Minor tweaks to document the swap register and make the documentation
-match the struct ordering
-
-Signed-off-by: Kieran Bingham <kieran@bingham.xyz>
-Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit f1450162544f5c4dc801c85bb28f64c0fa6146e7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_pipe.h |    5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
---- a/drivers/media/platform/vsp1/vsp1_pipe.h
-+++ b/drivers/media/platform/vsp1/vsp1_pipe.h
-@@ -25,11 +25,12 @@ struct vsp1_rwpf;
- 
- /*
-  * struct vsp1_format_info - VSP1 video format description
-- * @mbus: media bus format code
-  * @fourcc: V4L2 pixel format FCC identifier
-+ * @mbus: media bus format code
-+ * @hwfmt: VSP1 hardware format
-+ * @swap: swap register control
-  * @planes: number of planes
-  * @bpp: bits per pixel
-- * @hwfmt: VSP1 hardware format
-  * @swap_yc: the Y and C components are swapped (Y comes before C)
-  * @swap_uv: the U and V components are swapped (V comes before U)
-  * @hsub: horizontal subsampling factor
diff --git a/patches.renesas/0139-sh_eth-fix-wakeup-event-reporting-from-MagicPacket.patch b/patches.renesas/0139-sh_eth-fix-wakeup-event-reporting-from-MagicPacket.patch
deleted file mode 100644
index e6f78dab87c148..00000000000000
--- a/patches.renesas/0139-sh_eth-fix-wakeup-event-reporting-from-MagicPacket.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 58f11ee80caf5df895a4167e4298812f2fa995f0 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Wed, 1 Feb 2017 15:41:55 +0100
-Subject: [PATCH 139/255] sh_eth: fix wakeup event reporting from MagicPacket
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-If a link change interrupt happens along side the MagicPacket interrupt
-and the link change interrupt is ignored the interrupt handler will
-return and the wakeup event is not registered. Fix this by moving the
-MagicPacket check before the link change check.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 0cf45a3b1e2c47bbcc9e75cbed5c660492e297da)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -1617,6 +1617,8 @@ static void sh_eth_emac_interrupt(struct
- 	sh_eth_write(ndev, felic_stat, ECSR);	/* clear int */
- 	if (felic_stat & ECSR_ICD)
- 		ndev->stats.tx_carrier_errors++;
-+	if (felic_stat & ECSR_MPD)
-+		pm_wakeup_event(&mdp->pdev->dev, 0);
- 	if (felic_stat & ECSR_LCHNG) {
- 		/* Link Changed */
- 		if (mdp->cd->no_psr || mdp->no_ether_link)
-@@ -1636,8 +1638,6 @@ static void sh_eth_emac_interrupt(struct
- 			sh_eth_rcv_snd_enable(ndev);
- 		}
- 	}
--	if (felic_stat & ECSR_MPD)
--		pm_wakeup_event(&mdp->pdev->dev, 0);
- }
- 
- /* error control function */
diff --git a/patches.renesas/0140-arm64-dts-h3ulcb-rename-SDHI0-pins.patch b/patches.renesas/0140-arm64-dts-h3ulcb-rename-SDHI0-pins.patch
deleted file mode 100644
index 36c4bf6d6c1ab9..00000000000000
--- a/patches.renesas/0140-arm64-dts-h3ulcb-rename-SDHI0-pins.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From c8f98175fe89870994788ef723bdb9b2268c28f7 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Tue, 8 Nov 2016 17:16:29 +0300
-Subject: [PATCH 140/299] arm64: dts: h3ulcb: rename SDHI0 pins
-
-This changes SDHI0 pin names for H3ULCB board
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 93373c309a703b57690216db4106a4a534929c15)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts |    8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-@@ -163,13 +163,13 @@
- 		function = "avb";
- 	};
- 
--	sdhi0_pins_3v3: sd0_3v3 {
-+	sdhi0_pins: sd0 {
- 		groups = "sdhi0_data4", "sdhi0_ctrl";
- 		function = "sdhi0";
- 		power-source = <3300>;
- 	};
- 
--	sdhi0_pins_1v8: sd0_1v8 {
-+	sdhi0_pins_uhs: sd0 {
- 		groups = "sdhi0_data4", "sdhi0_ctrl";
- 		function = "sdhi0";
- 		power-source = <1800>;
-@@ -291,8 +291,8 @@
- };
- 
- &sdhi0 {
--	pinctrl-0 = <&sdhi0_pins_3v3>;
--	pinctrl-1 = <&sdhi0_pins_1v8>;
-+	pinctrl-0 = <&sdhi0_pins>;
-+	pinctrl-1 = <&sdhi0_pins_uhs>;
- 	pinctrl-names = "default", "state_uhs";
- 
- 	vmmc-supply = <&vcc_sdhi0>;
diff --git a/patches.renesas/0140-media-v4l-vsp1-Clean-up-file-handle-in-open-error-pa.patch b/patches.renesas/0140-media-v4l-vsp1-Clean-up-file-handle-in-open-error-pa.patch
deleted file mode 100644
index 9e49d119ab72b5..00000000000000
--- a/patches.renesas/0140-media-v4l-vsp1-Clean-up-file-handle-in-open-error-pa.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 54fe8c7437ac37e64bf09c65edf2d73aff9a4a43 Mon Sep 17 00:00:00 2001
-From: Shailendra Verma <shailendra.v@samsung.com>
-Date: Fri, 25 Nov 2016 03:07:57 -0200
-Subject: [PATCH 140/286] [media] v4l: vsp1: Clean up file handle in open()
- error path
-
-v4l2_fh_init is already done. So call the v4l2_fh_exit in error
-condition before returing from the function.
-
-Signed-off-by: Shailendra Verma <shailendra.v@samsung.com>
-Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit dadc3be66c282d4c2c917186447494ae79f7b79f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_video.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/media/platform/vsp1/vsp1_video.c
-+++ b/drivers/media/platform/vsp1/vsp1_video.c
-@@ -1063,6 +1063,7 @@ static int vsp1_video_open(struct file *
- 	ret = vsp1_device_get(video->vsp1);
- 	if (ret < 0) {
- 		v4l2_fh_del(vfh);
-+		v4l2_fh_exit(vfh);
- 		kfree(vfh);
- 	}
- 
diff --git a/patches.renesas/0140-mmc-sh_mmcif-Remove-unused-use_cd_gpio-cd_gpio-from-.patch b/patches.renesas/0140-mmc-sh_mmcif-Remove-unused-use_cd_gpio-cd_gpio-from-.patch
deleted file mode 100644
index 73e79a5e5fb669..00000000000000
--- a/patches.renesas/0140-mmc-sh_mmcif-Remove-unused-use_cd_gpio-cd_gpio-from-.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 42818e0eaad81d5c85d703f9b1af1002379a6547 Mon Sep 17 00:00:00 2001
-From: Ulf Hansson <ulf.hansson@linaro.org>
-Date: Fri, 30 Dec 2016 13:47:16 +0100
-Subject: [PATCH 140/255] mmc: sh_mmcif: Remove unused use_cd_gpio/cd_gpio from
- platform data
-
-Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 95cc4df716a210a19f0611215c49484d460250fd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mmcif.c  |    6 ------
- include/linux/mmc/sh_mmcif.h |    2 --
- 2 files changed, 8 deletions(-)
-
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -1509,12 +1509,6 @@ static int sh_mmcif_probe(struct platfor
- 		}
- 	}
- 
--	if (pd && pd->use_cd_gpio) {
--		ret = mmc_gpio_request_cd(mmc, pd->cd_gpio, 0);
--		if (ret < 0)
--			goto err_clk;
--	}
--
- 	mutex_init(&host->thread_lock);
- 
- 	ret = mmc_add_host(mmc);
---- a/include/linux/mmc/sh_mmcif.h
-+++ b/include/linux/mmc/sh_mmcif.h
-@@ -35,10 +35,8 @@ struct sh_mmcif_plat_data {
- 	int (*get_cd)(struct platform_device *pdef);
- 	unsigned int		slave_id_tx;	/* embedded slave_id_[tr]x */
- 	unsigned int		slave_id_rx;
--	bool			use_cd_gpio : 1;
- 	bool			ccs_unsupported : 1;
- 	bool			clk_ctrl2_present : 1;
--	unsigned int		cd_gpio;
- 	u8			sup_pclk;	/* 1 :SH7757, 0: SH7724/SH7372 */
- 	unsigned long		caps;
- 	u32			ocr;
diff --git a/patches.renesas/0141-arm64-dts-r8a7795-Add-device-node-for-PRR.patch b/patches.renesas/0141-arm64-dts-r8a7795-Add-device-node-for-PRR.patch
deleted file mode 100644
index 094aea1e8a0e30..00000000000000
--- a/patches.renesas/0141-arm64-dts-r8a7795-Add-device-node-for-PRR.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From aa834de7cee80c0d32d9371239aaa1ab1e7d25d6 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 14 Nov 2016 19:37:16 +0100
-Subject: [PATCH 141/299] arm64: dts: r8a7795: Add device node for PRR
-
-Add a device node for the Product Register, which provides SoC product
-and revision information.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bd6777f8b4cdb53dafb12229410acf2ab85d7c28)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -321,6 +321,11 @@
- 			#power-domain-cells = <0>;
- 		};
- 
-+		prr: chipid@fff00044 {
-+			compatible = "renesas,prr";
-+			reg = <0 0xfff00044 0 4>;
-+		};
-+
- 		sysc: system-controller@e6180000 {
- 			compatible = "renesas,r8a7795-sysc";
- 			reg = <0 0xe6180000 0 0x0400>;
diff --git a/patches.renesas/0141-media-v4l-vsp1-Fix-RPF-WPF-U-V-order-in-3-planar-for.patch b/patches.renesas/0141-media-v4l-vsp1-Fix-RPF-WPF-U-V-order-in-3-planar-for.patch
deleted file mode 100644
index b6edaac52125e5..00000000000000
--- a/patches.renesas/0141-media-v4l-vsp1-Fix-RPF-WPF-U-V-order-in-3-planar-for.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From 6774abf08332a88cc1bb6f0daf6a4f8ed61c66ec Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 12 Feb 2017 20:58:20 -0200
-Subject: [PATCH 141/286] [media] v4l: vsp1: Fix RPF/WPF U/V order in 3-planar
- formats on Gen3
-
-The RPF and WPF U/V order bits have no effect for 3-planar formats on
-Gen3 hardware. Swap the U and V planes addresses manually instead in
-that case.
-
-Fixes: b915bd24a034 ("[media] v4l: vsp1: Add tri-planar memory formats support")
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 3425382288fbd13b60581f20076aebd0ef414282)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_rpf.c |   41 ++++++++++++++++++++-------------
- drivers/media/platform/vsp1/vsp1_wpf.c |    9 +++++++
- 2 files changed, 34 insertions(+), 16 deletions(-)
-
---- a/drivers/media/platform/vsp1/vsp1_rpf.c
-+++ b/drivers/media/platform/vsp1/vsp1_rpf.c
-@@ -72,7 +72,8 @@ static void rpf_configure(struct vsp1_en
- 	}
- 
- 	if (params == VSP1_ENTITY_PARAMS_PARTITION) {
--		unsigned int offsets[2];
-+		struct vsp1_device *vsp1 = rpf->entity.vsp1;
-+		struct vsp1_rwpf_memory mem = rpf->mem;
- 		struct v4l2_rect crop;
- 
- 		/*
-@@ -120,22 +121,30 @@ static void rpf_configure(struct vsp1_en
- 			       (crop.width << VI6_RPF_SRC_ESIZE_EHSIZE_SHIFT) |
- 			       (crop.height << VI6_RPF_SRC_ESIZE_EVSIZE_SHIFT));
- 
--		offsets[0] = crop.top * format->plane_fmt[0].bytesperline
--			   + crop.left * fmtinfo->bpp[0] / 8;
-+		mem.addr[0] += crop.top * format->plane_fmt[0].bytesperline
-+			     + crop.left * fmtinfo->bpp[0] / 8;
- 
--		if (format->num_planes > 1)
--			offsets[1] = crop.top * format->plane_fmt[1].bytesperline
--				   + crop.left / fmtinfo->hsub
--				   * fmtinfo->bpp[1] / 8;
--		else
--			offsets[1] = 0;
--
--		vsp1_rpf_write(rpf, dl, VI6_RPF_SRCM_ADDR_Y,
--			       rpf->mem.addr[0] + offsets[0]);
--		vsp1_rpf_write(rpf, dl, VI6_RPF_SRCM_ADDR_C0,
--			       rpf->mem.addr[1] + offsets[1]);
--		vsp1_rpf_write(rpf, dl, VI6_RPF_SRCM_ADDR_C1,
--			       rpf->mem.addr[2] + offsets[1]);
-+		if (format->num_planes > 1) {
-+			unsigned int offset;
-+
-+			offset = crop.top * format->plane_fmt[1].bytesperline
-+			       + crop.left / fmtinfo->hsub
-+			       * fmtinfo->bpp[1] / 8;
-+			mem.addr[1] += offset;
-+			mem.addr[2] += offset;
-+		}
-+
-+		/*
-+		 * On Gen3 hardware the SPUVS bit has no effect on 3-planar
-+		 * formats. Swap the U and V planes manually in that case.
-+		 */
-+		if (vsp1->info->gen == 3 && format->num_planes == 3 &&
-+		    fmtinfo->swap_uv)
-+			swap(mem.addr[1], mem.addr[2]);
-+
-+		vsp1_rpf_write(rpf, dl, VI6_RPF_SRCM_ADDR_Y, mem.addr[0]);
-+		vsp1_rpf_write(rpf, dl, VI6_RPF_SRCM_ADDR_C0, mem.addr[1]);
-+		vsp1_rpf_write(rpf, dl, VI6_RPF_SRCM_ADDR_C1, mem.addr[2]);
- 		return;
- 	}
- 
---- a/drivers/media/platform/vsp1/vsp1_wpf.c
-+++ b/drivers/media/platform/vsp1/vsp1_wpf.c
-@@ -216,6 +216,7 @@ static void wpf_configure(struct vsp1_en
- 
- 	if (params == VSP1_ENTITY_PARAMS_PARTITION) {
- 		const struct v4l2_pix_format_mplane *format = &wpf->format;
-+		const struct vsp1_format_info *fmtinfo = wpf->fmtinfo;
- 		struct vsp1_rwpf_memory mem = wpf->mem;
- 		unsigned int flip = wpf->flip.active;
- 		unsigned int width = source_format->width;
-@@ -281,6 +282,14 @@ static void wpf_configure(struct vsp1_en
- 			}
- 		}
- 
-+		/*
-+		 * On Gen3 hardware the SPUVS bit has no effect on 3-planar
-+		 * formats. Swap the U and V planes manually in that case.
-+		 */
-+		if (vsp1->info->gen == 3 && format->num_planes == 3 &&
-+		    fmtinfo->swap_uv)
-+			swap(mem.addr[1], mem.addr[2]);
-+
- 		vsp1_wpf_write(wpf, dl, VI6_WPF_DSTM_ADDR_Y, mem.addr[0]);
- 		vsp1_wpf_write(wpf, dl, VI6_WPF_DSTM_ADDR_C0, mem.addr[1]);
- 		vsp1_wpf_write(wpf, dl, VI6_WPF_DSTM_ADDR_C1, mem.addr[2]);
diff --git a/patches.renesas/0141-mmc-sh_mmcif-Remove-unused-get_cd-platform-callback.patch b/patches.renesas/0141-mmc-sh_mmcif-Remove-unused-get_cd-platform-callback.patch
deleted file mode 100644
index 71d3177121d46b..00000000000000
--- a/patches.renesas/0141-mmc-sh_mmcif-Remove-unused-get_cd-platform-callback.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From ecd167ab43ff8a80c1c7d2fc4468e63c15388113 Mon Sep 17 00:00:00 2001
-From: Ulf Hansson <ulf.hansson@linaro.org>
-Date: Fri, 30 Dec 2016 13:47:17 +0100
-Subject: [PATCH 141/255] mmc: sh_mmcif: Remove unused ->get_cd() platform
- callback
-
-Removing the callback also enables us to remove the sh_mmcif_get_cd()
-altogether, as we convert to use mmc_gpio_get_cd() to the same kind of
-work.
-
-Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 5957eeba530747e9d77daf2f300a186758be51d9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mmcif.c  |   18 +-----------------
- include/linux/mmc/sh_mmcif.h |    1 -
- 2 files changed, 1 insertion(+), 18 deletions(-)
-
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -1079,26 +1079,10 @@ static void sh_mmcif_set_ios(struct mmc_
- 	host->state = STATE_IDLE;
- }
- 
--static int sh_mmcif_get_cd(struct mmc_host *mmc)
--{
--	struct sh_mmcif_host *host = mmc_priv(mmc);
--	struct device *dev = sh_mmcif_host_to_dev(host);
--	struct sh_mmcif_plat_data *p = dev->platform_data;
--	int ret = mmc_gpio_get_cd(mmc);
--
--	if (ret >= 0)
--		return ret;
--
--	if (!p || !p->get_cd)
--		return -ENOSYS;
--	else
--		return p->get_cd(host->pd);
--}
--
- static struct mmc_host_ops sh_mmcif_ops = {
- 	.request	= sh_mmcif_request,
- 	.set_ios	= sh_mmcif_set_ios,
--	.get_cd		= sh_mmcif_get_cd,
-+	.get_cd		= mmc_gpio_get_cd,
- };
- 
- static bool sh_mmcif_end_cmd(struct sh_mmcif_host *host)
---- a/include/linux/mmc/sh_mmcif.h
-+++ b/include/linux/mmc/sh_mmcif.h
-@@ -32,7 +32,6 @@
-  */
- 
- struct sh_mmcif_plat_data {
--	int (*get_cd)(struct platform_device *pdef);
- 	unsigned int		slave_id_tx;	/* embedded slave_id_[tr]x */
- 	unsigned int		slave_id_rx;
- 	bool			ccs_unsupported : 1;
diff --git a/patches.renesas/0142-arm64-dts-r8a7796-Add-device-node-for-PRR.patch b/patches.renesas/0142-arm64-dts-r8a7796-Add-device-node-for-PRR.patch
deleted file mode 100644
index fcdaecc1edd6db..00000000000000
--- a/patches.renesas/0142-arm64-dts-r8a7796-Add-device-node-for-PRR.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From d15a25c948bb20e6fe1c72f7cc1db86541651d38 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 14 Nov 2016 19:37:17 +0100
-Subject: [PATCH 142/299] arm64: dts: r8a7796: Add device node for PRR
-
-Add a device node for the Product Register, which provides SoC product
-and revision information.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5de68961cf5618c1ce5bb15848b36121247f23d5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -242,6 +242,11 @@
- 			#power-domain-cells = <0>;
- 		};
- 
-+		prr: chipid@fff00044 {
-+			compatible = "renesas,prr";
-+			reg = <0 0xfff00044 0 4>;
-+		};
-+
- 		sysc: system-controller@e6180000 {
- 			compatible = "renesas,r8a7796-sysc";
- 			reg = <0 0xe6180000 0 0x0400>;
diff --git a/patches.renesas/0142-mmc-sh_mmcif-Remove-unused-ccs_unsupported-from-the-.patch b/patches.renesas/0142-mmc-sh_mmcif-Remove-unused-ccs_unsupported-from-the-.patch
deleted file mode 100644
index 0490633496a3d7..00000000000000
--- a/patches.renesas/0142-mmc-sh_mmcif-Remove-unused-ccs_unsupported-from-the-.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 38db03ca6ac142eedb5eece18d8a0e0ae500064a Mon Sep 17 00:00:00 2001
-From: Ulf Hansson <ulf.hansson@linaro.org>
-Date: Fri, 30 Dec 2016 13:47:18 +0100
-Subject: [PATCH 142/255] mmc: sh_mmcif: Remove unused ccs_unsupported from the
- platform data
-
-There are currently no users of the ccs_unsupported member from the
-platform data, so let's remove it.
-
-Note, as some of the sh_mmcif variants may not support ccs, let's keep the
-current code in the driver, which deals with this. For future support, we
-should invent a DT binding instead, but let's leave that until it's needed.
-
-Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 8020f71117042ed82287e4f51c48b57ce4c783df)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mmcif.c  |    2 +-
- include/linux/mmc/sh_mmcif.h |    1 -
- 2 files changed, 1 insertion(+), 2 deletions(-)
-
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -1427,7 +1427,7 @@ static int sh_mmcif_probe(struct platfor
- 	host->mmc	= mmc;
- 	host->addr	= reg;
- 	host->timeout	= msecs_to_jiffies(10000);
--	host->ccs_enable = !pd || !pd->ccs_unsupported;
-+	host->ccs_enable = true;
- 	host->clk_ctrl2_enable = pd && pd->clk_ctrl2_present;
- 
- 	host->pd = pdev;
---- a/include/linux/mmc/sh_mmcif.h
-+++ b/include/linux/mmc/sh_mmcif.h
-@@ -34,7 +34,6 @@
- struct sh_mmcif_plat_data {
- 	unsigned int		slave_id_tx;	/* embedded slave_id_[tr]x */
- 	unsigned int		slave_id_rx;
--	bool			ccs_unsupported : 1;
- 	bool			clk_ctrl2_present : 1;
- 	u8			sup_pclk;	/* 1 :SH7757, 0: SH7724/SH7372 */
- 	unsigned long		caps;
diff --git a/patches.renesas/0143-arm64-defconfig-Do-not-lower-CONFIG_LOG_BUF_SHIFT.patch b/patches.renesas/0143-arm64-defconfig-Do-not-lower-CONFIG_LOG_BUF_SHIFT.patch
deleted file mode 100644
index 29a197937bfb91..00000000000000
--- a/patches.renesas/0143-arm64-defconfig-Do-not-lower-CONFIG_LOG_BUF_SHIFT.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From ff135165cdddc3e6c7c5767ce50ec77b36f2d18c Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 23 Nov 2016 14:36:16 +0100
-Subject: [PATCH 143/299] arm64: defconfig: Do not lower CONFIG_LOG_BUF_SHIFT
-
-The default value of 17 for CONFIG_LOG_BUF_SHIFT is much more suitable
-than 14. The latter easily leads to lost kernel messages on systems with
-only one CPU core.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-Acked-by: Catalin Marinas <catalin.marinas@arm.com>
-(cherry picked from commit 8879f9ffab260f9a0d0e071c0bc2201143e60b2d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/configs/defconfig |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -11,7 +11,6 @@ CONFIG_TASK_XACCT=y
- CONFIG_TASK_IO_ACCOUNTING=y
- CONFIG_IKCONFIG=y
- CONFIG_IKCONFIG_PROC=y
--CONFIG_LOG_BUF_SHIFT=14
- CONFIG_MEMCG=y
- CONFIG_MEMCG_SWAP=y
- CONFIG_BLK_CGROUP=y
diff --git a/patches.renesas/0143-media-v4l-vsp1-Remove-redundant-pipe-dl-usage-from-d.patch b/patches.renesas/0143-media-v4l-vsp1-Remove-redundant-pipe-dl-usage-from-d.patch
deleted file mode 100644
index a9fa3a4e25f397..00000000000000
--- a/patches.renesas/0143-media-v4l-vsp1-Remove-redundant-pipe-dl-usage-from-d.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 7969fe3ab2a6a4a3bd5f12767adf43c405bbce61 Mon Sep 17 00:00:00 2001
-From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-Date: Fri, 6 Jan 2017 10:15:31 -0200
-Subject: [PATCH 143/286] [media] v4l: vsp1: Remove redundant pipe->dl usage
- from drm
-
-The pipe->dl is used only inside vsp1_du_atomic_flush(), and can be
-obtained and stored locally to simplify the code.
-
-Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit f2074708ee07848f86105b68bdce062de4e6685d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_drm.c |   20 ++++++++++----------
- 1 file changed, 10 insertions(+), 10 deletions(-)
-
---- a/drivers/media/platform/vsp1/vsp1_drm.c
-+++ b/drivers/media/platform/vsp1/vsp1_drm.c
-@@ -219,9 +219,6 @@ void vsp1_du_atomic_begin(struct device
- 	struct vsp1_pipeline *pipe = &vsp1->drm->pipe;
- 
- 	vsp1->drm->num_inputs = pipe->num_inputs;
--
--	/* Prepare the display list. */
--	pipe->dl = vsp1_dl_list_get(pipe->output->dlm);
- }
- EXPORT_SYMBOL_GPL(vsp1_du_atomic_begin);
- 
-@@ -425,10 +422,14 @@ void vsp1_du_atomic_flush(struct device
- 	struct vsp1_pipeline *pipe = &vsp1->drm->pipe;
- 	struct vsp1_rwpf *inputs[VSP1_MAX_RPF] = { NULL, };
- 	struct vsp1_entity *entity;
-+	struct vsp1_dl_list *dl;
- 	unsigned long flags;
- 	unsigned int i;
- 	int ret;
- 
-+	/* Prepare the display list. */
-+	dl = vsp1_dl_list_get(pipe->output->dlm);
-+
- 	/* Count the number of enabled inputs and sort them by Z-order. */
- 	pipe->num_inputs = 0;
- 
-@@ -483,26 +484,25 @@ void vsp1_du_atomic_flush(struct device
- 			struct vsp1_rwpf *rpf = to_rwpf(&entity->subdev);
- 
- 			if (!pipe->inputs[rpf->entity.index]) {
--				vsp1_dl_list_write(pipe->dl, entity->route->reg,
-+				vsp1_dl_list_write(dl, entity->route->reg,
- 						   VI6_DPR_NODE_UNUSED);
- 				continue;
- 			}
- 		}
- 
--		vsp1_entity_route_setup(entity, pipe->dl);
-+		vsp1_entity_route_setup(entity, dl);
- 
- 		if (entity->ops->configure) {
--			entity->ops->configure(entity, pipe, pipe->dl,
-+			entity->ops->configure(entity, pipe, dl,
- 					       VSP1_ENTITY_PARAMS_INIT);
--			entity->ops->configure(entity, pipe, pipe->dl,
-+			entity->ops->configure(entity, pipe, dl,
- 					       VSP1_ENTITY_PARAMS_RUNTIME);
--			entity->ops->configure(entity, pipe, pipe->dl,
-+			entity->ops->configure(entity, pipe, dl,
- 					       VSP1_ENTITY_PARAMS_PARTITION);
- 		}
- 	}
- 
--	vsp1_dl_list_commit(pipe->dl);
--	pipe->dl = NULL;
-+	vsp1_dl_list_commit(dl);
- 
- 	/* Start or stop the pipeline if needed. */
- 	if (!vsp1->drm->num_inputs && pipe->num_inputs) {
diff --git a/patches.renesas/0143-mmc-sh_mmcif-Remove-unused-clk_ctrl2_present-from-th.patch b/patches.renesas/0143-mmc-sh_mmcif-Remove-unused-clk_ctrl2_present-from-th.patch
deleted file mode 100644
index ad7a11819242a7..00000000000000
--- a/patches.renesas/0143-mmc-sh_mmcif-Remove-unused-clk_ctrl2_present-from-th.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 2b07b253ed3c3b19d94222ff4f238224de24420e Mon Sep 17 00:00:00 2001
-From: Ulf Hansson <ulf.hansson@linaro.org>
-Date: Fri, 30 Dec 2016 13:47:19 +0100
-Subject: [PATCH 143/255] mmc: sh_mmcif: Remove unused clk_ctrl2_present from
- the platform data
-
-There are currently no users of the clk_ctrl2_present member from the
-platform data, so let's remove it.
-
-Note, as some of the sh_mmcif variants may support clk_ctrl2, let's keep
-the current code in the driver, which deals with this. For future support,
-we should invent a DT binding instead, but let's leave that until it's
-needed.
-
-Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit dba4bb484e9e495478f2bcf474393d33f7e0ec27)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mmcif.c  |    2 +-
- include/linux/mmc/sh_mmcif.h |    1 -
- 2 files changed, 1 insertion(+), 2 deletions(-)
-
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -1428,7 +1428,7 @@ static int sh_mmcif_probe(struct platfor
- 	host->addr	= reg;
- 	host->timeout	= msecs_to_jiffies(10000);
- 	host->ccs_enable = true;
--	host->clk_ctrl2_enable = pd && pd->clk_ctrl2_present;
-+	host->clk_ctrl2_enable = false;
- 
- 	host->pd = pdev;
- 
---- a/include/linux/mmc/sh_mmcif.h
-+++ b/include/linux/mmc/sh_mmcif.h
-@@ -34,7 +34,6 @@
- struct sh_mmcif_plat_data {
- 	unsigned int		slave_id_tx;	/* embedded slave_id_[tr]x */
- 	unsigned int		slave_id_rx;
--	bool			clk_ctrl2_present : 1;
- 	u8			sup_pclk;	/* 1 :SH7757, 0: SH7724/SH7372 */
- 	unsigned long		caps;
- 	u32			ocr;
diff --git a/patches.renesas/0144-arm64-defconfig-drop-GPIO_SYSFS-on-multiplatforms.patch b/patches.renesas/0144-arm64-defconfig-drop-GPIO_SYSFS-on-multiplatforms.patch
deleted file mode 100644
index 761c7fed456f64..00000000000000
--- a/patches.renesas/0144-arm64-defconfig-drop-GPIO_SYSFS-on-multiplatforms.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 448077a2a56c5bff5986abc0f0c03e80dc773a54 Mon Sep 17 00:00:00 2001
-From: Linus Walleij <linus.walleij@linaro.org>
-Date: Thu, 24 Nov 2016 15:57:52 +0100
-Subject: [PATCH 144/299] arm64: defconfig: drop GPIO_SYSFS on multiplatforms
-
-The sysfs ABI to GPIO is marked obsolete and should not be
-encouraged. Users should be encouraged to switch to using the
-character device.
-
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-(cherry picked from commit a8b76d9917f5d2a9f802393e943c3b8bb3067fd5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/configs/defconfig |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -252,7 +252,6 @@ CONFIG_PINCTRL_MSM8916=y
- CONFIG_PINCTRL_MSM8996=y
- CONFIG_PINCTRL_QDF2XXX=y
- CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
--CONFIG_GPIO_SYSFS=y
- CONFIG_GPIO_DWAPB=y
- CONFIG_GPIO_PL061=y
- CONFIG_GPIO_RCAR=y
diff --git a/patches.renesas/0144-media-v4l-vsp1-Fix-multi-line-comment-style.patch b/patches.renesas/0144-media-v4l-vsp1-Fix-multi-line-comment-style.patch
deleted file mode 100644
index 9aeb5133ae8d6a..00000000000000
--- a/patches.renesas/0144-media-v4l-vsp1-Fix-multi-line-comment-style.patch
+++ /dev/null
@@ -1,648 +0,0 @@
-From 12e22e7b09865fd034a229106baf224f4b48becb Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 26 Feb 2017 10:29:50 -0300
-Subject: [PATCH 144/286] [media] v4l: vsp1: Fix multi-line comment style
-
-Fix all multi-line comments to comply with the kernel coding style.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 9dbed95ba640c1b4fb2d069814924811bdeb0de6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_bru.c    |   27 ++++++++++++++++--------
- drivers/media/platform/vsp1/vsp1_dl.c     |   27 ++++++++++++++++--------
- drivers/media/platform/vsp1/vsp1_drm.c    |   21 ++++++++++++-------
- drivers/media/platform/vsp1/vsp1_drv.c    |   12 +++++++---
- drivers/media/platform/vsp1/vsp1_entity.c |    9 +++++---
- drivers/media/platform/vsp1/vsp1_hsit.c   |    3 +-
- drivers/media/platform/vsp1/vsp1_lif.c    |    6 +++--
- drivers/media/platform/vsp1/vsp1_pipe.c   |    9 +++++---
- drivers/media/platform/vsp1/vsp1_rpf.c    |    9 +++++---
- drivers/media/platform/vsp1/vsp1_rwpf.c   |    6 +++--
- drivers/media/platform/vsp1/vsp1_sru.c    |    3 +-
- drivers/media/platform/vsp1/vsp1_uds.c    |    3 +-
- drivers/media/platform/vsp1/vsp1_video.c  |   33 ++++++++++++++++++++----------
- drivers/media/platform/vsp1/vsp1_wpf.c    |   12 +++++++---
- 14 files changed, 120 insertions(+), 60 deletions(-)
-
---- a/drivers/media/platform/vsp1/vsp1_bru.c
-+++ b/drivers/media/platform/vsp1/vsp1_bru.c
-@@ -251,7 +251,8 @@ static int bru_set_selection(struct v4l2
- 	sel->r.left = clamp_t(unsigned int, sel->r.left, 0, format->width - 1);
- 	sel->r.top = clamp_t(unsigned int, sel->r.top, 0, format->height - 1);
- 
--	/* Scaling isn't supported, the compose rectangle size must be identical
-+	/*
-+	 * Scaling isn't supported, the compose rectangle size must be identical
- 	 * to the sink format size.
- 	 */
- 	format = vsp1_entity_get_pad_format(&bru->entity, config, sel->pad);
-@@ -300,13 +301,15 @@ static void bru_configure(struct vsp1_en
- 	format = vsp1_entity_get_pad_format(&bru->entity, bru->entity.config,
- 					    bru->entity.source_pad);
- 
--	/* The hardware is extremely flexible but we have no userspace API to
-+	/*
-+	 * The hardware is extremely flexible but we have no userspace API to
- 	 * expose all the parameters, nor is it clear whether we would have use
- 	 * cases for all the supported modes. Let's just harcode the parameters
- 	 * to sane default values for now.
- 	 */
- 
--	/* Disable dithering and enable color data normalization unless the
-+	/*
-+	 * Disable dithering and enable color data normalization unless the
- 	 * format at the pipeline output is premultiplied.
- 	 */
- 	flags = pipe->output ? pipe->output->format.flags : 0;
-@@ -314,7 +317,8 @@ static void bru_configure(struct vsp1_en
- 		       flags & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA ?
- 		       0 : VI6_BRU_INCTRL_NRM);
- 
--	/* Set the background position to cover the whole output image and
-+	/*
-+	 * Set the background position to cover the whole output image and
- 	 * configure its color.
- 	 */
- 	vsp1_bru_write(bru, dl, VI6_BRU_VIRRPF_SIZE,
-@@ -325,7 +329,8 @@ static void bru_configure(struct vsp1_en
- 	vsp1_bru_write(bru, dl, VI6_BRU_VIRRPF_COL, bru->bgcolor |
- 		       (0xff << VI6_BRU_VIRRPF_COL_A_SHIFT));
- 
--	/* Route BRU input 1 as SRC input to the ROP unit and configure the ROP
-+	/*
-+	 * Route BRU input 1 as SRC input to the ROP unit and configure the ROP
- 	 * unit with a NOP operation to make BRU input 1 available as the
- 	 * Blend/ROP unit B SRC input.
- 	 */
-@@ -337,7 +342,8 @@ static void bru_configure(struct vsp1_en
- 		bool premultiplied = false;
- 		u32 ctrl = 0;
- 
--		/* Configure all Blend/ROP units corresponding to an enabled BRU
-+		/*
-+		 * Configure all Blend/ROP units corresponding to an enabled BRU
- 		 * input for alpha blending. Blend/ROP units corresponding to
- 		 * disabled BRU inputs are used in ROP NOP mode to ignore the
- 		 * SRC input.
-@@ -352,13 +358,15 @@ static void bru_configure(struct vsp1_en
- 			     |  VI6_BRU_CTRL_AROP(VI6_ROP_NOP);
- 		}
- 
--		/* Select the virtual RPF as the Blend/ROP unit A DST input to
-+		/*
-+		 * Select the virtual RPF as the Blend/ROP unit A DST input to
- 		 * serve as a background color.
- 		 */
- 		if (i == 0)
- 			ctrl |= VI6_BRU_CTRL_DSTSEL_VRPF;
- 
--		/* Route BRU inputs 0 to 3 as SRC inputs to Blend/ROP units A to
-+		/*
-+		 * Route BRU inputs 0 to 3 as SRC inputs to Blend/ROP units A to
- 		 * D in that order. The Blend/ROP unit B SRC is hardwired to the
- 		 * ROP unit output, the corresponding register bits must be set
- 		 * to 0.
-@@ -368,7 +376,8 @@ static void bru_configure(struct vsp1_en
- 
- 		vsp1_bru_write(bru, dl, VI6_BRU_CTRL(i), ctrl);
- 
--		/* Harcode the blending formula to
-+		/*
-+		 * Harcode the blending formula to
- 		 *
- 		 *	DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
- 		 *	DSTa = DSTa * (1 - SRCa) + SRCa
---- a/drivers/media/platform/vsp1/vsp1_dl.c
-+++ b/drivers/media/platform/vsp1/vsp1_dl.c
-@@ -240,7 +240,8 @@ static struct vsp1_dl_list *vsp1_dl_list
- 	INIT_LIST_HEAD(&dl->fragments);
- 	dl->dlm = dlm;
- 
--	/* Initialize the display list body and allocate DMA memory for the body
-+	/*
-+	 * Initialize the display list body and allocate DMA memory for the body
- 	 * and the optional header. Both are allocated together to avoid memory
- 	 * fragmentation, with the header located right after the body in
- 	 * memory.
-@@ -511,7 +512,8 @@ void vsp1_dl_list_commit(struct vsp1_dl_
- 		goto done;
- 	}
- 
--	/* Once the UPD bit has been set the hardware can start processing the
-+	/*
-+	 * Once the UPD bit has been set the hardware can start processing the
- 	 * display list at any time and we can't touch the address and size
- 	 * registers. In that case mark the update as pending, it will be
- 	 * queued up to the hardware by the frame end interrupt handler.
-@@ -523,7 +525,8 @@ void vsp1_dl_list_commit(struct vsp1_dl_
- 		goto done;
- 	}
- 
--	/* Program the hardware with the display list body address and size.
-+	/*
-+	 * Program the hardware with the display list body address and size.
- 	 * The UPD bit will be cleared by the device when the display list is
- 	 * processed.
- 	 */
-@@ -547,7 +550,8 @@ void vsp1_dlm_irq_display_start(struct v
- {
- 	spin_lock(&dlm->lock);
- 
--	/* The display start interrupt signals the end of the display list
-+	/*
-+	 * The display start interrupt signals the end of the display list
- 	 * processing by the device. The active display list, if any, won't be
- 	 * accessed anymore and can be reused.
- 	 */
-@@ -566,14 +570,16 @@ void vsp1_dlm_irq_frame_end(struct vsp1_
- 	__vsp1_dl_list_put(dlm->active);
- 	dlm->active = NULL;
- 
--	/* Header mode is used for mem-to-mem pipelines only. We don't need to
-+	/*
-+	 * Header mode is used for mem-to-mem pipelines only. We don't need to
- 	 * perform any operation as there can't be any new display list queued
- 	 * in that case.
- 	 */
- 	if (dlm->mode == VSP1_DL_MODE_HEADER)
- 		goto done;
- 
--	/* The UPD bit set indicates that the commit operation raced with the
-+	/*
-+	 * The UPD bit set indicates that the commit operation raced with the
- 	 * interrupt and occurred after the frame end event and UPD clear but
- 	 * before interrupt processing. The hardware hasn't taken the update
- 	 * into account yet, we'll thus skip one frame and retry.
-@@ -581,7 +587,8 @@ void vsp1_dlm_irq_frame_end(struct vsp1_
- 	if (vsp1_read(vsp1, VI6_DL_BODY_SIZE) & VI6_DL_BODY_SIZE_UPD)
- 		goto done;
- 
--	/* The device starts processing the queued display list right after the
-+	/*
-+	 * The device starts processing the queued display list right after the
- 	 * frame end interrupt. The display list thus becomes active.
- 	 */
- 	if (dlm->queued) {
-@@ -589,7 +596,8 @@ void vsp1_dlm_irq_frame_end(struct vsp1_
- 		dlm->queued = NULL;
- 	}
- 
--	/* Now that the UPD bit has been cleared we can queue the next display
-+	/*
-+	 * Now that the UPD bit has been cleared we can queue the next display
- 	 * list to the hardware if one has been prepared.
- 	 */
- 	if (dlm->pending) {
-@@ -615,7 +623,8 @@ void vsp1_dlm_setup(struct vsp1_device *
- 		 | VI6_DL_CTRL_DC2 | VI6_DL_CTRL_DC1 | VI6_DL_CTRL_DC0
- 		 | VI6_DL_CTRL_DLE;
- 
--	/* The DRM pipeline operates with display lists in Continuous Frame
-+	/*
-+	 * The DRM pipeline operates with display lists in Continuous Frame
- 	 * Mode, all other pipelines use manual start.
- 	 */
- 	if (vsp1->drm)
---- a/drivers/media/platform/vsp1/vsp1_drm.c
-+++ b/drivers/media/platform/vsp1/vsp1_drm.c
-@@ -78,7 +78,8 @@ int vsp1_du_setup_lif(struct device *dev
- 	int ret;
- 
- 	if (!cfg) {
--		/* NULL configuration means the CRTC is being disabled, stop
-+		/*
-+		 * NULL configuration means the CRTC is being disabled, stop
- 		 * the pipeline and turn the light off.
- 		 */
- 		ret = vsp1_pipeline_stop(pipe);
-@@ -106,7 +107,8 @@ int vsp1_du_setup_lif(struct device *dev
- 	dev_dbg(vsp1->dev, "%s: configuring LIF with format %ux%u\n",
- 		__func__, cfg->width, cfg->height);
- 
--	/* Configure the format at the BRU sinks and propagate it through the
-+	/*
-+	 * Configure the format at the BRU sinks and propagate it through the
- 	 * pipeline.
- 	 */
- 	memset(&format, 0, sizeof(format));
-@@ -175,7 +177,8 @@ int vsp1_du_setup_lif(struct device *dev
- 		__func__, format.format.width, format.format.height,
- 		format.format.code);
- 
--	/* Verify that the format at the output of the pipeline matches the
-+	/*
-+	 * Verify that the format at the output of the pipeline matches the
- 	 * requested frame size and media bus code.
- 	 */
- 	if (format.format.width != cfg->width ||
-@@ -185,7 +188,8 @@ int vsp1_du_setup_lif(struct device *dev
- 		return -EPIPE;
- 	}
- 
--	/* Mark the pipeline as streaming and enable the VSP1. This will store
-+	/*
-+	 * Mark the pipeline as streaming and enable the VSP1. This will store
- 	 * the pipeline pointer in all entities, which the s_stream handlers
- 	 * will need. We don't start the entities themselves right at this point
- 	 * as there's no plane configured yet, so we can't start processing
-@@ -317,7 +321,8 @@ static int vsp1_du_setup_rpf_pipe(struct
- 	const struct v4l2_rect *crop;
- 	int ret;
- 
--	/* Configure the format on the RPF sink pad and propagate it up to the
-+	/*
-+	 * Configure the format on the RPF sink pad and propagate it up to the
- 	 * BRU sink pad.
- 	 */
- 	crop = &vsp1->drm->inputs[rpf->entity.index].crop;
-@@ -356,7 +361,8 @@ static int vsp1_du_setup_rpf_pipe(struct
- 		__func__, sel.r.left, sel.r.top, sel.r.width, sel.r.height,
- 		rpf->entity.index);
- 
--	/* RPF source, hardcode the format to ARGB8888 to turn on format
-+	/*
-+	 * RPF source, hardcode the format to ARGB8888 to turn on format
- 	 * conversion if needed.
- 	 */
- 	format.pad = RWPF_PAD_SOURCE;
-@@ -528,7 +534,8 @@ int vsp1_drm_create_links(struct vsp1_de
- 	unsigned int i;
- 	int ret;
- 
--	/* VSPD instances require a BRU to perform composition and a LIF to
-+	/*
-+	 * VSPD instances require a BRU to perform composition and a LIF to
- 	 * output to the DU.
- 	 */
- 	if (!vsp1->bru || !vsp1->lif)
---- a/drivers/media/platform/vsp1/vsp1_drv.c
-+++ b/drivers/media/platform/vsp1/vsp1_drv.c
-@@ -170,7 +170,8 @@ static int vsp1_uapi_create_links(struct
- 	}
- 
- 	for (i = 0; i < vsp1->info->wpf_count; ++i) {
--		/* Connect the video device to the WPF. All connections are
-+		/*
-+		 * Connect the video device to the WPF. All connections are
- 		 * immutable.
- 		 */
- 		struct vsp1_rwpf *wpf = vsp1->wpf[i];
-@@ -227,7 +228,8 @@ static int vsp1_create_entities(struct v
- 	media_device_init(mdev);
- 
- 	vsp1->media_ops.link_setup = vsp1_entity_link_setup;
--	/* Don't perform link validation when the userspace API is disabled as
-+	/*
-+	 * Don't perform link validation when the userspace API is disabled as
- 	 * the pipeline is configured internally by the driver in that case, and
- 	 * its configuration can thus be trusted.
- 	 */
-@@ -279,7 +281,8 @@ static int vsp1_create_entities(struct v
- 
- 	list_add_tail(&vsp1->hst->entity.list_dev, &vsp1->entities);
- 
--	/* The LIF is only supported when used in conjunction with the DU, in
-+	/*
-+	 * The LIF is only supported when used in conjunction with the DU, in
- 	 * which case the userspace API is disabled. If the userspace API is
- 	 * enabled skip the LIF, even when present.
- 	 */
-@@ -391,7 +394,8 @@ static int vsp1_create_entities(struct v
- 	if (ret < 0)
- 		goto done;
- 
--	/* Register subdev nodes if the userspace API is enabled or initialize
-+	/*
-+	 * Register subdev nodes if the userspace API is enabled or initialize
- 	 * the DRM pipeline otherwise.
- 	 */
- 	if (vsp1->info->uapi) {
---- a/drivers/media/platform/vsp1/vsp1_entity.c
-+++ b/drivers/media/platform/vsp1/vsp1_entity.c
-@@ -199,7 +199,8 @@ int vsp1_subdev_enum_mbus_code(struct v4
- 		struct v4l2_subdev_pad_config *config;
- 		struct v4l2_mbus_framefmt *format;
- 
--		/* The entity can't perform format conversion, the sink format
-+		/*
-+		 * The entity can't perform format conversion, the sink format
- 		 * is always identical to the source format.
- 		 */
- 		if (code->index)
-@@ -263,7 +264,8 @@ int vsp1_subdev_enum_frame_size(struct v
- 		fse->min_height = min_height;
- 		fse->max_height = max_height;
- 	} else {
--		/* The size on the source pad are fixed and always identical to
-+		/*
-+		 * The size on the source pad are fixed and always identical to
- 		 * the size on the sink pad.
- 		 */
- 		fse->min_width = format->width;
-@@ -407,7 +409,8 @@ int vsp1_entity_init(struct vsp1_device
- 
- 	vsp1_entity_init_cfg(subdev, NULL);
- 
--	/* Allocate the pad configuration to store formats and selection
-+	/*
-+	 * Allocate the pad configuration to store formats and selection
- 	 * rectangles.
- 	 */
- 	entity->config = v4l2_subdev_alloc_pad_config(&entity->subdev);
---- a/drivers/media/platform/vsp1/vsp1_hsit.c
-+++ b/drivers/media/platform/vsp1/vsp1_hsit.c
-@@ -84,7 +84,8 @@ static int hsit_set_format(struct v4l2_s
- 	format = vsp1_entity_get_pad_format(&hsit->entity, config, fmt->pad);
- 
- 	if (fmt->pad == HSIT_PAD_SOURCE) {
--		/* The HST and HSI output format code and resolution can't be
-+		/*
-+		 * The HST and HSI output format code and resolution can't be
- 		 * modified.
- 		 */
- 		fmt->format = *format;
---- a/drivers/media/platform/vsp1/vsp1_lif.c
-+++ b/drivers/media/platform/vsp1/vsp1_lif.c
-@@ -84,7 +84,8 @@ static int lif_set_format(struct v4l2_su
- 	format = vsp1_entity_get_pad_format(&lif->entity, config, fmt->pad);
- 
- 	if (fmt->pad == LIF_PAD_SOURCE) {
--		/* The LIF source format is always identical to its sink
-+		/*
-+		 * The LIF source format is always identical to its sink
- 		 * format.
- 		 */
- 		fmt->format = *format;
-@@ -176,7 +177,8 @@ struct vsp1_lif *vsp1_lif_create(struct
- 	lif->entity.ops = &lif_entity_ops;
- 	lif->entity.type = VSP1_ENTITY_LIF;
- 
--	/* The LIF is never exposed to userspace, but media entity registration
-+	/*
-+	 * The LIF is never exposed to userspace, but media entity registration
- 	 * requires a function to be set. Use PROC_VIDEO_PIXEL_FORMATTER just to
- 	 * avoid triggering a WARN_ON(), the value won't be seen anywhere.
- 	 */
---- a/drivers/media/platform/vsp1/vsp1_pipe.c
-+++ b/drivers/media/platform/vsp1/vsp1_pipe.c
-@@ -251,7 +251,8 @@ int vsp1_pipeline_stop(struct vsp1_pipel
- 	int ret;
- 
- 	if (pipe->lif) {
--		/* When using display lists in continuous frame mode the only
-+		/*
-+		 * When using display lists in continuous frame mode the only
- 		 * way to stop the pipeline is to reset the hardware.
- 		 */
- 		ret = vsp1_reset_wpf(pipe->output->entity.vsp1,
-@@ -322,7 +323,8 @@ void vsp1_pipeline_propagate_alpha(struc
- 	if (!pipe->uds)
- 		return;
- 
--	/* The BRU background color has a fixed alpha value set to 255, the
-+	/*
-+	 * The BRU background color has a fixed alpha value set to 255, the
- 	 * output alpha value is thus always equal to 255.
- 	 */
- 	if (pipe->uds_input->type == VSP1_ENTITY_BRU)
-@@ -337,7 +339,8 @@ void vsp1_pipelines_suspend(struct vsp1_
- 	unsigned int i;
- 	int ret;
- 
--	/* To avoid increasing the system suspend time needlessly, loop over the
-+	/*
-+	 * To avoid increasing the system suspend time needlessly, loop over the
- 	 * pipelines twice, first to set them all to the stopping state, and
- 	 * then to wait for the stop to complete.
- 	 */
---- a/drivers/media/platform/vsp1/vsp1_rpf.c
-+++ b/drivers/media/platform/vsp1/vsp1_rpf.c
-@@ -195,7 +195,8 @@ static void rpf_configure(struct vsp1_en
- 		       (left << VI6_RPF_LOC_HCOORD_SHIFT) |
- 		       (top << VI6_RPF_LOC_VCOORD_SHIFT));
- 
--	/* On Gen2 use the alpha channel (extended to 8 bits) when available or
-+	/*
-+	 * On Gen2 use the alpha channel (extended to 8 bits) when available or
- 	 * a fixed alpha value set through the V4L2_CID_ALPHA_COMPONENT control
- 	 * otherwise.
- 	 *
-@@ -225,7 +226,8 @@ static void rpf_configure(struct vsp1_en
- 		u32 mult;
- 
- 		if (fmtinfo->alpha) {
--			/* When the input contains an alpha channel enable the
-+			/*
-+			 * When the input contains an alpha channel enable the
- 			 * alpha multiplier. If the input is premultiplied we
- 			 * need to multiply both the alpha channel and the pixel
- 			 * components by the global alpha value to keep them
-@@ -240,7 +242,8 @@ static void rpf_configure(struct vsp1_en
- 				VI6_RPF_MULT_ALPHA_P_MMD_RATIO :
- 				VI6_RPF_MULT_ALPHA_P_MMD_NONE);
- 		} else {
--			/* When the input doesn't contain an alpha channel the
-+			/*
-+			 * When the input doesn't contain an alpha channel the
- 			 * global alpha value is applied in the unpacking unit,
- 			 * the alpha multiplier isn't needed and must be
- 			 * disabled.
---- a/drivers/media/platform/vsp1/vsp1_rwpf.c
-+++ b/drivers/media/platform/vsp1/vsp1_rwpf.c
-@@ -86,7 +86,8 @@ static int vsp1_rwpf_set_format(struct v
- 	format = vsp1_entity_get_pad_format(&rwpf->entity, config, fmt->pad);
- 
- 	if (fmt->pad == RWPF_PAD_SOURCE) {
--		/* The RWPF performs format conversion but can't scale, only the
-+		/*
-+		 * The RWPF performs format conversion but can't scale, only the
- 		 * format code can be changed on the source pad.
- 		 */
- 		format->code = fmt->format.code;
-@@ -205,7 +206,8 @@ static int vsp1_rwpf_set_selection(struc
- 	format = vsp1_entity_get_pad_format(&rwpf->entity, config,
- 					    RWPF_PAD_SINK);
- 
--	/* Restrict the crop rectangle coordinates to multiples of 2 to avoid
-+	/*
-+	 * Restrict the crop rectangle coordinates to multiples of 2 to avoid
- 	 * shifting the color plane.
- 	 */
- 	if (format->code == MEDIA_BUS_FMT_AYUV8_1X32) {
---- a/drivers/media/platform/vsp1/vsp1_sru.c
-+++ b/drivers/media/platform/vsp1/vsp1_sru.c
-@@ -191,7 +191,8 @@ static void sru_try_format(struct vsp1_s
- 						    SRU_PAD_SINK);
- 		fmt->code = format->code;
- 
--		/* We can upscale by 2 in both direction, but not independently.
-+		/*
-+		 * We can upscale by 2 in both direction, but not independently.
- 		 * Compare the input and output rectangles areas (avoiding
- 		 * integer overflows on the output): if the requested output
- 		 * area is larger than 1.5^2 the input area upscale by two,
---- a/drivers/media/platform/vsp1/vsp1_uds.c
-+++ b/drivers/media/platform/vsp1/vsp1_uds.c
-@@ -293,7 +293,8 @@ static void uds_configure(struct vsp1_en
- 
- 	dev_dbg(uds->entity.vsp1->dev, "hscale %u vscale %u\n", hscale, vscale);
- 
--	/* Multi-tap scaling can't be enabled along with alpha scaling when
-+	/*
-+	 * Multi-tap scaling can't be enabled along with alpha scaling when
- 	 * scaling down with a factor lower than or equal to 1/2 in either
- 	 * direction.
- 	 */
---- a/drivers/media/platform/vsp1/vsp1_video.c
-+++ b/drivers/media/platform/vsp1/vsp1_video.c
-@@ -103,7 +103,8 @@ static int __vsp1_video_try_format(struc
- 	unsigned int height = pix->height;
- 	unsigned int i;
- 
--	/* Backward compatibility: replace deprecated RGB formats by their XRGB
-+	/*
-+	 * Backward compatibility: replace deprecated RGB formats by their XRGB
- 	 * equivalent. This selects the format older userspace applications want
- 	 * while still exposing the new format.
- 	 */
-@@ -114,7 +115,8 @@ static int __vsp1_video_try_format(struc
- 		}
- 	}
- 
--	/* Retrieve format information and select the default format if the
-+	/*
-+	 * Retrieve format information and select the default format if the
- 	 * requested format isn't supported.
- 	 */
- 	info = vsp1_get_format_info(video->vsp1, pix->pixelformat);
-@@ -140,7 +142,8 @@ static int __vsp1_video_try_format(struc
- 	pix->height = clamp(height, VSP1_VIDEO_MIN_HEIGHT,
- 			    VSP1_VIDEO_MAX_HEIGHT);
- 
--	/* Compute and clamp the stride and image size. While not documented in
-+	/*
-+	 * Compute and clamp the stride and image size. While not documented in
- 	 * the datasheet, strides not aligned to a multiple of 128 bytes result
- 	 * in image corruption.
- 	 */
-@@ -449,7 +452,8 @@ static void vsp1_video_pipeline_frame_en
- 	state = pipe->state;
- 	pipe->state = VSP1_PIPELINE_STOPPED;
- 
--	/* If a stop has been requested, mark the pipeline as stopped and
-+	/*
-+	 * If a stop has been requested, mark the pipeline as stopped and
- 	 * return. Otherwise restart the pipeline if ready.
- 	 */
- 	if (state == VSP1_PIPELINE_STOPPING)
-@@ -491,7 +495,8 @@ static int vsp1_video_pipeline_build_bra
- 		entity = to_vsp1_entity(
- 			media_entity_to_v4l2_subdev(pad->entity));
- 
--		/* A BRU is present in the pipeline, store the BRU input pad
-+		/*
-+		 * A BRU is present in the pipeline, store the BRU input pad
- 		 * number in the input RPF for use when configuring the RPF.
- 		 */
- 		if (entity->type == VSP1_ENTITY_BRU) {
-@@ -526,7 +531,8 @@ static int vsp1_video_pipeline_build_bra
- 					: &input->entity;
- 		}
- 
--		/* Follow the source link. The link setup operations ensure
-+		/*
-+		 * Follow the source link. The link setup operations ensure
- 		 * that the output fan-out can't be more than one, there is thus
- 		 * no need to verify here that only a single source link is
- 		 * activated.
-@@ -596,7 +602,8 @@ static int vsp1_video_pipeline_build(str
- 	if (pipe->num_inputs == 0 || !pipe->output)
- 		return -EPIPE;
- 
--	/* Follow links downstream for each input and make sure the graph
-+	/*
-+	 * Follow links downstream for each input and make sure the graph
- 	 * contains no loop and that all branches end at the output WPF.
- 	 */
- 	for (i = 0; i < video->vsp1->info->rpf_count; ++i) {
-@@ -627,7 +634,8 @@ static struct vsp1_pipeline *vsp1_video_
- 	struct vsp1_pipeline *pipe;
- 	int ret;
- 
--	/* Get a pipeline object for the video node. If a pipeline has already
-+	/*
-+	 * Get a pipeline object for the video node. If a pipeline has already
- 	 * been allocated just increment its reference count and return it.
- 	 * Otherwise allocate a new pipeline and initialize it, it will be freed
- 	 * when the last reference is released.
-@@ -767,7 +775,8 @@ static int vsp1_video_setup_pipeline(str
- 	if (pipe->uds) {
- 		struct vsp1_uds *uds = to_uds(&pipe->uds->subdev);
- 
--		/* If a BRU is present in the pipeline before the UDS, the alpha
-+		/*
-+		 * If a BRU is present in the pipeline before the UDS, the alpha
- 		 * component doesn't need to be scaled as the BRU output alpha
- 		 * value is fixed to 255. Otherwise we need to scale the alpha
- 		 * component only when available at the input RPF.
-@@ -981,7 +990,8 @@ vsp1_video_streamon(struct file *file, v
- 	if (video->queue.owner && video->queue.owner != file->private_data)
- 		return -EBUSY;
- 
--	/* Get a pipeline for the video node and start streaming on it. No link
-+	/*
-+	 * Get a pipeline for the video node and start streaming on it. No link
- 	 * touching an entity in the pipeline can be activated or deactivated
- 	 * once streaming is started.
- 	 */
-@@ -1001,7 +1011,8 @@ vsp1_video_streamon(struct file *file, v
- 
- 	mutex_unlock(&mdev->graph_mutex);
- 
--	/* Verify that the configured format matches the output of the connected
-+	/*
-+	 * Verify that the configured format matches the output of the connected
- 	 * subdev.
- 	 */
- 	ret = vsp1_video_verify_format(video);
---- a/drivers/media/platform/vsp1/vsp1_wpf.c
-+++ b/drivers/media/platform/vsp1/vsp1_wpf.c
-@@ -88,12 +88,14 @@ static int wpf_init_controls(struct vsp1
- 		/* Only WPF0 supports flipping. */
- 		num_flip_ctrls = 0;
- 	} else if (vsp1->info->features & VSP1_HAS_WPF_HFLIP) {
--		/* When horizontal flip is supported the WPF implements two
-+		/*
-+		 * When horizontal flip is supported the WPF implements two
- 		 * controls (horizontal flip and vertical flip).
- 		 */
- 		num_flip_ctrls = 2;
- 	} else if (vsp1->info->features & VSP1_HAS_WPF_VFLIP) {
--		/* When only vertical flip is supported the WPF implements a
-+		/*
-+		 * When only vertical flip is supported the WPF implements a
- 		 * single control (vertical flip).
- 		 */
- 		num_flip_ctrls = 1;
-@@ -139,7 +141,8 @@ static int wpf_s_stream(struct v4l2_subd
- 	if (enable)
- 		return 0;
- 
--	/* Write to registers directly when stopping the stream as there will be
-+	/*
-+	 * Write to registers directly when stopping the stream as there will be
- 	 * no pipeline run to apply the display list.
- 	 */
- 	vsp1_write(vsp1, VI6_WPF_IRQ_ENB(wpf->entity.index), 0);
-@@ -336,7 +339,8 @@ static void wpf_configure(struct vsp1_en
- 
- 	vsp1_dl_list_write(dl, VI6_WPF_WRBCK_CTRL, 0);
- 
--	/* Sources. If the pipeline has a single input and BRU is not used,
-+	/*
-+	 * Sources. If the pipeline has a single input and BRU is not used,
- 	 * configure it as the master layer. Otherwise configure all
- 	 * inputs as sub-layers and select the virtual RPF as the master
- 	 * layer.
diff --git a/patches.renesas/0144-mmc-tmio-use-SDIO-master-interrupt-bit-only-when-all.patch b/patches.renesas/0144-mmc-tmio-use-SDIO-master-interrupt-bit-only-when-all.patch
deleted file mode 100644
index f3c23017572322..00000000000000
--- a/patches.renesas/0144-mmc-tmio-use-SDIO-master-interrupt-bit-only-when-all.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From af0d980752ec94e3e66d8da378ca0a1808839460 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Fri, 9 Dec 2016 17:51:41 +0100
-Subject: [PATCH 144/255] mmc: tmio: use SDIO master interrupt bit only when
- allowed
-
-The master bit to enable SDIO interrupts can only be accessed if
-SCLKDIVEN bit allows that. However, the core uses the SDIO enable
-callback at times when SCLKDIVEN forbids the change. This leads to
-"timeout waiting for SD bus idle" messages.
-
-We now activate the master bit in probe once if SDIO is supported. IRQ
-en-/disabling will be done now by the individual IRQ enablement bits
-only.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Reviewed-by: Yasushi SHOJI <yashi@atmark-techno.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit c51ff6c6180e76a1ba96aef799a9c41aa80fcc95)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c |    7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -140,12 +140,10 @@ static void tmio_mmc_enable_sdio_irq(str
- 
- 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
- 					~TMIO_SDIO_STAT_IOIRQ;
--		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
- 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
- 	} else if (!enable && host->sdio_irq_enabled) {
- 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
- 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
--		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
- 
- 		host->sdio_irq_enabled = false;
- 		pm_runtime_mark_last_busy(mmc_dev(mmc));
-@@ -1232,7 +1230,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_
- 	if (pdata->flags & TMIO_MMC_SDIO_IRQ) {
- 		_host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
- 		sd_ctrl_write16(_host, CTL_SDIO_IRQ_MASK, _host->sdio_irq_mask);
--		sd_ctrl_write16(_host, CTL_TRANSACTION_CTL, 0x0000);
-+		sd_ctrl_write16(_host, CTL_TRANSACTION_CTL, 0x0001);
- 	}
- 
- 	spin_lock_init(&_host->lock);
-@@ -1280,6 +1278,9 @@ void tmio_mmc_host_remove(struct tmio_mm
- 	struct platform_device *pdev = host->pdev;
- 	struct mmc_host *mmc = host->mmc;
- 
-+	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
-+		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
-+
- 	if (!host->native_hotplug)
- 		pm_runtime_get_sync(&pdev->dev);
- 
diff --git a/patches.renesas/0145-arm64-dts-h3ulcb-Provide-sd0_uhs-node.patch b/patches.renesas/0145-arm64-dts-h3ulcb-Provide-sd0_uhs-node.patch
deleted file mode 100644
index f76433fbaf8246..00000000000000
--- a/patches.renesas/0145-arm64-dts-h3ulcb-Provide-sd0_uhs-node.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 8cb4f51c13a5ed389c6f574ef32c07c3ef6684f6 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 1 Dec 2016 10:07:26 +0100
-Subject: [PATCH 145/299] arm64: dts: h3ulcb: Provide sd0_uhs node
-
-Provide separaate sd0 and sd0_uhs nodes rather than duplicate sd0 nodes.
-
-Cc: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Fixes: 93373c309a70 ("arm64: dts: h3ulcb: rename SDHI0 pins")
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8ebcb400af619ee0ddeb39c06fc35511b20cc697)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
-@@ -169,7 +169,7 @@
- 		power-source = <3300>;
- 	};
- 
--	sdhi0_pins_uhs: sd0 {
-+	sdhi0_pins_uhs: sd0_uhs {
- 		groups = "sdhi0_data4", "sdhi0_ctrl";
- 		function = "sdhi0";
- 		power-source = <1800>;
diff --git a/patches.renesas/0145-media-v4l-vsp1-Disable-HSV-formats-on-Gen3-hardware.patch b/patches.renesas/0145-media-v4l-vsp1-Disable-HSV-formats-on-Gen3-hardware.patch
deleted file mode 100644
index 277aa24970f945..00000000000000
--- a/patches.renesas/0145-media-v4l-vsp1-Disable-HSV-formats-on-Gen3-hardware.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From b3de52df146afcab2c2fb0efcc83128484cc3b01 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 28 Feb 2017 19:44:55 -0300
-Subject: [PATCH 145/286] [media] v4l: vsp1: Disable HSV formats on Gen3
- hardware
-
-While all VSP instances can process HSV internally, on Gen3 hardware
-reading or writing HSV24 or HSV32 from/to memory causes the device to
-hang. Disable those pixel formats on Gen3 hardware.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 40ad34d8ebe7abd0d4df35a3364bf446e10f5c52)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_pipe.c |   12 +++++++++---
- 1 file changed, 9 insertions(+), 3 deletions(-)
-
---- a/drivers/media/platform/vsp1/vsp1_pipe.c
-+++ b/drivers/media/platform/vsp1/vsp1_pipe.c
-@@ -157,9 +157,15 @@ const struct vsp1_format_info *vsp1_get_
- {
- 	unsigned int i;
- 
--	/* Special case, the VYUY format is supported on Gen2 only. */
--	if (vsp1->info->gen != 2 && fourcc == V4L2_PIX_FMT_VYUY)
--		return NULL;
-+	/* Special case, the VYUY and HSV formats are supported on Gen2 only. */
-+	if (vsp1->info->gen != 2) {
-+		switch (fourcc) {
-+		case V4L2_PIX_FMT_VYUY:
-+		case V4L2_PIX_FMT_HSV24:
-+		case V4L2_PIX_FMT_HSV32:
-+			return NULL;
-+		}
-+	}
- 
- 	for (i = 0; i < ARRAY_SIZE(vsp1_video_formats); ++i) {
- 		const struct vsp1_format_info *info = &vsp1_video_formats[i];
diff --git a/patches.renesas/0145-mmc-sh_mobile_sdhi-simplify-accessing-DT-data.patch b/patches.renesas/0145-mmc-sh_mobile_sdhi-simplify-accessing-DT-data.patch
deleted file mode 100644
index 3b2b1de1ddecf1..00000000000000
--- a/patches.renesas/0145-mmc-sh_mobile_sdhi-simplify-accessing-DT-data.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 374fc32c3ddab4d815ec3cd7144d3d30a3a5f828 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Mon, 12 Dec 2016 20:51:20 +0100
-Subject: [PATCH 145/255] mmc: sh_mobile_sdhi: simplify accessing DT data
-
-By using the helper of_device_get_match_data(), we can skip some
-checking and make the code simpler.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit dc9f1a8d790ee766c47eca163261225680691e64)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c |   14 ++++----------
- 1 file changed, 4 insertions(+), 10 deletions(-)
-
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -556,8 +556,7 @@ static void sh_mobile_sdhi_enable_dma(st
- 
- static int sh_mobile_sdhi_probe(struct platform_device *pdev)
- {
--	const struct of_device_id *of_id =
--		of_match_device(sh_mobile_sdhi_of_match, &pdev->dev);
-+	const struct sh_mobile_sdhi_of_data *of_data = of_device_get_match_data(&pdev->dev);
- 	struct sh_mobile_sdhi *priv;
- 	struct tmio_mmc_data *mmc_data;
- 	struct tmio_mmc_data *mmd = pdev->dev.platform_data;
-@@ -598,9 +597,8 @@ static int sh_mobile_sdhi_probe(struct p
- 		goto eprobe;
- 	}
- 
--	if (of_id && of_id->data) {
--		const struct sh_mobile_sdhi_of_data *of_data = of_id->data;
- 
-+	if (of_data) {
- 		mmc_data->flags |= of_data->tmio_flags;
- 		mmc_data->ocr_mask = of_data->tmio_ocr_mask;
- 		mmc_data->capabilities |= of_data->capabilities;
-@@ -671,14 +669,10 @@ static int sh_mobile_sdhi_probe(struct p
- 	if (host->mmc->caps & MMC_CAP_UHS_SDR104) {
- 		host->mmc->caps |= MMC_CAP_HW_RESET;
- 
--		if (of_id && of_id->data) {
--			const struct sh_mobile_sdhi_of_data *of_data;
--			const struct sh_mobile_sdhi_scc *taps;
-+		if (of_data) {
-+			const struct sh_mobile_sdhi_scc *taps = of_data->taps;
- 			bool hit = false;
- 
--			of_data = of_id->data;
--			taps = of_data->taps;
--
- 			for (i = 0; i < of_data->taps_num; i++) {
- 				if (taps[i].clk_rate == 0 ||
- 				    taps[i].clk_rate == host->mmc->f_max) {
diff --git a/patches.renesas/0146-media-v4l-vsp1-Fix-struct-vsp1_drm-documentation.patch b/patches.renesas/0146-media-v4l-vsp1-Fix-struct-vsp1_drm-documentation.patch
deleted file mode 100644
index a58313876de0ba..00000000000000
--- a/patches.renesas/0146-media-v4l-vsp1-Fix-struct-vsp1_drm-documentation.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From f526ade345cb37c71922c90f64b843f9b55a7acd Mon Sep 17 00:00:00 2001
-From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-Date: Thu, 2 Mar 2017 07:12:22 -0300
-Subject: [PATCH 146/286] [media] v4l: vsp1: Fix struct vsp1_drm documentation
-
-The struct vsp1_drm references a member 'planes' which doesn't exist.
-Correctly identify this documentation against the 'inputs'
-
-Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 1b8ce4060b02c9ebfcb75a9d91cf85fb1fb1bc1b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_drm.h |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/media/platform/vsp1/vsp1_drm.h
-+++ b/drivers/media/platform/vsp1/vsp1_drm.h
-@@ -21,7 +21,7 @@
-  * vsp1_drm - State for the API exposed to the DRM driver
-  * @pipe: the VSP1 pipeline used for display
-  * @num_inputs: number of active pipeline inputs at the beginning of an update
-- * @planes: source crop rectangle, destination compose rectangle and z-order
-+ * @inputs: source crop rectangle, destination compose rectangle and z-order
-  *	position for every input
-  */
- struct vsp1_drm {
diff --git a/patches.renesas/0146-mmc-sh_mobile_sdhi-improve-prerequisite-for-hw_reset.patch b/patches.renesas/0146-mmc-sh_mobile_sdhi-improve-prerequisite-for-hw_reset.patch
deleted file mode 100644
index 629ff033742770..00000000000000
--- a/patches.renesas/0146-mmc-sh_mobile_sdhi-improve-prerequisite-for-hw_reset.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From c86823eb28834f75c555a0a7262b9676107b9908 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Mon, 12 Dec 2016 20:51:21 +0100
-Subject: [PATCH 146/255] mmc: sh_mobile_sdhi: improve prerequisite for
- hw_reset
-
-We need a SCC unit for hw_reset. Those units can only be described in
-of_data. So, of_data and a valid SCC offset are prerequisites for
-enabling the hw_reset capability. Merge the two 'if' conditions into one
-and add a check for an scc offset.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 6ade9a2c2da855ff38e74c4298976400feca968e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c |   30 ++++++++++++++----------------
- 1 file changed, 14 insertions(+), 16 deletions(-)
-
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -666,27 +666,25 @@ static int sh_mobile_sdhi_probe(struct p
- 	if (ret < 0)
- 		goto efree;
- 
--	if (host->mmc->caps & MMC_CAP_UHS_SDR104) {
-+	if (of_data && of_data->scc_offset && host->mmc->caps & MMC_CAP_UHS_SDR104) {
-+		const struct sh_mobile_sdhi_scc *taps = of_data->taps;
-+		bool hit = false;
-+
- 		host->mmc->caps |= MMC_CAP_HW_RESET;
- 
--		if (of_data) {
--			const struct sh_mobile_sdhi_scc *taps = of_data->taps;
--			bool hit = false;
--
--			for (i = 0; i < of_data->taps_num; i++) {
--				if (taps[i].clk_rate == 0 ||
--				    taps[i].clk_rate == host->mmc->f_max) {
--					host->scc_tappos = taps->tap;
--					hit = true;
--					break;
--				}
-+		for (i = 0; i < of_data->taps_num; i++) {
-+			if (taps[i].clk_rate == 0 ||
-+			    taps[i].clk_rate == host->mmc->f_max) {
-+				host->scc_tappos = taps->tap;
-+				hit = true;
-+				break;
- 			}
-+		}
- 
--			if (!hit)
--				dev_warn(&host->pdev->dev, "Unknown clock rate for SDR104\n");
-+		if (!hit)
-+			dev_warn(&host->pdev->dev, "Unknown clock rate for SDR104\n");
- 
--			priv->scc_ctl = host->ctl + of_data->scc_offset;
--		}
-+		priv->scc_ctl = host->ctl + of_data->scc_offset;
- 	}
- 
- 	i = 0;
diff --git a/patches.renesas/0147-mmc-core-Add-helper-to-see-if-a-host-can-be-retuned.patch b/patches.renesas/0147-mmc-core-Add-helper-to-see-if-a-host-can-be-retuned.patch
deleted file mode 100644
index 3dd34d4a36b52b..00000000000000
--- a/patches.renesas/0147-mmc-core-Add-helper-to-see-if-a-host-can-be-retuned.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From c8a80644992922d65fb3c81b55b7ac58e4ca678b Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 3 Nov 2016 15:15:59 +0100
-Subject: [PATCH 147/299] mmc: core: Add helper to see if a host can be retuned
-
-This is in preparation for restoring saved tuning parameters
-when resuming the TMIO driver.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit c820af5f18ec248b3cb61a9a9ce47ef0f2e9ec63)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/linux/mmc/host.h |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/include/linux/mmc/host.h
-+++ b/include/linux/mmc/host.h
-@@ -546,6 +546,11 @@ static inline void mmc_retune_recheck(st
- 		host->retune_now = 1;
- }
- 
-+static inline bool mmc_can_retune(struct mmc_host *host)
-+{
-+	return host->can_retune == 1;
-+}
-+
- void mmc_retune_pause(struct mmc_host *host);
- void mmc_retune_unpause(struct mmc_host *host);
- 
diff --git a/patches.renesas/0147-mmc-sh_mobile_sdhi-improve-prerequisites-for-tuning.patch b/patches.renesas/0147-mmc-sh_mobile_sdhi-improve-prerequisites-for-tuning.patch
deleted file mode 100644
index 5b08d3073ff2a2..00000000000000
--- a/patches.renesas/0147-mmc-sh_mobile_sdhi-improve-prerequisites-for-tuning.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 6fcc6d9f216baf519067987fc4e058e29ba2f64c Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Mon, 12 Dec 2016 20:51:22 +0100
-Subject: [PATCH 147/255] mmc: sh_mobile_sdhi: improve prerequisites for tuning
-
-Prerequisites for tuning are the same as for hw_reset. We need an SCC
-and a supported mode. Populate the tuning related functions only when
-those conditions are met. This also removes a tiny race window.
-Previously, the functions were populated when the SCC offset was not
-initialized which could have led to an OOPS.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit e831ead3b3ddc4227cef10dc63d919fd7242d7b8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c |   11 ++++++-----
- 1 file changed, 6 insertions(+), 5 deletions(-)
-
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -621,11 +621,6 @@ static int sh_mobile_sdhi_probe(struct p
- 		host->card_busy	= sh_mobile_sdhi_card_busy;
- 		host->start_signal_voltage_switch =
- 			sh_mobile_sdhi_start_signal_voltage_switch;
--		host->init_tuning	= sh_mobile_sdhi_init_tuning;
--		host->prepare_tuning	= sh_mobile_sdhi_prepare_tuning;
--		host->select_tuning	= sh_mobile_sdhi_select_tuning;
--		host->check_scc_error	= sh_mobile_sdhi_check_scc_error;
--		host->hw_reset		= sh_mobile_sdhi_hw_reset;
- 	}
- 
- 	/* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */
-@@ -666,6 +661,7 @@ static int sh_mobile_sdhi_probe(struct p
- 	if (ret < 0)
- 		goto efree;
- 
-+	/* Enable tuning iff we have an SCC and a supported mode */
- 	if (of_data && of_data->scc_offset && host->mmc->caps & MMC_CAP_UHS_SDR104) {
- 		const struct sh_mobile_sdhi_scc *taps = of_data->taps;
- 		bool hit = false;
-@@ -685,6 +681,11 @@ static int sh_mobile_sdhi_probe(struct p
- 			dev_warn(&host->pdev->dev, "Unknown clock rate for SDR104\n");
- 
- 		priv->scc_ctl = host->ctl + of_data->scc_offset;
-+		host->init_tuning = sh_mobile_sdhi_init_tuning;
-+		host->prepare_tuning = sh_mobile_sdhi_prepare_tuning;
-+		host->select_tuning = sh_mobile_sdhi_select_tuning;
-+		host->check_scc_error = sh_mobile_sdhi_check_scc_error;
-+		host->hw_reset = sh_mobile_sdhi_hw_reset;
- 	}
- 
- 	i = 0;
diff --git a/patches.renesas/0148-media-v4l-vsp1-wpf-Implement-rotation-support.patch b/patches.renesas/0148-media-v4l-vsp1-wpf-Implement-rotation-support.patch
deleted file mode 100644
index c81d8e637897cb..00000000000000
--- a/patches.renesas/0148-media-v4l-vsp1-wpf-Implement-rotation-support.patch
+++ /dev/null
@@ -1,390 +0,0 @@
-From 04ea04ffd159659412bb8d7f22060c26675f6d05 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 20 Jun 2016 06:07:08 -0300
-Subject: [PATCH 148/286] [media] v4l: vsp1: wpf: Implement rotation support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Some WPF instances, on Gen3 devices, can perform 90° rotation when
-writing frames to memory. Implement support for this using the
-V4L2_CID_ROTATE control.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 3e9a0e0bfafdf6c28c520d43fd64c5775d04662f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_rpf.c   |    2 
- drivers/media/platform/vsp1/vsp1_rwpf.c  |    5 
- drivers/media/platform/vsp1/vsp1_rwpf.h  |    7 -
- drivers/media/platform/vsp1/vsp1_video.c |   12 +
- drivers/media/platform/vsp1/vsp1_wpf.c   |  205 +++++++++++++++++++++++--------
- 5 files changed, 177 insertions(+), 54 deletions(-)
-
---- a/drivers/media/platform/vsp1/vsp1_rpf.c
-+++ b/drivers/media/platform/vsp1/vsp1_rpf.c
-@@ -106,7 +106,7 @@ static void rpf_configure(struct vsp1_en
- 			 * of the pipeline.
- 			 */
- 			output = vsp1_entity_get_pad_format(wpf, wpf->config,
--							    RWPF_PAD_SOURCE);
-+							    RWPF_PAD_SINK);
- 
- 			crop.width = pipe->partition.width * input_width
- 				   / output->width;
---- a/drivers/media/platform/vsp1/vsp1_rwpf.c
-+++ b/drivers/media/platform/vsp1/vsp1_rwpf.c
-@@ -121,6 +121,11 @@ static int vsp1_rwpf_set_format(struct v
- 					    RWPF_PAD_SOURCE);
- 	*format = fmt->format;
- 
-+	if (rwpf->flip.rotate) {
-+		format->width = fmt->format.height;
-+		format->height = fmt->format.width;
-+	}
-+
- done:
- 	mutex_unlock(&rwpf->entity.lock);
- 	return ret;
---- a/drivers/media/platform/vsp1/vsp1_rwpf.h
-+++ b/drivers/media/platform/vsp1/vsp1_rwpf.h
-@@ -56,9 +56,14 @@ struct vsp1_rwpf {
- 
- 	struct {
- 		spinlock_t lock;
--		struct v4l2_ctrl *ctrls[2];
-+		struct {
-+			struct v4l2_ctrl *vflip;
-+			struct v4l2_ctrl *hflip;
-+			struct v4l2_ctrl *rotate;
-+		} ctrls;
- 		unsigned int pending;
- 		unsigned int active;
-+		bool rotate;
- 	} flip;
- 
- 	struct vsp1_rwpf_memory mem;
---- a/drivers/media/platform/vsp1/vsp1_video.c
-+++ b/drivers/media/platform/vsp1/vsp1_video.c
-@@ -187,9 +187,13 @@ static void vsp1_video_pipeline_setup_pa
- 	struct vsp1_entity *entity;
- 	unsigned int div_size;
- 
-+	/*
-+	 * Partitions are computed on the size before rotation, use the format
-+	 * at the WPF sink.
-+	 */
- 	format = vsp1_entity_get_pad_format(&pipe->output->entity,
- 					    pipe->output->entity.config,
--					    RWPF_PAD_SOURCE);
-+					    RWPF_PAD_SINK);
- 	div_size = format->width;
- 
- 	/* Gen2 hardware doesn't require image partitioning. */
-@@ -229,9 +233,13 @@ static struct v4l2_rect vsp1_video_parti
- 	struct v4l2_rect partition;
- 	unsigned int modulus;
- 
-+	/*
-+	 * Partitions are computed on the size before rotation, use the format
-+	 * at the WPF sink.
-+	 */
- 	format = vsp1_entity_get_pad_format(&pipe->output->entity,
- 					    pipe->output->entity.config,
--					    RWPF_PAD_SOURCE);
-+					    RWPF_PAD_SINK);
- 
- 	/* A single partition simply processes the output size in full. */
- 	if (pipe->partitions <= 1) {
---- a/drivers/media/platform/vsp1/vsp1_wpf.c
-+++ b/drivers/media/platform/vsp1/vsp1_wpf.c
-@@ -43,32 +43,90 @@ static inline void vsp1_wpf_write(struct
- enum wpf_flip_ctrl {
- 	WPF_CTRL_VFLIP = 0,
- 	WPF_CTRL_HFLIP = 1,
--	WPF_CTRL_MAX,
- };
- 
-+static int vsp1_wpf_set_rotation(struct vsp1_rwpf *wpf, unsigned int rotation)
-+{
-+	struct vsp1_video *video = wpf->video;
-+	struct v4l2_mbus_framefmt *sink_format;
-+	struct v4l2_mbus_framefmt *source_format;
-+	bool rotate;
-+	int ret = 0;
-+
-+	/*
-+	 * Only consider the 0°/180° from/to 90°/270° modifications, the rest
-+	 * is taken care of by the flipping configuration.
-+	 */
-+	rotate = rotation == 90 || rotation == 270;
-+	if (rotate == wpf->flip.rotate)
-+		return 0;
-+
-+	/* Changing rotation isn't allowed when buffers are allocated. */
-+	mutex_lock(&video->lock);
-+
-+	if (vb2_is_busy(&video->queue)) {
-+		ret = -EBUSY;
-+		goto done;
-+	}
-+
-+	sink_format = vsp1_entity_get_pad_format(&wpf->entity,
-+						 wpf->entity.config,
-+						 RWPF_PAD_SINK);
-+	source_format = vsp1_entity_get_pad_format(&wpf->entity,
-+						   wpf->entity.config,
-+						   RWPF_PAD_SOURCE);
-+
-+	mutex_lock(&wpf->entity.lock);
-+
-+	if (rotate) {
-+		source_format->width = sink_format->height;
-+		source_format->height = sink_format->width;
-+	} else {
-+		source_format->width = sink_format->width;
-+		source_format->height = sink_format->height;
-+	}
-+
-+	wpf->flip.rotate = rotate;
-+
-+	mutex_unlock(&wpf->entity.lock);
-+
-+done:
-+	mutex_unlock(&video->lock);
-+	return ret;
-+}
-+
- static int vsp1_wpf_s_ctrl(struct v4l2_ctrl *ctrl)
- {
- 	struct vsp1_rwpf *wpf =
- 		container_of(ctrl->handler, struct vsp1_rwpf, ctrls);
--	unsigned int i;
-+	unsigned int rotation;
- 	u32 flip = 0;
-+	int ret;
- 
--	switch (ctrl->id) {
--	case V4L2_CID_HFLIP:
--	case V4L2_CID_VFLIP:
--		for (i = 0; i < WPF_CTRL_MAX; ++i) {
--			if (wpf->flip.ctrls[i])
--				flip |= wpf->flip.ctrls[i]->val ? BIT(i) : 0;
--		}
-+	/* Update the rotation. */
-+	rotation = wpf->flip.ctrls.rotate ? wpf->flip.ctrls.rotate->val : 0;
-+	ret = vsp1_wpf_set_rotation(wpf, rotation);
-+	if (ret < 0)
-+		return ret;
- 
--		spin_lock_irq(&wpf->flip.lock);
--		wpf->flip.pending = flip;
--		spin_unlock_irq(&wpf->flip.lock);
--		break;
-+	/*
-+	 * Compute the flip value resulting from all three controls, with
-+	 * rotation by 180° flipping the image in both directions. Store the
-+	 * result in the pending flip field for the next frame that will be
-+	 * processed.
-+	 */
-+	if (wpf->flip.ctrls.vflip->val)
-+		flip |= BIT(WPF_CTRL_VFLIP);
- 
--	default:
--		return -EINVAL;
--	}
-+	if (wpf->flip.ctrls.hflip && wpf->flip.ctrls.hflip->val)
-+		flip |= BIT(WPF_CTRL_HFLIP);
-+
-+	if (rotation == 180 || rotation == 270)
-+		flip ^= BIT(WPF_CTRL_VFLIP) | BIT(WPF_CTRL_HFLIP);
-+
-+	spin_lock_irq(&wpf->flip.lock);
-+	wpf->flip.pending = flip;
-+	spin_unlock_irq(&wpf->flip.lock);
- 
- 	return 0;
- }
-@@ -89,10 +147,10 @@ static int wpf_init_controls(struct vsp1
- 		num_flip_ctrls = 0;
- 	} else if (vsp1->info->features & VSP1_HAS_WPF_HFLIP) {
- 		/*
--		 * When horizontal flip is supported the WPF implements two
--		 * controls (horizontal flip and vertical flip).
-+		 * When horizontal flip is supported the WPF implements three
-+		 * controls (horizontal flip, vertical flip and rotation).
- 		 */
--		num_flip_ctrls = 2;
-+		num_flip_ctrls = 3;
- 	} else if (vsp1->info->features & VSP1_HAS_WPF_VFLIP) {
- 		/*
- 		 * When only vertical flip is supported the WPF implements a
-@@ -107,17 +165,19 @@ static int wpf_init_controls(struct vsp1
- 	vsp1_rwpf_init_ctrls(wpf, num_flip_ctrls);
- 
- 	if (num_flip_ctrls >= 1) {
--		wpf->flip.ctrls[WPF_CTRL_VFLIP] =
-+		wpf->flip.ctrls.vflip =
- 			v4l2_ctrl_new_std(&wpf->ctrls, &vsp1_wpf_ctrl_ops,
- 					  V4L2_CID_VFLIP, 0, 1, 1, 0);
- 	}
- 
--	if (num_flip_ctrls == 2) {
--		wpf->flip.ctrls[WPF_CTRL_HFLIP] =
-+	if (num_flip_ctrls == 3) {
-+		wpf->flip.ctrls.hflip =
- 			v4l2_ctrl_new_std(&wpf->ctrls, &vsp1_wpf_ctrl_ops,
- 					  V4L2_CID_HFLIP, 0, 1, 1, 0);
--
--		v4l2_ctrl_cluster(2, wpf->flip.ctrls);
-+		wpf->flip.ctrls.rotate =
-+			v4l2_ctrl_new_std(&wpf->ctrls, &vsp1_wpf_ctrl_ops,
-+					  V4L2_CID_ROTATE, 0, 270, 90, 0);
-+		v4l2_ctrl_cluster(3, &wpf->flip.ctrls.vflip);
- 	}
- 
- 	if (wpf->ctrls.error) {
-@@ -222,8 +282,8 @@ static void wpf_configure(struct vsp1_en
- 		const struct vsp1_format_info *fmtinfo = wpf->fmtinfo;
- 		struct vsp1_rwpf_memory mem = wpf->mem;
- 		unsigned int flip = wpf->flip.active;
--		unsigned int width = source_format->width;
--		unsigned int height = source_format->height;
-+		unsigned int width = sink_format->width;
-+		unsigned int height = sink_format->height;
- 		unsigned int offset;
- 
- 		/*
-@@ -246,45 +306,78 @@ static void wpf_configure(struct vsp1_en
- 		/*
- 		 * Update the memory offsets based on flipping configuration.
- 		 * The destination addresses point to the locations where the
--		 * VSP starts writing to memory, which can be different corners
--		 * of the image depending on vertical flipping.
-+		 * VSP starts writing to memory, which can be any corner of the
-+		 * image depending on the combination of flipping and rotation.
- 		 */
--		if (pipe->partitions > 1) {
--			const struct vsp1_format_info *fmtinfo = wpf->fmtinfo;
- 
--			/*
--			 * Horizontal flipping is handled through a line buffer
--			 * and doesn't modify the start address, but still needs
--			 * to be handled when image partitioning is in effect to
--			 * order the partitions correctly.
--			 */
--			if (flip & BIT(WPF_CTRL_HFLIP))
--				offset = format->width - pipe->partition.left
--					- pipe->partition.width;
-+		/*
-+		 * First take the partition left coordinate into account.
-+		 * Compute the offset to order the partitions correctly on the
-+		 * output based on whether flipping is enabled. Consider
-+		 * horizontal flipping when rotation is disabled but vertical
-+		 * flipping when rotation is enabled, as rotating the image
-+		 * switches the horizontal and vertical directions. The offset
-+		 * is applied horizontally or vertically accordingly.
-+		 */
-+		if (flip & BIT(WPF_CTRL_HFLIP) && !wpf->flip.rotate)
-+			offset = format->width - pipe->partition.left
-+				- pipe->partition.width;
-+		else if (flip & BIT(WPF_CTRL_VFLIP) && wpf->flip.rotate)
-+			offset = format->height - pipe->partition.left
-+				- pipe->partition.width;
-+		else
-+			offset = pipe->partition.left;
-+
-+		for (i = 0; i < format->num_planes; ++i) {
-+			unsigned int hsub = i > 0 ? fmtinfo->hsub : 1;
-+			unsigned int vsub = i > 0 ? fmtinfo->vsub : 1;
-+
-+			if (wpf->flip.rotate)
-+				mem.addr[i] += offset / vsub
-+					     * format->plane_fmt[i].bytesperline;
- 			else
--				offset = pipe->partition.left;
--
--			mem.addr[0] += offset * fmtinfo->bpp[0] / 8;
--			if (format->num_planes > 1) {
--				mem.addr[1] += offset / fmtinfo->hsub
--					     * fmtinfo->bpp[1] / 8;
--				mem.addr[2] += offset / fmtinfo->hsub
--					     * fmtinfo->bpp[2] / 8;
--			}
-+				mem.addr[i] += offset / hsub
-+					     * fmtinfo->bpp[i] / 8;
- 		}
- 
- 		if (flip & BIT(WPF_CTRL_VFLIP)) {
--			mem.addr[0] += (format->height - 1)
-+			/*
-+			 * When rotating the output (after rotation) image
-+			 * height is equal to the partition width (before
-+			 * rotation). Otherwise it is equal to the output
-+			 * image height.
-+			 */
-+			if (wpf->flip.rotate)
-+				height = pipe->partition.width;
-+			else
-+				height = format->height;
-+
-+			mem.addr[0] += (height - 1)
- 				     * format->plane_fmt[0].bytesperline;
- 
- 			if (format->num_planes > 1) {
--				offset = (format->height / wpf->fmtinfo->vsub - 1)
-+				offset = (height / fmtinfo->vsub - 1)
- 				       * format->plane_fmt[1].bytesperline;
- 				mem.addr[1] += offset;
- 				mem.addr[2] += offset;
- 			}
- 		}
- 
-+		if (wpf->flip.rotate && !(flip & BIT(WPF_CTRL_HFLIP))) {
-+			unsigned int hoffset = max(0, (int)format->width - 16);
-+
-+			/*
-+			 * Compute the output coordinate. The partition
-+			 * horizontal (left) offset becomes a vertical offset.
-+			 */
-+			for (i = 0; i < format->num_planes; ++i) {
-+				unsigned int hsub = i > 0 ? fmtinfo->hsub : 1;
-+
-+				mem.addr[i] += hoffset / hsub
-+					     * fmtinfo->bpp[i] / 8;
-+			}
-+		}
-+
- 		/*
- 		 * On Gen3 hardware the SPUVS bit has no effect on 3-planar
- 		 * formats. Swap the U and V planes manually in that case.
-@@ -306,6 +399,9 @@ static void wpf_configure(struct vsp1_en
- 
- 		outfmt = fmtinfo->hwfmt << VI6_WPF_OUTFMT_WRFMT_SHIFT;
- 
-+		if (wpf->flip.rotate)
-+			outfmt |= VI6_WPF_OUTFMT_ROT;
-+
- 		if (fmtinfo->alpha)
- 			outfmt |= VI6_WPF_OUTFMT_PXA;
- 		if (fmtinfo->swap_yc)
-@@ -367,9 +463,18 @@ static void wpf_configure(struct vsp1_en
- 			   VI6_WFP_IRQ_ENB_DFEE);
- }
- 
-+static unsigned int wpf_max_width(struct vsp1_entity *entity,
-+				  struct vsp1_pipeline *pipe)
-+{
-+	struct vsp1_rwpf *wpf = to_rwpf(&entity->subdev);
-+
-+	return wpf->flip.rotate ? 256 : wpf->max_width;
-+}
-+
- static const struct vsp1_entity_operations wpf_entity_ops = {
- 	.destroy = vsp1_wpf_destroy,
- 	.configure = wpf_configure,
-+	.max_width = wpf_max_width,
- };
- 
- /* -----------------------------------------------------------------------------
diff --git a/patches.renesas/0148-mmc-sh_mobile_sdhi-remove-superfluous-check-in-hw_re.patch b/patches.renesas/0148-mmc-sh_mobile_sdhi-remove-superfluous-check-in-hw_re.patch
deleted file mode 100644
index 5946ccce5b2720..00000000000000
--- a/patches.renesas/0148-mmc-sh_mobile_sdhi-remove-superfluous-check-in-hw_re.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 1a7aec08d1bb61d7bc8dd950513736e47cd382e1 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Mon, 12 Dec 2016 20:51:23 +0100
-Subject: [PATCH 148/255] mmc: sh_mobile_sdhi: remove superfluous check in
- hw_reset
-
-The capability for HW_RESET is only activated if SDR104 is present, so
-no need to check for SDR104 in the function itself again.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 97c64b2cd57608f7064810780056d17944f49128)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c |    3 ---
- 1 file changed, 3 deletions(-)
-
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -468,9 +468,6 @@ static void sh_mobile_sdhi_hw_reset(stru
- {
- 	struct sh_mobile_sdhi *priv;
- 
--	if (!(host->mmc->caps & MMC_CAP_UHS_SDR104))
--		return;
--
- 	priv = host_to_priv(host);
- 
- 	/* Reset SCC */
diff --git a/patches.renesas/0148-mmc-tmio-enhance-illegal-sequence-handling.patch b/patches.renesas/0148-mmc-tmio-enhance-illegal-sequence-handling.patch
deleted file mode 100644
index f71db9448bc33c..00000000000000
--- a/patches.renesas/0148-mmc-tmio-enhance-illegal-sequence-handling.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From ec902efc98f3e08338f880411687e11e7ce505c2 Mon Sep 17 00:00:00 2001
-From: Ai Kyuse <ai.kyuse.uw@renesas.com>
-Date: Thu, 3 Nov 2016 15:16:00 +0100
-Subject: [PATCH 148/299] mmc: tmio: enhance illegal sequence handling
-
-An illegal sequence command error may occur if there is a stopbit or
-cmd_index error as well as a CRC error. The correct course of action
-is to re-enable IRQs
-
-An illegal sequence data error may occur if there is a CRC or stopbit
-error,  or underrun. In this case set data->error correctly.
-
-This is in preparation for enabling tuning support which relies on
-differentiating between illegal sequence and other errors.
-
-Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com>
-[simon: broken out of a larger patch]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-
-(cherry picked from commit 96e0b2ba00ee5dacb12bed6585145ce784ec9153)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c |   15 +++++++++------
- 1 file changed, 9 insertions(+), 6 deletions(-)
-
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -552,7 +552,7 @@ void tmio_mmc_do_data_irq(struct tmio_mm
- 	schedule_work(&host->done);
- }
- 
--static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
-+static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
- {
- 	struct mmc_data *data;
- 	spin_lock(&host->lock);
-@@ -561,6 +561,9 @@ static void tmio_mmc_data_irq(struct tmi
- 	if (!data)
- 		goto out;
- 
-+	if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
-+	    stat & TMIO_STAT_TXUNDERRUN)
-+		data->error = -EILSEQ;
- 	if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
- 		u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
- 		bool done = false;
-@@ -609,8 +612,6 @@ static void tmio_mmc_cmd_irq(struct tmio
- 		goto out;
- 	}
- 
--	host->cmd = NULL;
--
- 	/* This controller is sicker than the PXA one. Not only do we need to
- 	 * drop the top 8 bits of the first response word, we also need to
- 	 * modify the order of the response for short response command types.
-@@ -630,14 +631,16 @@ static void tmio_mmc_cmd_irq(struct tmio
- 
- 	if (stat & TMIO_STAT_CMDTIMEOUT)
- 		cmd->error = -ETIMEDOUT;
--	else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
-+	else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
-+		 stat & TMIO_STAT_STOPBIT_ERR ||
-+		 stat & TMIO_STAT_CMD_IDX_ERR)
- 		cmd->error = -EILSEQ;
- 
- 	/* If there is data to handle we enable data IRQs here, and
- 	 * we will ultimatley finish the request in the data_end handler.
- 	 * If theres no data or we encountered an error, finish now.
- 	 */
--	if (host->data && !cmd->error) {
-+	if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
- 		if (host->data->flags & MMC_DATA_READ) {
- 			if (host->force_pio || !host->chan_rx)
- 				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
-@@ -698,7 +701,7 @@ static bool __tmio_mmc_sdcard_irq(struct
- 	/* Data transfer completion */
- 	if (ireg & TMIO_STAT_DATAEND) {
- 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
--		tmio_mmc_data_irq(host);
-+		tmio_mmc_data_irq(host, status);
- 		return true;
- 	}
- 
diff --git a/patches.renesas/0149-ASoC-wm8978-Add-OF-device-ID-table.patch b/patches.renesas/0149-ASoC-wm8978-Add-OF-device-ID-table.patch
deleted file mode 100644
index 328b25281c4358..00000000000000
--- a/patches.renesas/0149-ASoC-wm8978-Add-OF-device-ID-table.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From b4386b538ebb1ae0f5f8d7e5027df0e3c26562f7 Mon Sep 17 00:00:00 2001
-From: Javier Martinez Canillas <javier@osg.samsung.com>
-Date: Tue, 4 Apr 2017 15:26:29 -0400
-Subject: [PATCH 149/286] ASoC: wm8978: Add OF device ID table
-
-The driver doesn't have a struct of_device_id table but supported devices
-are registered via Device Trees. This is working on the assumption that a
-I2C device registered via OF will always match a legacy I2C device ID and
-that the MODALIAS reported will always be of the form i2c:<device>.
-
-But this could change in the future so the correct approach is to have an
-OF device ID table if the devices are registered via OF.
-
-Before this patch:
-
-$ modinfo sound/soc/codecs/snd-soc-wm8978.ko | grep alias
-alias:          i2c:wm8978
-
-After this patch:
-
-$ modinfo sound/soc/codecs/snd-soc-wm8978.ko | grep alias
-alias:          i2c:wm8978
-alias:          of:N*T*Cwlf,wm8978C*
-alias:          of:N*T*Cwlf,wm8978
-
-Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
-Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit 5cf015d9cb02c360582b624497b0a1716881cf28)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/codecs/wm8978.c |    7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/sound/soc/codecs/wm8978.c
-+++ b/sound/soc/codecs/wm8978.c
-@@ -1071,9 +1071,16 @@ static const struct i2c_device_id wm8978
- };
- MODULE_DEVICE_TABLE(i2c, wm8978_i2c_id);
- 
-+static const struct of_device_id wm8978_of_match[] = {
-+	{ .compatible = "wlf,wm8978", },
-+	{ }
-+};
-+MODULE_DEVICE_TABLE(of, wm8978_of_match);
-+
- static struct i2c_driver wm8978_i2c_driver = {
- 	.driver = {
- 		.name = "wm8978",
-+		.of_match_table = wm8978_of_match,
- 	},
- 	.probe =    wm8978_i2c_probe,
- 	.remove =   wm8978_i2c_remove,
diff --git a/patches.renesas/0149-mmc-sh_mobile_sdhi-remove-superfluous-check-in-init_.patch b/patches.renesas/0149-mmc-sh_mobile_sdhi-remove-superfluous-check-in-init_.patch
deleted file mode 100644
index c2431692d99890..00000000000000
--- a/patches.renesas/0149-mmc-sh_mobile_sdhi-remove-superfluous-check-in-init_.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 895beeb9f9a78d1df746d36c8b23027bfb5519ef Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Mon, 12 Dec 2016 20:51:24 +0100
-Subject: [PATCH 149/255] mmc: sh_mobile_sdhi: remove superfluous check in
- init_tuning
-
-The function will only be available if SDR104 was detected in probe,
-so no need to check in the function itself again.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 7f9096f1c89ea698c22fde91285de2ef3eabd614)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c |    3 ---
- 1 file changed, 3 deletions(-)
-
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -335,9 +335,6 @@ static unsigned int sh_mobile_sdhi_init_
- {
- 	struct sh_mobile_sdhi *priv;
- 
--	if (!(host->mmc->caps & MMC_CAP_UHS_SDR104))
--		return 0;
--
- 	priv = host_to_priv(host);
- 
- 	/* set sampling clock selection range */
diff --git a/patches.renesas/0149-mmc-tmio-document-mandatory-and-optional-callbacks.patch b/patches.renesas/0149-mmc-tmio-document-mandatory-and-optional-callbacks.patch
deleted file mode 100644
index d6447e65ce1ba1..00000000000000
--- a/patches.renesas/0149-mmc-tmio-document-mandatory-and-optional-callbacks.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 29624c269f19acfb89d43134d37f6ca7c7ecf4f9 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 3 Nov 2016 15:16:01 +0100
-Subject: [PATCH 149/299] mmc: tmio: document mandatory and optional callbacks
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 2f87365f832bbc26e32f23588aaeb40abe15ff0d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc.h |    5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
---- a/drivers/mmc/host/tmio_mmc.h
-+++ b/drivers/mmc/host/tmio_mmc.h
-@@ -154,8 +154,10 @@ struct tmio_mmc_host {
- 	bool			native_hotplug;
- 	bool			sdio_irq_enabled;
- 
--	int (*write16_hook)(struct tmio_mmc_host *host, int addr);
-+	/* Mandatory callback */
- 	int (*clk_enable)(struct tmio_mmc_host *host);
-+
-+	/* Optional callbacks */
- 	unsigned int (*clk_update)(struct tmio_mmc_host *host,
- 				   unsigned int new_clock);
- 	void (*clk_disable)(struct tmio_mmc_host *host);
-@@ -164,6 +166,7 @@ struct tmio_mmc_host {
- 	int (*card_busy)(struct mmc_host *mmc);
- 	int (*start_signal_voltage_switch)(struct mmc_host *mmc,
- 					   struct mmc_ios *ios);
-+	int (*write16_hook)(struct tmio_mmc_host *host, int addr);
- };
- 
- struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev);
diff --git a/patches.renesas/0150-clk-renesas-r8a7795-Add-IMR-clocks.patch b/patches.renesas/0150-clk-renesas-r8a7795-Add-IMR-clocks.patch
deleted file mode 100644
index 08003254c826c7..00000000000000
--- a/patches.renesas/0150-clk-renesas-r8a7795-Add-IMR-clocks.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 30e3de305ef9e331dbfaf2c79dbec3865aaa4553 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Tue, 14 Feb 2017 00:06:04 +0300
-Subject: [PATCH 150/286] clk: renesas: r8a7795: Add IMR clocks
-
-Add the IMR[0-3] clocks to the R8A7795 CPG/MSSR driver.
-
-Based on the original (and large) patch by Konstantin Kozhevnikov
-<Konstantin.Kozhevnikov@cogentembedded.com>.
-
-Signed-off-by: Konstantin Kozhevnikov <Konstantin.Kozhevnikov@cogentembedded.com>
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 7d0a7c7bdf7f849ff864a539f1c0c20b8a053f2e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7795-cpg-mssr.c |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
-@@ -208,6 +208,10 @@ static const struct mssr_mod_clk r8a7795
- 	DEF_MOD("vin0",			 811,	R8A7795_CLK_S2D1),
- 	DEF_MOD("etheravb",		 812,	R8A7795_CLK_S3D2),
- 	DEF_MOD("sata0",		 815,	R8A7795_CLK_S3D2),
-+	DEF_MOD("imr3",			 820,	R8A7795_CLK_S2D1),
-+	DEF_MOD("imr2",			 821,	R8A7795_CLK_S2D1),
-+	DEF_MOD("imr1",			 822,	R8A7795_CLK_S2D1),
-+	DEF_MOD("imr0",			 823,	R8A7795_CLK_S2D1),
- 	DEF_MOD("gpio7",		 905,	R8A7795_CLK_CP),
- 	DEF_MOD("gpio6",		 906,	R8A7795_CLK_CP),
- 	DEF_MOD("gpio5",		 907,	R8A7795_CLK_CP),
diff --git a/patches.renesas/0150-mmc-sh_mobile_sdhi-remove-superfluous-check-in-SCC-e.patch b/patches.renesas/0150-mmc-sh_mobile_sdhi-remove-superfluous-check-in-SCC-e.patch
deleted file mode 100644
index 32dd5a2a01110c..00000000000000
--- a/patches.renesas/0150-mmc-sh_mobile_sdhi-remove-superfluous-check-in-SCC-e.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From bce42a1c5866608e60c00657a72a683c461be0f5 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Mon, 12 Dec 2016 20:51:25 +0100
-Subject: [PATCH 150/255] mmc: sh_mobile_sdhi: remove superfluous check in SCC
- error check
-
-The function will only be available if SDR104 was detected in probe,
-so no need to check in the function itself again.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 03c5b0d90300fc725fc1fb644872b522483a2d7e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c |    7 +------
- 1 file changed, 1 insertion(+), 6 deletions(-)
-
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -441,12 +441,7 @@ static int sh_mobile_sdhi_select_tuning(
- 
- static bool sh_mobile_sdhi_check_scc_error(struct tmio_mmc_host *host)
- {
--	struct sh_mobile_sdhi *priv;
--
--	if (!(host->mmc->caps & MMC_CAP_UHS_SDR104))
--		return 0;
--
--	priv = host_to_priv(host);
-+	struct sh_mobile_sdhi *priv = host_to_priv(host);
- 
- 	/* Check SCC error */
- 	if (sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL) &
diff --git a/patches.renesas/0150-mmc-tmio-Add-hw-reset-support.patch b/patches.renesas/0150-mmc-tmio-Add-hw-reset-support.patch
deleted file mode 100644
index 85d1c0c1ab1f17..00000000000000
--- a/patches.renesas/0150-mmc-tmio-Add-hw-reset-support.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From e594f70dc87a42560b925e3abc450d6e16f65584 Mon Sep 17 00:00:00 2001
-From: Ai Kyuse <ai.kyuse.uw@renesas.com>
-Date: Thu, 3 Nov 2016 15:16:02 +0100
-Subject: [PATCH 150/299] mmc: tmio: Add hw reset support
-
-Add hw reset support.
-
-Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit e8f36b5d3b54a49df02c950050659a5082e2c880)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc.h     |    1 +
- drivers/mmc/host/tmio_mmc_pio.c |    9 +++++++++
- 2 files changed, 10 insertions(+)
-
---- a/drivers/mmc/host/tmio_mmc.h
-+++ b/drivers/mmc/host/tmio_mmc.h
-@@ -167,6 +167,7 @@ struct tmio_mmc_host {
- 	int (*start_signal_voltage_switch)(struct mmc_host *mmc,
- 					   struct mmc_ios *ios);
- 	int (*write16_hook)(struct tmio_mmc_host *host, int addr);
-+	void (*hw_reset)(struct tmio_mmc_host *host);
- };
- 
- struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev);
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -789,6 +789,14 @@ static int tmio_mmc_start_data(struct tm
- 	return 0;
- }
- 
-+static void tmio_mmc_hw_reset(struct mmc_host *mmc)
-+{
-+	struct tmio_mmc_host *host = mmc_priv(mmc);
-+
-+	if (host->hw_reset)
-+		host->hw_reset(host);
-+}
-+
- /* Process requests from the MMC layer */
- static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
- {
-@@ -1005,6 +1013,7 @@ static struct mmc_host_ops tmio_mmc_ops
- 	.get_cd		= mmc_gpio_get_cd,
- 	.enable_sdio_irq = tmio_mmc_enable_sdio_irq,
- 	.multi_io_quirk	= tmio_multi_io_quirk,
-+	.hw_reset	= tmio_mmc_hw_reset,
- };
- 
- static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
diff --git a/patches.renesas/0151-clk-renesas-r8a7796-Add-IMR-clocks.patch b/patches.renesas/0151-clk-renesas-r8a7796-Add-IMR-clocks.patch
deleted file mode 100644
index 6686f84d0272c8..00000000000000
--- a/patches.renesas/0151-clk-renesas-r8a7796-Add-IMR-clocks.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 5b49a3b7db3995ccfd0e4d3ecf0f76f895a13c47 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 19 Feb 2017 00:39:26 +0300
-Subject: [PATCH 151/286] clk: renesas: r8a7796: Add IMR clocks
-
-Add the IMR[0-1] clocks to the R8A7796 CPG/MSSR driver.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-[geert: Correct parent clocks]
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-
-(cherry picked from commit 6c8a9312946374947287ac1bd3b94aba850a5d1f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -179,6 +179,8 @@ static const struct mssr_mod_clk r8a7796
- 	DEF_MOD("vin1",			 810,	R8A7796_CLK_S0D2),
- 	DEF_MOD("vin0",			 811,	R8A7796_CLK_S0D2),
- 	DEF_MOD("etheravb",		 812,	R8A7796_CLK_S0D6),
-+	DEF_MOD("imr1",			 822,	R8A7796_CLK_S0D2),
-+	DEF_MOD("imr0",			 823,	R8A7796_CLK_S0D2),
- 	DEF_MOD("gpio7",		 905,	R8A7796_CLK_S3D4),
- 	DEF_MOD("gpio6",		 906,	R8A7796_CLK_S3D4),
- 	DEF_MOD("gpio5",		 907,	R8A7796_CLK_S3D4),
diff --git a/patches.renesas/0151-mmc-sh_mobile_sdhi-enable-HS200.patch b/patches.renesas/0151-mmc-sh_mobile_sdhi-enable-HS200.patch
deleted file mode 100644
index 208fefaa0d4f9f..00000000000000
--- a/patches.renesas/0151-mmc-sh_mobile_sdhi-enable-HS200.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 73a988ba30fc3a18e557d4a29cc862ee870f603c Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Mon, 12 Dec 2016 20:51:26 +0100
-Subject: [PATCH 151/255] mmc: sh_mobile_sdhi: enable HS200
-
-Setup tuning when the board is HS200 enabled.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit b1c95170f97ef19ff63a6da1eb2c70899186aecc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c |    4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -651,7 +651,9 @@ static int sh_mobile_sdhi_probe(struct p
- 		goto efree;
- 
- 	/* Enable tuning iff we have an SCC and a supported mode */
--	if (of_data && of_data->scc_offset && host->mmc->caps & MMC_CAP_UHS_SDR104) {
-+	if (of_data && of_data->scc_offset &&
-+	    (host->mmc->caps & MMC_CAP_UHS_SDR104 ||
-+	     host->mmc->caps2 & MMC_CAP2_HS200_1_8V_SDR)) {
- 		const struct sh_mobile_sdhi_scc *taps = of_data->taps;
- 		bool hit = false;
- 
diff --git a/patches.renesas/0151-mmc-tmio-Add-tuning-support.patch b/patches.renesas/0151-mmc-tmio-Add-tuning-support.patch
deleted file mode 100644
index c16f0d3d3eaba5..00000000000000
--- a/patches.renesas/0151-mmc-tmio-Add-tuning-support.patch
+++ /dev/null
@@ -1,155 +0,0 @@
-From cd908fa215b905e0ca976d433b58094c6d451b79 Mon Sep 17 00:00:00 2001
-From: Ai Kyuse <ai.kyuse.uw@renesas.com>
-Date: Thu, 3 Nov 2016 15:16:03 +0100
-Subject: [PATCH 151/299] mmc: tmio: Add tuning support
-
-Add tuning support for use with SDR104 mode
-
-Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 4f11997773b6b452b5a0d620c5ac5050e75c227e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc.h     |   14 +++++++++
- drivers/mmc/host/tmio_mmc_pio.c |   62 ++++++++++++++++++++++++++++++++++++++++
- 2 files changed, 76 insertions(+)
-
---- a/drivers/mmc/host/tmio_mmc.h
-+++ b/drivers/mmc/host/tmio_mmc.h
-@@ -153,6 +153,7 @@ struct tmio_mmc_host {
- 	struct mutex		ios_lock;	/* protect set_ios() context */
- 	bool			native_hotplug;
- 	bool			sdio_irq_enabled;
-+	u32			scc_tappos;
- 
- 	/* Mandatory callback */
- 	int (*clk_enable)(struct tmio_mmc_host *host);
-@@ -168,6 +169,19 @@ struct tmio_mmc_host {
- 					   struct mmc_ios *ios);
- 	int (*write16_hook)(struct tmio_mmc_host *host, int addr);
- 	void (*hw_reset)(struct tmio_mmc_host *host);
-+	void (*prepare_tuning)(struct tmio_mmc_host *host, unsigned long tap);
-+	bool (*check_scc_error)(struct tmio_mmc_host *host);
-+
-+	/*
-+	 * Mandatory callback for tuning to occur which is optional for SDR50
-+	 * and mandatory for SDR104.
-+	 */
-+	unsigned int (*init_tuning)(struct tmio_mmc_host *host);
-+	int (*select_tuning)(struct tmio_mmc_host *host);
-+
-+	/* Tuning values: 1 for success, 0 for failure */
-+	DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long));
-+	unsigned int tap_num;
- };
- 
- struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev);
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -36,6 +36,7 @@
- #include <linux/io.h>
- #include <linux/irq.h>
- #include <linux/mfd/tmio.h>
-+#include <linux/mmc/card.h>
- #include <linux/mmc/host.h>
- #include <linux/mmc/mmc.h>
- #include <linux/mmc/slot-gpio.h>
-@@ -298,6 +299,9 @@ static void tmio_mmc_finish_request(stru
- 	if (mrq->cmd->error || (mrq->data && mrq->data->error))
- 		tmio_mmc_abort_dma(host);
- 
-+	if (host->check_scc_error)
-+		host->check_scc_error(host);
-+
- 	mmc_request_done(host->mmc, mrq);
- }
- 
-@@ -797,6 +801,55 @@ static void tmio_mmc_hw_reset(struct mmc
- 		host->hw_reset(host);
- }
- 
-+static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
-+{
-+	struct tmio_mmc_host *host = mmc_priv(mmc);
-+	int i, ret = 0;
-+
-+	if (!host->tap_num) {
-+		if (!host->init_tuning || !host->select_tuning)
-+			/* Tuning is not supported */
-+			goto out;
-+
-+		host->tap_num = host->init_tuning(host);
-+		if (!host->tap_num)
-+			/* Tuning is not supported */
-+			goto out;
-+	}
-+
-+	if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
-+		dev_warn_once(&host->pdev->dev,
-+		      "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
-+		goto out;
-+	}
-+
-+	bitmap_zero(host->taps, host->tap_num * 2);
-+
-+	/* Issue CMD19 twice for each tap */
-+	for (i = 0; i < 2 * host->tap_num; i++) {
-+		if (host->prepare_tuning)
-+			host->prepare_tuning(host, i % host->tap_num);
-+
-+		ret = mmc_send_tuning(mmc, opcode, NULL);
-+		if (ret && ret != -EILSEQ)
-+			goto out;
-+		if (ret == 0)
-+			set_bit(i, host->taps);
-+
-+		mdelay(1);
-+	}
-+
-+	ret = host->select_tuning(host);
-+
-+out:
-+	if (ret < 0) {
-+		dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
-+		tmio_mmc_hw_reset(mmc);
-+	}
-+
-+	return ret;
-+}
-+
- /* Process requests from the MMC layer */
- static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
- {
-@@ -1014,6 +1067,7 @@ static struct mmc_host_ops tmio_mmc_ops
- 	.enable_sdio_irq = tmio_mmc_enable_sdio_irq,
- 	.multi_io_quirk	= tmio_multi_io_quirk,
- 	.hw_reset	= tmio_mmc_hw_reset,
-+	.execute_tuning = tmio_mmc_execute_tuning,
- };
- 
- static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
-@@ -1260,6 +1314,11 @@ int tmio_mmc_host_runtime_suspend(struct
- }
- EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
- 
-+static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
-+{
-+	return host->tap_num && mmc_can_retune(host->mmc);
-+}
-+
- int tmio_mmc_host_runtime_resume(struct device *dev)
- {
- 	struct mmc_host *mmc = dev_get_drvdata(dev);
-@@ -1273,6 +1332,9 @@ int tmio_mmc_host_runtime_resume(struct
- 
- 	tmio_mmc_enable_dma(host, true);
- 
-+	if (tmio_mmc_can_retune(host) && host->select_tuning(host))
-+		dev_warn(&host->pdev->dev, "Tuning selection failed\n");
-+
- 	return 0;
- }
- EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
diff --git a/patches.renesas/0152-clk-renesas-r8a7795-Correct-parent-clock-and-sort-or.patch b/patches.renesas/0152-clk-renesas-r8a7795-Correct-parent-clock-and-sort-or.patch
deleted file mode 100644
index 429b7a3d3a2576..00000000000000
--- a/patches.renesas/0152-clk-renesas-r8a7795-Correct-parent-clock-and-sort-or.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 4fa7e89f7563e5a33ec36b57f26b36ecbbe2209d Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 28 Feb 2017 17:31:59 +0100
-Subject: [PATCH 152/286] clk: renesas: r8a7795: Correct parent clock and sort
- order for Audio DMACs
-
-The parent clock of the Audio DMACs is the "ZS" AXI bus clock, which
-maps to S3D1 on R-Car H3 ES1.x.
-All module clocks must be sorted by clock ID.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-(cherry picked from commit a843ed3f6c3e856f9091b042c6b4ed34c02a3187)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7795-cpg-mssr.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
-@@ -142,8 +142,8 @@ static const struct mssr_mod_clk r8a7795
- 	DEF_MOD("rwdt0",		 402,	R8A7795_CLK_R),
- 	DEF_MOD("intc-ex",		 407,	R8A7795_CLK_CP),
- 	DEF_MOD("intc-ap",		 408,	R8A7795_CLK_S3D1),
--	DEF_MOD("audmac0",		 502,	R8A7795_CLK_S3D4),
--	DEF_MOD("audmac1",		 501,	R8A7795_CLK_S3D4),
-+	DEF_MOD("audmac1",		 501,	R8A7795_CLK_S3D1),
-+	DEF_MOD("audmac0",		 502,	R8A7795_CLK_S3D1),
- 	DEF_MOD("drif7",		 508,	R8A7795_CLK_S3D2),
- 	DEF_MOD("drif6",		 509,	R8A7795_CLK_S3D2),
- 	DEF_MOD("drif5",		 510,	R8A7795_CLK_S3D2),
diff --git a/patches.renesas/0152-mmc-host-tmio-drop-superfluous-exit-path.patch b/patches.renesas/0152-mmc-host-tmio-drop-superfluous-exit-path.patch
deleted file mode 100644
index 4a151637f5a07d..00000000000000
--- a/patches.renesas/0152-mmc-host-tmio-drop-superfluous-exit-path.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 51060f2d509fd12f3e817b017f0505f2cf2af689 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Fri, 6 Jan 2017 09:38:33 +0100
-Subject: [PATCH 152/255] mmc: host: tmio: drop superfluous exit path
-
-The probe exit path on error does nothing since commit 94b110aff8679b
-("mmc: tmio: add tmio_mmc_host_alloc/free()"), so we can bail out
-immediately.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit ad7014b3949b6c2b6ce46a546d6d204b5643e621)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c |   20 ++++++--------------
- 1 file changed, 6 insertions(+), 14 deletions(-)
-
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -1143,7 +1143,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_
- 
- 	ret = mmc_of_parse(mmc);
- 	if (ret < 0)
--		goto host_free;
-+		return ret;
- 
- 	_host->pdata = pdata;
- 	platform_set_drvdata(pdev, mmc);
-@@ -1153,14 +1153,12 @@ int tmio_mmc_host_probe(struct tmio_mmc_
- 
- 	ret = tmio_mmc_init_ocr(_host);
- 	if (ret < 0)
--		goto host_free;
-+		return ret;
- 
- 	_host->ctl = devm_ioremap(&pdev->dev,
- 				  res_ctl->start, resource_size(res_ctl));
--	if (!_host->ctl) {
--		ret = -ENOMEM;
--		goto host_free;
--	}
-+	if (!_host->ctl)
-+		return -ENOMEM;
- 
- 	tmio_mmc_ops.card_busy = _host->card_busy;
- 	tmio_mmc_ops.start_signal_voltage_switch = _host->start_signal_voltage_switch;
-@@ -1198,10 +1196,8 @@ int tmio_mmc_host_probe(struct tmio_mmc_
- 	 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from
- 	 * looping forever...
- 	 */
--	if (mmc->f_min == 0) {
--		ret = -EINVAL;
--		goto host_free;
--	}
-+	if (mmc->f_min == 0)
-+		return -EINVAL;
- 
- 	/*
- 	 * While using internal tmio hardware logic for card detection, we need
-@@ -1266,10 +1262,6 @@ int tmio_mmc_host_probe(struct tmio_mmc_
- 	}
- 
- 	return 0;
--
--host_free:
--
--	return ret;
- }
- EXPORT_SYMBOL(tmio_mmc_host_probe);
- 
diff --git a/patches.renesas/0152-mmc-sh_mobile_sdhi-Add-tuning-support.patch b/patches.renesas/0152-mmc-sh_mobile_sdhi-Add-tuning-support.patch
deleted file mode 100644
index cab7ba727c3ec6..00000000000000
--- a/patches.renesas/0152-mmc-sh_mobile_sdhi-Add-tuning-support.patch
+++ /dev/null
@@ -1,357 +0,0 @@
-From 843c1f55ac23205c5c729044f959a5d856895371 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 3 Nov 2016 15:16:04 +0100
-Subject: [PATCH 152/299] mmc: sh_mobile_sdhi: Add tuning support
-
-Add tuning support for use with SDR104 mode
-This includes adding support for the sampling clock controller (SCC).
-
-Based on work by Ai Kyuse.
-
-Cc: Ai Kyuse <ai.kyuse.uw@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 06f438dd389a699d27585f2a4d3685fd1ce05a75)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c |  265 +++++++++++++++++++++++++++++++++++++-
- 1 file changed, 264 insertions(+), 1 deletion(-)
-
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -47,6 +47,11 @@
- 
- #define host_to_priv(host) container_of((host)->pdata, struct sh_mobile_sdhi, mmc_data)
- 
-+struct sh_mobile_sdhi_scc {
-+	unsigned long clk_rate;	/* clock rate for SDR104 */
-+	u32 tap;		/* sampling clock position for SDR104 */
-+};
-+
- struct sh_mobile_sdhi_of_data {
- 	unsigned long tmio_flags;
- 	u32	      tmio_ocr_mask;
-@@ -55,6 +60,9 @@ struct sh_mobile_sdhi_of_data {
- 	enum dma_slave_buswidth dma_buswidth;
- 	dma_addr_t dma_rx_offset;
- 	unsigned bus_shift;
-+	int scc_offset;
-+	struct sh_mobile_sdhi_scc *taps;
-+	int taps_num;
- };
- 
- static const struct sh_mobile_sdhi_of_data of_default_cfg = {
-@@ -73,12 +81,35 @@ static const struct sh_mobile_sdhi_of_da
- 	.capabilities	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
- };
- 
-+/* Definitions for sampling clocks */
-+static struct sh_mobile_sdhi_scc rcar_gen2_scc_taps[] = {
-+	{
-+		.clk_rate = 156000000,
-+		.tap = 0x00000703,
-+	},
-+	{
-+		.clk_rate = 0,
-+		.tap = 0x00000300,
-+	},
-+};
-+
- static const struct sh_mobile_sdhi_of_data of_rcar_gen2_compatible = {
- 	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
- 			  TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
- 	.capabilities	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
- 	.dma_buswidth	= DMA_SLAVE_BUSWIDTH_4_BYTES,
- 	.dma_rx_offset	= 0x2000,
-+	.scc_offset	= 0x0300,
-+	.taps		= rcar_gen2_scc_taps,
-+	.taps_num	= ARRAY_SIZE(rcar_gen2_scc_taps),
-+};
-+
-+/* Definitions for sampling clocks */
-+static struct sh_mobile_sdhi_scc rcar_gen3_scc_taps[] = {
-+	{
-+		.clk_rate = 0,
-+		.tap = 0x00000300,
-+	},
- };
- 
- static const struct sh_mobile_sdhi_of_data of_rcar_gen3_compatible = {
-@@ -86,6 +117,9 @@ static const struct sh_mobile_sdhi_of_da
- 			  TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
- 	.capabilities	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
- 	.bus_shift	= 2,
-+	.scc_offset	= 0x1000,
-+	.taps		= rcar_gen3_scc_taps,
-+	.taps_num	= ARRAY_SIZE(rcar_gen3_scc_taps),
- };
- 
- static const struct of_device_id sh_mobile_sdhi_of_match[] = {
-@@ -113,6 +147,7 @@ struct sh_mobile_sdhi {
- 	struct tmio_mmc_dma dma_priv;
- 	struct pinctrl *pinctrl;
- 	struct pinctrl_state *pins_default, *pins_uhs;
-+	void __iomem *scc_ctl;
- };
- 
- static void sh_mobile_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
-@@ -263,6 +298,201 @@ static int sh_mobile_sdhi_start_signal_v
- 	return pinctrl_select_state(priv->pinctrl, pin_state);
- }
- 
-+/* SCC registers */
-+#define SH_MOBILE_SDHI_SCC_DTCNTL	0x000
-+#define SH_MOBILE_SDHI_SCC_TAPSET	0x002
-+#define SH_MOBILE_SDHI_SCC_DT2FF	0x004
-+#define SH_MOBILE_SDHI_SCC_CKSEL	0x006
-+#define SH_MOBILE_SDHI_SCC_RVSCNTL	0x008
-+#define SH_MOBILE_SDHI_SCC_RVSREQ	0x00A
-+
-+/* Definitions for values the SH_MOBILE_SDHI_SCC_DTCNTL register */
-+#define SH_MOBILE_SDHI_SCC_DTCNTL_TAPEN		BIT(0)
-+#define SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_SHIFT	16
-+#define SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_MASK	0xff
-+
-+/* Definitions for values the SH_MOBILE_SDHI_SCC_CKSEL register */
-+#define SH_MOBILE_SDHI_SCC_CKSEL_DTSEL		BIT(0)
-+/* Definitions for values the SH_MOBILE_SDHI_SCC_RVSCNTL register */
-+#define SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN	BIT(0)
-+/* Definitions for values the SH_MOBILE_SDHI_SCC_RVSREQ register */
-+#define SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR	BIT(2)
-+
-+static inline u32 sd_scc_read32(struct tmio_mmc_host *host,
-+				struct sh_mobile_sdhi *priv, int addr)
-+{
-+	return readl(priv->scc_ctl + (addr << host->bus_shift));
-+}
-+
-+static inline void sd_scc_write32(struct tmio_mmc_host *host,
-+				  struct sh_mobile_sdhi *priv,
-+				  int addr, u32 val)
-+{
-+	writel(val, priv->scc_ctl + (addr << host->bus_shift));
-+}
-+
-+static unsigned int sh_mobile_sdhi_init_tuning(struct tmio_mmc_host *host)
-+{
-+	struct sh_mobile_sdhi *priv;
-+
-+	if (!(host->mmc->caps & MMC_CAP_UHS_SDR104))
-+		return 0;
-+
-+	priv = host_to_priv(host);
-+
-+	/* set sampling clock selection range */
-+	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DTCNTL,
-+		       0x8 << SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_SHIFT);
-+
-+	/* Initialize SCC */
-+	sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, 0x0);
-+
-+	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DTCNTL,
-+		       SH_MOBILE_SDHI_SCC_DTCNTL_TAPEN |
-+		       sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_DTCNTL));
-+
-+	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
-+			sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
-+
-+	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_CKSEL,
-+		       SH_MOBILE_SDHI_SCC_CKSEL_DTSEL |
-+		       sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_CKSEL));
-+
-+	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
-+			sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
-+
-+	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
-+		       ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
-+		       sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
-+
-+	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF, host->scc_tappos);
-+
-+	/* Read TAPNUM */
-+	return (sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_DTCNTL) >>
-+		SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) &
-+		SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_MASK;
-+}
-+
-+static void sh_mobile_sdhi_prepare_tuning(struct tmio_mmc_host *host,
-+					 unsigned long tap)
-+{
-+	struct sh_mobile_sdhi *priv = host_to_priv(host);
-+
-+	/* Set sampling clock position */
-+	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TAPSET, tap);
-+}
-+
-+#define SH_MOBILE_SDHI_MAX_TAP 3
-+
-+static int sh_mobile_sdhi_select_tuning(struct tmio_mmc_host *host)
-+{
-+	struct sh_mobile_sdhi *priv = host_to_priv(host);
-+	unsigned long tap_cnt;  /* counter of tuning success */
-+	unsigned long tap_set;  /* tap position */
-+	unsigned long tap_start;/* start position of tuning success */
-+	unsigned long tap_end;  /* end position of tuning success */
-+	unsigned long ntap;     /* temporary counter of tuning success */
-+	unsigned long i;
-+
-+	/* Clear SCC_RVSREQ */
-+	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ, 0);
-+
-+	/*
-+	 * Find the longest consecutive run of successful probes.  If that
-+	 * is more than SH_MOBILE_SDHI_MAX_TAP probes long then use the
-+	 * center index as the tap.
-+	 */
-+	tap_cnt = 0;
-+	ntap = 0;
-+	tap_start = 0;
-+	tap_end = 0;
-+	for (i = 0; i < host->tap_num * 2; i++) {
-+		if (test_bit(i, host->taps))
-+			ntap++;
-+		else {
-+			if (ntap > tap_cnt) {
-+				tap_start = i - ntap;
-+				tap_end = i - 1;
-+				tap_cnt = ntap;
-+			}
-+			ntap = 0;
-+		}
-+	}
-+
-+	if (ntap > tap_cnt) {
-+		tap_start = i - ntap;
-+		tap_end = i - 1;
-+		tap_cnt = ntap;
-+	}
-+
-+	if (tap_cnt >= SH_MOBILE_SDHI_MAX_TAP)
-+		tap_set = (tap_start + tap_end) / 2 % host->tap_num;
-+	else
-+		return -EIO;
-+
-+	/* Set SCC */
-+	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TAPSET, tap_set);
-+
-+	/* Enable auto re-tuning */
-+	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
-+		       SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN |
-+		       sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
-+
-+	return 0;
-+}
-+
-+
-+static bool sh_mobile_sdhi_check_scc_error(struct tmio_mmc_host *host)
-+{
-+	struct sh_mobile_sdhi *priv;
-+
-+	if (!(host->mmc->caps & MMC_CAP_UHS_SDR104))
-+		return 0;
-+
-+	priv = host_to_priv(host);
-+
-+	/* Check SCC error */
-+	if (sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL) &
-+	    SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &&
-+	    sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ) &
-+	    SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR) {
-+		/* Clear SCC error */
-+		sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ, 0);
-+		return true;
-+	}
-+
-+	return false;
-+}
-+
-+static void sh_mobile_sdhi_hw_reset(struct tmio_mmc_host *host)
-+{
-+	struct sh_mobile_sdhi *priv;
-+
-+	if (!(host->mmc->caps & MMC_CAP_UHS_SDR104))
-+		return;
-+
-+	priv = host_to_priv(host);
-+
-+	/* Reset SCC */
-+	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
-+			sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
-+
-+	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_CKSEL,
-+		       ~SH_MOBILE_SDHI_SCC_CKSEL_DTSEL &
-+		       sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_CKSEL));
-+
-+	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
-+			sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
-+
-+	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
-+		       ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
-+		       sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
-+
-+	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
-+		       ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
-+		       sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
-+}
-+
- static int sh_mobile_sdhi_wait_idle(struct tmio_mmc_host *host)
- {
- 	int timeout = 1000;
-@@ -333,7 +563,7 @@ static int sh_mobile_sdhi_probe(struct p
- 	struct tmio_mmc_data *mmd = pdev->dev.platform_data;
- 	struct tmio_mmc_host *host;
- 	struct resource *res;
--	int irq, ret, i = 0;
-+	int irq, ret, i;
- 	struct tmio_mmc_dma *dma_priv;
- 
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-@@ -393,6 +623,11 @@ static int sh_mobile_sdhi_probe(struct p
- 		host->card_busy	= sh_mobile_sdhi_card_busy;
- 		host->start_signal_voltage_switch =
- 			sh_mobile_sdhi_start_signal_voltage_switch;
-+		host->init_tuning	= sh_mobile_sdhi_init_tuning;
-+		host->prepare_tuning	= sh_mobile_sdhi_prepare_tuning;
-+		host->select_tuning	= sh_mobile_sdhi_select_tuning;
-+		host->check_scc_error	= sh_mobile_sdhi_check_scc_error;
-+		host->hw_reset		= sh_mobile_sdhi_hw_reset;
- 	}
- 
- 	/* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */
-@@ -433,6 +668,34 @@ static int sh_mobile_sdhi_probe(struct p
- 	if (ret < 0)
- 		goto efree;
- 
-+	if (host->mmc->caps & MMC_CAP_UHS_SDR104) {
-+		host->mmc->caps |= MMC_CAP_HW_RESET;
-+
-+		if (of_id && of_id->data) {
-+			const struct sh_mobile_sdhi_of_data *of_data;
-+			const struct sh_mobile_sdhi_scc *taps;
-+			bool hit = false;
-+
-+			of_data = of_id->data;
-+			taps = of_data->taps;
-+
-+			for (i = 0; i < of_data->taps_num; i++) {
-+				if (taps[i].clk_rate == 0 ||
-+				    taps[i].clk_rate == host->mmc->f_max) {
-+					host->scc_tappos = taps->tap;
-+					hit = true;
-+					break;
-+				}
-+			}
-+
-+			if (!hit)
-+				dev_warn(&host->pdev->dev, "Unknown clock rate for SDR104\n");
-+
-+			priv->scc_ctl = host->ctl + of_data->scc_offset;
-+		}
-+	}
-+
-+	i = 0;
- 	while (1) {
- 		irq = platform_get_irq(pdev, i);
- 		if (irq < 0)
diff --git a/patches.renesas/0153-clk-renesas-r8a7795-Correct-name-of-watchdog-clock.patch b/patches.renesas/0153-clk-renesas-r8a7795-Correct-name-of-watchdog-clock.patch
deleted file mode 100644
index 2a9cffdd30f45f..00000000000000
--- a/patches.renesas/0153-clk-renesas-r8a7795-Correct-name-of-watchdog-clock.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From e52a52c5f5d2af21ae20bd5660dbba54bc94ff01 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 28 Feb 2017 17:17:31 +0100
-Subject: [PATCH 153/286] clk: renesas: r8a7795: Correct name of watchdog clock
-
-There's only a single watchdog clock, and it's named "rwdt".
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 2122b56d30e4fb25b383f137e83e6b901e5b05ae)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7795-cpg-mssr.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
-@@ -139,7 +139,7 @@ static const struct mssr_mod_clk r8a7795
- 	DEF_MOD("usb3-if0",		 328,	R8A7795_CLK_S3D1),
- 	DEF_MOD("usb-dmac0",		 330,	R8A7795_CLK_S3D1),
- 	DEF_MOD("usb-dmac1",		 331,	R8A7795_CLK_S3D1),
--	DEF_MOD("rwdt0",		 402,	R8A7795_CLK_R),
-+	DEF_MOD("rwdt",			 402,	R8A7795_CLK_R),
- 	DEF_MOD("intc-ex",		 407,	R8A7795_CLK_CP),
- 	DEF_MOD("intc-ap",		 408,	R8A7795_CLK_S3D1),
- 	DEF_MOD("audmac1",		 501,	R8A7795_CLK_S3D1),
diff --git a/patches.renesas/0153-mmc-tmio-Remove-redundant-check-of-mmc-slot.cd_irq.patch b/patches.renesas/0153-mmc-tmio-Remove-redundant-check-of-mmc-slot.cd_irq.patch
deleted file mode 100644
index 173777f6f65d8c..00000000000000
--- a/patches.renesas/0153-mmc-tmio-Remove-redundant-check-of-mmc-slot.cd_irq.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 050cf2aa2edbbc361eba5e8a403b333794091eab Mon Sep 17 00:00:00 2001
-From: Ulf Hansson <ulf.hansson@linaro.org>
-Date: Tue, 10 Jan 2017 16:10:52 +0100
-Subject: [PATCH 153/255] mmc: tmio: Remove redundant check of mmc->slot.cd_irq
-
-To validate whether native hotplug needs to be used, the tmio driver checks
-whether the mmc->slot.cd_irq has been successfully assigned.
-
-This check is redundant at its current place in tmio_mmc_host_probe(), as
-the mmc core assigns mmc->slot.cd_irq a valid value first when
-mmc_gpiod_request_cd_irq() is called. Therefore, let's just remove the
-check for now, as that also removes a layering violation of the tmio driver
-accessing core specific data via ->slot.cd_irq.
-
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-(cherry picked from commit efd7be7bfc8eb8942ba3dc319f323cfd0eda99e2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c |    3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -1175,8 +1175,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_
- 
- 	_host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
- 				  mmc->caps & MMC_CAP_NEEDS_POLL ||
--				  !mmc_card_is_removable(mmc) ||
--				  mmc->slot.cd_irq >= 0);
-+				  !mmc_card_is_removable(mmc));
- 
- 	/*
- 	 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
diff --git a/patches.renesas/0153-mmc-tmio-fix-wrong-bitmask-for-SDIO-irqs.patch b/patches.renesas/0153-mmc-tmio-fix-wrong-bitmask-for-SDIO-irqs.patch
deleted file mode 100644
index 2f5dff8c60c7bf..00000000000000
--- a/patches.renesas/0153-mmc-tmio-fix-wrong-bitmask-for-SDIO-irqs.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From e94d36ecfe8065f64853889d1815b24c4c1b8f9d Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Sun, 13 Nov 2016 15:29:11 +0100
-Subject: [PATCH 153/299] mmc: tmio: fix wrong bitmask for SDIO irqs
-
-Commit 7729c7a232a953 ("mmc: tmio: Provide separate interrupt handlers")
-refactored the sdio irq handler and wrongly used the mask for SD irqs,
-not for SDIO irqs. This doesn't really matter in practice because both
-values keep the only interrupt we are interested in. But still, this is
-wrong and wants to be fixed.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 0c4bf5beff79fd32c5a3b2b511ed6527861ada18)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -724,7 +724,7 @@ static void tmio_mmc_sdio_irq(int irq, v
- 		return;
- 
- 	status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
--	ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask;
-+	ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
- 
- 	sdio_status = status & ~TMIO_SDIO_MASK_ALL;
- 	if (pdata->flags & TMIO_MMC_SDIO_STATUS_QUIRK)
diff --git a/patches.renesas/0154-clk-renesas-r8a7796-Correct-name-of-watchdog-clock.patch b/patches.renesas/0154-clk-renesas-r8a7796-Correct-name-of-watchdog-clock.patch
deleted file mode 100644
index d479d0290931fd..00000000000000
--- a/patches.renesas/0154-clk-renesas-r8a7796-Correct-name-of-watchdog-clock.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 2ac5acd948c5dcbf1ef21d6df12c9812160d6cd3 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 28 Feb 2017 17:18:08 +0100
-Subject: [PATCH 154/286] clk: renesas: r8a7796: Correct name of watchdog clock
-
-There's only a single watchdog clock, and it's named "rwdt".
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 89aa58a3951bcf242c7755075a7429d0ed6640de)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -135,7 +135,7 @@ static const struct mssr_mod_clk r8a7796
- 	DEF_MOD("sdif2",		 312,	R8A7796_CLK_SD2),
- 	DEF_MOD("sdif1",		 313,	R8A7796_CLK_SD1),
- 	DEF_MOD("sdif0",		 314,	R8A7796_CLK_SD0),
--	DEF_MOD("rwdt0",		 402,	R8A7796_CLK_R),
-+	DEF_MOD("rwdt",			 402,	R8A7796_CLK_R),
- 	DEF_MOD("intc-ap",		 408,	R8A7796_CLK_S3D1),
- 	DEF_MOD("drif7",		 508,	R8A7796_CLK_S3D2),
- 	DEF_MOD("drif6",		 509,	R8A7796_CLK_S3D2),
diff --git a/patches.renesas/0154-mmc-host-tmio-disable-clocks-when-unbinding.patch b/patches.renesas/0154-mmc-host-tmio-disable-clocks-when-unbinding.patch
deleted file mode 100644
index 37497ceff0c7e7..00000000000000
--- a/patches.renesas/0154-mmc-host-tmio-disable-clocks-when-unbinding.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 8f7ba7d5d1b58d1015257dfd8e926c46198dd0aa Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Tue, 17 Jan 2017 21:26:01 +0100
-Subject: [PATCH 154/255] mmc: host: tmio: disable clocks when unbinding
-
-Create a helper function to disable clocks and use it in remove(), too.
-Now, clk_summary in debugfs reports the clocks as disabled and
-unprepared after unbinding.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit dfcba5ffca989749d1fc49d5b82a2d007b1295b7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c |   11 +++++++++--
- 1 file changed, 9 insertions(+), 2 deletions(-)
-
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -900,6 +900,12 @@ static int tmio_mmc_clk_enable(struct tm
- 	return host->clk_enable(host);
- }
- 
-+static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
-+{
-+	if (host->clk_disable)
-+		host->clk_disable(host);
-+}
-+
- static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
- {
- 	struct mmc_host *mmc = host->mmc;
-@@ -1284,6 +1290,8 @@ void tmio_mmc_host_remove(struct tmio_mm
- 
- 	pm_runtime_put_sync(&pdev->dev);
- 	pm_runtime_disable(&pdev->dev);
-+
-+	tmio_mmc_clk_disable(host);
- }
- EXPORT_SYMBOL(tmio_mmc_host_remove);
- 
-@@ -1298,8 +1306,7 @@ int tmio_mmc_host_runtime_suspend(struct
- 	if (host->clk_cache)
- 		tmio_mmc_clk_stop(host);
- 
--	if (host->clk_disable)
--		host->clk_disable(host);
-+	tmio_mmc_clk_disable(host);
- 
- 	return 0;
- }
diff --git a/patches.renesas/0154-mmc-tmio-remove-SDIO-from-TODO-list.patch b/patches.renesas/0154-mmc-tmio-remove-SDIO-from-TODO-list.patch
deleted file mode 100644
index 81e9e43b21d676..00000000000000
--- a/patches.renesas/0154-mmc-tmio-remove-SDIO-from-TODO-list.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From faacc361b7f22d39a8ae29977aff66249d2934f2 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Sun, 13 Nov 2016 15:29:12 +0100
-Subject: [PATCH 154/299] mmc: tmio: remove SDIO from TODO list
-
-We surely have SDIO support by now :)
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit e726e8c959fc735473f248e142de4d4f77ed342b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -22,7 +22,6 @@
-  * TODO:
-  *   Investigate using a workqueue for PIO transfers
-  *   Eliminate FIXMEs
-- *   SDIO support
-  *   Better Power management
-  *   Handle MMC errors better
-  *   double buffer support
diff --git a/patches.renesas/0155-clk-renesas-r8a7795-Reformat-core-clock-table.patch b/patches.renesas/0155-clk-renesas-r8a7795-Reformat-core-clock-table.patch
deleted file mode 100644
index e3c12e58929f31..00000000000000
--- a/patches.renesas/0155-clk-renesas-r8a7795-Reformat-core-clock-table.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From e42c0d2b6b6ef37620eeec204862585ea50f070b Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Thu, 10 Nov 2016 13:16:57 +0100
-Subject: [PATCH 155/286] clk: renesas: r8a7795: Reformat core clock table
-
-For easier comparison with other clock drivers.
-No functional changes.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 3c969cec16176e98f9d8c976c163d2bb519c7c87)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7795-cpg-mssr.c |   20 ++++++++++----------
- 1 file changed, 10 insertions(+), 10 deletions(-)
-
---- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
-@@ -53,8 +53,8 @@ enum clk_ids {
- 
- static const struct cpg_core_clk r8a7795_core_clks[] __initconst = {
- 	/* External Clock Inputs */
--	DEF_INPUT("extal",  CLK_EXTAL),
--	DEF_INPUT("extalr", CLK_EXTALR),
-+	DEF_INPUT("extal",      CLK_EXTAL),
-+	DEF_INPUT("extalr",     CLK_EXTALR),
- 
- 	/* Internal Core Clocks */
- 	DEF_BASE(".main",       CLK_MAIN, CLK_TYPE_GEN3_MAIN, CLK_EXTAL),
-@@ -89,23 +89,23 @@ static const struct cpg_core_clk r8a7795
- 	DEF_FIXED("s3d2",       R8A7795_CLK_S3D2,  CLK_S3,         2, 1),
- 	DEF_FIXED("s3d4",       R8A7795_CLK_S3D4,  CLK_S3,         4, 1),
- 
--	DEF_GEN3_SD("sd0",      R8A7795_CLK_SD0,   CLK_SDSRC,     0x0074),
--	DEF_GEN3_SD("sd1",      R8A7795_CLK_SD1,   CLK_SDSRC,     0x0078),
--	DEF_GEN3_SD("sd2",      R8A7795_CLK_SD2,   CLK_SDSRC,     0x0268),
--	DEF_GEN3_SD("sd3",      R8A7795_CLK_SD3,   CLK_SDSRC,     0x026c),
-+	DEF_GEN3_SD("sd0",      R8A7795_CLK_SD0,   CLK_SDSRC,     0x074),
-+	DEF_GEN3_SD("sd1",      R8A7795_CLK_SD1,   CLK_SDSRC,     0x078),
-+	DEF_GEN3_SD("sd2",      R8A7795_CLK_SD2,   CLK_SDSRC,     0x268),
-+	DEF_GEN3_SD("sd3",      R8A7795_CLK_SD3,   CLK_SDSRC,     0x26c),
- 
- 	DEF_FIXED("cl",         R8A7795_CLK_CL,    CLK_PLL1_DIV2, 48, 1),
- 	DEF_FIXED("cp",         R8A7795_CLK_CP,    CLK_EXTAL,      2, 1),
- 
--	DEF_DIV6P1("mso",       R8A7795_CLK_MSO,   CLK_PLL1_DIV4, 0x014),
--	DEF_DIV6P1("hdmi",      R8A7795_CLK_HDMI,  CLK_PLL1_DIV4, 0x250),
- 	DEF_DIV6P1("canfd",     R8A7795_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
- 	DEF_DIV6P1("csi0",      R8A7795_CLK_CSI0,  CLK_PLL1_DIV4, 0x00c),
-+	DEF_DIV6P1("mso",       R8A7795_CLK_MSO,   CLK_PLL1_DIV4, 0x014),
-+	DEF_DIV6P1("hdmi",      R8A7795_CLK_HDMI,  CLK_PLL1_DIV4, 0x250),
- 
--	DEF_DIV6_RO("osc",      R8A7795_CLK_OSC,   CLK_EXTAL, CPG_RCKCR, 8),
-+	DEF_DIV6_RO("osc",      R8A7795_CLK_OSC,   CLK_EXTAL, CPG_RCKCR,  8),
- 	DEF_DIV6_RO("r_int",    CLK_RINT,          CLK_EXTAL, CPG_RCKCR, 32),
- 
--	DEF_BASE("r",           R8A7795_CLK_R, CLK_TYPE_GEN3_R, CLK_RINT),
-+	DEF_BASE("r",           R8A7795_CLK_R,     CLK_TYPE_GEN3_R, CLK_RINT),
- };
- 
- static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
diff --git a/patches.renesas/0155-mmc-host-tmio-refactor-calls-to-sdio-irq.patch b/patches.renesas/0155-mmc-host-tmio-refactor-calls-to-sdio-irq.patch
deleted file mode 100644
index 3a6c1e7b00b50b..00000000000000
--- a/patches.renesas/0155-mmc-host-tmio-refactor-calls-to-sdio-irq.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 89fe53edf904968766b24e9a3ed9f8a952588602 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Thu, 19 Jan 2017 21:07:16 +0100
-Subject: [PATCH 155/255] mmc: host: tmio: refactor calls to sdio irq
-
-tmio_mmc_sdio_irq() is not used as a seperate irq handler anymore, so we
-can make it similar to the other irq helper functions, namely:
-
-* only give the host as argument function which is what it really needs
-* prefix function name with __
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit e4f38eb18aedd098b3019e82df07f583a5cbcc58)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c |    5 ++---
- 1 file changed, 2 insertions(+), 3 deletions(-)
-
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -709,9 +709,8 @@ static bool __tmio_mmc_sdcard_irq(struct
- 	return false;
- }
- 
--static void tmio_mmc_sdio_irq(int irq, void *devid)
-+static void __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
- {
--	struct tmio_mmc_host *host = devid;
- 	struct mmc_host *mmc = host->mmc;
- 	struct tmio_mmc_data *pdata = host->pdata;
- 	unsigned int ireg, status;
-@@ -752,7 +751,7 @@ irqreturn_t tmio_mmc_irq(int irq, void *
- 	if (__tmio_mmc_sdcard_irq(host, ireg, status))
- 		return IRQ_HANDLED;
- 
--	tmio_mmc_sdio_irq(irq, devid);
-+	__tmio_mmc_sdio_irq(host);
- 
- 	return IRQ_HANDLED;
- }
diff --git a/patches.renesas/0155-mmc-sh_mobile_sdhi-remove-support-for-sh7372.patch b/patches.renesas/0155-mmc-sh_mobile_sdhi-remove-support-for-sh7372.patch
deleted file mode 100644
index c1e8573b26d4fd..00000000000000
--- a/patches.renesas/0155-mmc-sh_mobile_sdhi-remove-support-for-sh7372.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 426e5de37b94051c3424db2a74faf2d74f639cc6 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 24 Nov 2016 11:48:54 +0100
-Subject: [PATCH 155/299] mmc: sh_mobile_sdhi: remove support for sh7372
-
-Remove documentation of support for the SH7372 (SH-Mobile AP4) from the MMC
-driver. The driver itself appears to have no SH7372 specific code.
-
-Commit edf4100906044225 ("ARM: shmobile: sh7372 dtsi: Remove Legacy file")
-removes this SoC from the kernel in v4.1.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 15ae5fcab798e0beb757284c9106f42052ebb16f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/mmc/tmio_mmc.txt |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
-+++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
-@@ -11,7 +11,6 @@ optional bindings can be used.
- 
- Required properties:
- - compatible:	"renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit
--		"renesas,sdhi-sh7372" - SDHI IP on SH7372 SoC
- 		"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
- 		"renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
- 		"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
diff --git a/patches.renesas/0156-clk-renesas-r8a7796-Reformat-core-clock-table.patch b/patches.renesas/0156-clk-renesas-r8a7796-Reformat-core-clock-table.patch
deleted file mode 100644
index 89606808ed06ee..00000000000000
--- a/patches.renesas/0156-clk-renesas-r8a7796-Reformat-core-clock-table.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From b8b1b09ceff9eecfbc0a209c40d46467af8eaa16 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Thu, 10 Nov 2016 13:18:25 +0100
-Subject: [PATCH 156/286] clk: renesas: r8a7796: Reformat core clock table
-
-For easier comparison with other clock drivers.
-No functional changes.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit c013fc7d23ca5b29f0cdc37d58b2466ead4fd5f6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |   12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -54,8 +54,8 @@ enum clk_ids {
- 
- static const struct cpg_core_clk r8a7796_core_clks[] __initconst = {
- 	/* External Clock Inputs */
--	DEF_INPUT("extal",  CLK_EXTAL),
--	DEF_INPUT("extalr", CLK_EXTALR),
-+	DEF_INPUT("extal",      CLK_EXTAL),
-+	DEF_INPUT("extalr",     CLK_EXTALR),
- 
- 	/* Internal Core Clocks */
- 	DEF_BASE(".main",       CLK_MAIN, CLK_TYPE_GEN3_MAIN, CLK_EXTAL),
-@@ -95,10 +95,10 @@ static const struct cpg_core_clk r8a7796
- 	DEF_FIXED("s3d2",       R8A7796_CLK_S3D2,  CLK_S3,         2, 1),
- 	DEF_FIXED("s3d4",       R8A7796_CLK_S3D4,  CLK_S3,         4, 1),
- 
--	DEF_GEN3_SD("sd0",      R8A7796_CLK_SD0,   CLK_SDSRC,    0x0074),
--	DEF_GEN3_SD("sd1",      R8A7796_CLK_SD1,   CLK_SDSRC,    0x0078),
--	DEF_GEN3_SD("sd2",      R8A7796_CLK_SD2,   CLK_SDSRC,    0x0268),
--	DEF_GEN3_SD("sd3",      R8A7796_CLK_SD3,   CLK_SDSRC,    0x026c),
-+	DEF_GEN3_SD("sd0",      R8A7796_CLK_SD0,   CLK_SDSRC,     0x074),
-+	DEF_GEN3_SD("sd1",      R8A7796_CLK_SD1,   CLK_SDSRC,     0x078),
-+	DEF_GEN3_SD("sd2",      R8A7796_CLK_SD2,   CLK_SDSRC,     0x268),
-+	DEF_GEN3_SD("sd3",      R8A7796_CLK_SD3,   CLK_SDSRC,     0x26c),
- 
- 	DEF_FIXED("cl",         R8A7796_CLK_CL,    CLK_PLL1_DIV2, 48, 1),
- 	DEF_FIXED("cp",         R8A7796_CLK_CP,    CLK_EXTAL,      2, 1),
diff --git a/patches.renesas/0156-mmc-host-tmio-SDIO_STATUS_QUIRK-is-rather-SDIO_STATU.patch b/patches.renesas/0156-mmc-host-tmio-SDIO_STATUS_QUIRK-is-rather-SDIO_STATU.patch
deleted file mode 100644
index f212882e93c5e8..00000000000000
--- a/patches.renesas/0156-mmc-host-tmio-SDIO_STATUS_QUIRK-is-rather-SDIO_STATU.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 4606a421dbb16e10a8018dff56b77b1542de61d7 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Thu, 19 Jan 2017 21:07:17 +0100
-Subject: [PATCH 156/255] mmc: host: tmio: SDIO_STATUS_QUIRK is rather
- SDIO_STATUS_SETBITS
-
-QUIRK sounds like there is something wrong, but actually there are just
-some bits which need to be 1. Rename it to be more clear.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit 20dd03734cac41a0545dd24f5e81d8ff0c80874b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c |    6 ++----
- drivers/mmc/host/tmio_mmc_pio.c   |    2 +-
- include/linux/mfd/tmio.h          |    6 ++----
- 3 files changed, 5 insertions(+), 9 deletions(-)
-
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -641,10 +641,8 @@ static int sh_mobile_sdhi_probe(struct p
- 	 */
- 	mmc_data->flags |= TMIO_MMC_HAVE_CMD12_CTRL;
- 
--	/*
--	 * All SDHI need SDIO_INFO1 reserved bit
--	 */
--	mmc_data->flags |= TMIO_MMC_SDIO_STATUS_QUIRK;
-+	/* All SDHI have SDIO status bits which must be 1 */
-+	mmc_data->flags |= TMIO_MMC_SDIO_STATUS_SETBITS;
- 
- 	ret = tmio_mmc_host_probe(host, mmc_data);
- 	if (ret < 0)
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -723,7 +723,7 @@ static void __tmio_mmc_sdio_irq(struct t
- 	ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
- 
- 	sdio_status = status & ~TMIO_SDIO_MASK_ALL;
--	if (pdata->flags & TMIO_MMC_SDIO_STATUS_QUIRK)
-+	if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
- 		sdio_status |= 6;
- 
- 	sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
---- a/include/linux/mfd/tmio.h
-+++ b/include/linux/mfd/tmio.h
-@@ -94,10 +94,8 @@
-  */
- #define TMIO_MMC_HAVE_CMD12_CTRL	(1 << 7)
- 
--/*
-- * Some controllers needs to set 1 on SDIO status reserved bits
-- */
--#define TMIO_MMC_SDIO_STATUS_QUIRK	(1 << 8)
-+/* Controller has some SDIO status bits which must be 1 */
-+#define TMIO_MMC_SDIO_STATUS_SETBITS	(1 << 8)
- 
- /*
-  * Some controllers have a 32-bit wide data port register
diff --git a/patches.renesas/0156-net-smsc911x-Synchronize-the-runtime-PM-status-durin.patch b/patches.renesas/0156-net-smsc911x-Synchronize-the-runtime-PM-status-durin.patch
deleted file mode 100644
index 6b312ff1def877..00000000000000
--- a/patches.renesas/0156-net-smsc911x-Synchronize-the-runtime-PM-status-durin.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 484174272eed2d3902dfd218ab529d55189f3369 Mon Sep 17 00:00:00 2001
-From: Ulf Hansson <ulf.hansson@linaro.org>
-Date: Thu, 27 Oct 2016 13:23:54 +0200
-Subject: [PATCH 156/299] net: smsc911x: Synchronize the runtime PM status
- during system suspend
-
-The smsc911c driver puts its device into low power state when entering
-system suspend. Although it doesn't update the device's runtime PM status
-to RPM_SUSPENDED, which causes problems for a parent device.
-
-In particular, when the runtime PM status of the parent is requested to be
-updated to RPM_SUSPENDED, the runtime PM core prevent this, because it's
-forbidden to runtime suspend a device, which has an active child.
-
-Fix this by updating the runtime PM status of the smsc911x device to
-RPM_SUSPENDED during system suspend. In system resume, let's reverse that
-action by runtime resuming the device and thus also the parent.
-
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-(cherry picked from commit 8812872960824681147fad051e6e1406fdfa07f9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/smsc/smsc911x.c |    6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/drivers/net/ethernet/smsc/smsc911x.c
-+++ b/drivers/net/ethernet/smsc/smsc911x.c
-@@ -2591,6 +2591,9 @@ static int smsc911x_suspend(struct devic
- 		PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
- 		PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
- 
-+	pm_runtime_disable(dev);
-+	pm_runtime_set_suspended(dev);
-+
- 	return 0;
- }
- 
-@@ -2600,6 +2603,9 @@ static int smsc911x_resume(struct device
- 	struct smsc911x_data *pdata = netdev_priv(ndev);
- 	unsigned int to = 100;
- 
-+	pm_runtime_enable(dev);
-+	pm_runtime_resume(dev);
-+
- 	/* Note 3.11 from the datasheet:
- 	 * 	"When the LAN9220 is in a power saving state, a write of any
- 	 * 	 data to the BYTE_TEST register will wake-up the device."
diff --git a/patches.renesas/0157-clk-renesas-rcar-gen3-cpg-Pass-mode-pins-to-rcar_gen.patch b/patches.renesas/0157-clk-renesas-rcar-gen3-cpg-Pass-mode-pins-to-rcar_gen.patch
deleted file mode 100644
index b0a6189e6a519f..00000000000000
--- a/patches.renesas/0157-clk-renesas-rcar-gen3-cpg-Pass-mode-pins-to-rcar_gen.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From d80b1edc3d1787a07007fb2842be0462504dad22 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 11:36:33 +0100
-Subject: [PATCH 157/286] clk: renesas: rcar-gen3-cpg: Pass mode pins to
- rcar_gen3_cpg_init()
-
-Pass the mode pin states from the SoC-specific CPG/MSSR driver to the
-R-Car Gen3 CPG driver core, as their state will be needed to make some
-core clock configuration decisions.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 5f3a432a44b135db002d22446827cfa061fc0bfb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7795-cpg-mssr.c |    2 +-
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    2 +-
- drivers/clk/renesas/rcar-gen3-cpg.c    |    4 +++-
- drivers/clk/renesas/rcar-gen3-cpg.h    |    2 +-
- 4 files changed, 6 insertions(+), 4 deletions(-)
-
---- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
-@@ -330,7 +330,7 @@ static int __init r8a7795_cpg_mssr_init(
- 		return -EINVAL;
- 	}
- 
--	return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR);
-+	return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode);
- }
- 
- const struct cpg_mssr_info r8a7795_cpg_mssr_info __initconst = {
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -273,7 +273,7 @@ static int __init r8a7796_cpg_mssr_init(
- 		return -EINVAL;
- 	}
- 
--	return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR);
-+	return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode);
- }
- 
- const struct cpg_mssr_info r8a7796_cpg_mssr_info __initconst = {
---- a/drivers/clk/renesas/rcar-gen3-cpg.c
-+++ b/drivers/clk/renesas/rcar-gen3-cpg.c
-@@ -247,6 +247,7 @@ static struct clk * __init cpg_sd_clk_re
- 
- static const struct rcar_gen3_cpg_pll_config *cpg_pll_config __initdata;
- static unsigned int cpg_clk_extalr __initdata;
-+static u32 cpg_mode __initdata;
- 
- struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev,
- 	const struct cpg_core_clk *core, const struct cpg_mssr_info *info,
-@@ -334,9 +335,10 @@ struct clk * __init rcar_gen3_cpg_clk_re
- }
- 
- int __init rcar_gen3_cpg_init(const struct rcar_gen3_cpg_pll_config *config,
--			      unsigned int clk_extalr)
-+			      unsigned int clk_extalr, u32 mode)
- {
- 	cpg_pll_config = config;
- 	cpg_clk_extalr = clk_extalr;
-+	cpg_mode = mode;
- 	return 0;
- }
---- a/drivers/clk/renesas/rcar-gen3-cpg.h
-+++ b/drivers/clk/renesas/rcar-gen3-cpg.h
-@@ -37,6 +37,6 @@ struct clk *rcar_gen3_cpg_clk_register(s
- 	const struct cpg_core_clk *core, const struct cpg_mssr_info *info,
- 	struct clk **clks, void __iomem *base);
- int rcar_gen3_cpg_init(const struct rcar_gen3_cpg_pll_config *config,
--		       unsigned int clk_extalr);
-+		       unsigned int clk_extalr, u32 mode);
- 
- #endif
diff --git a/patches.renesas/0157-media-videodev2.h-Add-HSV-formats.patch b/patches.renesas/0157-media-videodev2.h-Add-HSV-formats.patch
deleted file mode 100644
index 063fd75e6b381c..00000000000000
--- a/patches.renesas/0157-media-videodev2.h-Add-HSV-formats.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From fdec9a137cfcdffccefec32dcb9b7e1ae7565f0e Mon Sep 17 00:00:00 2001
-From: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
-Date: Thu, 18 Aug 2016 11:33:27 -0300
-Subject: [PATCH 157/299] [media] videodev2.h Add HSV formats
-
-These formats store the color information of the image
-in a geometrical representation. The colors are mapped into a
-cylinder, where the angle is the HUE, the height is the VALUE
-and the distance to the center is the SATURATION. This is a very
-useful format for image segmentation algorithms.
-
-Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 66b2ab271afc0888b87a44dc946cc68067ba0985)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/v4l2-core/v4l2-ioctl.c |    2 ++
- include/uapi/linux/videodev2.h       |    4 ++++
- 2 files changed, 6 insertions(+)
-
---- a/drivers/media/v4l2-core/v4l2-ioctl.c
-+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
-@@ -1239,6 +1239,8 @@ static void v4l_fill_fmtdesc(struct v4l2
- 	case V4L2_PIX_FMT_TM6000:	descr = "A/V + VBI Mux Packet"; break;
- 	case V4L2_PIX_FMT_CIT_YYVYUY:	descr = "GSPCA CIT YYVYUY"; break;
- 	case V4L2_PIX_FMT_KONICA420:	descr = "GSPCA KONICA420"; break;
-+	case V4L2_PIX_FMT_HSV24:	descr = "24-bit HSV 8-8-8"; break;
-+	case V4L2_PIX_FMT_HSV32:	descr = "32-bit XHSV 8-8-8-8"; break;
- 	case V4L2_SDR_FMT_CU8:		descr = "Complex U8"; break;
- 	case V4L2_SDR_FMT_CU16LE:	descr = "Complex U16LE"; break;
- 	case V4L2_SDR_FMT_CS8:		descr = "Complex S8"; break;
---- a/include/uapi/linux/videodev2.h
-+++ b/include/uapi/linux/videodev2.h
-@@ -586,6 +586,10 @@ struct v4l2_pix_format {
- #define V4L2_PIX_FMT_SRGGB12 v4l2_fourcc('R', 'G', '1', '2') /* 12  RGRG.. GBGB.. */
- #define V4L2_PIX_FMT_SBGGR16 v4l2_fourcc('B', 'Y', 'R', '2') /* 16  BGBG.. GRGR.. */
- 
-+/* HSV formats */
-+#define V4L2_PIX_FMT_HSV24 v4l2_fourcc('H', 'S', 'V', '3')
-+#define V4L2_PIX_FMT_HSV32 v4l2_fourcc('H', 'S', 'V', '4')
-+
- /* compressed formats */
- #define V4L2_PIX_FMT_MJPEG    v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG   */
- #define V4L2_PIX_FMT_JPEG     v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG     */
diff --git a/patches.renesas/0157-mmc-tmio-discard-obsolete-SDIO-irqs-before-enabling-.patch b/patches.renesas/0157-mmc-tmio-discard-obsolete-SDIO-irqs-before-enabling-.patch
deleted file mode 100644
index f4f21d6dd3db72..00000000000000
--- a/patches.renesas/0157-mmc-tmio-discard-obsolete-SDIO-irqs-before-enabling-.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 1e336b0d7c70bd78d887aa0eb8ef68333d0ac171 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Thu, 19 Jan 2017 21:07:18 +0100
-Subject: [PATCH 157/255] mmc: tmio: discard obsolete SDIO irqs before enabling
- irqs
-
-Before enabling SDIO irqs, clear the status bit, so we discard old and
-stale interrupts. Needed to get two wireless cards working. Use the
-newly introduced macro in all places.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-(cherry picked from commit ee28981535f4261ed5d127ddf4d1a3f8778f520d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc.h     |    2 ++
- drivers/mmc/host/tmio_mmc_pio.c |   13 +++++++++++--
- 2 files changed, 13 insertions(+), 2 deletions(-)
-
---- a/drivers/mmc/host/tmio_mmc.h
-+++ b/drivers/mmc/host/tmio_mmc.h
-@@ -90,6 +90,8 @@
- #define TMIO_SDIO_STAT_EXWT	0x8000
- #define TMIO_SDIO_MASK_ALL	0xc007
- 
-+#define TMIO_SDIO_SETBITS_MASK	0x0006
-+
- /* Define some IRQ masks */
- /* This is the mask used at reset by the chip */
- #define TMIO_MASK_ALL           0x837f031d
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -134,12 +134,21 @@ static void tmio_mmc_enable_sdio_irq(str
- 	struct tmio_mmc_host *host = mmc_priv(mmc);
- 
- 	if (enable && !host->sdio_irq_enabled) {
-+		u16 sdio_status;
-+
- 		/* Keep device active while SDIO irq is enabled */
- 		pm_runtime_get_sync(mmc_dev(mmc));
--		host->sdio_irq_enabled = true;
- 
-+		host->sdio_irq_enabled = true;
- 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
- 					~TMIO_SDIO_STAT_IOIRQ;
-+
-+		/* Clear obsolete interrupts before enabling */
-+		sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
-+		if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
-+			sdio_status |= TMIO_SDIO_SETBITS_MASK;
-+		sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
-+
- 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
- 	} else if (!enable && host->sdio_irq_enabled) {
- 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
-@@ -724,7 +733,7 @@ static void __tmio_mmc_sdio_irq(struct t
- 
- 	sdio_status = status & ~TMIO_SDIO_MASK_ALL;
- 	if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
--		sdio_status |= 6;
-+		sdio_status |= TMIO_SDIO_SETBITS_MASK;
- 
- 	sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
- 
diff --git a/patches.renesas/0158-clk-renesas-rcar-gen3-Add-workaround-for-PLL0-2-4-er.patch b/patches.renesas/0158-clk-renesas-rcar-gen3-Add-workaround-for-PLL0-2-4-er.patch
deleted file mode 100644
index 97dd697609ff56..00000000000000
--- a/patches.renesas/0158-clk-renesas-rcar-gen3-Add-workaround-for-PLL0-2-4-er.patch
+++ /dev/null
@@ -1,89 +0,0 @@
-From 268d44e5cee91838fc6558d9ac21ee8d5a93222a Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 11:46:10 +0100
-Subject: [PATCH 158/286] clk: renesas: rcar-gen3: Add workaround for PLL0/2/4
- errata on H3 ES1.0
-
-Add a workaround for errata on R-Car H3 ES1.0, where the PLL0, PLL2, and
-PLL4 clock frequencies are off by a factor of two.
-
-Inspired by a patch by Dien Pham in the BSP.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Cc: Dien Pham <dien.pham.ry@renesas.com>
-(cherry picked from commit cecbe87d73006cb321dec79b349e3fefd1a80962)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/rcar-gen3-cpg.c |   24 ++++++++++++++++++++++++
- 1 file changed, 24 insertions(+)
-
---- a/drivers/clk/renesas/rcar-gen3-cpg.c
-+++ b/drivers/clk/renesas/rcar-gen3-cpg.c
-@@ -20,6 +20,7 @@
- #include <linux/init.h>
- #include <linux/io.h>
- #include <linux/slab.h>
-+#include <linux/sys_soc.h>
- 
- #include "renesas-cpg-mssr.h"
- #include "rcar-gen3-cpg.h"
-@@ -248,6 +249,17 @@ static struct clk * __init cpg_sd_clk_re
- static const struct rcar_gen3_cpg_pll_config *cpg_pll_config __initdata;
- static unsigned int cpg_clk_extalr __initdata;
- static u32 cpg_mode __initdata;
-+static u32 cpg_quirks __initdata;
-+
-+#define PLL_ERRATA	BIT(0)		/* Missing PLL0/2/4 post-divider */
-+
-+static const struct soc_device_attribute cpg_quirks_match[] __initconst = {
-+	{
-+		.soc_id = "r8a7795", .revision = "ES1.0",
-+		.data = (void *)PLL_ERRATA,
-+	},
-+	{ /* sentinel */ }
-+};
- 
- struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev,
- 	const struct cpg_core_clk *core, const struct cpg_mssr_info *info,
-@@ -276,6 +288,8 @@ struct clk * __init rcar_gen3_cpg_clk_re
- 		 */
- 		value = readl(base + CPG_PLL0CR);
- 		mult = (((value >> 24) & 0x7f) + 1) * 2;
-+		if (cpg_quirks & PLL_ERRATA)
-+			mult *= 2;
- 		break;
- 
- 	case CLK_TYPE_GEN3_PLL1:
-@@ -291,6 +305,8 @@ struct clk * __init rcar_gen3_cpg_clk_re
- 		 */
- 		value = readl(base + CPG_PLL2CR);
- 		mult = (((value >> 24) & 0x7f) + 1) * 2;
-+		if (cpg_quirks & PLL_ERRATA)
-+			mult *= 2;
- 		break;
- 
- 	case CLK_TYPE_GEN3_PLL3:
-@@ -306,6 +322,8 @@ struct clk * __init rcar_gen3_cpg_clk_re
- 		 */
- 		value = readl(base + CPG_PLL4CR);
- 		mult = (((value >> 24) & 0x7f) + 1) * 2;
-+		if (cpg_quirks & PLL_ERRATA)
-+			mult *= 2;
- 		break;
- 
- 	case CLK_TYPE_GEN3_SD:
-@@ -337,8 +355,14 @@ struct clk * __init rcar_gen3_cpg_clk_re
- int __init rcar_gen3_cpg_init(const struct rcar_gen3_cpg_pll_config *config,
- 			      unsigned int clk_extalr, u32 mode)
- {
-+	const struct soc_device_attribute *attr;
-+
- 	cpg_pll_config = config;
- 	cpg_clk_extalr = clk_extalr;
- 	cpg_mode = mode;
-+	attr = soc_device_match(cpg_quirks_match);
-+	if (attr)
-+		cpg_quirks = (uintptr_t)attr->data;
-+	pr_debug("%s: mode = 0x%x quirks = 0x%x\n", __func__, mode, cpg_quirks);
- 	return 0;
- }
diff --git a/patches.renesas/0158-media-videodev2.h-Add-HSV-encoding.patch b/patches.renesas/0158-media-videodev2.h-Add-HSV-encoding.patch
deleted file mode 100644
index f29f6dc483f2a6..00000000000000
--- a/patches.renesas/0158-media-videodev2.h-Add-HSV-encoding.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From f4b4deb8ecebeb058629d1c33c0121860002da2a Mon Sep 17 00:00:00 2001
-From: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
-Date: Mon, 22 Aug 2016 06:28:07 -0300
-Subject: [PATCH 158/299] [media] videodev2.h Add HSV encoding
-
-Some hardware maps the Hue between 0 and 255 instead of 0-179. Support
-this format with a new field hsv_enc.
-
-Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 8a0d62af93026de424d75906e3651ba653197668)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/uapi/linux/videodev2.h |   32 +++++++++++++++++++++++++++-----
- 1 file changed, 27 insertions(+), 5 deletions(-)
-
---- a/include/uapi/linux/videodev2.h
-+++ b/include/uapi/linux/videodev2.h
-@@ -335,6 +335,19 @@ enum v4l2_ycbcr_encoding {
- };
- 
- /*
-+ * enum v4l2_hsv_encoding values should not collide with the ones from
-+ * enum v4l2_ycbcr_encoding.
-+ */
-+enum v4l2_hsv_encoding {
-+
-+	/* Hue mapped to 0 - 179 */
-+	V4L2_HSV_ENC_180		= 128,
-+
-+	/* Hue mapped to 0-255 */
-+	V4L2_HSV_ENC_256		= 129,
-+};
-+
-+/*
-  * Determine how YCBCR_ENC_DEFAULT should map to a proper Y'CbCr encoding.
-  * This depends on the colorspace.
-  */
-@@ -362,9 +375,10 @@ enum v4l2_quantization {
-  * This depends on whether the image is RGB or not, the colorspace and the
-  * Y'CbCr encoding.
-  */
--#define V4L2_MAP_QUANTIZATION_DEFAULT(is_rgb, colsp, ycbcr_enc) \
--	(((is_rgb) && (colsp) == V4L2_COLORSPACE_BT2020) ? V4L2_QUANTIZATION_LIM_RANGE : \
--	 (((is_rgb) || (ycbcr_enc) == V4L2_YCBCR_ENC_XV601 || \
-+#define V4L2_MAP_QUANTIZATION_DEFAULT(is_rgb_or_hsv, colsp, ycbcr_enc) \
-+	(((is_rgb_or_hsv) && (colsp) == V4L2_COLORSPACE_BT2020) ? \
-+	 V4L2_QUANTIZATION_LIM_RANGE : \
-+	 (((is_rgb_or_hsv) || (ycbcr_enc) == V4L2_YCBCR_ENC_XV601 || \
- 	  (ycbcr_enc) == V4L2_YCBCR_ENC_XV709 || (colsp) == V4L2_COLORSPACE_JPEG) ? \
- 	 V4L2_QUANTIZATION_FULL_RANGE : V4L2_QUANTIZATION_LIM_RANGE))
- 
-@@ -461,7 +475,12 @@ struct v4l2_pix_format {
- 	__u32			colorspace;	/* enum v4l2_colorspace */
- 	__u32			priv;		/* private data, depends on pixelformat */
- 	__u32			flags;		/* format flags (V4L2_PIX_FMT_FLAG_*) */
--	__u32			ycbcr_enc;	/* enum v4l2_ycbcr_encoding */
-+	union {
-+		/* enum v4l2_ycbcr_encoding */
-+		__u32			ycbcr_enc;
-+		/* enum v4l2_hsv_encoding */
-+		__u32			hsv_enc;
-+	};
- 	__u32			quantization;	/* enum v4l2_quantization */
- 	__u32			xfer_func;	/* enum v4l2_xfer_func */
- };
-@@ -2009,7 +2028,10 @@ struct v4l2_pix_format_mplane {
- 	struct v4l2_plane_pix_format	plane_fmt[VIDEO_MAX_PLANES];
- 	__u8				num_planes;
- 	__u8				flags;
--	__u8				ycbcr_enc;
-+	 union {
-+		__u8				ycbcr_enc;
-+		__u8				hsv_enc;
-+	};
- 	__u8				quantization;
- 	__u8				xfer_func;
- 	__u8				reserved[7];
diff --git a/patches.renesas/0158-mmc-sh_mobile_sdhi-add-support-for-2-clocks.patch b/patches.renesas/0158-mmc-sh_mobile_sdhi-add-support-for-2-clocks.patch
deleted file mode 100644
index e3c9bcb653a47b..00000000000000
--- a/patches.renesas/0158-mmc-sh_mobile_sdhi-add-support-for-2-clocks.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From bcabe95c59f6813f5d0db93a0e27ec0c9121feb3 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Wed, 25 Jan 2017 15:28:08 -0500
-Subject: [PATCH 158/255] mmc: sh_mobile_sdhi: add support for 2 clocks
-
-Some controllers have 2 clock sources instead of 1. The 2nd clock
-is for the internal card detect logic and must be enabled/disabled
-along with the main core clock for proper operation.
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-(cherry picked from commit 34a1654706c6cc20e7a9077063b307afe28ec66c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c |   23 +++++++++++++++++++++++
- 1 file changed, 23 insertions(+)
-
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -143,6 +143,7 @@ MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_o
- 
- struct sh_mobile_sdhi {
- 	struct clk *clk;
-+	struct clk *clk_cd;
- 	struct tmio_mmc_data mmc_data;
- 	struct tmio_mmc_dma dma_priv;
- 	struct pinctrl *pinctrl;
-@@ -190,6 +191,12 @@ static int sh_mobile_sdhi_clk_enable(str
- 	if (ret < 0)
- 		return ret;
- 
-+	ret = clk_prepare_enable(priv->clk_cd);
-+	if (ret < 0) {
-+		clk_disable_unprepare(priv->clk);
-+		return ret;
-+	}
-+
- 	/*
- 	 * The clock driver may not know what maximum frequency
- 	 * actually works, so it should be set with the max-frequency
-@@ -255,6 +262,7 @@ static void sh_mobile_sdhi_clk_disable(s
- 	struct sh_mobile_sdhi *priv = host_to_priv(host);
- 
- 	clk_disable_unprepare(priv->clk);
-+	clk_disable_unprepare(priv->clk_cd);
- }
- 
- static int sh_mobile_sdhi_card_busy(struct mmc_host *mmc)
-@@ -572,6 +580,21 @@ static int sh_mobile_sdhi_probe(struct p
- 		goto eprobe;
- 	}
- 
-+	/*
-+	 * Some controllers provide a 2nd clock just to run the internal card
-+	 * detection logic. Unfortunately, the existing driver architecture does
-+	 * not support a separation of clocks for runtime PM usage. When
-+	 * native hotplug is used, the tmio driver assumes that the core
-+	 * must continue to run for card detect to stay active, so we cannot
-+	 * disable it.
-+	 * Additionally, it is prohibited to supply a clock to the core but not
-+	 * to the card detect circuit. That leaves us with if separate clocks
-+	 * are presented, we must treat them both as virtually 1 clock.
-+	 */
-+	priv->clk_cd = devm_clk_get(&pdev->dev, "cd");
-+	if (IS_ERR(priv->clk_cd))
-+		priv->clk_cd = NULL;
-+
- 	priv->pinctrl = devm_pinctrl_get(&pdev->dev);
- 	if (!IS_ERR(priv->pinctrl)) {
- 		priv->pins_default = pinctrl_lookup_state(priv->pinctrl,
diff --git a/patches.renesas/0159-clk-renesas-cpg-mssr-Add-support-for-fixing-up-clock.patch b/patches.renesas/0159-clk-renesas-cpg-mssr-Add-support-for-fixing-up-clock.patch
deleted file mode 100644
index c8e7fcd70cc68d..00000000000000
--- a/patches.renesas/0159-clk-renesas-cpg-mssr-Add-support-for-fixing-up-clock.patch
+++ /dev/null
@@ -1,128 +0,0 @@
-From 8cffac2a1d989312132298af4df07f5685b89c1e Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Thu, 29 Sep 2016 14:47:58 +0200
-Subject: [PATCH 159/286] clk: renesas: cpg-mssr: Add support for fixing up
- clock tables
-
-The same SoC may have different clocks and/or module clock parents,
-depending on SoC revision.  One option is to use different sets of clock
-tables for each SoC revision.  However, if the differences are small, it
-is much more space-efficient to have a single set of clock tables, and
-fix those up at runtime instead.
-
-Hence provide three helpers:
-  - Two helpers to NULLify core and module clocks that do not exist on
-    some revisions (NULLified clocks are skipped during the registration
-    phase),
-  - One helper to reparent module clocks that have different clock
-    parents.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 48d0341e41870bcfc42206d38e00a6b1c2fea929)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/renesas-cpg-mssr.c |   50 +++++++++++++++++++++++++++++++++
- drivers/clk/renesas/renesas-cpg-mssr.h |   22 ++++++++++++++
- 2 files changed, 72 insertions(+)
-
---- a/drivers/clk/renesas/renesas-cpg-mssr.c
-+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
-@@ -266,6 +266,11 @@ static void __init cpg_mssr_register_cor
- 	WARN_DEBUG(id >= priv->num_core_clks);
- 	WARN_DEBUG(PTR_ERR(priv->clks[id]) != -ENOENT);
- 
-+	if (!core->name) {
-+		/* Skip NULLified clock */
-+		return;
-+	}
-+
- 	switch (core->type) {
- 	case CLK_TYPE_IN:
- 		clk = of_clk_get_by_name(priv->dev->of_node, core->name);
-@@ -336,6 +341,11 @@ static void __init cpg_mssr_register_mod
- 	WARN_DEBUG(mod->parent >= priv->num_core_clks + priv->num_mod_clks);
- 	WARN_DEBUG(PTR_ERR(priv->clks[id]) != -ENOENT);
- 
-+	if (!mod->name) {
-+		/* Skip NULLified clock */
-+		return;
-+	}
-+
- 	parent = priv->clks[mod->parent];
- 	if (IS_ERR(parent)) {
- 		clk = parent;
-@@ -735,5 +745,45 @@ static int __init cpg_mssr_init(void)
- 
- subsys_initcall(cpg_mssr_init);
- 
-+void __init cpg_core_nullify_range(struct cpg_core_clk *core_clks,
-+				   unsigned int num_core_clks,
-+				   unsigned int first_clk,
-+				   unsigned int last_clk)
-+{
-+	unsigned int i;
-+
-+	for (i = 0; i < num_core_clks; i++)
-+		if (core_clks[i].id >= first_clk &&
-+		    core_clks[i].id <= last_clk)
-+			core_clks[i].name = NULL;
-+}
-+
-+void __init mssr_mod_nullify(struct mssr_mod_clk *mod_clks,
-+			     unsigned int num_mod_clks,
-+			     const unsigned int *clks, unsigned int n)
-+{
-+	unsigned int i, j;
-+
-+	for (i = 0, j = 0; i < num_mod_clks && j < n; i++)
-+		if (mod_clks[i].id == clks[j]) {
-+			mod_clks[i].name = NULL;
-+			j++;
-+		}
-+}
-+
-+void __init mssr_mod_reparent(struct mssr_mod_clk *mod_clks,
-+			      unsigned int num_mod_clks,
-+			      const struct mssr_mod_reparent *clks,
-+			      unsigned int n)
-+{
-+	unsigned int i, j;
-+
-+	for (i = 0, j = 0; i < num_mod_clks && j < n; i++)
-+		if (mod_clks[i].id == clks[j].clk) {
-+			mod_clks[i].parent = clks[j].parent;
-+			j++;
-+		}
-+}
-+
- MODULE_DESCRIPTION("Renesas CPG/MSSR Driver");
- MODULE_LICENSE("GPL v2");
---- a/drivers/clk/renesas/renesas-cpg-mssr.h
-+++ b/drivers/clk/renesas/renesas-cpg-mssr.h
-@@ -134,4 +134,26 @@ extern const struct cpg_mssr_info r8a774
- extern const struct cpg_mssr_info r8a7745_cpg_mssr_info;
- extern const struct cpg_mssr_info r8a7795_cpg_mssr_info;
- extern const struct cpg_mssr_info r8a7796_cpg_mssr_info;
-+
-+
-+    /*
-+     * Helpers for fixing up clock tables depending on SoC revision
-+     */
-+
-+struct mssr_mod_reparent {
-+	unsigned int clk, parent;
-+};
-+
-+
-+extern void cpg_core_nullify_range(struct cpg_core_clk *core_clks,
-+				   unsigned int num_core_clks,
-+				   unsigned int first_clk,
-+				   unsigned int last_clk);
-+extern void mssr_mod_nullify(struct mssr_mod_clk *mod_clks,
-+			     unsigned int num_mod_clks,
-+			     const unsigned int *clks, unsigned int n);
-+extern void mssr_mod_reparent(struct mssr_mod_clk *mod_clks,
-+			      unsigned int num_mod_clks,
-+			      const struct mssr_mod_reparent *clks,
-+			      unsigned int n);
- #endif
diff --git a/patches.renesas/0159-clk-renesas-r8a7796-Add-SYS-DMAC-clocks.patch b/patches.renesas/0159-clk-renesas-r8a7796-Add-SYS-DMAC-clocks.patch
deleted file mode 100644
index f29bd5f75360c2..00000000000000
--- a/patches.renesas/0159-clk-renesas-r8a7796-Add-SYS-DMAC-clocks.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 62a1a32bebd9b99c74767f64c3892e9672da0a67 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Wed, 14 Sep 2016 18:45:47 +0200
-Subject: [PATCH 159/299] clk: renesas: r8a7796: Add SYS-DMAC clocks
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit cf8fe97cad4a248bc7baaf39ecde2aece72f8618)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -109,6 +109,9 @@ static const struct cpg_core_clk r8a7796
- };
- 
- static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
-+	DEF_MOD("sys-dmac2",		 217,	R8A7796_CLK_S0D3),
-+	DEF_MOD("sys-dmac1",		 218,	R8A7796_CLK_S0D3),
-+	DEF_MOD("sys-dmac0",		 219,	R8A7796_CLK_S0D3),
- 	DEF_MOD("cmt3",			 300,	R8A7796_CLK_R),
- 	DEF_MOD("cmt2",			 301,	R8A7796_CLK_R),
- 	DEF_MOD("cmt1",			 302,	R8A7796_CLK_R),
diff --git a/patches.renesas/0159-mmc-sh_mobile_sdhi-explain-clock-bindings.patch b/patches.renesas/0159-mmc-sh_mobile_sdhi-explain-clock-bindings.patch
deleted file mode 100644
index 332dab5b66675a..00000000000000
--- a/patches.renesas/0159-mmc-sh_mobile_sdhi-explain-clock-bindings.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 84e03feab423e6bde5568c8dcd35b7217ceec4a6 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Wed, 25 Jan 2017 15:28:09 -0500
-Subject: [PATCH 159/255] mmc: sh_mobile_sdhi: explain clock bindings
-
-In the case of a single clock source, you don't need names. However,
-if the controller has 2 clock sources, you need to name them correctly
-so the driver can find the 2nd one. The 2nd clock is for the internal
-card detect logic.
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Acked-by: Rob Herring <robh@kernel.org>
-(cherry picked from commit 62a4cdead56e5715c61aadd41ab66f49bd3170f1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/mmc/tmio_mmc.txt |   13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
-+++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
-@@ -25,6 +25,19 @@ Required properties:
- 		"renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC
- 		"renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC
- 
-+- clocks: Most controllers only have 1 clock source per channel. However, on
-+	  some variations of this controller, the internal card detection
-+	  logic that exists in this controller is sectioned off to be run by a
-+	  separate second clock source to allow the main core clock to be turned
-+	  off to save power.
-+	  If 2 clocks are specified by the hardware, you must name them as
-+	  "core" and "cd". If the controller only has 1 clock, naming is not
-+	  required.
-+	  Below is the number clocks for each supported SoC:
-+	   1: SH73A0, R8A73A4, R8A7740, R8A7778, R8A7779, R8A7790
-+	      R8A7791, R8A7792, R8A7793, R8A7794, R8A7795, R8A7796
-+	   2: R7S72100
-+
- Optional properties:
- - toshiba,mmc-wrprotect-disable: write-protect detection is unavailable
- - pinctrl-names: should be "default", "state_uhs"
diff --git a/patches.renesas/0160-clk-renesas-r8a7795-Add-support-for-R-Car-H3-ES2.0.patch b/patches.renesas/0160-clk-renesas-r8a7795-Add-support-for-R-Car-H3-ES2.0.patch
deleted file mode 100644
index 2e79708640cb0a..00000000000000
--- a/patches.renesas/0160-clk-renesas-r8a7795-Add-support-for-R-Car-H3-ES2.0.patch
+++ /dev/null
@@ -1,331 +0,0 @@
-From 512a0c283100056561b9aea4c581c1390723a9ff Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Thu, 29 Sep 2016 14:36:11 +0200
-Subject: [PATCH 160/286] clk: renesas: r8a7795: Add support for R-Car H3 ES2.0
-
-The Clock Pulse Generator / Module Standby and Software Reset module in
-R-Car H3 ES2.0 differs from ES1.x in the following areas:
-  - More core clocks (S0D2, S0D3, S0D6, S0D8, S0D12),
-  - Different parent clocks for AUDMAC, EtherAVB, FCP, FDP, IMR,
-    SYS-DMAC, VIN, VSPB, VSPI,
-  - Removal of modules CSI21, FCPCI, FCPF2, FCPVD3, FCPVI2, FDP1-2,
-    USB3-IF1, VSPD3, VSPI2,
-  - Addition of modules EHCI3, HS-USB-IF3, USB-DMAC3-0, USB-DMAC3-1.
-
-The goal is twofold:
-  1. Support both the ES1.x and ES2.0 SoC revisions in a single binary
-     for now,
-  2. Make it clear which code supports ES1.x, so it can easily be
-     identified and removed later, when production SoCs are deemed
-     ubiquitous.
-
-This is achieved by:
-  - Updating the clock tables for the latest revision (ES2.0), but not
-    removing clocks that only exist on earlier revisions (ES1.x),
-  - Detecting the SoC revision at runtime using the new soc_device_match()
-    API, and fixing up the clocks tables to match the actual SoC
-    revision, by:
-      - NULLifying core and module clocks of modules that do not exist,
-      - Reparenting module clocks that have a different parent on ES1.x.
-
-Based on R-Car Gen3 Hardware User's Manual rev. 0.53E.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 5573d194128b47334e3edb2db87cb471449d445a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7795-cpg-mssr.c |  201 ++++++++++++++++++++++++---------
- 1 file changed, 151 insertions(+), 50 deletions(-)
-
---- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
-@@ -16,6 +16,7 @@
- #include <linux/init.h>
- #include <linux/kernel.h>
- #include <linux/soc/renesas/rcar-rst.h>
-+#include <linux/sys_soc.h>
- 
- #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
- 
-@@ -24,7 +25,7 @@
- 
- enum clk_ids {
- 	/* Core Clock Outputs exported to DT */
--	LAST_DT_CORE_CLK = R8A7795_CLK_OSC,
-+	LAST_DT_CORE_CLK = R8A7795_CLK_S0D12,
- 
- 	/* External Input Clocks */
- 	CLK_EXTAL,
-@@ -51,7 +52,7 @@ enum clk_ids {
- 	MOD_CLK_BASE
- };
- 
--static const struct cpg_core_clk r8a7795_core_clks[] __initconst = {
-+static struct cpg_core_clk r8a7795_core_clks[] __initdata = {
- 	/* External Clock Inputs */
- 	DEF_INPUT("extal",      CLK_EXTAL),
- 	DEF_INPUT("extalr",     CLK_EXTALR),
-@@ -78,7 +79,12 @@ static const struct cpg_core_clk r8a7795
- 	DEF_FIXED("zt",         R8A7795_CLK_ZT,    CLK_PLL1_DIV2,  4, 1),
- 	DEF_FIXED("zx",         R8A7795_CLK_ZX,    CLK_PLL1_DIV2,  2, 1),
- 	DEF_FIXED("s0d1",       R8A7795_CLK_S0D1,  CLK_S0,         1, 1),
-+	DEF_FIXED("s0d2",       R8A7795_CLK_S0D2,  CLK_S0,         2, 1),
-+	DEF_FIXED("s0d3",       R8A7795_CLK_S0D3,  CLK_S0,         3, 1),
- 	DEF_FIXED("s0d4",       R8A7795_CLK_S0D4,  CLK_S0,         4, 1),
-+	DEF_FIXED("s0d6",       R8A7795_CLK_S0D6,  CLK_S0,         6, 1),
-+	DEF_FIXED("s0d8",       R8A7795_CLK_S0D8,  CLK_S0,         8, 1),
-+	DEF_FIXED("s0d12",      R8A7795_CLK_S0D12, CLK_S0,        12, 1),
- 	DEF_FIXED("s1d1",       R8A7795_CLK_S1D1,  CLK_S1,         1, 1),
- 	DEF_FIXED("s1d2",       R8A7795_CLK_S1D2,  CLK_S1,         2, 1),
- 	DEF_FIXED("s1d4",       R8A7795_CLK_S1D4,  CLK_S1,         4, 1),
-@@ -108,10 +114,10 @@ static const struct cpg_core_clk r8a7795
- 	DEF_BASE("r",           R8A7795_CLK_R,     CLK_TYPE_GEN3_R, CLK_RINT),
- };
- 
--static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
--	DEF_MOD("fdp1-2",		 117,	R8A7795_CLK_S2D1),
--	DEF_MOD("fdp1-1",		 118,	R8A7795_CLK_S2D1),
--	DEF_MOD("fdp1-0",		 119,	R8A7795_CLK_S2D1),
-+static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
-+	DEF_MOD("fdp1-2",		 117,	R8A7795_CLK_S2D1), /* ES1.x */
-+	DEF_MOD("fdp1-1",		 118,	R8A7795_CLK_S0D1),
-+	DEF_MOD("fdp1-0",		 119,	R8A7795_CLK_S0D1),
- 	DEF_MOD("scif5",		 202,	R8A7795_CLK_S3D4),
- 	DEF_MOD("scif4",		 203,	R8A7795_CLK_S3D4),
- 	DEF_MOD("scif3",		 204,	R8A7795_CLK_S3D4),
-@@ -121,9 +127,9 @@ static const struct mssr_mod_clk r8a7795
- 	DEF_MOD("msiof2",		 209,	R8A7795_CLK_MSO),
- 	DEF_MOD("msiof1",		 210,	R8A7795_CLK_MSO),
- 	DEF_MOD("msiof0",		 211,	R8A7795_CLK_MSO),
--	DEF_MOD("sys-dmac2",		 217,	R8A7795_CLK_S3D1),
--	DEF_MOD("sys-dmac1",		 218,	R8A7795_CLK_S3D1),
--	DEF_MOD("sys-dmac0",		 219,	R8A7795_CLK_S3D1),
-+	DEF_MOD("sys-dmac2",		 217,	R8A7795_CLK_S0D3),
-+	DEF_MOD("sys-dmac1",		 218,	R8A7795_CLK_S0D3),
-+	DEF_MOD("sys-dmac0",		 219,	R8A7795_CLK_S0D3),
- 	DEF_MOD("cmt3",			 300,	R8A7795_CLK_R),
- 	DEF_MOD("cmt2",			 301,	R8A7795_CLK_R),
- 	DEF_MOD("cmt1",			 302,	R8A7795_CLK_R),
-@@ -135,15 +141,15 @@ static const struct mssr_mod_clk r8a7795
- 	DEF_MOD("sdif0",		 314,	R8A7795_CLK_SD0),
- 	DEF_MOD("pcie1",		 318,	R8A7795_CLK_S3D1),
- 	DEF_MOD("pcie0",		 319,	R8A7795_CLK_S3D1),
--	DEF_MOD("usb3-if1",		 327,	R8A7795_CLK_S3D1),
-+	DEF_MOD("usb3-if1",		 327,	R8A7795_CLK_S3D1), /* ES1.x */
- 	DEF_MOD("usb3-if0",		 328,	R8A7795_CLK_S3D1),
- 	DEF_MOD("usb-dmac0",		 330,	R8A7795_CLK_S3D1),
- 	DEF_MOD("usb-dmac1",		 331,	R8A7795_CLK_S3D1),
- 	DEF_MOD("rwdt",			 402,	R8A7795_CLK_R),
- 	DEF_MOD("intc-ex",		 407,	R8A7795_CLK_CP),
- 	DEF_MOD("intc-ap",		 408,	R8A7795_CLK_S3D1),
--	DEF_MOD("audmac1",		 501,	R8A7795_CLK_S3D1),
--	DEF_MOD("audmac0",		 502,	R8A7795_CLK_S3D1),
-+	DEF_MOD("audmac1",		 501,	R8A7795_CLK_S0D3),
-+	DEF_MOD("audmac0",		 502,	R8A7795_CLK_S0D3),
- 	DEF_MOD("drif7",		 508,	R8A7795_CLK_S3D2),
- 	DEF_MOD("drif6",		 509,	R8A7795_CLK_S3D2),
- 	DEF_MOD("drif5",		 510,	R8A7795_CLK_S3D2),
-@@ -159,35 +165,35 @@ static const struct mssr_mod_clk r8a7795
- 	DEF_MOD("hscif0",		 520,	R8A7795_CLK_S3D1),
- 	DEF_MOD("thermal",		 522,	R8A7795_CLK_CP),
- 	DEF_MOD("pwm",			 523,	R8A7795_CLK_S3D4),
--	DEF_MOD("fcpvd3",		 600,	R8A7795_CLK_S2D1),
--	DEF_MOD("fcpvd2",		 601,	R8A7795_CLK_S2D1),
--	DEF_MOD("fcpvd1",		 602,	R8A7795_CLK_S2D1),
--	DEF_MOD("fcpvd0",		 603,	R8A7795_CLK_S2D1),
--	DEF_MOD("fcpvb1",		 606,	R8A7795_CLK_S2D1),
--	DEF_MOD("fcpvb0",		 607,	R8A7795_CLK_S2D1),
--	DEF_MOD("fcpvi2",		 609,	R8A7795_CLK_S2D1),
--	DEF_MOD("fcpvi1",		 610,	R8A7795_CLK_S2D1),
--	DEF_MOD("fcpvi0",		 611,	R8A7795_CLK_S2D1),
--	DEF_MOD("fcpf2",		 613,	R8A7795_CLK_S2D1),
--	DEF_MOD("fcpf1",		 614,	R8A7795_CLK_S2D1),
--	DEF_MOD("fcpf0",		 615,	R8A7795_CLK_S2D1),
--	DEF_MOD("fcpci1",		 616,	R8A7795_CLK_S2D1),
--	DEF_MOD("fcpci0",		 617,	R8A7795_CLK_S2D1),
--	DEF_MOD("fcpcs",		 619,	R8A7795_CLK_S2D1),
--	DEF_MOD("vspd3",		 620,	R8A7795_CLK_S2D1),
--	DEF_MOD("vspd2",		 621,	R8A7795_CLK_S2D1),
--	DEF_MOD("vspd1",		 622,	R8A7795_CLK_S2D1),
--	DEF_MOD("vspd0",		 623,	R8A7795_CLK_S2D1),
--	DEF_MOD("vspbc",		 624,	R8A7795_CLK_S2D1),
--	DEF_MOD("vspbd",		 626,	R8A7795_CLK_S2D1),
--	DEF_MOD("vspi2",		 629,	R8A7795_CLK_S2D1),
--	DEF_MOD("vspi1",		 630,	R8A7795_CLK_S2D1),
--	DEF_MOD("vspi0",		 631,	R8A7795_CLK_S2D1),
-+	DEF_MOD("fcpvd3",		 600,	R8A7795_CLK_S2D1), /* ES1.x */
-+	DEF_MOD("fcpvd2",		 601,	R8A7795_CLK_S0D2),
-+	DEF_MOD("fcpvd1",		 602,	R8A7795_CLK_S0D2),
-+	DEF_MOD("fcpvd0",		 603,	R8A7795_CLK_S0D2),
-+	DEF_MOD("fcpvb1",		 606,	R8A7795_CLK_S0D1),
-+	DEF_MOD("fcpvb0",		 607,	R8A7795_CLK_S0D1),
-+	DEF_MOD("fcpvi2",		 609,	R8A7795_CLK_S2D1), /* ES1.x */
-+	DEF_MOD("fcpvi1",		 610,	R8A7795_CLK_S0D1),
-+	DEF_MOD("fcpvi0",		 611,	R8A7795_CLK_S0D1),
-+	DEF_MOD("fcpf2",		 613,	R8A7795_CLK_S2D1), /* ES1.x */
-+	DEF_MOD("fcpf1",		 614,	R8A7795_CLK_S0D1),
-+	DEF_MOD("fcpf0",		 615,	R8A7795_CLK_S0D1),
-+	DEF_MOD("fcpci1",		 616,	R8A7795_CLK_S2D1), /* ES1.x */
-+	DEF_MOD("fcpci0",		 617,	R8A7795_CLK_S2D1), /* ES1.x */
-+	DEF_MOD("fcpcs",		 619,	R8A7795_CLK_S0D1),
-+	DEF_MOD("vspd3",		 620,	R8A7795_CLK_S2D1), /* ES1.x */
-+	DEF_MOD("vspd2",		 621,	R8A7795_CLK_S0D2),
-+	DEF_MOD("vspd1",		 622,	R8A7795_CLK_S0D2),
-+	DEF_MOD("vspd0",		 623,	R8A7795_CLK_S0D2),
-+	DEF_MOD("vspbc",		 624,	R8A7795_CLK_S0D1),
-+	DEF_MOD("vspbd",		 626,	R8A7795_CLK_S0D1),
-+	DEF_MOD("vspi2",		 629,	R8A7795_CLK_S2D1), /* ES1.x */
-+	DEF_MOD("vspi1",		 630,	R8A7795_CLK_S0D1),
-+	DEF_MOD("vspi0",		 631,	R8A7795_CLK_S0D1),
- 	DEF_MOD("ehci2",		 701,	R8A7795_CLK_S3D4),
- 	DEF_MOD("ehci1",		 702,	R8A7795_CLK_S3D4),
- 	DEF_MOD("ehci0",		 703,	R8A7795_CLK_S3D4),
- 	DEF_MOD("hsusb",		 704,	R8A7795_CLK_S3D4),
--	DEF_MOD("csi21",		 713,	R8A7795_CLK_CSI0),
-+	DEF_MOD("csi21",		 713,	R8A7795_CLK_CSI0), /* ES1.x */
- 	DEF_MOD("csi20",		 714,	R8A7795_CLK_CSI0),
- 	DEF_MOD("csi41",		 715,	R8A7795_CLK_CSI0),
- 	DEF_MOD("csi40",		 716,	R8A7795_CLK_CSI0),
-@@ -198,20 +204,20 @@ static const struct mssr_mod_clk r8a7795
- 	DEF_MOD("lvds",			 727,	R8A7795_CLK_S0D4),
- 	DEF_MOD("hdmi1",		 728,	R8A7795_CLK_HDMI),
- 	DEF_MOD("hdmi0",		 729,	R8A7795_CLK_HDMI),
--	DEF_MOD("vin7",			 804,	R8A7795_CLK_S2D1),
--	DEF_MOD("vin6",			 805,	R8A7795_CLK_S2D1),
--	DEF_MOD("vin5",			 806,	R8A7795_CLK_S2D1),
--	DEF_MOD("vin4",			 807,	R8A7795_CLK_S2D1),
--	DEF_MOD("vin3",			 808,	R8A7795_CLK_S2D1),
--	DEF_MOD("vin2",			 809,	R8A7795_CLK_S2D1),
--	DEF_MOD("vin1",			 810,	R8A7795_CLK_S2D1),
--	DEF_MOD("vin0",			 811,	R8A7795_CLK_S2D1),
--	DEF_MOD("etheravb",		 812,	R8A7795_CLK_S3D2),
-+	DEF_MOD("vin7",			 804,	R8A7795_CLK_S0D2),
-+	DEF_MOD("vin6",			 805,	R8A7795_CLK_S0D2),
-+	DEF_MOD("vin5",			 806,	R8A7795_CLK_S0D2),
-+	DEF_MOD("vin4",			 807,	R8A7795_CLK_S0D2),
-+	DEF_MOD("vin3",			 808,	R8A7795_CLK_S0D2),
-+	DEF_MOD("vin2",			 809,	R8A7795_CLK_S0D2),
-+	DEF_MOD("vin1",			 810,	R8A7795_CLK_S0D2),
-+	DEF_MOD("vin0",			 811,	R8A7795_CLK_S0D2),
-+	DEF_MOD("etheravb",		 812,	R8A7795_CLK_S0D6),
- 	DEF_MOD("sata0",		 815,	R8A7795_CLK_S3D2),
--	DEF_MOD("imr3",			 820,	R8A7795_CLK_S2D1),
--	DEF_MOD("imr2",			 821,	R8A7795_CLK_S2D1),
--	DEF_MOD("imr1",			 822,	R8A7795_CLK_S2D1),
--	DEF_MOD("imr0",			 823,	R8A7795_CLK_S2D1),
-+	DEF_MOD("imr3",			 820,	R8A7795_CLK_S0D2),
-+	DEF_MOD("imr2",			 821,	R8A7795_CLK_S0D2),
-+	DEF_MOD("imr1",			 822,	R8A7795_CLK_S0D2),
-+	DEF_MOD("imr0",			 823,	R8A7795_CLK_S0D2),
- 	DEF_MOD("gpio7",		 905,	R8A7795_CLK_CP),
- 	DEF_MOD("gpio6",		 906,	R8A7795_CLK_CP),
- 	DEF_MOD("gpio5",		 907,	R8A7795_CLK_CP),
-@@ -314,6 +320,82 @@ static const struct rcar_gen3_cpg_pll_co
- 	{ 2,		192,		192,	},
- };
- 
-+static const struct soc_device_attribute r8a7795es1[] __initconst = {
-+	{ .soc_id = "r8a7795", .revision = "ES1.*" },
-+	{ /* sentinel */ }
-+};
-+
-+
-+	/*
-+	 * Fixups for R-Car H3 ES1.x
-+	 */
-+
-+static const unsigned int r8a7795es1_mod_nullify[] __initconst = {
-+	MOD_CLK_ID(326),			/* USB-DMAC3-0 */
-+	MOD_CLK_ID(329),			/* USB-DMAC3-1 */
-+	MOD_CLK_ID(700),			/* EHCI/OHCI3 */
-+	MOD_CLK_ID(705),			/* HS-USB-IF3 */
-+
-+};
-+
-+static const struct mssr_mod_reparent r8a7795es1_mod_reparent[] __initconst = {
-+	{ MOD_CLK_ID(118), R8A7795_CLK_S2D1 },	/* FDP1-1 */
-+	{ MOD_CLK_ID(119), R8A7795_CLK_S2D1 },	/* FDP1-0 */
-+	{ MOD_CLK_ID(217), R8A7795_CLK_S3D1 },	/* SYS-DMAC2 */
-+	{ MOD_CLK_ID(218), R8A7795_CLK_S3D1 },	/* SYS-DMAC1 */
-+	{ MOD_CLK_ID(219), R8A7795_CLK_S3D1 },	/* SYS-DMAC0 */
-+	{ MOD_CLK_ID(501), R8A7795_CLK_S3D1 },	/* AUDMAC1 */
-+	{ MOD_CLK_ID(502), R8A7795_CLK_S3D1 },	/* AUDMAC0 */
-+	{ MOD_CLK_ID(601), R8A7795_CLK_S2D1 },	/* FCPVD2 */
-+	{ MOD_CLK_ID(602), R8A7795_CLK_S2D1 },	/* FCPVD1 */
-+	{ MOD_CLK_ID(603), R8A7795_CLK_S2D1 },	/* FCPVD0 */
-+	{ MOD_CLK_ID(606), R8A7795_CLK_S2D1 },	/* FCPVB1 */
-+	{ MOD_CLK_ID(607), R8A7795_CLK_S2D1 },	/* FCPVB0 */
-+	{ MOD_CLK_ID(610), R8A7795_CLK_S2D1 },	/* FCPVI1 */
-+	{ MOD_CLK_ID(611), R8A7795_CLK_S2D1 },	/* FCPVI0 */
-+	{ MOD_CLK_ID(614), R8A7795_CLK_S2D1 },	/* FCPF1 */
-+	{ MOD_CLK_ID(615), R8A7795_CLK_S2D1 },	/* FCPF0 */
-+	{ MOD_CLK_ID(619), R8A7795_CLK_S2D1 },	/* FCPCS */
-+	{ MOD_CLK_ID(621), R8A7795_CLK_S2D1 },	/* VSPD2 */
-+	{ MOD_CLK_ID(622), R8A7795_CLK_S2D1 },	/* VSPD1 */
-+	{ MOD_CLK_ID(623), R8A7795_CLK_S2D1 },	/* VSPD0 */
-+	{ MOD_CLK_ID(624), R8A7795_CLK_S2D1 },	/* VSPBC */
-+	{ MOD_CLK_ID(626), R8A7795_CLK_S2D1 },	/* VSPBD */
-+	{ MOD_CLK_ID(630), R8A7795_CLK_S2D1 },	/* VSPI1 */
-+	{ MOD_CLK_ID(631), R8A7795_CLK_S2D1 },	/* VSPI0 */
-+	{ MOD_CLK_ID(804), R8A7795_CLK_S2D1 },	/* VIN7 */
-+	{ MOD_CLK_ID(805), R8A7795_CLK_S2D1 },	/* VIN6 */
-+	{ MOD_CLK_ID(806), R8A7795_CLK_S2D1 },	/* VIN5 */
-+	{ MOD_CLK_ID(807), R8A7795_CLK_S2D1 },	/* VIN4 */
-+	{ MOD_CLK_ID(808), R8A7795_CLK_S2D1 },	/* VIN3 */
-+	{ MOD_CLK_ID(809), R8A7795_CLK_S2D1 },	/* VIN2 */
-+	{ MOD_CLK_ID(810), R8A7795_CLK_S2D1 },	/* VIN1 */
-+	{ MOD_CLK_ID(811), R8A7795_CLK_S2D1 },	/* VIN0 */
-+	{ MOD_CLK_ID(812), R8A7795_CLK_S3D2 },	/* EAVB-IF */
-+	{ MOD_CLK_ID(820), R8A7795_CLK_S2D1 },	/* IMR3 */
-+	{ MOD_CLK_ID(821), R8A7795_CLK_S2D1 },	/* IMR2 */
-+	{ MOD_CLK_ID(822), R8A7795_CLK_S2D1 },	/* IMR1 */
-+	{ MOD_CLK_ID(823), R8A7795_CLK_S2D1 },	/* IMR0 */
-+};
-+
-+
-+	/*
-+	 * Fixups for R-Car H3 ES2.x
-+	 */
-+
-+static const unsigned int r8a7795es2_mod_nullify[] __initconst = {
-+	MOD_CLK_ID(117),			/* FDP1-2 */
-+	MOD_CLK_ID(327),			/* USB3-IF1 */
-+	MOD_CLK_ID(600),			/* FCPVD3 */
-+	MOD_CLK_ID(609),			/* FCPVI2 */
-+	MOD_CLK_ID(613),			/* FCPF2 */
-+	MOD_CLK_ID(616),			/* FCPCI1 */
-+	MOD_CLK_ID(617),			/* FCPCI0 */
-+	MOD_CLK_ID(620),			/* VSPD3 */
-+	MOD_CLK_ID(629),			/* VSPI2 */
-+	MOD_CLK_ID(713),			/* CSI21 */
-+};
-+
- static int __init r8a7795_cpg_mssr_init(struct device *dev)
- {
- 	const struct rcar_gen3_cpg_pll_config *cpg_pll_config;
-@@ -330,6 +412,25 @@ static int __init r8a7795_cpg_mssr_init(
- 		return -EINVAL;
- 	}
- 
-+	if (soc_device_match(r8a7795es1)) {
-+		cpg_core_nullify_range(r8a7795_core_clks,
-+				       ARRAY_SIZE(r8a7795_core_clks),
-+				       R8A7795_CLK_S0D2, R8A7795_CLK_S0D12);
-+		mssr_mod_nullify(r8a7795_mod_clks,
-+				 ARRAY_SIZE(r8a7795_mod_clks),
-+				 r8a7795es1_mod_nullify,
-+				 ARRAY_SIZE(r8a7795es1_mod_nullify));
-+		mssr_mod_reparent(r8a7795_mod_clks,
-+				  ARRAY_SIZE(r8a7795_mod_clks),
-+				  r8a7795es1_mod_reparent,
-+				  ARRAY_SIZE(r8a7795es1_mod_reparent));
-+	} else {
-+		mssr_mod_nullify(r8a7795_mod_clks,
-+				 ARRAY_SIZE(r8a7795_mod_clks),
-+				 r8a7795es2_mod_nullify,
-+				 ARRAY_SIZE(r8a7795es2_mod_nullify));
-+	}
-+
- 	return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode);
- }
- 
diff --git a/patches.renesas/0160-clk-renesas-r8a7796-Add-SCIF-clocks.patch b/patches.renesas/0160-clk-renesas-r8a7796-Add-SCIF-clocks.patch
deleted file mode 100644
index de1848a04a6ecf..00000000000000
--- a/patches.renesas/0160-clk-renesas-r8a7796-Add-SCIF-clocks.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 54fc2e6bf87f85a7f7f0b87d4f043d78f3a99723 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Wed, 14 Sep 2016 18:46:46 +0200
-Subject: [PATCH 160/299] clk: renesas: r8a7796: Add SCIF clocks
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 951456c37df6d778dc0ce42357417cba440cba87)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -109,6 +109,11 @@ static const struct cpg_core_clk r8a7796
- };
- 
- static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
-+	DEF_MOD("scif5",		 202,	R8A7796_CLK_S3D4),
-+	DEF_MOD("scif4",		 203,	R8A7796_CLK_S3D4),
-+	DEF_MOD("scif3",		 204,	R8A7796_CLK_S3D4),
-+	DEF_MOD("scif1",		 206,	R8A7796_CLK_S3D4),
-+	DEF_MOD("scif0",		 207,	R8A7796_CLK_S3D4),
- 	DEF_MOD("sys-dmac2",		 217,	R8A7796_CLK_S0D3),
- 	DEF_MOD("sys-dmac1",		 218,	R8A7796_CLK_S0D3),
- 	DEF_MOD("sys-dmac0",		 219,	R8A7796_CLK_S0D3),
diff --git a/patches.renesas/0160-spi-sh-msiof-Remove-useless-memory-allocation-failur.patch b/patches.renesas/0160-spi-sh-msiof-Remove-useless-memory-allocation-failur.patch
deleted file mode 100644
index f1e86f2518d5b0..00000000000000
--- a/patches.renesas/0160-spi-sh-msiof-Remove-useless-memory-allocation-failur.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 88b77c65e78474dcd9658f2436bccdbcfa6ef4fc Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 4 Jan 2017 11:15:08 +0100
-Subject: [PATCH 160/255] spi: sh-msiof: Remove useless memory allocation
- failure message
-
-Printing an error on memory allocation failure is unnecessary.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit e7ad4a73364c21f40963a35631b285b60fa3198c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/spi-sh-msiof.c |    4 +---
- 1 file changed, 1 insertion(+), 3 deletions(-)
-
---- a/drivers/spi/spi-sh-msiof.c
-+++ b/drivers/spi/spi-sh-msiof.c
-@@ -1164,10 +1164,8 @@ static int sh_msiof_spi_probe(struct pla
- 	int ret;
- 
- 	master = spi_alloc_master(&pdev->dev, sizeof(struct sh_msiof_spi_priv));
--	if (master == NULL) {
--		dev_err(&pdev->dev, "failed to allocate spi master\n");
-+	if (master == NULL)
- 		return -ENOMEM;
--	}
- 
- 	p = spi_master_get_devdata(master);
- 
diff --git a/patches.renesas/0161-clk-renesas-r8a7796-Add-HSCIF-clocks.patch b/patches.renesas/0161-clk-renesas-r8a7796-Add-HSCIF-clocks.patch
deleted file mode 100644
index 54901ef097a03b..00000000000000
--- a/patches.renesas/0161-clk-renesas-r8a7796-Add-HSCIF-clocks.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From c6d0454594a53c167105b5d5c4ce84288e295701 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Wed, 14 Sep 2016 18:47:13 +0200
-Subject: [PATCH 161/299] clk: renesas: r8a7796: Add HSCIF clocks
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 28aa831949d62711a44d97d692811e767a35b59e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -128,6 +128,11 @@ static const struct mssr_mod_clk r8a7796
- 	DEF_MOD("sdif0",		 314,	R8A7796_CLK_SD0),
- 	DEF_MOD("rwdt0",		 402,	R8A7796_CLK_R),
- 	DEF_MOD("intc-ap",		 408,	R8A7796_CLK_S3D1),
-+	DEF_MOD("hscif4",		 516,	R8A7796_CLK_S3D1),
-+	DEF_MOD("hscif3",		 517,	R8A7796_CLK_S3D1),
-+	DEF_MOD("hscif2",		 518,	R8A7796_CLK_S3D1),
-+	DEF_MOD("hscif1",		 519,	R8A7796_CLK_S3D1),
-+	DEF_MOD("hscif0",		 520,	R8A7796_CLK_S3D1),
- 	DEF_MOD("thermal",		 522,	R8A7796_CLK_CP),
- 	DEF_MOD("etheravb",		 812,	R8A7796_CLK_S0D6),
- 	DEF_MOD("gpio7",		 905,	R8A7796_CLK_S3D4),
diff --git a/patches.renesas/0161-clk-renesas-rcar-gen3-cpg-Add-support-for-RCLK-on-R-.patch b/patches.renesas/0161-clk-renesas-rcar-gen3-cpg-Add-support-for-RCLK-on-R-.patch
deleted file mode 100644
index da70a3f06aa909..00000000000000
--- a/patches.renesas/0161-clk-renesas-rcar-gen3-cpg-Add-support-for-RCLK-on-R-.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 2a431d2d667268c052381ca56a0d7f4033cce70a Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 10 Mar 2017 12:13:37 +0100
-Subject: [PATCH 161/286] clk: renesas: rcar-gen3-cpg: Add support for RCLK on
- R-Car H3 ES2.0
-
-Starting with R-Car H3 ES2.0, the parent of RCLK is selected using MD28.
-
-Add support for that, but retain the old behavior for R-Car H3 ES1.x and
-M3-W ES1.0 using a quirk.
-
-Inspired by a patch by Takeshi Kihara in the BSP.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-(cherry picked from commit bb1953067c05be30a605ee1d5b05a2677735bb37)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/rcar-gen3-cpg.c |   36 ++++++++++++++++++++++++++----------
- 1 file changed, 26 insertions(+), 10 deletions(-)
-
---- a/drivers/clk/renesas/rcar-gen3-cpg.c
-+++ b/drivers/clk/renesas/rcar-gen3-cpg.c
-@@ -252,11 +252,20 @@ static u32 cpg_mode __initdata;
- static u32 cpg_quirks __initdata;
- 
- #define PLL_ERRATA	BIT(0)		/* Missing PLL0/2/4 post-divider */
-+#define RCKCR_CKSEL	BIT(1)		/* Manual RCLK parent selection */
- 
- static const struct soc_device_attribute cpg_quirks_match[] __initconst = {
- 	{
- 		.soc_id = "r8a7795", .revision = "ES1.0",
--		.data = (void *)PLL_ERRATA,
-+		.data = (void *)(PLL_ERRATA | RCKCR_CKSEL),
-+	},
-+	{
-+		.soc_id = "r8a7795", .revision = "ES1.*",
-+		.data = (void *)RCKCR_CKSEL,
-+	},
-+	{
-+		.soc_id = "r8a7796", .revision = "ES1.0",
-+		.data = (void *)RCKCR_CKSEL,
- 	},
- 	{ /* sentinel */ }
- };
-@@ -330,18 +339,25 @@ struct clk * __init rcar_gen3_cpg_clk_re
- 		return cpg_sd_clk_register(core, base, __clk_get_name(parent));
- 
- 	case CLK_TYPE_GEN3_R:
--		/*
--		 * RINT is default.
--		 * Only if EXTALR is populated, we switch to it.
--		 */
--		value = readl(base + CPG_RCKCR) & 0x3f;
-+		if (cpg_quirks & RCKCR_CKSEL) {
-+			/*
-+			 * RINT is default.
-+			 * Only if EXTALR is populated, we switch to it.
-+			 */
-+			value = readl(base + CPG_RCKCR) & 0x3f;
-+
-+			if (clk_get_rate(clks[cpg_clk_extalr])) {
-+				parent = clks[cpg_clk_extalr];
-+				value |= BIT(15);
-+			}
- 
--		if (clk_get_rate(clks[cpg_clk_extalr])) {
--			parent = clks[cpg_clk_extalr];
--			value |= BIT(15);
-+			writel(value, base + CPG_RCKCR);
-+			break;
- 		}
- 
--		writel(value, base + CPG_RCKCR);
-+		/* Select parent clock of RCLK by MD28 */
-+		if (cpg_mode & BIT(28))
-+			parent = clks[cpg_clk_extalr];
- 		break;
- 
- 	default:
diff --git a/patches.renesas/0161-pinctrl-sh-pfc-r8a7796-Add-drive-strength-support.patch b/patches.renesas/0161-pinctrl-sh-pfc-r8a7796-Add-drive-strength-support.patch
deleted file mode 100644
index 4121bf954a73d2..00000000000000
--- a/patches.renesas/0161-pinctrl-sh-pfc-r8a7796-Add-drive-strength-support.patch
+++ /dev/null
@@ -1,429 +0,0 @@
-From 422f62aa2ce7de207b46a43f0b5bbec82833a637 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Thu, 17 Nov 2016 16:09:19 +0100
-Subject: [PATCH 161/255] pinctrl: sh-pfc: r8a7796: Add drive strength support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Define the drive strength registers for the R8A7796. Add pins which are
-not part of a GPIO bank nor can be muxed between different functions but
-which still allow for their drive-strength to be configured.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 9e35d6fa825c02bdd00c24cb32299355702130bd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7796.c |  359 +++++++++++++++++++++++++++++++++--
- 1 file changed, 347 insertions(+), 12 deletions(-)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-@@ -19,19 +19,21 @@
- #include "core.h"
- #include "sh_pfc.h"
- 
-+#define CFG_FLAGS SH_PFC_PIN_CFG_DRIVE_STRENGTH
-+
- #define CPU_ALL_PORT(fn, sfx)						\
--	PORT_GP_16(0, fn, sfx),						\
--	PORT_GP_29(1, fn, sfx),						\
--	PORT_GP_15(2, fn, sfx),						\
--	PORT_GP_CFG_12(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),		\
--	PORT_GP_1(3, 12, fn, sfx),					\
--	PORT_GP_1(3, 13, fn, sfx),					\
--	PORT_GP_1(3, 14, fn, sfx),					\
--	PORT_GP_1(3, 15, fn, sfx),					\
--	PORT_GP_CFG_18(4, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),		\
--	PORT_GP_26(5, fn, sfx),						\
--	PORT_GP_32(6, fn, sfx),						\
--	PORT_GP_4(7, fn, sfx)
-+	PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE),	\
-+	PORT_GP_CFG_1(3, 12, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_1(3, 13, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_1(3, 14, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_1(3, 15, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_18(4, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE),	\
-+	PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_4(7, fn, sfx, CFG_FLAGS)
- /*
-  * F_() : just information
-  * FM() : macro for FN_xxx / xxx_MARK
-@@ -541,6 +543,23 @@ MOD_SEL0_2		MOD_SEL1_2 \
- 			MOD_SEL1_1 \
- 			MOD_SEL1_0		MOD_SEL2_0
- 
-+/*
-+ * These pins are not able to be muxed but have other properties
-+ * that can be set, such as drive-strength or pull-up/pull-down enable.
-+ */
-+#define PINMUX_STATIC \
-+	FM(QSPI0_SPCLK) FM(QSPI0_SSL) FM(QSPI0_MOSI_IO0) FM(QSPI0_MISO_IO1) \
-+	FM(QSPI0_IO2) FM(QSPI0_IO3) \
-+	FM(QSPI1_SPCLK) FM(QSPI1_SSL) FM(QSPI1_MOSI_IO0) FM(QSPI1_MISO_IO1) \
-+	FM(QSPI1_IO2) FM(QSPI1_IO3) \
-+	FM(RPC_INT) FM(RPC_WP) FM(RPC_RESET) \
-+	FM(AVB_TX_CTL) FM(AVB_TXC) FM(AVB_TD0) FM(AVB_TD1) FM(AVB_TD2) FM(AVB_TD3) \
-+	FM(AVB_RX_CTL) FM(AVB_RXC) FM(AVB_RD0) FM(AVB_RD1) FM(AVB_RD2) FM(AVB_RD3) \
-+	FM(AVB_TXCREFCLK) FM(AVB_MDIO) \
-+	FM(PRESETOUT) \
-+	FM(DU_DOTCLKIN0) FM(DU_DOTCLKIN1) FM(DU_DOTCLKIN2) \
-+	FM(TMS) FM(TDO) FM(ASEBRK) FM(MLB_REF)
-+
- enum {
- 	PINMUX_RESERVED = 0,
- 
-@@ -565,6 +584,7 @@ enum {
- 	PINMUX_GPSR
- 	PINMUX_IPSR
- 	PINMUX_MOD_SELS
-+	PINMUX_STATIC
- 	PINMUX_MARK_END,
- #undef F_
- #undef FM
-@@ -1484,10 +1504,76 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_NOGP(0,		I2C_SEL_0_1),
- 	PINMUX_IPSR_NOGP(0,		I2C_SEL_3_1),
- 	PINMUX_IPSR_NOGP(0,		I2C_SEL_5_1),
-+
-+/*
-+ * Static pins can not be muxed between different functions but
-+ * still needs a mark entry in the pinmux list. Add each static
-+ * pin to the list without an associated function. The sh-pfc
-+ * core will do the right thing and skip trying to mux then pin
-+ * while still applying configuration to it
-+ */
-+#define FM(x)   PINMUX_DATA(x##_MARK, 0),
-+	PINMUX_STATIC
-+#undef FM
- };
- 
-+/*
-+ * R8A7796 has 8 banks with 32 GPIOs in each => 256 GPIOs.
-+ * Physical layout rows: A - AW, cols: 1 - 39.
-+ */
-+#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r))
-+#define PIN_NUMBER(r, c) (((r) - 'A') * 39 + (c) + 300)
-+#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c)
-+
- static const struct sh_pfc_pin pinmux_pins[] = {
- 	PINMUX_GPIO_GP_ALL(),
-+
-+	/*
-+	 * Pins not associated with a GPIO port.
-+	 *
-+	 * The pin positions are different between different r8a7796
-+	 * packages, all that is needed for the pfc driver is a unique
-+	 * number for each pin. To this end use the pin layout from
-+	 * R-Car M3SiP to calculate a unique number for each pin.
-+	 */
-+	SH_PFC_PIN_NAMED_CFG('A',  8, AVB_TX_CTL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A',  9, AVB_MDIO, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('C',  1, PRESETOUT#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('V',  3, QSPI1_SPCLK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('V',  5, QSPI1_SSL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('V',  6, RPC_WP#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('V',  7, RPC_RESET#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('W',  3, QSPI0_SPCLK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('Y',  3, QSPI0_SSL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('Y',  6, QSPI0_IO2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('Y',  7, RPC_INT#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'),  4, QSPI0_MISO_IO1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'),  6, QSPI0_IO3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  3, QSPI1_IO3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  5, QSPI0_MOSI_IO0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  7, QSPI1_MOSI_IO0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'),  4, QSPI1_IO2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'),  5, QSPI1_MISO_IO1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'),  7, DU_DOTCLKIN0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'),  8, DU_DOTCLKIN1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'),  8, DU_DOTCLKIN2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 28, TDO, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
- };
- 
- /* - EtherAVB --------------------------------------------------------------- */
-@@ -3187,6 +3273,254 @@ static const struct pinmux_cfg_reg pinmu
- 	{ },
- };
- 
-+static const struct pinmux_drive_reg pinmux_drive_regs[] = {
-+	{ PINMUX_DRIVE_REG("DRVCTRL0", 0xe6060300) {
-+		{ PIN_NUMBER('W', 3),   28, 2 },	/* QSPI0_SPCLK */
-+		{ PIN_A_NUMBER('C', 5), 24, 2 },	/* QSPI0_MOSI_IO0 */
-+		{ PIN_A_NUMBER('B', 4), 20, 2 },	/* QSPI0_MISO_IO1 */
-+		{ PIN_NUMBER('Y', 6),   16, 2 },	/* QSPI0_IO2 */
-+		{ PIN_A_NUMBER('B', 6), 12, 2 },	/* QSPI0_IO3 */
-+		{ PIN_NUMBER('Y', 3),    8, 2 },	/* QSPI0_SSL */
-+		{ PIN_NUMBER('V', 3),    4, 2 },	/* QSPI1_SPCLK */
-+		{ PIN_A_NUMBER('C', 7),  0, 2 },	/* QSPI1_MOSI_IO0 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL1", 0xe6060304) {
-+		{ PIN_A_NUMBER('E', 5), 28, 2 },	/* QSPI1_MISO_IO1 */
-+		{ PIN_A_NUMBER('E', 4), 24, 2 },	/* QSPI1_IO2 */
-+		{ PIN_A_NUMBER('C', 3), 20, 2 },	/* QSPI1_IO3 */
-+		{ PIN_NUMBER('V', 5),   16, 2 },	/* QSPI1_SSL */
-+		{ PIN_NUMBER('Y', 7),   12, 2 },	/* RPC_INT# */
-+		{ PIN_NUMBER('V', 6),    8, 2 },	/* RPC_WP# */
-+		{ PIN_NUMBER('V', 7),    4, 2 },	/* RPC_RESET# */
-+		{ PIN_NUMBER('A', 16),   0, 3 },	/* AVB_RX_CTL */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL2", 0xe6060308) {
-+		{ PIN_NUMBER('B', 19),  28, 3 },	/* AVB_RXC */
-+		{ PIN_NUMBER('A', 13),  24, 3 },	/* AVB_RD0 */
-+		{ PIN_NUMBER('B', 13),  20, 3 },	/* AVB_RD1 */
-+		{ PIN_NUMBER('A', 14),  16, 3 },	/* AVB_RD2 */
-+		{ PIN_NUMBER('B', 14),  12, 3 },	/* AVB_RD3 */
-+		{ PIN_NUMBER('A', 8),    8, 3 },	/* AVB_TX_CTL */
-+		{ PIN_NUMBER('A', 19),   4, 3 },	/* AVB_TXC */
-+		{ PIN_NUMBER('A', 18),   0, 3 },	/* AVB_TD0 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL3", 0xe606030c) {
-+		{ PIN_NUMBER('B', 18),  28, 3 },	/* AVB_TD1 */
-+		{ PIN_NUMBER('A', 17),  24, 3 },	/* AVB_TD2 */
-+		{ PIN_NUMBER('B', 17),  20, 3 },	/* AVB_TD3 */
-+		{ PIN_NUMBER('A', 12),  16, 3 },	/* AVB_TXCREFCLK */
-+		{ PIN_NUMBER('A', 9),   12, 3 },	/* AVB_MDIO */
-+		{ RCAR_GP_PIN(2,  9),    8, 3 },	/* AVB_MDC */
-+		{ RCAR_GP_PIN(2, 10),    4, 3 },	/* AVB_MAGIC */
-+		{ RCAR_GP_PIN(2, 11),    0, 3 },	/* AVB_PHY_INT */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL4", 0xe6060310) {
-+		{ RCAR_GP_PIN(2, 12), 28, 3 },	/* AVB_LINK */
-+		{ RCAR_GP_PIN(2, 13), 24, 3 },	/* AVB_AVTP_MATCH */
-+		{ RCAR_GP_PIN(2, 14), 20, 3 },	/* AVB_AVTP_CAPTURE */
-+		{ RCAR_GP_PIN(2,  0), 16, 3 },	/* IRQ0 */
-+		{ RCAR_GP_PIN(2,  1), 12, 3 },	/* IRQ1 */
-+		{ RCAR_GP_PIN(2,  2),  8, 3 },	/* IRQ2 */
-+		{ RCAR_GP_PIN(2,  3),  4, 3 },	/* IRQ3 */
-+		{ RCAR_GP_PIN(2,  4),  0, 3 },	/* IRQ4 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL5", 0xe6060314) {
-+		{ RCAR_GP_PIN(2,  5), 28, 3 },	/* IRQ5 */
-+		{ RCAR_GP_PIN(2,  6), 24, 3 },	/* PWM0 */
-+		{ RCAR_GP_PIN(2,  7), 20, 3 },	/* PWM1 */
-+		{ RCAR_GP_PIN(2,  8), 16, 3 },	/* PWM2 */
-+		{ RCAR_GP_PIN(1,  0), 12, 3 },	/* A0 */
-+		{ RCAR_GP_PIN(1,  1),  8, 3 },	/* A1 */
-+		{ RCAR_GP_PIN(1,  2),  4, 3 },	/* A2 */
-+		{ RCAR_GP_PIN(1,  3),  0, 3 },	/* A3 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL6", 0xe6060318) {
-+		{ RCAR_GP_PIN(1,  4), 28, 3 },	/* A4 */
-+		{ RCAR_GP_PIN(1,  5), 24, 3 },	/* A5 */
-+		{ RCAR_GP_PIN(1,  6), 20, 3 },	/* A6 */
-+		{ RCAR_GP_PIN(1,  7), 16, 3 },	/* A7 */
-+		{ RCAR_GP_PIN(1,  8), 12, 3 },	/* A8 */
-+		{ RCAR_GP_PIN(1,  9),  8, 3 },	/* A9 */
-+		{ RCAR_GP_PIN(1, 10),  4, 3 },	/* A10 */
-+		{ RCAR_GP_PIN(1, 11),  0, 3 },	/* A11 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL7", 0xe606031c) {
-+		{ RCAR_GP_PIN(1, 12), 28, 3 },	/* A12 */
-+		{ RCAR_GP_PIN(1, 13), 24, 3 },	/* A13 */
-+		{ RCAR_GP_PIN(1, 14), 20, 3 },	/* A14 */
-+		{ RCAR_GP_PIN(1, 15), 16, 3 },	/* A15 */
-+		{ RCAR_GP_PIN(1, 16), 12, 3 },	/* A16 */
-+		{ RCAR_GP_PIN(1, 17),  8, 3 },	/* A17 */
-+		{ RCAR_GP_PIN(1, 18),  4, 3 },	/* A18 */
-+		{ RCAR_GP_PIN(1, 19),  0, 3 },	/* A19 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL8", 0xe6060320) {
-+		{ RCAR_GP_PIN(1, 28), 28, 3 },	/* CLKOUT */
-+		{ RCAR_GP_PIN(1, 20), 24, 3 },	/* CS0 */
-+		{ RCAR_GP_PIN(1, 21), 20, 3 },	/* CS1_A26 */
-+		{ RCAR_GP_PIN(1, 22), 16, 3 },	/* BS */
-+		{ RCAR_GP_PIN(1, 23), 12, 3 },	/* RD */
-+		{ RCAR_GP_PIN(1, 24),  8, 3 },	/* RD_WR */
-+		{ RCAR_GP_PIN(1, 25),  4, 3 },	/* WE0 */
-+		{ RCAR_GP_PIN(1, 26),  0, 3 },	/* WE1 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL9", 0xe6060324) {
-+		{ RCAR_GP_PIN(1, 27), 28, 3 },	/* EX_WAIT0 */
-+		{ PIN_NUMBER('C', 1), 24, 3 },	/* PRESETOUT# */
-+		{ RCAR_GP_PIN(0,  0), 20, 3 },	/* D0 */
-+		{ RCAR_GP_PIN(0,  1), 16, 3 },	/* D1 */
-+		{ RCAR_GP_PIN(0,  2), 12, 3 },	/* D2 */
-+		{ RCAR_GP_PIN(0,  3),  8, 3 },	/* D3 */
-+		{ RCAR_GP_PIN(0,  4),  4, 3 },	/* D4 */
-+		{ RCAR_GP_PIN(0,  5),  0, 3 },	/* D5 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL10", 0xe6060328) {
-+		{ RCAR_GP_PIN(0,  6), 28, 3 },	/* D6 */
-+		{ RCAR_GP_PIN(0,  7), 24, 3 },	/* D7 */
-+		{ RCAR_GP_PIN(0,  8), 20, 3 },	/* D8 */
-+		{ RCAR_GP_PIN(0,  9), 16, 3 },	/* D9 */
-+		{ RCAR_GP_PIN(0, 10), 12, 3 },	/* D10 */
-+		{ RCAR_GP_PIN(0, 11),  8, 3 },	/* D11 */
-+		{ RCAR_GP_PIN(0, 12),  4, 3 },	/* D12 */
-+		{ RCAR_GP_PIN(0, 13),  0, 3 },	/* D13 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL11", 0xe606032c) {
-+		{ RCAR_GP_PIN(0, 14),   28, 3 },	/* D14 */
-+		{ RCAR_GP_PIN(0, 15),   24, 3 },	/* D15 */
-+		{ RCAR_GP_PIN(7,  0),   20, 3 },	/* AVS1 */
-+		{ RCAR_GP_PIN(7,  1),   16, 3 },	/* AVS2 */
-+		{ RCAR_GP_PIN(7,  2),   12, 3 },	/* HDMI0_CEC */
-+		{ RCAR_GP_PIN(7,  3),    8, 3 },	/* GP7_03 */
-+		{ PIN_A_NUMBER('P', 7),  4, 2 },	/* DU_DOTCLKIN0 */
-+		{ PIN_A_NUMBER('P', 8),  0, 2 },	/* DU_DOTCLKIN1 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL12", 0xe6060330) {
-+		{ PIN_A_NUMBER('R', 8),  28, 2 },	/* DU_DOTCLKIN2 */
-+		{ PIN_A_NUMBER('D', 38), 20, 2 },	/* FSCLKST */
-+		{ PIN_A_NUMBER('R', 30),  4, 2 },	/* TMS */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL13", 0xe6060334) {
-+		{ PIN_A_NUMBER('T', 28), 28, 2 },	/* TDO */
-+		{ PIN_A_NUMBER('T', 30), 24, 2 },	/* ASEBRK */
-+		{ RCAR_GP_PIN(3,  0),    20, 3 },	/* SD0_CLK */
-+		{ RCAR_GP_PIN(3,  1),    16, 3 },	/* SD0_CMD */
-+		{ RCAR_GP_PIN(3,  2),    12, 3 },	/* SD0_DAT0 */
-+		{ RCAR_GP_PIN(3,  3),     8, 3 },	/* SD0_DAT1 */
-+		{ RCAR_GP_PIN(3,  4),     4, 3 },	/* SD0_DAT2 */
-+		{ RCAR_GP_PIN(3,  5),     0, 3 },	/* SD0_DAT3 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL14", 0xe6060338) {
-+		{ RCAR_GP_PIN(3,  6), 28, 3 },	/* SD1_CLK */
-+		{ RCAR_GP_PIN(3,  7), 24, 3 },	/* SD1_CMD */
-+		{ RCAR_GP_PIN(3,  8), 20, 3 },	/* SD1_DAT0 */
-+		{ RCAR_GP_PIN(3,  9), 16, 3 },	/* SD1_DAT1 */
-+		{ RCAR_GP_PIN(3, 10), 12, 3 },	/* SD1_DAT2 */
-+		{ RCAR_GP_PIN(3, 11),  8, 3 },	/* SD1_DAT3 */
-+		{ RCAR_GP_PIN(4,  0),  4, 3 },	/* SD2_CLK */
-+		{ RCAR_GP_PIN(4,  1),  0, 3 },	/* SD2_CMD */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL15", 0xe606033c) {
-+		{ RCAR_GP_PIN(4,  2), 28, 3 },	/* SD2_DAT0 */
-+		{ RCAR_GP_PIN(4,  3), 24, 3 },	/* SD2_DAT1 */
-+		{ RCAR_GP_PIN(4,  4), 20, 3 },	/* SD2_DAT2 */
-+		{ RCAR_GP_PIN(4,  5), 16, 3 },	/* SD2_DAT3 */
-+		{ RCAR_GP_PIN(4,  6), 12, 3 },	/* SD2_DS */
-+		{ RCAR_GP_PIN(4,  7),  8, 3 },	/* SD3_CLK */
-+		{ RCAR_GP_PIN(4,  8),  4, 3 },	/* SD3_CMD */
-+		{ RCAR_GP_PIN(4,  9),  0, 3 },	/* SD3_DAT0 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL16", 0xe6060340) {
-+		{ RCAR_GP_PIN(4, 10), 28, 3 },	/* SD3_DAT1 */
-+		{ RCAR_GP_PIN(4, 11), 24, 3 },	/* SD3_DAT2 */
-+		{ RCAR_GP_PIN(4, 12), 20, 3 },	/* SD3_DAT3 */
-+		{ RCAR_GP_PIN(4, 13), 16, 3 },	/* SD3_DAT4 */
-+		{ RCAR_GP_PIN(4, 14), 12, 3 },	/* SD3_DAT5 */
-+		{ RCAR_GP_PIN(4, 15),  8, 3 },	/* SD3_DAT6 */
-+		{ RCAR_GP_PIN(4, 16),  4, 3 },	/* SD3_DAT7 */
-+		{ RCAR_GP_PIN(4, 17),  0, 3 },	/* SD3_DS */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL17", 0xe6060344) {
-+		{ RCAR_GP_PIN(3, 12), 28, 3 },	/* SD0_CD */
-+		{ RCAR_GP_PIN(3, 13), 24, 3 },	/* SD0_WP */
-+		{ RCAR_GP_PIN(3, 14), 20, 3 },	/* SD1_CD */
-+		{ RCAR_GP_PIN(3, 15), 16, 3 },	/* SD1_WP */
-+		{ RCAR_GP_PIN(5,  0), 12, 3 },	/* SCK0 */
-+		{ RCAR_GP_PIN(5,  1),  8, 3 },	/* RX0 */
-+		{ RCAR_GP_PIN(5,  2),  4, 3 },	/* TX0 */
-+		{ RCAR_GP_PIN(5,  3),  0, 3 },	/* CTS0 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL18", 0xe6060348) {
-+		{ RCAR_GP_PIN(5,  4), 28, 3 },	/* RTS0_TANS */
-+		{ RCAR_GP_PIN(5,  5), 24, 3 },	/* RX1 */
-+		{ RCAR_GP_PIN(5,  6), 20, 3 },	/* TX1 */
-+		{ RCAR_GP_PIN(5,  7), 16, 3 },	/* CTS1 */
-+		{ RCAR_GP_PIN(5,  8), 12, 3 },	/* RTS1_TANS */
-+		{ RCAR_GP_PIN(5,  9),  8, 3 },	/* SCK2 */
-+		{ RCAR_GP_PIN(5, 10),  4, 3 },	/* TX2 */
-+		{ RCAR_GP_PIN(5, 11),  0, 3 },	/* RX2 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL19", 0xe606034c) {
-+		{ RCAR_GP_PIN(5, 12), 28, 3 },	/* HSCK0 */
-+		{ RCAR_GP_PIN(5, 13), 24, 3 },	/* HRX0 */
-+		{ RCAR_GP_PIN(5, 14), 20, 3 },	/* HTX0 */
-+		{ RCAR_GP_PIN(5, 15), 16, 3 },	/* HCTS0 */
-+		{ RCAR_GP_PIN(5, 16), 12, 3 },	/* HRTS0 */
-+		{ RCAR_GP_PIN(5, 17),  8, 3 },	/* MSIOF0_SCK */
-+		{ RCAR_GP_PIN(5, 18),  4, 3 },	/* MSIOF0_SYNC */
-+		{ RCAR_GP_PIN(5, 19),  0, 3 },	/* MSIOF0_SS1 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL20", 0xe6060350) {
-+		{ RCAR_GP_PIN(5, 20), 28, 3 },	/* MSIOF0_TXD */
-+		{ RCAR_GP_PIN(5, 21), 24, 3 },	/* MSIOF0_SS2 */
-+		{ RCAR_GP_PIN(5, 22), 20, 3 },	/* MSIOF0_RXD */
-+		{ RCAR_GP_PIN(5, 23), 16, 3 },	/* MLB_CLK */
-+		{ RCAR_GP_PIN(5, 24), 12, 3 },	/* MLB_SIG */
-+		{ RCAR_GP_PIN(5, 25),  8, 3 },	/* MLB_DAT */
-+		{ PIN_NUMBER('H', 37),  4, 3 },	/* MLB_REF */
-+		{ RCAR_GP_PIN(6,  0),  0, 3 },	/* SSI_SCK01239 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL21", 0xe6060354) {
-+		{ RCAR_GP_PIN(6,  1), 28, 3 },	/* SSI_WS01239 */
-+		{ RCAR_GP_PIN(6,  2), 24, 3 },	/* SSI_SDATA0 */
-+		{ RCAR_GP_PIN(6,  3), 20, 3 },	/* SSI_SDATA1 */
-+		{ RCAR_GP_PIN(6,  4), 16, 3 },	/* SSI_SDATA2 */
-+		{ RCAR_GP_PIN(6,  5), 12, 3 },	/* SSI_SCK34 */
-+		{ RCAR_GP_PIN(6,  6),  8, 3 },	/* SSI_WS34 */
-+		{ RCAR_GP_PIN(6,  7),  4, 3 },	/* SSI_SDATA3 */
-+		{ RCAR_GP_PIN(6,  8),  0, 3 },	/* SSI_SCK4 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL22", 0xe6060358) {
-+		{ RCAR_GP_PIN(6,  9), 28, 3 },	/* SSI_WS4 */
-+		{ RCAR_GP_PIN(6, 10), 24, 3 },	/* SSI_SDATA4 */
-+		{ RCAR_GP_PIN(6, 11), 20, 3 },	/* SSI_SCK5 */
-+		{ RCAR_GP_PIN(6, 12), 16, 3 },	/* SSI_WS5 */
-+		{ RCAR_GP_PIN(6, 13), 12, 3 },	/* SSI_SDATA5 */
-+		{ RCAR_GP_PIN(6, 14),  8, 3 },	/* SSI_SCK6 */
-+		{ RCAR_GP_PIN(6, 15),  4, 3 },	/* SSI_WS6 */
-+		{ RCAR_GP_PIN(6, 16),  0, 3 },	/* SSI_SDATA6 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL23", 0xe606035c) {
-+		{ RCAR_GP_PIN(6, 17), 28, 3 },	/* SSI_SCK78 */
-+		{ RCAR_GP_PIN(6, 18), 24, 3 },	/* SSI_WS78 */
-+		{ RCAR_GP_PIN(6, 19), 20, 3 },	/* SSI_SDATA7 */
-+		{ RCAR_GP_PIN(6, 20), 16, 3 },	/* SSI_SDATA8 */
-+		{ RCAR_GP_PIN(6, 21), 12, 3 },	/* SSI_SDATA9 */
-+		{ RCAR_GP_PIN(6, 22),  8, 3 },	/* AUDIO_CLKA */
-+		{ RCAR_GP_PIN(6, 23),  4, 3 },	/* AUDIO_CLKB */
-+		{ RCAR_GP_PIN(6, 24),  0, 3 },	/* USB0_PWEN */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL24", 0xe6060360) {
-+		{ RCAR_GP_PIN(6, 25), 28, 3 },	/* USB0_OVC */
-+		{ RCAR_GP_PIN(6, 26), 24, 3 },	/* USB1_PWEN */
-+		{ RCAR_GP_PIN(6, 27), 20, 3 },	/* USB1_OVC */
-+		{ RCAR_GP_PIN(6, 28), 16, 3 },	/* USB30_PWEN */
-+		{ RCAR_GP_PIN(6, 29), 12, 3 },	/* USB30_OVC */
-+		{ RCAR_GP_PIN(6, 30),  8, 3 },	/* GP6_30 */
-+		{ RCAR_GP_PIN(6, 31),  4, 3 },	/* GP6_31 */
-+	} },
-+	{ },
-+};
-+
- static int r8a7796_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl)
- {
- 	int bit = -EINVAL;
-@@ -3221,6 +3555,7 @@ const struct sh_pfc_soc_info r8a7796_pin
- 	.nr_functions = ARRAY_SIZE(pinmux_functions),
- 
- 	.cfg_regs = pinmux_config_regs,
-+	.drive_regs = pinmux_drive_regs,
- 
- 	.pinmux_data = pinmux_data,
- 	.pinmux_data_size = ARRAY_SIZE(pinmux_data),
diff --git a/patches.renesas/0162-clk-renesas-r8a7796-Add-I2C-clocks.patch b/patches.renesas/0162-clk-renesas-r8a7796-Add-I2C-clocks.patch
deleted file mode 100644
index 5ddbd8beede8d6..00000000000000
--- a/patches.renesas/0162-clk-renesas-r8a7796-Add-I2C-clocks.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 2db9e0de365e2d7949b041cb633a78e49b155db2 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Wed, 14 Sep 2016 18:46:07 +0200
-Subject: [PATCH 162/299] clk: renesas: r8a7796: Add I2C clocks
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 878f8baa02d4948637c1e0b41a6055b22eb1f4a5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -143,6 +143,13 @@ static const struct mssr_mod_clk r8a7796
- 	DEF_MOD("gpio2",		 910,	R8A7796_CLK_S3D4),
- 	DEF_MOD("gpio1",		 911,	R8A7796_CLK_S3D4),
- 	DEF_MOD("gpio0",		 912,	R8A7796_CLK_S3D4),
-+	DEF_MOD("i2c6",			 918,	R8A7796_CLK_S0D6),
-+	DEF_MOD("i2c5",			 919,	R8A7796_CLK_S0D6),
-+	DEF_MOD("i2c4",			 927,	R8A7796_CLK_S0D6),
-+	DEF_MOD("i2c3",			 928,	R8A7796_CLK_S0D6),
-+	DEF_MOD("i2c2",			 929,	R8A7796_CLK_S3D2),
-+	DEF_MOD("i2c1",			 930,	R8A7796_CLK_S3D2),
-+	DEF_MOD("i2c0",			 931,	R8A7796_CLK_S3D2),
- };
- 
- static const unsigned int r8a7796_crit_mod_clks[] __initconst = {
diff --git a/patches.renesas/0162-pinctrl-sh-pfc-r8a7796-Add-bias-pinconf-support.patch b/patches.renesas/0162-pinctrl-sh-pfc-r8a7796-Add-bias-pinconf-support.patch
deleted file mode 100644
index 09a78f5cd53f64..00000000000000
--- a/patches.renesas/0162-pinctrl-sh-pfc-r8a7796-Add-bias-pinconf-support.patch
+++ /dev/null
@@ -1,407 +0,0 @@
-From f025272c413eecc7dc20adf0c73a08ca620924f2 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Thu, 17 Nov 2016 16:09:20 +0100
-Subject: [PATCH 162/255] pinctrl: sh-pfc: r8a7796: Add bias pinconf support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Implements pull-up and pull-down. On this SoC there is no simple mapping
-of GP pins to bias register bits, so we need a table.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 2d40bd24274d257796291804a82a0b07564a11f1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7796.c |  354 +++++++++++++++++++++++++++++++----
- 1 file changed, 315 insertions(+), 39 deletions(-)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-@@ -19,7 +19,9 @@
- #include "core.h"
- #include "sh_pfc.h"
- 
--#define CFG_FLAGS SH_PFC_PIN_CFG_DRIVE_STRENGTH
-+#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | \
-+		   SH_PFC_PIN_CFG_PULL_UP | \
-+		   SH_PFC_PIN_CFG_PULL_DOWN)
- 
- #define CPU_ALL_PORT(fn, sfx)						\
- 	PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS),	\
-@@ -558,7 +560,7 @@ MOD_SEL0_2		MOD_SEL1_2 \
- 	FM(AVB_TXCREFCLK) FM(AVB_MDIO) \
- 	FM(PRESETOUT) \
- 	FM(DU_DOTCLKIN0) FM(DU_DOTCLKIN1) FM(DU_DOTCLKIN2) \
--	FM(TMS) FM(TDO) FM(ASEBRK) FM(MLB_REF)
-+	FM(TMS) FM(TDO) FM(ASEBRK) FM(MLB_REF) FM(TDI) FM(TCK) FM(TRST) FM(EXTALR)
- 
- enum {
- 	PINMUX_RESERVED = 0,
-@@ -1536,44 +1538,48 @@ static const struct sh_pfc_pin pinmux_pi
- 	 * number for each pin. To this end use the pin layout from
- 	 * R-Car M3SiP to calculate a unique number for each pin.
- 	 */
--	SH_PFC_PIN_NAMED_CFG('A',  8, AVB_TX_CTL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A',  9, AVB_MDIO, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('C',  1, PRESETOUT#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('V',  3, QSPI1_SPCLK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('V',  5, QSPI1_SSL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('V',  6, RPC_WP#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('V',  7, RPC_RESET#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('W',  3, QSPI0_SPCLK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('Y',  3, QSPI0_SSL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('Y',  6, QSPI0_IO2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('Y',  7, RPC_INT#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'),  4, QSPI0_MISO_IO1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'),  6, QSPI0_IO3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  3, QSPI1_IO3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  5, QSPI0_MOSI_IO0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  7, QSPI1_MOSI_IO0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'),  4, QSPI1_IO2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'),  5, QSPI1_MISO_IO1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'),  7, DU_DOTCLKIN0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'),  8, DU_DOTCLKIN1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'),  8, DU_DOTCLKIN2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A',  8, AVB_TX_CTL, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A',  9, AVB_MDIO, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('C',  1, PRESETOUT#, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('V',  3, QSPI1_SPCLK, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('V',  5, QSPI1_SSL, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('V',  6, RPC_WP#, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('V',  7, RPC_RESET#, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('W',  3, QSPI0_SPCLK, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('Y',  3, QSPI0_SSL, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('Y',  6, QSPI0_IO2, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('Y',  7, RPC_INT#, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'),  4, QSPI0_MISO_IO1, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'),  6, QSPI0_IO3, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  3, QSPI1_IO3, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  5, QSPI0_MOSI_IO0, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  7, QSPI1_MOSI_IO0, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 39, EXTALR, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'),  4, QSPI1_IO2, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'),  5, QSPI1_MISO_IO1, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'),  7, DU_DOTCLKIN0, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'),  8, DU_DOTCLKIN1, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'),  8, DU_DOTCLKIN2, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 26, TRST#, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 29, TDI, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 27, TCK, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN),
- 	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 28, TDO, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS),
- };
- 
- /* - EtherAVB --------------------------------------------------------------- */
-@@ -3536,8 +3542,278 @@ static int r8a7796_pin_to_pocctrl(struct
- 	return bit;
- }
- 
-+#define PUEN	0xe6060400
-+#define PUD	0xe6060440
-+
-+#define PU0	0x00
-+#define PU1	0x04
-+#define PU2	0x08
-+#define PU3	0x0c
-+#define PU4	0x10
-+#define PU5	0x14
-+#define PU6	0x18
-+
-+static const struct sh_pfc_bias_info bias_info[] = {
-+	{ RCAR_GP_PIN(2, 11),    PU0, 31 },	/* AVB_PHY_INT */
-+	{ RCAR_GP_PIN(2, 10),    PU0, 30 },	/* AVB_MAGIC */
-+	{ RCAR_GP_PIN(2,  9),    PU0, 29 },	/* AVB_MDC */
-+	{ PIN_NUMBER('A', 9),    PU0, 28 },	/* AVB_MDIO */
-+	{ PIN_NUMBER('A', 12),   PU0, 27 },	/* AVB_TXCREFCLK */
-+	{ PIN_NUMBER('B', 17),   PU0, 26 },	/* AVB_TD3 */
-+	{ PIN_NUMBER('A', 17),   PU0, 25 },	/* AVB_TD2 */
-+	{ PIN_NUMBER('B', 18),   PU0, 24 },	/* AVB_TD1 */
-+	{ PIN_NUMBER('A', 18),   PU0, 23 },	/* AVB_TD0 */
-+	{ PIN_NUMBER('A', 19),   PU0, 22 },	/* AVB_TXC */
-+	{ PIN_NUMBER('A', 8),    PU0, 21 },	/* AVB_TX_CTL */
-+	{ PIN_NUMBER('B', 14),   PU0, 20 },	/* AVB_RD3 */
-+	{ PIN_NUMBER('A', 14),   PU0, 19 },	/* AVB_RD2 */
-+	{ PIN_NUMBER('B', 13),   PU0, 18 },	/* AVB_RD1 */
-+	{ PIN_NUMBER('A', 13),   PU0, 17 },	/* AVB_RD0 */
-+	{ PIN_NUMBER('B', 19),   PU0, 16 },	/* AVB_RXC */
-+	{ PIN_NUMBER('A', 16),   PU0, 15 },	/* AVB_RX_CTL */
-+	{ PIN_NUMBER('V', 7),    PU0, 14 },	/* RPC_RESET# */
-+	{ PIN_NUMBER('V', 6),    PU0, 13 },	/* RPC_WP# */
-+	{ PIN_NUMBER('Y', 7),    PU0, 12 },	/* RPC_INT# */
-+	{ PIN_NUMBER('V', 5),    PU0, 11 },	/* QSPI1_SSL */
-+	{ PIN_A_NUMBER('C', 3),  PU0, 10 },	/* QSPI1_IO3 */
-+	{ PIN_A_NUMBER('E', 4),  PU0,  9 },	/* QSPI1_IO2 */
-+	{ PIN_A_NUMBER('E', 5),  PU0,  8 },	/* QSPI1_MISO_IO1 */
-+	{ PIN_A_NUMBER('C', 7),  PU0,  7 },	/* QSPI1_MOSI_IO0 */
-+	{ PIN_NUMBER('V', 3),    PU0,  6 },	/* QSPI1_SPCLK */
-+	{ PIN_NUMBER('Y', 3),    PU0,  5 },	/* QSPI0_SSL */
-+	{ PIN_A_NUMBER('B', 6),  PU0,  4 },	/* QSPI0_IO3 */
-+	{ PIN_NUMBER('Y', 6),    PU0,  3 },	/* QSPI0_IO2 */
-+	{ PIN_A_NUMBER('B', 4),  PU0,  2 },	/* QSPI0_MISO_IO1 */
-+	{ PIN_A_NUMBER('C', 5),  PU0,  1 },	/* QSPI0_MOSI_IO0 */
-+	{ PIN_NUMBER('W', 3),    PU0,  0 },	/* QSPI0_SPCLK */
-+
-+	{ RCAR_GP_PIN(1, 19),    PU1, 31 },	/* A19 */
-+	{ RCAR_GP_PIN(1, 18),    PU1, 30 },	/* A18 */
-+	{ RCAR_GP_PIN(1, 17),    PU1, 29 },	/* A17 */
-+	{ RCAR_GP_PIN(1, 16),    PU1, 28 },	/* A16 */
-+	{ RCAR_GP_PIN(1, 15),    PU1, 27 },	/* A15 */
-+	{ RCAR_GP_PIN(1, 14),    PU1, 26 },	/* A14 */
-+	{ RCAR_GP_PIN(1, 13),    PU1, 25 },	/* A13 */
-+	{ RCAR_GP_PIN(1, 12),    PU1, 24 },	/* A12 */
-+	{ RCAR_GP_PIN(1, 11),    PU1, 23 },	/* A11 */
-+	{ RCAR_GP_PIN(1, 10),    PU1, 22 },	/* A10 */
-+	{ RCAR_GP_PIN(1,  9),    PU1, 21 },	/* A9 */
-+	{ RCAR_GP_PIN(1,  8),    PU1, 20 },	/* A8 */
-+	{ RCAR_GP_PIN(1,  7),    PU1, 19 },	/* A7 */
-+	{ RCAR_GP_PIN(1,  6),    PU1, 18 },	/* A6 */
-+	{ RCAR_GP_PIN(1,  5),    PU1, 17 },	/* A5 */
-+	{ RCAR_GP_PIN(1,  4),    PU1, 16 },	/* A4 */
-+	{ RCAR_GP_PIN(1,  3),    PU1, 15 },	/* A3 */
-+	{ RCAR_GP_PIN(1,  2),    PU1, 14 },	/* A2 */
-+	{ RCAR_GP_PIN(1,  1),    PU1, 13 },	/* A1 */
-+	{ RCAR_GP_PIN(1,  0),    PU1, 12 },	/* A0 */
-+	{ RCAR_GP_PIN(2,  8),    PU1, 11 },	/* PWM2_A */
-+	{ RCAR_GP_PIN(2,  7),    PU1, 10 },	/* PWM1_A */
-+	{ RCAR_GP_PIN(2,  6),    PU1,  9 },	/* PWM0 */
-+	{ RCAR_GP_PIN(2,  5),    PU1,  8 },	/* IRQ5 */
-+	{ RCAR_GP_PIN(2,  4),    PU1,  7 },	/* IRQ4 */
-+	{ RCAR_GP_PIN(2,  3),    PU1,  6 },	/* IRQ3 */
-+	{ RCAR_GP_PIN(2,  2),    PU1,  5 },	/* IRQ2 */
-+	{ RCAR_GP_PIN(2,  1),    PU1,  4 },	/* IRQ1 */
-+	{ RCAR_GP_PIN(2,  0),    PU1,  3 },	/* IRQ0 */
-+	{ RCAR_GP_PIN(2, 14),    PU1,  2 },	/* AVB_AVTP_CAPTURE_A */
-+	{ RCAR_GP_PIN(2, 13),    PU1,  1 },	/* AVB_AVTP_MATCH_A */
-+	{ RCAR_GP_PIN(2, 12),    PU1,  0 },	/* AVB_LINK */
-+
-+	{ PIN_A_NUMBER('P', 8),  PU2, 31 },	/* DU_DOTCLKIN1 */
-+	{ PIN_A_NUMBER('P', 7),  PU2, 30 },	/* DU_DOTCLKIN0 */
-+	{ RCAR_GP_PIN(7,  3),    PU2, 29 },	/* GP7_03 */
-+	{ RCAR_GP_PIN(7,  2),    PU2, 28 },	/* HDMI0_CEC */
-+	{ RCAR_GP_PIN(7,  1),    PU2, 27 },	/* AVS2 */
-+	{ RCAR_GP_PIN(7,  0),    PU2, 26 },	/* AVS1 */
-+	{ RCAR_GP_PIN(0, 15),    PU2, 25 },	/* D15 */
-+	{ RCAR_GP_PIN(0, 14),    PU2, 24 },	/* D14 */
-+	{ RCAR_GP_PIN(0, 13),    PU2, 23 },	/* D13 */
-+	{ RCAR_GP_PIN(0, 12),    PU2, 22 },	/* D12 */
-+	{ RCAR_GP_PIN(0, 11),    PU2, 21 },	/* D11 */
-+	{ RCAR_GP_PIN(0, 10),    PU2, 20 },	/* D10 */
-+	{ RCAR_GP_PIN(0,  9),    PU2, 19 },	/* D9 */
-+	{ RCAR_GP_PIN(0,  8),    PU2, 18 },	/* D8 */
-+	{ RCAR_GP_PIN(0,  7),    PU2, 17 },	/* D7 */
-+	{ RCAR_GP_PIN(0,  6),    PU2, 16 },	/* D6 */
-+	{ RCAR_GP_PIN(0,  5),    PU2, 15 },	/* D5 */
-+	{ RCAR_GP_PIN(0,  4),    PU2, 14 },	/* D4 */
-+	{ RCAR_GP_PIN(0,  3),    PU2, 13 },	/* D3 */
-+	{ RCAR_GP_PIN(0,  2),    PU2, 12 },	/* D2 */
-+	{ RCAR_GP_PIN(0,  1),    PU2, 11 },	/* D1 */
-+	{ RCAR_GP_PIN(0,  0),    PU2, 10 },	/* D0 */
-+	{ PIN_NUMBER('C', 1),    PU2,  9 },	/* PRESETOUT# */
-+	{ RCAR_GP_PIN(1, 27),    PU2,  8 },	/* EX_WAIT0_A */
-+	{ RCAR_GP_PIN(1, 26),    PU2,  7 },	/* WE1_N */
-+	{ RCAR_GP_PIN(1, 25),    PU2,  6 },	/* WE0_N */
-+	{ RCAR_GP_PIN(1, 24),    PU2,  5 },	/* RD_WR_N */
-+	{ RCAR_GP_PIN(1, 23),    PU2,  4 },	/* RD_N */
-+	{ RCAR_GP_PIN(1, 22),    PU2,  3 },	/* BS_N */
-+	{ RCAR_GP_PIN(1, 21),    PU2,  2 },	/* CS1_N_A26 */
-+	{ RCAR_GP_PIN(1, 20),    PU2,  1 },	/* CS0_N */
-+	{ RCAR_GP_PIN(1, 28),    PU2,  0 },	/* CLKOUT */
-+
-+	{ RCAR_GP_PIN(4,  9),    PU3, 31 },	/* SD3_DAT0 */
-+	{ RCAR_GP_PIN(4,  8),    PU3, 30 },	/* SD3_CMD */
-+	{ RCAR_GP_PIN(4,  7),    PU3, 29 },	/* SD3_CLK */
-+	{ RCAR_GP_PIN(4,  6),    PU3, 28 },	/* SD2_DS */
-+	{ RCAR_GP_PIN(4,  5),    PU3, 27 },	/* SD2_DAT3 */
-+	{ RCAR_GP_PIN(4,  4),    PU3, 26 },	/* SD2_DAT2 */
-+	{ RCAR_GP_PIN(4,  3),    PU3, 25 },	/* SD2_DAT1 */
-+	{ RCAR_GP_PIN(4,  2),    PU3, 24 },	/* SD2_DAT0 */
-+	{ RCAR_GP_PIN(4,  1),    PU3, 23 },	/* SD2_CMD */
-+	{ RCAR_GP_PIN(4,  0),    PU3, 22 },	/* SD2_CLK */
-+	{ RCAR_GP_PIN(3, 11),    PU3, 21 },	/* SD1_DAT3 */
-+	{ RCAR_GP_PIN(3, 10),    PU3, 20 },	/* SD1_DAT2 */
-+	{ RCAR_GP_PIN(3,  9),    PU3, 19 },	/* SD1_DAT1 */
-+	{ RCAR_GP_PIN(3,  8),    PU3, 18 },	/* SD1_DAT0 */
-+	{ RCAR_GP_PIN(3,  7),    PU3, 17 },	/* SD1_CMD */
-+	{ RCAR_GP_PIN(3,  6),    PU3, 16 },	/* SD1_CLK */
-+	{ RCAR_GP_PIN(3,  5),    PU3, 15 },	/* SD0_DAT3 */
-+	{ RCAR_GP_PIN(3,  4),    PU3, 14 },	/* SD0_DAT2 */
-+	{ RCAR_GP_PIN(3,  3),    PU3, 13 },	/* SD0_DAT1 */
-+	{ RCAR_GP_PIN(3,  2),    PU3, 12 },	/* SD0_DAT0 */
-+	{ RCAR_GP_PIN(3,  1),    PU3, 11 },	/* SD0_CMD */
-+	{ RCAR_GP_PIN(3,  0),    PU3, 10 },	/* SD0_CLK */
-+	{ PIN_A_NUMBER('T', 30), PU3,  9 },	/* ASEBRK */
-+	/* bit 8 n/a */
-+	{ PIN_A_NUMBER('R', 29), PU3,  7 },	/* TDI */
-+	{ PIN_A_NUMBER('R', 30), PU3,  6 },	/* TMS */
-+	{ PIN_A_NUMBER('T', 27), PU3,  5 },	/* TCK */
-+	{ PIN_A_NUMBER('R', 26), PU3,  4 },	/* TRST# */
-+	{ PIN_A_NUMBER('D', 39), PU3,  3 },	/* EXTALR*/
-+	{ PIN_A_NUMBER('D', 38), PU3,  2 },	/* FSCLKST */
-+	/* bit 1 n/a on M3*/
-+	{ PIN_A_NUMBER('R', 8),  PU3,  0 },	/* DU_DOTCLKIN2 */
-+
-+	{ RCAR_GP_PIN(5, 19),    PU4, 31 },	/* MSIOF0_SS1 */
-+	{ RCAR_GP_PIN(5, 18),    PU4, 30 },	/* MSIOF0_SYNC */
-+	{ RCAR_GP_PIN(5, 17),    PU4, 29 },	/* MSIOF0_SCK */
-+	{ RCAR_GP_PIN(5, 16),    PU4, 28 },	/* HRTS0_N */
-+	{ RCAR_GP_PIN(5, 15),    PU4, 27 },	/* HCTS0_N */
-+	{ RCAR_GP_PIN(5, 14),    PU4, 26 },	/* HTX0 */
-+	{ RCAR_GP_PIN(5, 13),    PU4, 25 },	/* HRX0 */
-+	{ RCAR_GP_PIN(5, 12),    PU4, 24 },	/* HSCK0 */
-+	{ RCAR_GP_PIN(5, 11),    PU4, 23 },	/* RX2_A */
-+	{ RCAR_GP_PIN(5, 10),    PU4, 22 },	/* TX2_A */
-+	{ RCAR_GP_PIN(5,  9),    PU4, 21 },	/* SCK2 */
-+	{ RCAR_GP_PIN(5,  8),    PU4, 20 },	/* RTS1_N_TANS */
-+	{ RCAR_GP_PIN(5,  7),    PU4, 19 },	/* CTS1_N */
-+	{ RCAR_GP_PIN(5,  6),    PU4, 18 },	/* TX1_A */
-+	{ RCAR_GP_PIN(5,  5),    PU4, 17 },	/* RX1_A */
-+	{ RCAR_GP_PIN(5,  4),    PU4, 16 },	/* RTS0_N_TANS */
-+	{ RCAR_GP_PIN(5,  3),    PU4, 15 },	/* CTS0_N */
-+	{ RCAR_GP_PIN(5,  2),    PU4, 14 },	/* TX0 */
-+	{ RCAR_GP_PIN(5,  1),    PU4, 13 },	/* RX0 */
-+	{ RCAR_GP_PIN(5,  0),    PU4, 12 },	/* SCK0 */
-+	{ RCAR_GP_PIN(3, 15),    PU4, 11 },	/* SD1_WP */
-+	{ RCAR_GP_PIN(3, 14),    PU4, 10 },	/* SD1_CD */
-+	{ RCAR_GP_PIN(3, 13),    PU4,  9 },	/* SD0_WP */
-+	{ RCAR_GP_PIN(3, 12),    PU4,  8 },	/* SD0_CD */
-+	{ RCAR_GP_PIN(4, 17),    PU4,  7 },	/* SD3_DS */
-+	{ RCAR_GP_PIN(4, 16),    PU4,  6 },	/* SD3_DAT7 */
-+	{ RCAR_GP_PIN(4, 15),    PU4,  5 },	/* SD3_DAT6 */
-+	{ RCAR_GP_PIN(4, 14),    PU4,  4 },	/* SD3_DAT5 */
-+	{ RCAR_GP_PIN(4, 13),    PU4,  3 },	/* SD3_DAT4 */
-+	{ RCAR_GP_PIN(4, 12),    PU4,  2 },	/* SD3_DAT3 */
-+	{ RCAR_GP_PIN(4, 11),    PU4,  1 },	/* SD3_DAT2 */
-+	{ RCAR_GP_PIN(4, 10),    PU4,  0 },	/* SD3_DAT1 */
-+
-+	{ RCAR_GP_PIN(6, 24),    PU5, 31 },	/* USB0_PWEN */
-+	{ RCAR_GP_PIN(6, 23),    PU5, 30 },	/* AUDIO_CLKB_B */
-+	{ RCAR_GP_PIN(6, 22),    PU5, 29 },	/* AUDIO_CLKA_A */
-+	{ RCAR_GP_PIN(6, 21),    PU5, 28 },	/* SSI_SDATA9_A */
-+	{ RCAR_GP_PIN(6, 20),    PU5, 27 },	/* SSI_SDATA8 */
-+	{ RCAR_GP_PIN(6, 19),    PU5, 26 },	/* SSI_SDATA7 */
-+	{ RCAR_GP_PIN(6, 18),    PU5, 25 },	/* SSI_WS78 */
-+	{ RCAR_GP_PIN(6, 17),    PU5, 24 },	/* SSI_SCK78 */
-+	{ RCAR_GP_PIN(6, 16),    PU5, 23 },	/* SSI_SDATA6 */
-+	{ RCAR_GP_PIN(6, 15),    PU5, 22 },	/* SSI_WS6 */
-+	{ RCAR_GP_PIN(6, 14),    PU5, 21 },	/* SSI_SCK6 */
-+	{ RCAR_GP_PIN(6, 13),    PU5, 20 },	/* SSI_SDATA5 */
-+	{ RCAR_GP_PIN(6, 12),    PU5, 19 },	/* SSI_WS5 */
-+	{ RCAR_GP_PIN(6, 11),    PU5, 18 },	/* SSI_SCK5 */
-+	{ RCAR_GP_PIN(6, 10),    PU5, 17 },	/* SSI_SDATA4 */
-+	{ RCAR_GP_PIN(6,  9),    PU5, 16 },	/* SSI_WS4 */
-+	{ RCAR_GP_PIN(6,  8),    PU5, 15 },	/* SSI_SCK4 */
-+	{ RCAR_GP_PIN(6,  7),    PU5, 14 },	/* SSI_SDATA3 */
-+	{ RCAR_GP_PIN(6,  6),    PU5, 13 },	/* SSI_WS34 */
-+	{ RCAR_GP_PIN(6,  5),    PU5, 12 },	/* SSI_SCK34 */
-+	{ RCAR_GP_PIN(6,  4),    PU5, 11 },	/* SSI_SDATA2_A */
-+	{ RCAR_GP_PIN(6,  3),    PU5, 10 },	/* SSI_SDATA1_A */
-+	{ RCAR_GP_PIN(6,  2),    PU5,  9 },	/* SSI_SDATA0 */
-+	{ RCAR_GP_PIN(6,  1),    PU5,  8 },	/* SSI_WS01239 */
-+	{ RCAR_GP_PIN(6,  0),    PU5,  7 },	/* SSI_SCK01239 */
-+	{ PIN_NUMBER('H', 37),   PU5,  6 },	/* MLB_REF */
-+	{ RCAR_GP_PIN(5, 25),    PU5,  5 },	/* MLB_DAT */
-+	{ RCAR_GP_PIN(5, 24),    PU5,  4 },	/* MLB_SIG */
-+	{ RCAR_GP_PIN(5, 23),    PU5,  3 },	/* MLB_CLK */
-+	{ RCAR_GP_PIN(5, 22),    PU5,  2 },	/* MSIOF0_RXD */
-+	{ RCAR_GP_PIN(5, 21),    PU5,  1 },	/* MSIOF0_SS2 */
-+	{ RCAR_GP_PIN(5, 20),    PU5,  0 },	/* MSIOF0_TXD */
-+
-+	{ RCAR_GP_PIN(6, 31),    PU6,  6 },	/* GP6_31 */
-+	{ RCAR_GP_PIN(6, 30),    PU6,  5 },	/* GP6_30 */
-+	{ RCAR_GP_PIN(6, 29),    PU6,  4 },	/* USB30_OVC */
-+	{ RCAR_GP_PIN(6, 28),    PU6,  3 },	/* USB30_PWEN */
-+	{ RCAR_GP_PIN(6, 27),    PU6,  2 },	/* USB1_OVC */
-+	{ RCAR_GP_PIN(6, 26),    PU6,  1 },	/* USB1_PWEN */
-+	{ RCAR_GP_PIN(6, 25),    PU6,  0 },	/* USB0_OVC */
-+};
-+
-+static unsigned int r8a7796_pinmux_get_bias(struct sh_pfc *pfc,
-+					    unsigned int pin)
-+{
-+	const struct sh_pfc_bias_info *info;
-+	u32 reg;
-+	u32 bit;
-+
-+	info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
-+	if (!info)
-+		return PIN_CONFIG_BIAS_DISABLE;
-+
-+	reg = info->reg;
-+	bit = BIT(info->bit);
-+
-+	if (!(sh_pfc_read_reg(pfc, PUEN + reg, 32) & bit))
-+		return PIN_CONFIG_BIAS_DISABLE;
-+	else if (sh_pfc_read_reg(pfc, PUD + reg, 32) & bit)
-+		return PIN_CONFIG_BIAS_PULL_UP;
-+	else
-+		return PIN_CONFIG_BIAS_PULL_DOWN;
-+}
-+
-+static void r8a7796_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
-+				   unsigned int bias)
-+{
-+	const struct sh_pfc_bias_info *info;
-+	u32 enable, updown;
-+	u32 reg;
-+	u32 bit;
-+
-+	info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
-+	if (!info)
-+		return;
-+
-+	reg = info->reg;
-+	bit = BIT(info->bit);
-+
-+	enable = sh_pfc_read_reg(pfc, PUEN + reg, 32) & ~bit;
-+	if (bias != PIN_CONFIG_BIAS_DISABLE)
-+		enable |= bit;
-+
-+	updown = sh_pfc_read_reg(pfc, PUD + reg, 32) & ~bit;
-+	if (bias == PIN_CONFIG_BIAS_PULL_UP)
-+		updown |= bit;
-+
-+	sh_pfc_write_reg(pfc, PUD + reg, 32, updown);
-+	sh_pfc_write_reg(pfc, PUEN + reg, 32, enable);
-+}
-+
- static const struct sh_pfc_soc_operations r8a7796_pinmux_ops = {
- 	.pin_to_pocctrl = r8a7796_pin_to_pocctrl,
-+	.get_bias = r8a7796_pinmux_get_bias,
-+	.set_bias = r8a7796_pinmux_set_bias,
- };
- 
- const struct sh_pfc_soc_info r8a7796_pinmux_info = {
diff --git a/patches.renesas/0163-clk-renesas-cpg-mssr-Always-use-readl-writel.patch b/patches.renesas/0163-clk-renesas-cpg-mssr-Always-use-readl-writel.patch
deleted file mode 100644
index 91aa0e0e621dbe..00000000000000
--- a/patches.renesas/0163-clk-renesas-cpg-mssr-Always-use-readl-writel.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From e4829ec6f2ecae63102355e3e599ee298aa9a126 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 21 Sep 2016 16:31:41 +0200
-Subject: [PATCH 163/299] clk: renesas: cpg-mssr: Always use readl()/writel()
-
-The Renesas CPG/MSSR driver core uses a mix of clk_readl()/clk_writel()
-and readl()/writel() to access the clock registers. Settle on the
-generic readl()/writel().
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Stephen Boyd <sboyd@codeaurora.org>
-(cherry picked from commit c1b5371b72644907a9b81a7cd8eabb32f04466d1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/renesas-cpg-mssr.c |    9 ++++-----
- 1 file changed, 4 insertions(+), 5 deletions(-)
-
---- a/drivers/clk/renesas/renesas-cpg-mssr.c
-+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
-@@ -146,12 +146,12 @@ static int cpg_mstp_clock_endisable(stru
- 		enable ? "ON" : "OFF");
- 	spin_lock_irqsave(&priv->mstp_lock, flags);
- 
--	value = clk_readl(priv->base + SMSTPCR(reg));
-+	value = readl(priv->base + SMSTPCR(reg));
- 	if (enable)
- 		value &= ~bitmask;
- 	else
- 		value |= bitmask;
--	clk_writel(value, priv->base + SMSTPCR(reg));
-+	writel(value, priv->base + SMSTPCR(reg));
- 
- 	spin_unlock_irqrestore(&priv->mstp_lock, flags);
- 
-@@ -159,8 +159,7 @@ static int cpg_mstp_clock_endisable(stru
- 		return 0;
- 
- 	for (i = 1000; i > 0; --i) {
--		if (!(clk_readl(priv->base + MSTPSR(reg)) &
--		      bitmask))
-+		if (!(readl(priv->base + MSTPSR(reg)) & bitmask))
- 			break;
- 		cpu_relax();
- 	}
-@@ -190,7 +189,7 @@ static int cpg_mstp_clock_is_enabled(str
- 	struct cpg_mssr_priv *priv = clock->priv;
- 	u32 value;
- 
--	value = clk_readl(priv->base + MSTPSR(clock->index / 32));
-+	value = readl(priv->base + MSTPSR(clock->index / 32));
- 
- 	return !(value & BIT(clock->index % 32));
- }
diff --git a/patches.renesas/0163-pinctrl-sh-pfc-r8a7795-Restore-sort-order.patch b/patches.renesas/0163-pinctrl-sh-pfc-r8a7795-Restore-sort-order.patch
deleted file mode 100644
index ee0fc0045f3808..00000000000000
--- a/patches.renesas/0163-pinctrl-sh-pfc-r8a7795-Restore-sort-order.patch
+++ /dev/null
@@ -1,258 +0,0 @@
-From 7863a44c091770b60aecd923d72ccbacc5c06d6f Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Sat, 11 Mar 2017 12:12:43 +0100
-Subject: [PATCH 163/286] pinctrl: sh-pfc: r8a7795: Restore sort order
-
-Somehow the QSPI and SCIF_CLK fragments were inserted at the wrong
-positions.  Restore sort order (alphabetically, per group).
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit b332da51a929de9081058b17d108008cd6a0d15f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7795.c |  171 +++++++++++++++++------------------
- 1 file changed, 86 insertions(+), 85 deletions(-)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-@@ -3101,6 +3101,55 @@ static const unsigned int pwm6_b_mux[] =
- 	PWM6_B_MARK,
- };
- 
-+/* - QSPI0 ------------------------------------------------------------------ */
-+static const unsigned int qspi0_ctrl_pins[] = {
-+	/* QSPI0_SPCLK, QSPI0_SSL */
-+	PIN_NUMBER('W', 3), PIN_NUMBER('Y', 3),
-+};
-+static const unsigned int qspi0_ctrl_mux[] = {
-+	QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
-+};
-+static const unsigned int qspi0_data2_pins[] = {
-+	/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
-+	PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
-+};
-+static const unsigned int qspi0_data2_mux[] = {
-+	QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
-+};
-+static const unsigned int qspi0_data4_pins[] = {
-+	/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1, QSPI0_IO2, QSPI0_IO3 */
-+	PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
-+	PIN_NUMBER('Y', 6), PIN_A_NUMBER('B', 6),
-+};
-+static const unsigned int qspi0_data4_mux[] = {
-+	QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
-+	QSPI0_IO2_MARK, QSPI0_IO3_MARK,
-+};
-+/* - QSPI1 ------------------------------------------------------------------ */
-+static const unsigned int qspi1_ctrl_pins[] = {
-+	/* QSPI1_SPCLK, QSPI1_SSL */
-+	PIN_NUMBER('V', 3), PIN_NUMBER('V', 5),
-+};
-+static const unsigned int qspi1_ctrl_mux[] = {
-+	QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
-+};
-+static const unsigned int qspi1_data2_pins[] = {
-+	/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
-+	PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
-+};
-+static const unsigned int qspi1_data2_mux[] = {
-+	QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
-+};
-+static const unsigned int qspi1_data4_pins[] = {
-+	/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1, QSPI1_IO2, QSPI1_IO3 */
-+	PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
-+	PIN_A_NUMBER('E', 4), PIN_A_NUMBER('C', 3),
-+};
-+static const unsigned int qspi1_data4_mux[] = {
-+	QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
-+	QSPI1_IO2_MARK, QSPI1_IO3_MARK,
-+};
-+
- /* - SATA --------------------------------------------------------------------*/
- static const unsigned int sata0_devslp_a_pins[] = {
- 	/* DEVSLP */
-@@ -3299,6 +3348,23 @@ static const unsigned int scif5_clk_pins
- static const unsigned int scif5_clk_mux[] = {
- 	SCK5_MARK,
- };
-+
-+/* - SCIF Clock ------------------------------------------------------------- */
-+static const unsigned int scif_clk_a_pins[] = {
-+	/* SCIF_CLK */
-+	RCAR_GP_PIN(6, 23),
-+};
-+static const unsigned int scif_clk_a_mux[] = {
-+	SCIF_CLK_A_MARK,
-+};
-+static const unsigned int scif_clk_b_pins[] = {
-+	/* SCIF_CLK */
-+	RCAR_GP_PIN(5, 9),
-+};
-+static const unsigned int scif_clk_b_mux[] = {
-+	SCIF_CLK_B_MARK,
-+};
-+
- /* - SDHI0 ------------------------------------------------------------------ */
- static const unsigned int sdhi0_data1_pins[] = {
- 	/* D0 */
-@@ -3506,22 +3572,6 @@ static const unsigned int sdhi3_ds_mux[]
- 	SD3_DS_MARK,
- };
- 
--/* - SCIF Clock ------------------------------------------------------------- */
--static const unsigned int scif_clk_a_pins[] = {
--	/* SCIF_CLK */
--	RCAR_GP_PIN(6, 23),
--};
--static const unsigned int scif_clk_a_mux[] = {
--	SCIF_CLK_A_MARK,
--};
--static const unsigned int scif_clk_b_pins[] = {
--	/* SCIF_CLK */
--	RCAR_GP_PIN(5, 9),
--};
--static const unsigned int scif_clk_b_mux[] = {
--	SCIF_CLK_B_MARK,
--};
--
- /* - SSI -------------------------------------------------------------------- */
- static const unsigned int ssi0_data_pins[] = {
- 	/* SDATA */
-@@ -3724,55 +3774,6 @@ static const unsigned int usb2_mux[] = {
- 	USB2_PWEN_MARK, USB2_OVC_MARK,
- };
- 
--/* - QSPI0 ------------------------------------------------------------------ */
--static const unsigned int qspi0_ctrl_pins[] = {
--	/* QSPI0_SPCLK, QSPI0_SSL */
--	PIN_NUMBER('W', 3), PIN_NUMBER('Y', 3),
--};
--static const unsigned int qspi0_ctrl_mux[] = {
--	QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
--};
--static const unsigned int qspi0_data2_pins[] = {
--	/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
--	PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
--};
--static const unsigned int qspi0_data2_mux[] = {
--	QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
--};
--static const unsigned int qspi0_data4_pins[] = {
--	/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1, QSPI0_IO2, QSPI0_IO3 */
--	PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
--	PIN_NUMBER('Y', 6), PIN_A_NUMBER('B', 6),
--};
--static const unsigned int qspi0_data4_mux[] = {
--	QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
--	QSPI0_IO2_MARK, QSPI0_IO3_MARK,
--};
--/* - QSPI1 ------------------------------------------------------------------ */
--static const unsigned int qspi1_ctrl_pins[] = {
--	/* QSPI1_SPCLK, QSPI1_SSL */
--	PIN_NUMBER('V', 3), PIN_NUMBER('V', 5),
--};
--static const unsigned int qspi1_ctrl_mux[] = {
--	QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
--};
--static const unsigned int qspi1_data2_pins[] = {
--	/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
--	PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
--};
--static const unsigned int qspi1_data2_mux[] = {
--	QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
--};
--static const unsigned int qspi1_data4_pins[] = {
--	/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1, QSPI1_IO2, QSPI1_IO3 */
--	PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
--	PIN_A_NUMBER('E', 4), PIN_A_NUMBER('C', 3),
--};
--static const unsigned int qspi1_data4_mux[] = {
--	QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
--	QSPI1_IO2_MARK, QSPI1_IO3_MARK,
--};
--
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(audio_clk_a_a),
- 	SH_PFC_PIN_GROUP(audio_clk_a_b),
-@@ -3990,6 +3991,12 @@ static const struct sh_pfc_pin_group pin
- 	SH_PFC_PIN_GROUP(pwm5_b),
- 	SH_PFC_PIN_GROUP(pwm6_a),
- 	SH_PFC_PIN_GROUP(pwm6_b),
-+	SH_PFC_PIN_GROUP(qspi0_ctrl),
-+	SH_PFC_PIN_GROUP(qspi0_data2),
-+	SH_PFC_PIN_GROUP(qspi0_data4),
-+	SH_PFC_PIN_GROUP(qspi1_ctrl),
-+	SH_PFC_PIN_GROUP(qspi1_data2),
-+	SH_PFC_PIN_GROUP(qspi1_data4),
- 	SH_PFC_PIN_GROUP(sata0_devslp_a),
- 	SH_PFC_PIN_GROUP(sata0_devslp_b),
- 	SH_PFC_PIN_GROUP(scif0_data),
-@@ -4073,12 +4080,6 @@ static const struct sh_pfc_pin_group pin
- 	SH_PFC_PIN_GROUP(usb0),
- 	SH_PFC_PIN_GROUP(usb1),
- 	SH_PFC_PIN_GROUP(usb2),
--	SH_PFC_PIN_GROUP(qspi0_ctrl),
--	SH_PFC_PIN_GROUP(qspi0_data2),
--	SH_PFC_PIN_GROUP(qspi0_data4),
--	SH_PFC_PIN_GROUP(qspi1_ctrl),
--	SH_PFC_PIN_GROUP(qspi1_data2),
--	SH_PFC_PIN_GROUP(qspi1_data4),
- };
- 
- static const char * const audio_clk_groups[] = {
-@@ -4393,6 +4394,18 @@ static const char * const pwm6_groups[]
- 	"pwm6_b",
- };
- 
-+static const char * const qspi0_groups[] = {
-+	"qspi0_ctrl",
-+	"qspi0_data2",
-+	"qspi0_data4",
-+};
-+
-+static const char * const qspi1_groups[] = {
-+	"qspi1_ctrl",
-+	"qspi1_data2",
-+	"qspi1_data4",
-+};
-+
- static const char * const sata0_groups[] = {
- 	"sata0_devslp_a",
- 	"sata0_devslp_b",
-@@ -4524,18 +4537,6 @@ static const char * const usb2_groups[]
- 	"usb2",
- };
- 
--static const char * const qspi0_groups[] = {
--	"qspi0_ctrl",
--	"qspi0_data2",
--	"qspi0_data4",
--};
--
--static const char * const qspi1_groups[] = {
--	"qspi1_ctrl",
--	"qspi1_data2",
--	"qspi1_data4",
--};
--
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(audio_clk),
- 	SH_PFC_FUNCTION(avb),
-@@ -4569,6 +4570,8 @@ static const struct sh_pfc_function pinm
- 	SH_PFC_FUNCTION(pwm4),
- 	SH_PFC_FUNCTION(pwm5),
- 	SH_PFC_FUNCTION(pwm6),
-+	SH_PFC_FUNCTION(qspi0),
-+	SH_PFC_FUNCTION(qspi1),
- 	SH_PFC_FUNCTION(sata0),
- 	SH_PFC_FUNCTION(scif0),
- 	SH_PFC_FUNCTION(scif1),
-@@ -4585,8 +4588,6 @@ static const struct sh_pfc_function pinm
- 	SH_PFC_FUNCTION(usb0),
- 	SH_PFC_FUNCTION(usb1),
- 	SH_PFC_FUNCTION(usb2),
--	SH_PFC_FUNCTION(qspi0),
--	SH_PFC_FUNCTION(qspi1),
- };
- 
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
diff --git a/patches.renesas/0163-pinctrl-sh-pfc-r8a7795-Support-none-GPIO-pins-bias-s.patch b/patches.renesas/0163-pinctrl-sh-pfc-r8a7795-Support-none-GPIO-pins-bias-s.patch
deleted file mode 100644
index cc7128113df0c6..00000000000000
--- a/patches.renesas/0163-pinctrl-sh-pfc-r8a7795-Support-none-GPIO-pins-bias-s.patch
+++ /dev/null
@@ -1,500 +0,0 @@
-From d4b0f1e11796ae9d17254f05b2660ce167dcd761 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Thu, 17 Nov 2016 16:26:31 +0100
-Subject: [PATCH 163/255] pinctrl: sh-pfc: r8a7795: Support none GPIO pins bias
- setting
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-There are pins on the r8a7795 which are not part of a GPIO bank nor
-can be muxed between different functions. They do however allow for the
-bias to be configured. Add those pins to the list of pins and
-to the bias configuration array.
-
-The pins can now be referred to in DT by function names and their bias
-setting set.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 4c2fb44d60b92c4e3e744f49767da23f4eaf1b98)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7795.c |  450 +++++++++++++++++++----------------
- 1 file changed, 249 insertions(+), 201 deletions(-)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-@@ -538,7 +538,7 @@ MOD_SEL0_2_1		MOD_SEL1_2 \
- 	FM(AVB_TXCREFCLK) FM(AVB_MDIO) \
- 	FM(CLKOUT) FM(PRESETOUT) \
- 	FM(DU_DOTCLKIN0) FM(DU_DOTCLKIN1) FM(DU_DOTCLKIN2) FM(DU_DOTCLKIN3) \
--	FM(TMS) FM(TDO) FM(ASEBRK) FM(MLB_REF)
-+	FM(TMS) FM(TDO) FM(ASEBRK) FM(MLB_REF) FM(TDI) FM(TCK) FM(TRST) FM(EXTALR)
- 
- enum {
- 	PINMUX_RESERVED = 0,
-@@ -1461,46 +1461,50 @@ static const struct sh_pfc_pin pinmux_pi
- 	 * number for each pin. To this end use the pin layout from
- 	 * R-Car H3SiP to calculate a unique number for each pin.
- 	 */
--	SH_PFC_PIN_NAMED_CFG('A',  8, AVB_TX_CTL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A',  9, AVB_MDIO, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('C',  1, PRESETOUT#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('F',  1, CLKOUT, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('V',  3, QSPI1_SPCLK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('V',  5, QSPI1_SSL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('V',  6, RPC_WP#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('V',  7, RPC_RESET#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('W',  3, QSPI0_SPCLK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('Y',  3, QSPI0_SSL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('Y',  6, QSPI0_IO2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG('Y',  7, RPC_INT#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'),  4, QSPI0_MISO_IO1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'),  6, QSPI0_IO3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  3, QSPI1_IO3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  5, QSPI0_MOSI_IO0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  7, QSPI1_MOSI_IO0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'),  4, QSPI1_IO2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'),  5, QSPI1_MISO_IO1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'),  7, DU_DOTCLKIN0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'),  8, DU_DOTCLKIN1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'),  7, DU_DOTCLKIN2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'),  8, DU_DOTCLKIN3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG('A',  8, AVB_TX_CTL, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A',  9, AVB_MDIO, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('C',  1, PRESETOUT#, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('F',  1, CLKOUT, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('V',  3, QSPI1_SPCLK, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('V',  5, QSPI1_SSL, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('V',  6, RPC_WP#, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('V',  7, RPC_RESET#, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('W',  3, QSPI0_SPCLK, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('Y',  3, QSPI0_SSL, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('Y',  6, QSPI0_IO2, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('Y',  7, RPC_INT#, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'),  4, QSPI0_MISO_IO1, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'),  6, QSPI0_IO3, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  3, QSPI1_IO3, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  5, QSPI0_MOSI_IO0, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  7, QSPI1_MOSI_IO0, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST#, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 39, EXTALR, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'),  4, QSPI1_IO2, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'),  5, QSPI1_MISO_IO1, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'),  7, DU_DOTCLKIN0, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'),  8, DU_DOTCLKIN1, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'),  7, DU_DOTCLKIN2, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'),  8, DU_DOTCLKIN3, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 26, TRST#, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 29, TDI, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 27, TCK, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN),
- 	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 28, TDO, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
--	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS),
- };
- 
- /* - AUDIO CLOCK ------------------------------------------------------------ */
-@@ -5415,167 +5419,211 @@ static int r8a7795_pin_to_pocctrl(struct
- #define PU6	0x18
- 
- static const struct sh_pfc_bias_info bias_info[] = {
--	{ RCAR_GP_PIN(2, 11), PU0, 31 },	/* AVB_PHY_INT */
--	{ RCAR_GP_PIN(2, 10), PU0, 30 },	/* AVB_MAGIC */
--	{ RCAR_GP_PIN(2,  9), PU0, 29 },	/* AVB_MDC */
--
--	{ RCAR_GP_PIN(1, 19), PU1, 31 },	/* A19 */
--	{ RCAR_GP_PIN(1, 18), PU1, 30 },	/* A18 */
--	{ RCAR_GP_PIN(1, 17), PU1, 29 },	/* A17 */
--	{ RCAR_GP_PIN(1, 16), PU1, 28 },	/* A16 */
--	{ RCAR_GP_PIN(1, 15), PU1, 27 },	/* A15 */
--	{ RCAR_GP_PIN(1, 14), PU1, 26 },	/* A14 */
--	{ RCAR_GP_PIN(1, 13), PU1, 25 },	/* A13 */
--	{ RCAR_GP_PIN(1, 12), PU1, 24 },	/* A12 */
--	{ RCAR_GP_PIN(1, 11), PU1, 23 },	/* A11 */
--	{ RCAR_GP_PIN(1, 10), PU1, 22 },	/* A10 */
--	{ RCAR_GP_PIN(1,  9), PU1, 21 },	/* A9 */
--	{ RCAR_GP_PIN(1,  8), PU1, 20 },	/* A8 */
--	{ RCAR_GP_PIN(1,  7), PU1, 19 },	/* A7 */
--	{ RCAR_GP_PIN(1,  6), PU1, 18 },	/* A6 */
--	{ RCAR_GP_PIN(1,  5), PU1, 17 },	/* A5 */
--	{ RCAR_GP_PIN(1,  4), PU1, 16 },	/* A4 */
--	{ RCAR_GP_PIN(1,  3), PU1, 15 },	/* A3 */
--	{ RCAR_GP_PIN(1,  2), PU1, 14 },	/* A2 */
--	{ RCAR_GP_PIN(1,  1), PU1, 13 },	/* A1 */
--	{ RCAR_GP_PIN(1,  0), PU1, 12 },	/* A0 */
--	{ RCAR_GP_PIN(2,  8), PU1, 11 },	/* PWM2_A */
--	{ RCAR_GP_PIN(2,  7), PU1, 10 },	/* PWM1_A */
--	{ RCAR_GP_PIN(2,  6), PU1,  9 },	/* PWM0 */
--	{ RCAR_GP_PIN(2,  5), PU1,  8 },	/* IRQ5 */
--	{ RCAR_GP_PIN(2,  4), PU1,  7 },	/* IRQ4 */
--	{ RCAR_GP_PIN(2,  3), PU1,  6 },	/* IRQ3 */
--	{ RCAR_GP_PIN(2,  2), PU1,  5 },	/* IRQ2 */
--	{ RCAR_GP_PIN(2,  1), PU1,  4 },	/* IRQ1 */
--	{ RCAR_GP_PIN(2,  0), PU1,  3 },	/* IRQ0 */
--	{ RCAR_GP_PIN(2, 14), PU1,  2 },	/* AVB_AVTP_CAPTURE_A */
--	{ RCAR_GP_PIN(2, 13), PU1,  1 },	/* AVB_AVTP_MATCH_A */
--	{ RCAR_GP_PIN(2, 12), PU1,  0 },	/* AVB_LINK */
--
--	{ RCAR_GP_PIN(7,  3), PU2, 29 },	/* HDMI1_CEC */
--	{ RCAR_GP_PIN(7,  2), PU2, 28 },	/* HDMI0_CEC */
--	{ RCAR_GP_PIN(7,  1), PU2, 27 },	/* AVS2 */
--	{ RCAR_GP_PIN(7,  0), PU2, 26 },	/* AVS1 */
--	{ RCAR_GP_PIN(0, 15), PU2, 25 },	/* D15 */
--	{ RCAR_GP_PIN(0, 14), PU2, 24 },	/* D14 */
--	{ RCAR_GP_PIN(0, 13), PU2, 23 },	/* D13 */
--	{ RCAR_GP_PIN(0, 12), PU2, 22 },	/* D12 */
--	{ RCAR_GP_PIN(0, 11), PU2, 21 },	/* D11 */
--	{ RCAR_GP_PIN(0, 10), PU2, 20 },	/* D10 */
--	{ RCAR_GP_PIN(0,  9), PU2, 19 },	/* D9 */
--	{ RCAR_GP_PIN(0,  8), PU2, 18 },	/* D8 */
--	{ RCAR_GP_PIN(0,  7), PU2, 17 },	/* D7 */
--	{ RCAR_GP_PIN(0,  6), PU2, 16 },	/* D6 */
--	{ RCAR_GP_PIN(0,  5), PU2, 15 },	/* D5 */
--	{ RCAR_GP_PIN(0,  4), PU2, 14 },	/* D4 */
--	{ RCAR_GP_PIN(0,  3), PU2, 13 },	/* D3 */
--	{ RCAR_GP_PIN(0,  2), PU2, 12 },	/* D2 */
--	{ RCAR_GP_PIN(0,  1), PU2, 11 },	/* D1 */
--	{ RCAR_GP_PIN(0,  0), PU2, 10 },	/* D0 */
--	{ RCAR_GP_PIN(1, 27), PU2,  8 },	/* EX_WAIT0_A */
--	{ RCAR_GP_PIN(1, 26), PU2,  7 },	/* WE1_N */
--	{ RCAR_GP_PIN(1, 25), PU2,  6 },	/* WE0_N */
--	{ RCAR_GP_PIN(1, 24), PU2,  5 },	/* RD_WR_N */
--	{ RCAR_GP_PIN(1, 23), PU2,  4 },	/* RD_N */
--	{ RCAR_GP_PIN(1, 22), PU2,  3 },	/* BS_N */
--	{ RCAR_GP_PIN(1, 21), PU2,  2 },	/* CS1_N_A26 */
--	{ RCAR_GP_PIN(1, 20), PU2,  1 },	/* CS0_N */
--
--	{ RCAR_GP_PIN(4,  9), PU3, 31 },	/* SD3_DAT0 */
--	{ RCAR_GP_PIN(4,  8), PU3, 30 },	/* SD3_CMD */
--	{ RCAR_GP_PIN(4,  7), PU3, 29 },	/* SD3_CLK */
--	{ RCAR_GP_PIN(4,  6), PU3, 28 },	/* SD2_DS */
--	{ RCAR_GP_PIN(4,  5), PU3, 27 },	/* SD2_DAT3 */
--	{ RCAR_GP_PIN(4,  4), PU3, 26 },	/* SD2_DAT2 */
--	{ RCAR_GP_PIN(4,  3), PU3, 25 },	/* SD2_DAT1 */
--	{ RCAR_GP_PIN(4,  2), PU3, 24 },	/* SD2_DAT0 */
--	{ RCAR_GP_PIN(4,  1), PU3, 23 },	/* SD2_CMD */
--	{ RCAR_GP_PIN(4,  0), PU3, 22 },	/* SD2_CLK */
--	{ RCAR_GP_PIN(3, 11), PU3, 21 },	/* SD1_DAT3 */
--	{ RCAR_GP_PIN(3, 10), PU3, 20 },	/* SD1_DAT2 */
--	{ RCAR_GP_PIN(3,  9), PU3, 19 },	/* SD1_DAT1 */
--	{ RCAR_GP_PIN(3,  8), PU3, 18 },	/* SD1_DAT0 */
--	{ RCAR_GP_PIN(3,  7), PU3, 17 },	/* SD1_CMD */
--	{ RCAR_GP_PIN(3,  6), PU3, 16 },	/* SD1_CLK */
--	{ RCAR_GP_PIN(3,  5), PU3, 15 },	/* SD0_DAT3 */
--	{ RCAR_GP_PIN(3,  4), PU3, 14 },	/* SD0_DAT2 */
--	{ RCAR_GP_PIN(3,  3), PU3, 13 },	/* SD0_DAT1 */
--	{ RCAR_GP_PIN(3,  2), PU3, 12 },	/* SD0_DAT0 */
--	{ RCAR_GP_PIN(3,  1), PU3, 11 },	/* SD0_CMD */
--	{ RCAR_GP_PIN(3,  0), PU3, 10 },	/* SD0_CLK */
--
--	{ RCAR_GP_PIN(5, 19), PU4, 31 },	/* MSIOF0_SS1 */
--	{ RCAR_GP_PIN(5, 18), PU4, 30 },	/* MSIOF0_SYNC */
--	{ RCAR_GP_PIN(5, 17), PU4, 29 },	/* MSIOF0_SCK */
--	{ RCAR_GP_PIN(5, 16), PU4, 28 },	/* HRTS0_N */
--	{ RCAR_GP_PIN(5, 15), PU4, 27 },	/* HCTS0_N */
--	{ RCAR_GP_PIN(5, 14), PU4, 26 },	/* HTX0 */
--	{ RCAR_GP_PIN(5, 13), PU4, 25 },	/* HRX0 */
--	{ RCAR_GP_PIN(5, 12), PU4, 24 },	/* HSCK0 */
--	{ RCAR_GP_PIN(5, 11), PU4, 23 },	/* RX2_A */
--	{ RCAR_GP_PIN(5, 10), PU4, 22 },	/* TX2_A */
--	{ RCAR_GP_PIN(5,  9), PU4, 21 },	/* SCK2 */
--	{ RCAR_GP_PIN(5,  8), PU4, 20 },	/* RTS1_N_TANS */
--	{ RCAR_GP_PIN(5,  7), PU4, 19 },	/* CTS1_N */
--	{ RCAR_GP_PIN(5,  6), PU4, 18 },	/* TX1_A */
--	{ RCAR_GP_PIN(5,  5), PU4, 17 },	/* RX1_A */
--	{ RCAR_GP_PIN(5,  4), PU4, 16 },	/* RTS0_N_TANS */
--	{ RCAR_GP_PIN(5,  3), PU4, 15 },	/* CTS0_N */
--	{ RCAR_GP_PIN(5,  2), PU4, 14 },	/* TX0 */
--	{ RCAR_GP_PIN(5,  1), PU4, 13 },	/* RX0 */
--	{ RCAR_GP_PIN(5,  0), PU4, 12 },	/* SCK0 */
--	{ RCAR_GP_PIN(3, 15), PU4, 11 },	/* SD1_WP */
--	{ RCAR_GP_PIN(3, 14), PU4, 10 },	/* SD1_CD */
--	{ RCAR_GP_PIN(3, 13), PU4,  9 },	/* SD0_WP */
--	{ RCAR_GP_PIN(3, 12), PU4,  8 },	/* SD0_CD */
--	{ RCAR_GP_PIN(4, 17), PU4,  7 },	/* SD3_DS */
--	{ RCAR_GP_PIN(4, 16), PU4,  6 },	/* SD3_DAT7 */
--	{ RCAR_GP_PIN(4, 15), PU4,  5 },	/* SD3_DAT6 */
--	{ RCAR_GP_PIN(4, 14), PU4,  4 },	/* SD3_DAT5 */
--	{ RCAR_GP_PIN(4, 13), PU4,  3 },	/* SD3_DAT4 */
--	{ RCAR_GP_PIN(4, 12), PU4,  2 },	/* SD3_DAT3 */
--	{ RCAR_GP_PIN(4, 11), PU4,  1 },	/* SD3_DAT2 */
--	{ RCAR_GP_PIN(4, 10), PU4,  0 },	/* SD3_DAT1 */
--
--	{ RCAR_GP_PIN(6, 24), PU5, 31 },	/* USB0_PWEN */
--	{ RCAR_GP_PIN(6, 23), PU5, 30 },	/* AUDIO_CLKB_B */
--	{ RCAR_GP_PIN(6, 22), PU5, 29 },	/* AUDIO_CLKA_A */
--	{ RCAR_GP_PIN(6, 21), PU5, 28 },	/* SSI_SDATA9_A */
--	{ RCAR_GP_PIN(6, 20), PU5, 27 },	/* SSI_SDATA8 */
--	{ RCAR_GP_PIN(6, 19), PU5, 26 },	/* SSI_SDATA7 */
--	{ RCAR_GP_PIN(6, 18), PU5, 25 },	/* SSI_WS78 */
--	{ RCAR_GP_PIN(6, 17), PU5, 24 },	/* SSI_SCK78 */
--	{ RCAR_GP_PIN(6, 16), PU5, 23 },	/* SSI_SDATA6 */
--	{ RCAR_GP_PIN(6, 15), PU5, 22 },	/* SSI_WS6 */
--	{ RCAR_GP_PIN(6, 14), PU5, 21 },	/* SSI_SCK6 */
--	{ RCAR_GP_PIN(6, 13), PU5, 20 },	/* SSI_SDATA5 */
--	{ RCAR_GP_PIN(6, 12), PU5, 19 },	/* SSI_WS5 */
--	{ RCAR_GP_PIN(6, 11), PU5, 18 },	/* SSI_SCK5 */
--	{ RCAR_GP_PIN(6, 10), PU5, 17 },	/* SSI_SDATA4 */
--	{ RCAR_GP_PIN(6,  9), PU5, 16 },	/* SSI_WS4 */
--	{ RCAR_GP_PIN(6,  8), PU5, 15 },	/* SSI_SCK4 */
--	{ RCAR_GP_PIN(6,  7), PU5, 14 },	/* SSI_SDATA3 */
--	{ RCAR_GP_PIN(6,  6), PU5, 13 },	/* SSI_WS34 */
--	{ RCAR_GP_PIN(6,  5), PU5, 12 },	/* SSI_SCK34 */
--	{ RCAR_GP_PIN(6,  4), PU5, 11 },	/* SSI_SDATA2_A */
--	{ RCAR_GP_PIN(6,  3), PU5, 10 },	/* SSI_SDATA1_A */
--	{ RCAR_GP_PIN(6,  2), PU5,  9 },	/* SSI_SDATA0 */
--	{ RCAR_GP_PIN(6,  1), PU5,  8 },	/* SSI_WS01239 */
--	{ RCAR_GP_PIN(6,  0), PU5,  7 },	/* SSI_SCK01239 */
--	{ RCAR_GP_PIN(5, 25), PU5,  5 },	/* MLB_DAT */
--	{ RCAR_GP_PIN(5, 24), PU5,  4 },	/* MLB_SIG */
--	{ RCAR_GP_PIN(5, 23), PU5,  3 },	/* MLB_CLK */
--	{ RCAR_GP_PIN(5, 22), PU5,  2 },	/* MSIOF0_RXD */
--	{ RCAR_GP_PIN(5, 21), PU5,  1 },	/* MSIOF0_SS2 */
--	{ RCAR_GP_PIN(5, 20), PU5,  0 },	/* MSIOF0_TXD */
--
--	{ RCAR_GP_PIN(6, 31), PU6,  6 },	/* USB31_OVC */
--	{ RCAR_GP_PIN(6, 30), PU6,  5 },	/* USB31_PWEN */
--	{ RCAR_GP_PIN(6, 29), PU6,  4 },	/* USB30_OVC */
--	{ RCAR_GP_PIN(6, 28), PU6,  3 },	/* USB30_PWEN */
--	{ RCAR_GP_PIN(6, 27), PU6,  2 },	/* USB1_OVC */
--	{ RCAR_GP_PIN(6, 26), PU6,  1 },	/* USB1_PWEN */
--	{ RCAR_GP_PIN(6, 25), PU6,  0 },	/* USB0_OVC */
-+	{ RCAR_GP_PIN(2, 11),    PU0, 31 },	/* AVB_PHY_INT */
-+	{ RCAR_GP_PIN(2, 10),    PU0, 30 },	/* AVB_MAGIC */
-+	{ RCAR_GP_PIN(2,  9),    PU0, 29 },	/* AVB_MDC */
-+	{ PIN_NUMBER('A', 9),    PU0, 28 },	/* AVB_MDIO */
-+	{ PIN_NUMBER('A', 12),   PU0, 27 },	/* AVB_TXCREFCLK */
-+	{ PIN_NUMBER('B', 17),   PU0, 26 },	/* AVB_TD3 */
-+	{ PIN_NUMBER('A', 17),   PU0, 25 },	/* AVB_TD2 */
-+	{ PIN_NUMBER('B', 18),   PU0, 24 },	/* AVB_TD1 */
-+	{ PIN_NUMBER('A', 18),   PU0, 23 },	/* AVB_TD0 */
-+	{ PIN_NUMBER('A', 19),   PU0, 22 },	/* AVB_TXC */
-+	{ PIN_NUMBER('A', 8),    PU0, 21 },	/* AVB_TX_CTL */
-+	{ PIN_NUMBER('B', 14),   PU0, 20 },	/* AVB_RD3 */
-+	{ PIN_NUMBER('A', 14),   PU0, 19 },	/* AVB_RD2 */
-+	{ PIN_NUMBER('B', 13),   PU0, 18 },	/* AVB_RD1 */
-+	{ PIN_NUMBER('A', 13),   PU0, 17 },	/* AVB_RD0 */
-+	{ PIN_NUMBER('B', 19),   PU0, 16 },	/* AVB_RXC */
-+	{ PIN_NUMBER('A', 16),   PU0, 15 },	/* AVB_RX_CTL */
-+	{ PIN_NUMBER('V', 7),    PU0, 14 },	/* RPC_RESET# */
-+	{ PIN_NUMBER('V', 6),    PU0, 13 },	/* RPC_WP# */
-+	{ PIN_NUMBER('Y', 7),    PU0, 12 },	/* RPC_INT# */
-+	{ PIN_NUMBER('V', 5),    PU0, 11 },	/* QSPI1_SSL */
-+	{ PIN_A_NUMBER('C', 3),  PU0, 10 },	/* QSPI1_IO3 */
-+	{ PIN_A_NUMBER('E', 4),  PU0,  9 },	/* QSPI1_IO2 */
-+	{ PIN_A_NUMBER('E', 5),  PU0,  8 },	/* QSPI1_MISO_IO1 */
-+	{ PIN_A_NUMBER('C', 7),  PU0,  7 },	/* QSPI1_MOSI_IO0 */
-+	{ PIN_NUMBER('V', 3),    PU0,  6 },	/* QSPI1_SPCLK */
-+	{ PIN_NUMBER('Y', 3),    PU0,  5 },	/* QSPI0_SSL */
-+	{ PIN_A_NUMBER('B', 6),  PU0,  4 },	/* QSPI0_IO3 */
-+	{ PIN_NUMBER('Y', 6),    PU0,  3 },	/* QSPI0_IO2 */
-+	{ PIN_A_NUMBER('B', 4),  PU0,  2 },	/* QSPI0_MISO_IO1 */
-+	{ PIN_A_NUMBER('C', 5),  PU0,  1 },	/* QSPI0_MOSI_IO0 */
-+	{ PIN_NUMBER('W', 3),    PU0,  0 },	/* QSPI0_SPCLK */
-+
-+	{ RCAR_GP_PIN(1, 19),    PU1, 31 },	/* A19 */
-+	{ RCAR_GP_PIN(1, 18),    PU1, 30 },	/* A18 */
-+	{ RCAR_GP_PIN(1, 17),    PU1, 29 },	/* A17 */
-+	{ RCAR_GP_PIN(1, 16),    PU1, 28 },	/* A16 */
-+	{ RCAR_GP_PIN(1, 15),    PU1, 27 },	/* A15 */
-+	{ RCAR_GP_PIN(1, 14),    PU1, 26 },	/* A14 */
-+	{ RCAR_GP_PIN(1, 13),    PU1, 25 },	/* A13 */
-+	{ RCAR_GP_PIN(1, 12),    PU1, 24 },	/* A12 */
-+	{ RCAR_GP_PIN(1, 11),    PU1, 23 },	/* A11 */
-+	{ RCAR_GP_PIN(1, 10),    PU1, 22 },	/* A10 */
-+	{ RCAR_GP_PIN(1,  9),    PU1, 21 },	/* A9 */
-+	{ RCAR_GP_PIN(1,  8),    PU1, 20 },	/* A8 */
-+	{ RCAR_GP_PIN(1,  7),    PU1, 19 },	/* A7 */
-+	{ RCAR_GP_PIN(1,  6),    PU1, 18 },	/* A6 */
-+	{ RCAR_GP_PIN(1,  5),    PU1, 17 },	/* A5 */
-+	{ RCAR_GP_PIN(1,  4),    PU1, 16 },	/* A4 */
-+	{ RCAR_GP_PIN(1,  3),    PU1, 15 },	/* A3 */
-+	{ RCAR_GP_PIN(1,  2),    PU1, 14 },	/* A2 */
-+	{ RCAR_GP_PIN(1,  1),    PU1, 13 },	/* A1 */
-+	{ RCAR_GP_PIN(1,  0),    PU1, 12 },	/* A0 */
-+	{ RCAR_GP_PIN(2,  8),    PU1, 11 },	/* PWM2_A */
-+	{ RCAR_GP_PIN(2,  7),    PU1, 10 },	/* PWM1_A */
-+	{ RCAR_GP_PIN(2,  6),    PU1,  9 },	/* PWM0 */
-+	{ RCAR_GP_PIN(2,  5),    PU1,  8 },	/* IRQ5 */
-+	{ RCAR_GP_PIN(2,  4),    PU1,  7 },	/* IRQ4 */
-+	{ RCAR_GP_PIN(2,  3),    PU1,  6 },	/* IRQ3 */
-+	{ RCAR_GP_PIN(2,  2),    PU1,  5 },	/* IRQ2 */
-+	{ RCAR_GP_PIN(2,  1),    PU1,  4 },	/* IRQ1 */
-+	{ RCAR_GP_PIN(2,  0),    PU1,  3 },	/* IRQ0 */
-+	{ RCAR_GP_PIN(2, 14),    PU1,  2 },	/* AVB_AVTP_CAPTURE_A */
-+	{ RCAR_GP_PIN(2, 13),    PU1,  1 },	/* AVB_AVTP_MATCH_A */
-+	{ RCAR_GP_PIN(2, 12),    PU1,  0 },	/* AVB_LINK */
-+
-+	{ PIN_A_NUMBER('P', 8),  PU2, 31 },	/* DU_DOTCLKIN1 */
-+	{ PIN_A_NUMBER('P', 7),  PU2, 30 },	/* DU_DOTCLKIN0 */
-+	{ RCAR_GP_PIN(7,  3),    PU2, 29 },	/* HDMI1_CEC */
-+	{ RCAR_GP_PIN(7,  2),    PU2, 28 },	/* HDMI0_CEC */
-+	{ RCAR_GP_PIN(7,  1),    PU2, 27 },	/* AVS2 */
-+	{ RCAR_GP_PIN(7,  0),    PU2, 26 },	/* AVS1 */
-+	{ RCAR_GP_PIN(0, 15),    PU2, 25 },	/* D15 */
-+	{ RCAR_GP_PIN(0, 14),    PU2, 24 },	/* D14 */
-+	{ RCAR_GP_PIN(0, 13),    PU2, 23 },	/* D13 */
-+	{ RCAR_GP_PIN(0, 12),    PU2, 22 },	/* D12 */
-+	{ RCAR_GP_PIN(0, 11),    PU2, 21 },	/* D11 */
-+	{ RCAR_GP_PIN(0, 10),    PU2, 20 },	/* D10 */
-+	{ RCAR_GP_PIN(0,  9),    PU2, 19 },	/* D9 */
-+	{ RCAR_GP_PIN(0,  8),    PU2, 18 },	/* D8 */
-+	{ RCAR_GP_PIN(0,  7),    PU2, 17 },	/* D7 */
-+	{ RCAR_GP_PIN(0,  6),    PU2, 16 },	/* D6 */
-+	{ RCAR_GP_PIN(0,  5),    PU2, 15 },	/* D5 */
-+	{ RCAR_GP_PIN(0,  4),    PU2, 14 },	/* D4 */
-+	{ RCAR_GP_PIN(0,  3),    PU2, 13 },	/* D3 */
-+	{ RCAR_GP_PIN(0,  2),    PU2, 12 },	/* D2 */
-+	{ RCAR_GP_PIN(0,  1),    PU2, 11 },	/* D1 */
-+	{ RCAR_GP_PIN(0,  0),    PU2, 10 },	/* D0 */
-+	{ PIN_NUMBER('C', 1),    PU2,  9 },	/* PRESETOUT# */
-+	{ RCAR_GP_PIN(1, 27),    PU2,  8 },	/* EX_WAIT0_A */
-+	{ RCAR_GP_PIN(1, 26),    PU2,  7 },	/* WE1_N */
-+	{ RCAR_GP_PIN(1, 25),    PU2,  6 },	/* WE0_N */
-+	{ RCAR_GP_PIN(1, 24),    PU2,  5 },	/* RD_WR_N */
-+	{ RCAR_GP_PIN(1, 23),    PU2,  4 },	/* RD_N */
-+	{ RCAR_GP_PIN(1, 22),    PU2,  3 },	/* BS_N */
-+	{ RCAR_GP_PIN(1, 21),    PU2,  2 },	/* CS1_N_A26 */
-+	{ RCAR_GP_PIN(1, 20),    PU2,  1 },	/* CS0_N */
-+	{ PIN_NUMBER('F', 1),    PU2,  0 },	/* CLKOUT */
-+
-+	{ RCAR_GP_PIN(4,  9),    PU3, 31 },	/* SD3_DAT0 */
-+	{ RCAR_GP_PIN(4,  8),    PU3, 30 },	/* SD3_CMD */
-+	{ RCAR_GP_PIN(4,  7),    PU3, 29 },	/* SD3_CLK */
-+	{ RCAR_GP_PIN(4,  6),    PU3, 28 },	/* SD2_DS */
-+	{ RCAR_GP_PIN(4,  5),    PU3, 27 },	/* SD2_DAT3 */
-+	{ RCAR_GP_PIN(4,  4),    PU3, 26 },	/* SD2_DAT2 */
-+	{ RCAR_GP_PIN(4,  3),    PU3, 25 },	/* SD2_DAT1 */
-+	{ RCAR_GP_PIN(4,  2),    PU3, 24 },	/* SD2_DAT0 */
-+	{ RCAR_GP_PIN(4,  1),    PU3, 23 },	/* SD2_CMD */
-+	{ RCAR_GP_PIN(4,  0),    PU3, 22 },	/* SD2_CLK */
-+	{ RCAR_GP_PIN(3, 11),    PU3, 21 },	/* SD1_DAT3 */
-+	{ RCAR_GP_PIN(3, 10),    PU3, 20 },	/* SD1_DAT2 */
-+	{ RCAR_GP_PIN(3,  9),    PU3, 19 },	/* SD1_DAT1 */
-+	{ RCAR_GP_PIN(3,  8),    PU3, 18 },	/* SD1_DAT0 */
-+	{ RCAR_GP_PIN(3,  7),    PU3, 17 },	/* SD1_CMD */
-+	{ RCAR_GP_PIN(3,  6),    PU3, 16 },	/* SD1_CLK */
-+	{ RCAR_GP_PIN(3,  5),    PU3, 15 },	/* SD0_DAT3 */
-+	{ RCAR_GP_PIN(3,  4),    PU3, 14 },	/* SD0_DAT2 */
-+	{ RCAR_GP_PIN(3,  3),    PU3, 13 },	/* SD0_DAT1 */
-+	{ RCAR_GP_PIN(3,  2),    PU3, 12 },	/* SD0_DAT0 */
-+	{ RCAR_GP_PIN(3,  1),    PU3, 11 },	/* SD0_CMD */
-+	{ RCAR_GP_PIN(3,  0),    PU3, 10 },	/* SD0_CLK */
-+	{ PIN_A_NUMBER('T', 30), PU3,  9 },	/* ASEBRK */
-+	/* bit 8 n/a */
-+	{ PIN_A_NUMBER('R', 29), PU3,  7 },	/* TDI */
-+	{ PIN_A_NUMBER('R', 30), PU3,  6 },	/* TMS */
-+	{ PIN_A_NUMBER('T', 27), PU3,  5 },	/* TCK */
-+	{ PIN_A_NUMBER('R', 26), PU3,  4 },	/* TRST# */
-+	{ PIN_A_NUMBER('D', 39), PU3,  3 },	/* EXTALR*/
-+	{ PIN_A_NUMBER('D', 38), PU3,  2 },	/* FSCLKST# */
-+	{ PIN_A_NUMBER('R', 8),  PU3,  1 },	/* DU_DOTCLKIN3 */
-+	{ PIN_A_NUMBER('R', 7),  PU3,  0 },	/* DU_DOTCLKIN2 */
-+
-+	{ RCAR_GP_PIN(5, 19),    PU4, 31 },	/* MSIOF0_SS1 */
-+	{ RCAR_GP_PIN(5, 18),    PU4, 30 },	/* MSIOF0_SYNC */
-+	{ RCAR_GP_PIN(5, 17),    PU4, 29 },	/* MSIOF0_SCK */
-+	{ RCAR_GP_PIN(5, 16),    PU4, 28 },	/* HRTS0_N */
-+	{ RCAR_GP_PIN(5, 15),    PU4, 27 },	/* HCTS0_N */
-+	{ RCAR_GP_PIN(5, 14),    PU4, 26 },	/* HTX0 */
-+	{ RCAR_GP_PIN(5, 13),    PU4, 25 },	/* HRX0 */
-+	{ RCAR_GP_PIN(5, 12),    PU4, 24 },	/* HSCK0 */
-+	{ RCAR_GP_PIN(5, 11),    PU4, 23 },	/* RX2_A */
-+	{ RCAR_GP_PIN(5, 10),    PU4, 22 },	/* TX2_A */
-+	{ RCAR_GP_PIN(5,  9),    PU4, 21 },	/* SCK2 */
-+	{ RCAR_GP_PIN(5,  8),    PU4, 20 },	/* RTS1_N_TANS */
-+	{ RCAR_GP_PIN(5,  7),    PU4, 19 },	/* CTS1_N */
-+	{ RCAR_GP_PIN(5,  6),    PU4, 18 },	/* TX1_A */
-+	{ RCAR_GP_PIN(5,  5),    PU4, 17 },	/* RX1_A */
-+	{ RCAR_GP_PIN(5,  4),    PU4, 16 },	/* RTS0_N_TANS */
-+	{ RCAR_GP_PIN(5,  3),    PU4, 15 },	/* CTS0_N */
-+	{ RCAR_GP_PIN(5,  2),    PU4, 14 },	/* TX0 */
-+	{ RCAR_GP_PIN(5,  1),    PU4, 13 },	/* RX0 */
-+	{ RCAR_GP_PIN(5,  0),    PU4, 12 },	/* SCK0 */
-+	{ RCAR_GP_PIN(3, 15),    PU4, 11 },	/* SD1_WP */
-+	{ RCAR_GP_PIN(3, 14),    PU4, 10 },	/* SD1_CD */
-+	{ RCAR_GP_PIN(3, 13),    PU4,  9 },	/* SD0_WP */
-+	{ RCAR_GP_PIN(3, 12),    PU4,  8 },	/* SD0_CD */
-+	{ RCAR_GP_PIN(4, 17),    PU4,  7 },	/* SD3_DS */
-+	{ RCAR_GP_PIN(4, 16),    PU4,  6 },	/* SD3_DAT7 */
-+	{ RCAR_GP_PIN(4, 15),    PU4,  5 },	/* SD3_DAT6 */
-+	{ RCAR_GP_PIN(4, 14),    PU4,  4 },	/* SD3_DAT5 */
-+	{ RCAR_GP_PIN(4, 13),    PU4,  3 },	/* SD3_DAT4 */
-+	{ RCAR_GP_PIN(4, 12),    PU4,  2 },	/* SD3_DAT3 */
-+	{ RCAR_GP_PIN(4, 11),    PU4,  1 },	/* SD3_DAT2 */
-+	{ RCAR_GP_PIN(4, 10),    PU4,  0 },	/* SD3_DAT1 */
-+
-+	{ RCAR_GP_PIN(6, 24),    PU5, 31 },	/* USB0_PWEN */
-+	{ RCAR_GP_PIN(6, 23),    PU5, 30 },	/* AUDIO_CLKB_B */
-+	{ RCAR_GP_PIN(6, 22),    PU5, 29 },	/* AUDIO_CLKA_A */
-+	{ RCAR_GP_PIN(6, 21),    PU5, 28 },	/* SSI_SDATA9_A */
-+	{ RCAR_GP_PIN(6, 20),    PU5, 27 },	/* SSI_SDATA8 */
-+	{ RCAR_GP_PIN(6, 19),    PU5, 26 },	/* SSI_SDATA7 */
-+	{ RCAR_GP_PIN(6, 18),    PU5, 25 },	/* SSI_WS78 */
-+	{ RCAR_GP_PIN(6, 17),    PU5, 24 },	/* SSI_SCK78 */
-+	{ RCAR_GP_PIN(6, 16),    PU5, 23 },	/* SSI_SDATA6 */
-+	{ RCAR_GP_PIN(6, 15),    PU5, 22 },	/* SSI_WS6 */
-+	{ RCAR_GP_PIN(6, 14),    PU5, 21 },	/* SSI_SCK6 */
-+	{ RCAR_GP_PIN(6, 13),    PU5, 20 },	/* SSI_SDATA5 */
-+	{ RCAR_GP_PIN(6, 12),    PU5, 19 },	/* SSI_WS5 */
-+	{ RCAR_GP_PIN(6, 11),    PU5, 18 },	/* SSI_SCK5 */
-+	{ RCAR_GP_PIN(6, 10),    PU5, 17 },	/* SSI_SDATA4 */
-+	{ RCAR_GP_PIN(6,  9),    PU5, 16 },	/* SSI_WS4 */
-+	{ RCAR_GP_PIN(6,  8),    PU5, 15 },	/* SSI_SCK4 */
-+	{ RCAR_GP_PIN(6,  7),    PU5, 14 },	/* SSI_SDATA3 */
-+	{ RCAR_GP_PIN(6,  6),    PU5, 13 },	/* SSI_WS34 */
-+	{ RCAR_GP_PIN(6,  5),    PU5, 12 },	/* SSI_SCK34 */
-+	{ RCAR_GP_PIN(6,  4),    PU5, 11 },	/* SSI_SDATA2_A */
-+	{ RCAR_GP_PIN(6,  3),    PU5, 10 },	/* SSI_SDATA1_A */
-+	{ RCAR_GP_PIN(6,  2),    PU5,  9 },	/* SSI_SDATA0 */
-+	{ RCAR_GP_PIN(6,  1),    PU5,  8 },	/* SSI_WS01239 */
-+	{ RCAR_GP_PIN(6,  0),    PU5,  7 },	/* SSI_SCK01239 */
-+	{ PIN_NUMBER('H', 37),   PU5,  6 },	/* MLB_REF */
-+	{ RCAR_GP_PIN(5, 25),    PU5,  5 },	/* MLB_DAT */
-+	{ RCAR_GP_PIN(5, 24),    PU5,  4 },	/* MLB_SIG */
-+	{ RCAR_GP_PIN(5, 23),    PU5,  3 },	/* MLB_CLK */
-+	{ RCAR_GP_PIN(5, 22),    PU5,  2 },	/* MSIOF0_RXD */
-+	{ RCAR_GP_PIN(5, 21),    PU5,  1 },	/* MSIOF0_SS2 */
-+	{ RCAR_GP_PIN(5, 20),    PU5,  0 },	/* MSIOF0_TXD */
-+
-+	{ RCAR_GP_PIN(6, 31),    PU6,  6 },	/* USB31_OVC */
-+	{ RCAR_GP_PIN(6, 30),    PU6,  5 },	/* USB31_PWEN */
-+	{ RCAR_GP_PIN(6, 29),    PU6,  4 },	/* USB30_OVC */
-+	{ RCAR_GP_PIN(6, 28),    PU6,  3 },	/* USB30_PWEN */
-+	{ RCAR_GP_PIN(6, 27),    PU6,  2 },	/* USB1_OVC */
-+	{ RCAR_GP_PIN(6, 26),    PU6,  1 },	/* USB1_PWEN */
-+	{ RCAR_GP_PIN(6, 25),    PU6,  0 },	/* USB0_OVC */
- };
- 
- static unsigned int r8a7795_pinmux_get_bias(struct sh_pfc *pfc,
diff --git a/patches.renesas/0164-clk-renesas-rcar-gen3-cpg-Always-use-readl-writel.patch b/patches.renesas/0164-clk-renesas-rcar-gen3-cpg-Always-use-readl-writel.patch
deleted file mode 100644
index 76c9584e2dae85..00000000000000
--- a/patches.renesas/0164-clk-renesas-rcar-gen3-cpg-Always-use-readl-writel.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 194219eba1439136d38bcf96becef558576125d7 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 21 Sep 2016 16:47:59 +0200
-Subject: [PATCH 164/299] clk: renesas: rcar-gen3-cpg: Always use
- readl()/writel()
-
-The R-Car Gen3 CPG/MSSR driver uses a mix of clk_readl()/clk_writel()
-and readl()/writel() to access the clock registers. Settle on the
-generic readl()/writel().
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Stephen Boyd <sboyd@codeaurora.org>
-(cherry picked from commit 30ad3cf00e94f4a77775d851de15549099f0224e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/rcar-gen3-cpg.c |   14 +++++++-------
- 1 file changed, 7 insertions(+), 7 deletions(-)
-
---- a/drivers/clk/renesas/rcar-gen3-cpg.c
-+++ b/drivers/clk/renesas/rcar-gen3-cpg.c
-@@ -98,7 +98,7 @@ static int cpg_sd_clock_enable(struct cl
- 	u32 val, sd_fc;
- 	unsigned int i;
- 
--	val = clk_readl(clock->reg);
-+	val = readl(clock->reg);
- 
- 	sd_fc = val & CPG_SD_FC_MASK;
- 	for (i = 0; i < clock->div_num; i++)
-@@ -111,7 +111,7 @@ static int cpg_sd_clock_enable(struct cl
- 	val &= ~(CPG_SD_STP_MASK);
- 	val |= clock->div_table[i].val & CPG_SD_STP_MASK;
- 
--	clk_writel(val, clock->reg);
-+	writel(val, clock->reg);
- 
- 	return 0;
- }
-@@ -120,14 +120,14 @@ static void cpg_sd_clock_disable(struct
- {
- 	struct sd_clock *clock = to_sd_clock(hw);
- 
--	clk_writel(clk_readl(clock->reg) | CPG_SD_STP_MASK, clock->reg);
-+	writel(readl(clock->reg) | CPG_SD_STP_MASK, clock->reg);
- }
- 
- static int cpg_sd_clock_is_enabled(struct clk_hw *hw)
- {
- 	struct sd_clock *clock = to_sd_clock(hw);
- 
--	return !(clk_readl(clock->reg) & CPG_SD_STP_MASK);
-+	return !(readl(clock->reg) & CPG_SD_STP_MASK);
- }
- 
- static unsigned long cpg_sd_clock_recalc_rate(struct clk_hw *hw,
-@@ -138,7 +138,7 @@ static unsigned long cpg_sd_clock_recalc
- 	u32 val, sd_fc;
- 	unsigned int i;
- 
--	val = clk_readl(clock->reg);
-+	val = readl(clock->reg);
- 
- 	sd_fc = val & CPG_SD_FC_MASK;
- 	for (i = 0; i < clock->div_num; i++)
-@@ -189,10 +189,10 @@ static int cpg_sd_clock_set_rate(struct
- 	if (i >= clock->div_num)
- 		return -EINVAL;
- 
--	val = clk_readl(clock->reg);
-+	val = readl(clock->reg);
- 	val &= ~(CPG_SD_STP_MASK | CPG_SD_FC_MASK);
- 	val |= clock->div_table[i].val & (CPG_SD_STP_MASK | CPG_SD_FC_MASK);
--	clk_writel(val, clock->reg);
-+	writel(val, clock->reg);
- 
- 	return 0;
- }
diff --git a/patches.renesas/0164-pinctrl-sh-pfc-r8a7796-Add-CAN-support.patch b/patches.renesas/0164-pinctrl-sh-pfc-r8a7796-Add-CAN-support.patch
deleted file mode 100644
index 8a93d589a7e037..00000000000000
--- a/patches.renesas/0164-pinctrl-sh-pfc-r8a7796-Add-CAN-support.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-From 8dce3caf9d6ff741fbff23389f0d6c50b4b85043 Mon Sep 17 00:00:00 2001
-From: Chris Paterson <chris.paterson2@renesas.com>
-Date: Tue, 22 Nov 2016 13:49:02 +0000
-Subject: [PATCH 164/255] pinctrl: sh-pfc: r8a7796: Add CAN support
-
-This patch adds CAN[0-1] pinmux support to r8a7796 SoC.
-
-Based on a patch for r8a7795 by Ramesh Shanmugasundaram.
-
-Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit cf75341accab1a90895936cff380c38f6d0777f5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7796.c |   52 +++++++++++++++++++++++++++++++++++
- 1 file changed, 52 insertions(+)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-@@ -1647,6 +1647,38 @@ static const unsigned int avb_avtp_captu
- 	AVB_AVTP_CAPTURE_B_MARK,
- };
- 
-+/* - CAN ------------------------------------------------------------------ */
-+static const unsigned int can0_data_a_pins[] = {
-+	/* TX, RX */
-+	RCAR_GP_PIN(1, 23),	RCAR_GP_PIN(1, 24),
-+};
-+static const unsigned int can0_data_a_mux[] = {
-+	CAN0_TX_A_MARK,		CAN0_RX_A_MARK,
-+};
-+static const unsigned int can0_data_b_pins[] = {
-+	/* TX, RX */
-+	RCAR_GP_PIN(2, 0),	RCAR_GP_PIN(2, 1),
-+};
-+static const unsigned int can0_data_b_mux[] = {
-+	CAN0_TX_B_MARK,		CAN0_RX_B_MARK,
-+};
-+static const unsigned int can1_data_pins[] = {
-+	/* TX, RX */
-+	RCAR_GP_PIN(1, 22),	RCAR_GP_PIN(1, 26),
-+};
-+static const unsigned int can1_data_mux[] = {
-+	CAN1_TX_MARK,		CAN1_RX_MARK,
-+};
-+
-+/* - CAN Clock -------------------------------------------------------------- */
-+static const unsigned int can_clk_pins[] = {
-+	/* CLK */
-+	RCAR_GP_PIN(1, 25),
-+};
-+static const unsigned int can_clk_mux[] = {
-+	CAN_CLK_MARK,
-+};
-+
- /* - DRIF0 --------------------------------------------------------------- */
- static const unsigned int drif0_ctrl_a_pins[] = {
- 	/* CLK, SYNC */
-@@ -2425,6 +2457,10 @@ static const struct sh_pfc_pin_group pin
- 	SH_PFC_PIN_GROUP(avb_avtp_capture_a),
- 	SH_PFC_PIN_GROUP(avb_avtp_match_b),
- 	SH_PFC_PIN_GROUP(avb_avtp_capture_b),
-+	SH_PFC_PIN_GROUP(can0_data_a),
-+	SH_PFC_PIN_GROUP(can0_data_b),
-+	SH_PFC_PIN_GROUP(can1_data),
-+	SH_PFC_PIN_GROUP(can_clk),
- 	SH_PFC_PIN_GROUP(drif0_ctrl_a),
- 	SH_PFC_PIN_GROUP(drif0_data0_a),
- 	SH_PFC_PIN_GROUP(drif0_data1_a),
-@@ -2539,6 +2575,19 @@ static const char * const avb_groups[] =
- 	"avb_avtp_capture_b",
- };
- 
-+static const char * const can0_groups[] = {
-+	"can0_data_a",
-+	"can0_data_b",
-+};
-+
-+static const char * const can1_groups[] = {
-+	"can1_data",
-+};
-+
-+static const char * const can_clk_groups[] = {
-+	"can_clk",
-+};
-+
- static const char * const drif0_groups[] = {
- 	"drif0_ctrl_a",
- 	"drif0_data0_a",
-@@ -2698,6 +2747,9 @@ static const char * const sdhi3_groups[]
- 
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(avb),
-+	SH_PFC_FUNCTION(can0),
-+	SH_PFC_FUNCTION(can1),
-+	SH_PFC_FUNCTION(can_clk),
- 	SH_PFC_FUNCTION(drif0),
- 	SH_PFC_FUNCTION(drif1),
- 	SH_PFC_FUNCTION(drif2),
diff --git a/patches.renesas/0165-clk-renesas-r8a7796-Add-DRIF-clock.patch b/patches.renesas/0165-clk-renesas-r8a7796-Add-DRIF-clock.patch
deleted file mode 100644
index 105780724cbb08..00000000000000
--- a/patches.renesas/0165-clk-renesas-r8a7796-Add-DRIF-clock.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From fca995a2d51a8a0ad429ebea49c8ea2995fe9309 Mon Sep 17 00:00:00 2001
-From: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
-Date: Thu, 13 Oct 2016 10:31:48 +0100
-Subject: [PATCH 165/299] clk: renesas: r8a7796: Add DRIF clock
-
-This patch adds DRIF module clocks for r8a7796 SoC.
-
-Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
-Acked-by: Stephen Boyd <sboyd@codeaurora.org>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit cf31bc71c0f8cdf9c6529ff49b4928ea27b652e2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -128,6 +128,14 @@ static const struct mssr_mod_clk r8a7796
- 	DEF_MOD("sdif0",		 314,	R8A7796_CLK_SD0),
- 	DEF_MOD("rwdt0",		 402,	R8A7796_CLK_R),
- 	DEF_MOD("intc-ap",		 408,	R8A7796_CLK_S3D1),
-+	DEF_MOD("drif7",		 508,	R8A7796_CLK_S3D2),
-+	DEF_MOD("drif6",		 509,	R8A7796_CLK_S3D2),
-+	DEF_MOD("drif5",		 510,	R8A7796_CLK_S3D2),
-+	DEF_MOD("drif4",		 511,	R8A7796_CLK_S3D2),
-+	DEF_MOD("drif3",		 512,	R8A7796_CLK_S3D2),
-+	DEF_MOD("drif2",		 513,	R8A7796_CLK_S3D2),
-+	DEF_MOD("drif1",		 514,	R8A7796_CLK_S3D2),
-+	DEF_MOD("drif0",		 515,	R8A7796_CLK_S3D2),
- 	DEF_MOD("hscif4",		 516,	R8A7796_CLK_S3D1),
- 	DEF_MOD("hscif3",		 517,	R8A7796_CLK_S3D1),
- 	DEF_MOD("hscif2",		 518,	R8A7796_CLK_S3D1),
diff --git a/patches.renesas/0165-pinctrl-sh-pfc-r8a7795-Add-support-for-R-Car-H3-ES2..patch b/patches.renesas/0165-pinctrl-sh-pfc-r8a7795-Add-support-for-R-Car-H3-ES2..patch
deleted file mode 100644
index e9071410345f78..00000000000000
--- a/patches.renesas/0165-pinctrl-sh-pfc-r8a7795-Add-support-for-R-Car-H3-ES2..patch
+++ /dev/null
@@ -1,10457 +0,0 @@
-From 3442a66c50cd9af39485629f0a4224cd630af46d Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 3 Oct 2016 14:49:57 +0200
-Subject: [PATCH 165/286] pinctrl: sh-pfc: r8a7795: Add support for R-Car H3
- ES2.0
-
-The Pin Function Controller module in the R-Car H3 ES2.0 differs from
-ES1.x in many ways.
-
-The goal is twofold:
-  1. Support both the ES1.x and ES2.0 SoC revisions in a single binary
-     for now,
-  2. Make it clear which code supports ES1.x, so it can easily be
-     identified and removed later, when production SoCs are deemed
-     ubiquitous.
-
-Hence this patch:
-  1. Extracts the support for R-Car H3 ES1.x into a separate file, as
-     the differences are quite large,
-  2. Adds code for detecting the SoC revision at runtime using the new
-     soc_device_match() API, and selecting pinctrl tables for the actual
-     SoC revision,
-  3. Replaces the core register and bitfield definitions by their
-     counterparts for R-Car H3 ES2.0.
-
-The addition of pins, groups, and functions for the various on-chip
-devices is left to subsequent patches.
-
-The R-Car H3 ES2.0 register and bitfield definitions were extracted from
-a patch in the BSP by Takeshi Kihara.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-(cherry picked from commit b205914c8f822ef2464b741c64e892823d685ad6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/Makefile          |    1 
- drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | 5705 +++++++++++++++++++++++++++++++
- drivers/pinctrl/sh-pfc/pfc-r8a7795.c     | 4396 +++--------------------
- drivers/pinctrl/sh-pfc/sh_pfc.h          |    1 
- 4 files changed, 6411 insertions(+), 3692 deletions(-)
- create mode 100644 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
-
---- a/drivers/pinctrl/sh-pfc/Makefile
-+++ b/drivers/pinctrl/sh-pfc/Makefile
-@@ -11,6 +11,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7792)	+= pfc
- obj-$(CONFIG_PINCTRL_PFC_R8A7793)	+= pfc-r8a7791.o
- obj-$(CONFIG_PINCTRL_PFC_R8A7794)	+= pfc-r8a7794.o
- obj-$(CONFIG_PINCTRL_PFC_R8A7795)	+= pfc-r8a7795.o
-+obj-$(CONFIG_PINCTRL_PFC_R8A7795)	+= pfc-r8a7795-es1.o
- obj-$(CONFIG_PINCTRL_PFC_R8A7796)	+= pfc-r8a7796.o
- obj-$(CONFIG_PINCTRL_PFC_SH7203)	+= pfc-sh7203.o
- obj-$(CONFIG_PINCTRL_PFC_SH7264)	+= pfc-sh7264.o
---- /dev/null
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
-@@ -0,0 +1,5705 @@
-+/*
-+ * R8A7795 ES1.x processor support - PFC hardware block.
-+ *
-+ * Copyright (C) 2015  Renesas Electronics Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ */
-+
-+#include <linux/kernel.h>
-+
-+#include "core.h"
-+#include "sh_pfc.h"
-+
-+#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | \
-+		   SH_PFC_PIN_CFG_PULL_UP | \
-+		   SH_PFC_PIN_CFG_PULL_DOWN)
-+
-+#define CPU_ALL_PORT(fn, sfx)						\
-+	PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_28(1, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE),	\
-+	PORT_GP_CFG_1(3, 12, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_1(3, 13, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_1(3, 14, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_1(3, 15, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_18(4, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE),	\
-+	PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS),	\
-+	PORT_GP_CFG_4(7, fn, sfx, CFG_FLAGS)
-+/*
-+ * F_() : just information
-+ * FM() : macro for FN_xxx / xxx_MARK
-+ */
-+
-+/* GPSR0 */
-+#define GPSR0_15	F_(D15,			IP7_11_8)
-+#define GPSR0_14	F_(D14,			IP7_7_4)
-+#define GPSR0_13	F_(D13,			IP7_3_0)
-+#define GPSR0_12	F_(D12,			IP6_31_28)
-+#define GPSR0_11	F_(D11,			IP6_27_24)
-+#define GPSR0_10	F_(D10,			IP6_23_20)
-+#define GPSR0_9		F_(D9,			IP6_19_16)
-+#define GPSR0_8		F_(D8,			IP6_15_12)
-+#define GPSR0_7		F_(D7,			IP6_11_8)
-+#define GPSR0_6		F_(D6,			IP6_7_4)
-+#define GPSR0_5		F_(D5,			IP6_3_0)
-+#define GPSR0_4		F_(D4,			IP5_31_28)
-+#define GPSR0_3		F_(D3,			IP5_27_24)
-+#define GPSR0_2		F_(D2,			IP5_23_20)
-+#define GPSR0_1		F_(D1,			IP5_19_16)
-+#define GPSR0_0		F_(D0,			IP5_15_12)
-+
-+/* GPSR1 */
-+#define GPSR1_27	F_(EX_WAIT0_A,		IP5_11_8)
-+#define GPSR1_26	F_(WE1_N,		IP5_7_4)
-+#define GPSR1_25	F_(WE0_N,		IP5_3_0)
-+#define GPSR1_24	F_(RD_WR_N,		IP4_31_28)
-+#define GPSR1_23	F_(RD_N,		IP4_27_24)
-+#define GPSR1_22	F_(BS_N,		IP4_23_20)
-+#define GPSR1_21	F_(CS1_N_A26,		IP4_19_16)
-+#define GPSR1_20	F_(CS0_N,		IP4_15_12)
-+#define GPSR1_19	F_(A19,			IP4_11_8)
-+#define GPSR1_18	F_(A18,			IP4_7_4)
-+#define GPSR1_17	F_(A17,			IP4_3_0)
-+#define GPSR1_16	F_(A16,			IP3_31_28)
-+#define GPSR1_15	F_(A15,			IP3_27_24)
-+#define GPSR1_14	F_(A14,			IP3_23_20)
-+#define GPSR1_13	F_(A13,			IP3_19_16)
-+#define GPSR1_12	F_(A12,			IP3_15_12)
-+#define GPSR1_11	F_(A11,			IP3_11_8)
-+#define GPSR1_10	F_(A10,			IP3_7_4)
-+#define GPSR1_9		F_(A9,			IP3_3_0)
-+#define GPSR1_8		F_(A8,			IP2_31_28)
-+#define GPSR1_7		F_(A7,			IP2_27_24)
-+#define GPSR1_6		F_(A6,			IP2_23_20)
-+#define GPSR1_5		F_(A5,			IP2_19_16)
-+#define GPSR1_4		F_(A4,			IP2_15_12)
-+#define GPSR1_3		F_(A3,			IP2_11_8)
-+#define GPSR1_2		F_(A2,			IP2_7_4)
-+#define GPSR1_1		F_(A1,			IP2_3_0)
-+#define GPSR1_0		F_(A0,			IP1_31_28)
-+
-+/* GPSR2 */
-+#define GPSR2_14	F_(AVB_AVTP_CAPTURE_A,	IP0_23_20)
-+#define GPSR2_13	F_(AVB_AVTP_MATCH_A,	IP0_19_16)
-+#define GPSR2_12	F_(AVB_LINK,		IP0_15_12)
-+#define GPSR2_11	F_(AVB_PHY_INT,		IP0_11_8)
-+#define GPSR2_10	F_(AVB_MAGIC,		IP0_7_4)
-+#define GPSR2_9		F_(AVB_MDC,		IP0_3_0)
-+#define GPSR2_8		F_(PWM2_A,		IP1_27_24)
-+#define GPSR2_7		F_(PWM1_A,		IP1_23_20)
-+#define GPSR2_6		F_(PWM0,		IP1_19_16)
-+#define GPSR2_5		F_(IRQ5,		IP1_15_12)
-+#define GPSR2_4		F_(IRQ4,		IP1_11_8)
-+#define GPSR2_3		F_(IRQ3,		IP1_7_4)
-+#define GPSR2_2		F_(IRQ2,		IP1_3_0)
-+#define GPSR2_1		F_(IRQ1,		IP0_31_28)
-+#define GPSR2_0		F_(IRQ0,		IP0_27_24)
-+
-+/* GPSR3 */
-+#define GPSR3_15	F_(SD1_WP,		IP10_23_20)
-+#define GPSR3_14	F_(SD1_CD,		IP10_19_16)
-+#define GPSR3_13	F_(SD0_WP,		IP10_15_12)
-+#define GPSR3_12	F_(SD0_CD,		IP10_11_8)
-+#define GPSR3_11	F_(SD1_DAT3,		IP8_31_28)
-+#define GPSR3_10	F_(SD1_DAT2,		IP8_27_24)
-+#define GPSR3_9		F_(SD1_DAT1,		IP8_23_20)
-+#define GPSR3_8		F_(SD1_DAT0,		IP8_19_16)
-+#define GPSR3_7		F_(SD1_CMD,		IP8_15_12)
-+#define GPSR3_6		F_(SD1_CLK,		IP8_11_8)
-+#define GPSR3_5		F_(SD0_DAT3,		IP8_7_4)
-+#define GPSR3_4		F_(SD0_DAT2,		IP8_3_0)
-+#define GPSR3_3		F_(SD0_DAT1,		IP7_31_28)
-+#define GPSR3_2		F_(SD0_DAT0,		IP7_27_24)
-+#define GPSR3_1		F_(SD0_CMD,		IP7_23_20)
-+#define GPSR3_0		F_(SD0_CLK,		IP7_19_16)
-+
-+/* GPSR4 */
-+#define GPSR4_17	FM(SD3_DS)
-+#define GPSR4_16	F_(SD3_DAT7,		IP10_7_4)
-+#define GPSR4_15	F_(SD3_DAT6,		IP10_3_0)
-+#define GPSR4_14	F_(SD3_DAT5,		IP9_31_28)
-+#define GPSR4_13	F_(SD3_DAT4,		IP9_27_24)
-+#define GPSR4_12	FM(SD3_DAT3)
-+#define GPSR4_11	FM(SD3_DAT2)
-+#define GPSR4_10	FM(SD3_DAT1)
-+#define GPSR4_9		FM(SD3_DAT0)
-+#define GPSR4_8		FM(SD3_CMD)
-+#define GPSR4_7		FM(SD3_CLK)
-+#define GPSR4_6		F_(SD2_DS,		IP9_23_20)
-+#define GPSR4_5		F_(SD2_DAT3,		IP9_19_16)
-+#define GPSR4_4		F_(SD2_DAT2,		IP9_15_12)
-+#define GPSR4_3		F_(SD2_DAT1,		IP9_11_8)
-+#define GPSR4_2		F_(SD2_DAT0,		IP9_7_4)
-+#define GPSR4_1		FM(SD2_CMD)
-+#define GPSR4_0		F_(SD2_CLK,		IP9_3_0)
-+
-+/* GPSR5 */
-+#define GPSR5_25	F_(MLB_DAT,		IP13_19_16)
-+#define GPSR5_24	F_(MLB_SIG,		IP13_15_12)
-+#define GPSR5_23	F_(MLB_CLK,		IP13_11_8)
-+#define GPSR5_22	FM(MSIOF0_RXD)
-+#define GPSR5_21	F_(MSIOF0_SS2,		IP13_7_4)
-+#define GPSR5_20	FM(MSIOF0_TXD)
-+#define GPSR5_19	F_(MSIOF0_SS1,		IP13_3_0)
-+#define GPSR5_18	F_(MSIOF0_SYNC,		IP12_31_28)
-+#define GPSR5_17	FM(MSIOF0_SCK)
-+#define GPSR5_16	F_(HRTS0_N,		IP12_27_24)
-+#define GPSR5_15	F_(HCTS0_N,		IP12_23_20)
-+#define GPSR5_14	F_(HTX0,		IP12_19_16)
-+#define GPSR5_13	F_(HRX0,		IP12_15_12)
-+#define GPSR5_12	F_(HSCK0,		IP12_11_8)
-+#define GPSR5_11	F_(RX2_A,		IP12_7_4)
-+#define GPSR5_10	F_(TX2_A,		IP12_3_0)
-+#define GPSR5_9		F_(SCK2,		IP11_31_28)
-+#define GPSR5_8		F_(RTS1_N_TANS,		IP11_27_24)
-+#define GPSR5_7		F_(CTS1_N,		IP11_23_20)
-+#define GPSR5_6		F_(TX1_A,		IP11_19_16)
-+#define GPSR5_5		F_(RX1_A,		IP11_15_12)
-+#define GPSR5_4		F_(RTS0_N_TANS,		IP11_11_8)
-+#define GPSR5_3		F_(CTS0_N,		IP11_7_4)
-+#define GPSR5_2		F_(TX0,			IP11_3_0)
-+#define GPSR5_1		F_(RX0,			IP10_31_28)
-+#define GPSR5_0		F_(SCK0,		IP10_27_24)
-+
-+/* GPSR6 */
-+#define GPSR6_31	F_(USB31_OVC,		IP17_7_4)
-+#define GPSR6_30	F_(USB31_PWEN,		IP17_3_0)
-+#define GPSR6_29	F_(USB30_OVC,		IP16_31_28)
-+#define GPSR6_28	F_(USB30_PWEN,		IP16_27_24)
-+#define GPSR6_27	F_(USB1_OVC,		IP16_23_20)
-+#define GPSR6_26	F_(USB1_PWEN,		IP16_19_16)
-+#define GPSR6_25	F_(USB0_OVC,		IP16_15_12)
-+#define GPSR6_24	F_(USB0_PWEN,		IP16_11_8)
-+#define GPSR6_23	F_(AUDIO_CLKB_B,	IP16_7_4)
-+#define GPSR6_22	F_(AUDIO_CLKA_A,	IP16_3_0)
-+#define GPSR6_21	F_(SSI_SDATA9_A,	IP15_31_28)
-+#define GPSR6_20	F_(SSI_SDATA8,		IP15_27_24)
-+#define GPSR6_19	F_(SSI_SDATA7,		IP15_23_20)
-+#define GPSR6_18	F_(SSI_WS78,		IP15_19_16)
-+#define GPSR6_17	F_(SSI_SCK78,		IP15_15_12)
-+#define GPSR6_16	F_(SSI_SDATA6,		IP15_11_8)
-+#define GPSR6_15	F_(SSI_WS6,		IP15_7_4)
-+#define GPSR6_14	F_(SSI_SCK6,		IP15_3_0)
-+#define GPSR6_13	FM(SSI_SDATA5)
-+#define GPSR6_12	FM(SSI_WS5)
-+#define GPSR6_11	FM(SSI_SCK5)
-+#define GPSR6_10	F_(SSI_SDATA4,		IP14_31_28)
-+#define GPSR6_9		F_(SSI_WS4,		IP14_27_24)
-+#define GPSR6_8		F_(SSI_SCK4,		IP14_23_20)
-+#define GPSR6_7		F_(SSI_SDATA3,		IP14_19_16)
-+#define GPSR6_6		F_(SSI_WS34,		IP14_15_12)
-+#define GPSR6_5		F_(SSI_SCK34,		IP14_11_8)
-+#define GPSR6_4		F_(SSI_SDATA2_A,	IP14_7_4)
-+#define GPSR6_3		F_(SSI_SDATA1_A,	IP14_3_0)
-+#define GPSR6_2		F_(SSI_SDATA0,		IP13_31_28)
-+#define GPSR6_1		F_(SSI_WS01239,		IP13_27_24)
-+#define GPSR6_0		F_(SSI_SCK01239,	IP13_23_20)
-+
-+/* GPSR7 */
-+#define GPSR7_3		FM(HDMI1_CEC)
-+#define GPSR7_2		FM(HDMI0_CEC)
-+#define GPSR7_1		FM(AVS2)
-+#define GPSR7_0		FM(AVS1)
-+
-+
-+/* IPSRx */		/* 0 */			/* 1 */		/* 2 */			/* 3 */				/* 4 */		/* 5 */		/* 6 */			/* 7 */		/* 8 */			/* 9 */		/* A */		/* B */		/* C - F */
-+#define IP0_3_0		FM(AVB_MDC)		F_(0, 0)	FM(MSIOF2_SS2_C)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP0_7_4		FM(AVB_MAGIC)		F_(0, 0)	FM(MSIOF2_SS1_C)	FM(SCK4_A)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP0_11_8	FM(AVB_PHY_INT)		F_(0, 0)	FM(MSIOF2_SYNC_C)	FM(RX4_A)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP0_15_12	FM(AVB_LINK)		F_(0, 0)	FM(MSIOF2_SCK_C)	FM(TX4_A)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP0_19_16	FM(AVB_AVTP_MATCH_A)	F_(0, 0)	FM(MSIOF2_RXD_C)	FM(CTS4_N_A)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP0_23_20	FM(AVB_AVTP_CAPTURE_A)	F_(0, 0)	FM(MSIOF2_TXD_C)	FM(RTS4_N_TANS_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP0_27_24	FM(IRQ0)		FM(QPOLB)	F_(0, 0)		FM(DU_CDE)			FM(VI4_DATA0_B)	FM(CAN0_TX_B)	FM(CANFD0_TX_B)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP0_31_28	FM(IRQ1)		FM(QPOLA)	F_(0, 0)		FM(DU_DISP)			FM(VI4_DATA1_B)	FM(CAN0_RX_B)	FM(CANFD0_RX_B)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP1_3_0		FM(IRQ2)		FM(QCPV_QDE)	F_(0, 0)		FM(DU_EXODDF_DU_ODDF_DISP_CDE)	FM(VI4_DATA2_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(PWM3_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP1_7_4		FM(IRQ3)		FM(QSTVB_QVE)	FM(A25)			FM(DU_DOTCLKOUT1)		FM(VI4_DATA3_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(PWM4_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP1_11_8	FM(IRQ4)		FM(QSTH_QHS)	FM(A24)			FM(DU_EXHSYNC_DU_HSYNC)		FM(VI4_DATA4_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(PWM5_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP1_15_12	FM(IRQ5)		FM(QSTB_QHE)	FM(A23)			FM(DU_EXVSYNC_DU_VSYNC)		FM(VI4_DATA5_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(PWM6_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP1_19_16	FM(PWM0)		FM(AVB_AVTP_PPS)FM(A22)			F_(0, 0)			FM(VI4_DATA6_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(IECLK_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP1_23_20	FM(PWM1_A)		F_(0, 0)	FM(A21)			FM(HRX3_D)			FM(VI4_DATA7_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(IERX_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP1_27_24	FM(PWM2_A)		F_(0, 0)	FM(A20)			FM(HTX3_D)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(IETX_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP1_31_28	FM(A0)			FM(LCDOUT16)	FM(MSIOF3_SYNC_B)	F_(0, 0)			FM(VI4_DATA8)	F_(0, 0)	FM(DU_DB0)		F_(0, 0)	F_(0, 0)		FM(PWM3_A)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP2_3_0		FM(A1)			FM(LCDOUT17)	FM(MSIOF3_TXD_B)	F_(0, 0)			FM(VI4_DATA9)	F_(0, 0)	FM(DU_DB1)		F_(0, 0)	F_(0, 0)		FM(PWM4_A)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP2_7_4		FM(A2)			FM(LCDOUT18)	FM(MSIOF3_SCK_B)	F_(0, 0)			FM(VI4_DATA10)	F_(0, 0)	FM(DU_DB2)		F_(0, 0)	F_(0, 0)		FM(PWM5_A)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP2_11_8	FM(A3)			FM(LCDOUT19)	FM(MSIOF3_RXD_B)	F_(0, 0)			FM(VI4_DATA11)	F_(0, 0)	FM(DU_DB3)		F_(0, 0)	F_(0, 0)		FM(PWM6_A)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+
-+/* IPSRx */		/* 0 */			/* 1 */		/* 2 */			/* 3 */				/* 4 */		/* 5 */		/* 6 */			/* 7 */		/* 8 */			/* 9 */		/* A */		/* B */		/* C - F */
-+#define IP2_15_12	FM(A4)			FM(LCDOUT20)	FM(MSIOF3_SS1_B)	F_(0, 0)			FM(VI4_DATA12)	FM(VI5_DATA12)	FM(DU_DB4)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP2_19_16	FM(A5)			FM(LCDOUT21)	FM(MSIOF3_SS2_B)	FM(SCK4_B)			FM(VI4_DATA13)	FM(VI5_DATA13)	FM(DU_DB5)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP2_23_20	FM(A6)			FM(LCDOUT22)	FM(MSIOF2_SS1_A)	FM(RX4_B)			FM(VI4_DATA14)	FM(VI5_DATA14)	FM(DU_DB6)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP2_27_24	FM(A7)			FM(LCDOUT23)	FM(MSIOF2_SS2_A)	FM(TX4_B)			FM(VI4_DATA15)	FM(VI5_DATA15)	FM(DU_DB7)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP2_31_28	FM(A8)			FM(RX3_B)	FM(MSIOF2_SYNC_A)	FM(HRX4_B)			F_(0, 0)	F_(0, 0)	F_(0, 0)		FM(SDA6_A)	FM(AVB_AVTP_MATCH_B)	FM(PWM1_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP3_3_0		FM(A9)			F_(0, 0)	FM(MSIOF2_SCK_A)	FM(CTS4_N_B)			F_(0, 0)	FM(VI5_VSYNC_N)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP3_7_4		FM(A10)			F_(0, 0)	FM(MSIOF2_RXD_A)	FM(RTS4_N_TANS_B)		F_(0, 0)	FM(VI5_HSYNC_N)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP3_11_8	FM(A11)			FM(TX3_B)	FM(MSIOF2_TXD_A)	FM(HTX4_B)			FM(HSCK4)	FM(VI5_FIELD)	F_(0, 0)		FM(SCL6_A)	FM(AVB_AVTP_CAPTURE_B)	FM(PWM2_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP3_15_12	FM(A12)			FM(LCDOUT12)	FM(MSIOF3_SCK_C)	F_(0, 0)			FM(HRX4_A)	FM(VI5_DATA8)	FM(DU_DG4)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP3_19_16	FM(A13)			FM(LCDOUT13)	FM(MSIOF3_SYNC_C)	F_(0, 0)			FM(HTX4_A)	FM(VI5_DATA9)	FM(DU_DG5)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP3_23_20	FM(A14)			FM(LCDOUT14)	FM(MSIOF3_RXD_C)	F_(0, 0)			FM(HCTS4_N)	FM(VI5_DATA10)	FM(DU_DG6)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP3_27_24	FM(A15)			FM(LCDOUT15)	FM(MSIOF3_TXD_C)	F_(0, 0)			FM(HRTS4_N)	FM(VI5_DATA11)	FM(DU_DG7)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP3_31_28	FM(A16)			FM(LCDOUT8)	F_(0, 0)		F_(0, 0)			FM(VI4_FIELD)	F_(0, 0)	FM(DU_DG0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP4_3_0		FM(A17)			FM(LCDOUT9)	F_(0, 0)		F_(0, 0)			FM(VI4_VSYNC_N)	F_(0, 0)	FM(DU_DG1)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP4_7_4		FM(A18)			FM(LCDOUT10)	F_(0, 0)		F_(0, 0)			FM(VI4_HSYNC_N)	F_(0, 0)	FM(DU_DG2)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP4_11_8	FM(A19)			FM(LCDOUT11)	F_(0, 0)		F_(0, 0)			FM(VI4_CLKENB)	F_(0, 0)	FM(DU_DG3)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP4_15_12	FM(CS0_N)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(VI5_CLKENB)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP4_19_16	FM(CS1_N_A26)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(VI5_CLK)	F_(0, 0)		FM(EX_WAIT0_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP4_23_20	FM(BS_N)		FM(QSTVA_QVS)	FM(MSIOF3_SCK_D)	FM(SCK3)			FM(HSCK3)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(CAN1_TX)		FM(CANFD1_TX)	FM(IETX_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP4_27_24	FM(RD_N)		F_(0, 0)	FM(MSIOF3_SYNC_D)	FM(RX3_A)			FM(HRX3_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(CAN0_TX_A)		FM(CANFD0_TX_A)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP4_31_28	FM(RD_WR_N)		F_(0, 0)	FM(MSIOF3_RXD_D)	FM(TX3_A)			FM(HTX3_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(CAN0_RX_A)		FM(CANFD0_RX_A)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP5_3_0		FM(WE0_N)		F_(0, 0)	FM(MSIOF3_TXD_D)	FM(CTS3_N)			FM(HCTS3_N)	F_(0, 0)	F_(0, 0)		FM(SCL6_B)	FM(CAN_CLK)		F_(0, 0)	FM(IECLK_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP5_7_4		FM(WE1_N)		F_(0, 0)	FM(MSIOF3_SS1_D)	FM(RTS3_N_TANS)			FM(HRTS3_N)	F_(0, 0)	F_(0, 0)		FM(SDA6_B)	FM(CAN1_RX)		FM(CANFD1_RX)	FM(IERX_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP5_11_8	FM(EX_WAIT0_A)		FM(QCLK)	F_(0, 0)		F_(0, 0)			FM(VI4_CLK)	F_(0, 0)	FM(DU_DOTCLKOUT0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP5_15_12	FM(D0)			FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A)	F_(0, 0)			FM(VI4_DATA16)	FM(VI5_DATA0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP5_19_16	FM(D1)			FM(MSIOF2_SS2_B)FM(MSIOF3_SYNC_A)	F_(0, 0)			FM(VI4_DATA17)	FM(VI5_DATA1)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP5_23_20	FM(D2)			F_(0, 0)	FM(MSIOF3_RXD_A)	F_(0, 0)			FM(VI4_DATA18)	FM(VI5_DATA2)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP5_27_24	FM(D3)			F_(0, 0)	FM(MSIOF3_TXD_A)	F_(0, 0)			FM(VI4_DATA19)	FM(VI5_DATA3)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP5_31_28	FM(D4)			FM(MSIOF2_SCK_B)F_(0, 0)		F_(0, 0)			FM(VI4_DATA20)	FM(VI5_DATA4)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP6_3_0		FM(D5)			FM(MSIOF2_SYNC_B)F_(0, 0)		F_(0, 0)			FM(VI4_DATA21)	FM(VI5_DATA5)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP6_7_4		FM(D6)			FM(MSIOF2_RXD_B)F_(0, 0)		F_(0, 0)			FM(VI4_DATA22)	FM(VI5_DATA6)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP6_11_8	FM(D7)			FM(MSIOF2_TXD_B)F_(0, 0)		F_(0, 0)			FM(VI4_DATA23)	FM(VI5_DATA7)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP6_15_12	FM(D8)			FM(LCDOUT0)	FM(MSIOF2_SCK_D)	FM(SCK4_C)			FM(VI4_DATA0_A)	F_(0, 0)	FM(DU_DR0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP6_19_16	FM(D9)			FM(LCDOUT1)	FM(MSIOF2_SYNC_D)	F_(0, 0)			FM(VI4_DATA1_A)	F_(0, 0)	FM(DU_DR1)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP6_23_20	FM(D10)			FM(LCDOUT2)	FM(MSIOF2_RXD_D)	FM(HRX3_B)			FM(VI4_DATA2_A)	FM(CTS4_N_C)	FM(DU_DR2)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP6_27_24	FM(D11)			FM(LCDOUT3)	FM(MSIOF2_TXD_D)	FM(HTX3_B)			FM(VI4_DATA3_A)	FM(RTS4_N_TANS_C)FM(DU_DR3)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP6_31_28	FM(D12)			FM(LCDOUT4)	FM(MSIOF2_SS1_D)	FM(RX4_C)			FM(VI4_DATA4_A)	F_(0, 0)	FM(DU_DR4)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP7_3_0		FM(D13)			FM(LCDOUT5)	FM(MSIOF2_SS2_D)	FM(TX4_C)			FM(VI4_DATA5_A)	F_(0, 0)	FM(DU_DR5)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP7_7_4		FM(D14)			FM(LCDOUT6)	FM(MSIOF3_SS1_A)	FM(HRX3_C)			FM(VI4_DATA6_A)	F_(0, 0)	FM(DU_DR6)		FM(SCL6_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP7_11_8	FM(D15)			FM(LCDOUT7)	FM(MSIOF3_SS2_A)	FM(HTX3_C)			FM(VI4_DATA7_A)	F_(0, 0)	FM(DU_DR7)		FM(SDA6_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP7_15_12	FM(FSCLKST)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP7_19_16	FM(SD0_CLK)		F_(0, 0)	FM(MSIOF1_SCK_E)	F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_OPWM_0_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+
-+/* IPSRx */		/* 0 */			/* 1 */		/* 2 */			/* 3 */				/* 4 */		/* 5 */		/* 6 */			/* 7 */		/* 8 */			/* 9 */		/* A */		/* B */		/* C - F */
-+#define IP7_23_20	FM(SD0_CMD)		F_(0, 0)	FM(MSIOF1_SYNC_E)	F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_IVCXO27_0_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP7_27_24	FM(SD0_DAT0)		F_(0, 0)	FM(MSIOF1_RXD_E)	F_(0, 0)			F_(0, 0)	FM(TS_SCK0_B)	FM(STP_ISCLK_0_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP7_31_28	FM(SD0_DAT1)		F_(0, 0)	FM(MSIOF1_TXD_E)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC0_B)FM(STP_ISSYNC_0_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP8_3_0		FM(SD0_DAT2)		F_(0, 0)	FM(MSIOF1_SS1_E)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT0_B)	FM(STP_ISD_0_B)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP8_7_4		FM(SD0_DAT3)		F_(0, 0)	FM(MSIOF1_SS2_E)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN0_B)	FM(STP_ISEN_0_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP8_11_8	FM(SD1_CLK)		F_(0, 0)	FM(MSIOF1_SCK_G)	F_(0, 0)			F_(0, 0)	FM(SIM0_CLK_A)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP8_15_12	FM(SD1_CMD)		F_(0, 0)	FM(MSIOF1_SYNC_G)	F_(0, 0)			F_(0, 0)	FM(SIM0_D_A)	FM(STP_IVCXO27_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP8_19_16	FM(SD1_DAT0)		FM(SD2_DAT4)	FM(MSIOF1_RXD_G)	F_(0, 0)			F_(0, 0)	FM(TS_SCK1_B)	FM(STP_ISCLK_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP8_23_20	FM(SD1_DAT1)		FM(SD2_DAT5)	FM(MSIOF1_TXD_G)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC1_B)FM(STP_ISSYNC_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP8_27_24	FM(SD1_DAT2)		FM(SD2_DAT6)	FM(MSIOF1_SS1_G)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT1_B)	FM(STP_ISD_1_B)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP8_31_28	FM(SD1_DAT3)		FM(SD2_DAT7)	FM(MSIOF1_SS2_G)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN1_B)	FM(STP_ISEN_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_3_0		FM(SD2_CLK)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_7_4		FM(SD2_DAT0)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_11_8	FM(SD2_DAT1)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_15_12	FM(SD2_DAT2)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_19_16	FM(SD2_DAT3)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_23_20	FM(SD2_DS)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(SATA_DEVSLP_B)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_27_24	FM(SD3_DAT4)		FM(SD2_CD_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_31_28	FM(SD3_DAT5)		FM(SD2_WP_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_3_0	FM(SD3_DAT6)		FM(SD3_CD)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_7_4	FM(SD3_DAT7)		FM(SD3_WP)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_11_8	FM(SD0_CD)		F_(0, 0)	F_(0, 0)		F_(0, 0)			FM(SCL2_B)	FM(SIM0_RST_A)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_15_12	FM(SD0_WP)		F_(0, 0)	F_(0, 0)		F_(0, 0)			FM(SDA2_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_19_16	FM(SD1_CD)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(SIM0_CLK_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_23_20	FM(SD1_WP)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(SIM0_D_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_27_24	FM(SCK0)		FM(HSCK1_B)	FM(MSIOF1_SS2_B)	FM(AUDIO_CLKC_B)		FM(SDA2_A)	FM(SIM0_RST_B)	FM(STP_OPWM_0_C)	FM(RIF0_CLK_B)	F_(0, 0)		FM(ADICHS2)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_31_28	FM(RX0)			FM(HRX1_B)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SCK0_C)	FM(STP_ISCLK_0_C)	FM(RIF0_D0_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_3_0	FM(TX0)			FM(HTX1_B)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC0_C)FM(STP_ISSYNC_0_C)	FM(RIF0_D1_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_7_4	FM(CTS0_N)		FM(HCTS1_N_B)	FM(MSIOF1_SYNC_B)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC1_C)FM(STP_ISSYNC_1_C)	FM(RIF1_SYNC_B)	FM(AUDIO_CLKOUT_C)	FM(ADICS_SAMP)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_11_8	FM(RTS0_N_TANS)		FM(HRTS1_N_B)	FM(MSIOF1_SS1_B)	FM(AUDIO_CLKA_B)		FM(SCL2_A)	F_(0, 0)	FM(STP_IVCXO27_1_C)	FM(RIF0_SYNC_B)	F_(0, 0)		FM(ADICHS1)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_15_12	FM(RX1_A)		FM(HRX1_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SDAT0_C)	FM(STP_ISD_0_C)		FM(RIF1_CLK_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_19_16	FM(TX1_A)		FM(HTX1_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SDEN0_C)	FM(STP_ISEN_0_C)	FM(RIF1_D0_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_23_20	FM(CTS1_N)		FM(HCTS1_N_A)	FM(MSIOF1_RXD_B)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN1_C)	FM(STP_ISEN_1_C)	FM(RIF1_D0_B)	F_(0, 0)		FM(ADIDATA)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_27_24	FM(RTS1_N_TANS)		FM(HRTS1_N_A)	FM(MSIOF1_TXD_B)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT1_C)	FM(STP_ISD_1_C)		FM(RIF1_D1_B)	F_(0, 0)		FM(ADICHS0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_31_28	FM(SCK2)		FM(SCIF_CLK_B)	FM(MSIOF1_SCK_B)	F_(0, 0)			F_(0, 0)	FM(TS_SCK1_C)	FM(STP_ISCLK_1_C)	FM(RIF1_CLK_B)	F_(0, 0)		FM(ADICLK)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP12_3_0	FM(TX2_A)		F_(0, 0)	F_(0, 0)		FM(SD2_CD_B)			FM(SCL1_A)	F_(0, 0)	FM(FMCLK_A)		FM(RIF1_D1_C)	F_(0, 0)		FM(FSO_CFE_0_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP12_7_4	FM(RX2_A)		F_(0, 0)	F_(0, 0)		FM(SD2_WP_B)			FM(SDA1_A)	F_(0, 0)	FM(FMIN_A)		FM(RIF1_SYNC_C)	F_(0, 0)		FM(FSO_CFE_1_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP12_11_8	FM(HSCK0)		F_(0, 0)	FM(MSIOF1_SCK_D)	FM(AUDIO_CLKB_A)		FM(SSI_SDATA1_B)FM(TS_SCK0_D)	FM(STP_ISCLK_0_D)	FM(RIF0_CLK_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP12_15_12	FM(HRX0)		F_(0, 0)	FM(MSIOF1_RXD_D)	F_(0, 0)			FM(SSI_SDATA2_B)FM(TS_SDEN0_D)	FM(STP_ISEN_0_D)	FM(RIF0_D0_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP12_19_16	FM(HTX0)		F_(0, 0)	FM(MSIOF1_TXD_D)	F_(0, 0)			FM(SSI_SDATA9_B)FM(TS_SDAT0_D)	FM(STP_ISD_0_D)		FM(RIF0_D1_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP12_23_20	FM(HCTS0_N)		FM(RX2_B)	FM(MSIOF1_SYNC_D)	F_(0, 0)			FM(SSI_SCK9_A)	FM(TS_SPSYNC0_D)FM(STP_ISSYNC_0_D)	FM(RIF0_SYNC_C)	FM(AUDIO_CLKOUT1_A)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP12_27_24	FM(HRTS0_N)		FM(TX2_B)	FM(MSIOF1_SS1_D)	F_(0, 0)			FM(SSI_WS9_A)	F_(0, 0)	FM(STP_IVCXO27_0_D)	FM(BPFCLK_A)	FM(AUDIO_CLKOUT2_A)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+
-+/* IPSRx */		/* 0 */			/* 1 */		/* 2 */			/* 3 */				/* 4 */		/* 5 */		/* 6 */			/* 7 */		/* 8 */			/* 9 */		/* A */		/* B */		/* C - F */
-+#define IP12_31_28	FM(MSIOF0_SYNC)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(AUDIO_CLKOUT_A)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_3_0	FM(MSIOF0_SS1)		FM(RX5)		F_(0, 0)		FM(AUDIO_CLKA_C)		FM(SSI_SCK2_A)	F_(0, 0)	FM(STP_IVCXO27_0_C)	F_(0, 0)	FM(AUDIO_CLKOUT3_A)	F_(0, 0)	FM(TCLK1_B)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_7_4	FM(MSIOF0_SS2)		FM(TX5)		FM(MSIOF1_SS2_D)	FM(AUDIO_CLKC_A)		FM(SSI_WS2_A)	F_(0, 0)	FM(STP_OPWM_0_D)	F_(0, 0)	FM(AUDIO_CLKOUT_D)	F_(0, 0)	FM(SPEEDIN_B)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_11_8	FM(MLB_CLK)		F_(0, 0)	FM(MSIOF1_SCK_F)	F_(0, 0)			FM(SCL1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_15_12	FM(MLB_SIG)		FM(RX1_B)	FM(MSIOF1_SYNC_F)	F_(0, 0)			FM(SDA1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_19_16	FM(MLB_DAT)		FM(TX1_B)	FM(MSIOF1_RXD_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_23_20	FM(SSI_SCK01239)	F_(0, 0)	FM(MSIOF1_TXD_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_27_24	FM(SSI_WS01239)		F_(0, 0)	FM(MSIOF1_SS1_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_31_28	FM(SSI_SDATA0)		F_(0, 0)	FM(MSIOF1_SS2_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP14_3_0	FM(SSI_SDATA1_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP14_7_4	FM(SSI_SDATA2_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)			FM(SSI_SCK1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP14_11_8	FM(SSI_SCK34)		F_(0, 0)	FM(MSIOF1_SS1_A)	F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_OPWM_0_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP14_15_12	FM(SSI_WS34)		FM(HCTS2_N_A)	FM(MSIOF1_SS2_A)	F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_IVCXO27_0_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP14_19_16	FM(SSI_SDATA3)		FM(HRTS2_N_A)	FM(MSIOF1_TXD_A)	F_(0, 0)			F_(0, 0)	FM(TS_SCK0_A)	FM(STP_ISCLK_0_A)	FM(RIF0_D1_A)	FM(RIF2_D0_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP14_23_20	FM(SSI_SCK4)		FM(HRX2_A)	FM(MSIOF1_SCK_A)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT0_A)	FM(STP_ISD_0_A)		FM(RIF0_CLK_A)	FM(RIF2_CLK_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP14_27_24	FM(SSI_WS4)		FM(HTX2_A)	FM(MSIOF1_SYNC_A)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN0_A)	FM(STP_ISEN_0_A)	FM(RIF0_SYNC_A)	FM(RIF2_SYNC_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP14_31_28	FM(SSI_SDATA4)		FM(HSCK2_A)	FM(MSIOF1_RXD_A)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC0_A)FM(STP_ISSYNC_0_A)	FM(RIF0_D0_A)	FM(RIF2_D1_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_3_0	FM(SSI_SCK6)		FM(USB2_PWEN)	F_(0, 0)		FM(SIM0_RST_D)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_7_4	FM(SSI_WS6)		FM(USB2_OVC)	F_(0, 0)		FM(SIM0_D_D)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_11_8	FM(SSI_SDATA6)		F_(0, 0)	F_(0, 0)		FM(SIM0_CLK_D)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(SATA_DEVSLP_A)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_15_12	FM(SSI_SCK78)		FM(HRX2_B)	FM(MSIOF1_SCK_C)	F_(0, 0)			F_(0, 0)	FM(TS_SCK1_A)	FM(STP_ISCLK_1_A)	FM(RIF1_CLK_A)	FM(RIF3_CLK_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_19_16	FM(SSI_WS78)		FM(HTX2_B)	FM(MSIOF1_SYNC_C)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT1_A)	FM(STP_ISD_1_A)		FM(RIF1_SYNC_A)	FM(RIF3_SYNC_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_23_20	FM(SSI_SDATA7)		FM(HCTS2_N_B)	FM(MSIOF1_RXD_C)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN1_A)	FM(STP_ISEN_1_A)	FM(RIF1_D0_A)	FM(RIF3_D0_A)		F_(0, 0)	FM(TCLK2_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_27_24	FM(SSI_SDATA8)		FM(HRTS2_N_B)	FM(MSIOF1_TXD_C)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC1_A)FM(STP_ISSYNC_1_A)	FM(RIF1_D1_A)	FM(RIF3_D1_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_31_28	FM(SSI_SDATA9_A)	FM(HSCK2_B)	FM(MSIOF1_SS1_C)	FM(HSCK1_A)			FM(SSI_WS1_B)	FM(SCK1)	FM(STP_IVCXO27_1_A)	FM(SCK5)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_3_0	FM(AUDIO_CLKA_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	FM(CC5_OSCOUT)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_7_4	FM(AUDIO_CLKB_B)	FM(SCIF_CLK_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_IVCXO27_1_D)	FM(REMOCON_A)	F_(0, 0)		F_(0, 0)	FM(TCLK1_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_11_8	FM(USB0_PWEN)		F_(0, 0)	F_(0, 0)		FM(SIM0_RST_C)			F_(0, 0)	FM(TS_SCK1_D)	FM(STP_ISCLK_1_D)	FM(BPFCLK_B)	FM(RIF3_CLK_B)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_15_12	FM(USB0_OVC)		F_(0, 0)	F_(0, 0)		FM(SIM0_D_C)			F_(0, 0)	FM(TS_SDAT1_D)	FM(STP_ISD_1_D)		F_(0, 0)	FM(RIF3_SYNC_B)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_19_16	FM(USB1_PWEN)		F_(0, 0)	F_(0, 0)		FM(SIM0_CLK_C)			FM(SSI_SCK1_A)	FM(TS_SCK0_E)	FM(STP_ISCLK_0_E)	FM(FMCLK_B)	FM(RIF2_CLK_B)		F_(0, 0)	FM(SPEEDIN_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_23_20	FM(USB1_OVC)		F_(0, 0)	FM(MSIOF1_SS2_C)	F_(0, 0)			FM(SSI_WS1_A)	FM(TS_SDAT0_E)	FM(STP_ISD_0_E)		FM(FMIN_B)	FM(RIF2_SYNC_B)		F_(0, 0)	FM(REMOCON_B)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_27_24	FM(USB30_PWEN)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT_B)		FM(SSI_SCK2_B)	FM(TS_SDEN1_D)	FM(STP_ISEN_1_D)	FM(STP_OPWM_0_E)FM(RIF3_D0_B)		F_(0, 0)	FM(TCLK2_B)	FM(TPU0TO0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_31_28	FM(USB30_OVC)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT1_B)		FM(SSI_WS2_B)	FM(TS_SPSYNC1_D)FM(STP_ISSYNC_1_D)	FM(STP_IVCXO27_0_E)FM(RIF3_D1_B)	F_(0, 0)	FM(FSO_TOE_B)	FM(TPU0TO1)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP17_3_0	FM(USB31_PWEN)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT2_B)		FM(SSI_SCK9_B)	FM(TS_SDEN0_E)	FM(STP_ISEN_0_E)	F_(0, 0)	FM(RIF2_D0_B)		F_(0, 0)	F_(0, 0)	FM(TPU0TO2)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP17_7_4	FM(USB31_OVC)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT3_B)		FM(SSI_WS9_B)	FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E)	F_(0, 0)	FM(RIF2_D1_B)		F_(0, 0)	F_(0, 0)	FM(TPU0TO3)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+
-+#define PINMUX_GPSR	\
-+\
-+												GPSR6_31 \
-+												GPSR6_30 \
-+												GPSR6_29 \
-+												GPSR6_28 \
-+		GPSR1_27									GPSR6_27 \
-+		GPSR1_26									GPSR6_26 \
-+		GPSR1_25							GPSR5_25	GPSR6_25 \
-+		GPSR1_24							GPSR5_24	GPSR6_24 \
-+		GPSR1_23							GPSR5_23	GPSR6_23 \
-+		GPSR1_22							GPSR5_22	GPSR6_22 \
-+		GPSR1_21							GPSR5_21	GPSR6_21 \
-+		GPSR1_20							GPSR5_20	GPSR6_20 \
-+		GPSR1_19							GPSR5_19	GPSR6_19 \
-+		GPSR1_18							GPSR5_18	GPSR6_18 \
-+		GPSR1_17					GPSR4_17	GPSR5_17	GPSR6_17 \
-+		GPSR1_16					GPSR4_16	GPSR5_16	GPSR6_16 \
-+GPSR0_15	GPSR1_15			GPSR3_15	GPSR4_15	GPSR5_15	GPSR6_15 \
-+GPSR0_14	GPSR1_14	GPSR2_14	GPSR3_14	GPSR4_14	GPSR5_14	GPSR6_14 \
-+GPSR0_13	GPSR1_13	GPSR2_13	GPSR3_13	GPSR4_13	GPSR5_13	GPSR6_13 \
-+GPSR0_12	GPSR1_12	GPSR2_12	GPSR3_12	GPSR4_12	GPSR5_12	GPSR6_12 \
-+GPSR0_11	GPSR1_11	GPSR2_11	GPSR3_11	GPSR4_11	GPSR5_11	GPSR6_11 \
-+GPSR0_10	GPSR1_10	GPSR2_10	GPSR3_10	GPSR4_10	GPSR5_10	GPSR6_10 \
-+GPSR0_9		GPSR1_9		GPSR2_9		GPSR3_9		GPSR4_9		GPSR5_9		GPSR6_9 \
-+GPSR0_8		GPSR1_8		GPSR2_8		GPSR3_8		GPSR4_8		GPSR5_8		GPSR6_8 \
-+GPSR0_7		GPSR1_7		GPSR2_7		GPSR3_7		GPSR4_7		GPSR5_7		GPSR6_7 \
-+GPSR0_6		GPSR1_6		GPSR2_6		GPSR3_6		GPSR4_6		GPSR5_6		GPSR6_6 \
-+GPSR0_5		GPSR1_5		GPSR2_5		GPSR3_5		GPSR4_5		GPSR5_5		GPSR6_5 \
-+GPSR0_4		GPSR1_4		GPSR2_4		GPSR3_4		GPSR4_4		GPSR5_4		GPSR6_4 \
-+GPSR0_3		GPSR1_3		GPSR2_3		GPSR3_3		GPSR4_3		GPSR5_3		GPSR6_3		GPSR7_3 \
-+GPSR0_2		GPSR1_2		GPSR2_2		GPSR3_2		GPSR4_2		GPSR5_2		GPSR6_2		GPSR7_2 \
-+GPSR0_1		GPSR1_1		GPSR2_1		GPSR3_1		GPSR4_1		GPSR5_1		GPSR6_1		GPSR7_1 \
-+GPSR0_0		GPSR1_0		GPSR2_0		GPSR3_0		GPSR4_0		GPSR5_0		GPSR6_0		GPSR7_0
-+
-+#define PINMUX_IPSR				\
-+\
-+FM(IP0_3_0)	IP0_3_0		FM(IP1_3_0)	IP1_3_0		FM(IP2_3_0)	IP2_3_0		FM(IP3_3_0)	IP3_3_0 \
-+FM(IP0_7_4)	IP0_7_4		FM(IP1_7_4)	IP1_7_4		FM(IP2_7_4)	IP2_7_4		FM(IP3_7_4)	IP3_7_4 \
-+FM(IP0_11_8)	IP0_11_8	FM(IP1_11_8)	IP1_11_8	FM(IP2_11_8)	IP2_11_8	FM(IP3_11_8)	IP3_11_8 \
-+FM(IP0_15_12)	IP0_15_12	FM(IP1_15_12)	IP1_15_12	FM(IP2_15_12)	IP2_15_12	FM(IP3_15_12)	IP3_15_12 \
-+FM(IP0_19_16)	IP0_19_16	FM(IP1_19_16)	IP1_19_16	FM(IP2_19_16)	IP2_19_16	FM(IP3_19_16)	IP3_19_16 \
-+FM(IP0_23_20)	IP0_23_20	FM(IP1_23_20)	IP1_23_20	FM(IP2_23_20)	IP2_23_20	FM(IP3_23_20)	IP3_23_20 \
-+FM(IP0_27_24)	IP0_27_24	FM(IP1_27_24)	IP1_27_24	FM(IP2_27_24)	IP2_27_24	FM(IP3_27_24)	IP3_27_24 \
-+FM(IP0_31_28)	IP0_31_28	FM(IP1_31_28)	IP1_31_28	FM(IP2_31_28)	IP2_31_28	FM(IP3_31_28)	IP3_31_28 \
-+\
-+FM(IP4_3_0)	IP4_3_0		FM(IP5_3_0)	IP5_3_0		FM(IP6_3_0)	IP6_3_0		FM(IP7_3_0)	IP7_3_0 \
-+FM(IP4_7_4)	IP4_7_4		FM(IP5_7_4)	IP5_7_4		FM(IP6_7_4)	IP6_7_4		FM(IP7_7_4)	IP7_7_4 \
-+FM(IP4_11_8)	IP4_11_8	FM(IP5_11_8)	IP5_11_8	FM(IP6_11_8)	IP6_11_8	FM(IP7_11_8)	IP7_11_8 \
-+FM(IP4_15_12)	IP4_15_12	FM(IP5_15_12)	IP5_15_12	FM(IP6_15_12)	IP6_15_12	FM(IP7_15_12)	IP7_15_12 \
-+FM(IP4_19_16)	IP4_19_16	FM(IP5_19_16)	IP5_19_16	FM(IP6_19_16)	IP6_19_16	FM(IP7_19_16)	IP7_19_16 \
-+FM(IP4_23_20)	IP4_23_20	FM(IP5_23_20)	IP5_23_20	FM(IP6_23_20)	IP6_23_20	FM(IP7_23_20)	IP7_23_20 \
-+FM(IP4_27_24)	IP4_27_24	FM(IP5_27_24)	IP5_27_24	FM(IP6_27_24)	IP6_27_24	FM(IP7_27_24)	IP7_27_24 \
-+FM(IP4_31_28)	IP4_31_28	FM(IP5_31_28)	IP5_31_28	FM(IP6_31_28)	IP6_31_28	FM(IP7_31_28)	IP7_31_28 \
-+\
-+FM(IP8_3_0)	IP8_3_0		FM(IP9_3_0)	IP9_3_0		FM(IP10_3_0)	IP10_3_0	FM(IP11_3_0)	IP11_3_0 \
-+FM(IP8_7_4)	IP8_7_4		FM(IP9_7_4)	IP9_7_4		FM(IP10_7_4)	IP10_7_4	FM(IP11_7_4)	IP11_7_4 \
-+FM(IP8_11_8)	IP8_11_8	FM(IP9_11_8)	IP9_11_8	FM(IP10_11_8)	IP10_11_8	FM(IP11_11_8)	IP11_11_8 \
-+FM(IP8_15_12)	IP8_15_12	FM(IP9_15_12)	IP9_15_12	FM(IP10_15_12)	IP10_15_12	FM(IP11_15_12)	IP11_15_12 \
-+FM(IP8_19_16)	IP8_19_16	FM(IP9_19_16)	IP9_19_16	FM(IP10_19_16)	IP10_19_16	FM(IP11_19_16)	IP11_19_16 \
-+FM(IP8_23_20)	IP8_23_20	FM(IP9_23_20)	IP9_23_20	FM(IP10_23_20)	IP10_23_20	FM(IP11_23_20)	IP11_23_20 \
-+FM(IP8_27_24)	IP8_27_24	FM(IP9_27_24)	IP9_27_24	FM(IP10_27_24)	IP10_27_24	FM(IP11_27_24)	IP11_27_24 \
-+FM(IP8_31_28)	IP8_31_28	FM(IP9_31_28)	IP9_31_28	FM(IP10_31_28)	IP10_31_28	FM(IP11_31_28)	IP11_31_28 \
-+\
-+FM(IP12_3_0)	IP12_3_0	FM(IP13_3_0)	IP13_3_0	FM(IP14_3_0)	IP14_3_0	FM(IP15_3_0)	IP15_3_0 \
-+FM(IP12_7_4)	IP12_7_4	FM(IP13_7_4)	IP13_7_4	FM(IP14_7_4)	IP14_7_4	FM(IP15_7_4)	IP15_7_4 \
-+FM(IP12_11_8)	IP12_11_8	FM(IP13_11_8)	IP13_11_8	FM(IP14_11_8)	IP14_11_8	FM(IP15_11_8)	IP15_11_8 \
-+FM(IP12_15_12)	IP12_15_12	FM(IP13_15_12)	IP13_15_12	FM(IP14_15_12)	IP14_15_12	FM(IP15_15_12)	IP15_15_12 \
-+FM(IP12_19_16)	IP12_19_16	FM(IP13_19_16)	IP13_19_16	FM(IP14_19_16)	IP14_19_16	FM(IP15_19_16)	IP15_19_16 \
-+FM(IP12_23_20)	IP12_23_20	FM(IP13_23_20)	IP13_23_20	FM(IP14_23_20)	IP14_23_20	FM(IP15_23_20)	IP15_23_20 \
-+FM(IP12_27_24)	IP12_27_24	FM(IP13_27_24)	IP13_27_24	FM(IP14_27_24)	IP14_27_24	FM(IP15_27_24)	IP15_27_24 \
-+FM(IP12_31_28)	IP12_31_28	FM(IP13_31_28)	IP13_31_28	FM(IP14_31_28)	IP14_31_28	FM(IP15_31_28)	IP15_31_28 \
-+\
-+FM(IP16_3_0)	IP16_3_0	FM(IP17_3_0)	IP17_3_0 \
-+FM(IP16_7_4)	IP16_7_4	FM(IP17_7_4)	IP17_7_4 \
-+FM(IP16_11_8)	IP16_11_8 \
-+FM(IP16_15_12)	IP16_15_12 \
-+FM(IP16_19_16)	IP16_19_16 \
-+FM(IP16_23_20)	IP16_23_20 \
-+FM(IP16_27_24)	IP16_27_24 \
-+FM(IP16_31_28)	IP16_31_28
-+
-+/* MOD_SEL0 */			/* 0 */			/* 1 */			/* 2 */			/* 3 */			/* 4 */			/* 5 */			/* 6 */			/* 7 */
-+#define MOD_SEL0_30_29		FM(SEL_MSIOF3_0)	FM(SEL_MSIOF3_1)	FM(SEL_MSIOF3_2)	FM(SEL_MSIOF3_3)
-+#define MOD_SEL0_28_27		FM(SEL_MSIOF2_0)	FM(SEL_MSIOF2_1)	FM(SEL_MSIOF2_2)	FM(SEL_MSIOF2_3)
-+#define MOD_SEL0_26_25_24	FM(SEL_MSIOF1_0)	FM(SEL_MSIOF1_1)	FM(SEL_MSIOF1_2)	FM(SEL_MSIOF1_3)	FM(SEL_MSIOF1_4)	FM(SEL_MSIOF1_5)	FM(SEL_MSIOF1_6)	F_(0, 0)
-+#define MOD_SEL0_23		FM(SEL_LBSC_0)		FM(SEL_LBSC_1)
-+#define MOD_SEL0_22		FM(SEL_IEBUS_0)		FM(SEL_IEBUS_1)
-+#define MOD_SEL0_21_20		FM(SEL_I2C6_0)		FM(SEL_I2C6_1)		FM(SEL_I2C6_2)		F_(0, 0)
-+#define MOD_SEL0_19		FM(SEL_I2C2_0)		FM(SEL_I2C2_1)
-+#define MOD_SEL0_18		FM(SEL_I2C1_0)		FM(SEL_I2C1_1)
-+#define MOD_SEL0_17		FM(SEL_HSCIF4_0)	FM(SEL_HSCIF4_1)
-+#define MOD_SEL0_16_15		FM(SEL_HSCIF3_0)	FM(SEL_HSCIF3_1)	FM(SEL_HSCIF3_2)	FM(SEL_HSCIF3_3)
-+#define MOD_SEL0_14		FM(SEL_HSCIF2_0)	FM(SEL_HSCIF2_1)
-+#define MOD_SEL0_13		FM(SEL_HSCIF1_0)	FM(SEL_HSCIF1_1)
-+#define MOD_SEL0_12		FM(SEL_FSO_0)		FM(SEL_FSO_1)
-+#define MOD_SEL0_11		FM(SEL_FM_0)		FM(SEL_FM_1)
-+#define MOD_SEL0_10		FM(SEL_ETHERAVB_0)	FM(SEL_ETHERAVB_1)
-+#define MOD_SEL0_9		FM(SEL_DRIF3_0)		FM(SEL_DRIF3_1)
-+#define MOD_SEL0_8		FM(SEL_DRIF2_0)		FM(SEL_DRIF2_1)
-+#define MOD_SEL0_7_6		FM(SEL_DRIF1_0)		FM(SEL_DRIF1_1)		FM(SEL_DRIF1_2)		F_(0, 0)
-+#define MOD_SEL0_5_4		FM(SEL_DRIF0_0)		FM(SEL_DRIF0_1)		FM(SEL_DRIF0_2)		F_(0, 0)
-+#define MOD_SEL0_3		FM(SEL_CANFD0_0)	FM(SEL_CANFD0_1)
-+#define MOD_SEL0_2_1		FM(SEL_ADG_0)		FM(SEL_ADG_1)		FM(SEL_ADG_2)		FM(SEL_ADG_3)
-+
-+/* MOD_SEL1 */			/* 0 */			/* 1 */			/* 2 */			/* 3 */			/* 4 */			/* 5 */			/* 6 */			/* 7 */
-+#define MOD_SEL1_31_30		FM(SEL_TSIF1_0)		FM(SEL_TSIF1_1)		FM(SEL_TSIF1_2)		FM(SEL_TSIF1_3)
-+#define MOD_SEL1_29_28_27	FM(SEL_TSIF0_0)		FM(SEL_TSIF0_1)		FM(SEL_TSIF0_2)		FM(SEL_TSIF0_3)		FM(SEL_TSIF0_4)		F_(0, 0)		F_(0, 0)		F_(0, 0)
-+#define MOD_SEL1_26		FM(SEL_TIMER_TMU_0)	FM(SEL_TIMER_TMU_1)
-+#define MOD_SEL1_25_24		FM(SEL_SSP1_1_0)	FM(SEL_SSP1_1_1)	FM(SEL_SSP1_1_2)	FM(SEL_SSP1_1_3)
-+#define MOD_SEL1_23_22_21	FM(SEL_SSP1_0_0)	FM(SEL_SSP1_0_1)	FM(SEL_SSP1_0_2)	FM(SEL_SSP1_0_3)	FM(SEL_SSP1_0_4)	F_(0, 0)		F_(0, 0)		F_(0, 0)
-+#define MOD_SEL1_20		FM(SEL_SSI_0)		FM(SEL_SSI_1)
-+#define MOD_SEL1_19		FM(SEL_SPEED_PULSE_0)	FM(SEL_SPEED_PULSE_1)
-+#define MOD_SEL1_18_17		FM(SEL_SIMCARD_0)	FM(SEL_SIMCARD_1)	FM(SEL_SIMCARD_2)	FM(SEL_SIMCARD_3)
-+#define MOD_SEL1_16		FM(SEL_SDHI2_0)		FM(SEL_SDHI2_1)
-+#define MOD_SEL1_15_14		FM(SEL_SCIF4_0)		FM(SEL_SCIF4_1)		FM(SEL_SCIF4_2)		F_(0, 0)
-+#define MOD_SEL1_13		FM(SEL_SCIF3_0)		FM(SEL_SCIF3_1)
-+#define MOD_SEL1_12		FM(SEL_SCIF2_0)		FM(SEL_SCIF2_1)
-+#define MOD_SEL1_11		FM(SEL_SCIF1_0)		FM(SEL_SCIF1_1)
-+#define MOD_SEL1_10		FM(SEL_SATA_0)		FM(SEL_SATA_1)
-+#define MOD_SEL1_9		FM(SEL_REMOCON_0)	FM(SEL_REMOCON_1)
-+#define MOD_SEL1_6		FM(SEL_RCAN0_0)		FM(SEL_RCAN0_1)
-+#define MOD_SEL1_5		FM(SEL_PWM6_0)		FM(SEL_PWM6_1)
-+#define MOD_SEL1_4		FM(SEL_PWM5_0)		FM(SEL_PWM5_1)
-+#define MOD_SEL1_3		FM(SEL_PWM4_0)		FM(SEL_PWM4_1)
-+#define MOD_SEL1_2		FM(SEL_PWM3_0)		FM(SEL_PWM3_1)
-+#define MOD_SEL1_1		FM(SEL_PWM2_0)		FM(SEL_PWM2_1)
-+#define MOD_SEL1_0		FM(SEL_PWM1_0)		FM(SEL_PWM1_1)
-+
-+/* MOD_SEL2 */			/* 0 */			/* 1 */			/* 2 */			/* 3 */
-+#define MOD_SEL2_31		FM(I2C_SEL_5_0)		FM(I2C_SEL_5_1)
-+#define MOD_SEL2_30		FM(I2C_SEL_3_0)		FM(I2C_SEL_3_1)
-+#define MOD_SEL2_29		FM(I2C_SEL_0_0)		FM(I2C_SEL_0_1)
-+#define MOD_SEL2_0		FM(SEL_VIN4_0)		FM(SEL_VIN4_1)
-+
-+#define PINMUX_MOD_SELS\
-+\
-+			MOD_SEL1_31_30		MOD_SEL2_31 \
-+MOD_SEL0_30_29					MOD_SEL2_30 \
-+			MOD_SEL1_29_28_27	MOD_SEL2_29 \
-+MOD_SEL0_28_27 \
-+\
-+MOD_SEL0_26_25_24	MOD_SEL1_26 \
-+			MOD_SEL1_25_24 \
-+\
-+MOD_SEL0_23		MOD_SEL1_23_22_21 \
-+MOD_SEL0_22 \
-+MOD_SEL0_21_20 \
-+			MOD_SEL1_20 \
-+MOD_SEL0_19		MOD_SEL1_19 \
-+MOD_SEL0_18		MOD_SEL1_18_17 \
-+MOD_SEL0_17 \
-+MOD_SEL0_16_15		MOD_SEL1_16 \
-+			MOD_SEL1_15_14 \
-+MOD_SEL0_14 \
-+MOD_SEL0_13		MOD_SEL1_13 \
-+MOD_SEL0_12		MOD_SEL1_12 \
-+MOD_SEL0_11		MOD_SEL1_11 \
-+MOD_SEL0_10		MOD_SEL1_10 \
-+MOD_SEL0_9		MOD_SEL1_9 \
-+MOD_SEL0_8 \
-+MOD_SEL0_7_6 \
-+			MOD_SEL1_6 \
-+MOD_SEL0_5_4		MOD_SEL1_5 \
-+			MOD_SEL1_4 \
-+MOD_SEL0_3		MOD_SEL1_3 \
-+MOD_SEL0_2_1		MOD_SEL1_2 \
-+			MOD_SEL1_1 \
-+			MOD_SEL1_0		MOD_SEL2_0
-+
-+/*
-+ * These pins are not able to be muxed but have other properties
-+ * that can be set, such as drive-strength or pull-up/pull-down enable.
-+ */
-+#define PINMUX_STATIC \
-+	FM(QSPI0_SPCLK) FM(QSPI0_SSL) FM(QSPI0_MOSI_IO0) FM(QSPI0_MISO_IO1) \
-+	FM(QSPI0_IO2) FM(QSPI0_IO3) \
-+	FM(QSPI1_SPCLK) FM(QSPI1_SSL) FM(QSPI1_MOSI_IO0) FM(QSPI1_MISO_IO1) \
-+	FM(QSPI1_IO2) FM(QSPI1_IO3) \
-+	FM(RPC_INT) FM(RPC_WP) FM(RPC_RESET) \
-+	FM(AVB_TX_CTL) FM(AVB_TXC) FM(AVB_TD0) FM(AVB_TD1) FM(AVB_TD2) FM(AVB_TD3) \
-+	FM(AVB_RX_CTL) FM(AVB_RXC) FM(AVB_RD0) FM(AVB_RD1) FM(AVB_RD2) FM(AVB_RD3) \
-+	FM(AVB_TXCREFCLK) FM(AVB_MDIO) \
-+	FM(CLKOUT) FM(PRESETOUT) \
-+	FM(DU_DOTCLKIN0) FM(DU_DOTCLKIN1) FM(DU_DOTCLKIN2) FM(DU_DOTCLKIN3) \
-+	FM(TMS) FM(TDO) FM(ASEBRK) FM(MLB_REF) FM(TDI) FM(TCK) FM(TRST) FM(EXTALR)
-+
-+enum {
-+	PINMUX_RESERVED = 0,
-+
-+	PINMUX_DATA_BEGIN,
-+	GP_ALL(DATA),
-+	PINMUX_DATA_END,
-+
-+#define F_(x, y)
-+#define FM(x)	FN_##x,
-+	PINMUX_FUNCTION_BEGIN,
-+	GP_ALL(FN),
-+	PINMUX_GPSR
-+	PINMUX_IPSR
-+	PINMUX_MOD_SELS
-+	PINMUX_FUNCTION_END,
-+#undef F_
-+#undef FM
-+
-+#define F_(x, y)
-+#define FM(x)	x##_MARK,
-+	PINMUX_MARK_BEGIN,
-+	PINMUX_GPSR
-+	PINMUX_IPSR
-+	PINMUX_MOD_SELS
-+	PINMUX_STATIC
-+	PINMUX_MARK_END,
-+#undef F_
-+#undef FM
-+};
-+
-+static const u16 pinmux_data[] = {
-+	PINMUX_DATA_GP_ALL(),
-+
-+	PINMUX_SINGLE(AVS1),
-+	PINMUX_SINGLE(AVS2),
-+	PINMUX_SINGLE(HDMI0_CEC),
-+	PINMUX_SINGLE(HDMI1_CEC),
-+	PINMUX_SINGLE(I2C_SEL_0_1),
-+	PINMUX_SINGLE(I2C_SEL_3_1),
-+	PINMUX_SINGLE(I2C_SEL_5_1),
-+	PINMUX_SINGLE(MSIOF0_RXD),
-+	PINMUX_SINGLE(MSIOF0_SCK),
-+	PINMUX_SINGLE(MSIOF0_TXD),
-+	PINMUX_SINGLE(SD2_CMD),
-+	PINMUX_SINGLE(SD3_CLK),
-+	PINMUX_SINGLE(SD3_CMD),
-+	PINMUX_SINGLE(SD3_DAT0),
-+	PINMUX_SINGLE(SD3_DAT1),
-+	PINMUX_SINGLE(SD3_DAT2),
-+	PINMUX_SINGLE(SD3_DAT3),
-+	PINMUX_SINGLE(SD3_DS),
-+	PINMUX_SINGLE(SSI_SCK5),
-+	PINMUX_SINGLE(SSI_SDATA5),
-+	PINMUX_SINGLE(SSI_WS5),
-+
-+	/* IPSR0 */
-+	PINMUX_IPSR_GPSR(IP0_3_0,	AVB_MDC),
-+	PINMUX_IPSR_MSEL(IP0_3_0,	MSIOF2_SS2_C,		SEL_MSIOF2_2),
-+
-+	PINMUX_IPSR_GPSR(IP0_7_4,	AVB_MAGIC),
-+	PINMUX_IPSR_MSEL(IP0_7_4,	MSIOF2_SS1_C,		SEL_MSIOF2_2),
-+	PINMUX_IPSR_MSEL(IP0_7_4,	SCK4_A,			SEL_SCIF4_0),
-+
-+	PINMUX_IPSR_GPSR(IP0_11_8,	AVB_PHY_INT),
-+	PINMUX_IPSR_MSEL(IP0_11_8,	MSIOF2_SYNC_C,		SEL_MSIOF2_2),
-+	PINMUX_IPSR_MSEL(IP0_11_8,	RX4_A,			SEL_SCIF4_0),
-+
-+	PINMUX_IPSR_GPSR(IP0_15_12,	AVB_LINK),
-+	PINMUX_IPSR_MSEL(IP0_15_12,	MSIOF2_SCK_C,		SEL_MSIOF2_2),
-+	PINMUX_IPSR_MSEL(IP0_15_12,	TX4_A,			SEL_SCIF4_0),
-+
-+	PINMUX_IPSR_MSEL(IP0_19_16,	AVB_AVTP_MATCH_A,	SEL_ETHERAVB_0),
-+	PINMUX_IPSR_MSEL(IP0_19_16,	MSIOF2_RXD_C,		SEL_MSIOF2_2),
-+	PINMUX_IPSR_MSEL(IP0_19_16,	CTS4_N_A,		SEL_SCIF4_0),
-+
-+	PINMUX_IPSR_MSEL(IP0_23_20,	AVB_AVTP_CAPTURE_A,	SEL_ETHERAVB_0),
-+	PINMUX_IPSR_MSEL(IP0_23_20,	MSIOF2_TXD_C,		SEL_MSIOF2_2),
-+	PINMUX_IPSR_MSEL(IP0_23_20,	RTS4_N_TANS_A,		SEL_SCIF4_0),
-+
-+	PINMUX_IPSR_GPSR(IP0_27_24,	IRQ0),
-+	PINMUX_IPSR_GPSR(IP0_27_24,	QPOLB),
-+	PINMUX_IPSR_GPSR(IP0_27_24,	DU_CDE),
-+	PINMUX_IPSR_MSEL(IP0_27_24,	VI4_DATA0_B,		SEL_VIN4_1),
-+	PINMUX_IPSR_MSEL(IP0_27_24,	CAN0_TX_B,		SEL_RCAN0_1),
-+	PINMUX_IPSR_MSEL(IP0_27_24,	CANFD0_TX_B,		SEL_CANFD0_1),
-+
-+	PINMUX_IPSR_GPSR(IP0_31_28,	IRQ1),
-+	PINMUX_IPSR_GPSR(IP0_31_28,	QPOLA),
-+	PINMUX_IPSR_GPSR(IP0_31_28,	DU_DISP),
-+	PINMUX_IPSR_MSEL(IP0_31_28,	VI4_DATA1_B,		SEL_VIN4_1),
-+	PINMUX_IPSR_MSEL(IP0_31_28,	CAN0_RX_B,		SEL_RCAN0_1),
-+	PINMUX_IPSR_MSEL(IP0_31_28,	CANFD0_RX_B,		SEL_CANFD0_1),
-+
-+	/* IPSR1 */
-+	PINMUX_IPSR_GPSR(IP1_3_0,	IRQ2),
-+	PINMUX_IPSR_GPSR(IP1_3_0,	QCPV_QDE),
-+	PINMUX_IPSR_GPSR(IP1_3_0,	DU_EXODDF_DU_ODDF_DISP_CDE),
-+	PINMUX_IPSR_MSEL(IP1_3_0,	VI4_DATA2_B,		SEL_VIN4_1),
-+	PINMUX_IPSR_MSEL(IP1_3_0,	PWM3_B,			SEL_PWM3_1),
-+
-+	PINMUX_IPSR_GPSR(IP1_7_4,	IRQ3),
-+	PINMUX_IPSR_GPSR(IP1_7_4,	QSTVB_QVE),
-+	PINMUX_IPSR_GPSR(IP1_7_4,	A25),
-+	PINMUX_IPSR_GPSR(IP1_7_4,	DU_DOTCLKOUT1),
-+	PINMUX_IPSR_MSEL(IP1_7_4,	VI4_DATA3_B,		SEL_VIN4_1),
-+	PINMUX_IPSR_MSEL(IP1_7_4,	PWM4_B,			SEL_PWM4_1),
-+
-+	PINMUX_IPSR_GPSR(IP1_11_8,	IRQ4),
-+	PINMUX_IPSR_GPSR(IP1_11_8,	QSTH_QHS),
-+	PINMUX_IPSR_GPSR(IP1_11_8,	A24),
-+	PINMUX_IPSR_GPSR(IP1_11_8,	DU_EXHSYNC_DU_HSYNC),
-+	PINMUX_IPSR_MSEL(IP1_11_8,	VI4_DATA4_B,		SEL_VIN4_1),
-+	PINMUX_IPSR_MSEL(IP1_11_8,	PWM5_B,			SEL_PWM5_1),
-+
-+	PINMUX_IPSR_GPSR(IP1_15_12,	IRQ5),
-+	PINMUX_IPSR_GPSR(IP1_15_12,	QSTB_QHE),
-+	PINMUX_IPSR_GPSR(IP1_15_12,	A23),
-+	PINMUX_IPSR_GPSR(IP1_15_12,	DU_EXVSYNC_DU_VSYNC),
-+	PINMUX_IPSR_MSEL(IP1_15_12,	VI4_DATA5_B,		SEL_VIN4_1),
-+	PINMUX_IPSR_MSEL(IP1_15_12,	PWM6_B,			SEL_PWM6_1),
-+
-+	PINMUX_IPSR_GPSR(IP1_19_16,	PWM0),
-+	PINMUX_IPSR_GPSR(IP1_19_16,	AVB_AVTP_PPS),
-+	PINMUX_IPSR_GPSR(IP1_19_16,	A22),
-+	PINMUX_IPSR_MSEL(IP1_19_16,	VI4_DATA6_B,		SEL_VIN4_1),
-+	PINMUX_IPSR_MSEL(IP1_19_16,	IECLK_B,		SEL_IEBUS_1),
-+
-+	PINMUX_IPSR_MSEL(IP1_23_20,	PWM1_A,			SEL_PWM1_0),
-+	PINMUX_IPSR_GPSR(IP1_23_20,	A21),
-+	PINMUX_IPSR_MSEL(IP1_23_20,	HRX3_D,			SEL_HSCIF3_3),
-+	PINMUX_IPSR_MSEL(IP1_23_20,	VI4_DATA7_B,		SEL_VIN4_1),
-+	PINMUX_IPSR_MSEL(IP1_23_20,	IERX_B,			SEL_IEBUS_1),
-+
-+	PINMUX_IPSR_MSEL(IP1_27_24,	PWM2_A,			SEL_PWM2_0),
-+	PINMUX_IPSR_GPSR(IP1_27_24,	A20),
-+	PINMUX_IPSR_MSEL(IP1_27_24,	HTX3_D,			SEL_HSCIF3_3),
-+	PINMUX_IPSR_MSEL(IP1_27_24,	IETX_B,			SEL_IEBUS_1),
-+
-+	PINMUX_IPSR_GPSR(IP1_31_28,	A0),
-+	PINMUX_IPSR_GPSR(IP1_31_28,	LCDOUT16),
-+	PINMUX_IPSR_MSEL(IP1_31_28,	MSIOF3_SYNC_B,		SEL_MSIOF3_1),
-+	PINMUX_IPSR_GPSR(IP1_31_28,	VI4_DATA8),
-+	PINMUX_IPSR_GPSR(IP1_31_28,	DU_DB0),
-+	PINMUX_IPSR_MSEL(IP1_31_28,	PWM3_A,			SEL_PWM3_0),
-+
-+	/* IPSR2 */
-+	PINMUX_IPSR_GPSR(IP2_3_0,	A1),
-+	PINMUX_IPSR_GPSR(IP2_3_0,	LCDOUT17),
-+	PINMUX_IPSR_MSEL(IP2_3_0,	MSIOF3_TXD_B,		SEL_MSIOF3_1),
-+	PINMUX_IPSR_GPSR(IP2_3_0,	VI4_DATA9),
-+	PINMUX_IPSR_GPSR(IP2_3_0,	DU_DB1),
-+	PINMUX_IPSR_MSEL(IP2_3_0,	PWM4_A,			SEL_PWM4_0),
-+
-+	PINMUX_IPSR_GPSR(IP2_7_4,	A2),
-+	PINMUX_IPSR_GPSR(IP2_7_4,	LCDOUT18),
-+	PINMUX_IPSR_MSEL(IP2_7_4,	MSIOF3_SCK_B,		SEL_MSIOF3_1),
-+	PINMUX_IPSR_GPSR(IP2_7_4,	VI4_DATA10),
-+	PINMUX_IPSR_GPSR(IP2_7_4,	DU_DB2),
-+	PINMUX_IPSR_MSEL(IP2_7_4,	PWM5_A,			SEL_PWM5_0),
-+
-+	PINMUX_IPSR_GPSR(IP2_11_8,	A3),
-+	PINMUX_IPSR_GPSR(IP2_11_8,	LCDOUT19),
-+	PINMUX_IPSR_MSEL(IP2_11_8,	MSIOF3_RXD_B,		SEL_MSIOF3_1),
-+	PINMUX_IPSR_GPSR(IP2_11_8,	VI4_DATA11),
-+	PINMUX_IPSR_GPSR(IP2_11_8,	DU_DB3),
-+	PINMUX_IPSR_MSEL(IP2_11_8,	PWM6_A,			SEL_PWM6_0),
-+
-+	PINMUX_IPSR_GPSR(IP2_15_12,	A4),
-+	PINMUX_IPSR_GPSR(IP2_15_12,	LCDOUT20),
-+	PINMUX_IPSR_MSEL(IP2_15_12,	MSIOF3_SS1_B,		SEL_MSIOF3_1),
-+	PINMUX_IPSR_GPSR(IP2_15_12,	VI4_DATA12),
-+	PINMUX_IPSR_GPSR(IP2_15_12,	VI5_DATA12),
-+	PINMUX_IPSR_GPSR(IP2_15_12,	DU_DB4),
-+
-+	PINMUX_IPSR_GPSR(IP2_19_16,	A5),
-+	PINMUX_IPSR_GPSR(IP2_19_16,	LCDOUT21),
-+	PINMUX_IPSR_MSEL(IP2_19_16,	MSIOF3_SS2_B,		SEL_MSIOF3_1),
-+	PINMUX_IPSR_MSEL(IP2_19_16,	SCK4_B,			SEL_SCIF4_1),
-+	PINMUX_IPSR_GPSR(IP2_19_16,	VI4_DATA13),
-+	PINMUX_IPSR_GPSR(IP2_19_16,	VI5_DATA13),
-+	PINMUX_IPSR_GPSR(IP2_19_16,	DU_DB5),
-+
-+	PINMUX_IPSR_GPSR(IP2_23_20,	A6),
-+	PINMUX_IPSR_GPSR(IP2_23_20,	LCDOUT22),
-+	PINMUX_IPSR_MSEL(IP2_23_20,	MSIOF2_SS1_A,		SEL_MSIOF2_0),
-+	PINMUX_IPSR_MSEL(IP2_23_20,	RX4_B,			SEL_SCIF4_1),
-+	PINMUX_IPSR_GPSR(IP2_23_20,	VI4_DATA14),
-+	PINMUX_IPSR_GPSR(IP2_23_20,	VI5_DATA14),
-+	PINMUX_IPSR_GPSR(IP2_23_20,	DU_DB6),
-+
-+	PINMUX_IPSR_GPSR(IP2_27_24,	A7),
-+	PINMUX_IPSR_GPSR(IP2_27_24,	LCDOUT23),
-+	PINMUX_IPSR_MSEL(IP2_27_24,	MSIOF2_SS2_A,		SEL_MSIOF2_0),
-+	PINMUX_IPSR_MSEL(IP2_27_24,	TX4_B,			SEL_SCIF4_1),
-+	PINMUX_IPSR_GPSR(IP2_27_24,	VI4_DATA15),
-+	PINMUX_IPSR_GPSR(IP2_27_24,	VI5_DATA15),
-+	PINMUX_IPSR_GPSR(IP2_27_24,	DU_DB7),
-+
-+	PINMUX_IPSR_GPSR(IP2_31_28,	A8),
-+	PINMUX_IPSR_MSEL(IP2_31_28,	RX3_B,			SEL_SCIF3_1),
-+	PINMUX_IPSR_MSEL(IP2_31_28,	MSIOF2_SYNC_A,		SEL_MSIOF2_0),
-+	PINMUX_IPSR_MSEL(IP2_31_28,	HRX4_B,			SEL_HSCIF4_1),
-+	PINMUX_IPSR_MSEL(IP2_31_28,	SDA6_A,			SEL_I2C6_0),
-+	PINMUX_IPSR_MSEL(IP2_31_28,	AVB_AVTP_MATCH_B,	SEL_ETHERAVB_1),
-+	PINMUX_IPSR_MSEL(IP2_31_28,	PWM1_B,			SEL_PWM1_1),
-+
-+	/* IPSR3 */
-+	PINMUX_IPSR_GPSR(IP3_3_0,	A9),
-+	PINMUX_IPSR_MSEL(IP3_3_0,	MSIOF2_SCK_A,		SEL_MSIOF2_0),
-+	PINMUX_IPSR_MSEL(IP3_3_0,	CTS4_N_B,		SEL_SCIF4_1),
-+	PINMUX_IPSR_GPSR(IP3_3_0,	VI5_VSYNC_N),
-+
-+	PINMUX_IPSR_GPSR(IP3_7_4,	A10),
-+	PINMUX_IPSR_MSEL(IP3_7_4,	MSIOF2_RXD_A,		SEL_MSIOF2_0),
-+	PINMUX_IPSR_MSEL(IP3_7_4,	RTS4_N_TANS_B,		SEL_SCIF4_1),
-+	PINMUX_IPSR_GPSR(IP3_7_4,	VI5_HSYNC_N),
-+
-+	PINMUX_IPSR_GPSR(IP3_11_8,	A11),
-+	PINMUX_IPSR_MSEL(IP3_11_8,	TX3_B,			SEL_SCIF3_1),
-+	PINMUX_IPSR_MSEL(IP3_11_8,	MSIOF2_TXD_A,		SEL_MSIOF2_0),
-+	PINMUX_IPSR_MSEL(IP3_11_8,	HTX4_B,			SEL_HSCIF4_1),
-+	PINMUX_IPSR_GPSR(IP3_11_8,	HSCK4),
-+	PINMUX_IPSR_GPSR(IP3_11_8,	VI5_FIELD),
-+	PINMUX_IPSR_MSEL(IP3_11_8,	SCL6_A,			SEL_I2C6_0),
-+	PINMUX_IPSR_MSEL(IP3_11_8,	AVB_AVTP_CAPTURE_B,	SEL_ETHERAVB_1),
-+	PINMUX_IPSR_MSEL(IP3_11_8,	PWM2_B,			SEL_PWM2_1),
-+
-+	PINMUX_IPSR_GPSR(IP3_15_12,	A12),
-+	PINMUX_IPSR_GPSR(IP3_15_12,	LCDOUT12),
-+	PINMUX_IPSR_MSEL(IP3_15_12,	MSIOF3_SCK_C,		SEL_MSIOF3_2),
-+	PINMUX_IPSR_MSEL(IP3_15_12,	HRX4_A,			SEL_HSCIF4_0),
-+	PINMUX_IPSR_GPSR(IP3_15_12,	VI5_DATA8),
-+	PINMUX_IPSR_GPSR(IP3_15_12,	DU_DG4),
-+
-+	PINMUX_IPSR_GPSR(IP3_19_16,	A13),
-+	PINMUX_IPSR_GPSR(IP3_19_16,	LCDOUT13),
-+	PINMUX_IPSR_MSEL(IP3_19_16,	MSIOF3_SYNC_C,		SEL_MSIOF3_2),
-+	PINMUX_IPSR_MSEL(IP3_19_16,	HTX4_A,			SEL_HSCIF4_0),
-+	PINMUX_IPSR_GPSR(IP3_19_16,	VI5_DATA9),
-+	PINMUX_IPSR_GPSR(IP3_19_16,	DU_DG5),
-+
-+	PINMUX_IPSR_GPSR(IP3_23_20,	A14),
-+	PINMUX_IPSR_GPSR(IP3_23_20,	LCDOUT14),
-+	PINMUX_IPSR_MSEL(IP3_23_20,	MSIOF3_RXD_C,		SEL_MSIOF3_2),
-+	PINMUX_IPSR_GPSR(IP3_23_20,	HCTS4_N),
-+	PINMUX_IPSR_GPSR(IP3_23_20,	VI5_DATA10),
-+	PINMUX_IPSR_GPSR(IP3_23_20,	DU_DG6),
-+
-+	PINMUX_IPSR_GPSR(IP3_27_24,	A15),
-+	PINMUX_IPSR_GPSR(IP3_27_24,	LCDOUT15),
-+	PINMUX_IPSR_MSEL(IP3_27_24,	MSIOF3_TXD_C,		SEL_MSIOF3_2),
-+	PINMUX_IPSR_GPSR(IP3_27_24,	HRTS4_N),
-+	PINMUX_IPSR_GPSR(IP3_27_24,	VI5_DATA11),
-+	PINMUX_IPSR_GPSR(IP3_27_24,	DU_DG7),
-+
-+	PINMUX_IPSR_GPSR(IP3_31_28,	A16),
-+	PINMUX_IPSR_GPSR(IP3_31_28,	LCDOUT8),
-+	PINMUX_IPSR_GPSR(IP3_31_28,	VI4_FIELD),
-+	PINMUX_IPSR_GPSR(IP3_31_28,	DU_DG0),
-+
-+	/* IPSR4 */
-+	PINMUX_IPSR_GPSR(IP4_3_0,	A17),
-+	PINMUX_IPSR_GPSR(IP4_3_0,	LCDOUT9),
-+	PINMUX_IPSR_GPSR(IP4_3_0,	VI4_VSYNC_N),
-+	PINMUX_IPSR_GPSR(IP4_3_0,	DU_DG1),
-+
-+	PINMUX_IPSR_GPSR(IP4_7_4,	A18),
-+	PINMUX_IPSR_GPSR(IP4_7_4,	LCDOUT10),
-+	PINMUX_IPSR_GPSR(IP4_7_4,	VI4_HSYNC_N),
-+	PINMUX_IPSR_GPSR(IP4_7_4,	DU_DG2),
-+
-+	PINMUX_IPSR_GPSR(IP4_11_8,	A19),
-+	PINMUX_IPSR_GPSR(IP4_11_8,	LCDOUT11),
-+	PINMUX_IPSR_GPSR(IP4_11_8,	VI4_CLKENB),
-+	PINMUX_IPSR_GPSR(IP4_11_8,	DU_DG3),
-+
-+	PINMUX_IPSR_GPSR(IP4_15_12,	CS0_N),
-+	PINMUX_IPSR_GPSR(IP4_15_12,	VI5_CLKENB),
-+
-+	PINMUX_IPSR_GPSR(IP4_19_16,	CS1_N_A26),
-+	PINMUX_IPSR_GPSR(IP4_19_16,	VI5_CLK),
-+	PINMUX_IPSR_MSEL(IP4_19_16,	EX_WAIT0_B,		SEL_LBSC_1),
-+
-+	PINMUX_IPSR_GPSR(IP4_23_20,	BS_N),
-+	PINMUX_IPSR_GPSR(IP4_23_20,	QSTVA_QVS),
-+	PINMUX_IPSR_MSEL(IP4_23_20,	MSIOF3_SCK_D,		SEL_MSIOF3_3),
-+	PINMUX_IPSR_GPSR(IP4_23_20,	SCK3),
-+	PINMUX_IPSR_GPSR(IP4_23_20,	HSCK3),
-+	PINMUX_IPSR_GPSR(IP4_23_20,	CAN1_TX),
-+	PINMUX_IPSR_GPSR(IP4_23_20,	CANFD1_TX),
-+	PINMUX_IPSR_MSEL(IP4_23_20,	IETX_A,			SEL_IEBUS_0),
-+
-+	PINMUX_IPSR_GPSR(IP4_27_24,	RD_N),
-+	PINMUX_IPSR_MSEL(IP4_27_24,	MSIOF3_SYNC_D,		SEL_MSIOF3_3),
-+	PINMUX_IPSR_MSEL(IP4_27_24,	RX3_A,			SEL_SCIF3_0),
-+	PINMUX_IPSR_MSEL(IP4_27_24,	HRX3_A,			SEL_HSCIF3_0),
-+	PINMUX_IPSR_MSEL(IP4_27_24,	CAN0_TX_A,		SEL_RCAN0_0),
-+	PINMUX_IPSR_MSEL(IP4_27_24,	CANFD0_TX_A,		SEL_CANFD0_0),
-+
-+	PINMUX_IPSR_GPSR(IP4_31_28,	RD_WR_N),
-+	PINMUX_IPSR_MSEL(IP4_31_28,	MSIOF3_RXD_D,		SEL_MSIOF3_3),
-+	PINMUX_IPSR_MSEL(IP4_31_28,	TX3_A,			SEL_SCIF3_0),
-+	PINMUX_IPSR_MSEL(IP4_31_28,	HTX3_A,			SEL_HSCIF3_0),
-+	PINMUX_IPSR_MSEL(IP4_31_28,	CAN0_RX_A,		SEL_RCAN0_0),
-+	PINMUX_IPSR_MSEL(IP4_31_28,	CANFD0_RX_A,		SEL_CANFD0_0),
-+
-+	/* IPSR5 */
-+	PINMUX_IPSR_GPSR(IP5_3_0,	WE0_N),
-+	PINMUX_IPSR_MSEL(IP5_3_0,	MSIOF3_TXD_D,		SEL_MSIOF3_3),
-+	PINMUX_IPSR_GPSR(IP5_3_0,	CTS3_N),
-+	PINMUX_IPSR_GPSR(IP5_3_0,	HCTS3_N),
-+	PINMUX_IPSR_MSEL(IP5_3_0,	SCL6_B,			SEL_I2C6_1),
-+	PINMUX_IPSR_GPSR(IP5_3_0,	CAN_CLK),
-+	PINMUX_IPSR_MSEL(IP5_3_0,	IECLK_A,		SEL_IEBUS_0),
-+
-+	PINMUX_IPSR_GPSR(IP5_7_4,	WE1_N),
-+	PINMUX_IPSR_MSEL(IP5_7_4,	MSIOF3_SS1_D,		SEL_MSIOF3_3),
-+	PINMUX_IPSR_GPSR(IP5_7_4,	RTS3_N_TANS),
-+	PINMUX_IPSR_GPSR(IP5_7_4,	HRTS3_N),
-+	PINMUX_IPSR_MSEL(IP5_7_4,	SDA6_B,			SEL_I2C6_1),
-+	PINMUX_IPSR_GPSR(IP5_7_4,	CAN1_RX),
-+	PINMUX_IPSR_GPSR(IP5_7_4,	CANFD1_RX),
-+	PINMUX_IPSR_MSEL(IP5_7_4,	IERX_A,			SEL_IEBUS_0),
-+
-+	PINMUX_IPSR_MSEL(IP5_11_8,	EX_WAIT0_A,		SEL_LBSC_0),
-+	PINMUX_IPSR_GPSR(IP5_11_8,	QCLK),
-+	PINMUX_IPSR_GPSR(IP5_11_8,	VI4_CLK),
-+	PINMUX_IPSR_GPSR(IP5_11_8,	DU_DOTCLKOUT0),
-+
-+	PINMUX_IPSR_GPSR(IP5_15_12,	D0),
-+	PINMUX_IPSR_MSEL(IP5_15_12,	MSIOF2_SS1_B,		SEL_MSIOF2_1),
-+	PINMUX_IPSR_MSEL(IP5_15_12,	MSIOF3_SCK_A,		SEL_MSIOF3_0),
-+	PINMUX_IPSR_GPSR(IP5_15_12,	VI4_DATA16),
-+	PINMUX_IPSR_GPSR(IP5_15_12,	VI5_DATA0),
-+
-+	PINMUX_IPSR_GPSR(IP5_19_16,	D1),
-+	PINMUX_IPSR_MSEL(IP5_19_16,	MSIOF2_SS2_B,		SEL_MSIOF2_1),
-+	PINMUX_IPSR_MSEL(IP5_19_16,	MSIOF3_SYNC_A,		SEL_MSIOF3_0),
-+	PINMUX_IPSR_GPSR(IP5_19_16,	VI4_DATA17),
-+	PINMUX_IPSR_GPSR(IP5_19_16,	VI5_DATA1),
-+
-+	PINMUX_IPSR_GPSR(IP5_23_20,	D2),
-+	PINMUX_IPSR_MSEL(IP5_23_20,	MSIOF3_RXD_A,		SEL_MSIOF3_0),
-+	PINMUX_IPSR_GPSR(IP5_23_20,	VI4_DATA18),
-+	PINMUX_IPSR_GPSR(IP5_23_20,	VI5_DATA2),
-+
-+	PINMUX_IPSR_GPSR(IP5_27_24,	D3),
-+	PINMUX_IPSR_MSEL(IP5_27_24,	MSIOF3_TXD_A,		SEL_MSIOF3_0),
-+	PINMUX_IPSR_GPSR(IP5_27_24,	VI4_DATA19),
-+	PINMUX_IPSR_GPSR(IP5_27_24,	VI5_DATA3),
-+
-+	PINMUX_IPSR_GPSR(IP5_31_28,	D4),
-+	PINMUX_IPSR_MSEL(IP5_31_28,	MSIOF2_SCK_B,		SEL_MSIOF2_1),
-+	PINMUX_IPSR_GPSR(IP5_31_28,	VI4_DATA20),
-+	PINMUX_IPSR_GPSR(IP5_31_28,	VI5_DATA4),
-+
-+	/* IPSR6 */
-+	PINMUX_IPSR_GPSR(IP6_3_0,	D5),
-+	PINMUX_IPSR_MSEL(IP6_3_0,	MSIOF2_SYNC_B,		SEL_MSIOF2_1),
-+	PINMUX_IPSR_GPSR(IP6_3_0,	VI4_DATA21),
-+	PINMUX_IPSR_GPSR(IP6_3_0,	VI5_DATA5),
-+
-+	PINMUX_IPSR_GPSR(IP6_7_4,	D6),
-+	PINMUX_IPSR_MSEL(IP6_7_4,	MSIOF2_RXD_B,		SEL_MSIOF2_1),
-+	PINMUX_IPSR_GPSR(IP6_7_4,	VI4_DATA22),
-+	PINMUX_IPSR_GPSR(IP6_7_4,	VI5_DATA6),
-+
-+	PINMUX_IPSR_GPSR(IP6_11_8,	D7),
-+	PINMUX_IPSR_MSEL(IP6_11_8,	MSIOF2_TXD_B,		SEL_MSIOF2_1),
-+	PINMUX_IPSR_GPSR(IP6_11_8,	VI4_DATA23),
-+	PINMUX_IPSR_GPSR(IP6_11_8,	VI5_DATA7),
-+
-+	PINMUX_IPSR_GPSR(IP6_15_12,	D8),
-+	PINMUX_IPSR_GPSR(IP6_15_12,	LCDOUT0),
-+	PINMUX_IPSR_MSEL(IP6_15_12,	MSIOF2_SCK_D,		SEL_MSIOF2_3),
-+	PINMUX_IPSR_MSEL(IP6_15_12,	SCK4_C,			SEL_SCIF4_2),
-+	PINMUX_IPSR_MSEL(IP6_15_12,	VI4_DATA0_A,		SEL_VIN4_0),
-+	PINMUX_IPSR_GPSR(IP6_15_12,	DU_DR0),
-+
-+	PINMUX_IPSR_GPSR(IP6_19_16,	D9),
-+	PINMUX_IPSR_GPSR(IP6_19_16,	LCDOUT1),
-+	PINMUX_IPSR_MSEL(IP6_19_16,	MSIOF2_SYNC_D,		SEL_MSIOF2_3),
-+	PINMUX_IPSR_MSEL(IP6_19_16,	VI4_DATA1_A,		SEL_VIN4_0),
-+	PINMUX_IPSR_GPSR(IP6_19_16,	DU_DR1),
-+
-+	PINMUX_IPSR_GPSR(IP6_23_20,	D10),
-+	PINMUX_IPSR_GPSR(IP6_23_20,	LCDOUT2),
-+	PINMUX_IPSR_MSEL(IP6_23_20,	MSIOF2_RXD_D,		SEL_MSIOF2_3),
-+	PINMUX_IPSR_MSEL(IP6_23_20,	HRX3_B,			SEL_HSCIF3_1),
-+	PINMUX_IPSR_MSEL(IP6_23_20,	VI4_DATA2_A,		SEL_VIN4_0),
-+	PINMUX_IPSR_MSEL(IP6_23_20,	CTS4_N_C,		SEL_SCIF4_2),
-+	PINMUX_IPSR_GPSR(IP6_23_20,	DU_DR2),
-+
-+	PINMUX_IPSR_GPSR(IP6_27_24,	D11),
-+	PINMUX_IPSR_GPSR(IP6_27_24,	LCDOUT3),
-+	PINMUX_IPSR_MSEL(IP6_27_24,	MSIOF2_TXD_D,		SEL_MSIOF2_3),
-+	PINMUX_IPSR_MSEL(IP6_27_24,	HTX3_B,			SEL_HSCIF3_1),
-+	PINMUX_IPSR_MSEL(IP6_27_24,	VI4_DATA3_A,		SEL_VIN4_0),
-+	PINMUX_IPSR_MSEL(IP6_27_24,	RTS4_N_TANS_C,		SEL_SCIF4_2),
-+	PINMUX_IPSR_GPSR(IP6_27_24,	DU_DR3),
-+
-+	PINMUX_IPSR_GPSR(IP6_31_28,	D12),
-+	PINMUX_IPSR_GPSR(IP6_31_28,	LCDOUT4),
-+	PINMUX_IPSR_MSEL(IP6_31_28,	MSIOF2_SS1_D,		SEL_MSIOF2_3),
-+	PINMUX_IPSR_MSEL(IP6_31_28,	RX4_C,			SEL_SCIF4_2),
-+	PINMUX_IPSR_MSEL(IP6_31_28,	VI4_DATA4_A,		SEL_VIN4_0),
-+	PINMUX_IPSR_GPSR(IP6_31_28,	DU_DR4),
-+
-+	/* IPSR7 */
-+	PINMUX_IPSR_GPSR(IP7_3_0,	D13),
-+	PINMUX_IPSR_GPSR(IP7_3_0,	LCDOUT5),
-+	PINMUX_IPSR_MSEL(IP7_3_0,	MSIOF2_SS2_D,		SEL_MSIOF2_3),
-+	PINMUX_IPSR_MSEL(IP7_3_0,	TX4_C,			SEL_SCIF4_2),
-+	PINMUX_IPSR_MSEL(IP7_3_0,	VI4_DATA5_A,		SEL_VIN4_0),
-+	PINMUX_IPSR_GPSR(IP7_3_0,	DU_DR5),
-+
-+	PINMUX_IPSR_GPSR(IP7_7_4,	D14),
-+	PINMUX_IPSR_GPSR(IP7_7_4,	LCDOUT6),
-+	PINMUX_IPSR_MSEL(IP7_7_4,	MSIOF3_SS1_A,		SEL_MSIOF3_0),
-+	PINMUX_IPSR_MSEL(IP7_7_4,	HRX3_C,			SEL_HSCIF3_2),
-+	PINMUX_IPSR_MSEL(IP7_7_4,	VI4_DATA6_A,		SEL_VIN4_0),
-+	PINMUX_IPSR_GPSR(IP7_7_4,	DU_DR6),
-+	PINMUX_IPSR_MSEL(IP7_7_4,	SCL6_C,			SEL_I2C6_2),
-+
-+	PINMUX_IPSR_GPSR(IP7_11_8,	D15),
-+	PINMUX_IPSR_GPSR(IP7_11_8,	LCDOUT7),
-+	PINMUX_IPSR_MSEL(IP7_11_8,	MSIOF3_SS2_A,		SEL_MSIOF3_0),
-+	PINMUX_IPSR_MSEL(IP7_11_8,	HTX3_C,			SEL_HSCIF3_2),
-+	PINMUX_IPSR_MSEL(IP7_11_8,	VI4_DATA7_A,		SEL_VIN4_0),
-+	PINMUX_IPSR_GPSR(IP7_11_8,	DU_DR7),
-+	PINMUX_IPSR_MSEL(IP7_11_8,	SDA6_C,			SEL_I2C6_2),
-+
-+	PINMUX_IPSR_GPSR(IP7_15_12,	FSCLKST),
-+
-+	PINMUX_IPSR_GPSR(IP7_19_16,	SD0_CLK),
-+	PINMUX_IPSR_MSEL(IP7_19_16,	MSIOF1_SCK_E,		SEL_MSIOF1_4),
-+	PINMUX_IPSR_MSEL(IP7_19_16,	STP_OPWM_0_B,		SEL_SSP1_0_1),
-+
-+	PINMUX_IPSR_GPSR(IP7_23_20,	SD0_CMD),
-+	PINMUX_IPSR_MSEL(IP7_23_20,	MSIOF1_SYNC_E,		SEL_MSIOF1_4),
-+	PINMUX_IPSR_MSEL(IP7_23_20,	STP_IVCXO27_0_B,	SEL_SSP1_0_1),
-+
-+	PINMUX_IPSR_GPSR(IP7_27_24,	SD0_DAT0),
-+	PINMUX_IPSR_MSEL(IP7_27_24,	MSIOF1_RXD_E,		SEL_MSIOF1_4),
-+	PINMUX_IPSR_MSEL(IP7_27_24,	TS_SCK0_B,		SEL_TSIF0_1),
-+	PINMUX_IPSR_MSEL(IP7_27_24,	STP_ISCLK_0_B,		SEL_SSP1_0_1),
-+
-+	PINMUX_IPSR_GPSR(IP7_31_28,	SD0_DAT1),
-+	PINMUX_IPSR_MSEL(IP7_31_28,	MSIOF1_TXD_E,		SEL_MSIOF1_4),
-+	PINMUX_IPSR_MSEL(IP7_31_28,	TS_SPSYNC0_B,		SEL_TSIF0_1),
-+	PINMUX_IPSR_MSEL(IP7_31_28,	STP_ISSYNC_0_B,		SEL_SSP1_0_1),
-+
-+	/* IPSR8 */
-+	PINMUX_IPSR_GPSR(IP8_3_0,	SD0_DAT2),
-+	PINMUX_IPSR_MSEL(IP8_3_0,	MSIOF1_SS1_E,		SEL_MSIOF1_4),
-+	PINMUX_IPSR_MSEL(IP8_3_0,	TS_SDAT0_B,		SEL_TSIF0_1),
-+	PINMUX_IPSR_MSEL(IP8_3_0,	STP_ISD_0_B,		SEL_SSP1_0_1),
-+
-+	PINMUX_IPSR_GPSR(IP8_7_4,	SD0_DAT3),
-+	PINMUX_IPSR_MSEL(IP8_7_4,	MSIOF1_SS2_E,		SEL_MSIOF1_4),
-+	PINMUX_IPSR_MSEL(IP8_7_4,	TS_SDEN0_B,		SEL_TSIF0_1),
-+	PINMUX_IPSR_MSEL(IP8_7_4,	STP_ISEN_0_B,		SEL_SSP1_0_1),
-+
-+	PINMUX_IPSR_GPSR(IP8_11_8,	SD1_CLK),
-+	PINMUX_IPSR_MSEL(IP8_11_8,	MSIOF1_SCK_G,		SEL_MSIOF1_6),
-+	PINMUX_IPSR_MSEL(IP8_11_8,	SIM0_CLK_A,		SEL_SIMCARD_0),
-+
-+	PINMUX_IPSR_GPSR(IP8_15_12,	SD1_CMD),
-+	PINMUX_IPSR_MSEL(IP8_15_12,	MSIOF1_SYNC_G,		SEL_MSIOF1_6),
-+	PINMUX_IPSR_MSEL(IP8_15_12,	SIM0_D_A,		SEL_SIMCARD_0),
-+	PINMUX_IPSR_MSEL(IP8_15_12,	STP_IVCXO27_1_B,	SEL_SSP1_1_1),
-+
-+	PINMUX_IPSR_GPSR(IP8_19_16,	SD1_DAT0),
-+	PINMUX_IPSR_GPSR(IP8_19_16,	SD2_DAT4),
-+	PINMUX_IPSR_MSEL(IP8_19_16,	MSIOF1_RXD_G,		SEL_MSIOF1_6),
-+	PINMUX_IPSR_MSEL(IP8_19_16,	TS_SCK1_B,		SEL_TSIF1_1),
-+	PINMUX_IPSR_MSEL(IP8_19_16,	STP_ISCLK_1_B,		SEL_SSP1_1_1),
-+
-+	PINMUX_IPSR_GPSR(IP8_23_20,	SD1_DAT1),
-+	PINMUX_IPSR_GPSR(IP8_23_20,	SD2_DAT5),
-+	PINMUX_IPSR_MSEL(IP8_23_20,	MSIOF1_TXD_G,		SEL_MSIOF1_6),
-+	PINMUX_IPSR_MSEL(IP8_23_20,	TS_SPSYNC1_B,		SEL_TSIF1_1),
-+	PINMUX_IPSR_MSEL(IP8_23_20,	STP_ISSYNC_1_B,		SEL_SSP1_1_1),
-+
-+	PINMUX_IPSR_GPSR(IP8_27_24,	SD1_DAT2),
-+	PINMUX_IPSR_GPSR(IP8_27_24,	SD2_DAT6),
-+	PINMUX_IPSR_MSEL(IP8_27_24,	MSIOF1_SS1_G,		SEL_MSIOF1_6),
-+	PINMUX_IPSR_MSEL(IP8_27_24,	TS_SDAT1_B,		SEL_TSIF1_1),
-+	PINMUX_IPSR_MSEL(IP8_27_24,	STP_ISD_1_B,		SEL_SSP1_1_1),
-+
-+	PINMUX_IPSR_GPSR(IP8_31_28,	SD1_DAT3),
-+	PINMUX_IPSR_GPSR(IP8_31_28,	SD2_DAT7),
-+	PINMUX_IPSR_MSEL(IP8_31_28,	MSIOF1_SS2_G,		SEL_MSIOF1_6),
-+	PINMUX_IPSR_MSEL(IP8_31_28,	TS_SDEN1_B,		SEL_TSIF1_1),
-+	PINMUX_IPSR_MSEL(IP8_31_28,	STP_ISEN_1_B,		SEL_SSP1_1_1),
-+
-+	/* IPSR9 */
-+	PINMUX_IPSR_GPSR(IP9_3_0,	SD2_CLK),
-+
-+	PINMUX_IPSR_GPSR(IP9_7_4,	SD2_DAT0),
-+
-+	PINMUX_IPSR_GPSR(IP9_11_8,	SD2_DAT1),
-+
-+	PINMUX_IPSR_GPSR(IP9_15_12,	SD2_DAT2),
-+
-+	PINMUX_IPSR_GPSR(IP9_19_16,	SD2_DAT3),
-+
-+	PINMUX_IPSR_GPSR(IP9_23_20,	SD2_DS),
-+	PINMUX_IPSR_MSEL(IP9_23_20,	SATA_DEVSLP_B,		SEL_SATA_1),
-+
-+	PINMUX_IPSR_GPSR(IP9_27_24,	SD3_DAT4),
-+	PINMUX_IPSR_MSEL(IP9_27_24,	SD2_CD_A,		SEL_SDHI2_0),
-+
-+	PINMUX_IPSR_GPSR(IP9_31_28,	SD3_DAT5),
-+	PINMUX_IPSR_MSEL(IP9_31_28,	SD2_WP_A,		SEL_SDHI2_0),
-+
-+	/* IPSR10 */
-+	PINMUX_IPSR_GPSR(IP10_3_0,	SD3_DAT6),
-+	PINMUX_IPSR_GPSR(IP10_3_0,	SD3_CD),
-+
-+	PINMUX_IPSR_GPSR(IP10_7_4,	SD3_DAT7),
-+	PINMUX_IPSR_GPSR(IP10_7_4,	SD3_WP),
-+
-+	PINMUX_IPSR_GPSR(IP10_11_8,	SD0_CD),
-+	PINMUX_IPSR_MSEL(IP10_11_8,	SCL2_B,			SEL_I2C2_1),
-+	PINMUX_IPSR_MSEL(IP10_11_8,	SIM0_RST_A,		SEL_SIMCARD_0),
-+
-+	PINMUX_IPSR_GPSR(IP10_15_12,	SD0_WP),
-+	PINMUX_IPSR_MSEL(IP10_15_12,	SDA2_B,			SEL_I2C2_1),
-+
-+	PINMUX_IPSR_GPSR(IP10_19_16,	SD1_CD),
-+	PINMUX_IPSR_MSEL(IP10_19_16,	SIM0_CLK_B,		SEL_SIMCARD_1),
-+
-+	PINMUX_IPSR_GPSR(IP10_23_20,	SD1_WP),
-+	PINMUX_IPSR_MSEL(IP10_23_20,	SIM0_D_B,		SEL_SIMCARD_1),
-+
-+	PINMUX_IPSR_GPSR(IP10_27_24,	SCK0),
-+	PINMUX_IPSR_MSEL(IP10_27_24,	HSCK1_B,		SEL_HSCIF1_1),
-+	PINMUX_IPSR_MSEL(IP10_27_24,	MSIOF1_SS2_B,		SEL_MSIOF1_1),
-+	PINMUX_IPSR_MSEL(IP10_27_24,	AUDIO_CLKC_B,		SEL_ADG_1),
-+	PINMUX_IPSR_MSEL(IP10_27_24,	SDA2_A,			SEL_I2C2_0),
-+	PINMUX_IPSR_MSEL(IP10_27_24,	SIM0_RST_B,		SEL_SIMCARD_1),
-+	PINMUX_IPSR_MSEL(IP10_27_24,	STP_OPWM_0_C,		SEL_SSP1_0_2),
-+	PINMUX_IPSR_MSEL(IP10_27_24,	RIF0_CLK_B,		SEL_DRIF0_1),
-+	PINMUX_IPSR_GPSR(IP10_27_24,	ADICHS2),
-+
-+	PINMUX_IPSR_GPSR(IP10_31_28,	RX0),
-+	PINMUX_IPSR_MSEL(IP10_31_28,	HRX1_B,			SEL_HSCIF1_1),
-+	PINMUX_IPSR_MSEL(IP10_31_28,	TS_SCK0_C,		SEL_TSIF0_2),
-+	PINMUX_IPSR_MSEL(IP10_31_28,	STP_ISCLK_0_C,		SEL_SSP1_0_2),
-+	PINMUX_IPSR_MSEL(IP10_31_28,	RIF0_D0_B,		SEL_DRIF0_1),
-+
-+	/* IPSR11 */
-+	PINMUX_IPSR_GPSR(IP11_3_0,	TX0),
-+	PINMUX_IPSR_MSEL(IP11_3_0,	HTX1_B,			SEL_HSCIF1_1),
-+	PINMUX_IPSR_MSEL(IP11_3_0,	TS_SPSYNC0_C,		SEL_TSIF0_2),
-+	PINMUX_IPSR_MSEL(IP11_3_0,	STP_ISSYNC_0_C,		SEL_SSP1_0_2),
-+	PINMUX_IPSR_MSEL(IP11_3_0,	RIF0_D1_B,		SEL_DRIF0_1),
-+
-+	PINMUX_IPSR_GPSR(IP11_7_4,	CTS0_N),
-+	PINMUX_IPSR_MSEL(IP11_7_4,	HCTS1_N_B,		SEL_HSCIF1_1),
-+	PINMUX_IPSR_MSEL(IP11_7_4,	MSIOF1_SYNC_B,		SEL_MSIOF1_1),
-+	PINMUX_IPSR_MSEL(IP11_7_4,	TS_SPSYNC1_C,		SEL_TSIF1_2),
-+	PINMUX_IPSR_MSEL(IP11_7_4,	STP_ISSYNC_1_C,		SEL_SSP1_1_2),
-+	PINMUX_IPSR_MSEL(IP11_7_4,	RIF1_SYNC_B,		SEL_DRIF1_1),
-+	PINMUX_IPSR_MSEL(IP11_7_4,	AUDIO_CLKOUT_C,		SEL_ADG_2),
-+	PINMUX_IPSR_GPSR(IP11_7_4,	ADICS_SAMP),
-+
-+	PINMUX_IPSR_GPSR(IP11_11_8,	RTS0_N_TANS),
-+	PINMUX_IPSR_MSEL(IP11_11_8,	HRTS1_N_B,		SEL_HSCIF1_1),
-+	PINMUX_IPSR_MSEL(IP11_11_8,	MSIOF1_SS1_B,		SEL_MSIOF1_1),
-+	PINMUX_IPSR_MSEL(IP11_11_8,	AUDIO_CLKA_B,		SEL_ADG_1),
-+	PINMUX_IPSR_MSEL(IP11_11_8,	SCL2_A,			SEL_I2C2_0),
-+	PINMUX_IPSR_MSEL(IP11_11_8,	STP_IVCXO27_1_C,	SEL_SSP1_1_2),
-+	PINMUX_IPSR_MSEL(IP11_11_8,	RIF0_SYNC_B,		SEL_DRIF0_1),
-+	PINMUX_IPSR_GPSR(IP11_11_8,	ADICHS1),
-+
-+	PINMUX_IPSR_MSEL(IP11_15_12,	RX1_A,			SEL_SCIF1_0),
-+	PINMUX_IPSR_MSEL(IP11_15_12,	HRX1_A,			SEL_HSCIF1_0),
-+	PINMUX_IPSR_MSEL(IP11_15_12,	TS_SDAT0_C,		SEL_TSIF0_2),
-+	PINMUX_IPSR_MSEL(IP11_15_12,	STP_ISD_0_C,		SEL_SSP1_0_2),
-+	PINMUX_IPSR_MSEL(IP11_15_12,	RIF1_CLK_C,		SEL_DRIF1_2),
-+
-+	PINMUX_IPSR_MSEL(IP11_19_16,	TX1_A,			SEL_SCIF1_0),
-+	PINMUX_IPSR_MSEL(IP11_19_16,	HTX1_A,			SEL_HSCIF1_0),
-+	PINMUX_IPSR_MSEL(IP11_19_16,	TS_SDEN0_C,		SEL_TSIF0_2),
-+	PINMUX_IPSR_MSEL(IP11_19_16,	STP_ISEN_0_C,		SEL_SSP1_0_2),
-+	PINMUX_IPSR_MSEL(IP11_19_16,	RIF1_D0_C,		SEL_DRIF1_2),
-+
-+	PINMUX_IPSR_GPSR(IP11_23_20,	CTS1_N),
-+	PINMUX_IPSR_MSEL(IP11_23_20,	HCTS1_N_A,		SEL_HSCIF1_0),
-+	PINMUX_IPSR_MSEL(IP11_23_20,	MSIOF1_RXD_B,		SEL_MSIOF1_1),
-+	PINMUX_IPSR_MSEL(IP11_23_20,	TS_SDEN1_C,		SEL_TSIF1_2),
-+	PINMUX_IPSR_MSEL(IP11_23_20,	STP_ISEN_1_C,		SEL_SSP1_1_2),
-+	PINMUX_IPSR_MSEL(IP11_23_20,	RIF1_D0_B,		SEL_DRIF1_1),
-+	PINMUX_IPSR_GPSR(IP11_23_20,	ADIDATA),
-+
-+	PINMUX_IPSR_GPSR(IP11_27_24,	RTS1_N_TANS),
-+	PINMUX_IPSR_MSEL(IP11_27_24,	HRTS1_N_A,		SEL_HSCIF1_0),
-+	PINMUX_IPSR_MSEL(IP11_27_24,	MSIOF1_TXD_B,		SEL_MSIOF1_1),
-+	PINMUX_IPSR_MSEL(IP11_27_24,	TS_SDAT1_C,		SEL_TSIF1_2),
-+	PINMUX_IPSR_MSEL(IP11_27_24,	STP_ISD_1_C,		SEL_SSP1_1_2),
-+	PINMUX_IPSR_MSEL(IP11_27_24,	RIF1_D1_B,		SEL_DRIF1_1),
-+	PINMUX_IPSR_GPSR(IP11_27_24,	ADICHS0),
-+
-+	PINMUX_IPSR_GPSR(IP11_31_28,	SCK2),
-+	PINMUX_IPSR_MSEL(IP11_31_28,	SCIF_CLK_B,		SEL_SCIF1_1),
-+	PINMUX_IPSR_MSEL(IP11_31_28,	MSIOF1_SCK_B,		SEL_MSIOF1_1),
-+	PINMUX_IPSR_MSEL(IP11_31_28,	TS_SCK1_C,		SEL_TSIF1_2),
-+	PINMUX_IPSR_MSEL(IP11_31_28,	STP_ISCLK_1_C,		SEL_SSP1_1_2),
-+	PINMUX_IPSR_MSEL(IP11_31_28,	RIF1_CLK_B,		SEL_DRIF1_1),
-+	PINMUX_IPSR_GPSR(IP11_31_28,	ADICLK),
-+
-+	/* IPSR12 */
-+	PINMUX_IPSR_MSEL(IP12_3_0,	TX2_A,			SEL_SCIF2_0),
-+	PINMUX_IPSR_MSEL(IP12_3_0,	SD2_CD_B,		SEL_SDHI2_1),
-+	PINMUX_IPSR_MSEL(IP12_3_0,	SCL1_A,			SEL_I2C1_0),
-+	PINMUX_IPSR_MSEL(IP12_3_0,	FMCLK_A,		SEL_FM_0),
-+	PINMUX_IPSR_MSEL(IP12_3_0,	RIF1_D1_C,		SEL_DRIF1_2),
-+	PINMUX_IPSR_MSEL(IP12_3_0,	FSO_CFE_0_B,		SEL_FSO_1),
-+
-+	PINMUX_IPSR_MSEL(IP12_7_4,	RX2_A,			SEL_SCIF2_0),
-+	PINMUX_IPSR_MSEL(IP12_7_4,	SD2_WP_B,		SEL_SDHI2_1),
-+	PINMUX_IPSR_MSEL(IP12_7_4,	SDA1_A,			SEL_I2C1_0),
-+	PINMUX_IPSR_MSEL(IP12_7_4,	FMIN_A,			SEL_FM_0),
-+	PINMUX_IPSR_MSEL(IP12_7_4,	RIF1_SYNC_C,		SEL_DRIF1_2),
-+	PINMUX_IPSR_MSEL(IP12_7_4,	FSO_CFE_1_B,		SEL_FSO_1),
-+
-+	PINMUX_IPSR_GPSR(IP12_11_8,	HSCK0),
-+	PINMUX_IPSR_MSEL(IP12_11_8,	MSIOF1_SCK_D,		SEL_MSIOF1_3),
-+	PINMUX_IPSR_MSEL(IP12_11_8,	AUDIO_CLKB_A,		SEL_ADG_0),
-+	PINMUX_IPSR_MSEL(IP12_11_8,	SSI_SDATA1_B,		SEL_SSI_1),
-+	PINMUX_IPSR_MSEL(IP12_11_8,	TS_SCK0_D,		SEL_TSIF0_3),
-+	PINMUX_IPSR_MSEL(IP12_11_8,	STP_ISCLK_0_D,		SEL_SSP1_0_3),
-+	PINMUX_IPSR_MSEL(IP12_11_8,	RIF0_CLK_C,		SEL_DRIF0_2),
-+
-+	PINMUX_IPSR_GPSR(IP12_15_12,	HRX0),
-+	PINMUX_IPSR_MSEL(IP12_15_12,	MSIOF1_RXD_D,		SEL_MSIOF1_3),
-+	PINMUX_IPSR_MSEL(IP12_15_12,	SSI_SDATA2_B,		SEL_SSI_1),
-+	PINMUX_IPSR_MSEL(IP12_15_12,	TS_SDEN0_D,		SEL_TSIF0_3),
-+	PINMUX_IPSR_MSEL(IP12_15_12,	STP_ISEN_0_D,		SEL_SSP1_0_3),
-+	PINMUX_IPSR_MSEL(IP12_15_12,	RIF0_D0_C,		SEL_DRIF0_2),
-+
-+	PINMUX_IPSR_GPSR(IP12_19_16,	HTX0),
-+	PINMUX_IPSR_MSEL(IP12_19_16,	MSIOF1_TXD_D,		SEL_MSIOF1_3),
-+	PINMUX_IPSR_MSEL(IP12_19_16,	SSI_SDATA9_B,		SEL_SSI_1),
-+	PINMUX_IPSR_MSEL(IP12_19_16,	TS_SDAT0_D,		SEL_TSIF0_3),
-+	PINMUX_IPSR_MSEL(IP12_19_16,	STP_ISD_0_D,		SEL_SSP1_0_3),
-+	PINMUX_IPSR_MSEL(IP12_19_16,	RIF0_D1_C,		SEL_DRIF0_2),
-+
-+	PINMUX_IPSR_GPSR(IP12_23_20,	HCTS0_N),
-+	PINMUX_IPSR_MSEL(IP12_23_20,	RX2_B,			SEL_SCIF2_1),
-+	PINMUX_IPSR_MSEL(IP12_23_20,	MSIOF1_SYNC_D,		SEL_MSIOF1_3),
-+	PINMUX_IPSR_MSEL(IP12_23_20,	SSI_SCK9_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP12_23_20,	TS_SPSYNC0_D,		SEL_TSIF0_3),
-+	PINMUX_IPSR_MSEL(IP12_23_20,	STP_ISSYNC_0_D,		SEL_SSP1_0_3),
-+	PINMUX_IPSR_MSEL(IP12_23_20,	RIF0_SYNC_C,		SEL_DRIF0_2),
-+	PINMUX_IPSR_MSEL(IP12_23_20,	AUDIO_CLKOUT1_A,	SEL_ADG_0),
-+
-+	PINMUX_IPSR_GPSR(IP12_27_24,	HRTS0_N),
-+	PINMUX_IPSR_MSEL(IP12_27_24,	TX2_B,			SEL_SCIF2_1),
-+	PINMUX_IPSR_MSEL(IP12_27_24,	MSIOF1_SS1_D,		SEL_MSIOF1_3),
-+	PINMUX_IPSR_MSEL(IP12_27_24,	SSI_WS9_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP12_27_24,	STP_IVCXO27_0_D,	SEL_SSP1_0_3),
-+	PINMUX_IPSR_MSEL(IP12_27_24,	BPFCLK_A,		SEL_FM_0),
-+	PINMUX_IPSR_MSEL(IP12_27_24,	AUDIO_CLKOUT2_A,	SEL_ADG_0),
-+
-+	PINMUX_IPSR_GPSR(IP12_31_28,	MSIOF0_SYNC),
-+	PINMUX_IPSR_MSEL(IP12_31_28,	AUDIO_CLKOUT_A,		SEL_ADG_0),
-+
-+	/* IPSR13 */
-+	PINMUX_IPSR_GPSR(IP13_3_0,	MSIOF0_SS1),
-+	PINMUX_IPSR_GPSR(IP13_3_0,	RX5),
-+	PINMUX_IPSR_MSEL(IP13_3_0,	AUDIO_CLKA_C,		SEL_ADG_2),
-+	PINMUX_IPSR_MSEL(IP13_3_0,	SSI_SCK2_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP13_3_0,	STP_IVCXO27_0_C,	SEL_SSP1_0_2),
-+	PINMUX_IPSR_MSEL(IP13_3_0,	AUDIO_CLKOUT3_A,	SEL_ADG_0),
-+	PINMUX_IPSR_MSEL(IP13_3_0,	TCLK1_B,		SEL_TIMER_TMU_1),
-+
-+	PINMUX_IPSR_GPSR(IP13_7_4,	MSIOF0_SS2),
-+	PINMUX_IPSR_GPSR(IP13_7_4,	TX5),
-+	PINMUX_IPSR_MSEL(IP13_7_4,	MSIOF1_SS2_D,		SEL_MSIOF1_3),
-+	PINMUX_IPSR_MSEL(IP13_7_4,	AUDIO_CLKC_A,		SEL_ADG_0),
-+	PINMUX_IPSR_MSEL(IP13_7_4,	SSI_WS2_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP13_7_4,	STP_OPWM_0_D,		SEL_SSP1_0_3),
-+	PINMUX_IPSR_MSEL(IP13_7_4,	AUDIO_CLKOUT_D,		SEL_ADG_3),
-+	PINMUX_IPSR_MSEL(IP13_7_4,	SPEEDIN_B,		SEL_SPEED_PULSE_1),
-+
-+	PINMUX_IPSR_GPSR(IP13_11_8,	MLB_CLK),
-+	PINMUX_IPSR_MSEL(IP13_11_8,	MSIOF1_SCK_F,		SEL_MSIOF1_5),
-+	PINMUX_IPSR_MSEL(IP13_11_8,	SCL1_B,			SEL_I2C1_1),
-+
-+	PINMUX_IPSR_GPSR(IP13_15_12,	MLB_SIG),
-+	PINMUX_IPSR_MSEL(IP13_15_12,	RX1_B,			SEL_SCIF1_1),
-+	PINMUX_IPSR_MSEL(IP13_15_12,	MSIOF1_SYNC_F,		SEL_MSIOF1_5),
-+	PINMUX_IPSR_MSEL(IP13_15_12,	SDA1_B,			SEL_I2C1_1),
-+
-+	PINMUX_IPSR_GPSR(IP13_19_16,	MLB_DAT),
-+	PINMUX_IPSR_MSEL(IP13_19_16,	TX1_B,			SEL_SCIF1_1),
-+	PINMUX_IPSR_MSEL(IP13_19_16,	MSIOF1_RXD_F,		SEL_MSIOF1_5),
-+
-+	PINMUX_IPSR_GPSR(IP13_23_20,	SSI_SCK01239),
-+	PINMUX_IPSR_MSEL(IP13_23_20,	MSIOF1_TXD_F,		SEL_MSIOF1_5),
-+
-+	PINMUX_IPSR_GPSR(IP13_27_24,	SSI_WS01239),
-+	PINMUX_IPSR_MSEL(IP13_27_24,	MSIOF1_SS1_F,		SEL_MSIOF1_5),
-+
-+	PINMUX_IPSR_GPSR(IP13_31_28,	SSI_SDATA0),
-+	PINMUX_IPSR_MSEL(IP13_31_28,	MSIOF1_SS2_F,		SEL_MSIOF1_5),
-+
-+	/* IPSR14 */
-+	PINMUX_IPSR_MSEL(IP14_3_0,	SSI_SDATA1_A,		SEL_SSI_0),
-+
-+	PINMUX_IPSR_MSEL(IP14_7_4,	SSI_SDATA2_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP14_7_4,	SSI_SCK1_B,		SEL_SSI_1),
-+
-+	PINMUX_IPSR_GPSR(IP14_11_8,	SSI_SCK34),
-+	PINMUX_IPSR_MSEL(IP14_11_8,	MSIOF1_SS1_A,		SEL_MSIOF1_0),
-+	PINMUX_IPSR_MSEL(IP14_11_8,	STP_OPWM_0_A,		SEL_SSP1_0_0),
-+
-+	PINMUX_IPSR_GPSR(IP14_15_12,	SSI_WS34),
-+	PINMUX_IPSR_MSEL(IP14_15_12,	HCTS2_N_A,		SEL_HSCIF2_0),
-+	PINMUX_IPSR_MSEL(IP14_15_12,	MSIOF1_SS2_A,		SEL_MSIOF1_0),
-+	PINMUX_IPSR_MSEL(IP14_15_12,	STP_IVCXO27_0_A,	SEL_SSP1_0_0),
-+
-+	PINMUX_IPSR_GPSR(IP14_19_16,	SSI_SDATA3),
-+	PINMUX_IPSR_MSEL(IP14_19_16,	HRTS2_N_A,		SEL_HSCIF2_0),
-+	PINMUX_IPSR_MSEL(IP14_19_16,	MSIOF1_TXD_A,		SEL_MSIOF1_0),
-+	PINMUX_IPSR_MSEL(IP14_19_16,	TS_SCK0_A,		SEL_TSIF0_0),
-+	PINMUX_IPSR_MSEL(IP14_19_16,	STP_ISCLK_0_A,		SEL_SSP1_0_0),
-+	PINMUX_IPSR_MSEL(IP14_19_16,	RIF0_D1_A,		SEL_DRIF0_0),
-+	PINMUX_IPSR_MSEL(IP14_19_16,	RIF2_D0_A,		SEL_DRIF2_0),
-+
-+	PINMUX_IPSR_GPSR(IP14_23_20,	SSI_SCK4),
-+	PINMUX_IPSR_MSEL(IP14_23_20,	HRX2_A,			SEL_HSCIF2_0),
-+	PINMUX_IPSR_MSEL(IP14_23_20,	MSIOF1_SCK_A,		SEL_MSIOF1_0),
-+	PINMUX_IPSR_MSEL(IP14_23_20,	TS_SDAT0_A,		SEL_TSIF0_0),
-+	PINMUX_IPSR_MSEL(IP14_23_20,	STP_ISD_0_A,		SEL_SSP1_0_0),
-+	PINMUX_IPSR_MSEL(IP14_23_20,	RIF0_CLK_A,		SEL_DRIF0_0),
-+	PINMUX_IPSR_MSEL(IP14_23_20,	RIF2_CLK_A,		SEL_DRIF2_0),
-+
-+	PINMUX_IPSR_GPSR(IP14_27_24,	SSI_WS4),
-+	PINMUX_IPSR_MSEL(IP14_27_24,	HTX2_A,			SEL_HSCIF2_0),
-+	PINMUX_IPSR_MSEL(IP14_27_24,	MSIOF1_SYNC_A,		SEL_MSIOF1_0),
-+	PINMUX_IPSR_MSEL(IP14_27_24,	TS_SDEN0_A,		SEL_TSIF0_0),
-+	PINMUX_IPSR_MSEL(IP14_27_24,	STP_ISEN_0_A,		SEL_SSP1_0_0),
-+	PINMUX_IPSR_MSEL(IP14_27_24,	RIF0_SYNC_A,		SEL_DRIF0_0),
-+	PINMUX_IPSR_MSEL(IP14_27_24,	RIF2_SYNC_A,		SEL_DRIF2_0),
-+
-+	PINMUX_IPSR_GPSR(IP14_31_28,	SSI_SDATA4),
-+	PINMUX_IPSR_MSEL(IP14_31_28,	HSCK2_A,		SEL_HSCIF2_0),
-+	PINMUX_IPSR_MSEL(IP14_31_28,	MSIOF1_RXD_A,		SEL_MSIOF1_0),
-+	PINMUX_IPSR_MSEL(IP14_31_28,	TS_SPSYNC0_A,		SEL_TSIF0_0),
-+	PINMUX_IPSR_MSEL(IP14_31_28,	STP_ISSYNC_0_A,		SEL_SSP1_0_0),
-+	PINMUX_IPSR_MSEL(IP14_31_28,	RIF0_D0_A,		SEL_DRIF0_0),
-+	PINMUX_IPSR_MSEL(IP14_31_28,	RIF2_D1_A,		SEL_DRIF2_0),
-+
-+	/* IPSR15 */
-+	PINMUX_IPSR_GPSR(IP15_3_0,	SSI_SCK6),
-+	PINMUX_IPSR_GPSR(IP15_3_0,	USB2_PWEN),
-+	PINMUX_IPSR_MSEL(IP15_3_0,	SIM0_RST_D,		SEL_SIMCARD_3),
-+
-+	PINMUX_IPSR_GPSR(IP15_7_4,	SSI_WS6),
-+	PINMUX_IPSR_GPSR(IP15_7_4,	USB2_OVC),
-+	PINMUX_IPSR_MSEL(IP15_7_4,	SIM0_D_D,		SEL_SIMCARD_3),
-+
-+	PINMUX_IPSR_GPSR(IP15_11_8,	SSI_SDATA6),
-+	PINMUX_IPSR_MSEL(IP15_11_8,	SIM0_CLK_D,		SEL_SIMCARD_3),
-+	PINMUX_IPSR_MSEL(IP15_11_8,	SATA_DEVSLP_A,		SEL_SATA_0),
-+
-+	PINMUX_IPSR_GPSR(IP15_15_12,	SSI_SCK78),
-+	PINMUX_IPSR_MSEL(IP15_15_12,	HRX2_B,			SEL_HSCIF2_1),
-+	PINMUX_IPSR_MSEL(IP15_15_12,	MSIOF1_SCK_C,		SEL_MSIOF1_2),
-+	PINMUX_IPSR_MSEL(IP15_15_12,	TS_SCK1_A,		SEL_TSIF1_0),
-+	PINMUX_IPSR_MSEL(IP15_15_12,	STP_ISCLK_1_A,		SEL_SSP1_1_0),
-+	PINMUX_IPSR_MSEL(IP15_15_12,	RIF1_CLK_A,		SEL_DRIF1_0),
-+	PINMUX_IPSR_MSEL(IP15_15_12,	RIF3_CLK_A,		SEL_DRIF3_0),
-+
-+	PINMUX_IPSR_GPSR(IP15_19_16,	SSI_WS78),
-+	PINMUX_IPSR_MSEL(IP15_19_16,	HTX2_B,			SEL_HSCIF2_1),
-+	PINMUX_IPSR_MSEL(IP15_19_16,	MSIOF1_SYNC_C,		SEL_MSIOF1_2),
-+	PINMUX_IPSR_MSEL(IP15_19_16,	TS_SDAT1_A,		SEL_TSIF1_0),
-+	PINMUX_IPSR_MSEL(IP15_19_16,	STP_ISD_1_A,		SEL_SSP1_1_0),
-+	PINMUX_IPSR_MSEL(IP15_19_16,	RIF1_SYNC_A,		SEL_DRIF1_0),
-+	PINMUX_IPSR_MSEL(IP15_19_16,	RIF3_SYNC_A,		SEL_DRIF3_0),
-+
-+	PINMUX_IPSR_GPSR(IP15_23_20,	SSI_SDATA7),
-+	PINMUX_IPSR_MSEL(IP15_23_20,	HCTS2_N_B,		SEL_HSCIF2_1),
-+	PINMUX_IPSR_MSEL(IP15_23_20,	MSIOF1_RXD_C,		SEL_MSIOF1_2),
-+	PINMUX_IPSR_MSEL(IP15_23_20,	TS_SDEN1_A,		SEL_TSIF1_0),
-+	PINMUX_IPSR_MSEL(IP15_23_20,	STP_ISEN_1_A,		SEL_SSP1_1_0),
-+	PINMUX_IPSR_MSEL(IP15_23_20,	RIF1_D0_A,		SEL_DRIF1_0),
-+	PINMUX_IPSR_MSEL(IP15_23_20,	RIF3_D0_A,		SEL_DRIF3_0),
-+	PINMUX_IPSR_MSEL(IP15_23_20,	TCLK2_A,		SEL_TIMER_TMU_0),
-+
-+	PINMUX_IPSR_GPSR(IP15_27_24,	SSI_SDATA8),
-+	PINMUX_IPSR_MSEL(IP15_27_24,	HRTS2_N_B,		SEL_HSCIF2_1),
-+	PINMUX_IPSR_MSEL(IP15_27_24,	MSIOF1_TXD_C,		SEL_MSIOF1_2),
-+	PINMUX_IPSR_MSEL(IP15_27_24,	TS_SPSYNC1_A,		SEL_TSIF1_0),
-+	PINMUX_IPSR_MSEL(IP15_27_24,	STP_ISSYNC_1_A,		SEL_SSP1_1_0),
-+	PINMUX_IPSR_MSEL(IP15_27_24,	RIF1_D1_A,		SEL_DRIF1_0),
-+	PINMUX_IPSR_MSEL(IP15_27_24,	RIF3_D1_A,		SEL_DRIF3_0),
-+
-+	PINMUX_IPSR_MSEL(IP15_31_28,	SSI_SDATA9_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP15_31_28,	HSCK2_B,		SEL_HSCIF2_1),
-+	PINMUX_IPSR_MSEL(IP15_31_28,	MSIOF1_SS1_C,		SEL_MSIOF1_2),
-+	PINMUX_IPSR_MSEL(IP15_31_28,	HSCK1_A,		SEL_HSCIF1_0),
-+	PINMUX_IPSR_MSEL(IP15_31_28,	SSI_WS1_B,		SEL_SSI_1),
-+	PINMUX_IPSR_GPSR(IP15_31_28,	SCK1),
-+	PINMUX_IPSR_MSEL(IP15_31_28,	STP_IVCXO27_1_A,	SEL_SSP1_1_0),
-+	PINMUX_IPSR_GPSR(IP15_31_28,	SCK5),
-+
-+	/* IPSR16 */
-+	PINMUX_IPSR_MSEL(IP16_3_0,	AUDIO_CLKA_A,		SEL_ADG_0),
-+	PINMUX_IPSR_GPSR(IP16_3_0,	CC5_OSCOUT),
-+
-+	PINMUX_IPSR_MSEL(IP16_7_4,	AUDIO_CLKB_B,		SEL_ADG_1),
-+	PINMUX_IPSR_MSEL(IP16_7_4,	SCIF_CLK_A,		SEL_SCIF1_0),
-+	PINMUX_IPSR_MSEL(IP16_7_4,	STP_IVCXO27_1_D,	SEL_SSP1_1_3),
-+	PINMUX_IPSR_MSEL(IP16_7_4,	REMOCON_A,		SEL_REMOCON_0),
-+	PINMUX_IPSR_MSEL(IP16_7_4,	TCLK1_A,		SEL_TIMER_TMU_0),
-+
-+	PINMUX_IPSR_GPSR(IP16_11_8,	USB0_PWEN),
-+	PINMUX_IPSR_MSEL(IP16_11_8,	SIM0_RST_C,		SEL_SIMCARD_2),
-+	PINMUX_IPSR_MSEL(IP16_11_8,	TS_SCK1_D,		SEL_TSIF1_3),
-+	PINMUX_IPSR_MSEL(IP16_11_8,	STP_ISCLK_1_D,		SEL_SSP1_1_3),
-+	PINMUX_IPSR_MSEL(IP16_11_8,	BPFCLK_B,		SEL_FM_1),
-+	PINMUX_IPSR_MSEL(IP16_11_8,	RIF3_CLK_B,		SEL_DRIF3_1),
-+
-+	PINMUX_IPSR_GPSR(IP16_15_12,	USB0_OVC),
-+	PINMUX_IPSR_MSEL(IP16_11_8,	SIM0_D_C,		SEL_SIMCARD_2),
-+	PINMUX_IPSR_MSEL(IP16_11_8,	TS_SDAT1_D,		SEL_TSIF1_3),
-+	PINMUX_IPSR_MSEL(IP16_11_8,	STP_ISD_1_D,		SEL_SSP1_1_3),
-+	PINMUX_IPSR_MSEL(IP16_11_8,	RIF3_SYNC_B,		SEL_DRIF3_1),
-+
-+	PINMUX_IPSR_GPSR(IP16_19_16,	USB1_PWEN),
-+	PINMUX_IPSR_MSEL(IP16_19_16,	SIM0_CLK_C,		SEL_SIMCARD_2),
-+	PINMUX_IPSR_MSEL(IP16_19_16,	SSI_SCK1_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP16_19_16,	TS_SCK0_E,		SEL_TSIF0_4),
-+	PINMUX_IPSR_MSEL(IP16_19_16,	STP_ISCLK_0_E,		SEL_SSP1_0_4),
-+	PINMUX_IPSR_MSEL(IP16_19_16,	FMCLK_B,		SEL_FM_1),
-+	PINMUX_IPSR_MSEL(IP16_19_16,	RIF2_CLK_B,		SEL_DRIF2_1),
-+	PINMUX_IPSR_MSEL(IP16_19_16,	SPEEDIN_A,		SEL_SPEED_PULSE_0),
-+
-+	PINMUX_IPSR_GPSR(IP16_23_20,	USB1_OVC),
-+	PINMUX_IPSR_MSEL(IP16_23_20,	MSIOF1_SS2_C,		SEL_MSIOF1_2),
-+	PINMUX_IPSR_MSEL(IP16_23_20,	SSI_WS1_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP16_23_20,	TS_SDAT0_E,		SEL_TSIF0_4),
-+	PINMUX_IPSR_MSEL(IP16_23_20,	STP_ISD_0_E,		SEL_SSP1_0_4),
-+	PINMUX_IPSR_MSEL(IP16_23_20,	FMIN_B,			SEL_FM_1),
-+	PINMUX_IPSR_MSEL(IP16_23_20,	RIF2_SYNC_B,		SEL_DRIF2_1),
-+	PINMUX_IPSR_MSEL(IP16_23_20,	REMOCON_B,		SEL_REMOCON_1),
-+
-+	PINMUX_IPSR_GPSR(IP16_27_24,	USB30_PWEN),
-+	PINMUX_IPSR_MSEL(IP16_27_24,	AUDIO_CLKOUT_B,		SEL_ADG_1),
-+	PINMUX_IPSR_MSEL(IP16_27_24,	SSI_SCK2_B,		SEL_SSI_1),
-+	PINMUX_IPSR_MSEL(IP16_27_24,	TS_SDEN1_D,		SEL_TSIF1_3),
-+	PINMUX_IPSR_MSEL(IP16_27_24,	STP_ISEN_1_D,		SEL_SSP1_1_2),
-+	PINMUX_IPSR_MSEL(IP16_27_24,	STP_OPWM_0_E,		SEL_SSP1_0_4),
-+	PINMUX_IPSR_MSEL(IP16_27_24,	RIF3_D0_B,		SEL_DRIF3_1),
-+	PINMUX_IPSR_MSEL(IP16_27_24,	TCLK2_B,		SEL_TIMER_TMU_1),
-+	PINMUX_IPSR_GPSR(IP16_27_24,	TPU0TO0),
-+
-+	PINMUX_IPSR_GPSR(IP16_31_28,	USB30_OVC),
-+	PINMUX_IPSR_MSEL(IP16_31_28,	AUDIO_CLKOUT1_B,	SEL_ADG_1),
-+	PINMUX_IPSR_MSEL(IP16_31_28,	SSI_WS2_B,		SEL_SSI_1),
-+	PINMUX_IPSR_MSEL(IP16_31_28,	TS_SPSYNC1_D,		SEL_TSIF1_3),
-+	PINMUX_IPSR_MSEL(IP16_31_28,	STP_ISSYNC_1_D,		SEL_SSP1_1_3),
-+	PINMUX_IPSR_MSEL(IP16_31_28,	STP_IVCXO27_0_E,	SEL_SSP1_0_4),
-+	PINMUX_IPSR_MSEL(IP16_31_28,	RIF3_D1_B,		SEL_DRIF3_1),
-+	PINMUX_IPSR_MSEL(IP16_31_28,	FSO_TOE_B,		SEL_FSO_1),
-+	PINMUX_IPSR_GPSR(IP16_31_28,	TPU0TO1),
-+
-+	/* IPSR17 */
-+	PINMUX_IPSR_GPSR(IP17_3_0,	USB31_PWEN),
-+	PINMUX_IPSR_MSEL(IP17_3_0,	AUDIO_CLKOUT2_B,	SEL_ADG_1),
-+	PINMUX_IPSR_MSEL(IP17_3_0,	SSI_SCK9_B,		SEL_SSI_1),
-+	PINMUX_IPSR_MSEL(IP17_3_0,	TS_SDEN0_E,		SEL_TSIF0_4),
-+	PINMUX_IPSR_MSEL(IP17_3_0,	STP_ISEN_0_E,		SEL_SSP1_0_4),
-+	PINMUX_IPSR_MSEL(IP17_3_0,	RIF2_D0_B,		SEL_DRIF2_1),
-+	PINMUX_IPSR_GPSR(IP17_3_0,	TPU0TO2),
-+
-+	PINMUX_IPSR_GPSR(IP17_7_4,	USB31_OVC),
-+	PINMUX_IPSR_MSEL(IP17_7_4,	AUDIO_CLKOUT3_B,	SEL_ADG_1),
-+	PINMUX_IPSR_MSEL(IP17_7_4,	SSI_WS9_B,		SEL_SSI_1),
-+	PINMUX_IPSR_MSEL(IP17_7_4,	TS_SPSYNC0_E,		SEL_TSIF0_4),
-+	PINMUX_IPSR_MSEL(IP17_7_4,	STP_ISSYNC_0_E,		SEL_SSP1_0_4),
-+	PINMUX_IPSR_MSEL(IP17_7_4,	RIF2_D1_B,		SEL_DRIF2_1),
-+	PINMUX_IPSR_GPSR(IP17_7_4,	TPU0TO3),
-+
-+/*
-+ * Static pins can not be muxed between different functions but
-+ * still needs a mark entry in the pinmux list. Add each static
-+ * pin to the list without an associated function. The sh-pfc
-+ * core will do the right thing and skip trying to mux then pin
-+ * while still applying configuration to it
-+ */
-+#define FM(x)	PINMUX_DATA(x##_MARK, 0),
-+	PINMUX_STATIC
-+#undef FM
-+};
-+
-+/*
-+ * R8A7795 has 8 banks with 32 PGIOS in each => 256 GPIOs.
-+ * Physical layout rows: A - AW, cols: 1 - 39.
-+ */
-+#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r))
-+#define PIN_NUMBER(r, c) (((r) - 'A') * 39 + (c) + 300)
-+#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c)
-+
-+static const struct sh_pfc_pin pinmux_pins[] = {
-+	PINMUX_GPIO_GP_ALL(),
-+
-+	/*
-+	 * Pins not associated with a GPIO port.
-+	 *
-+	 * The pin positions are different between different r8a7795
-+	 * packages, all that is needed for the pfc driver is a unique
-+	 * number for each pin. To this end use the pin layout from
-+	 * R-Car H3SiP to calculate a unique number for each pin.
-+	 */
-+	SH_PFC_PIN_NAMED_CFG('A',  8, AVB_TX_CTL, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A',  9, AVB_MDIO, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('C',  1, PRESETOUT#, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('F',  1, CLKOUT, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('V',  3, QSPI1_SPCLK, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('V',  5, QSPI1_SSL, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('V',  6, RPC_WP#, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('V',  7, RPC_RESET#, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('W',  3, QSPI0_SPCLK, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('Y',  3, QSPI0_SSL, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('Y',  6, QSPI0_IO2, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG('Y',  7, RPC_INT#, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'),  4, QSPI0_MISO_IO1, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'),  6, QSPI0_IO3, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  3, QSPI1_IO3, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  5, QSPI0_MOSI_IO0, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'),  7, QSPI1_MOSI_IO0, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST#, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 39, EXTALR, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'),  4, QSPI1_IO2, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'),  5, QSPI1_MISO_IO1, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'),  7, DU_DOTCLKIN0, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'),  8, DU_DOTCLKIN1, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'),  7, DU_DOTCLKIN2, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'),  8, DU_DOTCLKIN3, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 26, TRST#, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 29, TDI, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, CFG_FLAGS),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 27, TCK, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 28, TDO, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
-+	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS),
-+};
-+
-+/* - AUDIO CLOCK ------------------------------------------------------------ */
-+static const unsigned int audio_clk_a_a_pins[] = {
-+	/* CLK A */
-+	RCAR_GP_PIN(6, 22),
-+};
-+static const unsigned int audio_clk_a_a_mux[] = {
-+	AUDIO_CLKA_A_MARK,
-+};
-+static const unsigned int audio_clk_a_b_pins[] = {
-+	/* CLK A */
-+	RCAR_GP_PIN(5, 4),
-+};
-+static const unsigned int audio_clk_a_b_mux[] = {
-+	AUDIO_CLKA_B_MARK,
-+};
-+static const unsigned int audio_clk_a_c_pins[] = {
-+	/* CLK A */
-+	RCAR_GP_PIN(5, 19),
-+};
-+static const unsigned int audio_clk_a_c_mux[] = {
-+	AUDIO_CLKA_C_MARK,
-+};
-+static const unsigned int audio_clk_b_a_pins[] = {
-+	/* CLK B */
-+	RCAR_GP_PIN(5, 12),
-+};
-+static const unsigned int audio_clk_b_a_mux[] = {
-+	AUDIO_CLKB_A_MARK,
-+};
-+static const unsigned int audio_clk_b_b_pins[] = {
-+	/* CLK B */
-+	RCAR_GP_PIN(6, 23),
-+};
-+static const unsigned int audio_clk_b_b_mux[] = {
-+	AUDIO_CLKB_B_MARK,
-+};
-+static const unsigned int audio_clk_c_a_pins[] = {
-+	/* CLK C */
-+	RCAR_GP_PIN(5, 21),
-+};
-+static const unsigned int audio_clk_c_a_mux[] = {
-+	AUDIO_CLKC_A_MARK,
-+};
-+static const unsigned int audio_clk_c_b_pins[] = {
-+	/* CLK C */
-+	RCAR_GP_PIN(5, 0),
-+};
-+static const unsigned int audio_clk_c_b_mux[] = {
-+	AUDIO_CLKC_B_MARK,
-+};
-+static const unsigned int audio_clkout_a_pins[] = {
-+	/* CLKOUT */
-+	RCAR_GP_PIN(5, 18),
-+};
-+static const unsigned int audio_clkout_a_mux[] = {
-+	AUDIO_CLKOUT_A_MARK,
-+};
-+static const unsigned int audio_clkout_b_pins[] = {
-+	/* CLKOUT */
-+	RCAR_GP_PIN(6, 28),
-+};
-+static const unsigned int audio_clkout_b_mux[] = {
-+	AUDIO_CLKOUT_B_MARK,
-+};
-+static const unsigned int audio_clkout_c_pins[] = {
-+	/* CLKOUT */
-+	RCAR_GP_PIN(5, 3),
-+};
-+static const unsigned int audio_clkout_c_mux[] = {
-+	AUDIO_CLKOUT_C_MARK,
-+};
-+static const unsigned int audio_clkout_d_pins[] = {
-+	/* CLKOUT */
-+	RCAR_GP_PIN(5, 21),
-+};
-+static const unsigned int audio_clkout_d_mux[] = {
-+	AUDIO_CLKOUT_D_MARK,
-+};
-+static const unsigned int audio_clkout1_a_pins[] = {
-+	/* CLKOUT1 */
-+	RCAR_GP_PIN(5, 15),
-+};
-+static const unsigned int audio_clkout1_a_mux[] = {
-+	AUDIO_CLKOUT1_A_MARK,
-+};
-+static const unsigned int audio_clkout1_b_pins[] = {
-+	/* CLKOUT1 */
-+	RCAR_GP_PIN(6, 29),
-+};
-+static const unsigned int audio_clkout1_b_mux[] = {
-+	AUDIO_CLKOUT1_B_MARK,
-+};
-+static const unsigned int audio_clkout2_a_pins[] = {
-+	/* CLKOUT2 */
-+	RCAR_GP_PIN(5, 16),
-+};
-+static const unsigned int audio_clkout2_a_mux[] = {
-+	AUDIO_CLKOUT2_A_MARK,
-+};
-+static const unsigned int audio_clkout2_b_pins[] = {
-+	/* CLKOUT2 */
-+	RCAR_GP_PIN(6, 30),
-+};
-+static const unsigned int audio_clkout2_b_mux[] = {
-+	AUDIO_CLKOUT2_B_MARK,
-+};
-+
-+static const unsigned int audio_clkout3_a_pins[] = {
-+	/* CLKOUT3 */
-+	RCAR_GP_PIN(5, 19),
-+};
-+static const unsigned int audio_clkout3_a_mux[] = {
-+	AUDIO_CLKOUT3_A_MARK,
-+};
-+static const unsigned int audio_clkout3_b_pins[] = {
-+	/* CLKOUT3 */
-+	RCAR_GP_PIN(6, 31),
-+};
-+static const unsigned int audio_clkout3_b_mux[] = {
-+	AUDIO_CLKOUT3_B_MARK,
-+};
-+
-+/* - EtherAVB --------------------------------------------------------------- */
-+static const unsigned int avb_link_pins[] = {
-+	/* AVB_LINK */
-+	RCAR_GP_PIN(2, 12),
-+};
-+static const unsigned int avb_link_mux[] = {
-+	AVB_LINK_MARK,
-+};
-+static const unsigned int avb_magic_pins[] = {
-+	/* AVB_MAGIC_ */
-+	RCAR_GP_PIN(2, 10),
-+};
-+static const unsigned int avb_magic_mux[] = {
-+	AVB_MAGIC_MARK,
-+};
-+static const unsigned int avb_phy_int_pins[] = {
-+	/* AVB_PHY_INT */
-+	RCAR_GP_PIN(2, 11),
-+};
-+static const unsigned int avb_phy_int_mux[] = {
-+	AVB_PHY_INT_MARK,
-+};
-+static const unsigned int avb_mdc_pins[] = {
-+	/* AVB_MDC, AVB_MDIO */
-+	RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9),
-+};
-+static const unsigned int avb_mdc_mux[] = {
-+	AVB_MDC_MARK, AVB_MDIO_MARK,
-+};
-+static const unsigned int avb_mii_pins[] = {
-+	/*
-+	 * AVB_TX_CTL, AVB_TXC, AVB_TD0,
-+	 * AVB_TD1, AVB_TD2, AVB_TD3,
-+	 * AVB_RX_CTL, AVB_RXC, AVB_RD0,
-+	 * AVB_RD1, AVB_RD2, AVB_RD3,
-+	 * AVB_TXCREFCLK
-+	 */
-+	PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18),
-+	PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17),
-+	PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13),
-+	PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14),
-+	PIN_NUMBER('A', 12),
-+
-+};
-+static const unsigned int avb_mii_mux[] = {
-+	AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK,
-+	AVB_TD1_MARK, AVB_TD2_MARK, AVB_TD3_MARK,
-+	AVB_RX_CTL_MARK, AVB_RXC_MARK, AVB_RD0_MARK,
-+	AVB_RD1_MARK, AVB_RD2_MARK, AVB_RD3_MARK,
-+	AVB_TXCREFCLK_MARK,
-+};
-+static const unsigned int avb_avtp_pps_pins[] = {
-+	/* AVB_AVTP_PPS */
-+	RCAR_GP_PIN(2, 6),
-+};
-+static const unsigned int avb_avtp_pps_mux[] = {
-+	AVB_AVTP_PPS_MARK,
-+};
-+static const unsigned int avb_avtp_match_a_pins[] = {
-+	/* AVB_AVTP_MATCH_A */
-+	RCAR_GP_PIN(2, 13),
-+};
-+static const unsigned int avb_avtp_match_a_mux[] = {
-+	AVB_AVTP_MATCH_A_MARK,
-+};
-+static const unsigned int avb_avtp_capture_a_pins[] = {
-+	/* AVB_AVTP_CAPTURE_A */
-+	RCAR_GP_PIN(2, 14),
-+};
-+static const unsigned int avb_avtp_capture_a_mux[] = {
-+	AVB_AVTP_CAPTURE_A_MARK,
-+};
-+static const unsigned int avb_avtp_match_b_pins[] = {
-+	/*  AVB_AVTP_MATCH_B */
-+	RCAR_GP_PIN(1, 8),
-+};
-+static const unsigned int avb_avtp_match_b_mux[] = {
-+	AVB_AVTP_MATCH_B_MARK,
-+};
-+static const unsigned int avb_avtp_capture_b_pins[] = {
-+	/* AVB_AVTP_CAPTURE_B */
-+	RCAR_GP_PIN(1, 11),
-+};
-+static const unsigned int avb_avtp_capture_b_mux[] = {
-+	AVB_AVTP_CAPTURE_B_MARK,
-+};
-+
-+/* - CAN ------------------------------------------------------------------ */
-+static const unsigned int can0_data_a_pins[] = {
-+	/* TX, RX */
-+	RCAR_GP_PIN(1, 23),	RCAR_GP_PIN(1, 24),
-+};
-+static const unsigned int can0_data_a_mux[] = {
-+	CAN0_TX_A_MARK,		CAN0_RX_A_MARK,
-+};
-+static const unsigned int can0_data_b_pins[] = {
-+	/* TX, RX */
-+	RCAR_GP_PIN(2, 0),	RCAR_GP_PIN(2, 1),
-+};
-+static const unsigned int can0_data_b_mux[] = {
-+	CAN0_TX_B_MARK,		CAN0_RX_B_MARK,
-+};
-+static const unsigned int can1_data_pins[] = {
-+	/* TX, RX */
-+	RCAR_GP_PIN(1, 22),	RCAR_GP_PIN(1, 26),
-+};
-+static const unsigned int can1_data_mux[] = {
-+	CAN1_TX_MARK,		CAN1_RX_MARK,
-+};
-+
-+/* - CAN Clock -------------------------------------------------------------- */
-+static const unsigned int can_clk_pins[] = {
-+	/* CLK */
-+	RCAR_GP_PIN(1, 25),
-+};
-+static const unsigned int can_clk_mux[] = {
-+	CAN_CLK_MARK,
-+};
-+
-+/* - CAN FD --------------------------------------------------------------- */
-+static const unsigned int canfd0_data_a_pins[] = {
-+	/* TX, RX */
-+	RCAR_GP_PIN(1, 23),     RCAR_GP_PIN(1, 24),
-+};
-+static const unsigned int canfd0_data_a_mux[] = {
-+	CANFD0_TX_A_MARK,       CANFD0_RX_A_MARK,
-+};
-+static const unsigned int canfd0_data_b_pins[] = {
-+	/* TX, RX */
-+	RCAR_GP_PIN(2, 0),      RCAR_GP_PIN(2, 1),
-+};
-+static const unsigned int canfd0_data_b_mux[] = {
-+	CANFD0_TX_B_MARK,       CANFD0_RX_B_MARK,
-+};
-+static const unsigned int canfd1_data_pins[] = {
-+	/* TX, RX */
-+	RCAR_GP_PIN(1, 22),     RCAR_GP_PIN(1, 26),
-+};
-+static const unsigned int canfd1_data_mux[] = {
-+	CANFD1_TX_MARK,         CANFD1_RX_MARK,
-+};
-+
-+/* - DRIF0 --------------------------------------------------------------- */
-+static const unsigned int drif0_ctrl_a_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
-+};
-+static const unsigned int drif0_ctrl_a_mux[] = {
-+	RIF0_CLK_A_MARK, RIF0_SYNC_A_MARK,
-+};
-+static const unsigned int drif0_data0_a_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(6, 10),
-+};
-+static const unsigned int drif0_data0_a_mux[] = {
-+	RIF0_D0_A_MARK,
-+};
-+static const unsigned int drif0_data1_a_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(6, 7),
-+};
-+static const unsigned int drif0_data1_a_mux[] = {
-+	RIF0_D1_A_MARK,
-+};
-+static const unsigned int drif0_ctrl_b_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4),
-+};
-+static const unsigned int drif0_ctrl_b_mux[] = {
-+	RIF0_CLK_B_MARK, RIF0_SYNC_B_MARK,
-+};
-+static const unsigned int drif0_data0_b_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(5, 1),
-+};
-+static const unsigned int drif0_data0_b_mux[] = {
-+	RIF0_D0_B_MARK,
-+};
-+static const unsigned int drif0_data1_b_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(5, 2),
-+};
-+static const unsigned int drif0_data1_b_mux[] = {
-+	RIF0_D1_B_MARK,
-+};
-+static const unsigned int drif0_ctrl_c_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 15),
-+};
-+static const unsigned int drif0_ctrl_c_mux[] = {
-+	RIF0_CLK_C_MARK, RIF0_SYNC_C_MARK,
-+};
-+static const unsigned int drif0_data0_c_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(5, 13),
-+};
-+static const unsigned int drif0_data0_c_mux[] = {
-+	RIF0_D0_C_MARK,
-+};
-+static const unsigned int drif0_data1_c_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(5, 14),
-+};
-+static const unsigned int drif0_data1_c_mux[] = {
-+	RIF0_D1_C_MARK,
-+};
-+/* - DRIF1 --------------------------------------------------------------- */
-+static const unsigned int drif1_ctrl_a_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
-+};
-+static const unsigned int drif1_ctrl_a_mux[] = {
-+	RIF1_CLK_A_MARK, RIF1_SYNC_A_MARK,
-+};
-+static const unsigned int drif1_data0_a_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(6, 19),
-+};
-+static const unsigned int drif1_data0_a_mux[] = {
-+	RIF1_D0_A_MARK,
-+};
-+static const unsigned int drif1_data1_a_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(6, 20),
-+};
-+static const unsigned int drif1_data1_a_mux[] = {
-+	RIF1_D1_A_MARK,
-+};
-+static const unsigned int drif1_ctrl_b_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 3),
-+};
-+static const unsigned int drif1_ctrl_b_mux[] = {
-+	RIF1_CLK_B_MARK, RIF1_SYNC_B_MARK,
-+};
-+static const unsigned int drif1_data0_b_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(5, 7),
-+};
-+static const unsigned int drif1_data0_b_mux[] = {
-+	RIF1_D0_B_MARK,
-+};
-+static const unsigned int drif1_data1_b_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(5, 8),
-+};
-+static const unsigned int drif1_data1_b_mux[] = {
-+	RIF1_D1_B_MARK,
-+};
-+static const unsigned int drif1_ctrl_c_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11),
-+};
-+static const unsigned int drif1_ctrl_c_mux[] = {
-+	RIF1_CLK_C_MARK, RIF1_SYNC_C_MARK,
-+};
-+static const unsigned int drif1_data0_c_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(5, 6),
-+};
-+static const unsigned int drif1_data0_c_mux[] = {
-+	RIF1_D0_C_MARK,
-+};
-+static const unsigned int drif1_data1_c_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(5, 10),
-+};
-+static const unsigned int drif1_data1_c_mux[] = {
-+	RIF1_D1_C_MARK,
-+};
-+/* - DRIF2 --------------------------------------------------------------- */
-+static const unsigned int drif2_ctrl_a_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
-+};
-+static const unsigned int drif2_ctrl_a_mux[] = {
-+	RIF2_CLK_A_MARK, RIF2_SYNC_A_MARK,
-+};
-+static const unsigned int drif2_data0_a_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(6, 7),
-+};
-+static const unsigned int drif2_data0_a_mux[] = {
-+	RIF2_D0_A_MARK,
-+};
-+static const unsigned int drif2_data1_a_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(6, 10),
-+};
-+static const unsigned int drif2_data1_a_mux[] = {
-+	RIF2_D1_A_MARK,
-+};
-+static const unsigned int drif2_ctrl_b_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),
-+};
-+static const unsigned int drif2_ctrl_b_mux[] = {
-+	RIF2_CLK_B_MARK, RIF2_SYNC_B_MARK,
-+};
-+static const unsigned int drif2_data0_b_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(6, 30),
-+};
-+static const unsigned int drif2_data0_b_mux[] = {
-+	RIF2_D0_B_MARK,
-+};
-+static const unsigned int drif2_data1_b_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(6, 31),
-+};
-+static const unsigned int drif2_data1_b_mux[] = {
-+	RIF2_D1_B_MARK,
-+};
-+/* - DRIF3 --------------------------------------------------------------- */
-+static const unsigned int drif3_ctrl_a_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
-+};
-+static const unsigned int drif3_ctrl_a_mux[] = {
-+	RIF3_CLK_A_MARK, RIF3_SYNC_A_MARK,
-+};
-+static const unsigned int drif3_data0_a_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(6, 19),
-+};
-+static const unsigned int drif3_data0_a_mux[] = {
-+	RIF3_D0_A_MARK,
-+};
-+static const unsigned int drif3_data1_a_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(6, 20),
-+};
-+static const unsigned int drif3_data1_a_mux[] = {
-+	RIF3_D1_A_MARK,
-+};
-+static const unsigned int drif3_ctrl_b_pins[] = {
-+	/* CLK, SYNC */
-+	RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25),
-+};
-+static const unsigned int drif3_ctrl_b_mux[] = {
-+	RIF3_CLK_B_MARK, RIF3_SYNC_B_MARK,
-+};
-+static const unsigned int drif3_data0_b_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(6, 28),
-+};
-+static const unsigned int drif3_data0_b_mux[] = {
-+	RIF3_D0_B_MARK,
-+};
-+static const unsigned int drif3_data1_b_pins[] = {
-+	/* D1 */
-+	RCAR_GP_PIN(6, 29),
-+};
-+static const unsigned int drif3_data1_b_mux[] = {
-+	RIF3_D1_B_MARK,
-+};
-+
-+/* - DU --------------------------------------------------------------------- */
-+static const unsigned int du_rgb666_pins[] = {
-+	/* R[7:2], G[7:2], B[7:2] */
-+	RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13),
-+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
-+	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
-+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
-+	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
-+	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
-+};
-+static const unsigned int du_rgb666_mux[] = {
-+	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
-+	DU_DR3_MARK, DU_DR2_MARK,
-+	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
-+	DU_DG3_MARK, DU_DG2_MARK,
-+	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
-+	DU_DB3_MARK, DU_DB2_MARK,
-+};
-+static const unsigned int du_rgb888_pins[] = {
-+	/* R[7:0], G[7:0], B[7:0] */
-+	RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13),
-+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
-+	RCAR_GP_PIN(0, 9),  RCAR_GP_PIN(0, 8),
-+	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
-+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
-+	RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16),
-+	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
-+	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
-+	RCAR_GP_PIN(1, 1),  RCAR_GP_PIN(1, 0),
-+};
-+static const unsigned int du_rgb888_mux[] = {
-+	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
-+	DU_DR3_MARK, DU_DR2_MARK, DU_DR1_MARK, DU_DR0_MARK,
-+	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
-+	DU_DG3_MARK, DU_DG2_MARK, DU_DG1_MARK, DU_DG0_MARK,
-+	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
-+	DU_DB3_MARK, DU_DB2_MARK, DU_DB1_MARK, DU_DB0_MARK,
-+};
-+static const unsigned int du_clk_out_0_pins[] = {
-+	/* CLKOUT */
-+	RCAR_GP_PIN(1, 27),
-+};
-+static const unsigned int du_clk_out_0_mux[] = {
-+	DU_DOTCLKOUT0_MARK
-+};
-+static const unsigned int du_clk_out_1_pins[] = {
-+	/* CLKOUT */
-+	RCAR_GP_PIN(2, 3),
-+};
-+static const unsigned int du_clk_out_1_mux[] = {
-+	DU_DOTCLKOUT1_MARK
-+};
-+static const unsigned int du_sync_pins[] = {
-+	/* EXVSYNC/VSYNC, EXHSYNC/HSYNC */
-+	RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 4),
-+};
-+static const unsigned int du_sync_mux[] = {
-+	DU_EXVSYNC_DU_VSYNC_MARK, DU_EXHSYNC_DU_HSYNC_MARK
-+};
-+static const unsigned int du_oddf_pins[] = {
-+	/* EXDISP/EXODDF/EXCDE */
-+	RCAR_GP_PIN(2, 2),
-+};
-+static const unsigned int du_oddf_mux[] = {
-+	DU_EXODDF_DU_ODDF_DISP_CDE_MARK,
-+};
-+static const unsigned int du_cde_pins[] = {
-+	/* CDE */
-+	RCAR_GP_PIN(2, 0),
-+};
-+static const unsigned int du_cde_mux[] = {
-+	DU_CDE_MARK,
-+};
-+static const unsigned int du_disp_pins[] = {
-+	/* DISP */
-+	RCAR_GP_PIN(2, 1),
-+};
-+static const unsigned int du_disp_mux[] = {
-+	DU_DISP_MARK,
-+};
-+/* - HSCIF0 ----------------------------------------------------------------- */
-+static const unsigned int hscif0_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14),
-+};
-+static const unsigned int hscif0_data_mux[] = {
-+	HRX0_MARK, HTX0_MARK,
-+};
-+static const unsigned int hscif0_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 12),
-+};
-+static const unsigned int hscif0_clk_mux[] = {
-+	HSCK0_MARK,
-+};
-+static const unsigned int hscif0_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 15),
-+};
-+static const unsigned int hscif0_ctrl_mux[] = {
-+	HRTS0_N_MARK, HCTS0_N_MARK,
-+};
-+/* - HSCIF1 ----------------------------------------------------------------- */
-+static const unsigned int hscif1_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
-+};
-+static const unsigned int hscif1_data_a_mux[] = {
-+	HRX1_A_MARK, HTX1_A_MARK,
-+};
-+static const unsigned int hscif1_clk_a_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 21),
-+};
-+static const unsigned int hscif1_clk_a_mux[] = {
-+	HSCK1_A_MARK,
-+};
-+static const unsigned int hscif1_ctrl_a_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7),
-+};
-+static const unsigned int hscif1_ctrl_a_mux[] = {
-+	HRTS1_N_A_MARK, HCTS1_N_A_MARK,
-+};
-+
-+static const unsigned int hscif1_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
-+};
-+static const unsigned int hscif1_data_b_mux[] = {
-+	HRX1_B_MARK, HTX1_B_MARK,
-+};
-+static const unsigned int hscif1_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 0),
-+};
-+static const unsigned int hscif1_clk_b_mux[] = {
-+	HSCK1_B_MARK,
-+};
-+static const unsigned int hscif1_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3),
-+};
-+static const unsigned int hscif1_ctrl_b_mux[] = {
-+	HRTS1_N_B_MARK, HCTS1_N_B_MARK,
-+};
-+/* - HSCIF2 ----------------------------------------------------------------- */
-+static const unsigned int hscif2_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
-+};
-+static const unsigned int hscif2_data_a_mux[] = {
-+	HRX2_A_MARK, HTX2_A_MARK,
-+};
-+static const unsigned int hscif2_clk_a_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 10),
-+};
-+static const unsigned int hscif2_clk_a_mux[] = {
-+	HSCK2_A_MARK,
-+};
-+static const unsigned int hscif2_ctrl_a_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6),
-+};
-+static const unsigned int hscif2_ctrl_a_mux[] = {
-+	HRTS2_N_A_MARK, HCTS2_N_A_MARK,
-+};
-+
-+static const unsigned int hscif2_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
-+};
-+static const unsigned int hscif2_data_b_mux[] = {
-+	HRX2_B_MARK, HTX2_B_MARK,
-+};
-+static const unsigned int hscif2_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 21),
-+};
-+static const unsigned int hscif2_clk_b_mux[] = {
-+	HSCK2_B_MARK,
-+};
-+static const unsigned int hscif2_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 19),
-+};
-+static const unsigned int hscif2_ctrl_b_mux[] = {
-+	HRTS2_N_B_MARK, HCTS2_N_B_MARK,
-+};
-+/* - HSCIF3 ----------------------------------------------------------------- */
-+static const unsigned int hscif3_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
-+};
-+static const unsigned int hscif3_data_a_mux[] = {
-+	HRX3_A_MARK, HTX3_A_MARK,
-+};
-+static const unsigned int hscif3_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 22),
-+};
-+static const unsigned int hscif3_clk_mux[] = {
-+	HSCK3_MARK,
-+};
-+static const unsigned int hscif3_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
-+};
-+static const unsigned int hscif3_ctrl_mux[] = {
-+	HRTS3_N_MARK, HCTS3_N_MARK,
-+};
-+
-+static const unsigned int hscif3_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
-+};
-+static const unsigned int hscif3_data_b_mux[] = {
-+	HRX3_B_MARK, HTX3_B_MARK,
-+};
-+static const unsigned int hscif3_data_c_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
-+};
-+static const unsigned int hscif3_data_c_mux[] = {
-+	HRX3_C_MARK, HTX3_C_MARK,
-+};
-+static const unsigned int hscif3_data_d_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
-+};
-+static const unsigned int hscif3_data_d_mux[] = {
-+	HRX3_D_MARK, HTX3_D_MARK,
-+};
-+/* - HSCIF4 ----------------------------------------------------------------- */
-+static const unsigned int hscif4_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
-+};
-+static const unsigned int hscif4_data_a_mux[] = {
-+	HRX4_A_MARK, HTX4_A_MARK,
-+};
-+static const unsigned int hscif4_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 11),
-+};
-+static const unsigned int hscif4_clk_mux[] = {
-+	HSCK4_MARK,
-+};
-+static const unsigned int hscif4_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14),
-+};
-+static const unsigned int hscif4_ctrl_mux[] = {
-+	HRTS4_N_MARK, HCTS4_N_MARK,
-+};
-+
-+static const unsigned int hscif4_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
-+};
-+static const unsigned int hscif4_data_b_mux[] = {
-+	HRX4_B_MARK, HTX4_B_MARK,
-+};
-+
-+/* - I2C -------------------------------------------------------------------- */
-+static const unsigned int i2c1_a_pins[] = {
-+	/* SDA, SCL */
-+	RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10),
-+};
-+static const unsigned int i2c1_a_mux[] = {
-+	SDA1_A_MARK, SCL1_A_MARK,
-+};
-+static const unsigned int i2c1_b_pins[] = {
-+	/* SDA, SCL */
-+	RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 23),
-+};
-+static const unsigned int i2c1_b_mux[] = {
-+	SDA1_B_MARK, SCL1_B_MARK,
-+};
-+static const unsigned int i2c2_a_pins[] = {
-+	/* SDA, SCL */
-+	RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4),
-+};
-+static const unsigned int i2c2_a_mux[] = {
-+	SDA2_A_MARK, SCL2_A_MARK,
-+};
-+static const unsigned int i2c2_b_pins[] = {
-+	/* SDA, SCL */
-+	RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 12),
-+};
-+static const unsigned int i2c2_b_mux[] = {
-+	SDA2_B_MARK, SCL2_B_MARK,
-+};
-+static const unsigned int i2c6_a_pins[] = {
-+	/* SDA, SCL */
-+	RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
-+};
-+static const unsigned int i2c6_a_mux[] = {
-+	SDA6_A_MARK, SCL6_A_MARK,
-+};
-+static const unsigned int i2c6_b_pins[] = {
-+	/* SDA, SCL */
-+	RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
-+};
-+static const unsigned int i2c6_b_mux[] = {
-+	SDA6_B_MARK, SCL6_B_MARK,
-+};
-+static const unsigned int i2c6_c_pins[] = {
-+	/* SDA, SCL */
-+	RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14),
-+};
-+static const unsigned int i2c6_c_mux[] = {
-+	SDA6_C_MARK, SCL6_C_MARK,
-+};
-+
-+/* - INTC-EX ---------------------------------------------------------------- */
-+static const unsigned int intc_ex_irq0_pins[] = {
-+	/* IRQ0 */
-+	RCAR_GP_PIN(2, 0),
-+};
-+static const unsigned int intc_ex_irq0_mux[] = {
-+	IRQ0_MARK,
-+};
-+static const unsigned int intc_ex_irq1_pins[] = {
-+	/* IRQ1 */
-+	RCAR_GP_PIN(2, 1),
-+};
-+static const unsigned int intc_ex_irq1_mux[] = {
-+	IRQ1_MARK,
-+};
-+static const unsigned int intc_ex_irq2_pins[] = {
-+	/* IRQ2 */
-+	RCAR_GP_PIN(2, 2),
-+};
-+static const unsigned int intc_ex_irq2_mux[] = {
-+	IRQ2_MARK,
-+};
-+static const unsigned int intc_ex_irq3_pins[] = {
-+	/* IRQ3 */
-+	RCAR_GP_PIN(2, 3),
-+};
-+static const unsigned int intc_ex_irq3_mux[] = {
-+	IRQ3_MARK,
-+};
-+static const unsigned int intc_ex_irq4_pins[] = {
-+	/* IRQ4 */
-+	RCAR_GP_PIN(2, 4),
-+};
-+static const unsigned int intc_ex_irq4_mux[] = {
-+	IRQ4_MARK,
-+};
-+static const unsigned int intc_ex_irq5_pins[] = {
-+	/* IRQ5 */
-+	RCAR_GP_PIN(2, 5),
-+};
-+static const unsigned int intc_ex_irq5_mux[] = {
-+	IRQ5_MARK,
-+};
-+
-+/* - MSIOF0 ----------------------------------------------------------------- */
-+static const unsigned int msiof0_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 17),
-+};
-+static const unsigned int msiof0_clk_mux[] = {
-+	MSIOF0_SCK_MARK,
-+};
-+static const unsigned int msiof0_sync_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(5, 18),
-+};
-+static const unsigned int msiof0_sync_mux[] = {
-+	MSIOF0_SYNC_MARK,
-+};
-+static const unsigned int msiof0_ss1_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(5, 19),
-+};
-+static const unsigned int msiof0_ss1_mux[] = {
-+	MSIOF0_SS1_MARK,
-+};
-+static const unsigned int msiof0_ss2_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(5, 21),
-+};
-+static const unsigned int msiof0_ss2_mux[] = {
-+	MSIOF0_SS2_MARK,
-+};
-+static const unsigned int msiof0_txd_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(5, 20),
-+};
-+static const unsigned int msiof0_txd_mux[] = {
-+	MSIOF0_TXD_MARK,
-+};
-+static const unsigned int msiof0_rxd_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(5, 22),
-+};
-+static const unsigned int msiof0_rxd_mux[] = {
-+	MSIOF0_RXD_MARK,
-+};
-+/* - MSIOF1 ----------------------------------------------------------------- */
-+static const unsigned int msiof1_clk_a_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 8),
-+};
-+static const unsigned int msiof1_clk_a_mux[] = {
-+	MSIOF1_SCK_A_MARK,
-+};
-+static const unsigned int msiof1_sync_a_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(6, 9),
-+};
-+static const unsigned int msiof1_sync_a_mux[] = {
-+	MSIOF1_SYNC_A_MARK,
-+};
-+static const unsigned int msiof1_ss1_a_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(6, 5),
-+};
-+static const unsigned int msiof1_ss1_a_mux[] = {
-+	MSIOF1_SS1_A_MARK,
-+};
-+static const unsigned int msiof1_ss2_a_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(6, 6),
-+};
-+static const unsigned int msiof1_ss2_a_mux[] = {
-+	MSIOF1_SS2_A_MARK,
-+};
-+static const unsigned int msiof1_txd_a_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(6, 7),
-+};
-+static const unsigned int msiof1_txd_a_mux[] = {
-+	MSIOF1_TXD_A_MARK,
-+};
-+static const unsigned int msiof1_rxd_a_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(6, 10),
-+};
-+static const unsigned int msiof1_rxd_a_mux[] = {
-+	MSIOF1_RXD_A_MARK,
-+};
-+static const unsigned int msiof1_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 9),
-+};
-+static const unsigned int msiof1_clk_b_mux[] = {
-+	MSIOF1_SCK_B_MARK,
-+};
-+static const unsigned int msiof1_sync_b_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(5, 3),
-+};
-+static const unsigned int msiof1_sync_b_mux[] = {
-+	MSIOF1_SYNC_B_MARK,
-+};
-+static const unsigned int msiof1_ss1_b_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(5, 4),
-+};
-+static const unsigned int msiof1_ss1_b_mux[] = {
-+	MSIOF1_SS1_B_MARK,
-+};
-+static const unsigned int msiof1_ss2_b_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(5, 0),
-+};
-+static const unsigned int msiof1_ss2_b_mux[] = {
-+	MSIOF1_SS2_B_MARK,
-+};
-+static const unsigned int msiof1_txd_b_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(5, 8),
-+};
-+static const unsigned int msiof1_txd_b_mux[] = {
-+	MSIOF1_TXD_B_MARK,
-+};
-+static const unsigned int msiof1_rxd_b_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(5, 7),
-+};
-+static const unsigned int msiof1_rxd_b_mux[] = {
-+	MSIOF1_RXD_B_MARK,
-+};
-+static const unsigned int msiof1_clk_c_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 17),
-+};
-+static const unsigned int msiof1_clk_c_mux[] = {
-+	MSIOF1_SCK_C_MARK,
-+};
-+static const unsigned int msiof1_sync_c_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(6, 18),
-+};
-+static const unsigned int msiof1_sync_c_mux[] = {
-+	MSIOF1_SYNC_C_MARK,
-+};
-+static const unsigned int msiof1_ss1_c_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(6, 21),
-+};
-+static const unsigned int msiof1_ss1_c_mux[] = {
-+	MSIOF1_SS1_C_MARK,
-+};
-+static const unsigned int msiof1_ss2_c_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(6, 27),
-+};
-+static const unsigned int msiof1_ss2_c_mux[] = {
-+	MSIOF1_SS2_C_MARK,
-+};
-+static const unsigned int msiof1_txd_c_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(6, 20),
-+};
-+static const unsigned int msiof1_txd_c_mux[] = {
-+	MSIOF1_TXD_C_MARK,
-+};
-+static const unsigned int msiof1_rxd_c_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(6, 19),
-+};
-+static const unsigned int msiof1_rxd_c_mux[] = {
-+	MSIOF1_RXD_C_MARK,
-+};
-+static const unsigned int msiof1_clk_d_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 12),
-+};
-+static const unsigned int msiof1_clk_d_mux[] = {
-+	MSIOF1_SCK_D_MARK,
-+};
-+static const unsigned int msiof1_sync_d_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(5, 15),
-+};
-+static const unsigned int msiof1_sync_d_mux[] = {
-+	MSIOF1_SYNC_D_MARK,
-+};
-+static const unsigned int msiof1_ss1_d_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(5, 16),
-+};
-+static const unsigned int msiof1_ss1_d_mux[] = {
-+	MSIOF1_SS1_D_MARK,
-+};
-+static const unsigned int msiof1_ss2_d_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(5, 21),
-+};
-+static const unsigned int msiof1_ss2_d_mux[] = {
-+	MSIOF1_SS2_D_MARK,
-+};
-+static const unsigned int msiof1_txd_d_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(5, 14),
-+};
-+static const unsigned int msiof1_txd_d_mux[] = {
-+	MSIOF1_TXD_D_MARK,
-+};
-+static const unsigned int msiof1_rxd_d_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(5, 13),
-+};
-+static const unsigned int msiof1_rxd_d_mux[] = {
-+	MSIOF1_RXD_D_MARK,
-+};
-+static const unsigned int msiof1_clk_e_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(3, 0),
-+};
-+static const unsigned int msiof1_clk_e_mux[] = {
-+	MSIOF1_SCK_E_MARK,
-+};
-+static const unsigned int msiof1_sync_e_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(3, 1),
-+};
-+static const unsigned int msiof1_sync_e_mux[] = {
-+	MSIOF1_SYNC_E_MARK,
-+};
-+static const unsigned int msiof1_ss1_e_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(3, 4),
-+};
-+static const unsigned int msiof1_ss1_e_mux[] = {
-+	MSIOF1_SS1_E_MARK,
-+};
-+static const unsigned int msiof1_ss2_e_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(3, 5),
-+};
-+static const unsigned int msiof1_ss2_e_mux[] = {
-+	MSIOF1_SS2_E_MARK,
-+};
-+static const unsigned int msiof1_txd_e_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(3, 3),
-+};
-+static const unsigned int msiof1_txd_e_mux[] = {
-+	MSIOF1_TXD_E_MARK,
-+};
-+static const unsigned int msiof1_rxd_e_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(3, 2),
-+};
-+static const unsigned int msiof1_rxd_e_mux[] = {
-+	MSIOF1_RXD_E_MARK,
-+};
-+static const unsigned int msiof1_clk_f_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 23),
-+};
-+static const unsigned int msiof1_clk_f_mux[] = {
-+	MSIOF1_SCK_F_MARK,
-+};
-+static const unsigned int msiof1_sync_f_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(5, 24),
-+};
-+static const unsigned int msiof1_sync_f_mux[] = {
-+	MSIOF1_SYNC_F_MARK,
-+};
-+static const unsigned int msiof1_ss1_f_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(6, 1),
-+};
-+static const unsigned int msiof1_ss1_f_mux[] = {
-+	MSIOF1_SS1_F_MARK,
-+};
-+static const unsigned int msiof1_ss2_f_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(6, 2),
-+};
-+static const unsigned int msiof1_ss2_f_mux[] = {
-+	MSIOF1_SS2_F_MARK,
-+};
-+static const unsigned int msiof1_txd_f_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(6, 0),
-+};
-+static const unsigned int msiof1_txd_f_mux[] = {
-+	MSIOF1_TXD_F_MARK,
-+};
-+static const unsigned int msiof1_rxd_f_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(5, 25),
-+};
-+static const unsigned int msiof1_rxd_f_mux[] = {
-+	MSIOF1_RXD_F_MARK,
-+};
-+static const unsigned int msiof1_clk_g_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(3, 6),
-+};
-+static const unsigned int msiof1_clk_g_mux[] = {
-+	MSIOF1_SCK_G_MARK,
-+};
-+static const unsigned int msiof1_sync_g_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(3, 7),
-+};
-+static const unsigned int msiof1_sync_g_mux[] = {
-+	MSIOF1_SYNC_G_MARK,
-+};
-+static const unsigned int msiof1_ss1_g_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(3, 10),
-+};
-+static const unsigned int msiof1_ss1_g_mux[] = {
-+	MSIOF1_SS1_G_MARK,
-+};
-+static const unsigned int msiof1_ss2_g_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(3, 11),
-+};
-+static const unsigned int msiof1_ss2_g_mux[] = {
-+	MSIOF1_SS2_G_MARK,
-+};
-+static const unsigned int msiof1_txd_g_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(3, 9),
-+};
-+static const unsigned int msiof1_txd_g_mux[] = {
-+	MSIOF1_TXD_G_MARK,
-+};
-+static const unsigned int msiof1_rxd_g_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(3, 8),
-+};
-+static const unsigned int msiof1_rxd_g_mux[] = {
-+	MSIOF1_RXD_G_MARK,
-+};
-+/* - MSIOF2 ----------------------------------------------------------------- */
-+static const unsigned int msiof2_clk_a_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 9),
-+};
-+static const unsigned int msiof2_clk_a_mux[] = {
-+	MSIOF2_SCK_A_MARK,
-+};
-+static const unsigned int msiof2_sync_a_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(1, 8),
-+};
-+static const unsigned int msiof2_sync_a_mux[] = {
-+	MSIOF2_SYNC_A_MARK,
-+};
-+static const unsigned int msiof2_ss1_a_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(1, 6),
-+};
-+static const unsigned int msiof2_ss1_a_mux[] = {
-+	MSIOF2_SS1_A_MARK,
-+};
-+static const unsigned int msiof2_ss2_a_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(1, 7),
-+};
-+static const unsigned int msiof2_ss2_a_mux[] = {
-+	MSIOF2_SS2_A_MARK,
-+};
-+static const unsigned int msiof2_txd_a_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(1, 11),
-+};
-+static const unsigned int msiof2_txd_a_mux[] = {
-+	MSIOF2_TXD_A_MARK,
-+};
-+static const unsigned int msiof2_rxd_a_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(1, 10),
-+};
-+static const unsigned int msiof2_rxd_a_mux[] = {
-+	MSIOF2_RXD_A_MARK,
-+};
-+static const unsigned int msiof2_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(0, 4),
-+};
-+static const unsigned int msiof2_clk_b_mux[] = {
-+	MSIOF2_SCK_B_MARK,
-+};
-+static const unsigned int msiof2_sync_b_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(0, 5),
-+};
-+static const unsigned int msiof2_sync_b_mux[] = {
-+	MSIOF2_SYNC_B_MARK,
-+};
-+static const unsigned int msiof2_ss1_b_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(0, 0),
-+};
-+static const unsigned int msiof2_ss1_b_mux[] = {
-+	MSIOF2_SS1_B_MARK,
-+};
-+static const unsigned int msiof2_ss2_b_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(0, 1),
-+};
-+static const unsigned int msiof2_ss2_b_mux[] = {
-+	MSIOF2_SS2_B_MARK,
-+};
-+static const unsigned int msiof2_txd_b_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(0, 7),
-+};
-+static const unsigned int msiof2_txd_b_mux[] = {
-+	MSIOF2_TXD_B_MARK,
-+};
-+static const unsigned int msiof2_rxd_b_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(0, 6),
-+};
-+static const unsigned int msiof2_rxd_b_mux[] = {
-+	MSIOF2_RXD_B_MARK,
-+};
-+static const unsigned int msiof2_clk_c_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(2, 12),
-+};
-+static const unsigned int msiof2_clk_c_mux[] = {
-+	MSIOF2_SCK_C_MARK,
-+};
-+static const unsigned int msiof2_sync_c_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(2, 11),
-+};
-+static const unsigned int msiof2_sync_c_mux[] = {
-+	MSIOF2_SYNC_C_MARK,
-+};
-+static const unsigned int msiof2_ss1_c_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(2, 10),
-+};
-+static const unsigned int msiof2_ss1_c_mux[] = {
-+	MSIOF2_SS1_C_MARK,
-+};
-+static const unsigned int msiof2_ss2_c_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(2, 9),
-+};
-+static const unsigned int msiof2_ss2_c_mux[] = {
-+	MSIOF2_SS2_C_MARK,
-+};
-+static const unsigned int msiof2_txd_c_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(2, 14),
-+};
-+static const unsigned int msiof2_txd_c_mux[] = {
-+	MSIOF2_TXD_C_MARK,
-+};
-+static const unsigned int msiof2_rxd_c_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(2, 13),
-+};
-+static const unsigned int msiof2_rxd_c_mux[] = {
-+	MSIOF2_RXD_C_MARK,
-+};
-+static const unsigned int msiof2_clk_d_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(0, 8),
-+};
-+static const unsigned int msiof2_clk_d_mux[] = {
-+	MSIOF2_SCK_D_MARK,
-+};
-+static const unsigned int msiof2_sync_d_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(0, 9),
-+};
-+static const unsigned int msiof2_sync_d_mux[] = {
-+	MSIOF2_SYNC_D_MARK,
-+};
-+static const unsigned int msiof2_ss1_d_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(0, 12),
-+};
-+static const unsigned int msiof2_ss1_d_mux[] = {
-+	MSIOF2_SS1_D_MARK,
-+};
-+static const unsigned int msiof2_ss2_d_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(0, 13),
-+};
-+static const unsigned int msiof2_ss2_d_mux[] = {
-+	MSIOF2_SS2_D_MARK,
-+};
-+static const unsigned int msiof2_txd_d_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(0, 11),
-+};
-+static const unsigned int msiof2_txd_d_mux[] = {
-+	MSIOF2_TXD_D_MARK,
-+};
-+static const unsigned int msiof2_rxd_d_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(0, 10),
-+};
-+static const unsigned int msiof2_rxd_d_mux[] = {
-+	MSIOF2_RXD_D_MARK,
-+};
-+/* - MSIOF3 ----------------------------------------------------------------- */
-+static const unsigned int msiof3_clk_a_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(0, 0),
-+};
-+static const unsigned int msiof3_clk_a_mux[] = {
-+	MSIOF3_SCK_A_MARK,
-+};
-+static const unsigned int msiof3_sync_a_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(0, 1),
-+};
-+static const unsigned int msiof3_sync_a_mux[] = {
-+	MSIOF3_SYNC_A_MARK,
-+};
-+static const unsigned int msiof3_ss1_a_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(0, 14),
-+};
-+static const unsigned int msiof3_ss1_a_mux[] = {
-+	MSIOF3_SS1_A_MARK,
-+};
-+static const unsigned int msiof3_ss2_a_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(0, 15),
-+};
-+static const unsigned int msiof3_ss2_a_mux[] = {
-+	MSIOF3_SS2_A_MARK,
-+};
-+static const unsigned int msiof3_txd_a_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(0, 3),
-+};
-+static const unsigned int msiof3_txd_a_mux[] = {
-+	MSIOF3_TXD_A_MARK,
-+};
-+static const unsigned int msiof3_rxd_a_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(0, 2),
-+};
-+static const unsigned int msiof3_rxd_a_mux[] = {
-+	MSIOF3_RXD_A_MARK,
-+};
-+static const unsigned int msiof3_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 2),
-+};
-+static const unsigned int msiof3_clk_b_mux[] = {
-+	MSIOF3_SCK_B_MARK,
-+};
-+static const unsigned int msiof3_sync_b_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(1, 0),
-+};
-+static const unsigned int msiof3_sync_b_mux[] = {
-+	MSIOF3_SYNC_B_MARK,
-+};
-+static const unsigned int msiof3_ss1_b_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(1, 4),
-+};
-+static const unsigned int msiof3_ss1_b_mux[] = {
-+	MSIOF3_SS1_B_MARK,
-+};
-+static const unsigned int msiof3_ss2_b_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(1, 5),
-+};
-+static const unsigned int msiof3_ss2_b_mux[] = {
-+	MSIOF3_SS2_B_MARK,
-+};
-+static const unsigned int msiof3_txd_b_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(1, 1),
-+};
-+static const unsigned int msiof3_txd_b_mux[] = {
-+	MSIOF3_TXD_B_MARK,
-+};
-+static const unsigned int msiof3_rxd_b_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(1, 3),
-+};
-+static const unsigned int msiof3_rxd_b_mux[] = {
-+	MSIOF3_RXD_B_MARK,
-+};
-+static const unsigned int msiof3_clk_c_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 12),
-+};
-+static const unsigned int msiof3_clk_c_mux[] = {
-+	MSIOF3_SCK_C_MARK,
-+};
-+static const unsigned int msiof3_sync_c_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(1, 13),
-+};
-+static const unsigned int msiof3_sync_c_mux[] = {
-+	MSIOF3_SYNC_C_MARK,
-+};
-+static const unsigned int msiof3_txd_c_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(1, 15),
-+};
-+static const unsigned int msiof3_txd_c_mux[] = {
-+	MSIOF3_TXD_C_MARK,
-+};
-+static const unsigned int msiof3_rxd_c_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(1, 14),
-+};
-+static const unsigned int msiof3_rxd_c_mux[] = {
-+	MSIOF3_RXD_C_MARK,
-+};
-+static const unsigned int msiof3_clk_d_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 22),
-+};
-+static const unsigned int msiof3_clk_d_mux[] = {
-+	MSIOF3_SCK_D_MARK,
-+};
-+static const unsigned int msiof3_sync_d_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(1, 23),
-+};
-+static const unsigned int msiof3_sync_d_mux[] = {
-+	MSIOF3_SYNC_D_MARK,
-+};
-+static const unsigned int msiof3_ss1_d_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(1, 26),
-+};
-+static const unsigned int msiof3_ss1_d_mux[] = {
-+	MSIOF3_SS1_D_MARK,
-+};
-+static const unsigned int msiof3_txd_d_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(1, 25),
-+};
-+static const unsigned int msiof3_txd_d_mux[] = {
-+	MSIOF3_TXD_D_MARK,
-+};
-+static const unsigned int msiof3_rxd_d_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(1, 24),
-+};
-+static const unsigned int msiof3_rxd_d_mux[] = {
-+	MSIOF3_RXD_D_MARK,
-+};
-+
-+/* - PWM0 --------------------------------------------------------------------*/
-+static const unsigned int pwm0_pins[] = {
-+	/* PWM */
-+	RCAR_GP_PIN(2, 6),
-+};
-+static const unsigned int pwm0_mux[] = {
-+	PWM0_MARK,
-+};
-+/* - PWM1 --------------------------------------------------------------------*/
-+static const unsigned int pwm1_a_pins[] = {
-+	/* PWM */
-+	RCAR_GP_PIN(2, 7),
-+};
-+static const unsigned int pwm1_a_mux[] = {
-+	PWM1_A_MARK,
-+};
-+static const unsigned int pwm1_b_pins[] = {
-+	/* PWM */
-+	RCAR_GP_PIN(1, 8),
-+};
-+static const unsigned int pwm1_b_mux[] = {
-+	PWM1_B_MARK,
-+};
-+/* - PWM2 --------------------------------------------------------------------*/
-+static const unsigned int pwm2_a_pins[] = {
-+	/* PWM */
-+	RCAR_GP_PIN(2, 8),
-+};
-+static const unsigned int pwm2_a_mux[] = {
-+	PWM2_A_MARK,
-+};
-+static const unsigned int pwm2_b_pins[] = {
-+	/* PWM */
-+	RCAR_GP_PIN(1, 11),
-+};
-+static const unsigned int pwm2_b_mux[] = {
-+	PWM2_B_MARK,
-+};
-+/* - PWM3 --------------------------------------------------------------------*/
-+static const unsigned int pwm3_a_pins[] = {
-+	/* PWM */
-+	RCAR_GP_PIN(1, 0),
-+};
-+static const unsigned int pwm3_a_mux[] = {
-+	PWM3_A_MARK,
-+};
-+static const unsigned int pwm3_b_pins[] = {
-+	/* PWM */
-+	RCAR_GP_PIN(2, 2),
-+};
-+static const unsigned int pwm3_b_mux[] = {
-+	PWM3_B_MARK,
-+};
-+/* - PWM4 --------------------------------------------------------------------*/
-+static const unsigned int pwm4_a_pins[] = {
-+	/* PWM */
-+	RCAR_GP_PIN(1, 1),
-+};
-+static const unsigned int pwm4_a_mux[] = {
-+	PWM4_A_MARK,
-+};
-+static const unsigned int pwm4_b_pins[] = {
-+	/* PWM */
-+	RCAR_GP_PIN(2, 3),
-+};
-+static const unsigned int pwm4_b_mux[] = {
-+	PWM4_B_MARK,
-+};
-+/* - PWM5 --------------------------------------------------------------------*/
-+static const unsigned int pwm5_a_pins[] = {
-+	/* PWM */
-+	RCAR_GP_PIN(1, 2),
-+};
-+static const unsigned int pwm5_a_mux[] = {
-+	PWM5_A_MARK,
-+};
-+static const unsigned int pwm5_b_pins[] = {
-+	/* PWM */
-+	RCAR_GP_PIN(2, 4),
-+};
-+static const unsigned int pwm5_b_mux[] = {
-+	PWM5_B_MARK,
-+};
-+/* - PWM6 --------------------------------------------------------------------*/
-+static const unsigned int pwm6_a_pins[] = {
-+	/* PWM */
-+	RCAR_GP_PIN(1, 3),
-+};
-+static const unsigned int pwm6_a_mux[] = {
-+	PWM6_A_MARK,
-+};
-+static const unsigned int pwm6_b_pins[] = {
-+	/* PWM */
-+	RCAR_GP_PIN(2, 5),
-+};
-+static const unsigned int pwm6_b_mux[] = {
-+	PWM6_B_MARK,
-+};
-+
-+/* - QSPI0 ------------------------------------------------------------------ */
-+static const unsigned int qspi0_ctrl_pins[] = {
-+	/* QSPI0_SPCLK, QSPI0_SSL */
-+	PIN_NUMBER('W', 3), PIN_NUMBER('Y', 3),
-+};
-+static const unsigned int qspi0_ctrl_mux[] = {
-+	QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
-+};
-+static const unsigned int qspi0_data2_pins[] = {
-+	/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
-+	PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
-+};
-+static const unsigned int qspi0_data2_mux[] = {
-+	QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
-+};
-+static const unsigned int qspi0_data4_pins[] = {
-+	/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1, QSPI0_IO2, QSPI0_IO3 */
-+	PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
-+	PIN_NUMBER('Y', 6), PIN_A_NUMBER('B', 6),
-+};
-+static const unsigned int qspi0_data4_mux[] = {
-+	QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
-+	QSPI0_IO2_MARK, QSPI0_IO3_MARK,
-+};
-+/* - QSPI1 ------------------------------------------------------------------ */
-+static const unsigned int qspi1_ctrl_pins[] = {
-+	/* QSPI1_SPCLK, QSPI1_SSL */
-+	PIN_NUMBER('V', 3), PIN_NUMBER('V', 5),
-+};
-+static const unsigned int qspi1_ctrl_mux[] = {
-+	QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
-+};
-+static const unsigned int qspi1_data2_pins[] = {
-+	/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
-+	PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
-+};
-+static const unsigned int qspi1_data2_mux[] = {
-+	QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
-+};
-+static const unsigned int qspi1_data4_pins[] = {
-+	/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1, QSPI1_IO2, QSPI1_IO3 */
-+	PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
-+	PIN_A_NUMBER('E', 4), PIN_A_NUMBER('C', 3),
-+};
-+static const unsigned int qspi1_data4_mux[] = {
-+	QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
-+	QSPI1_IO2_MARK, QSPI1_IO3_MARK,
-+};
-+
-+/* - SATA --------------------------------------------------------------------*/
-+static const unsigned int sata0_devslp_a_pins[] = {
-+	/* DEVSLP */
-+	RCAR_GP_PIN(6, 16),
-+};
-+static const unsigned int sata0_devslp_a_mux[] = {
-+	SATA_DEVSLP_A_MARK,
-+};
-+static const unsigned int sata0_devslp_b_pins[] = {
-+	/* DEVSLP */
-+	RCAR_GP_PIN(4, 6),
-+};
-+static const unsigned int sata0_devslp_b_mux[] = {
-+	SATA_DEVSLP_B_MARK,
-+};
-+
-+/* - SCIF0 ------------------------------------------------------------------ */
-+static const unsigned int scif0_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
-+};
-+static const unsigned int scif0_data_mux[] = {
-+	RX0_MARK, TX0_MARK,
-+};
-+static const unsigned int scif0_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 0),
-+};
-+static const unsigned int scif0_clk_mux[] = {
-+	SCK0_MARK,
-+};
-+static const unsigned int scif0_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3),
-+};
-+static const unsigned int scif0_ctrl_mux[] = {
-+	RTS0_N_TANS_MARK, CTS0_N_MARK,
-+};
-+/* - SCIF1 ------------------------------------------------------------------ */
-+static const unsigned int scif1_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
-+};
-+static const unsigned int scif1_data_a_mux[] = {
-+	RX1_A_MARK, TX1_A_MARK,
-+};
-+static const unsigned int scif1_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 21),
-+};
-+static const unsigned int scif1_clk_mux[] = {
-+	SCK1_MARK,
-+};
-+static const unsigned int scif1_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7),
-+};
-+static const unsigned int scif1_ctrl_mux[] = {
-+	RTS1_N_TANS_MARK, CTS1_N_MARK,
-+};
-+
-+static const unsigned int scif1_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
-+};
-+static const unsigned int scif1_data_b_mux[] = {
-+	RX1_B_MARK, TX1_B_MARK,
-+};
-+/* - SCIF2 ------------------------------------------------------------------ */
-+static const unsigned int scif2_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10),
-+};
-+static const unsigned int scif2_data_a_mux[] = {
-+	RX2_A_MARK, TX2_A_MARK,
-+};
-+static const unsigned int scif2_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 9),
-+};
-+static const unsigned int scif2_clk_mux[] = {
-+	SCK2_MARK,
-+};
-+static const unsigned int scif2_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16),
-+};
-+static const unsigned int scif2_data_b_mux[] = {
-+	RX2_B_MARK, TX2_B_MARK,
-+};
-+/* - SCIF3 ------------------------------------------------------------------ */
-+static const unsigned int scif3_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
-+};
-+static const unsigned int scif3_data_a_mux[] = {
-+	RX3_A_MARK, TX3_A_MARK,
-+};
-+static const unsigned int scif3_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 22),
-+};
-+static const unsigned int scif3_clk_mux[] = {
-+	SCK3_MARK,
-+};
-+static const unsigned int scif3_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
-+};
-+static const unsigned int scif3_ctrl_mux[] = {
-+	RTS3_N_TANS_MARK, CTS3_N_MARK,
-+};
-+static const unsigned int scif3_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
-+};
-+static const unsigned int scif3_data_b_mux[] = {
-+	RX3_B_MARK, TX3_B_MARK,
-+};
-+/* - SCIF4 ------------------------------------------------------------------ */
-+static const unsigned int scif4_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12),
-+};
-+static const unsigned int scif4_data_a_mux[] = {
-+	RX4_A_MARK, TX4_A_MARK,
-+};
-+static const unsigned int scif4_clk_a_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(2, 10),
-+};
-+static const unsigned int scif4_clk_a_mux[] = {
-+	SCK4_A_MARK,
-+};
-+static const unsigned int scif4_ctrl_a_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
-+};
-+static const unsigned int scif4_ctrl_a_mux[] = {
-+	RTS4_N_TANS_A_MARK, CTS4_N_A_MARK,
-+};
-+static const unsigned int scif4_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
-+};
-+static const unsigned int scif4_data_b_mux[] = {
-+	RX4_B_MARK, TX4_B_MARK,
-+};
-+static const unsigned int scif4_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 5),
-+};
-+static const unsigned int scif4_clk_b_mux[] = {
-+	SCK4_B_MARK,
-+};
-+static const unsigned int scif4_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
-+};
-+static const unsigned int scif4_ctrl_b_mux[] = {
-+	RTS4_N_TANS_B_MARK, CTS4_N_B_MARK,
-+};
-+static const unsigned int scif4_data_c_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
-+};
-+static const unsigned int scif4_data_c_mux[] = {
-+	RX4_C_MARK, TX4_C_MARK,
-+};
-+static const unsigned int scif4_clk_c_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(0, 8),
-+};
-+static const unsigned int scif4_clk_c_mux[] = {
-+	SCK4_C_MARK,
-+};
-+static const unsigned int scif4_ctrl_c_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
-+};
-+static const unsigned int scif4_ctrl_c_mux[] = {
-+	RTS4_N_TANS_C_MARK, CTS4_N_C_MARK,
-+};
-+/* - SCIF5 ------------------------------------------------------------------ */
-+static const unsigned int scif5_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 21),
-+};
-+static const unsigned int scif5_data_mux[] = {
-+	RX5_MARK, TX5_MARK,
-+};
-+static const unsigned int scif5_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 21),
-+};
-+static const unsigned int scif5_clk_mux[] = {
-+	SCK5_MARK,
-+};
-+
-+/* - SCIF Clock ------------------------------------------------------------- */
-+static const unsigned int scif_clk_a_pins[] = {
-+	/* SCIF_CLK */
-+	RCAR_GP_PIN(6, 23),
-+};
-+static const unsigned int scif_clk_a_mux[] = {
-+	SCIF_CLK_A_MARK,
-+};
-+static const unsigned int scif_clk_b_pins[] = {
-+	/* SCIF_CLK */
-+	RCAR_GP_PIN(5, 9),
-+};
-+static const unsigned int scif_clk_b_mux[] = {
-+	SCIF_CLK_B_MARK,
-+};
-+
-+/* - SDHI0 ------------------------------------------------------------------ */
-+static const unsigned int sdhi0_data1_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(3, 2),
-+};
-+static const unsigned int sdhi0_data1_mux[] = {
-+	SD0_DAT0_MARK,
-+};
-+static const unsigned int sdhi0_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),
-+	RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
-+};
-+static const unsigned int sdhi0_data4_mux[] = {
-+	SD0_DAT0_MARK, SD0_DAT1_MARK,
-+	SD0_DAT2_MARK, SD0_DAT3_MARK,
-+};
-+static const unsigned int sdhi0_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1),
-+};
-+static const unsigned int sdhi0_ctrl_mux[] = {
-+	SD0_CLK_MARK, SD0_CMD_MARK,
-+};
-+static const unsigned int sdhi0_cd_pins[] = {
-+	/* CD */
-+	RCAR_GP_PIN(3, 12),
-+};
-+static const unsigned int sdhi0_cd_mux[] = {
-+	SD0_CD_MARK,
-+};
-+static const unsigned int sdhi0_wp_pins[] = {
-+	/* WP */
-+	RCAR_GP_PIN(3, 13),
-+};
-+static const unsigned int sdhi0_wp_mux[] = {
-+	SD0_WP_MARK,
-+};
-+/* - SDHI1 ------------------------------------------------------------------ */
-+static const unsigned int sdhi1_data1_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(3, 8),
-+};
-+static const unsigned int sdhi1_data1_mux[] = {
-+	SD1_DAT0_MARK,
-+};
-+static const unsigned int sdhi1_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(3, 8),  RCAR_GP_PIN(3, 9),
-+	RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
-+};
-+static const unsigned int sdhi1_data4_mux[] = {
-+	SD1_DAT0_MARK, SD1_DAT1_MARK,
-+	SD1_DAT2_MARK, SD1_DAT3_MARK,
-+};
-+static const unsigned int sdhi1_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
-+};
-+static const unsigned int sdhi1_ctrl_mux[] = {
-+	SD1_CLK_MARK, SD1_CMD_MARK,
-+};
-+static const unsigned int sdhi1_cd_pins[] = {
-+	/* CD */
-+	RCAR_GP_PIN(3, 14),
-+};
-+static const unsigned int sdhi1_cd_mux[] = {
-+	SD1_CD_MARK,
-+};
-+static const unsigned int sdhi1_wp_pins[] = {
-+	/* WP */
-+	RCAR_GP_PIN(3, 15),
-+};
-+static const unsigned int sdhi1_wp_mux[] = {
-+	SD1_WP_MARK,
-+};
-+/* - SDHI2 ------------------------------------------------------------------ */
-+static const unsigned int sdhi2_data1_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(4, 2),
-+};
-+static const unsigned int sdhi2_data1_mux[] = {
-+	SD2_DAT0_MARK,
-+};
-+static const unsigned int sdhi2_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3),
-+	RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5),
-+};
-+static const unsigned int sdhi2_data4_mux[] = {
-+	SD2_DAT0_MARK, SD2_DAT1_MARK,
-+	SD2_DAT2_MARK, SD2_DAT3_MARK,
-+};
-+static const unsigned int sdhi2_data8_pins[] = {
-+	/* D[0:7] */
-+	RCAR_GP_PIN(4, 2),  RCAR_GP_PIN(4, 3),
-+	RCAR_GP_PIN(4, 4),  RCAR_GP_PIN(4, 5),
-+	RCAR_GP_PIN(3, 8),  RCAR_GP_PIN(3, 9),
-+	RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
-+};
-+static const unsigned int sdhi2_data8_mux[] = {
-+	SD2_DAT0_MARK, SD2_DAT1_MARK,
-+	SD2_DAT2_MARK, SD2_DAT3_MARK,
-+	SD2_DAT4_MARK, SD2_DAT5_MARK,
-+	SD2_DAT6_MARK, SD2_DAT7_MARK,
-+};
-+static const unsigned int sdhi2_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1),
-+};
-+static const unsigned int sdhi2_ctrl_mux[] = {
-+	SD2_CLK_MARK, SD2_CMD_MARK,
-+};
-+static const unsigned int sdhi2_cd_a_pins[] = {
-+	/* CD */
-+	RCAR_GP_PIN(4, 13),
-+};
-+static const unsigned int sdhi2_cd_a_mux[] = {
-+	SD2_CD_A_MARK,
-+};
-+static const unsigned int sdhi2_cd_b_pins[] = {
-+	/* CD */
-+	RCAR_GP_PIN(5, 10),
-+};
-+static const unsigned int sdhi2_cd_b_mux[] = {
-+	SD2_CD_B_MARK,
-+};
-+static const unsigned int sdhi2_wp_a_pins[] = {
-+	/* WP */
-+	RCAR_GP_PIN(4, 14),
-+};
-+static const unsigned int sdhi2_wp_a_mux[] = {
-+	SD2_WP_A_MARK,
-+};
-+static const unsigned int sdhi2_wp_b_pins[] = {
-+	/* WP */
-+	RCAR_GP_PIN(5, 11),
-+};
-+static const unsigned int sdhi2_wp_b_mux[] = {
-+	SD2_WP_B_MARK,
-+};
-+static const unsigned int sdhi2_ds_pins[] = {
-+	/* DS */
-+	RCAR_GP_PIN(4, 6),
-+};
-+static const unsigned int sdhi2_ds_mux[] = {
-+	SD2_DS_MARK,
-+};
-+/* - SDHI3 ------------------------------------------------------------------ */
-+static const unsigned int sdhi3_data1_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(4, 9),
-+};
-+static const unsigned int sdhi3_data1_mux[] = {
-+	SD3_DAT0_MARK,
-+};
-+static const unsigned int sdhi3_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(4, 9),  RCAR_GP_PIN(4, 10),
-+	RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12),
-+};
-+static const unsigned int sdhi3_data4_mux[] = {
-+	SD3_DAT0_MARK, SD3_DAT1_MARK,
-+	SD3_DAT2_MARK, SD3_DAT3_MARK,
-+};
-+static const unsigned int sdhi3_data8_pins[] = {
-+	/* D[0:7] */
-+	RCAR_GP_PIN(4, 9),  RCAR_GP_PIN(4, 10),
-+	RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12),
-+	RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 14),
-+	RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16),
-+};
-+static const unsigned int sdhi3_data8_mux[] = {
-+	SD3_DAT0_MARK, SD3_DAT1_MARK,
-+	SD3_DAT2_MARK, SD3_DAT3_MARK,
-+	SD3_DAT4_MARK, SD3_DAT5_MARK,
-+	SD3_DAT6_MARK, SD3_DAT7_MARK,
-+};
-+static const unsigned int sdhi3_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 8),
-+};
-+static const unsigned int sdhi3_ctrl_mux[] = {
-+	SD3_CLK_MARK, SD3_CMD_MARK,
-+};
-+static const unsigned int sdhi3_cd_pins[] = {
-+	/* CD */
-+	RCAR_GP_PIN(4, 15),
-+};
-+static const unsigned int sdhi3_cd_mux[] = {
-+	SD3_CD_MARK,
-+};
-+static const unsigned int sdhi3_wp_pins[] = {
-+	/* WP */
-+	RCAR_GP_PIN(4, 16),
-+};
-+static const unsigned int sdhi3_wp_mux[] = {
-+	SD3_WP_MARK,
-+};
-+static const unsigned int sdhi3_ds_pins[] = {
-+	/* DS */
-+	RCAR_GP_PIN(4, 17),
-+};
-+static const unsigned int sdhi3_ds_mux[] = {
-+	SD3_DS_MARK,
-+};
-+
-+/* - SSI -------------------------------------------------------------------- */
-+static const unsigned int ssi0_data_pins[] = {
-+	/* SDATA */
-+	RCAR_GP_PIN(6, 2),
-+};
-+static const unsigned int ssi0_data_mux[] = {
-+	SSI_SDATA0_MARK,
-+};
-+static const unsigned int ssi01239_ctrl_pins[] = {
-+	/* SCK, WS */
-+	RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1),
-+};
-+static const unsigned int ssi01239_ctrl_mux[] = {
-+	SSI_SCK01239_MARK, SSI_WS01239_MARK,
-+};
-+static const unsigned int ssi1_data_a_pins[] = {
-+	/* SDATA */
-+	RCAR_GP_PIN(6, 3),
-+};
-+static const unsigned int ssi1_data_a_mux[] = {
-+	SSI_SDATA1_A_MARK,
-+};
-+static const unsigned int ssi1_data_b_pins[] = {
-+	/* SDATA */
-+	RCAR_GP_PIN(5, 12),
-+};
-+static const unsigned int ssi1_data_b_mux[] = {
-+	SSI_SDATA1_B_MARK,
-+};
-+static const unsigned int ssi1_ctrl_a_pins[] = {
-+	/* SCK, WS */
-+	RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),
-+};
-+static const unsigned int ssi1_ctrl_a_mux[] = {
-+	SSI_SCK1_A_MARK, SSI_WS1_A_MARK,
-+};
-+static const unsigned int ssi1_ctrl_b_pins[] = {
-+	/* SCK, WS */
-+	RCAR_GP_PIN(6, 4), RCAR_GP_PIN(6, 21),
-+};
-+static const unsigned int ssi1_ctrl_b_mux[] = {
-+	SSI_SCK1_B_MARK, SSI_WS1_B_MARK,
-+};
-+static const unsigned int ssi2_data_a_pins[] = {
-+	/* SDATA */
-+	RCAR_GP_PIN(6, 4),
-+};
-+static const unsigned int ssi2_data_a_mux[] = {
-+	SSI_SDATA2_A_MARK,
-+};
-+static const unsigned int ssi2_data_b_pins[] = {
-+	/* SDATA */
-+	RCAR_GP_PIN(5, 13),
-+};
-+static const unsigned int ssi2_data_b_mux[] = {
-+	SSI_SDATA2_B_MARK,
-+};
-+static const unsigned int ssi2_ctrl_a_pins[] = {
-+	/* SCK, WS */
-+	RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 21),
-+};
-+static const unsigned int ssi2_ctrl_a_mux[] = {
-+	SSI_SCK2_A_MARK, SSI_WS2_A_MARK,
-+};
-+static const unsigned int ssi2_ctrl_b_pins[] = {
-+	/* SCK, WS */
-+	RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29),
-+};
-+static const unsigned int ssi2_ctrl_b_mux[] = {
-+	SSI_SCK2_B_MARK, SSI_WS2_B_MARK,
-+};
-+static const unsigned int ssi3_data_pins[] = {
-+	/* SDATA */
-+	RCAR_GP_PIN(6, 7),
-+};
-+static const unsigned int ssi3_data_mux[] = {
-+	SSI_SDATA3_MARK,
-+};
-+static const unsigned int ssi34_ctrl_pins[] = {
-+	/* SCK, WS */
-+	RCAR_GP_PIN(6, 5), RCAR_GP_PIN(6, 6),
-+};
-+static const unsigned int ssi34_ctrl_mux[] = {
-+	SSI_SCK34_MARK, SSI_WS34_MARK,
-+};
-+static const unsigned int ssi4_data_pins[] = {
-+	/* SDATA */
-+	RCAR_GP_PIN(6, 10),
-+};
-+static const unsigned int ssi4_data_mux[] = {
-+	SSI_SDATA4_MARK,
-+};
-+static const unsigned int ssi4_ctrl_pins[] = {
-+	/* SCK, WS */
-+	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
-+};
-+static const unsigned int ssi4_ctrl_mux[] = {
-+	SSI_SCK4_MARK, SSI_WS4_MARK,
-+};
-+static const unsigned int ssi5_data_pins[] = {
-+	/* SDATA */
-+	RCAR_GP_PIN(6, 13),
-+};
-+static const unsigned int ssi5_data_mux[] = {
-+	SSI_SDATA5_MARK,
-+};
-+static const unsigned int ssi5_ctrl_pins[] = {
-+	/* SCK, WS */
-+	RCAR_GP_PIN(6, 11), RCAR_GP_PIN(6, 12),
-+};
-+static const unsigned int ssi5_ctrl_mux[] = {
-+	SSI_SCK5_MARK, SSI_WS5_MARK,
-+};
-+static const unsigned int ssi6_data_pins[] = {
-+	/* SDATA */
-+	RCAR_GP_PIN(6, 16),
-+};
-+static const unsigned int ssi6_data_mux[] = {
-+	SSI_SDATA6_MARK,
-+};
-+static const unsigned int ssi6_ctrl_pins[] = {
-+	/* SCK, WS */
-+	RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15),
-+};
-+static const unsigned int ssi6_ctrl_mux[] = {
-+	SSI_SCK6_MARK, SSI_WS6_MARK,
-+};
-+static const unsigned int ssi7_data_pins[] = {
-+	/* SDATA */
-+	RCAR_GP_PIN(6, 19),
-+};
-+static const unsigned int ssi7_data_mux[] = {
-+	SSI_SDATA7_MARK,
-+};
-+static const unsigned int ssi78_ctrl_pins[] = {
-+	/* SCK, WS */
-+	RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
-+};
-+static const unsigned int ssi78_ctrl_mux[] = {
-+	SSI_SCK78_MARK, SSI_WS78_MARK,
-+};
-+static const unsigned int ssi8_data_pins[] = {
-+	/* SDATA */
-+	RCAR_GP_PIN(6, 20),
-+};
-+static const unsigned int ssi8_data_mux[] = {
-+	SSI_SDATA8_MARK,
-+};
-+static const unsigned int ssi9_data_a_pins[] = {
-+	/* SDATA */
-+	RCAR_GP_PIN(6, 21),
-+};
-+static const unsigned int ssi9_data_a_mux[] = {
-+	SSI_SDATA9_A_MARK,
-+};
-+static const unsigned int ssi9_data_b_pins[] = {
-+	/* SDATA */
-+	RCAR_GP_PIN(5, 14),
-+};
-+static const unsigned int ssi9_data_b_mux[] = {
-+	SSI_SDATA9_B_MARK,
-+};
-+static const unsigned int ssi9_ctrl_a_pins[] = {
-+	/* SCK, WS */
-+	RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16),
-+};
-+static const unsigned int ssi9_ctrl_a_mux[] = {
-+	SSI_SCK9_A_MARK, SSI_WS9_A_MARK,
-+};
-+static const unsigned int ssi9_ctrl_b_pins[] = {
-+	/* SCK, WS */
-+	RCAR_GP_PIN(6, 30), RCAR_GP_PIN(6, 31),
-+};
-+static const unsigned int ssi9_ctrl_b_mux[] = {
-+	SSI_SCK9_B_MARK, SSI_WS9_B_MARK,
-+};
-+
-+/* - USB0 ------------------------------------------------------------------- */
-+static const unsigned int usb0_pins[] = {
-+	/* PWEN, OVC */
-+	RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25),
-+};
-+static const unsigned int usb0_mux[] = {
-+	USB0_PWEN_MARK, USB0_OVC_MARK,
-+};
-+/* - USB1 ------------------------------------------------------------------- */
-+static const unsigned int usb1_pins[] = {
-+	/* PWEN, OVC */
-+	RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),
-+};
-+static const unsigned int usb1_mux[] = {
-+	USB1_PWEN_MARK, USB1_OVC_MARK,
-+};
-+/* - USB2 ------------------------------------------------------------------- */
-+static const unsigned int usb2_pins[] = {
-+	/* PWEN, OVC */
-+	RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15),
-+};
-+static const unsigned int usb2_mux[] = {
-+	USB2_PWEN_MARK, USB2_OVC_MARK,
-+};
-+
-+static const struct sh_pfc_pin_group pinmux_groups[] = {
-+	SH_PFC_PIN_GROUP(audio_clk_a_a),
-+	SH_PFC_PIN_GROUP(audio_clk_a_b),
-+	SH_PFC_PIN_GROUP(audio_clk_a_c),
-+	SH_PFC_PIN_GROUP(audio_clk_b_a),
-+	SH_PFC_PIN_GROUP(audio_clk_b_b),
-+	SH_PFC_PIN_GROUP(audio_clk_c_a),
-+	SH_PFC_PIN_GROUP(audio_clk_c_b),
-+	SH_PFC_PIN_GROUP(audio_clkout_a),
-+	SH_PFC_PIN_GROUP(audio_clkout_b),
-+	SH_PFC_PIN_GROUP(audio_clkout_c),
-+	SH_PFC_PIN_GROUP(audio_clkout_d),
-+	SH_PFC_PIN_GROUP(audio_clkout1_a),
-+	SH_PFC_PIN_GROUP(audio_clkout1_b),
-+	SH_PFC_PIN_GROUP(audio_clkout2_a),
-+	SH_PFC_PIN_GROUP(audio_clkout2_b),
-+	SH_PFC_PIN_GROUP(audio_clkout3_a),
-+	SH_PFC_PIN_GROUP(audio_clkout3_b),
-+	SH_PFC_PIN_GROUP(avb_link),
-+	SH_PFC_PIN_GROUP(avb_magic),
-+	SH_PFC_PIN_GROUP(avb_phy_int),
-+	SH_PFC_PIN_GROUP(avb_mdc),
-+	SH_PFC_PIN_GROUP(avb_mii),
-+	SH_PFC_PIN_GROUP(avb_avtp_pps),
-+	SH_PFC_PIN_GROUP(avb_avtp_match_a),
-+	SH_PFC_PIN_GROUP(avb_avtp_capture_a),
-+	SH_PFC_PIN_GROUP(avb_avtp_match_b),
-+	SH_PFC_PIN_GROUP(avb_avtp_capture_b),
-+	SH_PFC_PIN_GROUP(can0_data_a),
-+	SH_PFC_PIN_GROUP(can0_data_b),
-+	SH_PFC_PIN_GROUP(can1_data),
-+	SH_PFC_PIN_GROUP(can_clk),
-+	SH_PFC_PIN_GROUP(canfd0_data_a),
-+	SH_PFC_PIN_GROUP(canfd0_data_b),
-+	SH_PFC_PIN_GROUP(canfd1_data),
-+	SH_PFC_PIN_GROUP(drif0_ctrl_a),
-+	SH_PFC_PIN_GROUP(drif0_data0_a),
-+	SH_PFC_PIN_GROUP(drif0_data1_a),
-+	SH_PFC_PIN_GROUP(drif0_ctrl_b),
-+	SH_PFC_PIN_GROUP(drif0_data0_b),
-+	SH_PFC_PIN_GROUP(drif0_data1_b),
-+	SH_PFC_PIN_GROUP(drif0_ctrl_c),
-+	SH_PFC_PIN_GROUP(drif0_data0_c),
-+	SH_PFC_PIN_GROUP(drif0_data1_c),
-+	SH_PFC_PIN_GROUP(drif1_ctrl_a),
-+	SH_PFC_PIN_GROUP(drif1_data0_a),
-+	SH_PFC_PIN_GROUP(drif1_data1_a),
-+	SH_PFC_PIN_GROUP(drif1_ctrl_b),
-+	SH_PFC_PIN_GROUP(drif1_data0_b),
-+	SH_PFC_PIN_GROUP(drif1_data1_b),
-+	SH_PFC_PIN_GROUP(drif1_ctrl_c),
-+	SH_PFC_PIN_GROUP(drif1_data0_c),
-+	SH_PFC_PIN_GROUP(drif1_data1_c),
-+	SH_PFC_PIN_GROUP(drif2_ctrl_a),
-+	SH_PFC_PIN_GROUP(drif2_data0_a),
-+	SH_PFC_PIN_GROUP(drif2_data1_a),
-+	SH_PFC_PIN_GROUP(drif2_ctrl_b),
-+	SH_PFC_PIN_GROUP(drif2_data0_b),
-+	SH_PFC_PIN_GROUP(drif2_data1_b),
-+	SH_PFC_PIN_GROUP(drif3_ctrl_a),
-+	SH_PFC_PIN_GROUP(drif3_data0_a),
-+	SH_PFC_PIN_GROUP(drif3_data1_a),
-+	SH_PFC_PIN_GROUP(drif3_ctrl_b),
-+	SH_PFC_PIN_GROUP(drif3_data0_b),
-+	SH_PFC_PIN_GROUP(drif3_data1_b),
-+	SH_PFC_PIN_GROUP(du_rgb666),
-+	SH_PFC_PIN_GROUP(du_rgb888),
-+	SH_PFC_PIN_GROUP(du_clk_out_0),
-+	SH_PFC_PIN_GROUP(du_clk_out_1),
-+	SH_PFC_PIN_GROUP(du_sync),
-+	SH_PFC_PIN_GROUP(du_oddf),
-+	SH_PFC_PIN_GROUP(du_cde),
-+	SH_PFC_PIN_GROUP(du_disp),
-+	SH_PFC_PIN_GROUP(hscif0_data),
-+	SH_PFC_PIN_GROUP(hscif0_clk),
-+	SH_PFC_PIN_GROUP(hscif0_ctrl),
-+	SH_PFC_PIN_GROUP(hscif1_data_a),
-+	SH_PFC_PIN_GROUP(hscif1_clk_a),
-+	SH_PFC_PIN_GROUP(hscif1_ctrl_a),
-+	SH_PFC_PIN_GROUP(hscif1_data_b),
-+	SH_PFC_PIN_GROUP(hscif1_clk_b),
-+	SH_PFC_PIN_GROUP(hscif1_ctrl_b),
-+	SH_PFC_PIN_GROUP(hscif2_data_a),
-+	SH_PFC_PIN_GROUP(hscif2_clk_a),
-+	SH_PFC_PIN_GROUP(hscif2_ctrl_a),
-+	SH_PFC_PIN_GROUP(hscif2_data_b),
-+	SH_PFC_PIN_GROUP(hscif2_clk_b),
-+	SH_PFC_PIN_GROUP(hscif2_ctrl_b),
-+	SH_PFC_PIN_GROUP(hscif3_data_a),
-+	SH_PFC_PIN_GROUP(hscif3_clk),
-+	SH_PFC_PIN_GROUP(hscif3_ctrl),
-+	SH_PFC_PIN_GROUP(hscif3_data_b),
-+	SH_PFC_PIN_GROUP(hscif3_data_c),
-+	SH_PFC_PIN_GROUP(hscif3_data_d),
-+	SH_PFC_PIN_GROUP(hscif4_data_a),
-+	SH_PFC_PIN_GROUP(hscif4_clk),
-+	SH_PFC_PIN_GROUP(hscif4_ctrl),
-+	SH_PFC_PIN_GROUP(hscif4_data_b),
-+	SH_PFC_PIN_GROUP(i2c1_a),
-+	SH_PFC_PIN_GROUP(i2c1_b),
-+	SH_PFC_PIN_GROUP(i2c2_a),
-+	SH_PFC_PIN_GROUP(i2c2_b),
-+	SH_PFC_PIN_GROUP(i2c6_a),
-+	SH_PFC_PIN_GROUP(i2c6_b),
-+	SH_PFC_PIN_GROUP(i2c6_c),
-+	SH_PFC_PIN_GROUP(intc_ex_irq0),
-+	SH_PFC_PIN_GROUP(intc_ex_irq1),
-+	SH_PFC_PIN_GROUP(intc_ex_irq2),
-+	SH_PFC_PIN_GROUP(intc_ex_irq3),
-+	SH_PFC_PIN_GROUP(intc_ex_irq4),
-+	SH_PFC_PIN_GROUP(intc_ex_irq5),
-+	SH_PFC_PIN_GROUP(msiof0_clk),
-+	SH_PFC_PIN_GROUP(msiof0_sync),
-+	SH_PFC_PIN_GROUP(msiof0_ss1),
-+	SH_PFC_PIN_GROUP(msiof0_ss2),
-+	SH_PFC_PIN_GROUP(msiof0_txd),
-+	SH_PFC_PIN_GROUP(msiof0_rxd),
-+	SH_PFC_PIN_GROUP(msiof1_clk_a),
-+	SH_PFC_PIN_GROUP(msiof1_sync_a),
-+	SH_PFC_PIN_GROUP(msiof1_ss1_a),
-+	SH_PFC_PIN_GROUP(msiof1_ss2_a),
-+	SH_PFC_PIN_GROUP(msiof1_txd_a),
-+	SH_PFC_PIN_GROUP(msiof1_rxd_a),
-+	SH_PFC_PIN_GROUP(msiof1_clk_b),
-+	SH_PFC_PIN_GROUP(msiof1_sync_b),
-+	SH_PFC_PIN_GROUP(msiof1_ss1_b),
-+	SH_PFC_PIN_GROUP(msiof1_ss2_b),
-+	SH_PFC_PIN_GROUP(msiof1_txd_b),
-+	SH_PFC_PIN_GROUP(msiof1_rxd_b),
-+	SH_PFC_PIN_GROUP(msiof1_clk_c),
-+	SH_PFC_PIN_GROUP(msiof1_sync_c),
-+	SH_PFC_PIN_GROUP(msiof1_ss1_c),
-+	SH_PFC_PIN_GROUP(msiof1_ss2_c),
-+	SH_PFC_PIN_GROUP(msiof1_txd_c),
-+	SH_PFC_PIN_GROUP(msiof1_rxd_c),
-+	SH_PFC_PIN_GROUP(msiof1_clk_d),
-+	SH_PFC_PIN_GROUP(msiof1_sync_d),
-+	SH_PFC_PIN_GROUP(msiof1_ss1_d),
-+	SH_PFC_PIN_GROUP(msiof1_ss2_d),
-+	SH_PFC_PIN_GROUP(msiof1_txd_d),
-+	SH_PFC_PIN_GROUP(msiof1_rxd_d),
-+	SH_PFC_PIN_GROUP(msiof1_clk_e),
-+	SH_PFC_PIN_GROUP(msiof1_sync_e),
-+	SH_PFC_PIN_GROUP(msiof1_ss1_e),
-+	SH_PFC_PIN_GROUP(msiof1_ss2_e),
-+	SH_PFC_PIN_GROUP(msiof1_txd_e),
-+	SH_PFC_PIN_GROUP(msiof1_rxd_e),
-+	SH_PFC_PIN_GROUP(msiof1_clk_f),
-+	SH_PFC_PIN_GROUP(msiof1_sync_f),
-+	SH_PFC_PIN_GROUP(msiof1_ss1_f),
-+	SH_PFC_PIN_GROUP(msiof1_ss2_f),
-+	SH_PFC_PIN_GROUP(msiof1_txd_f),
-+	SH_PFC_PIN_GROUP(msiof1_rxd_f),
-+	SH_PFC_PIN_GROUP(msiof1_clk_g),
-+	SH_PFC_PIN_GROUP(msiof1_sync_g),
-+	SH_PFC_PIN_GROUP(msiof1_ss1_g),
-+	SH_PFC_PIN_GROUP(msiof1_ss2_g),
-+	SH_PFC_PIN_GROUP(msiof1_txd_g),
-+	SH_PFC_PIN_GROUP(msiof1_rxd_g),
-+	SH_PFC_PIN_GROUP(msiof2_clk_a),
-+	SH_PFC_PIN_GROUP(msiof2_sync_a),
-+	SH_PFC_PIN_GROUP(msiof2_ss1_a),
-+	SH_PFC_PIN_GROUP(msiof2_ss2_a),
-+	SH_PFC_PIN_GROUP(msiof2_txd_a),
-+	SH_PFC_PIN_GROUP(msiof2_rxd_a),
-+	SH_PFC_PIN_GROUP(msiof2_clk_b),
-+	SH_PFC_PIN_GROUP(msiof2_sync_b),
-+	SH_PFC_PIN_GROUP(msiof2_ss1_b),
-+	SH_PFC_PIN_GROUP(msiof2_ss2_b),
-+	SH_PFC_PIN_GROUP(msiof2_txd_b),
-+	SH_PFC_PIN_GROUP(msiof2_rxd_b),
-+	SH_PFC_PIN_GROUP(msiof2_clk_c),
-+	SH_PFC_PIN_GROUP(msiof2_sync_c),
-+	SH_PFC_PIN_GROUP(msiof2_ss1_c),
-+	SH_PFC_PIN_GROUP(msiof2_ss2_c),
-+	SH_PFC_PIN_GROUP(msiof2_txd_c),
-+	SH_PFC_PIN_GROUP(msiof2_rxd_c),
-+	SH_PFC_PIN_GROUP(msiof2_clk_d),
-+	SH_PFC_PIN_GROUP(msiof2_sync_d),
-+	SH_PFC_PIN_GROUP(msiof2_ss1_d),
-+	SH_PFC_PIN_GROUP(msiof2_ss2_d),
-+	SH_PFC_PIN_GROUP(msiof2_txd_d),
-+	SH_PFC_PIN_GROUP(msiof2_rxd_d),
-+	SH_PFC_PIN_GROUP(msiof3_clk_a),
-+	SH_PFC_PIN_GROUP(msiof3_sync_a),
-+	SH_PFC_PIN_GROUP(msiof3_ss1_a),
-+	SH_PFC_PIN_GROUP(msiof3_ss2_a),
-+	SH_PFC_PIN_GROUP(msiof3_txd_a),
-+	SH_PFC_PIN_GROUP(msiof3_rxd_a),
-+	SH_PFC_PIN_GROUP(msiof3_clk_b),
-+	SH_PFC_PIN_GROUP(msiof3_sync_b),
-+	SH_PFC_PIN_GROUP(msiof3_ss1_b),
-+	SH_PFC_PIN_GROUP(msiof3_ss2_b),
-+	SH_PFC_PIN_GROUP(msiof3_txd_b),
-+	SH_PFC_PIN_GROUP(msiof3_rxd_b),
-+	SH_PFC_PIN_GROUP(msiof3_clk_c),
-+	SH_PFC_PIN_GROUP(msiof3_sync_c),
-+	SH_PFC_PIN_GROUP(msiof3_txd_c),
-+	SH_PFC_PIN_GROUP(msiof3_rxd_c),
-+	SH_PFC_PIN_GROUP(msiof3_clk_d),
-+	SH_PFC_PIN_GROUP(msiof3_sync_d),
-+	SH_PFC_PIN_GROUP(msiof3_ss1_d),
-+	SH_PFC_PIN_GROUP(msiof3_txd_d),
-+	SH_PFC_PIN_GROUP(msiof3_rxd_d),
-+	SH_PFC_PIN_GROUP(pwm0),
-+	SH_PFC_PIN_GROUP(pwm1_a),
-+	SH_PFC_PIN_GROUP(pwm1_b),
-+	SH_PFC_PIN_GROUP(pwm2_a),
-+	SH_PFC_PIN_GROUP(pwm2_b),
-+	SH_PFC_PIN_GROUP(pwm3_a),
-+	SH_PFC_PIN_GROUP(pwm3_b),
-+	SH_PFC_PIN_GROUP(pwm4_a),
-+	SH_PFC_PIN_GROUP(pwm4_b),
-+	SH_PFC_PIN_GROUP(pwm5_a),
-+	SH_PFC_PIN_GROUP(pwm5_b),
-+	SH_PFC_PIN_GROUP(pwm6_a),
-+	SH_PFC_PIN_GROUP(pwm6_b),
-+	SH_PFC_PIN_GROUP(qspi0_ctrl),
-+	SH_PFC_PIN_GROUP(qspi0_data2),
-+	SH_PFC_PIN_GROUP(qspi0_data4),
-+	SH_PFC_PIN_GROUP(qspi1_ctrl),
-+	SH_PFC_PIN_GROUP(qspi1_data2),
-+	SH_PFC_PIN_GROUP(qspi1_data4),
-+	SH_PFC_PIN_GROUP(sata0_devslp_a),
-+	SH_PFC_PIN_GROUP(sata0_devslp_b),
-+	SH_PFC_PIN_GROUP(scif0_data),
-+	SH_PFC_PIN_GROUP(scif0_clk),
-+	SH_PFC_PIN_GROUP(scif0_ctrl),
-+	SH_PFC_PIN_GROUP(scif1_data_a),
-+	SH_PFC_PIN_GROUP(scif1_clk),
-+	SH_PFC_PIN_GROUP(scif1_ctrl),
-+	SH_PFC_PIN_GROUP(scif1_data_b),
-+	SH_PFC_PIN_GROUP(scif2_data_a),
-+	SH_PFC_PIN_GROUP(scif2_clk),
-+	SH_PFC_PIN_GROUP(scif2_data_b),
-+	SH_PFC_PIN_GROUP(scif3_data_a),
-+	SH_PFC_PIN_GROUP(scif3_clk),
-+	SH_PFC_PIN_GROUP(scif3_ctrl),
-+	SH_PFC_PIN_GROUP(scif3_data_b),
-+	SH_PFC_PIN_GROUP(scif4_data_a),
-+	SH_PFC_PIN_GROUP(scif4_clk_a),
-+	SH_PFC_PIN_GROUP(scif4_ctrl_a),
-+	SH_PFC_PIN_GROUP(scif4_data_b),
-+	SH_PFC_PIN_GROUP(scif4_clk_b),
-+	SH_PFC_PIN_GROUP(scif4_ctrl_b),
-+	SH_PFC_PIN_GROUP(scif4_data_c),
-+	SH_PFC_PIN_GROUP(scif4_clk_c),
-+	SH_PFC_PIN_GROUP(scif4_ctrl_c),
-+	SH_PFC_PIN_GROUP(scif5_data),
-+	SH_PFC_PIN_GROUP(scif5_clk),
-+	SH_PFC_PIN_GROUP(scif_clk_a),
-+	SH_PFC_PIN_GROUP(scif_clk_b),
-+	SH_PFC_PIN_GROUP(sdhi0_data1),
-+	SH_PFC_PIN_GROUP(sdhi0_data4),
-+	SH_PFC_PIN_GROUP(sdhi0_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi0_cd),
-+	SH_PFC_PIN_GROUP(sdhi0_wp),
-+	SH_PFC_PIN_GROUP(sdhi1_data1),
-+	SH_PFC_PIN_GROUP(sdhi1_data4),
-+	SH_PFC_PIN_GROUP(sdhi1_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi1_cd),
-+	SH_PFC_PIN_GROUP(sdhi1_wp),
-+	SH_PFC_PIN_GROUP(sdhi2_data1),
-+	SH_PFC_PIN_GROUP(sdhi2_data4),
-+	SH_PFC_PIN_GROUP(sdhi2_data8),
-+	SH_PFC_PIN_GROUP(sdhi2_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi2_cd_a),
-+	SH_PFC_PIN_GROUP(sdhi2_wp_a),
-+	SH_PFC_PIN_GROUP(sdhi2_cd_b),
-+	SH_PFC_PIN_GROUP(sdhi2_wp_b),
-+	SH_PFC_PIN_GROUP(sdhi2_ds),
-+	SH_PFC_PIN_GROUP(sdhi3_data1),
-+	SH_PFC_PIN_GROUP(sdhi3_data4),
-+	SH_PFC_PIN_GROUP(sdhi3_data8),
-+	SH_PFC_PIN_GROUP(sdhi3_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi3_cd),
-+	SH_PFC_PIN_GROUP(sdhi3_wp),
-+	SH_PFC_PIN_GROUP(sdhi3_ds),
-+	SH_PFC_PIN_GROUP(ssi0_data),
-+	SH_PFC_PIN_GROUP(ssi01239_ctrl),
-+	SH_PFC_PIN_GROUP(ssi1_data_a),
-+	SH_PFC_PIN_GROUP(ssi1_data_b),
-+	SH_PFC_PIN_GROUP(ssi1_ctrl_a),
-+	SH_PFC_PIN_GROUP(ssi1_ctrl_b),
-+	SH_PFC_PIN_GROUP(ssi2_data_a),
-+	SH_PFC_PIN_GROUP(ssi2_data_b),
-+	SH_PFC_PIN_GROUP(ssi2_ctrl_a),
-+	SH_PFC_PIN_GROUP(ssi2_ctrl_b),
-+	SH_PFC_PIN_GROUP(ssi3_data),
-+	SH_PFC_PIN_GROUP(ssi34_ctrl),
-+	SH_PFC_PIN_GROUP(ssi4_data),
-+	SH_PFC_PIN_GROUP(ssi4_ctrl),
-+	SH_PFC_PIN_GROUP(ssi5_data),
-+	SH_PFC_PIN_GROUP(ssi5_ctrl),
-+	SH_PFC_PIN_GROUP(ssi6_data),
-+	SH_PFC_PIN_GROUP(ssi6_ctrl),
-+	SH_PFC_PIN_GROUP(ssi7_data),
-+	SH_PFC_PIN_GROUP(ssi78_ctrl),
-+	SH_PFC_PIN_GROUP(ssi8_data),
-+	SH_PFC_PIN_GROUP(ssi9_data_a),
-+	SH_PFC_PIN_GROUP(ssi9_data_b),
-+	SH_PFC_PIN_GROUP(ssi9_ctrl_a),
-+	SH_PFC_PIN_GROUP(ssi9_ctrl_b),
-+	SH_PFC_PIN_GROUP(usb0),
-+	SH_PFC_PIN_GROUP(usb1),
-+	SH_PFC_PIN_GROUP(usb2),
-+};
-+
-+static const char * const audio_clk_groups[] = {
-+	"audio_clk_a_a",
-+	"audio_clk_a_b",
-+	"audio_clk_a_c",
-+	"audio_clk_b_a",
-+	"audio_clk_b_b",
-+	"audio_clk_c_a",
-+	"audio_clk_c_b",
-+	"audio_clkout_a",
-+	"audio_clkout_b",
-+	"audio_clkout_c",
-+	"audio_clkout_d",
-+	"audio_clkout1_a",
-+	"audio_clkout1_b",
-+	"audio_clkout2_a",
-+	"audio_clkout2_b",
-+	"audio_clkout3_a",
-+	"audio_clkout3_b",
-+};
-+
-+static const char * const avb_groups[] = {
-+	"avb_link",
-+	"avb_magic",
-+	"avb_phy_int",
-+	"avb_mdc",
-+	"avb_mii",
-+	"avb_avtp_pps",
-+	"avb_avtp_match_a",
-+	"avb_avtp_capture_a",
-+	"avb_avtp_match_b",
-+	"avb_avtp_capture_b",
-+};
-+
-+static const char * const can0_groups[] = {
-+	"can0_data_a",
-+	"can0_data_b",
-+};
-+
-+static const char * const can1_groups[] = {
-+	"can1_data",
-+};
-+
-+static const char * const can_clk_groups[] = {
-+	"can_clk",
-+};
-+
-+static const char * const canfd0_groups[] = {
-+	"canfd0_data_a",
-+	"canfd0_data_b",
-+};
-+
-+static const char * const canfd1_groups[] = {
-+	"canfd1_data",
-+};
-+
-+static const char * const drif0_groups[] = {
-+	"drif0_ctrl_a",
-+	"drif0_data0_a",
-+	"drif0_data1_a",
-+	"drif0_ctrl_b",
-+	"drif0_data0_b",
-+	"drif0_data1_b",
-+	"drif0_ctrl_c",
-+	"drif0_data0_c",
-+	"drif0_data1_c",
-+};
-+
-+static const char * const drif1_groups[] = {
-+	"drif1_ctrl_a",
-+	"drif1_data0_a",
-+	"drif1_data1_a",
-+	"drif1_ctrl_b",
-+	"drif1_data0_b",
-+	"drif1_data1_b",
-+	"drif1_ctrl_c",
-+	"drif1_data0_c",
-+	"drif1_data1_c",
-+};
-+
-+static const char * const drif2_groups[] = {
-+	"drif2_ctrl_a",
-+	"drif2_data0_a",
-+	"drif2_data1_a",
-+	"drif2_ctrl_b",
-+	"drif2_data0_b",
-+	"drif2_data1_b",
-+};
-+
-+static const char * const drif3_groups[] = {
-+	"drif3_ctrl_a",
-+	"drif3_data0_a",
-+	"drif3_data1_a",
-+	"drif3_ctrl_b",
-+	"drif3_data0_b",
-+	"drif3_data1_b",
-+};
-+
-+static const char * const du_groups[] = {
-+	"du_rgb666",
-+	"du_rgb888",
-+	"du_clk_out_0",
-+	"du_clk_out_1",
-+	"du_sync",
-+	"du_oddf",
-+	"du_cde",
-+	"du_disp",
-+};
-+
-+static const char * const hscif0_groups[] = {
-+	"hscif0_data",
-+	"hscif0_clk",
-+	"hscif0_ctrl",
-+};
-+
-+static const char * const hscif1_groups[] = {
-+	"hscif1_data_a",
-+	"hscif1_clk_a",
-+	"hscif1_ctrl_a",
-+	"hscif1_data_b",
-+	"hscif1_clk_b",
-+	"hscif1_ctrl_b",
-+};
-+
-+static const char * const hscif2_groups[] = {
-+	"hscif2_data_a",
-+	"hscif2_clk_a",
-+	"hscif2_ctrl_a",
-+	"hscif2_data_b",
-+	"hscif2_clk_b",
-+	"hscif2_ctrl_b",
-+};
-+
-+static const char * const hscif3_groups[] = {
-+	"hscif3_data_a",
-+	"hscif3_clk",
-+	"hscif3_ctrl",
-+	"hscif3_data_b",
-+	"hscif3_data_c",
-+	"hscif3_data_d",
-+};
-+
-+static const char * const hscif4_groups[] = {
-+	"hscif4_data_a",
-+	"hscif4_clk",
-+	"hscif4_ctrl",
-+	"hscif4_data_b",
-+};
-+
-+static const char * const i2c1_groups[] = {
-+	"i2c1_a",
-+	"i2c1_b",
-+};
-+
-+static const char * const i2c2_groups[] = {
-+	"i2c2_a",
-+	"i2c2_b",
-+};
-+
-+static const char * const i2c6_groups[] = {
-+	"i2c6_a",
-+	"i2c6_b",
-+	"i2c6_c",
-+};
-+
-+static const char * const intc_ex_groups[] = {
-+	"intc_ex_irq0",
-+	"intc_ex_irq1",
-+	"intc_ex_irq2",
-+	"intc_ex_irq3",
-+	"intc_ex_irq4",
-+	"intc_ex_irq5",
-+};
-+
-+static const char * const msiof0_groups[] = {
-+	"msiof0_clk",
-+	"msiof0_sync",
-+	"msiof0_ss1",
-+	"msiof0_ss2",
-+	"msiof0_txd",
-+	"msiof0_rxd",
-+};
-+
-+static const char * const msiof1_groups[] = {
-+	"msiof1_clk_a",
-+	"msiof1_sync_a",
-+	"msiof1_ss1_a",
-+	"msiof1_ss2_a",
-+	"msiof1_txd_a",
-+	"msiof1_rxd_a",
-+	"msiof1_clk_b",
-+	"msiof1_sync_b",
-+	"msiof1_ss1_b",
-+	"msiof1_ss2_b",
-+	"msiof1_txd_b",
-+	"msiof1_rxd_b",
-+	"msiof1_clk_c",
-+	"msiof1_sync_c",
-+	"msiof1_ss1_c",
-+	"msiof1_ss2_c",
-+	"msiof1_txd_c",
-+	"msiof1_rxd_c",
-+	"msiof1_clk_d",
-+	"msiof1_sync_d",
-+	"msiof1_ss1_d",
-+	"msiof1_ss2_d",
-+	"msiof1_txd_d",
-+	"msiof1_rxd_d",
-+	"msiof1_clk_e",
-+	"msiof1_sync_e",
-+	"msiof1_ss1_e",
-+	"msiof1_ss2_e",
-+	"msiof1_txd_e",
-+	"msiof1_rxd_e",
-+	"msiof1_clk_f",
-+	"msiof1_sync_f",
-+	"msiof1_ss1_f",
-+	"msiof1_ss2_f",
-+	"msiof1_txd_f",
-+	"msiof1_rxd_f",
-+	"msiof1_clk_g",
-+	"msiof1_sync_g",
-+	"msiof1_ss1_g",
-+	"msiof1_ss2_g",
-+	"msiof1_txd_g",
-+	"msiof1_rxd_g",
-+};
-+
-+static const char * const msiof2_groups[] = {
-+	"msiof2_clk_a",
-+	"msiof2_sync_a",
-+	"msiof2_ss1_a",
-+	"msiof2_ss2_a",
-+	"msiof2_txd_a",
-+	"msiof2_rxd_a",
-+	"msiof2_clk_b",
-+	"msiof2_sync_b",
-+	"msiof2_ss1_b",
-+	"msiof2_ss2_b",
-+	"msiof2_txd_b",
-+	"msiof2_rxd_b",
-+	"msiof2_clk_c",
-+	"msiof2_sync_c",
-+	"msiof2_ss1_c",
-+	"msiof2_ss2_c",
-+	"msiof2_txd_c",
-+	"msiof2_rxd_c",
-+	"msiof2_clk_d",
-+	"msiof2_sync_d",
-+	"msiof2_ss1_d",
-+	"msiof2_ss2_d",
-+	"msiof2_txd_d",
-+	"msiof2_rxd_d",
-+};
-+
-+static const char * const msiof3_groups[] = {
-+	"msiof3_clk_a",
-+	"msiof3_sync_a",
-+	"msiof3_ss1_a",
-+	"msiof3_ss2_a",
-+	"msiof3_txd_a",
-+	"msiof3_rxd_a",
-+	"msiof3_clk_b",
-+	"msiof3_sync_b",
-+	"msiof3_ss1_b",
-+	"msiof3_ss2_b",
-+	"msiof3_txd_b",
-+	"msiof3_rxd_b",
-+	"msiof3_clk_c",
-+	"msiof3_sync_c",
-+	"msiof3_txd_c",
-+	"msiof3_rxd_c",
-+	"msiof3_clk_d",
-+	"msiof3_sync_d",
-+	"msiof3_ss1_d",
-+	"msiof3_txd_d",
-+	"msiof3_rxd_d",
-+};
-+
-+static const char * const pwm0_groups[] = {
-+	"pwm0",
-+};
-+
-+static const char * const pwm1_groups[] = {
-+	"pwm1_a",
-+	"pwm1_b",
-+};
-+
-+static const char * const pwm2_groups[] = {
-+	"pwm2_a",
-+	"pwm2_b",
-+};
-+
-+static const char * const pwm3_groups[] = {
-+	"pwm3_a",
-+	"pwm3_b",
-+};
-+
-+static const char * const pwm4_groups[] = {
-+	"pwm4_a",
-+	"pwm4_b",
-+};
-+
-+static const char * const pwm5_groups[] = {
-+	"pwm5_a",
-+	"pwm5_b",
-+};
-+
-+static const char * const pwm6_groups[] = {
-+	"pwm6_a",
-+	"pwm6_b",
-+};
-+
-+static const char * const qspi0_groups[] = {
-+	"qspi0_ctrl",
-+	"qspi0_data2",
-+	"qspi0_data4",
-+};
-+
-+static const char * const qspi1_groups[] = {
-+	"qspi1_ctrl",
-+	"qspi1_data2",
-+	"qspi1_data4",
-+};
-+
-+static const char * const sata0_groups[] = {
-+	"sata0_devslp_a",
-+	"sata0_devslp_b",
-+};
-+
-+static const char * const scif0_groups[] = {
-+	"scif0_data",
-+	"scif0_clk",
-+	"scif0_ctrl",
-+};
-+
-+static const char * const scif1_groups[] = {
-+	"scif1_data_a",
-+	"scif1_clk",
-+	"scif1_ctrl",
-+	"scif1_data_b",
-+};
-+
-+static const char * const scif2_groups[] = {
-+	"scif2_data_a",
-+	"scif2_clk",
-+	"scif2_data_b",
-+};
-+
-+static const char * const scif3_groups[] = {
-+	"scif3_data_a",
-+	"scif3_clk",
-+	"scif3_ctrl",
-+	"scif3_data_b",
-+};
-+
-+static const char * const scif4_groups[] = {
-+	"scif4_data_a",
-+	"scif4_clk_a",
-+	"scif4_ctrl_a",
-+	"scif4_data_b",
-+	"scif4_clk_b",
-+	"scif4_ctrl_b",
-+	"scif4_data_c",
-+	"scif4_clk_c",
-+	"scif4_ctrl_c",
-+};
-+
-+static const char * const scif5_groups[] = {
-+	"scif5_data",
-+	"scif5_clk",
-+};
-+
-+static const char * const scif_clk_groups[] = {
-+	"scif_clk_a",
-+	"scif_clk_b",
-+};
-+
-+static const char * const sdhi0_groups[] = {
-+	"sdhi0_data1",
-+	"sdhi0_data4",
-+	"sdhi0_ctrl",
-+	"sdhi0_cd",
-+	"sdhi0_wp",
-+};
-+
-+static const char * const sdhi1_groups[] = {
-+	"sdhi1_data1",
-+	"sdhi1_data4",
-+	"sdhi1_ctrl",
-+	"sdhi1_cd",
-+	"sdhi1_wp",
-+};
-+
-+static const char * const sdhi2_groups[] = {
-+	"sdhi2_data1",
-+	"sdhi2_data4",
-+	"sdhi2_data8",
-+	"sdhi2_ctrl",
-+	"sdhi2_cd_a",
-+	"sdhi2_wp_a",
-+	"sdhi2_cd_b",
-+	"sdhi2_wp_b",
-+	"sdhi2_ds",
-+};
-+
-+static const char * const sdhi3_groups[] = {
-+	"sdhi3_data1",
-+	"sdhi3_data4",
-+	"sdhi3_data8",
-+	"sdhi3_ctrl",
-+	"sdhi3_cd",
-+	"sdhi3_wp",
-+	"sdhi3_ds",
-+};
-+
-+static const char * const ssi_groups[] = {
-+	"ssi0_data",
-+	"ssi01239_ctrl",
-+	"ssi1_data_a",
-+	"ssi1_data_b",
-+	"ssi1_ctrl_a",
-+	"ssi1_ctrl_b",
-+	"ssi2_data_a",
-+	"ssi2_data_b",
-+	"ssi2_ctrl_a",
-+	"ssi2_ctrl_b",
-+	"ssi3_data",
-+	"ssi34_ctrl",
-+	"ssi4_data",
-+	"ssi4_ctrl",
-+	"ssi5_data",
-+	"ssi5_ctrl",
-+	"ssi6_data",
-+	"ssi6_ctrl",
-+	"ssi7_data",
-+	"ssi78_ctrl",
-+	"ssi8_data",
-+	"ssi9_data_a",
-+	"ssi9_data_b",
-+	"ssi9_ctrl_a",
-+	"ssi9_ctrl_b",
-+};
-+
-+static const char * const usb0_groups[] = {
-+	"usb0",
-+};
-+
-+static const char * const usb1_groups[] = {
-+	"usb1",
-+};
-+
-+static const char * const usb2_groups[] = {
-+	"usb2",
-+};
-+
-+static const struct sh_pfc_function pinmux_functions[] = {
-+	SH_PFC_FUNCTION(audio_clk),
-+	SH_PFC_FUNCTION(avb),
-+	SH_PFC_FUNCTION(can0),
-+	SH_PFC_FUNCTION(can1),
-+	SH_PFC_FUNCTION(can_clk),
-+	SH_PFC_FUNCTION(canfd0),
-+	SH_PFC_FUNCTION(canfd1),
-+	SH_PFC_FUNCTION(drif0),
-+	SH_PFC_FUNCTION(drif1),
-+	SH_PFC_FUNCTION(drif2),
-+	SH_PFC_FUNCTION(drif3),
-+	SH_PFC_FUNCTION(du),
-+	SH_PFC_FUNCTION(hscif0),
-+	SH_PFC_FUNCTION(hscif1),
-+	SH_PFC_FUNCTION(hscif2),
-+	SH_PFC_FUNCTION(hscif3),
-+	SH_PFC_FUNCTION(hscif4),
-+	SH_PFC_FUNCTION(i2c1),
-+	SH_PFC_FUNCTION(i2c2),
-+	SH_PFC_FUNCTION(i2c6),
-+	SH_PFC_FUNCTION(intc_ex),
-+	SH_PFC_FUNCTION(msiof0),
-+	SH_PFC_FUNCTION(msiof1),
-+	SH_PFC_FUNCTION(msiof2),
-+	SH_PFC_FUNCTION(msiof3),
-+	SH_PFC_FUNCTION(pwm0),
-+	SH_PFC_FUNCTION(pwm1),
-+	SH_PFC_FUNCTION(pwm2),
-+	SH_PFC_FUNCTION(pwm3),
-+	SH_PFC_FUNCTION(pwm4),
-+	SH_PFC_FUNCTION(pwm5),
-+	SH_PFC_FUNCTION(pwm6),
-+	SH_PFC_FUNCTION(qspi0),
-+	SH_PFC_FUNCTION(qspi1),
-+	SH_PFC_FUNCTION(sata0),
-+	SH_PFC_FUNCTION(scif0),
-+	SH_PFC_FUNCTION(scif1),
-+	SH_PFC_FUNCTION(scif2),
-+	SH_PFC_FUNCTION(scif3),
-+	SH_PFC_FUNCTION(scif4),
-+	SH_PFC_FUNCTION(scif5),
-+	SH_PFC_FUNCTION(scif_clk),
-+	SH_PFC_FUNCTION(sdhi0),
-+	SH_PFC_FUNCTION(sdhi1),
-+	SH_PFC_FUNCTION(sdhi2),
-+	SH_PFC_FUNCTION(sdhi3),
-+	SH_PFC_FUNCTION(ssi),
-+	SH_PFC_FUNCTION(usb0),
-+	SH_PFC_FUNCTION(usb1),
-+	SH_PFC_FUNCTION(usb2),
-+};
-+
-+static const struct pinmux_cfg_reg pinmux_config_regs[] = {
-+#define F_(x, y)	FN_##y
-+#define FM(x)		FN_##x
-+	{ PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1) {
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		GP_0_15_FN,	GPSR0_15,
-+		GP_0_14_FN,	GPSR0_14,
-+		GP_0_13_FN,	GPSR0_13,
-+		GP_0_12_FN,	GPSR0_12,
-+		GP_0_11_FN,	GPSR0_11,
-+		GP_0_10_FN,	GPSR0_10,
-+		GP_0_9_FN,	GPSR0_9,
-+		GP_0_8_FN,	GPSR0_8,
-+		GP_0_7_FN,	GPSR0_7,
-+		GP_0_6_FN,	GPSR0_6,
-+		GP_0_5_FN,	GPSR0_5,
-+		GP_0_4_FN,	GPSR0_4,
-+		GP_0_3_FN,	GPSR0_3,
-+		GP_0_2_FN,	GPSR0_2,
-+		GP_0_1_FN,	GPSR0_1,
-+		GP_0_0_FN,	GPSR0_0, }
-+	},
-+	{ PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1) {
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		GP_1_27_FN,	GPSR1_27,
-+		GP_1_26_FN,	GPSR1_26,
-+		GP_1_25_FN,	GPSR1_25,
-+		GP_1_24_FN,	GPSR1_24,
-+		GP_1_23_FN,	GPSR1_23,
-+		GP_1_22_FN,	GPSR1_22,
-+		GP_1_21_FN,	GPSR1_21,
-+		GP_1_20_FN,	GPSR1_20,
-+		GP_1_19_FN,	GPSR1_19,
-+		GP_1_18_FN,	GPSR1_18,
-+		GP_1_17_FN,	GPSR1_17,
-+		GP_1_16_FN,	GPSR1_16,
-+		GP_1_15_FN,	GPSR1_15,
-+		GP_1_14_FN,	GPSR1_14,
-+		GP_1_13_FN,	GPSR1_13,
-+		GP_1_12_FN,	GPSR1_12,
-+		GP_1_11_FN,	GPSR1_11,
-+		GP_1_10_FN,	GPSR1_10,
-+		GP_1_9_FN,	GPSR1_9,
-+		GP_1_8_FN,	GPSR1_8,
-+		GP_1_7_FN,	GPSR1_7,
-+		GP_1_6_FN,	GPSR1_6,
-+		GP_1_5_FN,	GPSR1_5,
-+		GP_1_4_FN,	GPSR1_4,
-+		GP_1_3_FN,	GPSR1_3,
-+		GP_1_2_FN,	GPSR1_2,
-+		GP_1_1_FN,	GPSR1_1,
-+		GP_1_0_FN,	GPSR1_0, }
-+	},
-+	{ PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1) {
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		GP_2_14_FN,	GPSR2_14,
-+		GP_2_13_FN,	GPSR2_13,
-+		GP_2_12_FN,	GPSR2_12,
-+		GP_2_11_FN,	GPSR2_11,
-+		GP_2_10_FN,	GPSR2_10,
-+		GP_2_9_FN,	GPSR2_9,
-+		GP_2_8_FN,	GPSR2_8,
-+		GP_2_7_FN,	GPSR2_7,
-+		GP_2_6_FN,	GPSR2_6,
-+		GP_2_5_FN,	GPSR2_5,
-+		GP_2_4_FN,	GPSR2_4,
-+		GP_2_3_FN,	GPSR2_3,
-+		GP_2_2_FN,	GPSR2_2,
-+		GP_2_1_FN,	GPSR2_1,
-+		GP_2_0_FN,	GPSR2_0, }
-+	},
-+	{ PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1) {
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		GP_3_15_FN,	GPSR3_15,
-+		GP_3_14_FN,	GPSR3_14,
-+		GP_3_13_FN,	GPSR3_13,
-+		GP_3_12_FN,	GPSR3_12,
-+		GP_3_11_FN,	GPSR3_11,
-+		GP_3_10_FN,	GPSR3_10,
-+		GP_3_9_FN,	GPSR3_9,
-+		GP_3_8_FN,	GPSR3_8,
-+		GP_3_7_FN,	GPSR3_7,
-+		GP_3_6_FN,	GPSR3_6,
-+		GP_3_5_FN,	GPSR3_5,
-+		GP_3_4_FN,	GPSR3_4,
-+		GP_3_3_FN,	GPSR3_3,
-+		GP_3_2_FN,	GPSR3_2,
-+		GP_3_1_FN,	GPSR3_1,
-+		GP_3_0_FN,	GPSR3_0, }
-+	},
-+	{ PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1) {
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		GP_4_17_FN,	GPSR4_17,
-+		GP_4_16_FN,	GPSR4_16,
-+		GP_4_15_FN,	GPSR4_15,
-+		GP_4_14_FN,	GPSR4_14,
-+		GP_4_13_FN,	GPSR4_13,
-+		GP_4_12_FN,	GPSR4_12,
-+		GP_4_11_FN,	GPSR4_11,
-+		GP_4_10_FN,	GPSR4_10,
-+		GP_4_9_FN,	GPSR4_9,
-+		GP_4_8_FN,	GPSR4_8,
-+		GP_4_7_FN,	GPSR4_7,
-+		GP_4_6_FN,	GPSR4_6,
-+		GP_4_5_FN,	GPSR4_5,
-+		GP_4_4_FN,	GPSR4_4,
-+		GP_4_3_FN,	GPSR4_3,
-+		GP_4_2_FN,	GPSR4_2,
-+		GP_4_1_FN,	GPSR4_1,
-+		GP_4_0_FN,	GPSR4_0, }
-+	},
-+	{ PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1) {
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		GP_5_25_FN,	GPSR5_25,
-+		GP_5_24_FN,	GPSR5_24,
-+		GP_5_23_FN,	GPSR5_23,
-+		GP_5_22_FN,	GPSR5_22,
-+		GP_5_21_FN,	GPSR5_21,
-+		GP_5_20_FN,	GPSR5_20,
-+		GP_5_19_FN,	GPSR5_19,
-+		GP_5_18_FN,	GPSR5_18,
-+		GP_5_17_FN,	GPSR5_17,
-+		GP_5_16_FN,	GPSR5_16,
-+		GP_5_15_FN,	GPSR5_15,
-+		GP_5_14_FN,	GPSR5_14,
-+		GP_5_13_FN,	GPSR5_13,
-+		GP_5_12_FN,	GPSR5_12,
-+		GP_5_11_FN,	GPSR5_11,
-+		GP_5_10_FN,	GPSR5_10,
-+		GP_5_9_FN,	GPSR5_9,
-+		GP_5_8_FN,	GPSR5_8,
-+		GP_5_7_FN,	GPSR5_7,
-+		GP_5_6_FN,	GPSR5_6,
-+		GP_5_5_FN,	GPSR5_5,
-+		GP_5_4_FN,	GPSR5_4,
-+		GP_5_3_FN,	GPSR5_3,
-+		GP_5_2_FN,	GPSR5_2,
-+		GP_5_1_FN,	GPSR5_1,
-+		GP_5_0_FN,	GPSR5_0, }
-+	},
-+	{ PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1) {
-+		GP_6_31_FN,	GPSR6_31,
-+		GP_6_30_FN,	GPSR6_30,
-+		GP_6_29_FN,	GPSR6_29,
-+		GP_6_28_FN,	GPSR6_28,
-+		GP_6_27_FN,	GPSR6_27,
-+		GP_6_26_FN,	GPSR6_26,
-+		GP_6_25_FN,	GPSR6_25,
-+		GP_6_24_FN,	GPSR6_24,
-+		GP_6_23_FN,	GPSR6_23,
-+		GP_6_22_FN,	GPSR6_22,
-+		GP_6_21_FN,	GPSR6_21,
-+		GP_6_20_FN,	GPSR6_20,
-+		GP_6_19_FN,	GPSR6_19,
-+		GP_6_18_FN,	GPSR6_18,
-+		GP_6_17_FN,	GPSR6_17,
-+		GP_6_16_FN,	GPSR6_16,
-+		GP_6_15_FN,	GPSR6_15,
-+		GP_6_14_FN,	GPSR6_14,
-+		GP_6_13_FN,	GPSR6_13,
-+		GP_6_12_FN,	GPSR6_12,
-+		GP_6_11_FN,	GPSR6_11,
-+		GP_6_10_FN,	GPSR6_10,
-+		GP_6_9_FN,	GPSR6_9,
-+		GP_6_8_FN,	GPSR6_8,
-+		GP_6_7_FN,	GPSR6_7,
-+		GP_6_6_FN,	GPSR6_6,
-+		GP_6_5_FN,	GPSR6_5,
-+		GP_6_4_FN,	GPSR6_4,
-+		GP_6_3_FN,	GPSR6_3,
-+		GP_6_2_FN,	GPSR6_2,
-+		GP_6_1_FN,	GPSR6_1,
-+		GP_6_0_FN,	GPSR6_0, }
-+	},
-+	{ PINMUX_CFG_REG("GPSR7", 0xe606011c, 32, 1) {
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		GP_7_3_FN, GPSR7_3,
-+		GP_7_2_FN, GPSR7_2,
-+		GP_7_1_FN, GPSR7_1,
-+		GP_7_0_FN, GPSR7_0, }
-+	},
-+#undef F_
-+#undef FM
-+
-+#define F_(x, y)	x,
-+#define FM(x)		FN_##x,
-+	{ PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4) {
-+		IP0_31_28
-+		IP0_27_24
-+		IP0_23_20
-+		IP0_19_16
-+		IP0_15_12
-+		IP0_11_8
-+		IP0_7_4
-+		IP0_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4) {
-+		IP1_31_28
-+		IP1_27_24
-+		IP1_23_20
-+		IP1_19_16
-+		IP1_15_12
-+		IP1_11_8
-+		IP1_7_4
-+		IP1_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4) {
-+		IP2_31_28
-+		IP2_27_24
-+		IP2_23_20
-+		IP2_19_16
-+		IP2_15_12
-+		IP2_11_8
-+		IP2_7_4
-+		IP2_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4) {
-+		IP3_31_28
-+		IP3_27_24
-+		IP3_23_20
-+		IP3_19_16
-+		IP3_15_12
-+		IP3_11_8
-+		IP3_7_4
-+		IP3_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR4", 0xe6060210, 32, 4) {
-+		IP4_31_28
-+		IP4_27_24
-+		IP4_23_20
-+		IP4_19_16
-+		IP4_15_12
-+		IP4_11_8
-+		IP4_7_4
-+		IP4_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR5", 0xe6060214, 32, 4) {
-+		IP5_31_28
-+		IP5_27_24
-+		IP5_23_20
-+		IP5_19_16
-+		IP5_15_12
-+		IP5_11_8
-+		IP5_7_4
-+		IP5_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR6", 0xe6060218, 32, 4) {
-+		IP6_31_28
-+		IP6_27_24
-+		IP6_23_20
-+		IP6_19_16
-+		IP6_15_12
-+		IP6_11_8
-+		IP6_7_4
-+		IP6_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR7", 0xe606021c, 32, 4) {
-+		IP7_31_28
-+		IP7_27_24
-+		IP7_23_20
-+		IP7_19_16
-+		IP7_15_12
-+		IP7_11_8
-+		IP7_7_4
-+		IP7_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR8", 0xe6060220, 32, 4) {
-+		IP8_31_28
-+		IP8_27_24
-+		IP8_23_20
-+		IP8_19_16
-+		IP8_15_12
-+		IP8_11_8
-+		IP8_7_4
-+		IP8_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR9", 0xe6060224, 32, 4) {
-+		IP9_31_28
-+		IP9_27_24
-+		IP9_23_20
-+		IP9_19_16
-+		IP9_15_12
-+		IP9_11_8
-+		IP9_7_4
-+		IP9_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR10", 0xe6060228, 32, 4) {
-+		IP10_31_28
-+		IP10_27_24
-+		IP10_23_20
-+		IP10_19_16
-+		IP10_15_12
-+		IP10_11_8
-+		IP10_7_4
-+		IP10_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR11", 0xe606022c, 32, 4) {
-+		IP11_31_28
-+		IP11_27_24
-+		IP11_23_20
-+		IP11_19_16
-+		IP11_15_12
-+		IP11_11_8
-+		IP11_7_4
-+		IP11_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR12", 0xe6060230, 32, 4) {
-+		IP12_31_28
-+		IP12_27_24
-+		IP12_23_20
-+		IP12_19_16
-+		IP12_15_12
-+		IP12_11_8
-+		IP12_7_4
-+		IP12_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR13", 0xe6060234, 32, 4) {
-+		IP13_31_28
-+		IP13_27_24
-+		IP13_23_20
-+		IP13_19_16
-+		IP13_15_12
-+		IP13_11_8
-+		IP13_7_4
-+		IP13_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR14", 0xe6060238, 32, 4) {
-+		IP14_31_28
-+		IP14_27_24
-+		IP14_23_20
-+		IP14_19_16
-+		IP14_15_12
-+		IP14_11_8
-+		IP14_7_4
-+		IP14_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR15", 0xe606023c, 32, 4) {
-+		IP15_31_28
-+		IP15_27_24
-+		IP15_23_20
-+		IP15_19_16
-+		IP15_15_12
-+		IP15_11_8
-+		IP15_7_4
-+		IP15_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR16", 0xe6060240, 32, 4) {
-+		IP16_31_28
-+		IP16_27_24
-+		IP16_23_20
-+		IP16_19_16
-+		IP16_15_12
-+		IP16_11_8
-+		IP16_7_4
-+		IP16_3_0 }
-+	},
-+	{ PINMUX_CFG_REG("IPSR17", 0xe6060244, 32, 4) {
-+		/* IP17_31_28 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP17_27_24 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP17_23_20 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP17_19_16 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP17_15_12 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP17_11_8  */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		IP17_7_4
-+		IP17_3_0 }
-+	},
-+#undef F_
-+#undef FM
-+
-+#define F_(x, y)	x,
-+#define FM(x)		FN_##x,
-+	{ PINMUX_CFG_REG_VAR("MOD_SEL0", 0xe6060500, 32,
-+			     1, 2, 2, 3, 1, 1, 2, 1, 1, 1,
-+			     2, 1, 1, 1, 1, 1, 1, 1, 2, 2, 1, 2, 1) {
-+		0, 0, /* RESERVED 31 */
-+		MOD_SEL0_30_29
-+		MOD_SEL0_28_27
-+		MOD_SEL0_26_25_24
-+		MOD_SEL0_23
-+		MOD_SEL0_22
-+		MOD_SEL0_21_20
-+		MOD_SEL0_19
-+		MOD_SEL0_18
-+		MOD_SEL0_17
-+		MOD_SEL0_16_15
-+		MOD_SEL0_14
-+		MOD_SEL0_13
-+		MOD_SEL0_12
-+		MOD_SEL0_11
-+		MOD_SEL0_10
-+		MOD_SEL0_9
-+		MOD_SEL0_8
-+		MOD_SEL0_7_6
-+		MOD_SEL0_5_4
-+		MOD_SEL0_3
-+		MOD_SEL0_2_1
-+		0, 0, /* RESERVED 0 */ }
-+	},
-+	{ PINMUX_CFG_REG_VAR("MOD_SEL1", 0xe6060504, 32,
-+			     2, 3, 1, 2, 3, 1, 1, 2, 1,
-+			     2, 1, 1, 1, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1) {
-+		MOD_SEL1_31_30
-+		MOD_SEL1_29_28_27
-+		MOD_SEL1_26
-+		MOD_SEL1_25_24
-+		MOD_SEL1_23_22_21
-+		MOD_SEL1_20
-+		MOD_SEL1_19
-+		MOD_SEL1_18_17
-+		MOD_SEL1_16
-+		MOD_SEL1_15_14
-+		MOD_SEL1_13
-+		MOD_SEL1_12
-+		MOD_SEL1_11
-+		MOD_SEL1_10
-+		MOD_SEL1_9
-+		0, 0, 0, 0, /* RESERVED 8, 7 */
-+		MOD_SEL1_6
-+		MOD_SEL1_5
-+		MOD_SEL1_4
-+		MOD_SEL1_3
-+		MOD_SEL1_2
-+		MOD_SEL1_1
-+		MOD_SEL1_0 }
-+	},
-+	{ PINMUX_CFG_REG_VAR("MOD_SEL2", 0xe6060508, 32,
-+			     1, 1, 1, 1, 4, 4, 4,
-+			     4, 4, 4, 1, 2, 1) {
-+		MOD_SEL2_31
-+		MOD_SEL2_30
-+		MOD_SEL2_29
-+		/* RESERVED 28 */
-+		0, 0,
-+		/* RESERVED 27, 26, 25, 24 */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* RESERVED 23, 22, 21, 20 */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* RESERVED 19, 18, 17, 16 */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* RESERVED 15, 14, 13, 12 */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* RESERVED 11, 10, 9, 8 */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* RESERVED 7, 6, 5, 4 */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* RESERVED 3 */
-+		0, 0,
-+		/* RESERVED 2, 1 */
-+		0, 0, 0, 0,
-+		MOD_SEL2_0 }
-+	},
-+	{ },
-+};
-+
-+static const struct pinmux_drive_reg pinmux_drive_regs[] = {
-+	{ PINMUX_DRIVE_REG("DRVCTRL0", 0xe6060300) {
-+		{ PIN_NUMBER('W', 3),   28, 2 },	/* QSPI0_SPCLK */
-+		{ PIN_A_NUMBER('C', 5), 24, 2 },	/* QSPI0_MOSI_IO0 */
-+		{ PIN_A_NUMBER('B', 4), 20, 2 },	/* QSPI0_MISO_IO1 */
-+		{ PIN_NUMBER('Y', 6),   16, 2 },	/* QSPI0_IO2 */
-+		{ PIN_A_NUMBER('B', 6), 12, 2 },	/* QSPI0_IO3 */
-+		{ PIN_NUMBER('Y', 3),    8, 2 },	/* QSPI0_SSL */
-+		{ PIN_NUMBER('V', 3),    4, 2 },	/* QSPI1_SPCLK */
-+		{ PIN_A_NUMBER('C', 7),  0, 2 },	/* QSPI1_MOSI_IO0 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL1", 0xe6060304) {
-+		{ PIN_A_NUMBER('E', 5), 28, 2 },	/* QSPI1_MISO_IO1 */
-+		{ PIN_A_NUMBER('E', 4), 24, 2 },	/* QSPI1_IO2 */
-+		{ PIN_A_NUMBER('C', 3), 20, 2 },	/* QSPI1_IO3 */
-+		{ PIN_NUMBER('V', 5),   16, 2 },	/* QSPI1_SSL */
-+		{ PIN_NUMBER('Y', 7),   12, 2 },	/* RPC_INT# */
-+		{ PIN_NUMBER('V', 6),    8, 2 },	/* RPC_WP# */
-+		{ PIN_NUMBER('V', 7),    4, 2 },	/* RPC_RESET# */
-+		{ PIN_NUMBER('A', 16),   0, 3 },	/* AVB_RX_CTL */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL2", 0xe6060308) {
-+		{ PIN_NUMBER('B', 19),  28, 3 },	/* AVB_RXC */
-+		{ PIN_NUMBER('A', 13),  24, 3 },	/* AVB_RD0 */
-+		{ PIN_NUMBER('B', 13),  20, 3 },	/* AVB_RD1 */
-+		{ PIN_NUMBER('A', 14),  16, 3 },	/* AVB_RD2 */
-+		{ PIN_NUMBER('B', 14),  12, 3 },	/* AVB_RD3 */
-+		{ PIN_NUMBER('A', 8),    8, 3 },	/* AVB_TX_CTL */
-+		{ PIN_NUMBER('A', 19),   4, 3 },	/* AVB_TXC */
-+		{ PIN_NUMBER('A', 18),   0, 3 },	/* AVB_TD0 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL3", 0xe606030c) {
-+		{ PIN_NUMBER('B', 18),  28, 3 },	/* AVB_TD1 */
-+		{ PIN_NUMBER('A', 17),  24, 3 },	/* AVB_TD2 */
-+		{ PIN_NUMBER('B', 17),  20, 3 },	/* AVB_TD3 */
-+		{ PIN_NUMBER('A', 12),  16, 3 },	/* AVB_TXCREFCLK */
-+		{ PIN_NUMBER('A', 9),   12, 3 },	/* AVB_MDIO */
-+		{ RCAR_GP_PIN(2,  9),    8, 3 },	/* AVB_MDC */
-+		{ RCAR_GP_PIN(2, 10),    4, 3 },	/* AVB_MAGIC */
-+		{ RCAR_GP_PIN(2, 11),    0, 3 },	/* AVB_PHY_INT */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL4", 0xe6060310) {
-+		{ RCAR_GP_PIN(2, 12), 28, 3 },	/* AVB_LINK */
-+		{ RCAR_GP_PIN(2, 13), 24, 3 },	/* AVB_AVTP_MATCH */
-+		{ RCAR_GP_PIN(2, 14), 20, 3 },	/* AVB_AVTP_CAPTURE */
-+		{ RCAR_GP_PIN(2,  0), 16, 3 },	/* IRQ0 */
-+		{ RCAR_GP_PIN(2,  1), 12, 3 },	/* IRQ1 */
-+		{ RCAR_GP_PIN(2,  2),  8, 3 },	/* IRQ2 */
-+		{ RCAR_GP_PIN(2,  3),  4, 3 },	/* IRQ3 */
-+		{ RCAR_GP_PIN(2,  4),  0, 3 },	/* IRQ4 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL5", 0xe6060314) {
-+		{ RCAR_GP_PIN(2,  5), 28, 3 },	/* IRQ5 */
-+		{ RCAR_GP_PIN(2,  6), 24, 3 },	/* PWM0 */
-+		{ RCAR_GP_PIN(2,  7), 20, 3 },	/* PWM1 */
-+		{ RCAR_GP_PIN(2,  8), 16, 3 },	/* PWM2 */
-+		{ RCAR_GP_PIN(1,  0), 12, 3 },	/* A0 */
-+		{ RCAR_GP_PIN(1,  1),  8, 3 },	/* A1 */
-+		{ RCAR_GP_PIN(1,  2),  4, 3 },	/* A2 */
-+		{ RCAR_GP_PIN(1,  3),  0, 3 },	/* A3 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL6", 0xe6060318) {
-+		{ RCAR_GP_PIN(1,  4), 28, 3 },	/* A4 */
-+		{ RCAR_GP_PIN(1,  5), 24, 3 },	/* A5 */
-+		{ RCAR_GP_PIN(1,  6), 20, 3 },	/* A6 */
-+		{ RCAR_GP_PIN(1,  7), 16, 3 },	/* A7 */
-+		{ RCAR_GP_PIN(1,  8), 12, 3 },	/* A8 */
-+		{ RCAR_GP_PIN(1,  9),  8, 3 },	/* A9 */
-+		{ RCAR_GP_PIN(1, 10),  4, 3 },	/* A10 */
-+		{ RCAR_GP_PIN(1, 11),  0, 3 },	/* A11 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL7", 0xe606031c) {
-+		{ RCAR_GP_PIN(1, 12), 28, 3 },	/* A12 */
-+		{ RCAR_GP_PIN(1, 13), 24, 3 },	/* A13 */
-+		{ RCAR_GP_PIN(1, 14), 20, 3 },	/* A14 */
-+		{ RCAR_GP_PIN(1, 15), 16, 3 },	/* A15 */
-+		{ RCAR_GP_PIN(1, 16), 12, 3 },	/* A16 */
-+		{ RCAR_GP_PIN(1, 17),  8, 3 },	/* A17 */
-+		{ RCAR_GP_PIN(1, 18),  4, 3 },	/* A18 */
-+		{ RCAR_GP_PIN(1, 19),  0, 3 },	/* A19 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL8", 0xe6060320) {
-+		{ PIN_NUMBER('F', 1), 28, 3 },	/* CLKOUT */
-+		{ RCAR_GP_PIN(1, 20), 24, 3 },	/* CS0 */
-+		{ RCAR_GP_PIN(1, 21), 20, 3 },	/* CS1_A26 */
-+		{ RCAR_GP_PIN(1, 22), 16, 3 },	/* BS */
-+		{ RCAR_GP_PIN(1, 23), 12, 3 },	/* RD */
-+		{ RCAR_GP_PIN(1, 24),  8, 3 },	/* RD_WR */
-+		{ RCAR_GP_PIN(1, 25),  4, 3 },	/* WE0 */
-+		{ RCAR_GP_PIN(1, 26),  0, 3 },	/* WE1 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL9", 0xe6060324) {
-+		{ RCAR_GP_PIN(1, 27), 28, 3 },	/* EX_WAIT0 */
-+		{ PIN_NUMBER('C', 1), 24, 3 },	/* PRESETOUT# */
-+		{ RCAR_GP_PIN(0,  0), 20, 3 },	/* D0 */
-+		{ RCAR_GP_PIN(0,  1), 16, 3 },	/* D1 */
-+		{ RCAR_GP_PIN(0,  2), 12, 3 },	/* D2 */
-+		{ RCAR_GP_PIN(0,  3),  8, 3 },	/* D3 */
-+		{ RCAR_GP_PIN(0,  4),  4, 3 },	/* D4 */
-+		{ RCAR_GP_PIN(0,  5),  0, 3 },	/* D5 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL10", 0xe6060328) {
-+		{ RCAR_GP_PIN(0,  6), 28, 3 },	/* D6 */
-+		{ RCAR_GP_PIN(0,  7), 24, 3 },	/* D7 */
-+		{ RCAR_GP_PIN(0,  8), 20, 3 },	/* D8 */
-+		{ RCAR_GP_PIN(0,  9), 16, 3 },	/* D9 */
-+		{ RCAR_GP_PIN(0, 10), 12, 3 },	/* D10 */
-+		{ RCAR_GP_PIN(0, 11),  8, 3 },	/* D11 */
-+		{ RCAR_GP_PIN(0, 12),  4, 3 },	/* D12 */
-+		{ RCAR_GP_PIN(0, 13),  0, 3 },	/* D13 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL11", 0xe606032c) {
-+		{ RCAR_GP_PIN(0, 14),   28, 3 },	/* D14 */
-+		{ RCAR_GP_PIN(0, 15),   24, 3 },	/* D15 */
-+		{ RCAR_GP_PIN(7,  0),   20, 3 },	/* AVS1 */
-+		{ RCAR_GP_PIN(7,  1),   16, 3 },	/* AVS2 */
-+		{ RCAR_GP_PIN(7,  2),   12, 3 },	/* HDMI0_CEC */
-+		{ RCAR_GP_PIN(7,  3),    8, 3 },	/* HDMI1_CEC */
-+		{ PIN_A_NUMBER('P', 7),  4, 2 },	/* DU_DOTCLKIN0 */
-+		{ PIN_A_NUMBER('P', 8),  0, 2 },	/* DU_DOTCLKIN1 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL12", 0xe6060330) {
-+		{ PIN_A_NUMBER('R', 7),  28, 2 },	/* DU_DOTCLKIN2 */
-+		{ PIN_A_NUMBER('R', 8),  24, 2 },	/* DU_DOTCLKIN3 */
-+		{ PIN_A_NUMBER('D', 38), 20, 2 },	/* FSCLKST# */
-+		{ PIN_A_NUMBER('R', 30),  4, 2 },	/* TMS */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL13", 0xe6060334) {
-+		{ PIN_A_NUMBER('T', 28), 28, 2 },	/* TDO */
-+		{ PIN_A_NUMBER('T', 30), 24, 2 },	/* ASEBRK */
-+		{ RCAR_GP_PIN(3,  0),    20, 3 },	/* SD0_CLK */
-+		{ RCAR_GP_PIN(3,  1),    16, 3 },	/* SD0_CMD */
-+		{ RCAR_GP_PIN(3,  2),    12, 3 },	/* SD0_DAT0 */
-+		{ RCAR_GP_PIN(3,  3),     8, 3 },	/* SD0_DAT1 */
-+		{ RCAR_GP_PIN(3,  4),     4, 3 },	/* SD0_DAT2 */
-+		{ RCAR_GP_PIN(3,  5),     0, 3 },	/* SD0_DAT3 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL14", 0xe6060338) {
-+		{ RCAR_GP_PIN(3,  6), 28, 3 },	/* SD1_CLK */
-+		{ RCAR_GP_PIN(3,  7), 24, 3 },	/* SD1_CMD */
-+		{ RCAR_GP_PIN(3,  8), 20, 3 },	/* SD1_DAT0 */
-+		{ RCAR_GP_PIN(3,  9), 16, 3 },	/* SD1_DAT1 */
-+		{ RCAR_GP_PIN(3, 10), 12, 3 },	/* SD1_DAT2 */
-+		{ RCAR_GP_PIN(3, 11),  8, 3 },	/* SD1_DAT3 */
-+		{ RCAR_GP_PIN(4,  0),  4, 3 },	/* SD2_CLK */
-+		{ RCAR_GP_PIN(4,  1),  0, 3 },	/* SD2_CMD */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL15", 0xe606033c) {
-+		{ RCAR_GP_PIN(4,  2), 28, 3 },	/* SD2_DAT0 */
-+		{ RCAR_GP_PIN(4,  3), 24, 3 },	/* SD2_DAT1 */
-+		{ RCAR_GP_PIN(4,  4), 20, 3 },	/* SD2_DAT2 */
-+		{ RCAR_GP_PIN(4,  5), 16, 3 },	/* SD2_DAT3 */
-+		{ RCAR_GP_PIN(4,  6), 12, 3 },	/* SD2_DS */
-+		{ RCAR_GP_PIN(4,  7),  8, 3 },	/* SD3_CLK */
-+		{ RCAR_GP_PIN(4,  8),  4, 3 },	/* SD3_CMD */
-+		{ RCAR_GP_PIN(4,  9),  0, 3 },	/* SD3_DAT0 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL16", 0xe6060340) {
-+		{ RCAR_GP_PIN(4, 10), 28, 3 },	/* SD3_DAT1 */
-+		{ RCAR_GP_PIN(4, 11), 24, 3 },	/* SD3_DAT2 */
-+		{ RCAR_GP_PIN(4, 12), 20, 3 },	/* SD3_DAT3 */
-+		{ RCAR_GP_PIN(4, 13), 16, 3 },	/* SD3_DAT4 */
-+		{ RCAR_GP_PIN(4, 14), 12, 3 },	/* SD3_DAT5 */
-+		{ RCAR_GP_PIN(4, 15),  8, 3 },	/* SD3_DAT6 */
-+		{ RCAR_GP_PIN(4, 16),  4, 3 },	/* SD3_DAT7 */
-+		{ RCAR_GP_PIN(4, 17),  0, 3 },	/* SD3_DS */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL17", 0xe6060344) {
-+		{ RCAR_GP_PIN(3, 12), 28, 3 },	/* SD0_CD */
-+		{ RCAR_GP_PIN(3, 13), 24, 3 },	/* SD0_WP */
-+		{ RCAR_GP_PIN(3, 14), 20, 3 },	/* SD1_CD */
-+		{ RCAR_GP_PIN(3, 15), 16, 3 },	/* SD1_WP */
-+		{ RCAR_GP_PIN(5,  0), 12, 3 },	/* SCK0 */
-+		{ RCAR_GP_PIN(5,  1),  8, 3 },	/* RX0 */
-+		{ RCAR_GP_PIN(5,  2),  4, 3 },	/* TX0 */
-+		{ RCAR_GP_PIN(5,  3),  0, 3 },	/* CTS0 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL18", 0xe6060348) {
-+		{ RCAR_GP_PIN(5,  4), 28, 3 },	/* RTS0_TANS */
-+		{ RCAR_GP_PIN(5,  5), 24, 3 },	/* RX1 */
-+		{ RCAR_GP_PIN(5,  6), 20, 3 },	/* TX1 */
-+		{ RCAR_GP_PIN(5,  7), 16, 3 },	/* CTS1 */
-+		{ RCAR_GP_PIN(5,  8), 12, 3 },	/* RTS1_TANS */
-+		{ RCAR_GP_PIN(5,  9),  8, 3 },	/* SCK2 */
-+		{ RCAR_GP_PIN(5, 10),  4, 3 },	/* TX2 */
-+		{ RCAR_GP_PIN(5, 11),  0, 3 },	/* RX2 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL19", 0xe606034c) {
-+		{ RCAR_GP_PIN(5, 12), 28, 3 },	/* HSCK0 */
-+		{ RCAR_GP_PIN(5, 13), 24, 3 },	/* HRX0 */
-+		{ RCAR_GP_PIN(5, 14), 20, 3 },	/* HTX0 */
-+		{ RCAR_GP_PIN(5, 15), 16, 3 },	/* HCTS0 */
-+		{ RCAR_GP_PIN(5, 16), 12, 3 },	/* HRTS0 */
-+		{ RCAR_GP_PIN(5, 17),  8, 3 },	/* MSIOF0_SCK */
-+		{ RCAR_GP_PIN(5, 18),  4, 3 },	/* MSIOF0_SYNC */
-+		{ RCAR_GP_PIN(5, 19),  0, 3 },	/* MSIOF0_SS1 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL20", 0xe6060350) {
-+		{ RCAR_GP_PIN(5, 20), 28, 3 },	/* MSIOF0_TXD */
-+		{ RCAR_GP_PIN(5, 21), 24, 3 },	/* MSIOF0_SS2 */
-+		{ RCAR_GP_PIN(5, 22), 20, 3 },	/* MSIOF0_RXD */
-+		{ RCAR_GP_PIN(5, 23), 16, 3 },	/* MLB_CLK */
-+		{ RCAR_GP_PIN(5, 24), 12, 3 },	/* MLB_SIG */
-+		{ RCAR_GP_PIN(5, 25),  8, 3 },	/* MLB_DAT */
-+		{ PIN_NUMBER('H', 37),  4, 3 },	/* MLB_REF */
-+		{ RCAR_GP_PIN(6,  0),  0, 3 },	/* SSI_SCK01239 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL21", 0xe6060354) {
-+		{ RCAR_GP_PIN(6,  1), 28, 3 },	/* SSI_WS01239 */
-+		{ RCAR_GP_PIN(6,  2), 24, 3 },	/* SSI_SDATA0 */
-+		{ RCAR_GP_PIN(6,  3), 20, 3 },	/* SSI_SDATA1 */
-+		{ RCAR_GP_PIN(6,  4), 16, 3 },	/* SSI_SDATA2 */
-+		{ RCAR_GP_PIN(6,  5), 12, 3 },	/* SSI_SCK34 */
-+		{ RCAR_GP_PIN(6,  6),  8, 3 },	/* SSI_WS34 */
-+		{ RCAR_GP_PIN(6,  7),  4, 3 },	/* SSI_SDATA3 */
-+		{ RCAR_GP_PIN(6,  8),  0, 3 },	/* SSI_SCK4 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL22", 0xe6060358) {
-+		{ RCAR_GP_PIN(6,  9), 28, 3 },	/* SSI_WS4 */
-+		{ RCAR_GP_PIN(6, 10), 24, 3 },	/* SSI_SDATA4 */
-+		{ RCAR_GP_PIN(6, 11), 20, 3 },	/* SSI_SCK5 */
-+		{ RCAR_GP_PIN(6, 12), 16, 3 },	/* SSI_WS5 */
-+		{ RCAR_GP_PIN(6, 13), 12, 3 },	/* SSI_SDATA5 */
-+		{ RCAR_GP_PIN(6, 14),  8, 3 },	/* SSI_SCK6 */
-+		{ RCAR_GP_PIN(6, 15),  4, 3 },	/* SSI_WS6 */
-+		{ RCAR_GP_PIN(6, 16),  0, 3 },	/* SSI_SDATA6 */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL23", 0xe606035c) {
-+		{ RCAR_GP_PIN(6, 17), 28, 3 },	/* SSI_SCK78 */
-+		{ RCAR_GP_PIN(6, 18), 24, 3 },	/* SSI_WS78 */
-+		{ RCAR_GP_PIN(6, 19), 20, 3 },	/* SSI_SDATA7 */
-+		{ RCAR_GP_PIN(6, 20), 16, 3 },	/* SSI_SDATA8 */
-+		{ RCAR_GP_PIN(6, 21), 12, 3 },	/* SSI_SDATA9 */
-+		{ RCAR_GP_PIN(6, 22),  8, 3 },	/* AUDIO_CLKA */
-+		{ RCAR_GP_PIN(6, 23),  4, 3 },	/* AUDIO_CLKB */
-+		{ RCAR_GP_PIN(6, 24),  0, 3 },	/* USB0_PWEN */
-+	} },
-+	{ PINMUX_DRIVE_REG("DRVCTRL24", 0xe6060360) {
-+		{ RCAR_GP_PIN(6, 25), 28, 3 },	/* USB0_OVC */
-+		{ RCAR_GP_PIN(6, 26), 24, 3 },	/* USB1_PWEN */
-+		{ RCAR_GP_PIN(6, 27), 20, 3 },	/* USB1_OVC */
-+		{ RCAR_GP_PIN(6, 28), 16, 3 },	/* USB30_PWEN */
-+		{ RCAR_GP_PIN(6, 29), 12, 3 },	/* USB30_OVC */
-+		{ RCAR_GP_PIN(6, 30),  8, 3 },	/* USB31_PWEN */
-+		{ RCAR_GP_PIN(6, 31),  4, 3 },	/* USB31_OVC */
-+	} },
-+	{ },
-+};
-+
-+static int r8a7795es1_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
-+				     u32 *pocctrl)
-+{
-+	int bit = -EINVAL;
-+
-+	*pocctrl = 0xe6060380;
-+
-+	if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11))
-+		bit = pin & 0x1f;
-+
-+	if (pin >= RCAR_GP_PIN(4, 0) && pin <= RCAR_GP_PIN(4, 17))
-+		bit = (pin & 0x1f) + 12;
-+
-+	return bit;
-+}
-+
-+#define PUEN	0xe6060400
-+#define PUD	0xe6060440
-+
-+#define PU0	0x00
-+#define PU1	0x04
-+#define PU2	0x08
-+#define PU3	0x0c
-+#define PU4	0x10
-+#define PU5	0x14
-+#define PU6	0x18
-+
-+static const struct sh_pfc_bias_info bias_info[] = {
-+	{ RCAR_GP_PIN(2, 11),    PU0, 31 },	/* AVB_PHY_INT */
-+	{ RCAR_GP_PIN(2, 10),    PU0, 30 },	/* AVB_MAGIC */
-+	{ RCAR_GP_PIN(2,  9),    PU0, 29 },	/* AVB_MDC */
-+	{ PIN_NUMBER('A', 9),    PU0, 28 },	/* AVB_MDIO */
-+	{ PIN_NUMBER('A', 12),   PU0, 27 },	/* AVB_TXCREFCLK */
-+	{ PIN_NUMBER('B', 17),   PU0, 26 },	/* AVB_TD3 */
-+	{ PIN_NUMBER('A', 17),   PU0, 25 },	/* AVB_TD2 */
-+	{ PIN_NUMBER('B', 18),   PU0, 24 },	/* AVB_TD1 */
-+	{ PIN_NUMBER('A', 18),   PU0, 23 },	/* AVB_TD0 */
-+	{ PIN_NUMBER('A', 19),   PU0, 22 },	/* AVB_TXC */
-+	{ PIN_NUMBER('A', 8),    PU0, 21 },	/* AVB_TX_CTL */
-+	{ PIN_NUMBER('B', 14),   PU0, 20 },	/* AVB_RD3 */
-+	{ PIN_NUMBER('A', 14),   PU0, 19 },	/* AVB_RD2 */
-+	{ PIN_NUMBER('B', 13),   PU0, 18 },	/* AVB_RD1 */
-+	{ PIN_NUMBER('A', 13),   PU0, 17 },	/* AVB_RD0 */
-+	{ PIN_NUMBER('B', 19),   PU0, 16 },	/* AVB_RXC */
-+	{ PIN_NUMBER('A', 16),   PU0, 15 },	/* AVB_RX_CTL */
-+	{ PIN_NUMBER('V', 7),    PU0, 14 },	/* RPC_RESET# */
-+	{ PIN_NUMBER('V', 6),    PU0, 13 },	/* RPC_WP# */
-+	{ PIN_NUMBER('Y', 7),    PU0, 12 },	/* RPC_INT# */
-+	{ PIN_NUMBER('V', 5),    PU0, 11 },	/* QSPI1_SSL */
-+	{ PIN_A_NUMBER('C', 3),  PU0, 10 },	/* QSPI1_IO3 */
-+	{ PIN_A_NUMBER('E', 4),  PU0,  9 },	/* QSPI1_IO2 */
-+	{ PIN_A_NUMBER('E', 5),  PU0,  8 },	/* QSPI1_MISO_IO1 */
-+	{ PIN_A_NUMBER('C', 7),  PU0,  7 },	/* QSPI1_MOSI_IO0 */
-+	{ PIN_NUMBER('V', 3),    PU0,  6 },	/* QSPI1_SPCLK */
-+	{ PIN_NUMBER('Y', 3),    PU0,  5 },	/* QSPI0_SSL */
-+	{ PIN_A_NUMBER('B', 6),  PU0,  4 },	/* QSPI0_IO3 */
-+	{ PIN_NUMBER('Y', 6),    PU0,  3 },	/* QSPI0_IO2 */
-+	{ PIN_A_NUMBER('B', 4),  PU0,  2 },	/* QSPI0_MISO_IO1 */
-+	{ PIN_A_NUMBER('C', 5),  PU0,  1 },	/* QSPI0_MOSI_IO0 */
-+	{ PIN_NUMBER('W', 3),    PU0,  0 },	/* QSPI0_SPCLK */
-+
-+	{ RCAR_GP_PIN(1, 19),    PU1, 31 },	/* A19 */
-+	{ RCAR_GP_PIN(1, 18),    PU1, 30 },	/* A18 */
-+	{ RCAR_GP_PIN(1, 17),    PU1, 29 },	/* A17 */
-+	{ RCAR_GP_PIN(1, 16),    PU1, 28 },	/* A16 */
-+	{ RCAR_GP_PIN(1, 15),    PU1, 27 },	/* A15 */
-+	{ RCAR_GP_PIN(1, 14),    PU1, 26 },	/* A14 */
-+	{ RCAR_GP_PIN(1, 13),    PU1, 25 },	/* A13 */
-+	{ RCAR_GP_PIN(1, 12),    PU1, 24 },	/* A12 */
-+	{ RCAR_GP_PIN(1, 11),    PU1, 23 },	/* A11 */
-+	{ RCAR_GP_PIN(1, 10),    PU1, 22 },	/* A10 */
-+	{ RCAR_GP_PIN(1,  9),    PU1, 21 },	/* A9 */
-+	{ RCAR_GP_PIN(1,  8),    PU1, 20 },	/* A8 */
-+	{ RCAR_GP_PIN(1,  7),    PU1, 19 },	/* A7 */
-+	{ RCAR_GP_PIN(1,  6),    PU1, 18 },	/* A6 */
-+	{ RCAR_GP_PIN(1,  5),    PU1, 17 },	/* A5 */
-+	{ RCAR_GP_PIN(1,  4),    PU1, 16 },	/* A4 */
-+	{ RCAR_GP_PIN(1,  3),    PU1, 15 },	/* A3 */
-+	{ RCAR_GP_PIN(1,  2),    PU1, 14 },	/* A2 */
-+	{ RCAR_GP_PIN(1,  1),    PU1, 13 },	/* A1 */
-+	{ RCAR_GP_PIN(1,  0),    PU1, 12 },	/* A0 */
-+	{ RCAR_GP_PIN(2,  8),    PU1, 11 },	/* PWM2_A */
-+	{ RCAR_GP_PIN(2,  7),    PU1, 10 },	/* PWM1_A */
-+	{ RCAR_GP_PIN(2,  6),    PU1,  9 },	/* PWM0 */
-+	{ RCAR_GP_PIN(2,  5),    PU1,  8 },	/* IRQ5 */
-+	{ RCAR_GP_PIN(2,  4),    PU1,  7 },	/* IRQ4 */
-+	{ RCAR_GP_PIN(2,  3),    PU1,  6 },	/* IRQ3 */
-+	{ RCAR_GP_PIN(2,  2),    PU1,  5 },	/* IRQ2 */
-+	{ RCAR_GP_PIN(2,  1),    PU1,  4 },	/* IRQ1 */
-+	{ RCAR_GP_PIN(2,  0),    PU1,  3 },	/* IRQ0 */
-+	{ RCAR_GP_PIN(2, 14),    PU1,  2 },	/* AVB_AVTP_CAPTURE_A */
-+	{ RCAR_GP_PIN(2, 13),    PU1,  1 },	/* AVB_AVTP_MATCH_A */
-+	{ RCAR_GP_PIN(2, 12),    PU1,  0 },	/* AVB_LINK */
-+
-+	{ PIN_A_NUMBER('P', 8),  PU2, 31 },	/* DU_DOTCLKIN1 */
-+	{ PIN_A_NUMBER('P', 7),  PU2, 30 },	/* DU_DOTCLKIN0 */
-+	{ RCAR_GP_PIN(7,  3),    PU2, 29 },	/* HDMI1_CEC */
-+	{ RCAR_GP_PIN(7,  2),    PU2, 28 },	/* HDMI0_CEC */
-+	{ RCAR_GP_PIN(7,  1),    PU2, 27 },	/* AVS2 */
-+	{ RCAR_GP_PIN(7,  0),    PU2, 26 },	/* AVS1 */
-+	{ RCAR_GP_PIN(0, 15),    PU2, 25 },	/* D15 */
-+	{ RCAR_GP_PIN(0, 14),    PU2, 24 },	/* D14 */
-+	{ RCAR_GP_PIN(0, 13),    PU2, 23 },	/* D13 */
-+	{ RCAR_GP_PIN(0, 12),    PU2, 22 },	/* D12 */
-+	{ RCAR_GP_PIN(0, 11),    PU2, 21 },	/* D11 */
-+	{ RCAR_GP_PIN(0, 10),    PU2, 20 },	/* D10 */
-+	{ RCAR_GP_PIN(0,  9),    PU2, 19 },	/* D9 */
-+	{ RCAR_GP_PIN(0,  8),    PU2, 18 },	/* D8 */
-+	{ RCAR_GP_PIN(0,  7),    PU2, 17 },	/* D7 */
-+	{ RCAR_GP_PIN(0,  6),    PU2, 16 },	/* D6 */
-+	{ RCAR_GP_PIN(0,  5),    PU2, 15 },	/* D5 */
-+	{ RCAR_GP_PIN(0,  4),    PU2, 14 },	/* D4 */
-+	{ RCAR_GP_PIN(0,  3),    PU2, 13 },	/* D3 */
-+	{ RCAR_GP_PIN(0,  2),    PU2, 12 },	/* D2 */
-+	{ RCAR_GP_PIN(0,  1),    PU2, 11 },	/* D1 */
-+	{ RCAR_GP_PIN(0,  0),    PU2, 10 },	/* D0 */
-+	{ PIN_NUMBER('C', 1),    PU2,  9 },	/* PRESETOUT# */
-+	{ RCAR_GP_PIN(1, 27),    PU2,  8 },	/* EX_WAIT0_A */
-+	{ RCAR_GP_PIN(1, 26),    PU2,  7 },	/* WE1_N */
-+	{ RCAR_GP_PIN(1, 25),    PU2,  6 },	/* WE0_N */
-+	{ RCAR_GP_PIN(1, 24),    PU2,  5 },	/* RD_WR_N */
-+	{ RCAR_GP_PIN(1, 23),    PU2,  4 },	/* RD_N */
-+	{ RCAR_GP_PIN(1, 22),    PU2,  3 },	/* BS_N */
-+	{ RCAR_GP_PIN(1, 21),    PU2,  2 },	/* CS1_N_A26 */
-+	{ RCAR_GP_PIN(1, 20),    PU2,  1 },	/* CS0_N */
-+	{ PIN_NUMBER('F', 1),    PU2,  0 },	/* CLKOUT */
-+
-+	{ RCAR_GP_PIN(4,  9),    PU3, 31 },	/* SD3_DAT0 */
-+	{ RCAR_GP_PIN(4,  8),    PU3, 30 },	/* SD3_CMD */
-+	{ RCAR_GP_PIN(4,  7),    PU3, 29 },	/* SD3_CLK */
-+	{ RCAR_GP_PIN(4,  6),    PU3, 28 },	/* SD2_DS */
-+	{ RCAR_GP_PIN(4,  5),    PU3, 27 },	/* SD2_DAT3 */
-+	{ RCAR_GP_PIN(4,  4),    PU3, 26 },	/* SD2_DAT2 */
-+	{ RCAR_GP_PIN(4,  3),    PU3, 25 },	/* SD2_DAT1 */
-+	{ RCAR_GP_PIN(4,  2),    PU3, 24 },	/* SD2_DAT0 */
-+	{ RCAR_GP_PIN(4,  1),    PU3, 23 },	/* SD2_CMD */
-+	{ RCAR_GP_PIN(4,  0),    PU3, 22 },	/* SD2_CLK */
-+	{ RCAR_GP_PIN(3, 11),    PU3, 21 },	/* SD1_DAT3 */
-+	{ RCAR_GP_PIN(3, 10),    PU3, 20 },	/* SD1_DAT2 */
-+	{ RCAR_GP_PIN(3,  9),    PU3, 19 },	/* SD1_DAT1 */
-+	{ RCAR_GP_PIN(3,  8),    PU3, 18 },	/* SD1_DAT0 */
-+	{ RCAR_GP_PIN(3,  7),    PU3, 17 },	/* SD1_CMD */
-+	{ RCAR_GP_PIN(3,  6),    PU3, 16 },	/* SD1_CLK */
-+	{ RCAR_GP_PIN(3,  5),    PU3, 15 },	/* SD0_DAT3 */
-+	{ RCAR_GP_PIN(3,  4),    PU3, 14 },	/* SD0_DAT2 */
-+	{ RCAR_GP_PIN(3,  3),    PU3, 13 },	/* SD0_DAT1 */
-+	{ RCAR_GP_PIN(3,  2),    PU3, 12 },	/* SD0_DAT0 */
-+	{ RCAR_GP_PIN(3,  1),    PU3, 11 },	/* SD0_CMD */
-+	{ RCAR_GP_PIN(3,  0),    PU3, 10 },	/* SD0_CLK */
-+	{ PIN_A_NUMBER('T', 30), PU3,  9 },	/* ASEBRK */
-+	/* bit 8 n/a */
-+	{ PIN_A_NUMBER('R', 29), PU3,  7 },	/* TDI */
-+	{ PIN_A_NUMBER('R', 30), PU3,  6 },	/* TMS */
-+	{ PIN_A_NUMBER('T', 27), PU3,  5 },	/* TCK */
-+	{ PIN_A_NUMBER('R', 26), PU3,  4 },	/* TRST# */
-+	{ PIN_A_NUMBER('D', 39), PU3,  3 },	/* EXTALR*/
-+	{ PIN_A_NUMBER('D', 38), PU3,  2 },	/* FSCLKST# */
-+	{ PIN_A_NUMBER('R', 8),  PU3,  1 },	/* DU_DOTCLKIN3 */
-+	{ PIN_A_NUMBER('R', 7),  PU3,  0 },	/* DU_DOTCLKIN2 */
-+
-+	{ RCAR_GP_PIN(5, 19),    PU4, 31 },	/* MSIOF0_SS1 */
-+	{ RCAR_GP_PIN(5, 18),    PU4, 30 },	/* MSIOF0_SYNC */
-+	{ RCAR_GP_PIN(5, 17),    PU4, 29 },	/* MSIOF0_SCK */
-+	{ RCAR_GP_PIN(5, 16),    PU4, 28 },	/* HRTS0_N */
-+	{ RCAR_GP_PIN(5, 15),    PU4, 27 },	/* HCTS0_N */
-+	{ RCAR_GP_PIN(5, 14),    PU4, 26 },	/* HTX0 */
-+	{ RCAR_GP_PIN(5, 13),    PU4, 25 },	/* HRX0 */
-+	{ RCAR_GP_PIN(5, 12),    PU4, 24 },	/* HSCK0 */
-+	{ RCAR_GP_PIN(5, 11),    PU4, 23 },	/* RX2_A */
-+	{ RCAR_GP_PIN(5, 10),    PU4, 22 },	/* TX2_A */
-+	{ RCAR_GP_PIN(5,  9),    PU4, 21 },	/* SCK2 */
-+	{ RCAR_GP_PIN(5,  8),    PU4, 20 },	/* RTS1_N_TANS */
-+	{ RCAR_GP_PIN(5,  7),    PU4, 19 },	/* CTS1_N */
-+	{ RCAR_GP_PIN(5,  6),    PU4, 18 },	/* TX1_A */
-+	{ RCAR_GP_PIN(5,  5),    PU4, 17 },	/* RX1_A */
-+	{ RCAR_GP_PIN(5,  4),    PU4, 16 },	/* RTS0_N_TANS */
-+	{ RCAR_GP_PIN(5,  3),    PU4, 15 },	/* CTS0_N */
-+	{ RCAR_GP_PIN(5,  2),    PU4, 14 },	/* TX0 */
-+	{ RCAR_GP_PIN(5,  1),    PU4, 13 },	/* RX0 */
-+	{ RCAR_GP_PIN(5,  0),    PU4, 12 },	/* SCK0 */
-+	{ RCAR_GP_PIN(3, 15),    PU4, 11 },	/* SD1_WP */
-+	{ RCAR_GP_PIN(3, 14),    PU4, 10 },	/* SD1_CD */
-+	{ RCAR_GP_PIN(3, 13),    PU4,  9 },	/* SD0_WP */
-+	{ RCAR_GP_PIN(3, 12),    PU4,  8 },	/* SD0_CD */
-+	{ RCAR_GP_PIN(4, 17),    PU4,  7 },	/* SD3_DS */
-+	{ RCAR_GP_PIN(4, 16),    PU4,  6 },	/* SD3_DAT7 */
-+	{ RCAR_GP_PIN(4, 15),    PU4,  5 },	/* SD3_DAT6 */
-+	{ RCAR_GP_PIN(4, 14),    PU4,  4 },	/* SD3_DAT5 */
-+	{ RCAR_GP_PIN(4, 13),    PU4,  3 },	/* SD3_DAT4 */
-+	{ RCAR_GP_PIN(4, 12),    PU4,  2 },	/* SD3_DAT3 */
-+	{ RCAR_GP_PIN(4, 11),    PU4,  1 },	/* SD3_DAT2 */
-+	{ RCAR_GP_PIN(4, 10),    PU4,  0 },	/* SD3_DAT1 */
-+
-+	{ RCAR_GP_PIN(6, 24),    PU5, 31 },	/* USB0_PWEN */
-+	{ RCAR_GP_PIN(6, 23),    PU5, 30 },	/* AUDIO_CLKB_B */
-+	{ RCAR_GP_PIN(6, 22),    PU5, 29 },	/* AUDIO_CLKA_A */
-+	{ RCAR_GP_PIN(6, 21),    PU5, 28 },	/* SSI_SDATA9_A */
-+	{ RCAR_GP_PIN(6, 20),    PU5, 27 },	/* SSI_SDATA8 */
-+	{ RCAR_GP_PIN(6, 19),    PU5, 26 },	/* SSI_SDATA7 */
-+	{ RCAR_GP_PIN(6, 18),    PU5, 25 },	/* SSI_WS78 */
-+	{ RCAR_GP_PIN(6, 17),    PU5, 24 },	/* SSI_SCK78 */
-+	{ RCAR_GP_PIN(6, 16),    PU5, 23 },	/* SSI_SDATA6 */
-+	{ RCAR_GP_PIN(6, 15),    PU5, 22 },	/* SSI_WS6 */
-+	{ RCAR_GP_PIN(6, 14),    PU5, 21 },	/* SSI_SCK6 */
-+	{ RCAR_GP_PIN(6, 13),    PU5, 20 },	/* SSI_SDATA5 */
-+	{ RCAR_GP_PIN(6, 12),    PU5, 19 },	/* SSI_WS5 */
-+	{ RCAR_GP_PIN(6, 11),    PU5, 18 },	/* SSI_SCK5 */
-+	{ RCAR_GP_PIN(6, 10),    PU5, 17 },	/* SSI_SDATA4 */
-+	{ RCAR_GP_PIN(6,  9),    PU5, 16 },	/* SSI_WS4 */
-+	{ RCAR_GP_PIN(6,  8),    PU5, 15 },	/* SSI_SCK4 */
-+	{ RCAR_GP_PIN(6,  7),    PU5, 14 },	/* SSI_SDATA3 */
-+	{ RCAR_GP_PIN(6,  6),    PU5, 13 },	/* SSI_WS34 */
-+	{ RCAR_GP_PIN(6,  5),    PU5, 12 },	/* SSI_SCK34 */
-+	{ RCAR_GP_PIN(6,  4),    PU5, 11 },	/* SSI_SDATA2_A */
-+	{ RCAR_GP_PIN(6,  3),    PU5, 10 },	/* SSI_SDATA1_A */
-+	{ RCAR_GP_PIN(6,  2),    PU5,  9 },	/* SSI_SDATA0 */
-+	{ RCAR_GP_PIN(6,  1),    PU5,  8 },	/* SSI_WS01239 */
-+	{ RCAR_GP_PIN(6,  0),    PU5,  7 },	/* SSI_SCK01239 */
-+	{ PIN_NUMBER('H', 37),   PU5,  6 },	/* MLB_REF */
-+	{ RCAR_GP_PIN(5, 25),    PU5,  5 },	/* MLB_DAT */
-+	{ RCAR_GP_PIN(5, 24),    PU5,  4 },	/* MLB_SIG */
-+	{ RCAR_GP_PIN(5, 23),    PU5,  3 },	/* MLB_CLK */
-+	{ RCAR_GP_PIN(5, 22),    PU5,  2 },	/* MSIOF0_RXD */
-+	{ RCAR_GP_PIN(5, 21),    PU5,  1 },	/* MSIOF0_SS2 */
-+	{ RCAR_GP_PIN(5, 20),    PU5,  0 },	/* MSIOF0_TXD */
-+
-+	{ RCAR_GP_PIN(6, 31),    PU6,  6 },	/* USB31_OVC */
-+	{ RCAR_GP_PIN(6, 30),    PU6,  5 },	/* USB31_PWEN */
-+	{ RCAR_GP_PIN(6, 29),    PU6,  4 },	/* USB30_OVC */
-+	{ RCAR_GP_PIN(6, 28),    PU6,  3 },	/* USB30_PWEN */
-+	{ RCAR_GP_PIN(6, 27),    PU6,  2 },	/* USB1_OVC */
-+	{ RCAR_GP_PIN(6, 26),    PU6,  1 },	/* USB1_PWEN */
-+	{ RCAR_GP_PIN(6, 25),    PU6,  0 },	/* USB0_OVC */
-+};
-+
-+static unsigned int r8a7795es1_pinmux_get_bias(struct sh_pfc *pfc,
-+					       unsigned int pin)
-+{
-+	const struct sh_pfc_bias_info *info;
-+	u32 reg;
-+	u32 bit;
-+
-+	info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
-+	if (!info)
-+		return PIN_CONFIG_BIAS_DISABLE;
-+
-+	reg = info->reg;
-+	bit = BIT(info->bit);
-+
-+	if (!(sh_pfc_read_reg(pfc, PUEN + reg, 32) & bit))
-+		return PIN_CONFIG_BIAS_DISABLE;
-+	else if (sh_pfc_read_reg(pfc, PUD + reg, 32) & bit)
-+		return PIN_CONFIG_BIAS_PULL_UP;
-+	else
-+		return PIN_CONFIG_BIAS_PULL_DOWN;
-+}
-+
-+static void r8a7795es1_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
-+				       unsigned int bias)
-+{
-+	const struct sh_pfc_bias_info *info;
-+	u32 enable, updown;
-+	u32 reg;
-+	u32 bit;
-+
-+	info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
-+	if (!info)
-+		return;
-+
-+	reg = info->reg;
-+	bit = BIT(info->bit);
-+
-+	enable = sh_pfc_read_reg(pfc, PUEN + reg, 32) & ~bit;
-+	if (bias != PIN_CONFIG_BIAS_DISABLE)
-+		enable |= bit;
-+
-+	updown = sh_pfc_read_reg(pfc, PUD + reg, 32) & ~bit;
-+	if (bias == PIN_CONFIG_BIAS_PULL_UP)
-+		updown |= bit;
-+
-+	sh_pfc_write_reg(pfc, PUD + reg, 32, updown);
-+	sh_pfc_write_reg(pfc, PUEN + reg, 32, enable);
-+}
-+
-+static const struct sh_pfc_soc_operations r8a7795es1_pinmux_ops = {
-+	.pin_to_pocctrl = r8a7795es1_pin_to_pocctrl,
-+	.get_bias = r8a7795es1_pinmux_get_bias,
-+	.set_bias = r8a7795es1_pinmux_set_bias,
-+};
-+
-+const struct sh_pfc_soc_info r8a7795es1_pinmux_info = {
-+	.name = "r8a77950_pfc",
-+	.ops = &r8a7795es1_pinmux_ops,
-+	.unlock_reg = 0xe6060000, /* PMMR */
-+
-+	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-+
-+	.pins = pinmux_pins,
-+	.nr_pins = ARRAY_SIZE(pinmux_pins),
-+	.groups = pinmux_groups,
-+	.nr_groups = ARRAY_SIZE(pinmux_groups),
-+	.functions = pinmux_functions,
-+	.nr_functions = ARRAY_SIZE(pinmux_functions),
-+
-+	.cfg_regs = pinmux_config_regs,
-+	.drive_regs = pinmux_drive_regs,
-+
-+	.pinmux_data = pinmux_data,
-+	.pinmux_data_size = ARRAY_SIZE(pinmux_data),
-+};
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-@@ -1,7 +1,7 @@
- /*
-- * R8A7795 processor support - PFC hardware block.
-+ * R8A7795 ES2.0+ processor support - PFC hardware block.
-  *
-- * Copyright (C) 2015  Renesas Electronics Corporation
-+ * Copyright (C) 2015-2016 Renesas Electronics Corporation
-  *
-  * This program is free software; you can redistribute it and/or modify
-  * it under the terms of the GNU General Public License as published by
-@@ -9,6 +9,7 @@
-  */
- 
- #include <linux/kernel.h>
-+#include <linux/sys_soc.h>
- 
- #include "core.h"
- #include "sh_pfc.h"
-@@ -101,10 +102,10 @@
- #define GPSR2_0		F_(IRQ0,		IP0_27_24)
- 
- /* GPSR3 */
--#define GPSR3_15	F_(SD1_WP,		IP10_23_20)
--#define GPSR3_14	F_(SD1_CD,		IP10_19_16)
--#define GPSR3_13	F_(SD0_WP,		IP10_15_12)
--#define GPSR3_12	F_(SD0_CD,		IP10_11_8)
-+#define GPSR3_15	F_(SD1_WP,		IP11_23_20)
-+#define GPSR3_14	F_(SD1_CD,		IP11_19_16)
-+#define GPSR3_13	F_(SD0_WP,		IP11_15_12)
-+#define GPSR3_12	F_(SD0_CD,		IP11_11_8)
- #define GPSR3_11	F_(SD1_DAT3,		IP8_31_28)
- #define GPSR3_10	F_(SD1_DAT2,		IP8_27_24)
- #define GPSR3_9		F_(SD1_DAT1,		IP8_23_20)
-@@ -119,86 +120,86 @@
- #define GPSR3_0		F_(SD0_CLK,		IP7_19_16)
- 
- /* GPSR4 */
--#define GPSR4_17	FM(SD3_DS)
--#define GPSR4_16	F_(SD3_DAT7,		IP10_7_4)
--#define GPSR4_15	F_(SD3_DAT6,		IP10_3_0)
--#define GPSR4_14	F_(SD3_DAT5,		IP9_31_28)
--#define GPSR4_13	F_(SD3_DAT4,		IP9_27_24)
--#define GPSR4_12	FM(SD3_DAT3)
--#define GPSR4_11	FM(SD3_DAT2)
--#define GPSR4_10	FM(SD3_DAT1)
--#define GPSR4_9		FM(SD3_DAT0)
--#define GPSR4_8		FM(SD3_CMD)
--#define GPSR4_7		FM(SD3_CLK)
--#define GPSR4_6		F_(SD2_DS,		IP9_23_20)
--#define GPSR4_5		F_(SD2_DAT3,		IP9_19_16)
--#define GPSR4_4		F_(SD2_DAT2,		IP9_15_12)
--#define GPSR4_3		F_(SD2_DAT1,		IP9_11_8)
--#define GPSR4_2		F_(SD2_DAT0,		IP9_7_4)
--#define GPSR4_1		FM(SD2_CMD)
-+#define GPSR4_17	F_(SD3_DS,		IP11_7_4)
-+#define GPSR4_16	F_(SD3_DAT7,		IP11_3_0)
-+#define GPSR4_15	F_(SD3_DAT6,		IP10_31_28)
-+#define GPSR4_14	F_(SD3_DAT5,		IP10_27_24)
-+#define GPSR4_13	F_(SD3_DAT4,		IP10_23_20)
-+#define GPSR4_12	F_(SD3_DAT3,		IP10_19_16)
-+#define GPSR4_11	F_(SD3_DAT2,		IP10_15_12)
-+#define GPSR4_10	F_(SD3_DAT1,		IP10_11_8)
-+#define GPSR4_9		F_(SD3_DAT0,		IP10_7_4)
-+#define GPSR4_8		F_(SD3_CMD,		IP10_3_0)
-+#define GPSR4_7		F_(SD3_CLK,		IP9_31_28)
-+#define GPSR4_6		F_(SD2_DS,		IP9_27_24)
-+#define GPSR4_5		F_(SD2_DAT3,		IP9_23_20)
-+#define GPSR4_4		F_(SD2_DAT2,		IP9_19_16)
-+#define GPSR4_3		F_(SD2_DAT1,		IP9_15_12)
-+#define GPSR4_2		F_(SD2_DAT0,		IP9_11_8)
-+#define GPSR4_1		F_(SD2_CMD,		IP9_7_4)
- #define GPSR4_0		F_(SD2_CLK,		IP9_3_0)
- 
- /* GPSR5 */
--#define GPSR5_25	F_(MLB_DAT,		IP13_19_16)
--#define GPSR5_24	F_(MLB_SIG,		IP13_15_12)
--#define GPSR5_23	F_(MLB_CLK,		IP13_11_8)
-+#define GPSR5_25	F_(MLB_DAT,		IP14_19_16)
-+#define GPSR5_24	F_(MLB_SIG,		IP14_15_12)
-+#define GPSR5_23	F_(MLB_CLK,		IP14_11_8)
- #define GPSR5_22	FM(MSIOF0_RXD)
--#define GPSR5_21	F_(MSIOF0_SS2,		IP13_7_4)
-+#define GPSR5_21	F_(MSIOF0_SS2,		IP14_7_4)
- #define GPSR5_20	FM(MSIOF0_TXD)
--#define GPSR5_19	F_(MSIOF0_SS1,		IP13_3_0)
--#define GPSR5_18	F_(MSIOF0_SYNC,		IP12_31_28)
-+#define GPSR5_19	F_(MSIOF0_SS1,		IP14_3_0)
-+#define GPSR5_18	F_(MSIOF0_SYNC,		IP13_31_28)
- #define GPSR5_17	FM(MSIOF0_SCK)
--#define GPSR5_16	F_(HRTS0_N,		IP12_27_24)
--#define GPSR5_15	F_(HCTS0_N,		IP12_23_20)
--#define GPSR5_14	F_(HTX0,		IP12_19_16)
--#define GPSR5_13	F_(HRX0,		IP12_15_12)
--#define GPSR5_12	F_(HSCK0,		IP12_11_8)
--#define GPSR5_11	F_(RX2_A,		IP12_7_4)
--#define GPSR5_10	F_(TX2_A,		IP12_3_0)
--#define GPSR5_9		F_(SCK2,		IP11_31_28)
--#define GPSR5_8		F_(RTS1_N_TANS,		IP11_27_24)
--#define GPSR5_7		F_(CTS1_N,		IP11_23_20)
--#define GPSR5_6		F_(TX1_A,		IP11_19_16)
--#define GPSR5_5		F_(RX1_A,		IP11_15_12)
--#define GPSR5_4		F_(RTS0_N_TANS,		IP11_11_8)
--#define GPSR5_3		F_(CTS0_N,		IP11_7_4)
--#define GPSR5_2		F_(TX0,			IP11_3_0)
--#define GPSR5_1		F_(RX0,			IP10_31_28)
--#define GPSR5_0		F_(SCK0,		IP10_27_24)
-+#define GPSR5_16	F_(HRTS0_N,		IP13_27_24)
-+#define GPSR5_15	F_(HCTS0_N,		IP13_23_20)
-+#define GPSR5_14	F_(HTX0,		IP13_19_16)
-+#define GPSR5_13	F_(HRX0,		IP13_15_12)
-+#define GPSR5_12	F_(HSCK0,		IP13_11_8)
-+#define GPSR5_11	F_(RX2_A,		IP13_7_4)
-+#define GPSR5_10	F_(TX2_A,		IP13_3_0)
-+#define GPSR5_9		F_(SCK2,		IP12_31_28)
-+#define GPSR5_8		F_(RTS1_N_TANS,		IP12_27_24)
-+#define GPSR5_7		F_(CTS1_N,		IP12_23_20)
-+#define GPSR5_6		F_(TX1_A,		IP12_19_16)
-+#define GPSR5_5		F_(RX1_A,		IP12_15_12)
-+#define GPSR5_4		F_(RTS0_N_TANS,		IP12_11_8)
-+#define GPSR5_3		F_(CTS0_N,		IP12_7_4)
-+#define GPSR5_2		F_(TX0,			IP12_3_0)
-+#define GPSR5_1		F_(RX0,			IP11_31_28)
-+#define GPSR5_0		F_(SCK0,		IP11_27_24)
- 
- /* GPSR6 */
--#define GPSR6_31	F_(USB31_OVC,		IP17_7_4)
--#define GPSR6_30	F_(USB31_PWEN,		IP17_3_0)
--#define GPSR6_29	F_(USB30_OVC,		IP16_31_28)
--#define GPSR6_28	F_(USB30_PWEN,		IP16_27_24)
--#define GPSR6_27	F_(USB1_OVC,		IP16_23_20)
--#define GPSR6_26	F_(USB1_PWEN,		IP16_19_16)
--#define GPSR6_25	F_(USB0_OVC,		IP16_15_12)
--#define GPSR6_24	F_(USB0_PWEN,		IP16_11_8)
--#define GPSR6_23	F_(AUDIO_CLKB_B,	IP16_7_4)
--#define GPSR6_22	F_(AUDIO_CLKA_A,	IP16_3_0)
--#define GPSR6_21	F_(SSI_SDATA9_A,	IP15_31_28)
--#define GPSR6_20	F_(SSI_SDATA8,		IP15_27_24)
--#define GPSR6_19	F_(SSI_SDATA7,		IP15_23_20)
--#define GPSR6_18	F_(SSI_WS78,		IP15_19_16)
--#define GPSR6_17	F_(SSI_SCK78,		IP15_15_12)
--#define GPSR6_16	F_(SSI_SDATA6,		IP15_11_8)
--#define GPSR6_15	F_(SSI_WS6,		IP15_7_4)
--#define GPSR6_14	F_(SSI_SCK6,		IP15_3_0)
-+#define GPSR6_31	F_(USB3_OVC,		IP18_7_4)
-+#define GPSR6_30	F_(USB3_PWEN,		IP18_3_0)
-+#define GPSR6_29	F_(USB30_OVC,		IP17_31_28)
-+#define GPSR6_28	F_(USB30_PWEN,		IP17_27_24)
-+#define GPSR6_27	F_(USB1_OVC,		IP17_23_20)
-+#define GPSR6_26	F_(USB1_PWEN,		IP17_19_16)
-+#define GPSR6_25	F_(USB0_OVC,		IP17_15_12)
-+#define GPSR6_24	F_(USB0_PWEN,		IP17_11_8)
-+#define GPSR6_23	F_(AUDIO_CLKB_B,	IP17_7_4)
-+#define GPSR6_22	F_(AUDIO_CLKA_A,	IP17_3_0)
-+#define GPSR6_21	F_(SSI_SDATA9_A,	IP16_31_28)
-+#define GPSR6_20	F_(SSI_SDATA8,		IP16_27_24)
-+#define GPSR6_19	F_(SSI_SDATA7,		IP16_23_20)
-+#define GPSR6_18	F_(SSI_WS78,		IP16_19_16)
-+#define GPSR6_17	F_(SSI_SCK78,		IP16_15_12)
-+#define GPSR6_16	F_(SSI_SDATA6,		IP16_11_8)
-+#define GPSR6_15	F_(SSI_WS6,		IP16_7_4)
-+#define GPSR6_14	F_(SSI_SCK6,		IP16_3_0)
- #define GPSR6_13	FM(SSI_SDATA5)
- #define GPSR6_12	FM(SSI_WS5)
- #define GPSR6_11	FM(SSI_SCK5)
--#define GPSR6_10	F_(SSI_SDATA4,		IP14_31_28)
--#define GPSR6_9		F_(SSI_WS4,		IP14_27_24)
--#define GPSR6_8		F_(SSI_SCK4,		IP14_23_20)
--#define GPSR6_7		F_(SSI_SDATA3,		IP14_19_16)
--#define GPSR6_6		F_(SSI_WS34,		IP14_15_12)
--#define GPSR6_5		F_(SSI_SCK34,		IP14_11_8)
--#define GPSR6_4		F_(SSI_SDATA2_A,	IP14_7_4)
--#define GPSR6_3		F_(SSI_SDATA1_A,	IP14_3_0)
--#define GPSR6_2		F_(SSI_SDATA0,		IP13_31_28)
--#define GPSR6_1		F_(SSI_WS01239,		IP13_27_24)
--#define GPSR6_0		F_(SSI_SCK01239,	IP13_23_20)
-+#define GPSR6_10	F_(SSI_SDATA4,		IP15_31_28)
-+#define GPSR6_9		F_(SSI_WS4,		IP15_27_24)
-+#define GPSR6_8		F_(SSI_SCK4,		IP15_23_20)
-+#define GPSR6_7		F_(SSI_SDATA3,		IP15_19_16)
-+#define GPSR6_6		F_(SSI_WS34,		IP15_15_12)
-+#define GPSR6_5		F_(SSI_SCK34,		IP15_11_8)
-+#define GPSR6_4		F_(SSI_SDATA2_A,	IP15_7_4)
-+#define GPSR6_3		F_(SSI_SDATA1_A,	IP15_3_0)
-+#define GPSR6_2		F_(SSI_SDATA0,		IP14_31_28)
-+#define GPSR6_1		F_(SSI_WS01239,		IP14_27_24)
-+#define GPSR6_0		F_(SSI_SCK01239,		IP14_23_20)
- 
- /* GPSR7 */
- #define GPSR7_3		FM(HDMI1_CEC)
-@@ -212,14 +213,14 @@
- #define IP0_7_4		FM(AVB_MAGIC)		F_(0, 0)	FM(MSIOF2_SS1_C)	FM(SCK4_A)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
- #define IP0_11_8	FM(AVB_PHY_INT)		F_(0, 0)	FM(MSIOF2_SYNC_C)	FM(RX4_A)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
- #define IP0_15_12	FM(AVB_LINK)		F_(0, 0)	FM(MSIOF2_SCK_C)	FM(TX4_A)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP0_19_16	FM(AVB_AVTP_MATCH_A)	F_(0, 0)	FM(MSIOF2_RXD_C)	FM(CTS4_N_A)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP0_19_16	FM(AVB_AVTP_MATCH_A)	F_(0, 0)	FM(MSIOF2_RXD_C)	FM(CTS4_N_A)			F_(0, 0)	FM(FSCLKST2_N_A) F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
- #define IP0_23_20	FM(AVB_AVTP_CAPTURE_A)	F_(0, 0)	FM(MSIOF2_TXD_C)	FM(RTS4_N_TANS_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP0_27_24	FM(IRQ0)		FM(QPOLB)	F_(0, 0)		FM(DU_CDE)			FM(VI4_DATA0_B)	FM(CAN0_TX_B)	FM(CANFD0_TX_B)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP0_31_28	FM(IRQ1)		FM(QPOLA)	F_(0, 0)		FM(DU_DISP)			FM(VI4_DATA1_B)	FM(CAN0_RX_B)	FM(CANFD0_RX_B)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP1_3_0		FM(IRQ2)		FM(QCPV_QDE)	F_(0, 0)		FM(DU_EXODDF_DU_ODDF_DISP_CDE)	FM(VI4_DATA2_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(PWM3_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP1_7_4		FM(IRQ3)		FM(QSTVB_QVE)	FM(A25)			FM(DU_DOTCLKOUT1)		FM(VI4_DATA3_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(PWM4_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP1_11_8	FM(IRQ4)		FM(QSTH_QHS)	FM(A24)			FM(DU_EXHSYNC_DU_HSYNC)		FM(VI4_DATA4_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(PWM5_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP1_15_12	FM(IRQ5)		FM(QSTB_QHE)	FM(A23)			FM(DU_EXVSYNC_DU_VSYNC)		FM(VI4_DATA5_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(PWM6_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP0_27_24	FM(IRQ0)		FM(QPOLB)	F_(0, 0)		FM(DU_CDE)			FM(VI4_DATA0_B) FM(CAN0_TX_B)	FM(CANFD0_TX_B)		FM(MSIOF3_SS1_E) F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP0_31_28	FM(IRQ1)		FM(QPOLA)	F_(0, 0)		FM(DU_DISP)			FM(VI4_DATA1_B) FM(CAN0_RX_B)	FM(CANFD0_RX_B)		FM(MSIOF3_SS2_E) F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP1_3_0		FM(IRQ2)		FM(QCPV_QDE)	F_(0, 0)		FM(DU_EXODDF_DU_ODDF_DISP_CDE)	FM(VI4_DATA2_B) F_(0, 0)	F_(0, 0)		FM(MSIOF3_SYNC_E) F_(0, 0)		FM(PWM3_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP1_7_4		FM(IRQ3)		FM(QSTVB_QVE)	FM(A25)			FM(DU_DOTCLKOUT1)		FM(VI4_DATA3_B) F_(0, 0)	F_(0, 0)		FM(MSIOF3_SCK_E) F_(0, 0)		FM(PWM4_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP1_11_8	FM(IRQ4)		FM(QSTH_QHS)	FM(A24)			FM(DU_EXHSYNC_DU_HSYNC)		FM(VI4_DATA4_B) F_(0, 0)	F_(0, 0)		FM(MSIOF3_RXD_E) F_(0, 0)		FM(PWM5_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP1_15_12	FM(IRQ5)		FM(QSTB_QHE)	FM(A23)			FM(DU_EXVSYNC_DU_VSYNC)		FM(VI4_DATA5_B) FM(FSCLKST2_N_B) F_(0, 0)		FM(MSIOF3_TXD_E) F_(0, 0)		FM(PWM6_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
- #define IP1_19_16	FM(PWM0)		FM(AVB_AVTP_PPS)FM(A22)			F_(0, 0)			FM(VI4_DATA6_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(IECLK_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
- #define IP1_23_20	FM(PWM1_A)		F_(0, 0)	FM(A21)			FM(HRX3_D)			FM(VI4_DATA7_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(IERX_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
- #define IP1_27_24	FM(PWM2_A)		F_(0, 0)	FM(A20)			FM(HTX3_D)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(IETX_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-@@ -279,79 +280,89 @@
- #define IP8_3_0		FM(SD0_DAT2)		F_(0, 0)	FM(MSIOF1_SS1_E)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT0_B)	FM(STP_ISD_0_B)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
- #define IP8_7_4		FM(SD0_DAT3)		F_(0, 0)	FM(MSIOF1_SS2_E)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN0_B)	FM(STP_ISEN_0_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
- #define IP8_11_8	FM(SD1_CLK)		F_(0, 0)	FM(MSIOF1_SCK_G)	F_(0, 0)			F_(0, 0)	FM(SIM0_CLK_A)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP8_15_12	FM(SD1_CMD)		F_(0, 0)	FM(MSIOF1_SYNC_G)	F_(0, 0)			F_(0, 0)	FM(SIM0_D_A)	FM(STP_IVCXO27_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP8_19_16	FM(SD1_DAT0)		FM(SD2_DAT4)	FM(MSIOF1_RXD_G)	F_(0, 0)			F_(0, 0)	FM(TS_SCK1_B)	FM(STP_ISCLK_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP8_23_20	FM(SD1_DAT1)		FM(SD2_DAT5)	FM(MSIOF1_TXD_G)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC1_B)FM(STP_ISSYNC_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP8_27_24	FM(SD1_DAT2)		FM(SD2_DAT6)	FM(MSIOF1_SS1_G)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT1_B)	FM(STP_ISD_1_B)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP8_31_28	FM(SD1_DAT3)		FM(SD2_DAT7)	FM(MSIOF1_SS2_G)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN1_B)	FM(STP_ISEN_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP9_3_0		FM(SD2_CLK)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP9_7_4		FM(SD2_DAT0)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP9_11_8	FM(SD2_DAT1)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP9_15_12	FM(SD2_DAT2)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP9_19_16	FM(SD2_DAT3)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP9_23_20	FM(SD2_DS)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(SATA_DEVSLP_B)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP9_27_24	FM(SD3_DAT4)		FM(SD2_CD_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP9_31_28	FM(SD3_DAT5)		FM(SD2_WP_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP10_3_0	FM(SD3_DAT6)		FM(SD3_CD)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP10_7_4	FM(SD3_DAT7)		FM(SD3_WP)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP10_11_8	FM(SD0_CD)		F_(0, 0)	F_(0, 0)		F_(0, 0)			FM(SCL2_B)	FM(SIM0_RST_A)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP10_15_12	FM(SD0_WP)		F_(0, 0)	F_(0, 0)		F_(0, 0)			FM(SDA2_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP10_19_16	FM(SD1_CD)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(SIM0_CLK_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP10_23_20	FM(SD1_WP)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(SIM0_D_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP10_27_24	FM(SCK0)		FM(HSCK1_B)	FM(MSIOF1_SS2_B)	FM(AUDIO_CLKC_B)		FM(SDA2_A)	FM(SIM0_RST_B)	FM(STP_OPWM_0_C)	FM(RIF0_CLK_B)	F_(0, 0)		FM(ADICHS2)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP10_31_28	FM(RX0)			FM(HRX1_B)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SCK0_C)	FM(STP_ISCLK_0_C)	FM(RIF0_D0_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP11_3_0	FM(TX0)			FM(HTX1_B)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC0_C)FM(STP_ISSYNC_0_C)	FM(RIF0_D1_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP11_7_4	FM(CTS0_N)		FM(HCTS1_N_B)	FM(MSIOF1_SYNC_B)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC1_C)FM(STP_ISSYNC_1_C)	FM(RIF1_SYNC_B)	FM(AUDIO_CLKOUT_C)	FM(ADICS_SAMP)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP11_11_8	FM(RTS0_N_TANS)		FM(HRTS1_N_B)	FM(MSIOF1_SS1_B)	FM(AUDIO_CLKA_B)		FM(SCL2_A)	F_(0, 0)	FM(STP_IVCXO27_1_C)	FM(RIF0_SYNC_B)	F_(0, 0)		FM(ADICHS1)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP11_15_12	FM(RX1_A)		FM(HRX1_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SDAT0_C)	FM(STP_ISD_0_C)		FM(RIF1_CLK_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP11_19_16	FM(TX1_A)		FM(HTX1_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SDEN0_C)	FM(STP_ISEN_0_C)	FM(RIF1_D0_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP11_23_20	FM(CTS1_N)		FM(HCTS1_N_A)	FM(MSIOF1_RXD_B)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN1_C)	FM(STP_ISEN_1_C)	FM(RIF1_D0_B)	F_(0, 0)		FM(ADIDATA)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP11_27_24	FM(RTS1_N_TANS)		FM(HRTS1_N_A)	FM(MSIOF1_TXD_B)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT1_C)	FM(STP_ISD_1_C)		FM(RIF1_D1_B)	F_(0, 0)		FM(ADICHS0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP11_31_28	FM(SCK2)		FM(SCIF_CLK_B)	FM(MSIOF1_SCK_B)	F_(0, 0)			F_(0, 0)	FM(TS_SCK1_C)	FM(STP_ISCLK_1_C)	FM(RIF1_CLK_B)	F_(0, 0)		FM(ADICLK)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP12_3_0	FM(TX2_A)		F_(0, 0)	F_(0, 0)		FM(SD2_CD_B)			FM(SCL1_A)	F_(0, 0)	FM(FMCLK_A)		FM(RIF1_D1_C)	F_(0, 0)		FM(FSO_CFE_0_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP12_7_4	FM(RX2_A)		F_(0, 0)	F_(0, 0)		FM(SD2_WP_B)			FM(SDA1_A)	F_(0, 0)	FM(FMIN_A)		FM(RIF1_SYNC_C)	F_(0, 0)		FM(FSO_CFE_1_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP12_11_8	FM(HSCK0)		F_(0, 0)	FM(MSIOF1_SCK_D)	FM(AUDIO_CLKB_A)		FM(SSI_SDATA1_B)FM(TS_SCK0_D)	FM(STP_ISCLK_0_D)	FM(RIF0_CLK_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP12_15_12	FM(HRX0)		F_(0, 0)	FM(MSIOF1_RXD_D)	F_(0, 0)			FM(SSI_SDATA2_B)FM(TS_SDEN0_D)	FM(STP_ISEN_0_D)	FM(RIF0_D0_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP12_19_16	FM(HTX0)		F_(0, 0)	FM(MSIOF1_TXD_D)	F_(0, 0)			FM(SSI_SDATA9_B)FM(TS_SDAT0_D)	FM(STP_ISD_0_D)		FM(RIF0_D1_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP12_23_20	FM(HCTS0_N)		FM(RX2_B)	FM(MSIOF1_SYNC_D)	F_(0, 0)			FM(SSI_SCK9_A)	FM(TS_SPSYNC0_D)FM(STP_ISSYNC_0_D)	FM(RIF0_SYNC_C)	FM(AUDIO_CLKOUT1_A)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP12_27_24	FM(HRTS0_N)		FM(TX2_B)	FM(MSIOF1_SS1_D)	F_(0, 0)			FM(SSI_WS9_A)	F_(0, 0)	FM(STP_IVCXO27_0_D)	FM(BPFCLK_A)	FM(AUDIO_CLKOUT2_A)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP8_15_12	FM(SD1_CMD)		F_(0, 0)	FM(MSIOF1_SYNC_G)	FM(NFCE_N_B)			F_(0, 0)	FM(SIM0_D_A)	FM(STP_IVCXO27_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP8_19_16	FM(SD1_DAT0)		FM(SD2_DAT4)	FM(MSIOF1_RXD_G)	FM(NFWP_N_B)			F_(0, 0)	FM(TS_SCK1_B)	FM(STP_ISCLK_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP8_23_20	FM(SD1_DAT1)		FM(SD2_DAT5)	FM(MSIOF1_TXD_G)	FM(NFDATA14_B)			F_(0, 0)	FM(TS_SPSYNC1_B)FM(STP_ISSYNC_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP8_27_24	FM(SD1_DAT2)		FM(SD2_DAT6)	FM(MSIOF1_SS1_G)	FM(NFDATA15_B)			F_(0, 0)	FM(TS_SDAT1_B)	FM(STP_ISD_1_B)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP8_31_28	FM(SD1_DAT3)		FM(SD2_DAT7)	FM(MSIOF1_SS2_G)	FM(NFRB_N_B)			F_(0, 0)	FM(TS_SDEN1_B)	FM(STP_ISEN_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_3_0		FM(SD2_CLK)		F_(0, 0)	F_(0, 0)		FM(NFDATA8)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_7_4		FM(SD2_CMD)		F_(0, 0)	F_(0, 0)		FM(NFDATA9)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_11_8	FM(SD2_DAT0)		F_(0, 0)	F_(0, 0)		FM(NFDATA10)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_15_12	FM(SD2_DAT1)		F_(0, 0)	F_(0, 0)		FM(NFDATA11)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_19_16	FM(SD2_DAT2)		F_(0, 0)	F_(0, 0)		FM(NFDATA12)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_23_20	FM(SD2_DAT3)		F_(0, 0)	F_(0, 0)		FM(NFDATA13)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_27_24	FM(SD2_DS)		F_(0, 0)	F_(0, 0)		FM(NFALE)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(SATA_DEVSLP_B)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP9_31_28	FM(SD3_CLK)		F_(0, 0)	F_(0, 0)		FM(NFWE_N)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_3_0	FM(SD3_CMD)		F_(0, 0)	F_(0, 0)		FM(NFRE_N)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_7_4	FM(SD3_DAT0)		F_(0, 0)	F_(0, 0)		FM(NFDATA0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_11_8	FM(SD3_DAT1)		F_(0, 0)	F_(0, 0)		FM(NFDATA1)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_15_12	FM(SD3_DAT2)		F_(0, 0)	F_(0, 0)		FM(NFDATA2)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_19_16	FM(SD3_DAT3)		F_(0, 0)	F_(0, 0)		FM(NFDATA3)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_23_20	FM(SD3_DAT4)		FM(SD2_CD_A)	F_(0, 0)		FM(NFDATA4)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_27_24	FM(SD3_DAT5)		FM(SD2_WP_A)	F_(0, 0)		FM(NFDATA5)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP10_31_28	FM(SD3_DAT6)		FM(SD3_CD)	F_(0, 0)		FM(NFDATA6)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_3_0	FM(SD3_DAT7)		FM(SD3_WP)	F_(0, 0)		FM(NFDATA7)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_7_4	FM(SD3_DS)		F_(0, 0)	F_(0, 0)		FM(NFCLE)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_11_8	FM(SD0_CD)		F_(0, 0)	FM(NFDATA14_A)		F_(0, 0)			FM(SCL2_B)	FM(SIM0_RST_A)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
- 
- /* IPSRx */		/* 0 */			/* 1 */		/* 2 */			/* 3 */				/* 4 */		/* 5 */		/* 6 */			/* 7 */		/* 8 */			/* 9 */		/* A */		/* B */		/* C - F */
--#define IP12_31_28	FM(MSIOF0_SYNC)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(AUDIO_CLKOUT_A)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP13_3_0	FM(MSIOF0_SS1)		FM(RX5)		F_(0, 0)		FM(AUDIO_CLKA_C)		FM(SSI_SCK2_A)	F_(0, 0)	FM(STP_IVCXO27_0_C)	F_(0, 0)	FM(AUDIO_CLKOUT3_A)	F_(0, 0)	FM(TCLK1_B)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP13_7_4	FM(MSIOF0_SS2)		FM(TX5)		FM(MSIOF1_SS2_D)	FM(AUDIO_CLKC_A)		FM(SSI_WS2_A)	F_(0, 0)	FM(STP_OPWM_0_D)	F_(0, 0)	FM(AUDIO_CLKOUT_D)	F_(0, 0)	FM(SPEEDIN_B)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP13_11_8	FM(MLB_CLK)		F_(0, 0)	FM(MSIOF1_SCK_F)	F_(0, 0)			FM(SCL1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP13_15_12	FM(MLB_SIG)		FM(RX1_B)	FM(MSIOF1_SYNC_F)	F_(0, 0)			FM(SDA1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP13_19_16	FM(MLB_DAT)		FM(TX1_B)	FM(MSIOF1_RXD_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP13_23_20	FM(SSI_SCK01239)	F_(0, 0)	FM(MSIOF1_TXD_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP13_27_24	FM(SSI_WS01239)		F_(0, 0)	FM(MSIOF1_SS1_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP13_31_28	FM(SSI_SDATA0)		F_(0, 0)	FM(MSIOF1_SS2_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP14_3_0	FM(SSI_SDATA1_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP14_7_4	FM(SSI_SDATA2_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)			FM(SSI_SCK1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP14_11_8	FM(SSI_SCK34)		F_(0, 0)	FM(MSIOF1_SS1_A)	F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_OPWM_0_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP14_15_12	FM(SSI_WS34)		FM(HCTS2_N_A)	FM(MSIOF1_SS2_A)	F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_IVCXO27_0_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP14_19_16	FM(SSI_SDATA3)		FM(HRTS2_N_A)	FM(MSIOF1_TXD_A)	F_(0, 0)			F_(0, 0)	FM(TS_SCK0_A)	FM(STP_ISCLK_0_A)	FM(RIF0_D1_A)	FM(RIF2_D0_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP14_23_20	FM(SSI_SCK4)		FM(HRX2_A)	FM(MSIOF1_SCK_A)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT0_A)	FM(STP_ISD_0_A)		FM(RIF0_CLK_A)	FM(RIF2_CLK_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP14_27_24	FM(SSI_WS4)		FM(HTX2_A)	FM(MSIOF1_SYNC_A)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN0_A)	FM(STP_ISEN_0_A)	FM(RIF0_SYNC_A)	FM(RIF2_SYNC_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP14_31_28	FM(SSI_SDATA4)		FM(HSCK2_A)	FM(MSIOF1_RXD_A)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC0_A)FM(STP_ISSYNC_0_A)	FM(RIF0_D0_A)	FM(RIF2_D1_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP15_3_0	FM(SSI_SCK6)		FM(USB2_PWEN)	F_(0, 0)		FM(SIM0_RST_D)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP15_7_4	FM(SSI_WS6)		FM(USB2_OVC)	F_(0, 0)		FM(SIM0_D_D)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP15_11_8	FM(SSI_SDATA6)		F_(0, 0)	F_(0, 0)		FM(SIM0_CLK_D)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(SATA_DEVSLP_A)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP15_15_12	FM(SSI_SCK78)		FM(HRX2_B)	FM(MSIOF1_SCK_C)	F_(0, 0)			F_(0, 0)	FM(TS_SCK1_A)	FM(STP_ISCLK_1_A)	FM(RIF1_CLK_A)	FM(RIF3_CLK_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP15_19_16	FM(SSI_WS78)		FM(HTX2_B)	FM(MSIOF1_SYNC_C)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT1_A)	FM(STP_ISD_1_A)		FM(RIF1_SYNC_A)	FM(RIF3_SYNC_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP15_23_20	FM(SSI_SDATA7)		FM(HCTS2_N_B)	FM(MSIOF1_RXD_C)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN1_A)	FM(STP_ISEN_1_A)	FM(RIF1_D0_A)	FM(RIF3_D0_A)		F_(0, 0)	FM(TCLK2_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP15_27_24	FM(SSI_SDATA8)		FM(HRTS2_N_B)	FM(MSIOF1_TXD_C)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC1_A)FM(STP_ISSYNC_1_A)	FM(RIF1_D1_A)	FM(RIF3_D1_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP15_31_28	FM(SSI_SDATA9_A)	FM(HSCK2_B)	FM(MSIOF1_SS1_C)	FM(HSCK1_A)			FM(SSI_WS1_B)	FM(SCK1)	FM(STP_IVCXO27_1_A)	FM(SCK5)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP16_3_0	FM(AUDIO_CLKA_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	FM(CC5_OSCOUT)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP16_7_4	FM(AUDIO_CLKB_B)	FM(SCIF_CLK_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_IVCXO27_1_D)	FM(REMOCON_A)	F_(0, 0)		F_(0, 0)	FM(TCLK1_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP16_11_8	FM(USB0_PWEN)		F_(0, 0)	F_(0, 0)		FM(SIM0_RST_C)			F_(0, 0)	FM(TS_SCK1_D)	FM(STP_ISCLK_1_D)	FM(BPFCLK_B)	FM(RIF3_CLK_B)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP16_15_12	FM(USB0_OVC)		F_(0, 0)	F_(0, 0)		FM(SIM0_D_C)			F_(0, 0)	FM(TS_SDAT1_D)	FM(STP_ISD_1_D)		F_(0, 0)	FM(RIF3_SYNC_B)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP16_19_16	FM(USB1_PWEN)		F_(0, 0)	F_(0, 0)		FM(SIM0_CLK_C)			FM(SSI_SCK1_A)	FM(TS_SCK0_E)	FM(STP_ISCLK_0_E)	FM(FMCLK_B)	FM(RIF2_CLK_B)		F_(0, 0)	FM(SPEEDIN_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP16_23_20	FM(USB1_OVC)		F_(0, 0)	FM(MSIOF1_SS2_C)	F_(0, 0)			FM(SSI_WS1_A)	FM(TS_SDAT0_E)	FM(STP_ISD_0_E)		FM(FMIN_B)	FM(RIF2_SYNC_B)		F_(0, 0)	FM(REMOCON_B)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP16_27_24	FM(USB30_PWEN)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT_B)		FM(SSI_SCK2_B)	FM(TS_SDEN1_D)	FM(STP_ISEN_1_D)	FM(STP_OPWM_0_E)FM(RIF3_D0_B)		F_(0, 0)	FM(TCLK2_B)	FM(TPU0TO0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP16_31_28	FM(USB30_OVC)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT1_B)		FM(SSI_WS2_B)	FM(TS_SPSYNC1_D)FM(STP_ISSYNC_1_D)	FM(STP_IVCXO27_0_E)FM(RIF3_D1_B)	F_(0, 0)	FM(FSO_TOE_B)	FM(TPU0TO1)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP17_3_0	FM(USB31_PWEN)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT2_B)		FM(SSI_SCK9_B)	FM(TS_SDEN0_E)	FM(STP_ISEN_0_E)	F_(0, 0)	FM(RIF2_D0_B)		F_(0, 0)	F_(0, 0)	FM(TPU0TO2)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
--#define IP17_7_4	FM(USB31_OVC)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT3_B)		FM(SSI_WS9_B)	FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E)	F_(0, 0)	FM(RIF2_D1_B)		F_(0, 0)	F_(0, 0)	FM(TPU0TO3)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_15_12	FM(SD0_WP)		F_(0, 0)	FM(NFDATA15_A)		F_(0, 0)			FM(SDA2_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_19_16	FM(SD1_CD)		F_(0, 0)	FM(NFRB_N_A)		F_(0, 0)			F_(0, 0)	FM(SIM0_CLK_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_23_20	FM(SD1_WP)		F_(0, 0)	FM(NFCE_N_A)		F_(0, 0)			F_(0, 0)	FM(SIM0_D_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_27_24	FM(SCK0)		FM(HSCK1_B)	FM(MSIOF1_SS2_B)	FM(AUDIO_CLKC_B)		FM(SDA2_A)	FM(SIM0_RST_B)	FM(STP_OPWM_0_C)	FM(RIF0_CLK_B)	F_(0, 0)		FM(ADICHS2)	FM(SCK5_B)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP11_31_28	FM(RX0)			FM(HRX1_B)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SCK0_C)	FM(STP_ISCLK_0_C)	FM(RIF0_D0_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP12_3_0	FM(TX0)			FM(HTX1_B)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC0_C)FM(STP_ISSYNC_0_C)	FM(RIF0_D1_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP12_7_4	FM(CTS0_N)		FM(HCTS1_N_B)	FM(MSIOF1_SYNC_B)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC1_C)FM(STP_ISSYNC_1_C)	FM(RIF1_SYNC_B)	FM(AUDIO_CLKOUT_C)	FM(ADICS_SAMP)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP12_11_8	FM(RTS0_N_TANS)		FM(HRTS1_N_B)	FM(MSIOF1_SS1_B)	FM(AUDIO_CLKA_B)		FM(SCL2_A)	F_(0, 0)	FM(STP_IVCXO27_1_C)	FM(RIF0_SYNC_B)	F_(0, 0)		FM(ADICHS1)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP12_15_12	FM(RX1_A)		FM(HRX1_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SDAT0_C)	FM(STP_ISD_0_C)		FM(RIF1_CLK_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP12_19_16	FM(TX1_A)		FM(HTX1_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SDEN0_C)	FM(STP_ISEN_0_C)	FM(RIF1_D0_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP12_23_20	FM(CTS1_N)		FM(HCTS1_N_A)	FM(MSIOF1_RXD_B)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN1_C)	FM(STP_ISEN_1_C)	FM(RIF1_D0_B)	F_(0, 0)		FM(ADIDATA)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP12_27_24	FM(RTS1_N_TANS)		FM(HRTS1_N_A)	FM(MSIOF1_TXD_B)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT1_C)	FM(STP_ISD_1_C)		FM(RIF1_D1_B)	F_(0, 0)		FM(ADICHS0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP12_31_28	FM(SCK2)		FM(SCIF_CLK_B)	FM(MSIOF1_SCK_B)	F_(0, 0)			F_(0, 0)	FM(TS_SCK1_C)	FM(STP_ISCLK_1_C)	FM(RIF1_CLK_B)	F_(0, 0)		FM(ADICLK)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_3_0	FM(TX2_A)		F_(0, 0)	F_(0, 0)		FM(SD2_CD_B)			FM(SCL1_A)	F_(0, 0)	FM(FMCLK_A)		FM(RIF1_D1_C)	F_(0, 0)		FM(FSO_CFE_0_N)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_7_4	FM(RX2_A)		F_(0, 0)	F_(0, 0)		FM(SD2_WP_B)			FM(SDA1_A)	F_(0, 0)	FM(FMIN_A)		FM(RIF1_SYNC_C)	F_(0, 0)		FM(FSO_CFE_1_N)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_11_8	FM(HSCK0)		F_(0, 0)	FM(MSIOF1_SCK_D)	FM(AUDIO_CLKB_A)		FM(SSI_SDATA1_B)FM(TS_SCK0_D)	FM(STP_ISCLK_0_D)	FM(RIF0_CLK_C)	F_(0, 0)		F_(0, 0)	FM(RX5_B)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_15_12	FM(HRX0)		F_(0, 0)	FM(MSIOF1_RXD_D)	F_(0, 0)			FM(SSI_SDATA2_B)FM(TS_SDEN0_D)	FM(STP_ISEN_0_D)	FM(RIF0_D0_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_19_16	FM(HTX0)		F_(0, 0)	FM(MSIOF1_TXD_D)	F_(0, 0)			FM(SSI_SDATA9_B)FM(TS_SDAT0_D)	FM(STP_ISD_0_D)		FM(RIF0_D1_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_23_20	FM(HCTS0_N)		FM(RX2_B)	FM(MSIOF1_SYNC_D)	F_(0, 0)			FM(SSI_SCK9_A)	FM(TS_SPSYNC0_D)FM(STP_ISSYNC_0_D)	FM(RIF0_SYNC_C)	FM(AUDIO_CLKOUT1_A)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_27_24	FM(HRTS0_N)		FM(TX2_B)	FM(MSIOF1_SS1_D)	F_(0, 0)			FM(SSI_WS9_A)	F_(0, 0)	FM(STP_IVCXO27_0_D)	FM(BPFCLK_A)	FM(AUDIO_CLKOUT2_A)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP13_31_28	FM(MSIOF0_SYNC)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(AUDIO_CLKOUT_A)	F_(0, 0)	FM(TX5_B)	F_(0, 0)	F_(0, 0) FM(BPFCLK_D) F_(0, 0) F_(0, 0)
-+#define IP14_3_0	FM(MSIOF0_SS1)		FM(RX5_A)	FM(NFWP_N_A)		FM(AUDIO_CLKA_C)		FM(SSI_SCK2_A)	F_(0, 0)	FM(STP_IVCXO27_0_C)	F_(0, 0)	FM(AUDIO_CLKOUT3_A)	F_(0, 0)	FM(TCLK1_B)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP14_7_4	FM(MSIOF0_SS2)		FM(TX5_A)	FM(MSIOF1_SS2_D)	FM(AUDIO_CLKC_A)		FM(SSI_WS2_A)	F_(0, 0)	FM(STP_OPWM_0_D)	F_(0, 0)	FM(AUDIO_CLKOUT_D)	F_(0, 0)	FM(SPEEDIN_B)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP14_11_8	FM(MLB_CLK)		F_(0, 0)	FM(MSIOF1_SCK_F)	F_(0, 0)			FM(SCL1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP14_15_12	FM(MLB_SIG)		FM(RX1_B)	FM(MSIOF1_SYNC_F)	F_(0, 0)			FM(SDA1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP14_19_16	FM(MLB_DAT)		FM(TX1_B)	FM(MSIOF1_RXD_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP14_23_20	FM(SSI_SCK01239)	F_(0, 0)	FM(MSIOF1_TXD_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP14_27_24	FM(SSI_WS01239)		F_(0, 0)	FM(MSIOF1_SS1_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+
-+/* IPSRx */		/* 0 */			/* 1 */		/* 2 */			/* 3 */				/* 4 */		/* 5 */		/* 6 */			/* 7 */		/* 8 */			/* 9 */		/* A */		/* B */		/* C - F */
-+#define IP14_31_28	FM(SSI_SDATA0)		F_(0, 0)	FM(MSIOF1_SS2_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_3_0	FM(SSI_SDATA1_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_7_4	FM(SSI_SDATA2_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)			FM(SSI_SCK1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_11_8	FM(SSI_SCK34)		F_(0, 0)	FM(MSIOF1_SS1_A)	F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_OPWM_0_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_15_12	FM(SSI_WS34)		FM(HCTS2_N_A)	FM(MSIOF1_SS2_A)	F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_IVCXO27_0_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_19_16	FM(SSI_SDATA3)		FM(HRTS2_N_A)	FM(MSIOF1_TXD_A)	F_(0, 0)			F_(0, 0)	FM(TS_SCK0_A)	FM(STP_ISCLK_0_A)	FM(RIF0_D1_A)	FM(RIF2_D0_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_23_20	FM(SSI_SCK4)		FM(HRX2_A)	FM(MSIOF1_SCK_A)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT0_A)	FM(STP_ISD_0_A)		FM(RIF0_CLK_A)	FM(RIF2_CLK_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_27_24	FM(SSI_WS4)		FM(HTX2_A)	FM(MSIOF1_SYNC_A)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN0_A)	FM(STP_ISEN_0_A)	FM(RIF0_SYNC_A)	FM(RIF2_SYNC_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP15_31_28	FM(SSI_SDATA4)		FM(HSCK2_A)	FM(MSIOF1_RXD_A)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC0_A)FM(STP_ISSYNC_0_A)	FM(RIF0_D0_A)	FM(RIF2_D1_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_3_0	FM(SSI_SCK6)		FM(USB2_PWEN)	F_(0, 0)		FM(SIM0_RST_D)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_7_4	FM(SSI_WS6)		FM(USB2_OVC)	F_(0, 0)		FM(SIM0_D_D)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_11_8	FM(SSI_SDATA6)		F_(0, 0)	F_(0, 0)		FM(SIM0_CLK_D)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(SATA_DEVSLP_A)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_15_12	FM(SSI_SCK78)		FM(HRX2_B)	FM(MSIOF1_SCK_C)	F_(0, 0)			F_(0, 0)	FM(TS_SCK1_A)	FM(STP_ISCLK_1_A)	FM(RIF1_CLK_A)	FM(RIF3_CLK_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_19_16	FM(SSI_WS78)		FM(HTX2_B)	FM(MSIOF1_SYNC_C)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT1_A)	FM(STP_ISD_1_A)		FM(RIF1_SYNC_A)	FM(RIF3_SYNC_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_23_20	FM(SSI_SDATA7)		FM(HCTS2_N_B)	FM(MSIOF1_RXD_C)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN1_A)	FM(STP_ISEN_1_A)	FM(RIF1_D0_A)	FM(RIF3_D0_A)		F_(0, 0)	FM(TCLK2_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_27_24	FM(SSI_SDATA8)		FM(HRTS2_N_B)	FM(MSIOF1_TXD_C)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC1_A)FM(STP_ISSYNC_1_A)	FM(RIF1_D1_A)	FM(RIF3_D1_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP16_31_28	FM(SSI_SDATA9_A)	FM(HSCK2_B)	FM(MSIOF1_SS1_C)	FM(HSCK1_A)			FM(SSI_WS1_B)	FM(SCK1)	FM(STP_IVCXO27_1_A)	FM(SCK5_A)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP17_3_0	FM(AUDIO_CLKA_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	FM(CC5_OSCOUT)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP17_7_4	FM(AUDIO_CLKB_B)	FM(SCIF_CLK_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_IVCXO27_1_D)	FM(REMOCON_A)	F_(0, 0)		F_(0, 0)	FM(TCLK1_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP17_11_8	FM(USB0_PWEN)		F_(0, 0)	F_(0, 0)		FM(SIM0_RST_C)			F_(0, 0)	FM(TS_SCK1_D)	FM(STP_ISCLK_1_D)	FM(BPFCLK_B)	FM(RIF3_CLK_B)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) FM(HSCK2_C) F_(0, 0) F_(0, 0)
-+#define IP17_15_12	FM(USB0_OVC)		F_(0, 0)	F_(0, 0)		FM(SIM0_D_C)			F_(0, 0)	FM(TS_SDAT1_D)	FM(STP_ISD_1_D)		F_(0, 0)	FM(RIF3_SYNC_B)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) FM(HRX2_C) F_(0, 0) F_(0, 0)
-+#define IP17_19_16	FM(USB1_PWEN)		F_(0, 0)	F_(0, 0)		FM(SIM0_CLK_C)			FM(SSI_SCK1_A)	FM(TS_SCK0_E)	FM(STP_ISCLK_0_E)	FM(FMCLK_B)	FM(RIF2_CLK_B)		F_(0, 0)	FM(SPEEDIN_A)	F_(0, 0)	F_(0, 0) FM(HTX2_C) F_(0, 0) F_(0, 0)
-+#define IP17_23_20	FM(USB1_OVC)		F_(0, 0)	FM(MSIOF1_SS2_C)	F_(0, 0)			FM(SSI_WS1_A)	FM(TS_SDAT0_E)	FM(STP_ISD_0_E)		FM(FMIN_B)	FM(RIF2_SYNC_B)		F_(0, 0)	FM(REMOCON_B)	F_(0, 0)	F_(0, 0) FM(HCTS2_N_C) F_(0, 0) F_(0, 0)
-+#define IP17_27_24	FM(USB30_PWEN)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT_B)		FM(SSI_SCK2_B)	FM(TS_SDEN1_D)	FM(STP_ISEN_1_D)	FM(STP_OPWM_0_E)FM(RIF3_D0_B)		F_(0, 0)	FM(TCLK2_B)	FM(TPU0TO0)	FM(BPFCLK_C) FM(HRTS2_N_C) F_(0, 0) F_(0, 0)
-+#define IP17_31_28	FM(USB30_OVC)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT1_B)		FM(SSI_WS2_B)	FM(TS_SPSYNC1_D)FM(STP_ISSYNC_1_D)	FM(STP_IVCXO27_0_E)FM(RIF3_D1_B)	F_(0, 0)	FM(FSO_TOE_N)	FM(TPU0TO1)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-+#define IP18_3_0	FM(USB3_PWEN)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT2_B)		FM(SSI_SCK9_B)	FM(TS_SDEN0_E)	FM(STP_ISEN_0_E)	F_(0, 0)	FM(RIF2_D0_B)		F_(0, 0)	F_(0, 0)	FM(TPU0TO2)	F_(0, 0) FM(FMCLK_C) FM(FMCLK_D) F_(0, 0)
-+#define IP18_7_4	FM(USB3_OVC)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT3_B)		FM(SSI_WS9_B)	FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E)	F_(0, 0)	FM(RIF2_D1_B)		F_(0, 0)	F_(0, 0)	FM(TPU0TO3)	F_(0, 0) FM(FMIN_C) FM(FMIN_D) F_(0, 0)
- 
- #define PINMUX_GPSR	\
- \
-@@ -426,37 +437,34 @@ FM(IP12_23_20)	IP12_23_20	FM(IP13_23_20)
- FM(IP12_27_24)	IP12_27_24	FM(IP13_27_24)	IP13_27_24	FM(IP14_27_24)	IP14_27_24	FM(IP15_27_24)	IP15_27_24 \
- FM(IP12_31_28)	IP12_31_28	FM(IP13_31_28)	IP13_31_28	FM(IP14_31_28)	IP14_31_28	FM(IP15_31_28)	IP15_31_28 \
- \
--FM(IP16_3_0)	IP16_3_0	FM(IP17_3_0)	IP17_3_0 \
--FM(IP16_7_4)	IP16_7_4	FM(IP17_7_4)	IP17_7_4 \
--FM(IP16_11_8)	IP16_11_8 \
--FM(IP16_15_12)	IP16_15_12 \
--FM(IP16_19_16)	IP16_19_16 \
--FM(IP16_23_20)	IP16_23_20 \
--FM(IP16_27_24)	IP16_27_24 \
--FM(IP16_31_28)	IP16_31_28
-+FM(IP16_3_0)	IP16_3_0	FM(IP17_3_0)	IP17_3_0	FM(IP18_3_0)	IP18_3_0 \
-+FM(IP16_7_4)	IP16_7_4	FM(IP17_7_4)	IP17_7_4	FM(IP18_7_4)	IP18_7_4 \
-+FM(IP16_11_8)	IP16_11_8	FM(IP17_11_8)	IP17_11_8 \
-+FM(IP16_15_12)	IP16_15_12	FM(IP17_15_12)	IP17_15_12 \
-+FM(IP16_19_16)	IP16_19_16	FM(IP17_19_16)	IP17_19_16 \
-+FM(IP16_23_20)	IP16_23_20	FM(IP17_23_20)	IP17_23_20 \
-+FM(IP16_27_24)	IP16_27_24	FM(IP17_27_24)	IP17_27_24 \
-+FM(IP16_31_28)	IP16_31_28	FM(IP17_31_28)	IP17_31_28
- 
- /* MOD_SEL0 */			/* 0 */			/* 1 */			/* 2 */			/* 3 */			/* 4 */			/* 5 */			/* 6 */			/* 7 */
--#define MOD_SEL0_30_29		FM(SEL_MSIOF3_0)	FM(SEL_MSIOF3_1)	FM(SEL_MSIOF3_2)	FM(SEL_MSIOF3_3)
-+#define MOD_SEL0_31_30_29	FM(SEL_MSIOF3_0)	FM(SEL_MSIOF3_1)	FM(SEL_MSIOF3_2)	FM(SEL_MSIOF3_3)	FM(SEL_MSIOF3_4)	F_(0, 0)		F_(0, 0)		F_(0, 0)
- #define MOD_SEL0_28_27		FM(SEL_MSIOF2_0)	FM(SEL_MSIOF2_1)	FM(SEL_MSIOF2_2)	FM(SEL_MSIOF2_3)
- #define MOD_SEL0_26_25_24	FM(SEL_MSIOF1_0)	FM(SEL_MSIOF1_1)	FM(SEL_MSIOF1_2)	FM(SEL_MSIOF1_3)	FM(SEL_MSIOF1_4)	FM(SEL_MSIOF1_5)	FM(SEL_MSIOF1_6)	F_(0, 0)
- #define MOD_SEL0_23		FM(SEL_LBSC_0)		FM(SEL_LBSC_1)
- #define MOD_SEL0_22		FM(SEL_IEBUS_0)		FM(SEL_IEBUS_1)
--#define MOD_SEL0_21_20		FM(SEL_I2C6_0)		FM(SEL_I2C6_1)		FM(SEL_I2C6_2)		F_(0, 0)
--#define MOD_SEL0_19		FM(SEL_I2C2_0)		FM(SEL_I2C2_1)
--#define MOD_SEL0_18		FM(SEL_I2C1_0)		FM(SEL_I2C1_1)
--#define MOD_SEL0_17		FM(SEL_HSCIF4_0)	FM(SEL_HSCIF4_1)
--#define MOD_SEL0_16_15		FM(SEL_HSCIF3_0)	FM(SEL_HSCIF3_1)	FM(SEL_HSCIF3_2)	FM(SEL_HSCIF3_3)
--#define MOD_SEL0_14		FM(SEL_HSCIF2_0)	FM(SEL_HSCIF2_1)
--#define MOD_SEL0_13		FM(SEL_HSCIF1_0)	FM(SEL_HSCIF1_1)
--#define MOD_SEL0_12		FM(SEL_FSO_0)		FM(SEL_FSO_1)
--#define MOD_SEL0_11		FM(SEL_FM_0)		FM(SEL_FM_1)
--#define MOD_SEL0_10		FM(SEL_ETHERAVB_0)	FM(SEL_ETHERAVB_1)
--#define MOD_SEL0_9		FM(SEL_DRIF3_0)		FM(SEL_DRIF3_1)
--#define MOD_SEL0_8		FM(SEL_DRIF2_0)		FM(SEL_DRIF2_1)
--#define MOD_SEL0_7_6		FM(SEL_DRIF1_0)		FM(SEL_DRIF1_1)		FM(SEL_DRIF1_2)		F_(0, 0)
--#define MOD_SEL0_5_4		FM(SEL_DRIF0_0)		FM(SEL_DRIF0_1)		FM(SEL_DRIF0_2)		F_(0, 0)
--#define MOD_SEL0_3		FM(SEL_CANFD0_0)	FM(SEL_CANFD0_1)
--#define MOD_SEL0_2_1		FM(SEL_ADG_0)		FM(SEL_ADG_1)		FM(SEL_ADG_2)		FM(SEL_ADG_3)
-+#define MOD_SEL0_21		FM(SEL_I2C2_0)		FM(SEL_I2C2_1)
-+#define MOD_SEL0_20		FM(SEL_I2C1_0)		FM(SEL_I2C1_1)
-+#define MOD_SEL0_19		FM(SEL_HSCIF4_0)	FM(SEL_HSCIF4_1)
-+#define MOD_SEL0_18_17		FM(SEL_HSCIF3_0)	FM(SEL_HSCIF3_1)	FM(SEL_HSCIF3_2)	FM(SEL_HSCIF3_3)
-+#define MOD_SEL0_16		FM(SEL_HSCIF1_0)	FM(SEL_HSCIF1_1)
-+#define MOD_SEL0_14_13		FM(SEL_HSCIF2_0)	FM(SEL_HSCIF2_1)	FM(SEL_HSCIF2_2)	F_(0, 0)
-+#define MOD_SEL0_12		FM(SEL_ETHERAVB_0)	FM(SEL_ETHERAVB_1)
-+#define MOD_SEL0_11		FM(SEL_DRIF3_0)		FM(SEL_DRIF3_1)
-+#define MOD_SEL0_10		FM(SEL_DRIF2_0)		FM(SEL_DRIF2_1)
-+#define MOD_SEL0_9_8		FM(SEL_DRIF1_0)		FM(SEL_DRIF1_1)		FM(SEL_DRIF1_2)		F_(0, 0)
-+#define MOD_SEL0_7_6		FM(SEL_DRIF0_0)		FM(SEL_DRIF0_1)		FM(SEL_DRIF0_2)		F_(0, 0)
-+#define MOD_SEL0_5		FM(SEL_CANFD0_0)	FM(SEL_CANFD0_1)
-+#define MOD_SEL0_4_3		FM(SEL_ADG_A_0)		FM(SEL_ADG_A_1)		FM(SEL_ADG_A_2)		FM(SEL_ADG_A_3)
- 
- /* MOD_SEL1 */			/* 0 */			/* 1 */			/* 2 */			/* 3 */			/* 4 */			/* 5 */			/* 6 */			/* 7 */
- #define MOD_SEL1_31_30		FM(SEL_TSIF1_0)		FM(SEL_TSIF1_1)		FM(SEL_TSIF1_2)		FM(SEL_TSIF1_3)
-@@ -486,40 +494,46 @@ FM(IP16_31_28)	IP16_31_28
- #define MOD_SEL2_31		FM(I2C_SEL_5_0)		FM(I2C_SEL_5_1)
- #define MOD_SEL2_30		FM(I2C_SEL_3_0)		FM(I2C_SEL_3_1)
- #define MOD_SEL2_29		FM(I2C_SEL_0_0)		FM(I2C_SEL_0_1)
-+#define MOD_SEL2_28_27		FM(SEL_FM_0)		FM(SEL_FM_1)		FM(SEL_FM_2)		FM(SEL_FM_3)
-+#define MOD_SEL2_26		FM(SEL_SCIF5_0)		FM(SEL_SCIF5_1)
-+#define MOD_SEL2_25_24_23	FM(SEL_I2C6_0)		FM(SEL_I2C6_1)		FM(SEL_I2C6_2)		F_(0, 0)		F_(0, 0)		F_(0, 0)		F_(0, 0)		F_(0, 0)
-+#define MOD_SEL2_22		FM(SEL_NDF_0)		FM(SEL_NDF_1)
-+#define MOD_SEL2_21		FM(SEL_SSI2_0)		FM(SEL_SSI2_1)
-+#define MOD_SEL2_20		FM(SEL_SSI9_0)		FM(SEL_SSI9_1)
-+#define MOD_SEL2_19		FM(SEL_TIMER_TMU2_0)	FM(SEL_TIMER_TMU2_1)
-+#define MOD_SEL2_18		FM(SEL_ADG_B_0)		FM(SEL_ADG_B_1)
-+#define MOD_SEL2_17		FM(SEL_ADG_C_0)		FM(SEL_ADG_C_1)
- #define MOD_SEL2_0		FM(SEL_VIN4_0)		FM(SEL_VIN4_1)
- 
--#define PINMUX_MOD_SELS\
-+#define PINMUX_MOD_SELS	\
- \
--			MOD_SEL1_31_30		MOD_SEL2_31 \
--MOD_SEL0_30_29					MOD_SEL2_30 \
-+MOD_SEL0_31_30_29	MOD_SEL1_31_30		MOD_SEL2_31 \
-+						MOD_SEL2_30 \
- 			MOD_SEL1_29_28_27	MOD_SEL2_29 \
--MOD_SEL0_28_27 \
--\
--MOD_SEL0_26_25_24	MOD_SEL1_26 \
--			MOD_SEL1_25_24 \
--\
-+MOD_SEL0_28_27					MOD_SEL2_28_27 \
-+MOD_SEL0_26_25_24	MOD_SEL1_26		MOD_SEL2_26 \
-+			MOD_SEL1_25_24		MOD_SEL2_25_24_23 \
- MOD_SEL0_23		MOD_SEL1_23_22_21 \
--MOD_SEL0_22 \
--MOD_SEL0_21_20 \
--			MOD_SEL1_20 \
--MOD_SEL0_19		MOD_SEL1_19 \
--MOD_SEL0_18		MOD_SEL1_18_17 \
--MOD_SEL0_17 \
--MOD_SEL0_16_15		MOD_SEL1_16 \
-+MOD_SEL0_22					MOD_SEL2_22 \
-+MOD_SEL0_21					MOD_SEL2_21 \
-+MOD_SEL0_20		MOD_SEL1_20		MOD_SEL2_20 \
-+MOD_SEL0_19		MOD_SEL1_19		MOD_SEL2_19 \
-+MOD_SEL0_18_17		MOD_SEL1_18_17		MOD_SEL2_18 \
-+						MOD_SEL2_17 \
-+MOD_SEL0_16		MOD_SEL1_16 \
- 			MOD_SEL1_15_14 \
--MOD_SEL0_14 \
--MOD_SEL0_13		MOD_SEL1_13 \
-+MOD_SEL0_14_13 \
-+			MOD_SEL1_13 \
- MOD_SEL0_12		MOD_SEL1_12 \
- MOD_SEL0_11		MOD_SEL1_11 \
- MOD_SEL0_10		MOD_SEL1_10 \
--MOD_SEL0_9		MOD_SEL1_9 \
--MOD_SEL0_8 \
-+MOD_SEL0_9_8		MOD_SEL1_9 \
- MOD_SEL0_7_6 \
- 			MOD_SEL1_6 \
--MOD_SEL0_5_4		MOD_SEL1_5 \
--			MOD_SEL1_4 \
--MOD_SEL0_3		MOD_SEL1_3 \
--MOD_SEL0_2_1		MOD_SEL1_2 \
-+MOD_SEL0_5		MOD_SEL1_5 \
-+MOD_SEL0_4_3		MOD_SEL1_4 \
-+			MOD_SEL1_3 \
-+			MOD_SEL1_2 \
- 			MOD_SEL1_1 \
- 			MOD_SEL1_0		MOD_SEL2_0
- 
-@@ -583,14 +597,6 @@ static const u16 pinmux_data[] = {
- 	PINMUX_SINGLE(MSIOF0_RXD),
- 	PINMUX_SINGLE(MSIOF0_SCK),
- 	PINMUX_SINGLE(MSIOF0_TXD),
--	PINMUX_SINGLE(SD2_CMD),
--	PINMUX_SINGLE(SD3_CLK),
--	PINMUX_SINGLE(SD3_CMD),
--	PINMUX_SINGLE(SD3_DAT0),
--	PINMUX_SINGLE(SD3_DAT1),
--	PINMUX_SINGLE(SD3_DAT2),
--	PINMUX_SINGLE(SD3_DAT3),
--	PINMUX_SINGLE(SD3_DS),
- 	PINMUX_SINGLE(SSI_SCK5),
- 	PINMUX_SINGLE(SSI_SDATA5),
- 	PINMUX_SINGLE(SSI_WS5),
-@@ -614,6 +620,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MSEL(IP0_19_16,	AVB_AVTP_MATCH_A,	SEL_ETHERAVB_0),
- 	PINMUX_IPSR_MSEL(IP0_19_16,	MSIOF2_RXD_C,		SEL_MSIOF2_2),
- 	PINMUX_IPSR_MSEL(IP0_19_16,	CTS4_N_A,		SEL_SCIF4_0),
-+	PINMUX_IPSR_GPSR(IP0_19_16,	FSCLKST2_N_A),
- 
- 	PINMUX_IPSR_MSEL(IP0_23_20,	AVB_AVTP_CAPTURE_A,	SEL_ETHERAVB_0),
- 	PINMUX_IPSR_MSEL(IP0_23_20,	MSIOF2_TXD_C,		SEL_MSIOF2_2),
-@@ -625,6 +632,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MSEL(IP0_27_24,	VI4_DATA0_B,		SEL_VIN4_1),
- 	PINMUX_IPSR_MSEL(IP0_27_24,	CAN0_TX_B,		SEL_RCAN0_1),
- 	PINMUX_IPSR_MSEL(IP0_27_24,	CANFD0_TX_B,		SEL_CANFD0_1),
-+	PINMUX_IPSR_MSEL(IP0_27_24,	MSIOF3_SS2_E,		SEL_MSIOF3_4),
- 
- 	PINMUX_IPSR_GPSR(IP0_31_28,	IRQ1),
- 	PINMUX_IPSR_GPSR(IP0_31_28,	QPOLA),
-@@ -632,6 +640,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MSEL(IP0_31_28,	VI4_DATA1_B,		SEL_VIN4_1),
- 	PINMUX_IPSR_MSEL(IP0_31_28,	CAN0_RX_B,		SEL_RCAN0_1),
- 	PINMUX_IPSR_MSEL(IP0_31_28,	CANFD0_RX_B,		SEL_CANFD0_1),
-+	PINMUX_IPSR_MSEL(IP0_31_28,	MSIOF3_SS1_E,		SEL_MSIOF3_4),
- 
- 	/* IPSR1 */
- 	PINMUX_IPSR_GPSR(IP1_3_0,	IRQ2),
-@@ -639,6 +648,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_GPSR(IP1_3_0,	DU_EXODDF_DU_ODDF_DISP_CDE),
- 	PINMUX_IPSR_MSEL(IP1_3_0,	VI4_DATA2_B,		SEL_VIN4_1),
- 	PINMUX_IPSR_MSEL(IP1_3_0,	PWM3_B,			SEL_PWM3_1),
-+	PINMUX_IPSR_MSEL(IP1_3_0,	MSIOF3_SYNC_E,		SEL_MSIOF3_4),
- 
- 	PINMUX_IPSR_GPSR(IP1_7_4,	IRQ3),
- 	PINMUX_IPSR_GPSR(IP1_7_4,	QSTVB_QVE),
-@@ -646,6 +656,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_GPSR(IP1_7_4,	DU_DOTCLKOUT1),
- 	PINMUX_IPSR_MSEL(IP1_7_4,	VI4_DATA3_B,		SEL_VIN4_1),
- 	PINMUX_IPSR_MSEL(IP1_7_4,	PWM4_B,			SEL_PWM4_1),
-+	PINMUX_IPSR_MSEL(IP1_7_4,	MSIOF3_SCK_E,		SEL_MSIOF3_4),
- 
- 	PINMUX_IPSR_GPSR(IP1_11_8,	IRQ4),
- 	PINMUX_IPSR_GPSR(IP1_11_8,	QSTH_QHS),
-@@ -653,6 +664,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_GPSR(IP1_11_8,	DU_EXHSYNC_DU_HSYNC),
- 	PINMUX_IPSR_MSEL(IP1_11_8,	VI4_DATA4_B,		SEL_VIN4_1),
- 	PINMUX_IPSR_MSEL(IP1_11_8,	PWM5_B,			SEL_PWM5_1),
-+	PINMUX_IPSR_MSEL(IP1_11_8,	MSIOF3_RXD_E,		SEL_MSIOF3_4),
- 
- 	PINMUX_IPSR_GPSR(IP1_15_12,	IRQ5),
- 	PINMUX_IPSR_GPSR(IP1_15_12,	QSTB_QHE),
-@@ -660,6 +672,8 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_GPSR(IP1_15_12,	DU_EXVSYNC_DU_VSYNC),
- 	PINMUX_IPSR_MSEL(IP1_15_12,	VI4_DATA5_B,		SEL_VIN4_1),
- 	PINMUX_IPSR_MSEL(IP1_15_12,	PWM6_B,			SEL_PWM6_1),
-+	PINMUX_IPSR_GPSR(IP1_15_12,	FSCLKST2_N_B),
-+	PINMUX_IPSR_MSEL(IP1_15_12,	MSIOF3_TXD_E,		SEL_MSIOF3_4),
- 
- 	PINMUX_IPSR_GPSR(IP1_19_16,	PWM0),
- 	PINMUX_IPSR_GPSR(IP1_19_16,	AVB_AVTP_PPS),
-@@ -1009,426 +1023,481 @@ static const u16 pinmux_data[] = {
- 
- 	PINMUX_IPSR_GPSR(IP8_15_12,	SD1_CMD),
- 	PINMUX_IPSR_MSEL(IP8_15_12,	MSIOF1_SYNC_G,		SEL_MSIOF1_6),
-+	PINMUX_IPSR_MSEL(IP8_15_12,	NFCE_N_B,		SEL_NDF_1),
- 	PINMUX_IPSR_MSEL(IP8_15_12,	SIM0_D_A,		SEL_SIMCARD_0),
- 	PINMUX_IPSR_MSEL(IP8_15_12,	STP_IVCXO27_1_B,	SEL_SSP1_1_1),
- 
- 	PINMUX_IPSR_GPSR(IP8_19_16,	SD1_DAT0),
- 	PINMUX_IPSR_GPSR(IP8_19_16,	SD2_DAT4),
- 	PINMUX_IPSR_MSEL(IP8_19_16,	MSIOF1_RXD_G,		SEL_MSIOF1_6),
-+	PINMUX_IPSR_MSEL(IP8_19_16,	NFWP_N_B,		SEL_NDF_1),
- 	PINMUX_IPSR_MSEL(IP8_19_16,	TS_SCK1_B,		SEL_TSIF1_1),
- 	PINMUX_IPSR_MSEL(IP8_19_16,	STP_ISCLK_1_B,		SEL_SSP1_1_1),
- 
- 	PINMUX_IPSR_GPSR(IP8_23_20,	SD1_DAT1),
- 	PINMUX_IPSR_GPSR(IP8_23_20,	SD2_DAT5),
- 	PINMUX_IPSR_MSEL(IP8_23_20,	MSIOF1_TXD_G,		SEL_MSIOF1_6),
-+	PINMUX_IPSR_MSEL(IP8_23_20,	NFDATA14_B,		SEL_NDF_1),
- 	PINMUX_IPSR_MSEL(IP8_23_20,	TS_SPSYNC1_B,		SEL_TSIF1_1),
- 	PINMUX_IPSR_MSEL(IP8_23_20,	STP_ISSYNC_1_B,		SEL_SSP1_1_1),
- 
- 	PINMUX_IPSR_GPSR(IP8_27_24,	SD1_DAT2),
- 	PINMUX_IPSR_GPSR(IP8_27_24,	SD2_DAT6),
- 	PINMUX_IPSR_MSEL(IP8_27_24,	MSIOF1_SS1_G,		SEL_MSIOF1_6),
-+	PINMUX_IPSR_MSEL(IP8_27_24,	NFDATA15_B,		SEL_NDF_1),
- 	PINMUX_IPSR_MSEL(IP8_27_24,	TS_SDAT1_B,		SEL_TSIF1_1),
- 	PINMUX_IPSR_MSEL(IP8_27_24,	STP_ISD_1_B,		SEL_SSP1_1_1),
- 
- 	PINMUX_IPSR_GPSR(IP8_31_28,	SD1_DAT3),
- 	PINMUX_IPSR_GPSR(IP8_31_28,	SD2_DAT7),
- 	PINMUX_IPSR_MSEL(IP8_31_28,	MSIOF1_SS2_G,		SEL_MSIOF1_6),
-+	PINMUX_IPSR_MSEL(IP8_31_28,	NFRB_N_B,		SEL_NDF_1),
- 	PINMUX_IPSR_MSEL(IP8_31_28,	TS_SDEN1_B,		SEL_TSIF1_1),
- 	PINMUX_IPSR_MSEL(IP8_31_28,	STP_ISEN_1_B,		SEL_SSP1_1_1),
- 
- 	/* IPSR9 */
- 	PINMUX_IPSR_GPSR(IP9_3_0,	SD2_CLK),
-+	PINMUX_IPSR_GPSR(IP9_3_0,	NFDATA8),
- 
--	PINMUX_IPSR_GPSR(IP9_7_4,	SD2_DAT0),
-+	PINMUX_IPSR_GPSR(IP9_7_4,	SD2_CMD),
-+	PINMUX_IPSR_GPSR(IP9_7_4,	NFDATA9),
- 
--	PINMUX_IPSR_GPSR(IP9_11_8,	SD2_DAT1),
-+	PINMUX_IPSR_GPSR(IP9_11_8,	SD2_DAT0),
-+	PINMUX_IPSR_GPSR(IP9_11_8,	NFDATA10),
- 
--	PINMUX_IPSR_GPSR(IP9_15_12,	SD2_DAT2),
-+	PINMUX_IPSR_GPSR(IP9_15_12,	SD2_DAT1),
-+	PINMUX_IPSR_GPSR(IP9_15_12,	NFDATA11),
- 
--	PINMUX_IPSR_GPSR(IP9_19_16,	SD2_DAT3),
-+	PINMUX_IPSR_GPSR(IP9_19_16,	SD2_DAT2),
-+	PINMUX_IPSR_GPSR(IP9_19_16,	NFDATA12),
- 
--	PINMUX_IPSR_GPSR(IP9_23_20,	SD2_DS),
--	PINMUX_IPSR_MSEL(IP9_23_20,	SATA_DEVSLP_B,		SEL_SATA_1),
-+	PINMUX_IPSR_GPSR(IP9_23_20,	SD2_DAT3),
-+	PINMUX_IPSR_GPSR(IP9_23_20,	NFDATA13),
- 
--	PINMUX_IPSR_GPSR(IP9_27_24,	SD3_DAT4),
--	PINMUX_IPSR_MSEL(IP9_27_24,	SD2_CD_A,		SEL_SDHI2_0),
-+	PINMUX_IPSR_GPSR(IP9_27_24,	SD2_DS),
-+	PINMUX_IPSR_GPSR(IP9_27_24,	NFALE),
-+	PINMUX_IPSR_GPSR(IP9_27_24,	SATA_DEVSLP_B),
- 
--	PINMUX_IPSR_GPSR(IP9_31_28,	SD3_DAT5),
--	PINMUX_IPSR_MSEL(IP9_31_28,	SD2_WP_A,		SEL_SDHI2_0),
-+	PINMUX_IPSR_GPSR(IP9_31_28,	SD3_CLK),
-+	PINMUX_IPSR_GPSR(IP9_31_28,	NFWE_N),
- 
- 	/* IPSR10 */
--	PINMUX_IPSR_GPSR(IP10_3_0,	SD3_DAT6),
--	PINMUX_IPSR_GPSR(IP10_3_0,	SD3_CD),
-+	PINMUX_IPSR_GPSR(IP10_3_0,	SD3_CMD),
-+	PINMUX_IPSR_GPSR(IP10_3_0,	NFRE_N),
- 
--	PINMUX_IPSR_GPSR(IP10_7_4,	SD3_DAT7),
--	PINMUX_IPSR_GPSR(IP10_7_4,	SD3_WP),
-+	PINMUX_IPSR_GPSR(IP10_7_4,	SD3_DAT0),
-+	PINMUX_IPSR_GPSR(IP10_7_4,	NFDATA0),
- 
--	PINMUX_IPSR_GPSR(IP10_11_8,	SD0_CD),
--	PINMUX_IPSR_MSEL(IP10_11_8,	SCL2_B,			SEL_I2C2_1),
--	PINMUX_IPSR_MSEL(IP10_11_8,	SIM0_RST_A,		SEL_SIMCARD_0),
--
--	PINMUX_IPSR_GPSR(IP10_15_12,	SD0_WP),
--	PINMUX_IPSR_MSEL(IP10_15_12,	SDA2_B,			SEL_I2C2_1),
--
--	PINMUX_IPSR_GPSR(IP10_19_16,	SD1_CD),
--	PINMUX_IPSR_MSEL(IP10_19_16,	SIM0_CLK_B,		SEL_SIMCARD_1),
--
--	PINMUX_IPSR_GPSR(IP10_23_20,	SD1_WP),
--	PINMUX_IPSR_MSEL(IP10_23_20,	SIM0_D_B,		SEL_SIMCARD_1),
--
--	PINMUX_IPSR_GPSR(IP10_27_24,	SCK0),
--	PINMUX_IPSR_MSEL(IP10_27_24,	HSCK1_B,		SEL_HSCIF1_1),
--	PINMUX_IPSR_MSEL(IP10_27_24,	MSIOF1_SS2_B,		SEL_MSIOF1_1),
--	PINMUX_IPSR_MSEL(IP10_27_24,	AUDIO_CLKC_B,		SEL_ADG_1),
--	PINMUX_IPSR_MSEL(IP10_27_24,	SDA2_A,			SEL_I2C2_0),
--	PINMUX_IPSR_MSEL(IP10_27_24,	SIM0_RST_B,		SEL_SIMCARD_1),
--	PINMUX_IPSR_MSEL(IP10_27_24,	STP_OPWM_0_C,		SEL_SSP1_0_2),
--	PINMUX_IPSR_MSEL(IP10_27_24,	RIF0_CLK_B,		SEL_DRIF0_1),
--	PINMUX_IPSR_GPSR(IP10_27_24,	ADICHS2),
--
--	PINMUX_IPSR_GPSR(IP10_31_28,	RX0),
--	PINMUX_IPSR_MSEL(IP10_31_28,	HRX1_B,			SEL_HSCIF1_1),
--	PINMUX_IPSR_MSEL(IP10_31_28,	TS_SCK0_C,		SEL_TSIF0_2),
--	PINMUX_IPSR_MSEL(IP10_31_28,	STP_ISCLK_0_C,		SEL_SSP1_0_2),
--	PINMUX_IPSR_MSEL(IP10_31_28,	RIF0_D0_B,		SEL_DRIF0_1),
-+	PINMUX_IPSR_GPSR(IP10_11_8,	SD3_DAT1),
-+	PINMUX_IPSR_GPSR(IP10_11_8,	NFDATA1),
- 
--	/* IPSR11 */
--	PINMUX_IPSR_GPSR(IP11_3_0,	TX0),
--	PINMUX_IPSR_MSEL(IP11_3_0,	HTX1_B,			SEL_HSCIF1_1),
--	PINMUX_IPSR_MSEL(IP11_3_0,	TS_SPSYNC0_C,		SEL_TSIF0_2),
--	PINMUX_IPSR_MSEL(IP11_3_0,	STP_ISSYNC_0_C,		SEL_SSP1_0_2),
--	PINMUX_IPSR_MSEL(IP11_3_0,	RIF0_D1_B,		SEL_DRIF0_1),
--
--	PINMUX_IPSR_GPSR(IP11_7_4,	CTS0_N),
--	PINMUX_IPSR_MSEL(IP11_7_4,	HCTS1_N_B,		SEL_HSCIF1_1),
--	PINMUX_IPSR_MSEL(IP11_7_4,	MSIOF1_SYNC_B,		SEL_MSIOF1_1),
--	PINMUX_IPSR_MSEL(IP11_7_4,	TS_SPSYNC1_C,		SEL_TSIF1_2),
--	PINMUX_IPSR_MSEL(IP11_7_4,	STP_ISSYNC_1_C,		SEL_SSP1_1_2),
--	PINMUX_IPSR_MSEL(IP11_7_4,	RIF1_SYNC_B,		SEL_DRIF1_1),
--	PINMUX_IPSR_MSEL(IP11_7_4,	AUDIO_CLKOUT_C,		SEL_ADG_2),
--	PINMUX_IPSR_GPSR(IP11_7_4,	ADICS_SAMP),
--
--	PINMUX_IPSR_GPSR(IP11_11_8,	RTS0_N_TANS),
--	PINMUX_IPSR_MSEL(IP11_11_8,	HRTS1_N_B,		SEL_HSCIF1_1),
--	PINMUX_IPSR_MSEL(IP11_11_8,	MSIOF1_SS1_B,		SEL_MSIOF1_1),
--	PINMUX_IPSR_MSEL(IP11_11_8,	AUDIO_CLKA_B,		SEL_ADG_1),
--	PINMUX_IPSR_MSEL(IP11_11_8,	SCL2_A,			SEL_I2C2_0),
--	PINMUX_IPSR_MSEL(IP11_11_8,	STP_IVCXO27_1_C,	SEL_SSP1_1_2),
--	PINMUX_IPSR_MSEL(IP11_11_8,	RIF0_SYNC_B,		SEL_DRIF0_1),
--	PINMUX_IPSR_GPSR(IP11_11_8,	ADICHS1),
--
--	PINMUX_IPSR_MSEL(IP11_15_12,	RX1_A,			SEL_SCIF1_0),
--	PINMUX_IPSR_MSEL(IP11_15_12,	HRX1_A,			SEL_HSCIF1_0),
--	PINMUX_IPSR_MSEL(IP11_15_12,	TS_SDAT0_C,		SEL_TSIF0_2),
--	PINMUX_IPSR_MSEL(IP11_15_12,	STP_ISD_0_C,		SEL_SSP1_0_2),
--	PINMUX_IPSR_MSEL(IP11_15_12,	RIF1_CLK_C,		SEL_DRIF1_2),
--
--	PINMUX_IPSR_MSEL(IP11_19_16,	TX1_A,			SEL_SCIF1_0),
--	PINMUX_IPSR_MSEL(IP11_19_16,	HTX1_A,			SEL_HSCIF1_0),
--	PINMUX_IPSR_MSEL(IP11_19_16,	TS_SDEN0_C,		SEL_TSIF0_2),
--	PINMUX_IPSR_MSEL(IP11_19_16,	STP_ISEN_0_C,		SEL_SSP1_0_2),
--	PINMUX_IPSR_MSEL(IP11_19_16,	RIF1_D0_C,		SEL_DRIF1_2),
--
--	PINMUX_IPSR_GPSR(IP11_23_20,	CTS1_N),
--	PINMUX_IPSR_MSEL(IP11_23_20,	HCTS1_N_A,		SEL_HSCIF1_0),
--	PINMUX_IPSR_MSEL(IP11_23_20,	MSIOF1_RXD_B,		SEL_MSIOF1_1),
--	PINMUX_IPSR_MSEL(IP11_23_20,	TS_SDEN1_C,		SEL_TSIF1_2),
--	PINMUX_IPSR_MSEL(IP11_23_20,	STP_ISEN_1_C,		SEL_SSP1_1_2),
--	PINMUX_IPSR_MSEL(IP11_23_20,	RIF1_D0_B,		SEL_DRIF1_1),
--	PINMUX_IPSR_GPSR(IP11_23_20,	ADIDATA),
--
--	PINMUX_IPSR_GPSR(IP11_27_24,	RTS1_N_TANS),
--	PINMUX_IPSR_MSEL(IP11_27_24,	HRTS1_N_A,		SEL_HSCIF1_0),
--	PINMUX_IPSR_MSEL(IP11_27_24,	MSIOF1_TXD_B,		SEL_MSIOF1_1),
--	PINMUX_IPSR_MSEL(IP11_27_24,	TS_SDAT1_C,		SEL_TSIF1_2),
--	PINMUX_IPSR_MSEL(IP11_27_24,	STP_ISD_1_C,		SEL_SSP1_1_2),
--	PINMUX_IPSR_MSEL(IP11_27_24,	RIF1_D1_B,		SEL_DRIF1_1),
--	PINMUX_IPSR_GPSR(IP11_27_24,	ADICHS0),
--
--	PINMUX_IPSR_GPSR(IP11_31_28,	SCK2),
--	PINMUX_IPSR_MSEL(IP11_31_28,	SCIF_CLK_B,		SEL_SCIF1_1),
--	PINMUX_IPSR_MSEL(IP11_31_28,	MSIOF1_SCK_B,		SEL_MSIOF1_1),
--	PINMUX_IPSR_MSEL(IP11_31_28,	TS_SCK1_C,		SEL_TSIF1_2),
--	PINMUX_IPSR_MSEL(IP11_31_28,	STP_ISCLK_1_C,		SEL_SSP1_1_2),
--	PINMUX_IPSR_MSEL(IP11_31_28,	RIF1_CLK_B,		SEL_DRIF1_1),
--	PINMUX_IPSR_GPSR(IP11_31_28,	ADICLK),
-+	PINMUX_IPSR_GPSR(IP10_15_12,	SD3_DAT2),
-+	PINMUX_IPSR_GPSR(IP10_15_12,	NFDATA2),
- 
--	/* IPSR12 */
--	PINMUX_IPSR_MSEL(IP12_3_0,	TX2_A,			SEL_SCIF2_0),
--	PINMUX_IPSR_MSEL(IP12_3_0,	SD2_CD_B,		SEL_SDHI2_1),
--	PINMUX_IPSR_MSEL(IP12_3_0,	SCL1_A,			SEL_I2C1_0),
--	PINMUX_IPSR_MSEL(IP12_3_0,	FMCLK_A,		SEL_FM_0),
--	PINMUX_IPSR_MSEL(IP12_3_0,	RIF1_D1_C,		SEL_DRIF1_2),
--	PINMUX_IPSR_MSEL(IP12_3_0,	FSO_CFE_0_B,		SEL_FSO_1),
--
--	PINMUX_IPSR_MSEL(IP12_7_4,	RX2_A,			SEL_SCIF2_0),
--	PINMUX_IPSR_MSEL(IP12_7_4,	SD2_WP_B,		SEL_SDHI2_1),
--	PINMUX_IPSR_MSEL(IP12_7_4,	SDA1_A,			SEL_I2C1_0),
--	PINMUX_IPSR_MSEL(IP12_7_4,	FMIN_A,			SEL_FM_0),
--	PINMUX_IPSR_MSEL(IP12_7_4,	RIF1_SYNC_C,		SEL_DRIF1_2),
--	PINMUX_IPSR_MSEL(IP12_7_4,	FSO_CFE_1_B,		SEL_FSO_1),
--
--	PINMUX_IPSR_GPSR(IP12_11_8,	HSCK0),
--	PINMUX_IPSR_MSEL(IP12_11_8,	MSIOF1_SCK_D,		SEL_MSIOF1_3),
--	PINMUX_IPSR_MSEL(IP12_11_8,	AUDIO_CLKB_A,		SEL_ADG_0),
--	PINMUX_IPSR_MSEL(IP12_11_8,	SSI_SDATA1_B,		SEL_SSI_1),
--	PINMUX_IPSR_MSEL(IP12_11_8,	TS_SCK0_D,		SEL_TSIF0_3),
--	PINMUX_IPSR_MSEL(IP12_11_8,	STP_ISCLK_0_D,		SEL_SSP1_0_3),
--	PINMUX_IPSR_MSEL(IP12_11_8,	RIF0_CLK_C,		SEL_DRIF0_2),
--
--	PINMUX_IPSR_GPSR(IP12_15_12,	HRX0),
--	PINMUX_IPSR_MSEL(IP12_15_12,	MSIOF1_RXD_D,		SEL_MSIOF1_3),
--	PINMUX_IPSR_MSEL(IP12_15_12,	SSI_SDATA2_B,		SEL_SSI_1),
--	PINMUX_IPSR_MSEL(IP12_15_12,	TS_SDEN0_D,		SEL_TSIF0_3),
--	PINMUX_IPSR_MSEL(IP12_15_12,	STP_ISEN_0_D,		SEL_SSP1_0_3),
--	PINMUX_IPSR_MSEL(IP12_15_12,	RIF0_D0_C,		SEL_DRIF0_2),
--
--	PINMUX_IPSR_GPSR(IP12_19_16,	HTX0),
--	PINMUX_IPSR_MSEL(IP12_19_16,	MSIOF1_TXD_D,		SEL_MSIOF1_3),
--	PINMUX_IPSR_MSEL(IP12_19_16,	SSI_SDATA9_B,		SEL_SSI_1),
--	PINMUX_IPSR_MSEL(IP12_19_16,	TS_SDAT0_D,		SEL_TSIF0_3),
--	PINMUX_IPSR_MSEL(IP12_19_16,	STP_ISD_0_D,		SEL_SSP1_0_3),
--	PINMUX_IPSR_MSEL(IP12_19_16,	RIF0_D1_C,		SEL_DRIF0_2),
--
--	PINMUX_IPSR_GPSR(IP12_23_20,	HCTS0_N),
--	PINMUX_IPSR_MSEL(IP12_23_20,	RX2_B,			SEL_SCIF2_1),
--	PINMUX_IPSR_MSEL(IP12_23_20,	MSIOF1_SYNC_D,		SEL_MSIOF1_3),
--	PINMUX_IPSR_MSEL(IP12_23_20,	SSI_SCK9_A,		SEL_SSI_0),
--	PINMUX_IPSR_MSEL(IP12_23_20,	TS_SPSYNC0_D,		SEL_TSIF0_3),
--	PINMUX_IPSR_MSEL(IP12_23_20,	STP_ISSYNC_0_D,		SEL_SSP1_0_3),
--	PINMUX_IPSR_MSEL(IP12_23_20,	RIF0_SYNC_C,		SEL_DRIF0_2),
--	PINMUX_IPSR_MSEL(IP12_23_20,	AUDIO_CLKOUT1_A,	SEL_ADG_0),
--
--	PINMUX_IPSR_GPSR(IP12_27_24,	HRTS0_N),
--	PINMUX_IPSR_MSEL(IP12_27_24,	TX2_B,			SEL_SCIF2_1),
--	PINMUX_IPSR_MSEL(IP12_27_24,	MSIOF1_SS1_D,		SEL_MSIOF1_3),
--	PINMUX_IPSR_MSEL(IP12_27_24,	SSI_WS9_A,		SEL_SSI_0),
--	PINMUX_IPSR_MSEL(IP12_27_24,	STP_IVCXO27_0_D,	SEL_SSP1_0_3),
--	PINMUX_IPSR_MSEL(IP12_27_24,	BPFCLK_A,		SEL_FM_0),
--	PINMUX_IPSR_MSEL(IP12_27_24,	AUDIO_CLKOUT2_A,	SEL_ADG_0),
-+	PINMUX_IPSR_GPSR(IP10_19_16,	SD3_DAT3),
-+	PINMUX_IPSR_GPSR(IP10_19_16,	NFDATA3),
- 
--	PINMUX_IPSR_GPSR(IP12_31_28,	MSIOF0_SYNC),
--	PINMUX_IPSR_MSEL(IP12_31_28,	AUDIO_CLKOUT_A,		SEL_ADG_0),
-+	PINMUX_IPSR_GPSR(IP10_23_20,	SD3_DAT4),
-+	PINMUX_IPSR_MSEL(IP10_23_20,	SD2_CD_A,		SEL_SDHI2_0),
-+	PINMUX_IPSR_GPSR(IP10_23_20,	NFDATA4),
- 
--	/* IPSR13 */
--	PINMUX_IPSR_GPSR(IP13_3_0,	MSIOF0_SS1),
--	PINMUX_IPSR_GPSR(IP13_3_0,	RX5),
--	PINMUX_IPSR_MSEL(IP13_3_0,	AUDIO_CLKA_C,		SEL_ADG_2),
--	PINMUX_IPSR_MSEL(IP13_3_0,	SSI_SCK2_A,		SEL_SSI_0),
--	PINMUX_IPSR_MSEL(IP13_3_0,	STP_IVCXO27_0_C,	SEL_SSP1_0_2),
--	PINMUX_IPSR_MSEL(IP13_3_0,	AUDIO_CLKOUT3_A,	SEL_ADG_0),
--	PINMUX_IPSR_MSEL(IP13_3_0,	TCLK1_B,		SEL_TIMER_TMU_1),
--
--	PINMUX_IPSR_GPSR(IP13_7_4,	MSIOF0_SS2),
--	PINMUX_IPSR_GPSR(IP13_7_4,	TX5),
--	PINMUX_IPSR_MSEL(IP13_7_4,	MSIOF1_SS2_D,		SEL_MSIOF1_3),
--	PINMUX_IPSR_MSEL(IP13_7_4,	AUDIO_CLKC_A,		SEL_ADG_0),
--	PINMUX_IPSR_MSEL(IP13_7_4,	SSI_WS2_A,		SEL_SSI_0),
--	PINMUX_IPSR_MSEL(IP13_7_4,	STP_OPWM_0_D,		SEL_SSP1_0_3),
--	PINMUX_IPSR_MSEL(IP13_7_4,	AUDIO_CLKOUT_D,		SEL_ADG_3),
--	PINMUX_IPSR_MSEL(IP13_7_4,	SPEEDIN_B,		SEL_SPEED_PULSE_1),
--
--	PINMUX_IPSR_GPSR(IP13_11_8,	MLB_CLK),
--	PINMUX_IPSR_MSEL(IP13_11_8,	MSIOF1_SCK_F,		SEL_MSIOF1_5),
--	PINMUX_IPSR_MSEL(IP13_11_8,	SCL1_B,			SEL_I2C1_1),
--
--	PINMUX_IPSR_GPSR(IP13_15_12,	MLB_SIG),
--	PINMUX_IPSR_MSEL(IP13_15_12,	RX1_B,			SEL_SCIF1_1),
--	PINMUX_IPSR_MSEL(IP13_15_12,	MSIOF1_SYNC_F,		SEL_MSIOF1_5),
--	PINMUX_IPSR_MSEL(IP13_15_12,	SDA1_B,			SEL_I2C1_1),
--
--	PINMUX_IPSR_GPSR(IP13_19_16,	MLB_DAT),
--	PINMUX_IPSR_MSEL(IP13_19_16,	TX1_B,			SEL_SCIF1_1),
--	PINMUX_IPSR_MSEL(IP13_19_16,	MSIOF1_RXD_F,		SEL_MSIOF1_5),
-+	PINMUX_IPSR_GPSR(IP10_27_24,	SD3_DAT5),
-+	PINMUX_IPSR_MSEL(IP10_27_24,	SD2_WP_A,		SEL_SDHI2_0),
-+	PINMUX_IPSR_GPSR(IP10_27_24,	NFDATA5),
-+
-+	PINMUX_IPSR_GPSR(IP10_31_28,	SD3_DAT6),
-+	PINMUX_IPSR_GPSR(IP10_31_28,	SD3_CD),
-+	PINMUX_IPSR_GPSR(IP10_31_28,	NFDATA6),
- 
--	PINMUX_IPSR_GPSR(IP13_23_20,	SSI_SCK01239),
--	PINMUX_IPSR_MSEL(IP13_23_20,	MSIOF1_TXD_F,		SEL_MSIOF1_5),
-+	/* IPSR11 */
-+	PINMUX_IPSR_GPSR(IP11_3_0,	SD3_DAT7),
-+	PINMUX_IPSR_GPSR(IP11_3_0,	SD3_WP),
-+	PINMUX_IPSR_GPSR(IP11_3_0,	NFDATA7),
-+
-+	PINMUX_IPSR_GPSR(IP11_7_4,	SD3_DS),
-+	PINMUX_IPSR_GPSR(IP11_7_4,	NFCLE),
-+
-+	PINMUX_IPSR_GPSR(IP11_11_8,	SD0_CD),
-+	PINMUX_IPSR_MSEL(IP11_11_8,	SCL2_B,			SEL_I2C2_1),
-+	PINMUX_IPSR_MSEL(IP11_11_8,	SIM0_RST_A,		SEL_SIMCARD_0),
-+
-+	PINMUX_IPSR_GPSR(IP11_15_12,	SD0_WP),
-+	PINMUX_IPSR_MSEL(IP11_15_12,	SDA2_B,			SEL_I2C2_1),
-+
-+	PINMUX_IPSR_GPSR(IP11_19_16,	SD1_CD),
-+	PINMUX_IPSR_MSEL(IP11_19_16,	SIM0_CLK_B,		SEL_SIMCARD_1),
-+
-+	PINMUX_IPSR_GPSR(IP11_23_20,	SD1_WP),
-+	PINMUX_IPSR_MSEL(IP11_23_20,	SIM0_D_B,		SEL_SIMCARD_1),
-+
-+	PINMUX_IPSR_GPSR(IP11_27_24,	SCK0),
-+	PINMUX_IPSR_MSEL(IP11_27_24,	HSCK1_B,		SEL_HSCIF1_1),
-+	PINMUX_IPSR_MSEL(IP11_27_24,	MSIOF1_SS2_B,		SEL_MSIOF1_1),
-+	PINMUX_IPSR_MSEL(IP11_27_24,	AUDIO_CLKC_B,		SEL_ADG_C_1),
-+	PINMUX_IPSR_MSEL(IP11_27_24,	SDA2_A,			SEL_I2C2_0),
-+	PINMUX_IPSR_MSEL(IP11_27_24,	SIM0_RST_B,		SEL_SIMCARD_1),
-+	PINMUX_IPSR_MSEL(IP11_27_24,	STP_OPWM_0_C,		SEL_SSP1_0_2),
-+	PINMUX_IPSR_MSEL(IP11_27_24,	RIF0_CLK_B,		SEL_DRIF0_1),
-+	PINMUX_IPSR_GPSR(IP11_27_24,	ADICHS2),
-+	PINMUX_IPSR_MSEL(IP11_27_24,	SCK5_B,			SEL_SCIF5_1),
-+
-+	PINMUX_IPSR_GPSR(IP11_31_28,	RX0),
-+	PINMUX_IPSR_MSEL(IP11_31_28,	HRX1_B,			SEL_HSCIF1_1),
-+	PINMUX_IPSR_MSEL(IP11_31_28,	TS_SCK0_C,		SEL_TSIF0_2),
-+	PINMUX_IPSR_MSEL(IP11_31_28,	STP_ISCLK_0_C,		SEL_SSP1_0_2),
-+	PINMUX_IPSR_MSEL(IP11_31_28,	RIF0_D0_B,		SEL_DRIF0_1),
- 
--	PINMUX_IPSR_GPSR(IP13_27_24,	SSI_WS01239),
--	PINMUX_IPSR_MSEL(IP13_27_24,	MSIOF1_SS1_F,		SEL_MSIOF1_5),
-+	/* IPSR12 */
-+	PINMUX_IPSR_GPSR(IP12_3_0,	TX0),
-+	PINMUX_IPSR_MSEL(IP12_3_0,	HTX1_B,			SEL_HSCIF1_1),
-+	PINMUX_IPSR_MSEL(IP12_3_0,	TS_SPSYNC0_C,		SEL_TSIF0_2),
-+	PINMUX_IPSR_MSEL(IP12_3_0,	STP_ISSYNC_0_C,		SEL_SSP1_0_2),
-+	PINMUX_IPSR_MSEL(IP12_3_0,	RIF0_D1_B,		SEL_DRIF0_1),
-+
-+	PINMUX_IPSR_GPSR(IP12_7_4,	CTS0_N),
-+	PINMUX_IPSR_MSEL(IP12_7_4,	HCTS1_N_B,		SEL_HSCIF1_1),
-+	PINMUX_IPSR_MSEL(IP12_7_4,	MSIOF1_SYNC_B,		SEL_MSIOF1_1),
-+	PINMUX_IPSR_MSEL(IP12_7_4,	TS_SPSYNC1_C,		SEL_TSIF1_2),
-+	PINMUX_IPSR_MSEL(IP12_7_4,	STP_ISSYNC_1_C,		SEL_SSP1_1_2),
-+	PINMUX_IPSR_MSEL(IP12_7_4,	RIF1_SYNC_B,		SEL_DRIF1_1),
-+	PINMUX_IPSR_GPSR(IP12_7_4,	AUDIO_CLKOUT_C),
-+	PINMUX_IPSR_GPSR(IP12_7_4,	ADICS_SAMP),
-+
-+	PINMUX_IPSR_GPSR(IP12_11_8,	RTS0_N_TANS),
-+	PINMUX_IPSR_MSEL(IP12_11_8,	HRTS1_N_B,		SEL_HSCIF1_1),
-+	PINMUX_IPSR_MSEL(IP12_11_8,	MSIOF1_SS1_B,		SEL_MSIOF1_1),
-+	PINMUX_IPSR_MSEL(IP12_11_8,	AUDIO_CLKA_B,		SEL_ADG_A_1),
-+	PINMUX_IPSR_MSEL(IP12_11_8,	SCL2_A,			SEL_I2C2_0),
-+	PINMUX_IPSR_MSEL(IP12_11_8,	STP_IVCXO27_1_C,	SEL_SSP1_1_2),
-+	PINMUX_IPSR_MSEL(IP12_11_8,	RIF0_SYNC_B,		SEL_DRIF0_1),
-+	PINMUX_IPSR_GPSR(IP12_11_8,	ADICHS1),
-+
-+	PINMUX_IPSR_MSEL(IP12_15_12,	RX1_A,			SEL_SCIF1_0),
-+	PINMUX_IPSR_MSEL(IP12_15_12,	HRX1_A,			SEL_HSCIF1_0),
-+	PINMUX_IPSR_MSEL(IP12_15_12,	TS_SDAT0_C,		SEL_TSIF0_2),
-+	PINMUX_IPSR_MSEL(IP12_15_12,	STP_ISD_0_C,		SEL_SSP1_0_2),
-+	PINMUX_IPSR_MSEL(IP12_15_12,	RIF1_CLK_C,		SEL_DRIF1_2),
-+
-+	PINMUX_IPSR_MSEL(IP12_19_16,	TX1_A,			SEL_SCIF1_0),
-+	PINMUX_IPSR_MSEL(IP12_19_16,	HTX1_A,			SEL_HSCIF1_0),
-+	PINMUX_IPSR_MSEL(IP12_19_16,	TS_SDEN0_C,		SEL_TSIF0_2),
-+	PINMUX_IPSR_MSEL(IP12_19_16,	STP_ISEN_0_C,		SEL_SSP1_0_2),
-+	PINMUX_IPSR_MSEL(IP12_19_16,	RIF1_D0_C,		SEL_DRIF1_2),
-+
-+	PINMUX_IPSR_GPSR(IP12_23_20,	CTS1_N),
-+	PINMUX_IPSR_MSEL(IP12_23_20,	HCTS1_N_A,		SEL_HSCIF1_0),
-+	PINMUX_IPSR_MSEL(IP12_23_20,	MSIOF1_RXD_B,		SEL_MSIOF1_1),
-+	PINMUX_IPSR_MSEL(IP12_23_20,	TS_SDEN1_C,		SEL_TSIF1_2),
-+	PINMUX_IPSR_MSEL(IP12_23_20,	STP_ISEN_1_C,		SEL_SSP1_1_2),
-+	PINMUX_IPSR_MSEL(IP12_23_20,	RIF1_D0_B,		SEL_DRIF1_1),
-+	PINMUX_IPSR_GPSR(IP12_23_20,	ADIDATA),
-+
-+	PINMUX_IPSR_GPSR(IP12_27_24,	RTS1_N_TANS),
-+	PINMUX_IPSR_MSEL(IP12_27_24,	HRTS1_N_A,		SEL_HSCIF1_0),
-+	PINMUX_IPSR_MSEL(IP12_27_24,	MSIOF1_TXD_B,		SEL_MSIOF1_1),
-+	PINMUX_IPSR_MSEL(IP12_27_24,	TS_SDAT1_C,		SEL_TSIF1_2),
-+	PINMUX_IPSR_MSEL(IP12_27_24,	STP_ISD_1_C,		SEL_SSP1_1_2),
-+	PINMUX_IPSR_MSEL(IP12_27_24,	RIF1_D1_B,		SEL_DRIF1_1),
-+	PINMUX_IPSR_GPSR(IP12_27_24,	ADICHS0),
-+
-+	PINMUX_IPSR_GPSR(IP12_31_28,	SCK2),
-+	PINMUX_IPSR_MSEL(IP12_31_28,	SCIF_CLK_B,		SEL_SCIF1_1),
-+	PINMUX_IPSR_MSEL(IP12_31_28,	MSIOF1_SCK_B,		SEL_MSIOF1_1),
-+	PINMUX_IPSR_MSEL(IP12_31_28,	TS_SCK1_C,		SEL_TSIF1_2),
-+	PINMUX_IPSR_MSEL(IP12_31_28,	STP_ISCLK_1_C,		SEL_SSP1_1_2),
-+	PINMUX_IPSR_MSEL(IP12_31_28,	RIF1_CLK_B,		SEL_DRIF1_1),
-+	PINMUX_IPSR_GPSR(IP12_31_28,	ADICLK),
- 
--	PINMUX_IPSR_GPSR(IP13_31_28,	SSI_SDATA0),
--	PINMUX_IPSR_MSEL(IP13_31_28,	MSIOF1_SS2_F,		SEL_MSIOF1_5),
-+	/* IPSR13 */
-+	PINMUX_IPSR_MSEL(IP13_3_0,	TX2_A,			SEL_SCIF2_0),
-+	PINMUX_IPSR_MSEL(IP13_3_0,	SD2_CD_B,		SEL_SDHI2_1),
-+	PINMUX_IPSR_MSEL(IP13_3_0,	SCL1_A,			SEL_I2C1_0),
-+	PINMUX_IPSR_MSEL(IP13_3_0,	FMCLK_A,		SEL_FM_0),
-+	PINMUX_IPSR_MSEL(IP13_3_0,	RIF1_D1_C,		SEL_DRIF1_2),
-+	PINMUX_IPSR_GPSR(IP13_3_0,	FSO_CFE_0_N),
-+
-+	PINMUX_IPSR_MSEL(IP13_7_4,	RX2_A,			SEL_SCIF2_0),
-+	PINMUX_IPSR_MSEL(IP13_7_4,	SD2_WP_B,		SEL_SDHI2_1),
-+	PINMUX_IPSR_MSEL(IP13_7_4,	SDA1_A,			SEL_I2C1_0),
-+	PINMUX_IPSR_MSEL(IP13_7_4,	FMIN_A,			SEL_FM_0),
-+	PINMUX_IPSR_MSEL(IP13_7_4,	RIF1_SYNC_C,		SEL_DRIF1_2),
-+	PINMUX_IPSR_GPSR(IP13_7_4,	FSO_CFE_1_N),
-+
-+	PINMUX_IPSR_GPSR(IP13_11_8,	HSCK0),
-+	PINMUX_IPSR_MSEL(IP13_11_8,	MSIOF1_SCK_D,		SEL_MSIOF1_3),
-+	PINMUX_IPSR_MSEL(IP13_11_8,	AUDIO_CLKB_A,		SEL_ADG_B_0),
-+	PINMUX_IPSR_MSEL(IP13_11_8,	SSI_SDATA1_B,		SEL_SSI_1),
-+	PINMUX_IPSR_MSEL(IP13_11_8,	TS_SCK0_D,		SEL_TSIF0_3),
-+	PINMUX_IPSR_MSEL(IP13_11_8,	STP_ISCLK_0_D,		SEL_SSP1_0_3),
-+	PINMUX_IPSR_MSEL(IP13_11_8,	RIF0_CLK_C,		SEL_DRIF0_2),
-+	PINMUX_IPSR_MSEL(IP13_11_8,	RX5_B,			SEL_SCIF5_1),
-+
-+	PINMUX_IPSR_GPSR(IP13_15_12,	HRX0),
-+	PINMUX_IPSR_MSEL(IP13_15_12,	MSIOF1_RXD_D,		SEL_MSIOF1_3),
-+	PINMUX_IPSR_MSEL(IP13_15_12,	SSI_SDATA2_B,		SEL_SSI_1),
-+	PINMUX_IPSR_MSEL(IP13_15_12,	TS_SDEN0_D,		SEL_TSIF0_3),
-+	PINMUX_IPSR_MSEL(IP13_15_12,	STP_ISEN_0_D,		SEL_SSP1_0_3),
-+	PINMUX_IPSR_MSEL(IP13_15_12,	RIF0_D0_C,		SEL_DRIF0_2),
-+
-+	PINMUX_IPSR_GPSR(IP13_19_16,	HTX0),
-+	PINMUX_IPSR_MSEL(IP13_19_16,	MSIOF1_TXD_D,		SEL_MSIOF1_3),
-+	PINMUX_IPSR_MSEL(IP13_19_16,	SSI_SDATA9_B,		SEL_SSI_1),
-+	PINMUX_IPSR_MSEL(IP13_19_16,	TS_SDAT0_D,		SEL_TSIF0_3),
-+	PINMUX_IPSR_MSEL(IP13_19_16,	STP_ISD_0_D,		SEL_SSP1_0_3),
-+	PINMUX_IPSR_MSEL(IP13_19_16,	RIF0_D1_C,		SEL_DRIF0_2),
-+
-+	PINMUX_IPSR_GPSR(IP13_23_20,	HCTS0_N),
-+	PINMUX_IPSR_MSEL(IP13_23_20,	RX2_B,			SEL_SCIF2_1),
-+	PINMUX_IPSR_MSEL(IP13_23_20,	MSIOF1_SYNC_D,		SEL_MSIOF1_3),
-+	PINMUX_IPSR_MSEL(IP13_23_20,	SSI_SCK9_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP13_23_20,	TS_SPSYNC0_D,		SEL_TSIF0_3),
-+	PINMUX_IPSR_MSEL(IP13_23_20,	STP_ISSYNC_0_D,		SEL_SSP1_0_3),
-+	PINMUX_IPSR_MSEL(IP13_23_20,	RIF0_SYNC_C,		SEL_DRIF0_2),
-+	PINMUX_IPSR_GPSR(IP13_23_20,	AUDIO_CLKOUT1_A),
-+
-+	PINMUX_IPSR_GPSR(IP13_27_24,	HRTS0_N),
-+	PINMUX_IPSR_MSEL(IP13_27_24,	TX2_B,			SEL_SCIF2_1),
-+	PINMUX_IPSR_MSEL(IP13_27_24,	MSIOF1_SS1_D,		SEL_MSIOF1_3),
-+	PINMUX_IPSR_MSEL(IP13_27_24,	SSI_WS9_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP13_27_24,	STP_IVCXO27_0_D,	SEL_SSP1_0_3),
-+	PINMUX_IPSR_MSEL(IP13_27_24,	BPFCLK_A,		SEL_FM_0),
-+	PINMUX_IPSR_GPSR(IP13_27_24,	AUDIO_CLKOUT2_A),
-+
-+	PINMUX_IPSR_GPSR(IP13_31_28,	MSIOF0_SYNC),
-+	PINMUX_IPSR_GPSR(IP13_31_28,	AUDIO_CLKOUT_A),
-+	PINMUX_IPSR_MSEL(IP13_31_28,	TX5_B,			SEL_SCIF5_1),
-+	PINMUX_IPSR_MSEL(IP13_31_28,	BPFCLK_D,		SEL_FM_3),
- 
- 	/* IPSR14 */
--	PINMUX_IPSR_MSEL(IP14_3_0,	SSI_SDATA1_A,		SEL_SSI_0),
-+	PINMUX_IPSR_GPSR(IP14_3_0,	MSIOF0_SS1),
-+	PINMUX_IPSR_MSEL(IP14_3_0,	RX5_A,			SEL_SCIF5_0),
-+	PINMUX_IPSR_MSEL(IP14_3_0,	NFWP_N_A,		SEL_NDF_0),
-+	PINMUX_IPSR_MSEL(IP14_3_0,	AUDIO_CLKA_C,		SEL_ADG_A_2),
-+	PINMUX_IPSR_MSEL(IP14_3_0,	SSI_SCK2_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP14_3_0,	STP_IVCXO27_0_C,	SEL_SSP1_0_2),
-+	PINMUX_IPSR_GPSR(IP14_3_0,	AUDIO_CLKOUT3_A),
-+	PINMUX_IPSR_MSEL(IP14_3_0,	TCLK1_B,		SEL_TIMER_TMU_1),
-+
-+	PINMUX_IPSR_GPSR(IP14_7_4,	MSIOF0_SS2),
-+	PINMUX_IPSR_MSEL(IP14_7_4,	TX5_A,			SEL_SCIF5_0),
-+	PINMUX_IPSR_MSEL(IP14_7_4,	MSIOF1_SS2_D,		SEL_MSIOF1_3),
-+	PINMUX_IPSR_MSEL(IP14_7_4,	AUDIO_CLKC_A,		SEL_ADG_C_0),
-+	PINMUX_IPSR_MSEL(IP14_7_4,	SSI_WS2_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP14_7_4,	STP_OPWM_0_D,		SEL_SSP1_0_3),
-+	PINMUX_IPSR_GPSR(IP14_7_4,	AUDIO_CLKOUT_D),
-+	PINMUX_IPSR_MSEL(IP14_7_4,	SPEEDIN_B,		SEL_SPEED_PULSE_1),
-+
-+	PINMUX_IPSR_GPSR(IP14_11_8,	MLB_CLK),
-+	PINMUX_IPSR_MSEL(IP14_11_8,	MSIOF1_SCK_F,		SEL_MSIOF1_5),
-+	PINMUX_IPSR_MSEL(IP14_11_8,	SCL1_B,			SEL_I2C1_1),
-+
-+	PINMUX_IPSR_GPSR(IP14_15_12,	MLB_SIG),
-+	PINMUX_IPSR_MSEL(IP14_15_12,	RX1_B,			SEL_SCIF1_1),
-+	PINMUX_IPSR_MSEL(IP14_15_12,	MSIOF1_SYNC_F,		SEL_MSIOF1_5),
-+	PINMUX_IPSR_MSEL(IP14_15_12,	SDA1_B,			SEL_I2C1_1),
-+
-+	PINMUX_IPSR_GPSR(IP14_19_16,	MLB_DAT),
-+	PINMUX_IPSR_MSEL(IP14_19_16,	TX1_B,			SEL_SCIF1_1),
-+	PINMUX_IPSR_MSEL(IP14_19_16,	MSIOF1_RXD_F,		SEL_MSIOF1_5),
-+
-+	PINMUX_IPSR_GPSR(IP14_23_20,	SSI_SCK01239),
-+	PINMUX_IPSR_MSEL(IP14_23_20,	MSIOF1_TXD_F,		SEL_MSIOF1_5),
- 
--	PINMUX_IPSR_MSEL(IP14_7_4,	SSI_SDATA2_A,		SEL_SSI_0),
--	PINMUX_IPSR_MSEL(IP14_7_4,	SSI_SCK1_B,		SEL_SSI_1),
-+	PINMUX_IPSR_GPSR(IP14_27_24,	SSI_WS01239),
-+	PINMUX_IPSR_MSEL(IP14_27_24,	MSIOF1_SS1_F,		SEL_MSIOF1_5),
- 
--	PINMUX_IPSR_GPSR(IP14_11_8,	SSI_SCK34),
--	PINMUX_IPSR_MSEL(IP14_11_8,	MSIOF1_SS1_A,		SEL_MSIOF1_0),
--	PINMUX_IPSR_MSEL(IP14_11_8,	STP_OPWM_0_A,		SEL_SSP1_0_0),
--
--	PINMUX_IPSR_GPSR(IP14_15_12,	SSI_WS34),
--	PINMUX_IPSR_MSEL(IP14_15_12,	HCTS2_N_A,		SEL_HSCIF2_0),
--	PINMUX_IPSR_MSEL(IP14_15_12,	MSIOF1_SS2_A,		SEL_MSIOF1_0),
--	PINMUX_IPSR_MSEL(IP14_15_12,	STP_IVCXO27_0_A,	SEL_SSP1_0_0),
--
--	PINMUX_IPSR_GPSR(IP14_19_16,	SSI_SDATA3),
--	PINMUX_IPSR_MSEL(IP14_19_16,	HRTS2_N_A,		SEL_HSCIF2_0),
--	PINMUX_IPSR_MSEL(IP14_19_16,	MSIOF1_TXD_A,		SEL_MSIOF1_0),
--	PINMUX_IPSR_MSEL(IP14_19_16,	TS_SCK0_A,		SEL_TSIF0_0),
--	PINMUX_IPSR_MSEL(IP14_19_16,	STP_ISCLK_0_A,		SEL_SSP1_0_0),
--	PINMUX_IPSR_MSEL(IP14_19_16,	RIF0_D1_A,		SEL_DRIF0_0),
--	PINMUX_IPSR_MSEL(IP14_19_16,	RIF2_D0_A,		SEL_DRIF2_0),
--
--	PINMUX_IPSR_GPSR(IP14_23_20,	SSI_SCK4),
--	PINMUX_IPSR_MSEL(IP14_23_20,	HRX2_A,			SEL_HSCIF2_0),
--	PINMUX_IPSR_MSEL(IP14_23_20,	MSIOF1_SCK_A,		SEL_MSIOF1_0),
--	PINMUX_IPSR_MSEL(IP14_23_20,	TS_SDAT0_A,		SEL_TSIF0_0),
--	PINMUX_IPSR_MSEL(IP14_23_20,	STP_ISD_0_A,		SEL_SSP1_0_0),
--	PINMUX_IPSR_MSEL(IP14_23_20,	RIF0_CLK_A,		SEL_DRIF0_0),
--	PINMUX_IPSR_MSEL(IP14_23_20,	RIF2_CLK_A,		SEL_DRIF2_0),
--
--	PINMUX_IPSR_GPSR(IP14_27_24,	SSI_WS4),
--	PINMUX_IPSR_MSEL(IP14_27_24,	HTX2_A,			SEL_HSCIF2_0),
--	PINMUX_IPSR_MSEL(IP14_27_24,	MSIOF1_SYNC_A,		SEL_MSIOF1_0),
--	PINMUX_IPSR_MSEL(IP14_27_24,	TS_SDEN0_A,		SEL_TSIF0_0),
--	PINMUX_IPSR_MSEL(IP14_27_24,	STP_ISEN_0_A,		SEL_SSP1_0_0),
--	PINMUX_IPSR_MSEL(IP14_27_24,	RIF0_SYNC_A,		SEL_DRIF0_0),
--	PINMUX_IPSR_MSEL(IP14_27_24,	RIF2_SYNC_A,		SEL_DRIF2_0),
--
--	PINMUX_IPSR_GPSR(IP14_31_28,	SSI_SDATA4),
--	PINMUX_IPSR_MSEL(IP14_31_28,	HSCK2_A,		SEL_HSCIF2_0),
--	PINMUX_IPSR_MSEL(IP14_31_28,	MSIOF1_RXD_A,		SEL_MSIOF1_0),
--	PINMUX_IPSR_MSEL(IP14_31_28,	TS_SPSYNC0_A,		SEL_TSIF0_0),
--	PINMUX_IPSR_MSEL(IP14_31_28,	STP_ISSYNC_0_A,		SEL_SSP1_0_0),
--	PINMUX_IPSR_MSEL(IP14_31_28,	RIF0_D0_A,		SEL_DRIF0_0),
--	PINMUX_IPSR_MSEL(IP14_31_28,	RIF2_D1_A,		SEL_DRIF2_0),
-+	PINMUX_IPSR_GPSR(IP14_31_28,	SSI_SDATA0),
-+	PINMUX_IPSR_MSEL(IP14_31_28,	MSIOF1_SS2_F,		SEL_MSIOF1_5),
- 
- 	/* IPSR15 */
--	PINMUX_IPSR_GPSR(IP15_3_0,	SSI_SCK6),
--	PINMUX_IPSR_GPSR(IP15_3_0,	USB2_PWEN),
--	PINMUX_IPSR_MSEL(IP15_3_0,	SIM0_RST_D,		SEL_SIMCARD_3),
--
--	PINMUX_IPSR_GPSR(IP15_7_4,	SSI_WS6),
--	PINMUX_IPSR_GPSR(IP15_7_4,	USB2_OVC),
--	PINMUX_IPSR_MSEL(IP15_7_4,	SIM0_D_D,		SEL_SIMCARD_3),
--
--	PINMUX_IPSR_GPSR(IP15_11_8,	SSI_SDATA6),
--	PINMUX_IPSR_MSEL(IP15_11_8,	SIM0_CLK_D,		SEL_SIMCARD_3),
--	PINMUX_IPSR_MSEL(IP15_11_8,	SATA_DEVSLP_A,		SEL_SATA_0),
--
--	PINMUX_IPSR_GPSR(IP15_15_12,	SSI_SCK78),
--	PINMUX_IPSR_MSEL(IP15_15_12,	HRX2_B,			SEL_HSCIF2_1),
--	PINMUX_IPSR_MSEL(IP15_15_12,	MSIOF1_SCK_C,		SEL_MSIOF1_2),
--	PINMUX_IPSR_MSEL(IP15_15_12,	TS_SCK1_A,		SEL_TSIF1_0),
--	PINMUX_IPSR_MSEL(IP15_15_12,	STP_ISCLK_1_A,		SEL_SSP1_1_0),
--	PINMUX_IPSR_MSEL(IP15_15_12,	RIF1_CLK_A,		SEL_DRIF1_0),
--	PINMUX_IPSR_MSEL(IP15_15_12,	RIF3_CLK_A,		SEL_DRIF3_0),
--
--	PINMUX_IPSR_GPSR(IP15_19_16,	SSI_WS78),
--	PINMUX_IPSR_MSEL(IP15_19_16,	HTX2_B,			SEL_HSCIF2_1),
--	PINMUX_IPSR_MSEL(IP15_19_16,	MSIOF1_SYNC_C,		SEL_MSIOF1_2),
--	PINMUX_IPSR_MSEL(IP15_19_16,	TS_SDAT1_A,		SEL_TSIF1_0),
--	PINMUX_IPSR_MSEL(IP15_19_16,	STP_ISD_1_A,		SEL_SSP1_1_0),
--	PINMUX_IPSR_MSEL(IP15_19_16,	RIF1_SYNC_A,		SEL_DRIF1_0),
--	PINMUX_IPSR_MSEL(IP15_19_16,	RIF3_SYNC_A,		SEL_DRIF3_0),
--
--	PINMUX_IPSR_GPSR(IP15_23_20,	SSI_SDATA7),
--	PINMUX_IPSR_MSEL(IP15_23_20,	HCTS2_N_B,		SEL_HSCIF2_1),
--	PINMUX_IPSR_MSEL(IP15_23_20,	MSIOF1_RXD_C,		SEL_MSIOF1_2),
--	PINMUX_IPSR_MSEL(IP15_23_20,	TS_SDEN1_A,		SEL_TSIF1_0),
--	PINMUX_IPSR_MSEL(IP15_23_20,	STP_ISEN_1_A,		SEL_SSP1_1_0),
--	PINMUX_IPSR_MSEL(IP15_23_20,	RIF1_D0_A,		SEL_DRIF1_0),
--	PINMUX_IPSR_MSEL(IP15_23_20,	RIF3_D0_A,		SEL_DRIF3_0),
--	PINMUX_IPSR_MSEL(IP15_23_20,	TCLK2_A,		SEL_TIMER_TMU_0),
--
--	PINMUX_IPSR_GPSR(IP15_27_24,	SSI_SDATA8),
--	PINMUX_IPSR_MSEL(IP15_27_24,	HRTS2_N_B,		SEL_HSCIF2_1),
--	PINMUX_IPSR_MSEL(IP15_27_24,	MSIOF1_TXD_C,		SEL_MSIOF1_2),
--	PINMUX_IPSR_MSEL(IP15_27_24,	TS_SPSYNC1_A,		SEL_TSIF1_0),
--	PINMUX_IPSR_MSEL(IP15_27_24,	STP_ISSYNC_1_A,		SEL_SSP1_1_0),
--	PINMUX_IPSR_MSEL(IP15_27_24,	RIF1_D1_A,		SEL_DRIF1_0),
--	PINMUX_IPSR_MSEL(IP15_27_24,	RIF3_D1_A,		SEL_DRIF3_0),
--
--	PINMUX_IPSR_MSEL(IP15_31_28,	SSI_SDATA9_A,		SEL_SSI_0),
--	PINMUX_IPSR_MSEL(IP15_31_28,	HSCK2_B,		SEL_HSCIF2_1),
--	PINMUX_IPSR_MSEL(IP15_31_28,	MSIOF1_SS1_C,		SEL_MSIOF1_2),
--	PINMUX_IPSR_MSEL(IP15_31_28,	HSCK1_A,		SEL_HSCIF1_0),
--	PINMUX_IPSR_MSEL(IP15_31_28,	SSI_WS1_B,		SEL_SSI_1),
--	PINMUX_IPSR_GPSR(IP15_31_28,	SCK1),
--	PINMUX_IPSR_MSEL(IP15_31_28,	STP_IVCXO27_1_A,	SEL_SSP1_1_0),
--	PINMUX_IPSR_GPSR(IP15_31_28,	SCK5),
-+	PINMUX_IPSR_MSEL(IP15_3_0,	SSI_SDATA1_A,		SEL_SSI_0),
- 
--	/* IPSR16 */
--	PINMUX_IPSR_MSEL(IP16_3_0,	AUDIO_CLKA_A,		SEL_ADG_0),
--	PINMUX_IPSR_GPSR(IP16_3_0,	CC5_OSCOUT),
-+	PINMUX_IPSR_MSEL(IP15_7_4,	SSI_SDATA2_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP15_7_4,	SSI_SCK1_B,		SEL_SSI_1),
-+
-+	PINMUX_IPSR_GPSR(IP15_11_8,	SSI_SCK34),
-+	PINMUX_IPSR_MSEL(IP15_11_8,	MSIOF1_SS1_A,		SEL_MSIOF1_0),
-+	PINMUX_IPSR_MSEL(IP15_11_8,	STP_OPWM_0_A,		SEL_SSP1_0_0),
-+
-+	PINMUX_IPSR_GPSR(IP15_15_12,	SSI_WS34),
-+	PINMUX_IPSR_MSEL(IP15_15_12,	HCTS2_N_A,		SEL_HSCIF2_0),
-+	PINMUX_IPSR_MSEL(IP15_15_12,	MSIOF1_SS2_A,		SEL_MSIOF1_0),
-+	PINMUX_IPSR_MSEL(IP15_15_12,	STP_IVCXO27_0_A,	SEL_SSP1_0_0),
-+
-+	PINMUX_IPSR_GPSR(IP15_19_16,	SSI_SDATA3),
-+	PINMUX_IPSR_MSEL(IP15_19_16,	HRTS2_N_A,		SEL_HSCIF2_0),
-+	PINMUX_IPSR_MSEL(IP15_19_16,	MSIOF1_TXD_A,		SEL_MSIOF1_0),
-+	PINMUX_IPSR_MSEL(IP15_19_16,	TS_SCK0_A,		SEL_TSIF0_0),
-+	PINMUX_IPSR_MSEL(IP15_19_16,	STP_ISCLK_0_A,		SEL_SSP1_0_0),
-+	PINMUX_IPSR_MSEL(IP15_19_16,	RIF0_D1_A,		SEL_DRIF0_0),
-+	PINMUX_IPSR_MSEL(IP15_19_16,	RIF2_D0_A,		SEL_DRIF2_0),
-+
-+	PINMUX_IPSR_GPSR(IP15_23_20,	SSI_SCK4),
-+	PINMUX_IPSR_MSEL(IP15_23_20,	HRX2_A,			SEL_HSCIF2_0),
-+	PINMUX_IPSR_MSEL(IP15_23_20,	MSIOF1_SCK_A,		SEL_MSIOF1_0),
-+	PINMUX_IPSR_MSEL(IP15_23_20,	TS_SDAT0_A,		SEL_TSIF0_0),
-+	PINMUX_IPSR_MSEL(IP15_23_20,	STP_ISD_0_A,		SEL_SSP1_0_0),
-+	PINMUX_IPSR_MSEL(IP15_23_20,	RIF0_CLK_A,		SEL_DRIF0_0),
-+	PINMUX_IPSR_MSEL(IP15_23_20,	RIF2_CLK_A,		SEL_DRIF2_0),
-+
-+	PINMUX_IPSR_GPSR(IP15_27_24,	SSI_WS4),
-+	PINMUX_IPSR_MSEL(IP15_27_24,	HTX2_A,			SEL_HSCIF2_0),
-+	PINMUX_IPSR_MSEL(IP15_27_24,	MSIOF1_SYNC_A,		SEL_MSIOF1_0),
-+	PINMUX_IPSR_MSEL(IP15_27_24,	TS_SDEN0_A,		SEL_TSIF0_0),
-+	PINMUX_IPSR_MSEL(IP15_27_24,	STP_ISEN_0_A,		SEL_SSP1_0_0),
-+	PINMUX_IPSR_MSEL(IP15_27_24,	RIF0_SYNC_A,		SEL_DRIF0_0),
-+	PINMUX_IPSR_MSEL(IP15_27_24,	RIF2_SYNC_A,		SEL_DRIF2_0),
-+
-+	PINMUX_IPSR_GPSR(IP15_31_28,	SSI_SDATA4),
-+	PINMUX_IPSR_MSEL(IP15_31_28,	HSCK2_A,		SEL_HSCIF2_0),
-+	PINMUX_IPSR_MSEL(IP15_31_28,	MSIOF1_RXD_A,		SEL_MSIOF1_0),
-+	PINMUX_IPSR_MSEL(IP15_31_28,	TS_SPSYNC0_A,		SEL_TSIF0_0),
-+	PINMUX_IPSR_MSEL(IP15_31_28,	STP_ISSYNC_0_A,		SEL_SSP1_0_0),
-+	PINMUX_IPSR_MSEL(IP15_31_28,	RIF0_D0_A,		SEL_DRIF0_0),
-+	PINMUX_IPSR_MSEL(IP15_31_28,	RIF2_D1_A,		SEL_DRIF2_0),
- 
--	PINMUX_IPSR_MSEL(IP16_7_4,	AUDIO_CLKB_B,		SEL_ADG_1),
--	PINMUX_IPSR_MSEL(IP16_7_4,	SCIF_CLK_A,		SEL_SCIF1_0),
--	PINMUX_IPSR_MSEL(IP16_7_4,	STP_IVCXO27_1_D,	SEL_SSP1_1_3),
--	PINMUX_IPSR_MSEL(IP16_7_4,	REMOCON_A,		SEL_REMOCON_0),
--	PINMUX_IPSR_MSEL(IP16_7_4,	TCLK1_A,		SEL_TIMER_TMU_0),
--
--	PINMUX_IPSR_GPSR(IP16_11_8,	USB0_PWEN),
--	PINMUX_IPSR_MSEL(IP16_11_8,	SIM0_RST_C,		SEL_SIMCARD_2),
--	PINMUX_IPSR_MSEL(IP16_11_8,	TS_SCK1_D,		SEL_TSIF1_3),
--	PINMUX_IPSR_MSEL(IP16_11_8,	STP_ISCLK_1_D,		SEL_SSP1_1_3),
--	PINMUX_IPSR_MSEL(IP16_11_8,	BPFCLK_B,		SEL_FM_1),
--	PINMUX_IPSR_MSEL(IP16_11_8,	RIF3_CLK_B,		SEL_DRIF3_1),
--
--	PINMUX_IPSR_GPSR(IP16_15_12,	USB0_OVC),
--	PINMUX_IPSR_MSEL(IP16_11_8,	SIM0_D_C,		SEL_SIMCARD_2),
--	PINMUX_IPSR_MSEL(IP16_11_8,	TS_SDAT1_D,		SEL_TSIF1_3),
--	PINMUX_IPSR_MSEL(IP16_11_8,	STP_ISD_1_D,		SEL_SSP1_1_3),
--	PINMUX_IPSR_MSEL(IP16_11_8,	RIF3_SYNC_B,		SEL_DRIF3_1),
--
--	PINMUX_IPSR_GPSR(IP16_19_16,	USB1_PWEN),
--	PINMUX_IPSR_MSEL(IP16_19_16,	SIM0_CLK_C,		SEL_SIMCARD_2),
--	PINMUX_IPSR_MSEL(IP16_19_16,	SSI_SCK1_A,		SEL_SSI_0),
--	PINMUX_IPSR_MSEL(IP16_19_16,	TS_SCK0_E,		SEL_TSIF0_4),
--	PINMUX_IPSR_MSEL(IP16_19_16,	STP_ISCLK_0_E,		SEL_SSP1_0_4),
--	PINMUX_IPSR_MSEL(IP16_19_16,	FMCLK_B,		SEL_FM_1),
--	PINMUX_IPSR_MSEL(IP16_19_16,	RIF2_CLK_B,		SEL_DRIF2_1),
--	PINMUX_IPSR_MSEL(IP16_19_16,	SPEEDIN_A,		SEL_SPEED_PULSE_0),
--
--	PINMUX_IPSR_GPSR(IP16_23_20,	USB1_OVC),
--	PINMUX_IPSR_MSEL(IP16_23_20,	MSIOF1_SS2_C,		SEL_MSIOF1_2),
--	PINMUX_IPSR_MSEL(IP16_23_20,	SSI_WS1_A,		SEL_SSI_0),
--	PINMUX_IPSR_MSEL(IP16_23_20,	TS_SDAT0_E,		SEL_TSIF0_4),
--	PINMUX_IPSR_MSEL(IP16_23_20,	STP_ISD_0_E,		SEL_SSP1_0_4),
--	PINMUX_IPSR_MSEL(IP16_23_20,	FMIN_B,			SEL_FM_1),
--	PINMUX_IPSR_MSEL(IP16_23_20,	RIF2_SYNC_B,		SEL_DRIF2_1),
--	PINMUX_IPSR_MSEL(IP16_23_20,	REMOCON_B,		SEL_REMOCON_1),
--
--	PINMUX_IPSR_GPSR(IP16_27_24,	USB30_PWEN),
--	PINMUX_IPSR_MSEL(IP16_27_24,	AUDIO_CLKOUT_B,		SEL_ADG_1),
--	PINMUX_IPSR_MSEL(IP16_27_24,	SSI_SCK2_B,		SEL_SSI_1),
--	PINMUX_IPSR_MSEL(IP16_27_24,	TS_SDEN1_D,		SEL_TSIF1_3),
--	PINMUX_IPSR_MSEL(IP16_27_24,	STP_ISEN_1_D,		SEL_SSP1_1_2),
--	PINMUX_IPSR_MSEL(IP16_27_24,	STP_OPWM_0_E,		SEL_SSP1_0_4),
--	PINMUX_IPSR_MSEL(IP16_27_24,	RIF3_D0_B,		SEL_DRIF3_1),
--	PINMUX_IPSR_MSEL(IP16_27_24,	TCLK2_B,		SEL_TIMER_TMU_1),
--	PINMUX_IPSR_GPSR(IP16_27_24,	TPU0TO0),
--
--	PINMUX_IPSR_GPSR(IP16_31_28,	USB30_OVC),
--	PINMUX_IPSR_MSEL(IP16_31_28,	AUDIO_CLKOUT1_B,	SEL_ADG_1),
--	PINMUX_IPSR_MSEL(IP16_31_28,	SSI_WS2_B,		SEL_SSI_1),
--	PINMUX_IPSR_MSEL(IP16_31_28,	TS_SPSYNC1_D,		SEL_TSIF1_3),
--	PINMUX_IPSR_MSEL(IP16_31_28,	STP_ISSYNC_1_D,		SEL_SSP1_1_3),
--	PINMUX_IPSR_MSEL(IP16_31_28,	STP_IVCXO27_0_E,	SEL_SSP1_0_4),
--	PINMUX_IPSR_MSEL(IP16_31_28,	RIF3_D1_B,		SEL_DRIF3_1),
--	PINMUX_IPSR_MSEL(IP16_31_28,	FSO_TOE_B,		SEL_FSO_1),
--	PINMUX_IPSR_GPSR(IP16_31_28,	TPU0TO1),
-+	/* IPSR16 */
-+	PINMUX_IPSR_GPSR(IP16_3_0,	SSI_SCK6),
-+	PINMUX_IPSR_GPSR(IP16_3_0,	USB2_PWEN),
-+	PINMUX_IPSR_MSEL(IP16_3_0,	SIM0_RST_D,		SEL_SIMCARD_3),
-+
-+	PINMUX_IPSR_GPSR(IP16_7_4,	SSI_WS6),
-+	PINMUX_IPSR_GPSR(IP16_7_4,	USB2_OVC),
-+	PINMUX_IPSR_MSEL(IP16_7_4,	SIM0_D_D,		SEL_SIMCARD_3),
-+
-+	PINMUX_IPSR_GPSR(IP16_11_8,	SSI_SDATA6),
-+	PINMUX_IPSR_MSEL(IP16_11_8,	SIM0_CLK_D,		SEL_SIMCARD_3),
-+	PINMUX_IPSR_GPSR(IP16_11_8,	SATA_DEVSLP_A),
-+
-+	PINMUX_IPSR_GPSR(IP16_15_12,	SSI_SCK78),
-+	PINMUX_IPSR_MSEL(IP16_15_12,	HRX2_B,			SEL_HSCIF2_1),
-+	PINMUX_IPSR_MSEL(IP16_15_12,	MSIOF1_SCK_C,		SEL_MSIOF1_2),
-+	PINMUX_IPSR_MSEL(IP16_15_12,	TS_SCK1_A,		SEL_TSIF1_0),
-+	PINMUX_IPSR_MSEL(IP16_15_12,	STP_ISCLK_1_A,		SEL_SSP1_1_0),
-+	PINMUX_IPSR_MSEL(IP16_15_12,	RIF1_CLK_A,		SEL_DRIF1_0),
-+	PINMUX_IPSR_MSEL(IP16_15_12,	RIF3_CLK_A,		SEL_DRIF3_0),
-+
-+	PINMUX_IPSR_GPSR(IP16_19_16,	SSI_WS78),
-+	PINMUX_IPSR_MSEL(IP16_19_16,	HTX2_B,			SEL_HSCIF2_1),
-+	PINMUX_IPSR_MSEL(IP16_19_16,	MSIOF1_SYNC_C,		SEL_MSIOF1_2),
-+	PINMUX_IPSR_MSEL(IP16_19_16,	TS_SDAT1_A,		SEL_TSIF1_0),
-+	PINMUX_IPSR_MSEL(IP16_19_16,	STP_ISD_1_A,		SEL_SSP1_1_0),
-+	PINMUX_IPSR_MSEL(IP16_19_16,	RIF1_SYNC_A,		SEL_DRIF1_0),
-+	PINMUX_IPSR_MSEL(IP16_19_16,	RIF3_SYNC_A,		SEL_DRIF3_0),
-+
-+	PINMUX_IPSR_GPSR(IP16_23_20,	SSI_SDATA7),
-+	PINMUX_IPSR_MSEL(IP16_23_20,	HCTS2_N_B,		SEL_HSCIF2_1),
-+	PINMUX_IPSR_MSEL(IP16_23_20,	MSIOF1_RXD_C,		SEL_MSIOF1_2),
-+	PINMUX_IPSR_MSEL(IP16_23_20,	TS_SDEN1_A,		SEL_TSIF1_0),
-+	PINMUX_IPSR_MSEL(IP16_23_20,	STP_ISEN_1_A,		SEL_SSP1_1_0),
-+	PINMUX_IPSR_MSEL(IP16_23_20,	RIF1_D0_A,		SEL_DRIF1_0),
-+	PINMUX_IPSR_MSEL(IP16_23_20,	RIF3_D0_A,		SEL_DRIF3_0),
-+	PINMUX_IPSR_MSEL(IP16_23_20,	TCLK2_A,		SEL_TIMER_TMU_0),
-+
-+	PINMUX_IPSR_GPSR(IP16_27_24,	SSI_SDATA8),
-+	PINMUX_IPSR_MSEL(IP16_27_24,	HRTS2_N_B,		SEL_HSCIF2_1),
-+	PINMUX_IPSR_MSEL(IP16_27_24,	MSIOF1_TXD_C,		SEL_MSIOF1_2),
-+	PINMUX_IPSR_MSEL(IP16_27_24,	TS_SPSYNC1_A,		SEL_TSIF1_0),
-+	PINMUX_IPSR_MSEL(IP16_27_24,	STP_ISSYNC_1_A,		SEL_SSP1_1_0),
-+	PINMUX_IPSR_MSEL(IP16_27_24,	RIF1_D1_A,		SEL_DRIF1_0),
-+	PINMUX_IPSR_MSEL(IP16_27_24,	RIF3_D1_A,		SEL_DRIF3_0),
-+
-+	PINMUX_IPSR_MSEL(IP16_31_28,	SSI_SDATA9_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP16_31_28,	HSCK2_B,		SEL_HSCIF2_1),
-+	PINMUX_IPSR_MSEL(IP16_31_28,	MSIOF1_SS1_C,		SEL_MSIOF1_2),
-+	PINMUX_IPSR_MSEL(IP16_31_28,	HSCK1_A,		SEL_HSCIF1_0),
-+	PINMUX_IPSR_MSEL(IP16_31_28,	SSI_WS1_B,		SEL_SSI_1),
-+	PINMUX_IPSR_GPSR(IP16_31_28,	SCK1),
-+	PINMUX_IPSR_MSEL(IP16_31_28,	STP_IVCXO27_1_A,	SEL_SSP1_1_0),
-+	PINMUX_IPSR_GPSR(IP16_31_28,	SCK5_A),
- 
- 	/* IPSR17 */
--	PINMUX_IPSR_GPSR(IP17_3_0,	USB31_PWEN),
--	PINMUX_IPSR_MSEL(IP17_3_0,	AUDIO_CLKOUT2_B,	SEL_ADG_1),
--	PINMUX_IPSR_MSEL(IP17_3_0,	SSI_SCK9_B,		SEL_SSI_1),
--	PINMUX_IPSR_MSEL(IP17_3_0,	TS_SDEN0_E,		SEL_TSIF0_4),
--	PINMUX_IPSR_MSEL(IP17_3_0,	STP_ISEN_0_E,		SEL_SSP1_0_4),
--	PINMUX_IPSR_MSEL(IP17_3_0,	RIF2_D0_B,		SEL_DRIF2_1),
--	PINMUX_IPSR_GPSR(IP17_3_0,	TPU0TO2),
--
--	PINMUX_IPSR_GPSR(IP17_7_4,	USB31_OVC),
--	PINMUX_IPSR_MSEL(IP17_7_4,	AUDIO_CLKOUT3_B,	SEL_ADG_1),
--	PINMUX_IPSR_MSEL(IP17_7_4,	SSI_WS9_B,		SEL_SSI_1),
--	PINMUX_IPSR_MSEL(IP17_7_4,	TS_SPSYNC0_E,		SEL_TSIF0_4),
--	PINMUX_IPSR_MSEL(IP17_7_4,	STP_ISSYNC_0_E,		SEL_SSP1_0_4),
--	PINMUX_IPSR_MSEL(IP17_7_4,	RIF2_D1_B,		SEL_DRIF2_1),
--	PINMUX_IPSR_GPSR(IP17_7_4,	TPU0TO3),
-+	PINMUX_IPSR_MSEL(IP17_3_0,	AUDIO_CLKA_A,		SEL_ADG_A_0),
-+	PINMUX_IPSR_GPSR(IP17_3_0,	CC5_OSCOUT),
-+
-+	PINMUX_IPSR_MSEL(IP17_7_4,	AUDIO_CLKB_B,		SEL_ADG_B_1),
-+	PINMUX_IPSR_MSEL(IP17_7_4,	SCIF_CLK_A,		SEL_SCIF1_0),
-+	PINMUX_IPSR_MSEL(IP17_7_4,	STP_IVCXO27_1_D,	SEL_SSP1_1_3),
-+	PINMUX_IPSR_MSEL(IP17_7_4,	REMOCON_A,		SEL_REMOCON_0),
-+	PINMUX_IPSR_MSEL(IP17_7_4,	TCLK1_A,		SEL_TIMER_TMU_0),
-+
-+	PINMUX_IPSR_GPSR(IP17_11_8,	USB0_PWEN),
-+	PINMUX_IPSR_MSEL(IP17_11_8,	SIM0_RST_C,		SEL_SIMCARD_2),
-+	PINMUX_IPSR_MSEL(IP17_11_8,	TS_SCK1_D,		SEL_TSIF1_3),
-+	PINMUX_IPSR_MSEL(IP17_11_8,	STP_ISCLK_1_D,		SEL_SSP1_1_3),
-+	PINMUX_IPSR_MSEL(IP17_11_8,	BPFCLK_B,		SEL_FM_1),
-+	PINMUX_IPSR_MSEL(IP17_11_8,	RIF3_CLK_B,		SEL_DRIF3_1),
-+	PINMUX_IPSR_MSEL(IP17_11_8,	HSCK2_C,		SEL_HSCIF2_2),
-+
-+	PINMUX_IPSR_GPSR(IP17_15_12,	USB0_OVC),
-+	PINMUX_IPSR_MSEL(IP17_15_12,	SIM0_D_C,		SEL_SIMCARD_2),
-+	PINMUX_IPSR_MSEL(IP17_15_12,	TS_SDAT1_D,		SEL_TSIF1_3),
-+	PINMUX_IPSR_MSEL(IP17_15_12,	STP_ISD_1_D,		SEL_SSP1_1_3),
-+	PINMUX_IPSR_MSEL(IP17_15_12,	RIF3_SYNC_B,		SEL_DRIF3_1),
-+	PINMUX_IPSR_MSEL(IP17_15_12,	HRX2_C,			SEL_HSCIF2_2),
-+
-+	PINMUX_IPSR_GPSR(IP17_19_16,	USB1_PWEN),
-+	PINMUX_IPSR_MSEL(IP17_19_16,	SIM0_CLK_C,		SEL_SIMCARD_2),
-+	PINMUX_IPSR_MSEL(IP17_19_16,	SSI_SCK1_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP17_19_16,	TS_SCK0_E,		SEL_TSIF0_4),
-+	PINMUX_IPSR_MSEL(IP17_19_16,	STP_ISCLK_0_E,		SEL_SSP1_0_4),
-+	PINMUX_IPSR_MSEL(IP17_19_16,	FMCLK_B,		SEL_FM_1),
-+	PINMUX_IPSR_MSEL(IP17_19_16,	RIF2_CLK_B,		SEL_DRIF2_1),
-+	PINMUX_IPSR_MSEL(IP17_19_16,	SPEEDIN_A,		SEL_SPEED_PULSE_0),
-+	PINMUX_IPSR_MSEL(IP17_19_16,	HTX2_C,			SEL_HSCIF2_2),
-+
-+	PINMUX_IPSR_GPSR(IP17_23_20,	USB1_OVC),
-+	PINMUX_IPSR_MSEL(IP17_23_20,	MSIOF1_SS2_C,		SEL_MSIOF1_2),
-+	PINMUX_IPSR_MSEL(IP17_23_20,	SSI_WS1_A,		SEL_SSI_0),
-+	PINMUX_IPSR_MSEL(IP17_23_20,	TS_SDAT0_E,		SEL_TSIF0_4),
-+	PINMUX_IPSR_MSEL(IP17_23_20,	STP_ISD_0_E,		SEL_SSP1_0_4),
-+	PINMUX_IPSR_MSEL(IP17_23_20,	FMIN_B,			SEL_FM_1),
-+	PINMUX_IPSR_MSEL(IP17_23_20,	RIF2_SYNC_B,		SEL_DRIF2_1),
-+	PINMUX_IPSR_MSEL(IP17_23_20,	REMOCON_B,		SEL_REMOCON_1),
-+	PINMUX_IPSR_MSEL(IP17_23_20,	HCTS2_N_C,		SEL_HSCIF2_2),
-+
-+	PINMUX_IPSR_GPSR(IP17_27_24,	USB30_PWEN),
-+	PINMUX_IPSR_GPSR(IP17_27_24,	AUDIO_CLKOUT_B),
-+	PINMUX_IPSR_MSEL(IP17_27_24,	SSI_SCK2_B,		SEL_SSI_1),
-+	PINMUX_IPSR_MSEL(IP17_27_24,	TS_SDEN1_D,		SEL_TSIF1_3),
-+	PINMUX_IPSR_MSEL(IP17_27_24,	STP_ISEN_1_D,		SEL_SSP1_1_2),
-+	PINMUX_IPSR_MSEL(IP17_27_24,	STP_OPWM_0_E,		SEL_SSP1_0_4),
-+	PINMUX_IPSR_MSEL(IP17_27_24,	RIF3_D0_B,		SEL_DRIF3_1),
-+	PINMUX_IPSR_MSEL(IP17_27_24,	TCLK2_B,		SEL_TIMER_TMU_1),
-+	PINMUX_IPSR_GPSR(IP17_27_24,	TPU0TO0),
-+	PINMUX_IPSR_MSEL(IP17_27_24,	BPFCLK_C,		SEL_FM_2),
-+	PINMUX_IPSR_MSEL(IP17_27_24,	HRTS2_N_C,		SEL_HSCIF2_2),
-+
-+	PINMUX_IPSR_GPSR(IP17_31_28,	USB30_OVC),
-+	PINMUX_IPSR_GPSR(IP17_31_28,	AUDIO_CLKOUT1_B),
-+	PINMUX_IPSR_MSEL(IP17_31_28,	SSI_WS2_B,		SEL_SSI_1),
-+	PINMUX_IPSR_MSEL(IP17_31_28,	TS_SPSYNC1_D,		SEL_TSIF1_3),
-+	PINMUX_IPSR_MSEL(IP17_31_28,	STP_ISSYNC_1_D,		SEL_SSP1_1_3),
-+	PINMUX_IPSR_MSEL(IP17_31_28,	STP_IVCXO27_0_E,	SEL_SSP1_0_4),
-+	PINMUX_IPSR_MSEL(IP17_31_28,	RIF3_D1_B,		SEL_DRIF3_1),
-+	PINMUX_IPSR_GPSR(IP17_31_28,	FSO_TOE_N),
-+	PINMUX_IPSR_GPSR(IP17_31_28,	TPU0TO1),
-+
-+	/* IPSR18 */
-+	PINMUX_IPSR_GPSR(IP18_3_0,	USB3_PWEN),
-+	PINMUX_IPSR_GPSR(IP18_3_0,	AUDIO_CLKOUT2_B),
-+	PINMUX_IPSR_MSEL(IP18_3_0,	SSI_SCK9_B,		SEL_SSI_1),
-+	PINMUX_IPSR_MSEL(IP18_3_0,	TS_SDEN0_E,		SEL_TSIF0_4),
-+	PINMUX_IPSR_MSEL(IP18_3_0,	STP_ISEN_0_E,		SEL_SSP1_0_4),
-+	PINMUX_IPSR_MSEL(IP18_3_0,	RIF2_D0_B,		SEL_DRIF2_1),
-+	PINMUX_IPSR_GPSR(IP18_3_0,	TPU0TO2),
-+	PINMUX_IPSR_MSEL(IP18_3_0,	FMCLK_C,		SEL_FM_2),
-+	PINMUX_IPSR_MSEL(IP18_3_0,	FMCLK_D,		SEL_FM_3),
-+
-+	PINMUX_IPSR_GPSR(IP18_7_4,	USB3_OVC),
-+	PINMUX_IPSR_GPSR(IP18_7_4,	AUDIO_CLKOUT3_B),
-+	PINMUX_IPSR_MSEL(IP18_7_4,	SSI_WS9_B,		SEL_SSI_1),
-+	PINMUX_IPSR_MSEL(IP18_7_4,	TS_SPSYNC0_E,		SEL_TSIF0_4),
-+	PINMUX_IPSR_MSEL(IP18_7_4,	STP_ISSYNC_0_E,		SEL_SSP1_0_4),
-+	PINMUX_IPSR_MSEL(IP18_7_4,	RIF2_D1_B,		SEL_DRIF2_1),
-+	PINMUX_IPSR_GPSR(IP18_7_4,	TPU0TO3),
-+	PINMUX_IPSR_MSEL(IP18_7_4,	FMIN_C,			SEL_FM_2),
-+	PINMUX_IPSR_MSEL(IP18_7_4,	FMIN_D,			SEL_FM_3),
- 
- /*
-  * Static pins can not be muxed between different functions but
-@@ -1507,3087 +1576,10 @@ static const struct sh_pfc_pin pinmux_pi
- 	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS),
- };
- 
--/* - AUDIO CLOCK ------------------------------------------------------------ */
--static const unsigned int audio_clk_a_a_pins[] = {
--	/* CLK A */
--	RCAR_GP_PIN(6, 22),
--};
--static const unsigned int audio_clk_a_a_mux[] = {
--	AUDIO_CLKA_A_MARK,
--};
--static const unsigned int audio_clk_a_b_pins[] = {
--	/* CLK A */
--	RCAR_GP_PIN(5, 4),
--};
--static const unsigned int audio_clk_a_b_mux[] = {
--	AUDIO_CLKA_B_MARK,
--};
--static const unsigned int audio_clk_a_c_pins[] = {
--	/* CLK A */
--	RCAR_GP_PIN(5, 19),
--};
--static const unsigned int audio_clk_a_c_mux[] = {
--	AUDIO_CLKA_C_MARK,
--};
--static const unsigned int audio_clk_b_a_pins[] = {
--	/* CLK B */
--	RCAR_GP_PIN(5, 12),
--};
--static const unsigned int audio_clk_b_a_mux[] = {
--	AUDIO_CLKB_A_MARK,
--};
--static const unsigned int audio_clk_b_b_pins[] = {
--	/* CLK B */
--	RCAR_GP_PIN(6, 23),
--};
--static const unsigned int audio_clk_b_b_mux[] = {
--	AUDIO_CLKB_B_MARK,
--};
--static const unsigned int audio_clk_c_a_pins[] = {
--	/* CLK C */
--	RCAR_GP_PIN(5, 21),
--};
--static const unsigned int audio_clk_c_a_mux[] = {
--	AUDIO_CLKC_A_MARK,
--};
--static const unsigned int audio_clk_c_b_pins[] = {
--	/* CLK C */
--	RCAR_GP_PIN(5, 0),
--};
--static const unsigned int audio_clk_c_b_mux[] = {
--	AUDIO_CLKC_B_MARK,
--};
--static const unsigned int audio_clkout_a_pins[] = {
--	/* CLKOUT */
--	RCAR_GP_PIN(5, 18),
--};
--static const unsigned int audio_clkout_a_mux[] = {
--	AUDIO_CLKOUT_A_MARK,
--};
--static const unsigned int audio_clkout_b_pins[] = {
--	/* CLKOUT */
--	RCAR_GP_PIN(6, 28),
--};
--static const unsigned int audio_clkout_b_mux[] = {
--	AUDIO_CLKOUT_B_MARK,
--};
--static const unsigned int audio_clkout_c_pins[] = {
--	/* CLKOUT */
--	RCAR_GP_PIN(5, 3),
--};
--static const unsigned int audio_clkout_c_mux[] = {
--	AUDIO_CLKOUT_C_MARK,
--};
--static const unsigned int audio_clkout_d_pins[] = {
--	/* CLKOUT */
--	RCAR_GP_PIN(5, 21),
--};
--static const unsigned int audio_clkout_d_mux[] = {
--	AUDIO_CLKOUT_D_MARK,
--};
--static const unsigned int audio_clkout1_a_pins[] = {
--	/* CLKOUT1 */
--	RCAR_GP_PIN(5, 15),
--};
--static const unsigned int audio_clkout1_a_mux[] = {
--	AUDIO_CLKOUT1_A_MARK,
--};
--static const unsigned int audio_clkout1_b_pins[] = {
--	/* CLKOUT1 */
--	RCAR_GP_PIN(6, 29),
--};
--static const unsigned int audio_clkout1_b_mux[] = {
--	AUDIO_CLKOUT1_B_MARK,
--};
--static const unsigned int audio_clkout2_a_pins[] = {
--	/* CLKOUT2 */
--	RCAR_GP_PIN(5, 16),
--};
--static const unsigned int audio_clkout2_a_mux[] = {
--	AUDIO_CLKOUT2_A_MARK,
--};
--static const unsigned int audio_clkout2_b_pins[] = {
--	/* CLKOUT2 */
--	RCAR_GP_PIN(6, 30),
--};
--static const unsigned int audio_clkout2_b_mux[] = {
--	AUDIO_CLKOUT2_B_MARK,
--};
--
--static const unsigned int audio_clkout3_a_pins[] = {
--	/* CLKOUT3 */
--	RCAR_GP_PIN(5, 19),
--};
--static const unsigned int audio_clkout3_a_mux[] = {
--	AUDIO_CLKOUT3_A_MARK,
--};
--static const unsigned int audio_clkout3_b_pins[] = {
--	/* CLKOUT3 */
--	RCAR_GP_PIN(6, 31),
--};
--static const unsigned int audio_clkout3_b_mux[] = {
--	AUDIO_CLKOUT3_B_MARK,
--};
--
--/* - EtherAVB --------------------------------------------------------------- */
--static const unsigned int avb_link_pins[] = {
--	/* AVB_LINK */
--	RCAR_GP_PIN(2, 12),
--};
--static const unsigned int avb_link_mux[] = {
--	AVB_LINK_MARK,
--};
--static const unsigned int avb_magic_pins[] = {
--	/* AVB_MAGIC_ */
--	RCAR_GP_PIN(2, 10),
--};
--static const unsigned int avb_magic_mux[] = {
--	AVB_MAGIC_MARK,
--};
--static const unsigned int avb_phy_int_pins[] = {
--	/* AVB_PHY_INT */
--	RCAR_GP_PIN(2, 11),
--};
--static const unsigned int avb_phy_int_mux[] = {
--	AVB_PHY_INT_MARK,
--};
--static const unsigned int avb_mdc_pins[] = {
--	/* AVB_MDC, AVB_MDIO */
--	RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9),
--};
--static const unsigned int avb_mdc_mux[] = {
--	AVB_MDC_MARK, AVB_MDIO_MARK,
--};
--static const unsigned int avb_mii_pins[] = {
--	/*
--	 * AVB_TX_CTL, AVB_TXC, AVB_TD0,
--	 * AVB_TD1, AVB_TD2, AVB_TD3,
--	 * AVB_RX_CTL, AVB_RXC, AVB_RD0,
--	 * AVB_RD1, AVB_RD2, AVB_RD3,
--	 * AVB_TXCREFCLK
--	 */
--	PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18),
--	PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17),
--	PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13),
--	PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14),
--	PIN_NUMBER('A', 12),
--
--};
--static const unsigned int avb_mii_mux[] = {
--	AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK,
--	AVB_TD1_MARK, AVB_TD2_MARK, AVB_TD3_MARK,
--	AVB_RX_CTL_MARK, AVB_RXC_MARK, AVB_RD0_MARK,
--	AVB_RD1_MARK, AVB_RD2_MARK, AVB_RD3_MARK,
--	AVB_TXCREFCLK_MARK,
--};
--static const unsigned int avb_avtp_pps_pins[] = {
--	/* AVB_AVTP_PPS */
--	RCAR_GP_PIN(2, 6),
--};
--static const unsigned int avb_avtp_pps_mux[] = {
--	AVB_AVTP_PPS_MARK,
--};
--static const unsigned int avb_avtp_match_a_pins[] = {
--	/* AVB_AVTP_MATCH_A */
--	RCAR_GP_PIN(2, 13),
--};
--static const unsigned int avb_avtp_match_a_mux[] = {
--	AVB_AVTP_MATCH_A_MARK,
--};
--static const unsigned int avb_avtp_capture_a_pins[] = {
--	/* AVB_AVTP_CAPTURE_A */
--	RCAR_GP_PIN(2, 14),
--};
--static const unsigned int avb_avtp_capture_a_mux[] = {
--	AVB_AVTP_CAPTURE_A_MARK,
--};
--static const unsigned int avb_avtp_match_b_pins[] = {
--	/*  AVB_AVTP_MATCH_B */
--	RCAR_GP_PIN(1, 8),
--};
--static const unsigned int avb_avtp_match_b_mux[] = {
--	AVB_AVTP_MATCH_B_MARK,
--};
--static const unsigned int avb_avtp_capture_b_pins[] = {
--	/* AVB_AVTP_CAPTURE_B */
--	RCAR_GP_PIN(1, 11),
--};
--static const unsigned int avb_avtp_capture_b_mux[] = {
--	AVB_AVTP_CAPTURE_B_MARK,
--};
--
--/* - CAN ------------------------------------------------------------------ */
--static const unsigned int can0_data_a_pins[] = {
--	/* TX, RX */
--	RCAR_GP_PIN(1, 23),	RCAR_GP_PIN(1, 24),
--};
--static const unsigned int can0_data_a_mux[] = {
--	CAN0_TX_A_MARK,		CAN0_RX_A_MARK,
--};
--static const unsigned int can0_data_b_pins[] = {
--	/* TX, RX */
--	RCAR_GP_PIN(2, 0),	RCAR_GP_PIN(2, 1),
--};
--static const unsigned int can0_data_b_mux[] = {
--	CAN0_TX_B_MARK,		CAN0_RX_B_MARK,
--};
--static const unsigned int can1_data_pins[] = {
--	/* TX, RX */
--	RCAR_GP_PIN(1, 22),	RCAR_GP_PIN(1, 26),
--};
--static const unsigned int can1_data_mux[] = {
--	CAN1_TX_MARK,		CAN1_RX_MARK,
--};
--
--/* - CAN Clock -------------------------------------------------------------- */
--static const unsigned int can_clk_pins[] = {
--	/* CLK */
--	RCAR_GP_PIN(1, 25),
--};
--static const unsigned int can_clk_mux[] = {
--	CAN_CLK_MARK,
--};
--
--/* - CAN FD --------------------------------------------------------------- */
--static const unsigned int canfd0_data_a_pins[] = {
--	/* TX, RX */
--	RCAR_GP_PIN(1, 23),     RCAR_GP_PIN(1, 24),
--};
--static const unsigned int canfd0_data_a_mux[] = {
--	CANFD0_TX_A_MARK,       CANFD0_RX_A_MARK,
--};
--static const unsigned int canfd0_data_b_pins[] = {
--	/* TX, RX */
--	RCAR_GP_PIN(2, 0),      RCAR_GP_PIN(2, 1),
--};
--static const unsigned int canfd0_data_b_mux[] = {
--	CANFD0_TX_B_MARK,       CANFD0_RX_B_MARK,
--};
--static const unsigned int canfd1_data_pins[] = {
--	/* TX, RX */
--	RCAR_GP_PIN(1, 22),     RCAR_GP_PIN(1, 26),
--};
--static const unsigned int canfd1_data_mux[] = {
--	CANFD1_TX_MARK,         CANFD1_RX_MARK,
--};
--
--/* - DRIF0 --------------------------------------------------------------- */
--static const unsigned int drif0_ctrl_a_pins[] = {
--	/* CLK, SYNC */
--	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
--};
--static const unsigned int drif0_ctrl_a_mux[] = {
--	RIF0_CLK_A_MARK, RIF0_SYNC_A_MARK,
--};
--static const unsigned int drif0_data0_a_pins[] = {
--	/* D0 */
--	RCAR_GP_PIN(6, 10),
--};
--static const unsigned int drif0_data0_a_mux[] = {
--	RIF0_D0_A_MARK,
--};
--static const unsigned int drif0_data1_a_pins[] = {
--	/* D1 */
--	RCAR_GP_PIN(6, 7),
--};
--static const unsigned int drif0_data1_a_mux[] = {
--	RIF0_D1_A_MARK,
--};
--static const unsigned int drif0_ctrl_b_pins[] = {
--	/* CLK, SYNC */
--	RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4),
--};
--static const unsigned int drif0_ctrl_b_mux[] = {
--	RIF0_CLK_B_MARK, RIF0_SYNC_B_MARK,
--};
--static const unsigned int drif0_data0_b_pins[] = {
--	/* D0 */
--	RCAR_GP_PIN(5, 1),
--};
--static const unsigned int drif0_data0_b_mux[] = {
--	RIF0_D0_B_MARK,
--};
--static const unsigned int drif0_data1_b_pins[] = {
--	/* D1 */
--	RCAR_GP_PIN(5, 2),
--};
--static const unsigned int drif0_data1_b_mux[] = {
--	RIF0_D1_B_MARK,
--};
--static const unsigned int drif0_ctrl_c_pins[] = {
--	/* CLK, SYNC */
--	RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 15),
--};
--static const unsigned int drif0_ctrl_c_mux[] = {
--	RIF0_CLK_C_MARK, RIF0_SYNC_C_MARK,
--};
--static const unsigned int drif0_data0_c_pins[] = {
--	/* D0 */
--	RCAR_GP_PIN(5, 13),
--};
--static const unsigned int drif0_data0_c_mux[] = {
--	RIF0_D0_C_MARK,
--};
--static const unsigned int drif0_data1_c_pins[] = {
--	/* D1 */
--	RCAR_GP_PIN(5, 14),
--};
--static const unsigned int drif0_data1_c_mux[] = {
--	RIF0_D1_C_MARK,
--};
--/* - DRIF1 --------------------------------------------------------------- */
--static const unsigned int drif1_ctrl_a_pins[] = {
--	/* CLK, SYNC */
--	RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
--};
--static const unsigned int drif1_ctrl_a_mux[] = {
--	RIF1_CLK_A_MARK, RIF1_SYNC_A_MARK,
--};
--static const unsigned int drif1_data0_a_pins[] = {
--	/* D0 */
--	RCAR_GP_PIN(6, 19),
--};
--static const unsigned int drif1_data0_a_mux[] = {
--	RIF1_D0_A_MARK,
--};
--static const unsigned int drif1_data1_a_pins[] = {
--	/* D1 */
--	RCAR_GP_PIN(6, 20),
--};
--static const unsigned int drif1_data1_a_mux[] = {
--	RIF1_D1_A_MARK,
--};
--static const unsigned int drif1_ctrl_b_pins[] = {
--	/* CLK, SYNC */
--	RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 3),
--};
--static const unsigned int drif1_ctrl_b_mux[] = {
--	RIF1_CLK_B_MARK, RIF1_SYNC_B_MARK,
--};
--static const unsigned int drif1_data0_b_pins[] = {
--	/* D0 */
--	RCAR_GP_PIN(5, 7),
--};
--static const unsigned int drif1_data0_b_mux[] = {
--	RIF1_D0_B_MARK,
--};
--static const unsigned int drif1_data1_b_pins[] = {
--	/* D1 */
--	RCAR_GP_PIN(5, 8),
--};
--static const unsigned int drif1_data1_b_mux[] = {
--	RIF1_D1_B_MARK,
--};
--static const unsigned int drif1_ctrl_c_pins[] = {
--	/* CLK, SYNC */
--	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11),
--};
--static const unsigned int drif1_ctrl_c_mux[] = {
--	RIF1_CLK_C_MARK, RIF1_SYNC_C_MARK,
--};
--static const unsigned int drif1_data0_c_pins[] = {
--	/* D0 */
--	RCAR_GP_PIN(5, 6),
--};
--static const unsigned int drif1_data0_c_mux[] = {
--	RIF1_D0_C_MARK,
--};
--static const unsigned int drif1_data1_c_pins[] = {
--	/* D1 */
--	RCAR_GP_PIN(5, 10),
--};
--static const unsigned int drif1_data1_c_mux[] = {
--	RIF1_D1_C_MARK,
--};
--/* - DRIF2 --------------------------------------------------------------- */
--static const unsigned int drif2_ctrl_a_pins[] = {
--	/* CLK, SYNC */
--	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
--};
--static const unsigned int drif2_ctrl_a_mux[] = {
--	RIF2_CLK_A_MARK, RIF2_SYNC_A_MARK,
--};
--static const unsigned int drif2_data0_a_pins[] = {
--	/* D0 */
--	RCAR_GP_PIN(6, 7),
--};
--static const unsigned int drif2_data0_a_mux[] = {
--	RIF2_D0_A_MARK,
--};
--static const unsigned int drif2_data1_a_pins[] = {
--	/* D1 */
--	RCAR_GP_PIN(6, 10),
--};
--static const unsigned int drif2_data1_a_mux[] = {
--	RIF2_D1_A_MARK,
--};
--static const unsigned int drif2_ctrl_b_pins[] = {
--	/* CLK, SYNC */
--	RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),
--};
--static const unsigned int drif2_ctrl_b_mux[] = {
--	RIF2_CLK_B_MARK, RIF2_SYNC_B_MARK,
--};
--static const unsigned int drif2_data0_b_pins[] = {
--	/* D0 */
--	RCAR_GP_PIN(6, 30),
--};
--static const unsigned int drif2_data0_b_mux[] = {
--	RIF2_D0_B_MARK,
--};
--static const unsigned int drif2_data1_b_pins[] = {
--	/* D1 */
--	RCAR_GP_PIN(6, 31),
--};
--static const unsigned int drif2_data1_b_mux[] = {
--	RIF2_D1_B_MARK,
--};
--/* - DRIF3 --------------------------------------------------------------- */
--static const unsigned int drif3_ctrl_a_pins[] = {
--	/* CLK, SYNC */
--	RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
--};
--static const unsigned int drif3_ctrl_a_mux[] = {
--	RIF3_CLK_A_MARK, RIF3_SYNC_A_MARK,
--};
--static const unsigned int drif3_data0_a_pins[] = {
--	/* D0 */
--	RCAR_GP_PIN(6, 19),
--};
--static const unsigned int drif3_data0_a_mux[] = {
--	RIF3_D0_A_MARK,
--};
--static const unsigned int drif3_data1_a_pins[] = {
--	/* D1 */
--	RCAR_GP_PIN(6, 20),
--};
--static const unsigned int drif3_data1_a_mux[] = {
--	RIF3_D1_A_MARK,
--};
--static const unsigned int drif3_ctrl_b_pins[] = {
--	/* CLK, SYNC */
--	RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25),
--};
--static const unsigned int drif3_ctrl_b_mux[] = {
--	RIF3_CLK_B_MARK, RIF3_SYNC_B_MARK,
--};
--static const unsigned int drif3_data0_b_pins[] = {
--	/* D0 */
--	RCAR_GP_PIN(6, 28),
--};
--static const unsigned int drif3_data0_b_mux[] = {
--	RIF3_D0_B_MARK,
--};
--static const unsigned int drif3_data1_b_pins[] = {
--	/* D1 */
--	RCAR_GP_PIN(6, 29),
--};
--static const unsigned int drif3_data1_b_mux[] = {
--	RIF3_D1_B_MARK,
--};
--
--/* - DU --------------------------------------------------------------------- */
--static const unsigned int du_rgb666_pins[] = {
--	/* R[7:2], G[7:2], B[7:2] */
--	RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13),
--	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
--	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
--	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
--	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
--	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
--};
--static const unsigned int du_rgb666_mux[] = {
--	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
--	DU_DR3_MARK, DU_DR2_MARK,
--	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
--	DU_DG3_MARK, DU_DG2_MARK,
--	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
--	DU_DB3_MARK, DU_DB2_MARK,
--};
--static const unsigned int du_rgb888_pins[] = {
--	/* R[7:0], G[7:0], B[7:0] */
--	RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13),
--	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
--	RCAR_GP_PIN(0, 9),  RCAR_GP_PIN(0, 8),
--	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
--	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
--	RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16),
--	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
--	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
--	RCAR_GP_PIN(1, 1),  RCAR_GP_PIN(1, 0),
--};
--static const unsigned int du_rgb888_mux[] = {
--	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
--	DU_DR3_MARK, DU_DR2_MARK, DU_DR1_MARK, DU_DR0_MARK,
--	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
--	DU_DG3_MARK, DU_DG2_MARK, DU_DG1_MARK, DU_DG0_MARK,
--	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
--	DU_DB3_MARK, DU_DB2_MARK, DU_DB1_MARK, DU_DB0_MARK,
--};
--static const unsigned int du_clk_out_0_pins[] = {
--	/* CLKOUT */
--	RCAR_GP_PIN(1, 27),
--};
--static const unsigned int du_clk_out_0_mux[] = {
--	DU_DOTCLKOUT0_MARK
--};
--static const unsigned int du_clk_out_1_pins[] = {
--	/* CLKOUT */
--	RCAR_GP_PIN(2, 3),
--};
--static const unsigned int du_clk_out_1_mux[] = {
--	DU_DOTCLKOUT1_MARK
--};
--static const unsigned int du_sync_pins[] = {
--	/* EXVSYNC/VSYNC, EXHSYNC/HSYNC */
--	RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 4),
--};
--static const unsigned int du_sync_mux[] = {
--	DU_EXVSYNC_DU_VSYNC_MARK, DU_EXHSYNC_DU_HSYNC_MARK
--};
--static const unsigned int du_oddf_pins[] = {
--	/* EXDISP/EXODDF/EXCDE */
--	RCAR_GP_PIN(2, 2),
--};
--static const unsigned int du_oddf_mux[] = {
--	DU_EXODDF_DU_ODDF_DISP_CDE_MARK,
--};
--static const unsigned int du_cde_pins[] = {
--	/* CDE */
--	RCAR_GP_PIN(2, 0),
--};
--static const unsigned int du_cde_mux[] = {
--	DU_CDE_MARK,
--};
--static const unsigned int du_disp_pins[] = {
--	/* DISP */
--	RCAR_GP_PIN(2, 1),
--};
--static const unsigned int du_disp_mux[] = {
--	DU_DISP_MARK,
--};
--/* - HSCIF0 ----------------------------------------------------------------- */
--static const unsigned int hscif0_data_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14),
--};
--static const unsigned int hscif0_data_mux[] = {
--	HRX0_MARK, HTX0_MARK,
--};
--static const unsigned int hscif0_clk_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(5, 12),
--};
--static const unsigned int hscif0_clk_mux[] = {
--	HSCK0_MARK,
--};
--static const unsigned int hscif0_ctrl_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 15),
--};
--static const unsigned int hscif0_ctrl_mux[] = {
--	HRTS0_N_MARK, HCTS0_N_MARK,
--};
--/* - HSCIF1 ----------------------------------------------------------------- */
--static const unsigned int hscif1_data_a_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
--};
--static const unsigned int hscif1_data_a_mux[] = {
--	HRX1_A_MARK, HTX1_A_MARK,
--};
--static const unsigned int hscif1_clk_a_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(6, 21),
--};
--static const unsigned int hscif1_clk_a_mux[] = {
--	HSCK1_A_MARK,
--};
--static const unsigned int hscif1_ctrl_a_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7),
--};
--static const unsigned int hscif1_ctrl_a_mux[] = {
--	HRTS1_N_A_MARK, HCTS1_N_A_MARK,
--};
--
--static const unsigned int hscif1_data_b_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
--};
--static const unsigned int hscif1_data_b_mux[] = {
--	HRX1_B_MARK, HTX1_B_MARK,
--};
--static const unsigned int hscif1_clk_b_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(5, 0),
--};
--static const unsigned int hscif1_clk_b_mux[] = {
--	HSCK1_B_MARK,
--};
--static const unsigned int hscif1_ctrl_b_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3),
--};
--static const unsigned int hscif1_ctrl_b_mux[] = {
--	HRTS1_N_B_MARK, HCTS1_N_B_MARK,
--};
--/* - HSCIF2 ----------------------------------------------------------------- */
--static const unsigned int hscif2_data_a_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
--};
--static const unsigned int hscif2_data_a_mux[] = {
--	HRX2_A_MARK, HTX2_A_MARK,
--};
--static const unsigned int hscif2_clk_a_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(6, 10),
--};
--static const unsigned int hscif2_clk_a_mux[] = {
--	HSCK2_A_MARK,
--};
--static const unsigned int hscif2_ctrl_a_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6),
--};
--static const unsigned int hscif2_ctrl_a_mux[] = {
--	HRTS2_N_A_MARK, HCTS2_N_A_MARK,
--};
--
--static const unsigned int hscif2_data_b_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
--};
--static const unsigned int hscif2_data_b_mux[] = {
--	HRX2_B_MARK, HTX2_B_MARK,
--};
--static const unsigned int hscif2_clk_b_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(6, 21),
--};
--static const unsigned int hscif2_clk_b_mux[] = {
--	HSCK2_B_MARK,
--};
--static const unsigned int hscif2_ctrl_b_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 19),
--};
--static const unsigned int hscif2_ctrl_b_mux[] = {
--	HRTS2_N_B_MARK, HCTS2_N_B_MARK,
--};
--/* - HSCIF3 ----------------------------------------------------------------- */
--static const unsigned int hscif3_data_a_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
--};
--static const unsigned int hscif3_data_a_mux[] = {
--	HRX3_A_MARK, HTX3_A_MARK,
--};
--static const unsigned int hscif3_clk_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(1, 22),
--};
--static const unsigned int hscif3_clk_mux[] = {
--	HSCK3_MARK,
--};
--static const unsigned int hscif3_ctrl_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
--};
--static const unsigned int hscif3_ctrl_mux[] = {
--	HRTS3_N_MARK, HCTS3_N_MARK,
--};
--
--static const unsigned int hscif3_data_b_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
--};
--static const unsigned int hscif3_data_b_mux[] = {
--	HRX3_B_MARK, HTX3_B_MARK,
--};
--static const unsigned int hscif3_data_c_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
--};
--static const unsigned int hscif3_data_c_mux[] = {
--	HRX3_C_MARK, HTX3_C_MARK,
--};
--static const unsigned int hscif3_data_d_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
--};
--static const unsigned int hscif3_data_d_mux[] = {
--	HRX3_D_MARK, HTX3_D_MARK,
--};
--/* - HSCIF4 ----------------------------------------------------------------- */
--static const unsigned int hscif4_data_a_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
--};
--static const unsigned int hscif4_data_a_mux[] = {
--	HRX4_A_MARK, HTX4_A_MARK,
--};
--static const unsigned int hscif4_clk_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(1, 11),
--};
--static const unsigned int hscif4_clk_mux[] = {
--	HSCK4_MARK,
--};
--static const unsigned int hscif4_ctrl_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14),
--};
--static const unsigned int hscif4_ctrl_mux[] = {
--	HRTS4_N_MARK, HCTS4_N_MARK,
--};
--
--static const unsigned int hscif4_data_b_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
--};
--static const unsigned int hscif4_data_b_mux[] = {
--	HRX4_B_MARK, HTX4_B_MARK,
--};
--
--/* - I2C -------------------------------------------------------------------- */
--static const unsigned int i2c1_a_pins[] = {
--	/* SDA, SCL */
--	RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10),
--};
--static const unsigned int i2c1_a_mux[] = {
--	SDA1_A_MARK, SCL1_A_MARK,
--};
--static const unsigned int i2c1_b_pins[] = {
--	/* SDA, SCL */
--	RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 23),
--};
--static const unsigned int i2c1_b_mux[] = {
--	SDA1_B_MARK, SCL1_B_MARK,
--};
--static const unsigned int i2c2_a_pins[] = {
--	/* SDA, SCL */
--	RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4),
--};
--static const unsigned int i2c2_a_mux[] = {
--	SDA2_A_MARK, SCL2_A_MARK,
--};
--static const unsigned int i2c2_b_pins[] = {
--	/* SDA, SCL */
--	RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 12),
--};
--static const unsigned int i2c2_b_mux[] = {
--	SDA2_B_MARK, SCL2_B_MARK,
--};
--static const unsigned int i2c6_a_pins[] = {
--	/* SDA, SCL */
--	RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
--};
--static const unsigned int i2c6_a_mux[] = {
--	SDA6_A_MARK, SCL6_A_MARK,
--};
--static const unsigned int i2c6_b_pins[] = {
--	/* SDA, SCL */
--	RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
--};
--static const unsigned int i2c6_b_mux[] = {
--	SDA6_B_MARK, SCL6_B_MARK,
--};
--static const unsigned int i2c6_c_pins[] = {
--	/* SDA, SCL */
--	RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14),
--};
--static const unsigned int i2c6_c_mux[] = {
--	SDA6_C_MARK, SCL6_C_MARK,
--};
--
--/* - INTC-EX ---------------------------------------------------------------- */
--static const unsigned int intc_ex_irq0_pins[] = {
--	/* IRQ0 */
--	RCAR_GP_PIN(2, 0),
--};
--static const unsigned int intc_ex_irq0_mux[] = {
--	IRQ0_MARK,
--};
--static const unsigned int intc_ex_irq1_pins[] = {
--	/* IRQ1 */
--	RCAR_GP_PIN(2, 1),
--};
--static const unsigned int intc_ex_irq1_mux[] = {
--	IRQ1_MARK,
--};
--static const unsigned int intc_ex_irq2_pins[] = {
--	/* IRQ2 */
--	RCAR_GP_PIN(2, 2),
--};
--static const unsigned int intc_ex_irq2_mux[] = {
--	IRQ2_MARK,
--};
--static const unsigned int intc_ex_irq3_pins[] = {
--	/* IRQ3 */
--	RCAR_GP_PIN(2, 3),
--};
--static const unsigned int intc_ex_irq3_mux[] = {
--	IRQ3_MARK,
--};
--static const unsigned int intc_ex_irq4_pins[] = {
--	/* IRQ4 */
--	RCAR_GP_PIN(2, 4),
--};
--static const unsigned int intc_ex_irq4_mux[] = {
--	IRQ4_MARK,
--};
--static const unsigned int intc_ex_irq5_pins[] = {
--	/* IRQ5 */
--	RCAR_GP_PIN(2, 5),
--};
--static const unsigned int intc_ex_irq5_mux[] = {
--	IRQ5_MARK,
--};
--
--/* - MSIOF0 ----------------------------------------------------------------- */
--static const unsigned int msiof0_clk_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(5, 17),
--};
--static const unsigned int msiof0_clk_mux[] = {
--	MSIOF0_SCK_MARK,
--};
--static const unsigned int msiof0_sync_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(5, 18),
--};
--static const unsigned int msiof0_sync_mux[] = {
--	MSIOF0_SYNC_MARK,
--};
--static const unsigned int msiof0_ss1_pins[] = {
--	/* SS1 */
--	RCAR_GP_PIN(5, 19),
--};
--static const unsigned int msiof0_ss1_mux[] = {
--	MSIOF0_SS1_MARK,
--};
--static const unsigned int msiof0_ss2_pins[] = {
--	/* SS2 */
--	RCAR_GP_PIN(5, 21),
--};
--static const unsigned int msiof0_ss2_mux[] = {
--	MSIOF0_SS2_MARK,
--};
--static const unsigned int msiof0_txd_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(5, 20),
--};
--static const unsigned int msiof0_txd_mux[] = {
--	MSIOF0_TXD_MARK,
--};
--static const unsigned int msiof0_rxd_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(5, 22),
--};
--static const unsigned int msiof0_rxd_mux[] = {
--	MSIOF0_RXD_MARK,
--};
--/* - MSIOF1 ----------------------------------------------------------------- */
--static const unsigned int msiof1_clk_a_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(6, 8),
--};
--static const unsigned int msiof1_clk_a_mux[] = {
--	MSIOF1_SCK_A_MARK,
--};
--static const unsigned int msiof1_sync_a_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(6, 9),
--};
--static const unsigned int msiof1_sync_a_mux[] = {
--	MSIOF1_SYNC_A_MARK,
--};
--static const unsigned int msiof1_ss1_a_pins[] = {
--	/* SS1 */
--	RCAR_GP_PIN(6, 5),
--};
--static const unsigned int msiof1_ss1_a_mux[] = {
--	MSIOF1_SS1_A_MARK,
--};
--static const unsigned int msiof1_ss2_a_pins[] = {
--	/* SS2 */
--	RCAR_GP_PIN(6, 6),
--};
--static const unsigned int msiof1_ss2_a_mux[] = {
--	MSIOF1_SS2_A_MARK,
--};
--static const unsigned int msiof1_txd_a_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(6, 7),
--};
--static const unsigned int msiof1_txd_a_mux[] = {
--	MSIOF1_TXD_A_MARK,
--};
--static const unsigned int msiof1_rxd_a_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(6, 10),
--};
--static const unsigned int msiof1_rxd_a_mux[] = {
--	MSIOF1_RXD_A_MARK,
--};
--static const unsigned int msiof1_clk_b_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(5, 9),
--};
--static const unsigned int msiof1_clk_b_mux[] = {
--	MSIOF1_SCK_B_MARK,
--};
--static const unsigned int msiof1_sync_b_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(5, 3),
--};
--static const unsigned int msiof1_sync_b_mux[] = {
--	MSIOF1_SYNC_B_MARK,
--};
--static const unsigned int msiof1_ss1_b_pins[] = {
--	/* SS1 */
--	RCAR_GP_PIN(5, 4),
--};
--static const unsigned int msiof1_ss1_b_mux[] = {
--	MSIOF1_SS1_B_MARK,
--};
--static const unsigned int msiof1_ss2_b_pins[] = {
--	/* SS2 */
--	RCAR_GP_PIN(5, 0),
--};
--static const unsigned int msiof1_ss2_b_mux[] = {
--	MSIOF1_SS2_B_MARK,
--};
--static const unsigned int msiof1_txd_b_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(5, 8),
--};
--static const unsigned int msiof1_txd_b_mux[] = {
--	MSIOF1_TXD_B_MARK,
--};
--static const unsigned int msiof1_rxd_b_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(5, 7),
--};
--static const unsigned int msiof1_rxd_b_mux[] = {
--	MSIOF1_RXD_B_MARK,
--};
--static const unsigned int msiof1_clk_c_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(6, 17),
--};
--static const unsigned int msiof1_clk_c_mux[] = {
--	MSIOF1_SCK_C_MARK,
--};
--static const unsigned int msiof1_sync_c_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(6, 18),
--};
--static const unsigned int msiof1_sync_c_mux[] = {
--	MSIOF1_SYNC_C_MARK,
--};
--static const unsigned int msiof1_ss1_c_pins[] = {
--	/* SS1 */
--	RCAR_GP_PIN(6, 21),
--};
--static const unsigned int msiof1_ss1_c_mux[] = {
--	MSIOF1_SS1_C_MARK,
--};
--static const unsigned int msiof1_ss2_c_pins[] = {
--	/* SS2 */
--	RCAR_GP_PIN(6, 27),
--};
--static const unsigned int msiof1_ss2_c_mux[] = {
--	MSIOF1_SS2_C_MARK,
--};
--static const unsigned int msiof1_txd_c_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(6, 20),
--};
--static const unsigned int msiof1_txd_c_mux[] = {
--	MSIOF1_TXD_C_MARK,
--};
--static const unsigned int msiof1_rxd_c_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(6, 19),
--};
--static const unsigned int msiof1_rxd_c_mux[] = {
--	MSIOF1_RXD_C_MARK,
--};
--static const unsigned int msiof1_clk_d_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(5, 12),
--};
--static const unsigned int msiof1_clk_d_mux[] = {
--	MSIOF1_SCK_D_MARK,
--};
--static const unsigned int msiof1_sync_d_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(5, 15),
--};
--static const unsigned int msiof1_sync_d_mux[] = {
--	MSIOF1_SYNC_D_MARK,
--};
--static const unsigned int msiof1_ss1_d_pins[] = {
--	/* SS1 */
--	RCAR_GP_PIN(5, 16),
--};
--static const unsigned int msiof1_ss1_d_mux[] = {
--	MSIOF1_SS1_D_MARK,
--};
--static const unsigned int msiof1_ss2_d_pins[] = {
--	/* SS2 */
--	RCAR_GP_PIN(5, 21),
--};
--static const unsigned int msiof1_ss2_d_mux[] = {
--	MSIOF1_SS2_D_MARK,
--};
--static const unsigned int msiof1_txd_d_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(5, 14),
--};
--static const unsigned int msiof1_txd_d_mux[] = {
--	MSIOF1_TXD_D_MARK,
--};
--static const unsigned int msiof1_rxd_d_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(5, 13),
--};
--static const unsigned int msiof1_rxd_d_mux[] = {
--	MSIOF1_RXD_D_MARK,
--};
--static const unsigned int msiof1_clk_e_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(3, 0),
--};
--static const unsigned int msiof1_clk_e_mux[] = {
--	MSIOF1_SCK_E_MARK,
--};
--static const unsigned int msiof1_sync_e_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(3, 1),
--};
--static const unsigned int msiof1_sync_e_mux[] = {
--	MSIOF1_SYNC_E_MARK,
--};
--static const unsigned int msiof1_ss1_e_pins[] = {
--	/* SS1 */
--	RCAR_GP_PIN(3, 4),
--};
--static const unsigned int msiof1_ss1_e_mux[] = {
--	MSIOF1_SS1_E_MARK,
--};
--static const unsigned int msiof1_ss2_e_pins[] = {
--	/* SS2 */
--	RCAR_GP_PIN(3, 5),
--};
--static const unsigned int msiof1_ss2_e_mux[] = {
--	MSIOF1_SS2_E_MARK,
--};
--static const unsigned int msiof1_txd_e_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(3, 3),
--};
--static const unsigned int msiof1_txd_e_mux[] = {
--	MSIOF1_TXD_E_MARK,
--};
--static const unsigned int msiof1_rxd_e_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(3, 2),
--};
--static const unsigned int msiof1_rxd_e_mux[] = {
--	MSIOF1_RXD_E_MARK,
--};
--static const unsigned int msiof1_clk_f_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(5, 23),
--};
--static const unsigned int msiof1_clk_f_mux[] = {
--	MSIOF1_SCK_F_MARK,
--};
--static const unsigned int msiof1_sync_f_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(5, 24),
--};
--static const unsigned int msiof1_sync_f_mux[] = {
--	MSIOF1_SYNC_F_MARK,
--};
--static const unsigned int msiof1_ss1_f_pins[] = {
--	/* SS1 */
--	RCAR_GP_PIN(6, 1),
--};
--static const unsigned int msiof1_ss1_f_mux[] = {
--	MSIOF1_SS1_F_MARK,
--};
--static const unsigned int msiof1_ss2_f_pins[] = {
--	/* SS2 */
--	RCAR_GP_PIN(6, 2),
--};
--static const unsigned int msiof1_ss2_f_mux[] = {
--	MSIOF1_SS2_F_MARK,
--};
--static const unsigned int msiof1_txd_f_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(6, 0),
--};
--static const unsigned int msiof1_txd_f_mux[] = {
--	MSIOF1_TXD_F_MARK,
--};
--static const unsigned int msiof1_rxd_f_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(5, 25),
--};
--static const unsigned int msiof1_rxd_f_mux[] = {
--	MSIOF1_RXD_F_MARK,
--};
--static const unsigned int msiof1_clk_g_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(3, 6),
--};
--static const unsigned int msiof1_clk_g_mux[] = {
--	MSIOF1_SCK_G_MARK,
--};
--static const unsigned int msiof1_sync_g_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(3, 7),
--};
--static const unsigned int msiof1_sync_g_mux[] = {
--	MSIOF1_SYNC_G_MARK,
--};
--static const unsigned int msiof1_ss1_g_pins[] = {
--	/* SS1 */
--	RCAR_GP_PIN(3, 10),
--};
--static const unsigned int msiof1_ss1_g_mux[] = {
--	MSIOF1_SS1_G_MARK,
--};
--static const unsigned int msiof1_ss2_g_pins[] = {
--	/* SS2 */
--	RCAR_GP_PIN(3, 11),
--};
--static const unsigned int msiof1_ss2_g_mux[] = {
--	MSIOF1_SS2_G_MARK,
--};
--static const unsigned int msiof1_txd_g_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(3, 9),
--};
--static const unsigned int msiof1_txd_g_mux[] = {
--	MSIOF1_TXD_G_MARK,
--};
--static const unsigned int msiof1_rxd_g_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(3, 8),
--};
--static const unsigned int msiof1_rxd_g_mux[] = {
--	MSIOF1_RXD_G_MARK,
--};
--/* - MSIOF2 ----------------------------------------------------------------- */
--static const unsigned int msiof2_clk_a_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(1, 9),
--};
--static const unsigned int msiof2_clk_a_mux[] = {
--	MSIOF2_SCK_A_MARK,
--};
--static const unsigned int msiof2_sync_a_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(1, 8),
--};
--static const unsigned int msiof2_sync_a_mux[] = {
--	MSIOF2_SYNC_A_MARK,
--};
--static const unsigned int msiof2_ss1_a_pins[] = {
--	/* SS1 */
--	RCAR_GP_PIN(1, 6),
--};
--static const unsigned int msiof2_ss1_a_mux[] = {
--	MSIOF2_SS1_A_MARK,
--};
--static const unsigned int msiof2_ss2_a_pins[] = {
--	/* SS2 */
--	RCAR_GP_PIN(1, 7),
--};
--static const unsigned int msiof2_ss2_a_mux[] = {
--	MSIOF2_SS2_A_MARK,
--};
--static const unsigned int msiof2_txd_a_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(1, 11),
--};
--static const unsigned int msiof2_txd_a_mux[] = {
--	MSIOF2_TXD_A_MARK,
--};
--static const unsigned int msiof2_rxd_a_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(1, 10),
--};
--static const unsigned int msiof2_rxd_a_mux[] = {
--	MSIOF2_RXD_A_MARK,
--};
--static const unsigned int msiof2_clk_b_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(0, 4),
--};
--static const unsigned int msiof2_clk_b_mux[] = {
--	MSIOF2_SCK_B_MARK,
--};
--static const unsigned int msiof2_sync_b_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(0, 5),
--};
--static const unsigned int msiof2_sync_b_mux[] = {
--	MSIOF2_SYNC_B_MARK,
--};
--static const unsigned int msiof2_ss1_b_pins[] = {
--	/* SS1 */
--	RCAR_GP_PIN(0, 0),
--};
--static const unsigned int msiof2_ss1_b_mux[] = {
--	MSIOF2_SS1_B_MARK,
--};
--static const unsigned int msiof2_ss2_b_pins[] = {
--	/* SS2 */
--	RCAR_GP_PIN(0, 1),
--};
--static const unsigned int msiof2_ss2_b_mux[] = {
--	MSIOF2_SS2_B_MARK,
--};
--static const unsigned int msiof2_txd_b_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(0, 7),
--};
--static const unsigned int msiof2_txd_b_mux[] = {
--	MSIOF2_TXD_B_MARK,
--};
--static const unsigned int msiof2_rxd_b_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(0, 6),
--};
--static const unsigned int msiof2_rxd_b_mux[] = {
--	MSIOF2_RXD_B_MARK,
--};
--static const unsigned int msiof2_clk_c_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(2, 12),
--};
--static const unsigned int msiof2_clk_c_mux[] = {
--	MSIOF2_SCK_C_MARK,
--};
--static const unsigned int msiof2_sync_c_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(2, 11),
--};
--static const unsigned int msiof2_sync_c_mux[] = {
--	MSIOF2_SYNC_C_MARK,
--};
--static const unsigned int msiof2_ss1_c_pins[] = {
--	/* SS1 */
--	RCAR_GP_PIN(2, 10),
--};
--static const unsigned int msiof2_ss1_c_mux[] = {
--	MSIOF2_SS1_C_MARK,
--};
--static const unsigned int msiof2_ss2_c_pins[] = {
--	/* SS2 */
--	RCAR_GP_PIN(2, 9),
--};
--static const unsigned int msiof2_ss2_c_mux[] = {
--	MSIOF2_SS2_C_MARK,
--};
--static const unsigned int msiof2_txd_c_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(2, 14),
--};
--static const unsigned int msiof2_txd_c_mux[] = {
--	MSIOF2_TXD_C_MARK,
--};
--static const unsigned int msiof2_rxd_c_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(2, 13),
--};
--static const unsigned int msiof2_rxd_c_mux[] = {
--	MSIOF2_RXD_C_MARK,
--};
--static const unsigned int msiof2_clk_d_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(0, 8),
--};
--static const unsigned int msiof2_clk_d_mux[] = {
--	MSIOF2_SCK_D_MARK,
--};
--static const unsigned int msiof2_sync_d_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(0, 9),
--};
--static const unsigned int msiof2_sync_d_mux[] = {
--	MSIOF2_SYNC_D_MARK,
--};
--static const unsigned int msiof2_ss1_d_pins[] = {
--	/* SS1 */
--	RCAR_GP_PIN(0, 12),
--};
--static const unsigned int msiof2_ss1_d_mux[] = {
--	MSIOF2_SS1_D_MARK,
--};
--static const unsigned int msiof2_ss2_d_pins[] = {
--	/* SS2 */
--	RCAR_GP_PIN(0, 13),
--};
--static const unsigned int msiof2_ss2_d_mux[] = {
--	MSIOF2_SS2_D_MARK,
--};
--static const unsigned int msiof2_txd_d_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(0, 11),
--};
--static const unsigned int msiof2_txd_d_mux[] = {
--	MSIOF2_TXD_D_MARK,
--};
--static const unsigned int msiof2_rxd_d_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(0, 10),
--};
--static const unsigned int msiof2_rxd_d_mux[] = {
--	MSIOF2_RXD_D_MARK,
--};
--/* - MSIOF3 ----------------------------------------------------------------- */
--static const unsigned int msiof3_clk_a_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(0, 0),
--};
--static const unsigned int msiof3_clk_a_mux[] = {
--	MSIOF3_SCK_A_MARK,
--};
--static const unsigned int msiof3_sync_a_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(0, 1),
--};
--static const unsigned int msiof3_sync_a_mux[] = {
--	MSIOF3_SYNC_A_MARK,
--};
--static const unsigned int msiof3_ss1_a_pins[] = {
--	/* SS1 */
--	RCAR_GP_PIN(0, 14),
--};
--static const unsigned int msiof3_ss1_a_mux[] = {
--	MSIOF3_SS1_A_MARK,
--};
--static const unsigned int msiof3_ss2_a_pins[] = {
--	/* SS2 */
--	RCAR_GP_PIN(0, 15),
--};
--static const unsigned int msiof3_ss2_a_mux[] = {
--	MSIOF3_SS2_A_MARK,
--};
--static const unsigned int msiof3_txd_a_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(0, 3),
--};
--static const unsigned int msiof3_txd_a_mux[] = {
--	MSIOF3_TXD_A_MARK,
--};
--static const unsigned int msiof3_rxd_a_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(0, 2),
--};
--static const unsigned int msiof3_rxd_a_mux[] = {
--	MSIOF3_RXD_A_MARK,
--};
--static const unsigned int msiof3_clk_b_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(1, 2),
--};
--static const unsigned int msiof3_clk_b_mux[] = {
--	MSIOF3_SCK_B_MARK,
--};
--static const unsigned int msiof3_sync_b_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(1, 0),
--};
--static const unsigned int msiof3_sync_b_mux[] = {
--	MSIOF3_SYNC_B_MARK,
--};
--static const unsigned int msiof3_ss1_b_pins[] = {
--	/* SS1 */
--	RCAR_GP_PIN(1, 4),
--};
--static const unsigned int msiof3_ss1_b_mux[] = {
--	MSIOF3_SS1_B_MARK,
--};
--static const unsigned int msiof3_ss2_b_pins[] = {
--	/* SS2 */
--	RCAR_GP_PIN(1, 5),
--};
--static const unsigned int msiof3_ss2_b_mux[] = {
--	MSIOF3_SS2_B_MARK,
--};
--static const unsigned int msiof3_txd_b_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(1, 1),
--};
--static const unsigned int msiof3_txd_b_mux[] = {
--	MSIOF3_TXD_B_MARK,
--};
--static const unsigned int msiof3_rxd_b_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(1, 3),
--};
--static const unsigned int msiof3_rxd_b_mux[] = {
--	MSIOF3_RXD_B_MARK,
--};
--static const unsigned int msiof3_clk_c_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(1, 12),
--};
--static const unsigned int msiof3_clk_c_mux[] = {
--	MSIOF3_SCK_C_MARK,
--};
--static const unsigned int msiof3_sync_c_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(1, 13),
--};
--static const unsigned int msiof3_sync_c_mux[] = {
--	MSIOF3_SYNC_C_MARK,
--};
--static const unsigned int msiof3_txd_c_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(1, 15),
--};
--static const unsigned int msiof3_txd_c_mux[] = {
--	MSIOF3_TXD_C_MARK,
--};
--static const unsigned int msiof3_rxd_c_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(1, 14),
--};
--static const unsigned int msiof3_rxd_c_mux[] = {
--	MSIOF3_RXD_C_MARK,
--};
--static const unsigned int msiof3_clk_d_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(1, 22),
--};
--static const unsigned int msiof3_clk_d_mux[] = {
--	MSIOF3_SCK_D_MARK,
--};
--static const unsigned int msiof3_sync_d_pins[] = {
--	/* SYNC */
--	RCAR_GP_PIN(1, 23),
--};
--static const unsigned int msiof3_sync_d_mux[] = {
--	MSIOF3_SYNC_D_MARK,
--};
--static const unsigned int msiof3_ss1_d_pins[] = {
--	/* SS1 */
--	RCAR_GP_PIN(1, 26),
--};
--static const unsigned int msiof3_ss1_d_mux[] = {
--	MSIOF3_SS1_D_MARK,
--};
--static const unsigned int msiof3_txd_d_pins[] = {
--	/* TXD */
--	RCAR_GP_PIN(1, 25),
--};
--static const unsigned int msiof3_txd_d_mux[] = {
--	MSIOF3_TXD_D_MARK,
--};
--static const unsigned int msiof3_rxd_d_pins[] = {
--	/* RXD */
--	RCAR_GP_PIN(1, 24),
--};
--static const unsigned int msiof3_rxd_d_mux[] = {
--	MSIOF3_RXD_D_MARK,
--};
--
--/* - PWM0 --------------------------------------------------------------------*/
--static const unsigned int pwm0_pins[] = {
--	/* PWM */
--	RCAR_GP_PIN(2, 6),
--};
--static const unsigned int pwm0_mux[] = {
--	PWM0_MARK,
--};
--/* - PWM1 --------------------------------------------------------------------*/
--static const unsigned int pwm1_a_pins[] = {
--	/* PWM */
--	RCAR_GP_PIN(2, 7),
--};
--static const unsigned int pwm1_a_mux[] = {
--	PWM1_A_MARK,
--};
--static const unsigned int pwm1_b_pins[] = {
--	/* PWM */
--	RCAR_GP_PIN(1, 8),
--};
--static const unsigned int pwm1_b_mux[] = {
--	PWM1_B_MARK,
--};
--/* - PWM2 --------------------------------------------------------------------*/
--static const unsigned int pwm2_a_pins[] = {
--	/* PWM */
--	RCAR_GP_PIN(2, 8),
--};
--static const unsigned int pwm2_a_mux[] = {
--	PWM2_A_MARK,
--};
--static const unsigned int pwm2_b_pins[] = {
--	/* PWM */
--	RCAR_GP_PIN(1, 11),
--};
--static const unsigned int pwm2_b_mux[] = {
--	PWM2_B_MARK,
--};
--/* - PWM3 --------------------------------------------------------------------*/
--static const unsigned int pwm3_a_pins[] = {
--	/* PWM */
--	RCAR_GP_PIN(1, 0),
--};
--static const unsigned int pwm3_a_mux[] = {
--	PWM3_A_MARK,
--};
--static const unsigned int pwm3_b_pins[] = {
--	/* PWM */
--	RCAR_GP_PIN(2, 2),
--};
--static const unsigned int pwm3_b_mux[] = {
--	PWM3_B_MARK,
--};
--/* - PWM4 --------------------------------------------------------------------*/
--static const unsigned int pwm4_a_pins[] = {
--	/* PWM */
--	RCAR_GP_PIN(1, 1),
--};
--static const unsigned int pwm4_a_mux[] = {
--	PWM4_A_MARK,
--};
--static const unsigned int pwm4_b_pins[] = {
--	/* PWM */
--	RCAR_GP_PIN(2, 3),
--};
--static const unsigned int pwm4_b_mux[] = {
--	PWM4_B_MARK,
--};
--/* - PWM5 --------------------------------------------------------------------*/
--static const unsigned int pwm5_a_pins[] = {
--	/* PWM */
--	RCAR_GP_PIN(1, 2),
--};
--static const unsigned int pwm5_a_mux[] = {
--	PWM5_A_MARK,
--};
--static const unsigned int pwm5_b_pins[] = {
--	/* PWM */
--	RCAR_GP_PIN(2, 4),
--};
--static const unsigned int pwm5_b_mux[] = {
--	PWM5_B_MARK,
--};
--/* - PWM6 --------------------------------------------------------------------*/
--static const unsigned int pwm6_a_pins[] = {
--	/* PWM */
--	RCAR_GP_PIN(1, 3),
--};
--static const unsigned int pwm6_a_mux[] = {
--	PWM6_A_MARK,
--};
--static const unsigned int pwm6_b_pins[] = {
--	/* PWM */
--	RCAR_GP_PIN(2, 5),
--};
--static const unsigned int pwm6_b_mux[] = {
--	PWM6_B_MARK,
--};
--
--/* - QSPI0 ------------------------------------------------------------------ */
--static const unsigned int qspi0_ctrl_pins[] = {
--	/* QSPI0_SPCLK, QSPI0_SSL */
--	PIN_NUMBER('W', 3), PIN_NUMBER('Y', 3),
--};
--static const unsigned int qspi0_ctrl_mux[] = {
--	QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
--};
--static const unsigned int qspi0_data2_pins[] = {
--	/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
--	PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
--};
--static const unsigned int qspi0_data2_mux[] = {
--	QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
--};
--static const unsigned int qspi0_data4_pins[] = {
--	/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1, QSPI0_IO2, QSPI0_IO3 */
--	PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
--	PIN_NUMBER('Y', 6), PIN_A_NUMBER('B', 6),
--};
--static const unsigned int qspi0_data4_mux[] = {
--	QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
--	QSPI0_IO2_MARK, QSPI0_IO3_MARK,
--};
--/* - QSPI1 ------------------------------------------------------------------ */
--static const unsigned int qspi1_ctrl_pins[] = {
--	/* QSPI1_SPCLK, QSPI1_SSL */
--	PIN_NUMBER('V', 3), PIN_NUMBER('V', 5),
--};
--static const unsigned int qspi1_ctrl_mux[] = {
--	QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
--};
--static const unsigned int qspi1_data2_pins[] = {
--	/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
--	PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
--};
--static const unsigned int qspi1_data2_mux[] = {
--	QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
--};
--static const unsigned int qspi1_data4_pins[] = {
--	/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1, QSPI1_IO2, QSPI1_IO3 */
--	PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
--	PIN_A_NUMBER('E', 4), PIN_A_NUMBER('C', 3),
--};
--static const unsigned int qspi1_data4_mux[] = {
--	QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
--	QSPI1_IO2_MARK, QSPI1_IO3_MARK,
--};
--
--/* - SATA --------------------------------------------------------------------*/
--static const unsigned int sata0_devslp_a_pins[] = {
--	/* DEVSLP */
--	RCAR_GP_PIN(6, 16),
--};
--static const unsigned int sata0_devslp_a_mux[] = {
--	SATA_DEVSLP_A_MARK,
--};
--static const unsigned int sata0_devslp_b_pins[] = {
--	/* DEVSLP */
--	RCAR_GP_PIN(4, 6),
--};
--static const unsigned int sata0_devslp_b_mux[] = {
--	SATA_DEVSLP_B_MARK,
--};
--
--/* - SCIF0 ------------------------------------------------------------------ */
--static const unsigned int scif0_data_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
--};
--static const unsigned int scif0_data_mux[] = {
--	RX0_MARK, TX0_MARK,
--};
--static const unsigned int scif0_clk_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(5, 0),
--};
--static const unsigned int scif0_clk_mux[] = {
--	SCK0_MARK,
--};
--static const unsigned int scif0_ctrl_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3),
--};
--static const unsigned int scif0_ctrl_mux[] = {
--	RTS0_N_TANS_MARK, CTS0_N_MARK,
--};
--/* - SCIF1 ------------------------------------------------------------------ */
--static const unsigned int scif1_data_a_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
--};
--static const unsigned int scif1_data_a_mux[] = {
--	RX1_A_MARK, TX1_A_MARK,
--};
--static const unsigned int scif1_clk_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(6, 21),
--};
--static const unsigned int scif1_clk_mux[] = {
--	SCK1_MARK,
--};
--static const unsigned int scif1_ctrl_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7),
--};
--static const unsigned int scif1_ctrl_mux[] = {
--	RTS1_N_TANS_MARK, CTS1_N_MARK,
--};
--
--static const unsigned int scif1_data_b_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
--};
--static const unsigned int scif1_data_b_mux[] = {
--	RX1_B_MARK, TX1_B_MARK,
--};
--/* - SCIF2 ------------------------------------------------------------------ */
--static const unsigned int scif2_data_a_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10),
--};
--static const unsigned int scif2_data_a_mux[] = {
--	RX2_A_MARK, TX2_A_MARK,
--};
--static const unsigned int scif2_clk_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(5, 9),
--};
--static const unsigned int scif2_clk_mux[] = {
--	SCK2_MARK,
--};
--static const unsigned int scif2_data_b_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16),
--};
--static const unsigned int scif2_data_b_mux[] = {
--	RX2_B_MARK, TX2_B_MARK,
--};
--/* - SCIF3 ------------------------------------------------------------------ */
--static const unsigned int scif3_data_a_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
--};
--static const unsigned int scif3_data_a_mux[] = {
--	RX3_A_MARK, TX3_A_MARK,
--};
--static const unsigned int scif3_clk_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(1, 22),
--};
--static const unsigned int scif3_clk_mux[] = {
--	SCK3_MARK,
--};
--static const unsigned int scif3_ctrl_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
--};
--static const unsigned int scif3_ctrl_mux[] = {
--	RTS3_N_TANS_MARK, CTS3_N_MARK,
--};
--static const unsigned int scif3_data_b_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
--};
--static const unsigned int scif3_data_b_mux[] = {
--	RX3_B_MARK, TX3_B_MARK,
--};
--/* - SCIF4 ------------------------------------------------------------------ */
--static const unsigned int scif4_data_a_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12),
--};
--static const unsigned int scif4_data_a_mux[] = {
--	RX4_A_MARK, TX4_A_MARK,
--};
--static const unsigned int scif4_clk_a_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(2, 10),
--};
--static const unsigned int scif4_clk_a_mux[] = {
--	SCK4_A_MARK,
--};
--static const unsigned int scif4_ctrl_a_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
--};
--static const unsigned int scif4_ctrl_a_mux[] = {
--	RTS4_N_TANS_A_MARK, CTS4_N_A_MARK,
--};
--static const unsigned int scif4_data_b_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
--};
--static const unsigned int scif4_data_b_mux[] = {
--	RX4_B_MARK, TX4_B_MARK,
--};
--static const unsigned int scif4_clk_b_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(1, 5),
--};
--static const unsigned int scif4_clk_b_mux[] = {
--	SCK4_B_MARK,
--};
--static const unsigned int scif4_ctrl_b_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
--};
--static const unsigned int scif4_ctrl_b_mux[] = {
--	RTS4_N_TANS_B_MARK, CTS4_N_B_MARK,
--};
--static const unsigned int scif4_data_c_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
--};
--static const unsigned int scif4_data_c_mux[] = {
--	RX4_C_MARK, TX4_C_MARK,
--};
--static const unsigned int scif4_clk_c_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(0, 8),
--};
--static const unsigned int scif4_clk_c_mux[] = {
--	SCK4_C_MARK,
--};
--static const unsigned int scif4_ctrl_c_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
--};
--static const unsigned int scif4_ctrl_c_mux[] = {
--	RTS4_N_TANS_C_MARK, CTS4_N_C_MARK,
--};
--/* - SCIF5 ------------------------------------------------------------------ */
--static const unsigned int scif5_data_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 21),
--};
--static const unsigned int scif5_data_mux[] = {
--	RX5_MARK, TX5_MARK,
--};
--static const unsigned int scif5_clk_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(6, 21),
--};
--static const unsigned int scif5_clk_mux[] = {
--	SCK5_MARK,
--};
--
--/* - SCIF Clock ------------------------------------------------------------- */
--static const unsigned int scif_clk_a_pins[] = {
--	/* SCIF_CLK */
--	RCAR_GP_PIN(6, 23),
--};
--static const unsigned int scif_clk_a_mux[] = {
--	SCIF_CLK_A_MARK,
--};
--static const unsigned int scif_clk_b_pins[] = {
--	/* SCIF_CLK */
--	RCAR_GP_PIN(5, 9),
--};
--static const unsigned int scif_clk_b_mux[] = {
--	SCIF_CLK_B_MARK,
--};
--
--/* - SDHI0 ------------------------------------------------------------------ */
--static const unsigned int sdhi0_data1_pins[] = {
--	/* D0 */
--	RCAR_GP_PIN(3, 2),
--};
--static const unsigned int sdhi0_data1_mux[] = {
--	SD0_DAT0_MARK,
--};
--static const unsigned int sdhi0_data4_pins[] = {
--	/* D[0:3] */
--	RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),
--	RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
--};
--static const unsigned int sdhi0_data4_mux[] = {
--	SD0_DAT0_MARK, SD0_DAT1_MARK,
--	SD0_DAT2_MARK, SD0_DAT3_MARK,
--};
--static const unsigned int sdhi0_ctrl_pins[] = {
--	/* CLK, CMD */
--	RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1),
--};
--static const unsigned int sdhi0_ctrl_mux[] = {
--	SD0_CLK_MARK, SD0_CMD_MARK,
--};
--static const unsigned int sdhi0_cd_pins[] = {
--	/* CD */
--	RCAR_GP_PIN(3, 12),
--};
--static const unsigned int sdhi0_cd_mux[] = {
--	SD0_CD_MARK,
--};
--static const unsigned int sdhi0_wp_pins[] = {
--	/* WP */
--	RCAR_GP_PIN(3, 13),
--};
--static const unsigned int sdhi0_wp_mux[] = {
--	SD0_WP_MARK,
--};
--/* - SDHI1 ------------------------------------------------------------------ */
--static const unsigned int sdhi1_data1_pins[] = {
--	/* D0 */
--	RCAR_GP_PIN(3, 8),
--};
--static const unsigned int sdhi1_data1_mux[] = {
--	SD1_DAT0_MARK,
--};
--static const unsigned int sdhi1_data4_pins[] = {
--	/* D[0:3] */
--	RCAR_GP_PIN(3, 8),  RCAR_GP_PIN(3, 9),
--	RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
--};
--static const unsigned int sdhi1_data4_mux[] = {
--	SD1_DAT0_MARK, SD1_DAT1_MARK,
--	SD1_DAT2_MARK, SD1_DAT3_MARK,
--};
--static const unsigned int sdhi1_ctrl_pins[] = {
--	/* CLK, CMD */
--	RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
--};
--static const unsigned int sdhi1_ctrl_mux[] = {
--	SD1_CLK_MARK, SD1_CMD_MARK,
--};
--static const unsigned int sdhi1_cd_pins[] = {
--	/* CD */
--	RCAR_GP_PIN(3, 14),
--};
--static const unsigned int sdhi1_cd_mux[] = {
--	SD1_CD_MARK,
--};
--static const unsigned int sdhi1_wp_pins[] = {
--	/* WP */
--	RCAR_GP_PIN(3, 15),
--};
--static const unsigned int sdhi1_wp_mux[] = {
--	SD1_WP_MARK,
--};
--/* - SDHI2 ------------------------------------------------------------------ */
--static const unsigned int sdhi2_data1_pins[] = {
--	/* D0 */
--	RCAR_GP_PIN(4, 2),
--};
--static const unsigned int sdhi2_data1_mux[] = {
--	SD2_DAT0_MARK,
--};
--static const unsigned int sdhi2_data4_pins[] = {
--	/* D[0:3] */
--	RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3),
--	RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5),
--};
--static const unsigned int sdhi2_data4_mux[] = {
--	SD2_DAT0_MARK, SD2_DAT1_MARK,
--	SD2_DAT2_MARK, SD2_DAT3_MARK,
--};
--static const unsigned int sdhi2_data8_pins[] = {
--	/* D[0:7] */
--	RCAR_GP_PIN(4, 2),  RCAR_GP_PIN(4, 3),
--	RCAR_GP_PIN(4, 4),  RCAR_GP_PIN(4, 5),
--	RCAR_GP_PIN(3, 8),  RCAR_GP_PIN(3, 9),
--	RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
--};
--static const unsigned int sdhi2_data8_mux[] = {
--	SD2_DAT0_MARK, SD2_DAT1_MARK,
--	SD2_DAT2_MARK, SD2_DAT3_MARK,
--	SD2_DAT4_MARK, SD2_DAT5_MARK,
--	SD2_DAT6_MARK, SD2_DAT7_MARK,
--};
--static const unsigned int sdhi2_ctrl_pins[] = {
--	/* CLK, CMD */
--	RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1),
--};
--static const unsigned int sdhi2_ctrl_mux[] = {
--	SD2_CLK_MARK, SD2_CMD_MARK,
--};
--static const unsigned int sdhi2_cd_a_pins[] = {
--	/* CD */
--	RCAR_GP_PIN(4, 13),
--};
--static const unsigned int sdhi2_cd_a_mux[] = {
--	SD2_CD_A_MARK,
--};
--static const unsigned int sdhi2_cd_b_pins[] = {
--	/* CD */
--	RCAR_GP_PIN(5, 10),
--};
--static const unsigned int sdhi2_cd_b_mux[] = {
--	SD2_CD_B_MARK,
--};
--static const unsigned int sdhi2_wp_a_pins[] = {
--	/* WP */
--	RCAR_GP_PIN(4, 14),
--};
--static const unsigned int sdhi2_wp_a_mux[] = {
--	SD2_WP_A_MARK,
--};
--static const unsigned int sdhi2_wp_b_pins[] = {
--	/* WP */
--	RCAR_GP_PIN(5, 11),
--};
--static const unsigned int sdhi2_wp_b_mux[] = {
--	SD2_WP_B_MARK,
--};
--static const unsigned int sdhi2_ds_pins[] = {
--	/* DS */
--	RCAR_GP_PIN(4, 6),
--};
--static const unsigned int sdhi2_ds_mux[] = {
--	SD2_DS_MARK,
--};
--/* - SDHI3 ------------------------------------------------------------------ */
--static const unsigned int sdhi3_data1_pins[] = {
--	/* D0 */
--	RCAR_GP_PIN(4, 9),
--};
--static const unsigned int sdhi3_data1_mux[] = {
--	SD3_DAT0_MARK,
--};
--static const unsigned int sdhi3_data4_pins[] = {
--	/* D[0:3] */
--	RCAR_GP_PIN(4, 9),  RCAR_GP_PIN(4, 10),
--	RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12),
--};
--static const unsigned int sdhi3_data4_mux[] = {
--	SD3_DAT0_MARK, SD3_DAT1_MARK,
--	SD3_DAT2_MARK, SD3_DAT3_MARK,
--};
--static const unsigned int sdhi3_data8_pins[] = {
--	/* D[0:7] */
--	RCAR_GP_PIN(4, 9),  RCAR_GP_PIN(4, 10),
--	RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12),
--	RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 14),
--	RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16),
--};
--static const unsigned int sdhi3_data8_mux[] = {
--	SD3_DAT0_MARK, SD3_DAT1_MARK,
--	SD3_DAT2_MARK, SD3_DAT3_MARK,
--	SD3_DAT4_MARK, SD3_DAT5_MARK,
--	SD3_DAT6_MARK, SD3_DAT7_MARK,
--};
--static const unsigned int sdhi3_ctrl_pins[] = {
--	/* CLK, CMD */
--	RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 8),
--};
--static const unsigned int sdhi3_ctrl_mux[] = {
--	SD3_CLK_MARK, SD3_CMD_MARK,
--};
--static const unsigned int sdhi3_cd_pins[] = {
--	/* CD */
--	RCAR_GP_PIN(4, 15),
--};
--static const unsigned int sdhi3_cd_mux[] = {
--	SD3_CD_MARK,
--};
--static const unsigned int sdhi3_wp_pins[] = {
--	/* WP */
--	RCAR_GP_PIN(4, 16),
--};
--static const unsigned int sdhi3_wp_mux[] = {
--	SD3_WP_MARK,
--};
--static const unsigned int sdhi3_ds_pins[] = {
--	/* DS */
--	RCAR_GP_PIN(4, 17),
--};
--static const unsigned int sdhi3_ds_mux[] = {
--	SD3_DS_MARK,
--};
--
--/* - SSI -------------------------------------------------------------------- */
--static const unsigned int ssi0_data_pins[] = {
--	/* SDATA */
--	RCAR_GP_PIN(6, 2),
--};
--static const unsigned int ssi0_data_mux[] = {
--	SSI_SDATA0_MARK,
--};
--static const unsigned int ssi01239_ctrl_pins[] = {
--	/* SCK, WS */
--	RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1),
--};
--static const unsigned int ssi01239_ctrl_mux[] = {
--	SSI_SCK01239_MARK, SSI_WS01239_MARK,
--};
--static const unsigned int ssi1_data_a_pins[] = {
--	/* SDATA */
--	RCAR_GP_PIN(6, 3),
--};
--static const unsigned int ssi1_data_a_mux[] = {
--	SSI_SDATA1_A_MARK,
--};
--static const unsigned int ssi1_data_b_pins[] = {
--	/* SDATA */
--	RCAR_GP_PIN(5, 12),
--};
--static const unsigned int ssi1_data_b_mux[] = {
--	SSI_SDATA1_B_MARK,
--};
--static const unsigned int ssi1_ctrl_a_pins[] = {
--	/* SCK, WS */
--	RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),
--};
--static const unsigned int ssi1_ctrl_a_mux[] = {
--	SSI_SCK1_A_MARK, SSI_WS1_A_MARK,
--};
--static const unsigned int ssi1_ctrl_b_pins[] = {
--	/* SCK, WS */
--	RCAR_GP_PIN(6, 4), RCAR_GP_PIN(6, 21),
--};
--static const unsigned int ssi1_ctrl_b_mux[] = {
--	SSI_SCK1_B_MARK, SSI_WS1_B_MARK,
--};
--static const unsigned int ssi2_data_a_pins[] = {
--	/* SDATA */
--	RCAR_GP_PIN(6, 4),
--};
--static const unsigned int ssi2_data_a_mux[] = {
--	SSI_SDATA2_A_MARK,
--};
--static const unsigned int ssi2_data_b_pins[] = {
--	/* SDATA */
--	RCAR_GP_PIN(5, 13),
--};
--static const unsigned int ssi2_data_b_mux[] = {
--	SSI_SDATA2_B_MARK,
--};
--static const unsigned int ssi2_ctrl_a_pins[] = {
--	/* SCK, WS */
--	RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 21),
--};
--static const unsigned int ssi2_ctrl_a_mux[] = {
--	SSI_SCK2_A_MARK, SSI_WS2_A_MARK,
--};
--static const unsigned int ssi2_ctrl_b_pins[] = {
--	/* SCK, WS */
--	RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29),
--};
--static const unsigned int ssi2_ctrl_b_mux[] = {
--	SSI_SCK2_B_MARK, SSI_WS2_B_MARK,
--};
--static const unsigned int ssi3_data_pins[] = {
--	/* SDATA */
--	RCAR_GP_PIN(6, 7),
--};
--static const unsigned int ssi3_data_mux[] = {
--	SSI_SDATA3_MARK,
--};
--static const unsigned int ssi34_ctrl_pins[] = {
--	/* SCK, WS */
--	RCAR_GP_PIN(6, 5), RCAR_GP_PIN(6, 6),
--};
--static const unsigned int ssi34_ctrl_mux[] = {
--	SSI_SCK34_MARK, SSI_WS34_MARK,
--};
--static const unsigned int ssi4_data_pins[] = {
--	/* SDATA */
--	RCAR_GP_PIN(6, 10),
--};
--static const unsigned int ssi4_data_mux[] = {
--	SSI_SDATA4_MARK,
--};
--static const unsigned int ssi4_ctrl_pins[] = {
--	/* SCK, WS */
--	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
--};
--static const unsigned int ssi4_ctrl_mux[] = {
--	SSI_SCK4_MARK, SSI_WS4_MARK,
--};
--static const unsigned int ssi5_data_pins[] = {
--	/* SDATA */
--	RCAR_GP_PIN(6, 13),
--};
--static const unsigned int ssi5_data_mux[] = {
--	SSI_SDATA5_MARK,
--};
--static const unsigned int ssi5_ctrl_pins[] = {
--	/* SCK, WS */
--	RCAR_GP_PIN(6, 11), RCAR_GP_PIN(6, 12),
--};
--static const unsigned int ssi5_ctrl_mux[] = {
--	SSI_SCK5_MARK, SSI_WS5_MARK,
--};
--static const unsigned int ssi6_data_pins[] = {
--	/* SDATA */
--	RCAR_GP_PIN(6, 16),
--};
--static const unsigned int ssi6_data_mux[] = {
--	SSI_SDATA6_MARK,
--};
--static const unsigned int ssi6_ctrl_pins[] = {
--	/* SCK, WS */
--	RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15),
--};
--static const unsigned int ssi6_ctrl_mux[] = {
--	SSI_SCK6_MARK, SSI_WS6_MARK,
--};
--static const unsigned int ssi7_data_pins[] = {
--	/* SDATA */
--	RCAR_GP_PIN(6, 19),
--};
--static const unsigned int ssi7_data_mux[] = {
--	SSI_SDATA7_MARK,
--};
--static const unsigned int ssi78_ctrl_pins[] = {
--	/* SCK, WS */
--	RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
--};
--static const unsigned int ssi78_ctrl_mux[] = {
--	SSI_SCK78_MARK, SSI_WS78_MARK,
--};
--static const unsigned int ssi8_data_pins[] = {
--	/* SDATA */
--	RCAR_GP_PIN(6, 20),
--};
--static const unsigned int ssi8_data_mux[] = {
--	SSI_SDATA8_MARK,
--};
--static const unsigned int ssi9_data_a_pins[] = {
--	/* SDATA */
--	RCAR_GP_PIN(6, 21),
--};
--static const unsigned int ssi9_data_a_mux[] = {
--	SSI_SDATA9_A_MARK,
--};
--static const unsigned int ssi9_data_b_pins[] = {
--	/* SDATA */
--	RCAR_GP_PIN(5, 14),
--};
--static const unsigned int ssi9_data_b_mux[] = {
--	SSI_SDATA9_B_MARK,
--};
--static const unsigned int ssi9_ctrl_a_pins[] = {
--	/* SCK, WS */
--	RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16),
--};
--static const unsigned int ssi9_ctrl_a_mux[] = {
--	SSI_SCK9_A_MARK, SSI_WS9_A_MARK,
--};
--static const unsigned int ssi9_ctrl_b_pins[] = {
--	/* SCK, WS */
--	RCAR_GP_PIN(6, 30), RCAR_GP_PIN(6, 31),
--};
--static const unsigned int ssi9_ctrl_b_mux[] = {
--	SSI_SCK9_B_MARK, SSI_WS9_B_MARK,
--};
--
--/* - USB0 ------------------------------------------------------------------- */
--static const unsigned int usb0_pins[] = {
--	/* PWEN, OVC */
--	RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25),
--};
--static const unsigned int usb0_mux[] = {
--	USB0_PWEN_MARK, USB0_OVC_MARK,
--};
--/* - USB1 ------------------------------------------------------------------- */
--static const unsigned int usb1_pins[] = {
--	/* PWEN, OVC */
--	RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),
--};
--static const unsigned int usb1_mux[] = {
--	USB1_PWEN_MARK, USB1_OVC_MARK,
--};
--/* - USB2 ------------------------------------------------------------------- */
--static const unsigned int usb2_pins[] = {
--	/* PWEN, OVC */
--	RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15),
--};
--static const unsigned int usb2_mux[] = {
--	USB2_PWEN_MARK, USB2_OVC_MARK,
--};
--
- static const struct sh_pfc_pin_group pinmux_groups[] = {
--	SH_PFC_PIN_GROUP(audio_clk_a_a),
--	SH_PFC_PIN_GROUP(audio_clk_a_b),
--	SH_PFC_PIN_GROUP(audio_clk_a_c),
--	SH_PFC_PIN_GROUP(audio_clk_b_a),
--	SH_PFC_PIN_GROUP(audio_clk_b_b),
--	SH_PFC_PIN_GROUP(audio_clk_c_a),
--	SH_PFC_PIN_GROUP(audio_clk_c_b),
--	SH_PFC_PIN_GROUP(audio_clkout_a),
--	SH_PFC_PIN_GROUP(audio_clkout_b),
--	SH_PFC_PIN_GROUP(audio_clkout_c),
--	SH_PFC_PIN_GROUP(audio_clkout_d),
--	SH_PFC_PIN_GROUP(audio_clkout1_a),
--	SH_PFC_PIN_GROUP(audio_clkout1_b),
--	SH_PFC_PIN_GROUP(audio_clkout2_a),
--	SH_PFC_PIN_GROUP(audio_clkout2_b),
--	SH_PFC_PIN_GROUP(audio_clkout3_a),
--	SH_PFC_PIN_GROUP(audio_clkout3_b),
--	SH_PFC_PIN_GROUP(avb_link),
--	SH_PFC_PIN_GROUP(avb_magic),
--	SH_PFC_PIN_GROUP(avb_phy_int),
--	SH_PFC_PIN_GROUP(avb_mdc),
--	SH_PFC_PIN_GROUP(avb_mii),
--	SH_PFC_PIN_GROUP(avb_avtp_pps),
--	SH_PFC_PIN_GROUP(avb_avtp_match_a),
--	SH_PFC_PIN_GROUP(avb_avtp_capture_a),
--	SH_PFC_PIN_GROUP(avb_avtp_match_b),
--	SH_PFC_PIN_GROUP(avb_avtp_capture_b),
--	SH_PFC_PIN_GROUP(can0_data_a),
--	SH_PFC_PIN_GROUP(can0_data_b),
--	SH_PFC_PIN_GROUP(can1_data),
--	SH_PFC_PIN_GROUP(can_clk),
--	SH_PFC_PIN_GROUP(canfd0_data_a),
--	SH_PFC_PIN_GROUP(canfd0_data_b),
--	SH_PFC_PIN_GROUP(canfd1_data),
--	SH_PFC_PIN_GROUP(drif0_ctrl_a),
--	SH_PFC_PIN_GROUP(drif0_data0_a),
--	SH_PFC_PIN_GROUP(drif0_data1_a),
--	SH_PFC_PIN_GROUP(drif0_ctrl_b),
--	SH_PFC_PIN_GROUP(drif0_data0_b),
--	SH_PFC_PIN_GROUP(drif0_data1_b),
--	SH_PFC_PIN_GROUP(drif0_ctrl_c),
--	SH_PFC_PIN_GROUP(drif0_data0_c),
--	SH_PFC_PIN_GROUP(drif0_data1_c),
--	SH_PFC_PIN_GROUP(drif1_ctrl_a),
--	SH_PFC_PIN_GROUP(drif1_data0_a),
--	SH_PFC_PIN_GROUP(drif1_data1_a),
--	SH_PFC_PIN_GROUP(drif1_ctrl_b),
--	SH_PFC_PIN_GROUP(drif1_data0_b),
--	SH_PFC_PIN_GROUP(drif1_data1_b),
--	SH_PFC_PIN_GROUP(drif1_ctrl_c),
--	SH_PFC_PIN_GROUP(drif1_data0_c),
--	SH_PFC_PIN_GROUP(drif1_data1_c),
--	SH_PFC_PIN_GROUP(drif2_ctrl_a),
--	SH_PFC_PIN_GROUP(drif2_data0_a),
--	SH_PFC_PIN_GROUP(drif2_data1_a),
--	SH_PFC_PIN_GROUP(drif2_ctrl_b),
--	SH_PFC_PIN_GROUP(drif2_data0_b),
--	SH_PFC_PIN_GROUP(drif2_data1_b),
--	SH_PFC_PIN_GROUP(drif3_ctrl_a),
--	SH_PFC_PIN_GROUP(drif3_data0_a),
--	SH_PFC_PIN_GROUP(drif3_data1_a),
--	SH_PFC_PIN_GROUP(drif3_ctrl_b),
--	SH_PFC_PIN_GROUP(drif3_data0_b),
--	SH_PFC_PIN_GROUP(drif3_data1_b),
--	SH_PFC_PIN_GROUP(du_rgb666),
--	SH_PFC_PIN_GROUP(du_rgb888),
--	SH_PFC_PIN_GROUP(du_clk_out_0),
--	SH_PFC_PIN_GROUP(du_clk_out_1),
--	SH_PFC_PIN_GROUP(du_sync),
--	SH_PFC_PIN_GROUP(du_oddf),
--	SH_PFC_PIN_GROUP(du_cde),
--	SH_PFC_PIN_GROUP(du_disp),
--	SH_PFC_PIN_GROUP(hscif0_data),
--	SH_PFC_PIN_GROUP(hscif0_clk),
--	SH_PFC_PIN_GROUP(hscif0_ctrl),
--	SH_PFC_PIN_GROUP(hscif1_data_a),
--	SH_PFC_PIN_GROUP(hscif1_clk_a),
--	SH_PFC_PIN_GROUP(hscif1_ctrl_a),
--	SH_PFC_PIN_GROUP(hscif1_data_b),
--	SH_PFC_PIN_GROUP(hscif1_clk_b),
--	SH_PFC_PIN_GROUP(hscif1_ctrl_b),
--	SH_PFC_PIN_GROUP(hscif2_data_a),
--	SH_PFC_PIN_GROUP(hscif2_clk_a),
--	SH_PFC_PIN_GROUP(hscif2_ctrl_a),
--	SH_PFC_PIN_GROUP(hscif2_data_b),
--	SH_PFC_PIN_GROUP(hscif2_clk_b),
--	SH_PFC_PIN_GROUP(hscif2_ctrl_b),
--	SH_PFC_PIN_GROUP(hscif3_data_a),
--	SH_PFC_PIN_GROUP(hscif3_clk),
--	SH_PFC_PIN_GROUP(hscif3_ctrl),
--	SH_PFC_PIN_GROUP(hscif3_data_b),
--	SH_PFC_PIN_GROUP(hscif3_data_c),
--	SH_PFC_PIN_GROUP(hscif3_data_d),
--	SH_PFC_PIN_GROUP(hscif4_data_a),
--	SH_PFC_PIN_GROUP(hscif4_clk),
--	SH_PFC_PIN_GROUP(hscif4_ctrl),
--	SH_PFC_PIN_GROUP(hscif4_data_b),
--	SH_PFC_PIN_GROUP(i2c1_a),
--	SH_PFC_PIN_GROUP(i2c1_b),
--	SH_PFC_PIN_GROUP(i2c2_a),
--	SH_PFC_PIN_GROUP(i2c2_b),
--	SH_PFC_PIN_GROUP(i2c6_a),
--	SH_PFC_PIN_GROUP(i2c6_b),
--	SH_PFC_PIN_GROUP(i2c6_c),
--	SH_PFC_PIN_GROUP(intc_ex_irq0),
--	SH_PFC_PIN_GROUP(intc_ex_irq1),
--	SH_PFC_PIN_GROUP(intc_ex_irq2),
--	SH_PFC_PIN_GROUP(intc_ex_irq3),
--	SH_PFC_PIN_GROUP(intc_ex_irq4),
--	SH_PFC_PIN_GROUP(intc_ex_irq5),
--	SH_PFC_PIN_GROUP(msiof0_clk),
--	SH_PFC_PIN_GROUP(msiof0_sync),
--	SH_PFC_PIN_GROUP(msiof0_ss1),
--	SH_PFC_PIN_GROUP(msiof0_ss2),
--	SH_PFC_PIN_GROUP(msiof0_txd),
--	SH_PFC_PIN_GROUP(msiof0_rxd),
--	SH_PFC_PIN_GROUP(msiof1_clk_a),
--	SH_PFC_PIN_GROUP(msiof1_sync_a),
--	SH_PFC_PIN_GROUP(msiof1_ss1_a),
--	SH_PFC_PIN_GROUP(msiof1_ss2_a),
--	SH_PFC_PIN_GROUP(msiof1_txd_a),
--	SH_PFC_PIN_GROUP(msiof1_rxd_a),
--	SH_PFC_PIN_GROUP(msiof1_clk_b),
--	SH_PFC_PIN_GROUP(msiof1_sync_b),
--	SH_PFC_PIN_GROUP(msiof1_ss1_b),
--	SH_PFC_PIN_GROUP(msiof1_ss2_b),
--	SH_PFC_PIN_GROUP(msiof1_txd_b),
--	SH_PFC_PIN_GROUP(msiof1_rxd_b),
--	SH_PFC_PIN_GROUP(msiof1_clk_c),
--	SH_PFC_PIN_GROUP(msiof1_sync_c),
--	SH_PFC_PIN_GROUP(msiof1_ss1_c),
--	SH_PFC_PIN_GROUP(msiof1_ss2_c),
--	SH_PFC_PIN_GROUP(msiof1_txd_c),
--	SH_PFC_PIN_GROUP(msiof1_rxd_c),
--	SH_PFC_PIN_GROUP(msiof1_clk_d),
--	SH_PFC_PIN_GROUP(msiof1_sync_d),
--	SH_PFC_PIN_GROUP(msiof1_ss1_d),
--	SH_PFC_PIN_GROUP(msiof1_ss2_d),
--	SH_PFC_PIN_GROUP(msiof1_txd_d),
--	SH_PFC_PIN_GROUP(msiof1_rxd_d),
--	SH_PFC_PIN_GROUP(msiof1_clk_e),
--	SH_PFC_PIN_GROUP(msiof1_sync_e),
--	SH_PFC_PIN_GROUP(msiof1_ss1_e),
--	SH_PFC_PIN_GROUP(msiof1_ss2_e),
--	SH_PFC_PIN_GROUP(msiof1_txd_e),
--	SH_PFC_PIN_GROUP(msiof1_rxd_e),
--	SH_PFC_PIN_GROUP(msiof1_clk_f),
--	SH_PFC_PIN_GROUP(msiof1_sync_f),
--	SH_PFC_PIN_GROUP(msiof1_ss1_f),
--	SH_PFC_PIN_GROUP(msiof1_ss2_f),
--	SH_PFC_PIN_GROUP(msiof1_txd_f),
--	SH_PFC_PIN_GROUP(msiof1_rxd_f),
--	SH_PFC_PIN_GROUP(msiof1_clk_g),
--	SH_PFC_PIN_GROUP(msiof1_sync_g),
--	SH_PFC_PIN_GROUP(msiof1_ss1_g),
--	SH_PFC_PIN_GROUP(msiof1_ss2_g),
--	SH_PFC_PIN_GROUP(msiof1_txd_g),
--	SH_PFC_PIN_GROUP(msiof1_rxd_g),
--	SH_PFC_PIN_GROUP(msiof2_clk_a),
--	SH_PFC_PIN_GROUP(msiof2_sync_a),
--	SH_PFC_PIN_GROUP(msiof2_ss1_a),
--	SH_PFC_PIN_GROUP(msiof2_ss2_a),
--	SH_PFC_PIN_GROUP(msiof2_txd_a),
--	SH_PFC_PIN_GROUP(msiof2_rxd_a),
--	SH_PFC_PIN_GROUP(msiof2_clk_b),
--	SH_PFC_PIN_GROUP(msiof2_sync_b),
--	SH_PFC_PIN_GROUP(msiof2_ss1_b),
--	SH_PFC_PIN_GROUP(msiof2_ss2_b),
--	SH_PFC_PIN_GROUP(msiof2_txd_b),
--	SH_PFC_PIN_GROUP(msiof2_rxd_b),
--	SH_PFC_PIN_GROUP(msiof2_clk_c),
--	SH_PFC_PIN_GROUP(msiof2_sync_c),
--	SH_PFC_PIN_GROUP(msiof2_ss1_c),
--	SH_PFC_PIN_GROUP(msiof2_ss2_c),
--	SH_PFC_PIN_GROUP(msiof2_txd_c),
--	SH_PFC_PIN_GROUP(msiof2_rxd_c),
--	SH_PFC_PIN_GROUP(msiof2_clk_d),
--	SH_PFC_PIN_GROUP(msiof2_sync_d),
--	SH_PFC_PIN_GROUP(msiof2_ss1_d),
--	SH_PFC_PIN_GROUP(msiof2_ss2_d),
--	SH_PFC_PIN_GROUP(msiof2_txd_d),
--	SH_PFC_PIN_GROUP(msiof2_rxd_d),
--	SH_PFC_PIN_GROUP(msiof3_clk_a),
--	SH_PFC_PIN_GROUP(msiof3_sync_a),
--	SH_PFC_PIN_GROUP(msiof3_ss1_a),
--	SH_PFC_PIN_GROUP(msiof3_ss2_a),
--	SH_PFC_PIN_GROUP(msiof3_txd_a),
--	SH_PFC_PIN_GROUP(msiof3_rxd_a),
--	SH_PFC_PIN_GROUP(msiof3_clk_b),
--	SH_PFC_PIN_GROUP(msiof3_sync_b),
--	SH_PFC_PIN_GROUP(msiof3_ss1_b),
--	SH_PFC_PIN_GROUP(msiof3_ss2_b),
--	SH_PFC_PIN_GROUP(msiof3_txd_b),
--	SH_PFC_PIN_GROUP(msiof3_rxd_b),
--	SH_PFC_PIN_GROUP(msiof3_clk_c),
--	SH_PFC_PIN_GROUP(msiof3_sync_c),
--	SH_PFC_PIN_GROUP(msiof3_txd_c),
--	SH_PFC_PIN_GROUP(msiof3_rxd_c),
--	SH_PFC_PIN_GROUP(msiof3_clk_d),
--	SH_PFC_PIN_GROUP(msiof3_sync_d),
--	SH_PFC_PIN_GROUP(msiof3_ss1_d),
--	SH_PFC_PIN_GROUP(msiof3_txd_d),
--	SH_PFC_PIN_GROUP(msiof3_rxd_d),
--	SH_PFC_PIN_GROUP(pwm0),
--	SH_PFC_PIN_GROUP(pwm1_a),
--	SH_PFC_PIN_GROUP(pwm1_b),
--	SH_PFC_PIN_GROUP(pwm2_a),
--	SH_PFC_PIN_GROUP(pwm2_b),
--	SH_PFC_PIN_GROUP(pwm3_a),
--	SH_PFC_PIN_GROUP(pwm3_b),
--	SH_PFC_PIN_GROUP(pwm4_a),
--	SH_PFC_PIN_GROUP(pwm4_b),
--	SH_PFC_PIN_GROUP(pwm5_a),
--	SH_PFC_PIN_GROUP(pwm5_b),
--	SH_PFC_PIN_GROUP(pwm6_a),
--	SH_PFC_PIN_GROUP(pwm6_b),
--	SH_PFC_PIN_GROUP(qspi0_ctrl),
--	SH_PFC_PIN_GROUP(qspi0_data2),
--	SH_PFC_PIN_GROUP(qspi0_data4),
--	SH_PFC_PIN_GROUP(qspi1_ctrl),
--	SH_PFC_PIN_GROUP(qspi1_data2),
--	SH_PFC_PIN_GROUP(qspi1_data4),
--	SH_PFC_PIN_GROUP(sata0_devslp_a),
--	SH_PFC_PIN_GROUP(sata0_devslp_b),
--	SH_PFC_PIN_GROUP(scif0_data),
--	SH_PFC_PIN_GROUP(scif0_clk),
--	SH_PFC_PIN_GROUP(scif0_ctrl),
--	SH_PFC_PIN_GROUP(scif1_data_a),
--	SH_PFC_PIN_GROUP(scif1_clk),
--	SH_PFC_PIN_GROUP(scif1_ctrl),
--	SH_PFC_PIN_GROUP(scif1_data_b),
--	SH_PFC_PIN_GROUP(scif2_data_a),
--	SH_PFC_PIN_GROUP(scif2_clk),
--	SH_PFC_PIN_GROUP(scif2_data_b),
--	SH_PFC_PIN_GROUP(scif3_data_a),
--	SH_PFC_PIN_GROUP(scif3_clk),
--	SH_PFC_PIN_GROUP(scif3_ctrl),
--	SH_PFC_PIN_GROUP(scif3_data_b),
--	SH_PFC_PIN_GROUP(scif4_data_a),
--	SH_PFC_PIN_GROUP(scif4_clk_a),
--	SH_PFC_PIN_GROUP(scif4_ctrl_a),
--	SH_PFC_PIN_GROUP(scif4_data_b),
--	SH_PFC_PIN_GROUP(scif4_clk_b),
--	SH_PFC_PIN_GROUP(scif4_ctrl_b),
--	SH_PFC_PIN_GROUP(scif4_data_c),
--	SH_PFC_PIN_GROUP(scif4_clk_c),
--	SH_PFC_PIN_GROUP(scif4_ctrl_c),
--	SH_PFC_PIN_GROUP(scif5_data),
--	SH_PFC_PIN_GROUP(scif5_clk),
--	SH_PFC_PIN_GROUP(scif_clk_a),
--	SH_PFC_PIN_GROUP(scif_clk_b),
--	SH_PFC_PIN_GROUP(sdhi0_data1),
--	SH_PFC_PIN_GROUP(sdhi0_data4),
--	SH_PFC_PIN_GROUP(sdhi0_ctrl),
--	SH_PFC_PIN_GROUP(sdhi0_cd),
--	SH_PFC_PIN_GROUP(sdhi0_wp),
--	SH_PFC_PIN_GROUP(sdhi1_data1),
--	SH_PFC_PIN_GROUP(sdhi1_data4),
--	SH_PFC_PIN_GROUP(sdhi1_ctrl),
--	SH_PFC_PIN_GROUP(sdhi1_cd),
--	SH_PFC_PIN_GROUP(sdhi1_wp),
--	SH_PFC_PIN_GROUP(sdhi2_data1),
--	SH_PFC_PIN_GROUP(sdhi2_data4),
--	SH_PFC_PIN_GROUP(sdhi2_data8),
--	SH_PFC_PIN_GROUP(sdhi2_ctrl),
--	SH_PFC_PIN_GROUP(sdhi2_cd_a),
--	SH_PFC_PIN_GROUP(sdhi2_wp_a),
--	SH_PFC_PIN_GROUP(sdhi2_cd_b),
--	SH_PFC_PIN_GROUP(sdhi2_wp_b),
--	SH_PFC_PIN_GROUP(sdhi2_ds),
--	SH_PFC_PIN_GROUP(sdhi3_data1),
--	SH_PFC_PIN_GROUP(sdhi3_data4),
--	SH_PFC_PIN_GROUP(sdhi3_data8),
--	SH_PFC_PIN_GROUP(sdhi3_ctrl),
--	SH_PFC_PIN_GROUP(sdhi3_cd),
--	SH_PFC_PIN_GROUP(sdhi3_wp),
--	SH_PFC_PIN_GROUP(sdhi3_ds),
--	SH_PFC_PIN_GROUP(ssi0_data),
--	SH_PFC_PIN_GROUP(ssi01239_ctrl),
--	SH_PFC_PIN_GROUP(ssi1_data_a),
--	SH_PFC_PIN_GROUP(ssi1_data_b),
--	SH_PFC_PIN_GROUP(ssi1_ctrl_a),
--	SH_PFC_PIN_GROUP(ssi1_ctrl_b),
--	SH_PFC_PIN_GROUP(ssi2_data_a),
--	SH_PFC_PIN_GROUP(ssi2_data_b),
--	SH_PFC_PIN_GROUP(ssi2_ctrl_a),
--	SH_PFC_PIN_GROUP(ssi2_ctrl_b),
--	SH_PFC_PIN_GROUP(ssi3_data),
--	SH_PFC_PIN_GROUP(ssi34_ctrl),
--	SH_PFC_PIN_GROUP(ssi4_data),
--	SH_PFC_PIN_GROUP(ssi4_ctrl),
--	SH_PFC_PIN_GROUP(ssi5_data),
--	SH_PFC_PIN_GROUP(ssi5_ctrl),
--	SH_PFC_PIN_GROUP(ssi6_data),
--	SH_PFC_PIN_GROUP(ssi6_ctrl),
--	SH_PFC_PIN_GROUP(ssi7_data),
--	SH_PFC_PIN_GROUP(ssi78_ctrl),
--	SH_PFC_PIN_GROUP(ssi8_data),
--	SH_PFC_PIN_GROUP(ssi9_data_a),
--	SH_PFC_PIN_GROUP(ssi9_data_b),
--	SH_PFC_PIN_GROUP(ssi9_ctrl_a),
--	SH_PFC_PIN_GROUP(ssi9_ctrl_b),
--	SH_PFC_PIN_GROUP(usb0),
--	SH_PFC_PIN_GROUP(usb1),
--	SH_PFC_PIN_GROUP(usb2),
--};
--
--static const char * const audio_clk_groups[] = {
--	"audio_clk_a_a",
--	"audio_clk_a_b",
--	"audio_clk_a_c",
--	"audio_clk_b_a",
--	"audio_clk_b_b",
--	"audio_clk_c_a",
--	"audio_clk_c_b",
--	"audio_clkout_a",
--	"audio_clkout_b",
--	"audio_clkout_c",
--	"audio_clkout_d",
--	"audio_clkout1_a",
--	"audio_clkout1_b",
--	"audio_clkout2_a",
--	"audio_clkout2_b",
--	"audio_clkout3_a",
--	"audio_clkout3_b",
--};
--
--static const char * const avb_groups[] = {
--	"avb_link",
--	"avb_magic",
--	"avb_phy_int",
--	"avb_mdc",
--	"avb_mii",
--	"avb_avtp_pps",
--	"avb_avtp_match_a",
--	"avb_avtp_capture_a",
--	"avb_avtp_match_b",
--	"avb_avtp_capture_b",
--};
--
--static const char * const can0_groups[] = {
--	"can0_data_a",
--	"can0_data_b",
--};
--
--static const char * const can1_groups[] = {
--	"can1_data",
--};
--
--static const char * const can_clk_groups[] = {
--	"can_clk",
--};
--
--static const char * const canfd0_groups[] = {
--	"canfd0_data_a",
--	"canfd0_data_b",
--};
--
--static const char * const canfd1_groups[] = {
--	"canfd1_data",
--};
--
--static const char * const drif0_groups[] = {
--	"drif0_ctrl_a",
--	"drif0_data0_a",
--	"drif0_data1_a",
--	"drif0_ctrl_b",
--	"drif0_data0_b",
--	"drif0_data1_b",
--	"drif0_ctrl_c",
--	"drif0_data0_c",
--	"drif0_data1_c",
--};
--
--static const char * const drif1_groups[] = {
--	"drif1_ctrl_a",
--	"drif1_data0_a",
--	"drif1_data1_a",
--	"drif1_ctrl_b",
--	"drif1_data0_b",
--	"drif1_data1_b",
--	"drif1_ctrl_c",
--	"drif1_data0_c",
--	"drif1_data1_c",
--};
--
--static const char * const drif2_groups[] = {
--	"drif2_ctrl_a",
--	"drif2_data0_a",
--	"drif2_data1_a",
--	"drif2_ctrl_b",
--	"drif2_data0_b",
--	"drif2_data1_b",
--};
--
--static const char * const drif3_groups[] = {
--	"drif3_ctrl_a",
--	"drif3_data0_a",
--	"drif3_data1_a",
--	"drif3_ctrl_b",
--	"drif3_data0_b",
--	"drif3_data1_b",
--};
--
--static const char * const du_groups[] = {
--	"du_rgb666",
--	"du_rgb888",
--	"du_clk_out_0",
--	"du_clk_out_1",
--	"du_sync",
--	"du_oddf",
--	"du_cde",
--	"du_disp",
--};
--
--static const char * const hscif0_groups[] = {
--	"hscif0_data",
--	"hscif0_clk",
--	"hscif0_ctrl",
--};
--
--static const char * const hscif1_groups[] = {
--	"hscif1_data_a",
--	"hscif1_clk_a",
--	"hscif1_ctrl_a",
--	"hscif1_data_b",
--	"hscif1_clk_b",
--	"hscif1_ctrl_b",
--};
--
--static const char * const hscif2_groups[] = {
--	"hscif2_data_a",
--	"hscif2_clk_a",
--	"hscif2_ctrl_a",
--	"hscif2_data_b",
--	"hscif2_clk_b",
--	"hscif2_ctrl_b",
--};
--
--static const char * const hscif3_groups[] = {
--	"hscif3_data_a",
--	"hscif3_clk",
--	"hscif3_ctrl",
--	"hscif3_data_b",
--	"hscif3_data_c",
--	"hscif3_data_d",
--};
--
--static const char * const hscif4_groups[] = {
--	"hscif4_data_a",
--	"hscif4_clk",
--	"hscif4_ctrl",
--	"hscif4_data_b",
--};
--
--static const char * const i2c1_groups[] = {
--	"i2c1_a",
--	"i2c1_b",
--};
--
--static const char * const i2c2_groups[] = {
--	"i2c2_a",
--	"i2c2_b",
--};
--
--static const char * const i2c6_groups[] = {
--	"i2c6_a",
--	"i2c6_b",
--	"i2c6_c",
--};
--
--static const char * const intc_ex_groups[] = {
--	"intc_ex_irq0",
--	"intc_ex_irq1",
--	"intc_ex_irq2",
--	"intc_ex_irq3",
--	"intc_ex_irq4",
--	"intc_ex_irq5",
--};
--
--static const char * const msiof0_groups[] = {
--	"msiof0_clk",
--	"msiof0_sync",
--	"msiof0_ss1",
--	"msiof0_ss2",
--	"msiof0_txd",
--	"msiof0_rxd",
--};
--
--static const char * const msiof1_groups[] = {
--	"msiof1_clk_a",
--	"msiof1_sync_a",
--	"msiof1_ss1_a",
--	"msiof1_ss2_a",
--	"msiof1_txd_a",
--	"msiof1_rxd_a",
--	"msiof1_clk_b",
--	"msiof1_sync_b",
--	"msiof1_ss1_b",
--	"msiof1_ss2_b",
--	"msiof1_txd_b",
--	"msiof1_rxd_b",
--	"msiof1_clk_c",
--	"msiof1_sync_c",
--	"msiof1_ss1_c",
--	"msiof1_ss2_c",
--	"msiof1_txd_c",
--	"msiof1_rxd_c",
--	"msiof1_clk_d",
--	"msiof1_sync_d",
--	"msiof1_ss1_d",
--	"msiof1_ss2_d",
--	"msiof1_txd_d",
--	"msiof1_rxd_d",
--	"msiof1_clk_e",
--	"msiof1_sync_e",
--	"msiof1_ss1_e",
--	"msiof1_ss2_e",
--	"msiof1_txd_e",
--	"msiof1_rxd_e",
--	"msiof1_clk_f",
--	"msiof1_sync_f",
--	"msiof1_ss1_f",
--	"msiof1_ss2_f",
--	"msiof1_txd_f",
--	"msiof1_rxd_f",
--	"msiof1_clk_g",
--	"msiof1_sync_g",
--	"msiof1_ss1_g",
--	"msiof1_ss2_g",
--	"msiof1_txd_g",
--	"msiof1_rxd_g",
--};
--
--static const char * const msiof2_groups[] = {
--	"msiof2_clk_a",
--	"msiof2_sync_a",
--	"msiof2_ss1_a",
--	"msiof2_ss2_a",
--	"msiof2_txd_a",
--	"msiof2_rxd_a",
--	"msiof2_clk_b",
--	"msiof2_sync_b",
--	"msiof2_ss1_b",
--	"msiof2_ss2_b",
--	"msiof2_txd_b",
--	"msiof2_rxd_b",
--	"msiof2_clk_c",
--	"msiof2_sync_c",
--	"msiof2_ss1_c",
--	"msiof2_ss2_c",
--	"msiof2_txd_c",
--	"msiof2_rxd_c",
--	"msiof2_clk_d",
--	"msiof2_sync_d",
--	"msiof2_ss1_d",
--	"msiof2_ss2_d",
--	"msiof2_txd_d",
--	"msiof2_rxd_d",
--};
--
--static const char * const msiof3_groups[] = {
--	"msiof3_clk_a",
--	"msiof3_sync_a",
--	"msiof3_ss1_a",
--	"msiof3_ss2_a",
--	"msiof3_txd_a",
--	"msiof3_rxd_a",
--	"msiof3_clk_b",
--	"msiof3_sync_b",
--	"msiof3_ss1_b",
--	"msiof3_ss2_b",
--	"msiof3_txd_b",
--	"msiof3_rxd_b",
--	"msiof3_clk_c",
--	"msiof3_sync_c",
--	"msiof3_txd_c",
--	"msiof3_rxd_c",
--	"msiof3_clk_d",
--	"msiof3_sync_d",
--	"msiof3_ss1_d",
--	"msiof3_txd_d",
--	"msiof3_rxd_d",
--};
--
--static const char * const pwm0_groups[] = {
--	"pwm0",
--};
--
--static const char * const pwm1_groups[] = {
--	"pwm1_a",
--	"pwm1_b",
--};
--
--static const char * const pwm2_groups[] = {
--	"pwm2_a",
--	"pwm2_b",
--};
--
--static const char * const pwm3_groups[] = {
--	"pwm3_a",
--	"pwm3_b",
--};
--
--static const char * const pwm4_groups[] = {
--	"pwm4_a",
--	"pwm4_b",
--};
--
--static const char * const pwm5_groups[] = {
--	"pwm5_a",
--	"pwm5_b",
--};
--
--static const char * const pwm6_groups[] = {
--	"pwm6_a",
--	"pwm6_b",
--};
--
--static const char * const qspi0_groups[] = {
--	"qspi0_ctrl",
--	"qspi0_data2",
--	"qspi0_data4",
--};
--
--static const char * const qspi1_groups[] = {
--	"qspi1_ctrl",
--	"qspi1_data2",
--	"qspi1_data4",
--};
--
--static const char * const sata0_groups[] = {
--	"sata0_devslp_a",
--	"sata0_devslp_b",
--};
--
--static const char * const scif0_groups[] = {
--	"scif0_data",
--	"scif0_clk",
--	"scif0_ctrl",
--};
--
--static const char * const scif1_groups[] = {
--	"scif1_data_a",
--	"scif1_clk",
--	"scif1_ctrl",
--	"scif1_data_b",
--};
--
--static const char * const scif2_groups[] = {
--	"scif2_data_a",
--	"scif2_clk",
--	"scif2_data_b",
--};
--
--static const char * const scif3_groups[] = {
--	"scif3_data_a",
--	"scif3_clk",
--	"scif3_ctrl",
--	"scif3_data_b",
--};
--
--static const char * const scif4_groups[] = {
--	"scif4_data_a",
--	"scif4_clk_a",
--	"scif4_ctrl_a",
--	"scif4_data_b",
--	"scif4_clk_b",
--	"scif4_ctrl_b",
--	"scif4_data_c",
--	"scif4_clk_c",
--	"scif4_ctrl_c",
--};
--
--static const char * const scif5_groups[] = {
--	"scif5_data",
--	"scif5_clk",
--};
--
--static const char * const scif_clk_groups[] = {
--	"scif_clk_a",
--	"scif_clk_b",
--};
--
--static const char * const sdhi0_groups[] = {
--	"sdhi0_data1",
--	"sdhi0_data4",
--	"sdhi0_ctrl",
--	"sdhi0_cd",
--	"sdhi0_wp",
--};
--
--static const char * const sdhi1_groups[] = {
--	"sdhi1_data1",
--	"sdhi1_data4",
--	"sdhi1_ctrl",
--	"sdhi1_cd",
--	"sdhi1_wp",
--};
--
--static const char * const sdhi2_groups[] = {
--	"sdhi2_data1",
--	"sdhi2_data4",
--	"sdhi2_data8",
--	"sdhi2_ctrl",
--	"sdhi2_cd_a",
--	"sdhi2_wp_a",
--	"sdhi2_cd_b",
--	"sdhi2_wp_b",
--	"sdhi2_ds",
--};
--
--static const char * const sdhi3_groups[] = {
--	"sdhi3_data1",
--	"sdhi3_data4",
--	"sdhi3_data8",
--	"sdhi3_ctrl",
--	"sdhi3_cd",
--	"sdhi3_wp",
--	"sdhi3_ds",
--};
--
--static const char * const ssi_groups[] = {
--	"ssi0_data",
--	"ssi01239_ctrl",
--	"ssi1_data_a",
--	"ssi1_data_b",
--	"ssi1_ctrl_a",
--	"ssi1_ctrl_b",
--	"ssi2_data_a",
--	"ssi2_data_b",
--	"ssi2_ctrl_a",
--	"ssi2_ctrl_b",
--	"ssi3_data",
--	"ssi34_ctrl",
--	"ssi4_data",
--	"ssi4_ctrl",
--	"ssi5_data",
--	"ssi5_ctrl",
--	"ssi6_data",
--	"ssi6_ctrl",
--	"ssi7_data",
--	"ssi78_ctrl",
--	"ssi8_data",
--	"ssi9_data_a",
--	"ssi9_data_b",
--	"ssi9_ctrl_a",
--	"ssi9_ctrl_b",
--};
--
--static const char * const usb0_groups[] = {
--	"usb0",
--};
--
--static const char * const usb1_groups[] = {
--	"usb1",
--};
--
--static const char * const usb2_groups[] = {
--	"usb2",
- };
- 
- static const struct sh_pfc_function pinmux_functions[] = {
--	SH_PFC_FUNCTION(audio_clk),
--	SH_PFC_FUNCTION(avb),
--	SH_PFC_FUNCTION(can0),
--	SH_PFC_FUNCTION(can1),
--	SH_PFC_FUNCTION(can_clk),
--	SH_PFC_FUNCTION(canfd0),
--	SH_PFC_FUNCTION(canfd1),
--	SH_PFC_FUNCTION(drif0),
--	SH_PFC_FUNCTION(drif1),
--	SH_PFC_FUNCTION(drif2),
--	SH_PFC_FUNCTION(drif3),
--	SH_PFC_FUNCTION(du),
--	SH_PFC_FUNCTION(hscif0),
--	SH_PFC_FUNCTION(hscif1),
--	SH_PFC_FUNCTION(hscif2),
--	SH_PFC_FUNCTION(hscif3),
--	SH_PFC_FUNCTION(hscif4),
--	SH_PFC_FUNCTION(i2c1),
--	SH_PFC_FUNCTION(i2c2),
--	SH_PFC_FUNCTION(i2c6),
--	SH_PFC_FUNCTION(intc_ex),
--	SH_PFC_FUNCTION(msiof0),
--	SH_PFC_FUNCTION(msiof1),
--	SH_PFC_FUNCTION(msiof2),
--	SH_PFC_FUNCTION(msiof3),
--	SH_PFC_FUNCTION(pwm0),
--	SH_PFC_FUNCTION(pwm1),
--	SH_PFC_FUNCTION(pwm2),
--	SH_PFC_FUNCTION(pwm3),
--	SH_PFC_FUNCTION(pwm4),
--	SH_PFC_FUNCTION(pwm5),
--	SH_PFC_FUNCTION(pwm6),
--	SH_PFC_FUNCTION(qspi0),
--	SH_PFC_FUNCTION(qspi1),
--	SH_PFC_FUNCTION(sata0),
--	SH_PFC_FUNCTION(scif0),
--	SH_PFC_FUNCTION(scif1),
--	SH_PFC_FUNCTION(scif2),
--	SH_PFC_FUNCTION(scif3),
--	SH_PFC_FUNCTION(scif4),
--	SH_PFC_FUNCTION(scif5),
--	SH_PFC_FUNCTION(scif_clk),
--	SH_PFC_FUNCTION(sdhi0),
--	SH_PFC_FUNCTION(sdhi1),
--	SH_PFC_FUNCTION(sdhi2),
--	SH_PFC_FUNCTION(sdhi3),
--	SH_PFC_FUNCTION(ssi),
--	SH_PFC_FUNCTION(usb0),
--	SH_PFC_FUNCTION(usb1),
--	SH_PFC_FUNCTION(usb2),
- };
- 
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
-@@ -5041,46 +2033,54 @@ static const struct pinmux_cfg_reg pinmu
- 		IP16_3_0 }
- 	},
- 	{ PINMUX_CFG_REG("IPSR17", 0xe6060244, 32, 4) {
--		/* IP17_31_28 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
--		/* IP17_27_24 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
--		/* IP17_23_20 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
--		/* IP17_19_16 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
--		/* IP17_15_12 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
--		/* IP17_11_8  */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		IP17_31_28
-+		IP17_27_24
-+		IP17_23_20
-+		IP17_19_16
-+		IP17_15_12
-+		IP17_11_8
- 		IP17_7_4
- 		IP17_3_0 }
- 	},
-+	{ PINMUX_CFG_REG("IPSR18", 0xe6060248, 32, 4) {
-+		/* IP18_31_28 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP18_27_24 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP18_23_20 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP18_19_16 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP18_15_12 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP18_11_8  */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		IP18_7_4
-+		IP18_3_0 }
-+	},
- #undef F_
- #undef FM
- 
- #define F_(x, y)	x,
- #define FM(x)		FN_##x,
- 	{ PINMUX_CFG_REG_VAR("MOD_SEL0", 0xe6060500, 32,
--			     1, 2, 2, 3, 1, 1, 2, 1, 1, 1,
--			     2, 1, 1, 1, 1, 1, 1, 1, 2, 2, 1, 2, 1) {
--		0, 0, /* RESERVED 31 */
--		MOD_SEL0_30_29
-+			     3, 2, 3, 1, 1, 1, 1, 1, 2, 1,
-+			     1, 2, 1, 1, 1, 2, 2, 1, 2, 3) {
-+		MOD_SEL0_31_30_29
- 		MOD_SEL0_28_27
- 		MOD_SEL0_26_25_24
- 		MOD_SEL0_23
- 		MOD_SEL0_22
--		MOD_SEL0_21_20
-+		MOD_SEL0_21
-+		MOD_SEL0_20
- 		MOD_SEL0_19
--		MOD_SEL0_18
--		MOD_SEL0_17
--		MOD_SEL0_16_15
--		MOD_SEL0_14
--		MOD_SEL0_13
-+		MOD_SEL0_18_17
-+		MOD_SEL0_16
-+		0, 0, /* RESERVED 15 */
-+		MOD_SEL0_14_13
- 		MOD_SEL0_12
- 		MOD_SEL0_11
- 		MOD_SEL0_10
--		MOD_SEL0_9
--		MOD_SEL0_8
-+		MOD_SEL0_9_8
- 		MOD_SEL0_7_6
--		MOD_SEL0_5_4
--		MOD_SEL0_3
--		MOD_SEL0_2_1
--		0, 0, /* RESERVED 0 */ }
-+		MOD_SEL0_5
-+		MOD_SEL0_4_3
-+		/* RESERVED 2, 1, 0 */
-+		0, 0, 0, 0, 0, 0, 0, 0 }
- 	},
- 	{ PINMUX_CFG_REG_VAR("MOD_SEL1", 0xe6060504, 32,
- 			     2, 3, 1, 2, 3, 1, 1, 2, 1,
-@@ -5110,22 +2110,22 @@ static const struct pinmux_cfg_reg pinmu
- 		MOD_SEL1_0 }
- 	},
- 	{ PINMUX_CFG_REG_VAR("MOD_SEL2", 0xe6060508, 32,
--			     1, 1, 1, 1, 4, 4, 4,
--			     4, 4, 4, 1, 2, 1) {
-+			     1, 1, 1, 2, 1, 3, 1, 1, 1, 1, 1, 1, 1,
-+			     4, 4, 4, 3, 1) {
- 		MOD_SEL2_31
- 		MOD_SEL2_30
- 		MOD_SEL2_29
--		/* RESERVED 28 */
-+		MOD_SEL2_28_27
-+		MOD_SEL2_26
-+		MOD_SEL2_25_24_23
-+		MOD_SEL2_22
-+		MOD_SEL2_21
-+		MOD_SEL2_20
-+		MOD_SEL2_19
-+		MOD_SEL2_18
-+		MOD_SEL2_17
-+		/* RESERVED 16 */
- 		0, 0,
--		/* RESERVED 27, 26, 25, 24 */
--		0, 0, 0, 0, 0, 0, 0, 0,
--		0, 0, 0, 0, 0, 0, 0, 0,
--		/* RESERVED 23, 22, 21, 20 */
--		0, 0, 0, 0, 0, 0, 0, 0,
--		0, 0, 0, 0, 0, 0, 0, 0,
--		/* RESERVED 19, 18, 17, 16 */
--		0, 0, 0, 0, 0, 0, 0, 0,
--		0, 0, 0, 0, 0, 0, 0, 0,
- 		/* RESERVED 15, 14, 13, 12 */
- 		0, 0, 0, 0, 0, 0, 0, 0,
- 		0, 0, 0, 0, 0, 0, 0, 0,
-@@ -5135,10 +2135,8 @@ static const struct pinmux_cfg_reg pinmu
- 		/* RESERVED 7, 6, 5, 4 */
- 		0, 0, 0, 0, 0, 0, 0, 0,
- 		0, 0, 0, 0, 0, 0, 0, 0,
--		/* RESERVED 3 */
--		0, 0,
--		/* RESERVED 2, 1 */
--		0, 0, 0, 0,
-+		/* RESERVED 3, 2, 1 */
-+		0, 0, 0, 0, 0, 0, 0, 0,
- 		MOD_SEL2_0 }
- 	},
- 	{ },
-@@ -5387,8 +2385,8 @@ static const struct pinmux_drive_reg pin
- 		{ RCAR_GP_PIN(6, 27), 20, 3 },	/* USB1_OVC */
- 		{ RCAR_GP_PIN(6, 28), 16, 3 },	/* USB30_PWEN */
- 		{ RCAR_GP_PIN(6, 29), 12, 3 },	/* USB30_OVC */
--		{ RCAR_GP_PIN(6, 30),  8, 3 },	/* USB31_PWEN */
--		{ RCAR_GP_PIN(6, 31),  4, 3 },	/* USB31_OVC */
-+		{ RCAR_GP_PIN(6, 30),  8, 3 },	/* USB3_PWEN */
-+		{ RCAR_GP_PIN(6, 31),  4, 3 },	/* USB3_OVC */
- 	} },
- 	{ },
- };
-@@ -5618,8 +2616,8 @@ static const struct sh_pfc_bias_info bia
- 	{ RCAR_GP_PIN(5, 21),    PU5,  1 },	/* MSIOF0_SS2 */
- 	{ RCAR_GP_PIN(5, 20),    PU5,  0 },	/* MSIOF0_TXD */
- 
--	{ RCAR_GP_PIN(6, 31),    PU6,  6 },	/* USB31_OVC */
--	{ RCAR_GP_PIN(6, 30),    PU6,  5 },	/* USB31_PWEN */
-+	{ RCAR_GP_PIN(6, 31),    PU6,  6 },	/* USB3_OVC */
-+	{ RCAR_GP_PIN(6, 30),    PU6,  5 },	/* USB3_PWEN */
- 	{ RCAR_GP_PIN(6, 29),    PU6,  4 },	/* USB30_OVC */
- 	{ RCAR_GP_PIN(6, 28),    PU6,  3 },	/* USB30_PWEN */
- 	{ RCAR_GP_PIN(6, 27),    PU6,  2 },	/* USB1_OVC */
-@@ -5676,14 +2674,28 @@ static void r8a7795_pinmux_set_bias(stru
- 	sh_pfc_write_reg(pfc, PUEN + reg, 32, enable);
- }
- 
-+static const struct soc_device_attribute r8a7795es1[] = {
-+	{ .soc_id = "r8a7795", .revision = "ES1.*" },
-+	{ /* sentinel */ }
-+};
-+
-+static int r8a7795_pinmux_init(struct sh_pfc *pfc)
-+{
-+	if (soc_device_match(r8a7795es1))
-+		pfc->info = &r8a7795es1_pinmux_info;
-+
-+	return 0;
-+}
-+
- static const struct sh_pfc_soc_operations r8a7795_pinmux_ops = {
-+	.init = r8a7795_pinmux_init,
- 	.pin_to_pocctrl = r8a7795_pin_to_pocctrl,
- 	.get_bias = r8a7795_pinmux_get_bias,
- 	.set_bias = r8a7795_pinmux_set_bias,
- };
- 
- const struct sh_pfc_soc_info r8a7795_pinmux_info = {
--	.name = "r8a77950_pfc",
-+	.name = "r8a77951_pfc",
- 	.ops = &r8a7795_pinmux_ops,
- 	.unlock_reg = 0xe6060000, /* PMMR */
- 
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -267,6 +267,7 @@ extern const struct sh_pfc_soc_info r8a7
- extern const struct sh_pfc_soc_info r8a7793_pinmux_info;
- extern const struct sh_pfc_soc_info r8a7794_pinmux_info;
- extern const struct sh_pfc_soc_info r8a7795_pinmux_info;
-+extern const struct sh_pfc_soc_info r8a7795es1_pinmux_info;
- extern const struct sh_pfc_soc_info r8a7796_pinmux_info;
- extern const struct sh_pfc_soc_info sh7203_pinmux_info;
- extern const struct sh_pfc_soc_info sh7264_pinmux_info;
diff --git a/patches.renesas/0165-pinctrl-sh-pfc-r8a7796-Add-CAN-FD-support.patch b/patches.renesas/0165-pinctrl-sh-pfc-r8a7796-Add-CAN-FD-support.patch
deleted file mode 100644
index 36c4cf488e04a9..00000000000000
--- a/patches.renesas/0165-pinctrl-sh-pfc-r8a7796-Add-CAN-FD-support.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From 39192eaff1017b2bb2d418f4ffe3769d3d211076 Mon Sep 17 00:00:00 2001
-From: Chris Paterson <chris.paterson2@renesas.com>
-Date: Tue, 22 Nov 2016 13:49:03 +0000
-Subject: [PATCH 165/255] pinctrl: sh-pfc: r8a7796: Add CAN FD support
-
-This patch adds CAN FD[0-1] pinmux support to r8a7796 SoC.
-
-Based on a patch for r8a7795 by Ramesh Shanmugasundaram.
-
-Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 3dc93dcea67c967308db8ba00bac1334cf43a083)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7796.c |   37 +++++++++++++++++++++++++++++++++++
- 1 file changed, 37 insertions(+)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-@@ -1679,6 +1679,29 @@ static const unsigned int can_clk_mux[]
- 	CAN_CLK_MARK,
- };
- 
-+/* - CAN FD --------------------------------------------------------------- */
-+static const unsigned int canfd0_data_a_pins[] = {
-+	/* TX, RX */
-+	RCAR_GP_PIN(1, 23),     RCAR_GP_PIN(1, 24),
-+};
-+static const unsigned int canfd0_data_a_mux[] = {
-+	CANFD0_TX_A_MARK,       CANFD0_RX_A_MARK,
-+};
-+static const unsigned int canfd0_data_b_pins[] = {
-+	/* TX, RX */
-+	RCAR_GP_PIN(2, 0),      RCAR_GP_PIN(2, 1),
-+};
-+static const unsigned int canfd0_data_b_mux[] = {
-+	CANFD0_TX_B_MARK,       CANFD0_RX_B_MARK,
-+};
-+static const unsigned int canfd1_data_pins[] = {
-+	/* TX, RX */
-+	RCAR_GP_PIN(1, 22),     RCAR_GP_PIN(1, 26),
-+};
-+static const unsigned int canfd1_data_mux[] = {
-+	CANFD1_TX_MARK,         CANFD1_RX_MARK,
-+};
-+
- /* - DRIF0 --------------------------------------------------------------- */
- static const unsigned int drif0_ctrl_a_pins[] = {
- 	/* CLK, SYNC */
-@@ -2461,6 +2484,9 @@ static const struct sh_pfc_pin_group pin
- 	SH_PFC_PIN_GROUP(can0_data_b),
- 	SH_PFC_PIN_GROUP(can1_data),
- 	SH_PFC_PIN_GROUP(can_clk),
-+	SH_PFC_PIN_GROUP(canfd0_data_a),
-+	SH_PFC_PIN_GROUP(canfd0_data_b),
-+	SH_PFC_PIN_GROUP(canfd1_data),
- 	SH_PFC_PIN_GROUP(drif0_ctrl_a),
- 	SH_PFC_PIN_GROUP(drif0_data0_a),
- 	SH_PFC_PIN_GROUP(drif0_data1_a),
-@@ -2588,6 +2614,15 @@ static const char * const can_clk_groups
- 	"can_clk",
- };
- 
-+static const char * const canfd0_groups[] = {
-+	"canfd0_data_a",
-+	"canfd0_data_b",
-+};
-+
-+static const char * const canfd1_groups[] = {
-+	"canfd1_data",
-+};
-+
- static const char * const drif0_groups[] = {
- 	"drif0_ctrl_a",
- 	"drif0_data0_a",
-@@ -2750,6 +2785,8 @@ static const struct sh_pfc_function pinm
- 	SH_PFC_FUNCTION(can0),
- 	SH_PFC_FUNCTION(can1),
- 	SH_PFC_FUNCTION(can_clk),
-+	SH_PFC_FUNCTION(canfd0),
-+	SH_PFC_FUNCTION(canfd1),
- 	SH_PFC_FUNCTION(drif0),
- 	SH_PFC_FUNCTION(drif1),
- 	SH_PFC_FUNCTION(drif2),
diff --git a/patches.renesas/0166-clk-renesas-cpg-mssr-Remove-bogus-commas-from-error-.patch b/patches.renesas/0166-clk-renesas-cpg-mssr-Remove-bogus-commas-from-error-.patch
deleted file mode 100644
index d80a66035f7601..00000000000000
--- a/patches.renesas/0166-clk-renesas-cpg-mssr-Remove-bogus-commas-from-error-.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 6b8b12288c12ecc30c3d4cd7a6ef61d2a245665e Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 18 Oct 2016 15:59:13 +0200
-Subject: [PATCH 166/299] clk: renesas: cpg-mssr: Remove bogus commas from
- error messages
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 1b9fe7030cfdd081fc4ae1d3db4ccb1ba6d09dfd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/renesas-cpg-mssr.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/clk/renesas/renesas-cpg-mssr.c
-+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
-@@ -309,7 +309,7 @@ static void __init cpg_mssr_register_cor
- 	return;
- 
- fail:
--	dev_err(dev, "Failed to register %s clock %s: %ld\n", "core,",
-+	dev_err(dev, "Failed to register %s clock %s: %ld\n", "core",
- 		core->name, PTR_ERR(clk));
- }
- 
-@@ -377,7 +377,7 @@ static void __init cpg_mssr_register_mod
- 	return;
- 
- fail:
--	dev_err(dev, "Failed to register %s clock %s: %ld\n", "module,",
-+	dev_err(dev, "Failed to register %s clock %s: %ld\n", "module",
- 		mod->name, PTR_ERR(clk));
- 	kfree(clock);
- }
diff --git a/patches.renesas/0166-pinctrl-sh-pfc-r8a7795-Add-SCIF-support.patch b/patches.renesas/0166-pinctrl-sh-pfc-r8a7795-Add-SCIF-support.patch
deleted file mode 100644
index 241c7ff205eadb..00000000000000
--- a/patches.renesas/0166-pinctrl-sh-pfc-r8a7795-Add-SCIF-support.patch
+++ /dev/null
@@ -1,306 +0,0 @@
-From 0ac79cf3378edb359fddcaf995d0c7def7400cd6 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 13 Mar 2017 11:28:33 +0100
-Subject: [PATCH 166/286] pinctrl: sh-pfc: r8a7795: Add SCIF support
-
-Add pins, groups, and functions for all SCIF serial ports on R-Car H3
-ES2.0.
-
-Extracted from a big patch in the BSP by Takeshi Kihara.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-(cherry picked from commit e7ad4d3c1dd9dd6881d4470dd6586d5cc84b8e0c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7795.c |  275 +++++++++++++++++++++++++++++++++++
- 1 file changed, 275 insertions(+)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-@@ -1576,10 +1576,285 @@ static const struct sh_pfc_pin pinmux_pi
- 	SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS),
- };
- 
-+/* - SCIF0 ------------------------------------------------------------------ */
-+static const unsigned int scif0_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
-+};
-+static const unsigned int scif0_data_mux[] = {
-+	RX0_MARK, TX0_MARK,
-+};
-+static const unsigned int scif0_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 0),
-+};
-+static const unsigned int scif0_clk_mux[] = {
-+	SCK0_MARK,
-+};
-+static const unsigned int scif0_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3),
-+};
-+static const unsigned int scif0_ctrl_mux[] = {
-+	RTS0_N_TANS_MARK, CTS0_N_MARK,
-+};
-+/* - SCIF1 ------------------------------------------------------------------ */
-+static const unsigned int scif1_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
-+};
-+static const unsigned int scif1_data_a_mux[] = {
-+	RX1_A_MARK, TX1_A_MARK,
-+};
-+static const unsigned int scif1_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 21),
-+};
-+static const unsigned int scif1_clk_mux[] = {
-+	SCK1_MARK,
-+};
-+static const unsigned int scif1_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7),
-+};
-+static const unsigned int scif1_ctrl_mux[] = {
-+	RTS1_N_TANS_MARK, CTS1_N_MARK,
-+};
-+
-+static const unsigned int scif1_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
-+};
-+static const unsigned int scif1_data_b_mux[] = {
-+	RX1_B_MARK, TX1_B_MARK,
-+};
-+/* - SCIF2 ------------------------------------------------------------------ */
-+static const unsigned int scif2_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10),
-+};
-+static const unsigned int scif2_data_a_mux[] = {
-+	RX2_A_MARK, TX2_A_MARK,
-+};
-+static const unsigned int scif2_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 9),
-+};
-+static const unsigned int scif2_clk_mux[] = {
-+	SCK2_MARK,
-+};
-+static const unsigned int scif2_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16),
-+};
-+static const unsigned int scif2_data_b_mux[] = {
-+	RX2_B_MARK, TX2_B_MARK,
-+};
-+/* - SCIF3 ------------------------------------------------------------------ */
-+static const unsigned int scif3_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
-+};
-+static const unsigned int scif3_data_a_mux[] = {
-+	RX3_A_MARK, TX3_A_MARK,
-+};
-+static const unsigned int scif3_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 22),
-+};
-+static const unsigned int scif3_clk_mux[] = {
-+	SCK3_MARK,
-+};
-+static const unsigned int scif3_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
-+};
-+static const unsigned int scif3_ctrl_mux[] = {
-+	RTS3_N_TANS_MARK, CTS3_N_MARK,
-+};
-+static const unsigned int scif3_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
-+};
-+static const unsigned int scif3_data_b_mux[] = {
-+	RX3_B_MARK, TX3_B_MARK,
-+};
-+/* - SCIF4 ------------------------------------------------------------------ */
-+static const unsigned int scif4_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12),
-+};
-+static const unsigned int scif4_data_a_mux[] = {
-+	RX4_A_MARK, TX4_A_MARK,
-+};
-+static const unsigned int scif4_clk_a_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(2, 10),
-+};
-+static const unsigned int scif4_clk_a_mux[] = {
-+	SCK4_A_MARK,
-+};
-+static const unsigned int scif4_ctrl_a_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
-+};
-+static const unsigned int scif4_ctrl_a_mux[] = {
-+	RTS4_N_TANS_A_MARK, CTS4_N_A_MARK,
-+};
-+static const unsigned int scif4_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
-+};
-+static const unsigned int scif4_data_b_mux[] = {
-+	RX4_B_MARK, TX4_B_MARK,
-+};
-+static const unsigned int scif4_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 5),
-+};
-+static const unsigned int scif4_clk_b_mux[] = {
-+	SCK4_B_MARK,
-+};
-+static const unsigned int scif4_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
-+};
-+static const unsigned int scif4_ctrl_b_mux[] = {
-+	RTS4_N_TANS_B_MARK, CTS4_N_B_MARK,
-+};
-+static const unsigned int scif4_data_c_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
-+};
-+static const unsigned int scif4_data_c_mux[] = {
-+	RX4_C_MARK, TX4_C_MARK,
-+};
-+static const unsigned int scif4_clk_c_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(0, 8),
-+};
-+static const unsigned int scif4_clk_c_mux[] = {
-+	SCK4_C_MARK,
-+};
-+static const unsigned int scif4_ctrl_c_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
-+};
-+static const unsigned int scif4_ctrl_c_mux[] = {
-+	RTS4_N_TANS_C_MARK, CTS4_N_C_MARK,
-+};
-+/* - SCIF5 ------------------------------------------------------------------ */
-+static const unsigned int scif5_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 21),
-+};
-+static const unsigned int scif5_data_a_mux[] = {
-+	RX5_A_MARK, TX5_A_MARK,
-+};
-+static const unsigned int scif5_clk_a_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 21),
-+};
-+static const unsigned int scif5_clk_a_mux[] = {
-+	SCK5_A_MARK,
-+};
-+static const unsigned int scif5_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 18),
-+};
-+static const unsigned int scif5_data_b_mux[] = {
-+	RX5_B_MARK, TX5_B_MARK,
-+};
-+static const unsigned int scif5_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 0),
-+};
-+static const unsigned int scif5_clk_b_mux[] = {
-+	SCK5_B_MARK,
-+};
-+
- static const struct sh_pfc_pin_group pinmux_groups[] = {
-+	SH_PFC_PIN_GROUP(scif0_data),
-+	SH_PFC_PIN_GROUP(scif0_clk),
-+	SH_PFC_PIN_GROUP(scif0_ctrl),
-+	SH_PFC_PIN_GROUP(scif1_data_a),
-+	SH_PFC_PIN_GROUP(scif1_clk),
-+	SH_PFC_PIN_GROUP(scif1_ctrl),
-+	SH_PFC_PIN_GROUP(scif1_data_b),
-+	SH_PFC_PIN_GROUP(scif2_data_a),
-+	SH_PFC_PIN_GROUP(scif2_clk),
-+	SH_PFC_PIN_GROUP(scif2_data_b),
-+	SH_PFC_PIN_GROUP(scif3_data_a),
-+	SH_PFC_PIN_GROUP(scif3_clk),
-+	SH_PFC_PIN_GROUP(scif3_ctrl),
-+	SH_PFC_PIN_GROUP(scif3_data_b),
-+	SH_PFC_PIN_GROUP(scif4_data_a),
-+	SH_PFC_PIN_GROUP(scif4_clk_a),
-+	SH_PFC_PIN_GROUP(scif4_ctrl_a),
-+	SH_PFC_PIN_GROUP(scif4_data_b),
-+	SH_PFC_PIN_GROUP(scif4_clk_b),
-+	SH_PFC_PIN_GROUP(scif4_ctrl_b),
-+	SH_PFC_PIN_GROUP(scif4_data_c),
-+	SH_PFC_PIN_GROUP(scif4_clk_c),
-+	SH_PFC_PIN_GROUP(scif4_ctrl_c),
-+	SH_PFC_PIN_GROUP(scif5_data_a),
-+	SH_PFC_PIN_GROUP(scif5_clk_a),
-+	SH_PFC_PIN_GROUP(scif5_data_b),
-+	SH_PFC_PIN_GROUP(scif5_clk_b),
-+};
-+
-+static const char * const scif0_groups[] = {
-+	"scif0_data",
-+	"scif0_clk",
-+	"scif0_ctrl",
-+};
-+
-+static const char * const scif1_groups[] = {
-+	"scif1_data_a",
-+	"scif1_clk",
-+	"scif1_ctrl",
-+	"scif1_data_b",
-+};
-+
-+static const char * const scif2_groups[] = {
-+	"scif2_data_a",
-+	"scif2_clk",
-+	"scif2_data_b",
-+};
-+
-+static const char * const scif3_groups[] = {
-+	"scif3_data_a",
-+	"scif3_clk",
-+	"scif3_ctrl",
-+	"scif3_data_b",
-+};
-+
-+static const char * const scif4_groups[] = {
-+	"scif4_data_a",
-+	"scif4_clk_a",
-+	"scif4_ctrl_a",
-+	"scif4_data_b",
-+	"scif4_clk_b",
-+	"scif4_ctrl_b",
-+	"scif4_data_c",
-+	"scif4_clk_c",
-+	"scif4_ctrl_c",
-+};
-+
-+static const char * const scif5_groups[] = {
-+	"scif5_data_a",
-+	"scif5_clk_a",
-+	"scif5_data_b",
-+	"scif5_clk_b",
- };
- 
- static const struct sh_pfc_function pinmux_functions[] = {
-+	SH_PFC_FUNCTION(scif0),
-+	SH_PFC_FUNCTION(scif1),
-+	SH_PFC_FUNCTION(scif2),
-+	SH_PFC_FUNCTION(scif3),
-+	SH_PFC_FUNCTION(scif4),
-+	SH_PFC_FUNCTION(scif5),
- };
- 
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
diff --git a/patches.renesas/0166-pinctrl-sh-pfc-r8a7796-Add-MSIOF-pins-groups-and-fun.patch b/patches.renesas/0166-pinctrl-sh-pfc-r8a7796-Add-MSIOF-pins-groups-and-fun.patch
deleted file mode 100644
index 915836433e82bb..00000000000000
--- a/patches.renesas/0166-pinctrl-sh-pfc-r8a7796-Add-MSIOF-pins-groups-and-fun.patch
+++ /dev/null
@@ -1,962 +0,0 @@
-From 36027a1df7185e4b739a4324ba3126c425b1c2b0 Mon Sep 17 00:00:00 2001
-From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Date: Wed, 16 Mar 2016 12:22:06 +0900
-Subject: [PATCH 166/255] pinctrl: sh-pfc: r8a7796: Add MSIOF pins, groups and
- functions
-
-This patch adds MSIOF{0,1,2,3} pins, groups and functions to R8A7796
-SoC.
-
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-[geert: Correct MSIOF3 SS1_E/SS2_E pins]
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-
-(cherry picked from commit 4753231cc94683903135b9ca6d71eaab79f81349)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7796.c |  913 +++++++++++++++++++++++++++++++++++
- 1 file changed, 913 insertions(+)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-@@ -2049,6 +2049,705 @@ static const unsigned int i2c6_c_mux[] =
- 	SDA6_C_MARK, SCL6_C_MARK,
- };
- 
-+/* - MSIOF0 ----------------------------------------------------------------- */
-+static const unsigned int msiof0_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 17),
-+};
-+static const unsigned int msiof0_clk_mux[] = {
-+	MSIOF0_SCK_MARK,
-+};
-+static const unsigned int msiof0_sync_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(5, 18),
-+};
-+static const unsigned int msiof0_sync_mux[] = {
-+	MSIOF0_SYNC_MARK,
-+};
-+static const unsigned int msiof0_ss1_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(5, 19),
-+};
-+static const unsigned int msiof0_ss1_mux[] = {
-+	MSIOF0_SS1_MARK,
-+};
-+static const unsigned int msiof0_ss2_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(5, 21),
-+};
-+static const unsigned int msiof0_ss2_mux[] = {
-+	MSIOF0_SS2_MARK,
-+};
-+static const unsigned int msiof0_txd_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(5, 20),
-+};
-+static const unsigned int msiof0_txd_mux[] = {
-+	MSIOF0_TXD_MARK,
-+};
-+static const unsigned int msiof0_rxd_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(5, 22),
-+};
-+static const unsigned int msiof0_rxd_mux[] = {
-+	MSIOF0_RXD_MARK,
-+};
-+/* - MSIOF1 ----------------------------------------------------------------- */
-+static const unsigned int msiof1_clk_a_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 8),
-+};
-+static const unsigned int msiof1_clk_a_mux[] = {
-+	MSIOF1_SCK_A_MARK,
-+};
-+static const unsigned int msiof1_sync_a_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(6, 9),
-+};
-+static const unsigned int msiof1_sync_a_mux[] = {
-+	MSIOF1_SYNC_A_MARK,
-+};
-+static const unsigned int msiof1_ss1_a_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(6, 5),
-+};
-+static const unsigned int msiof1_ss1_a_mux[] = {
-+	MSIOF1_SS1_A_MARK,
-+};
-+static const unsigned int msiof1_ss2_a_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(6, 6),
-+};
-+static const unsigned int msiof1_ss2_a_mux[] = {
-+	MSIOF1_SS2_A_MARK,
-+};
-+static const unsigned int msiof1_txd_a_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(6, 7),
-+};
-+static const unsigned int msiof1_txd_a_mux[] = {
-+	MSIOF1_TXD_A_MARK,
-+};
-+static const unsigned int msiof1_rxd_a_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(6, 10),
-+};
-+static const unsigned int msiof1_rxd_a_mux[] = {
-+	MSIOF1_RXD_A_MARK,
-+};
-+static const unsigned int msiof1_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 9),
-+};
-+static const unsigned int msiof1_clk_b_mux[] = {
-+	MSIOF1_SCK_B_MARK,
-+};
-+static const unsigned int msiof1_sync_b_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(5, 3),
-+};
-+static const unsigned int msiof1_sync_b_mux[] = {
-+	MSIOF1_SYNC_B_MARK,
-+};
-+static const unsigned int msiof1_ss1_b_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(5, 4),
-+};
-+static const unsigned int msiof1_ss1_b_mux[] = {
-+	MSIOF1_SS1_B_MARK,
-+};
-+static const unsigned int msiof1_ss2_b_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(5, 0),
-+};
-+static const unsigned int msiof1_ss2_b_mux[] = {
-+	MSIOF1_SS2_B_MARK,
-+};
-+static const unsigned int msiof1_txd_b_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(5, 8),
-+};
-+static const unsigned int msiof1_txd_b_mux[] = {
-+	MSIOF1_TXD_B_MARK,
-+};
-+static const unsigned int msiof1_rxd_b_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(5, 7),
-+};
-+static const unsigned int msiof1_rxd_b_mux[] = {
-+	MSIOF1_RXD_B_MARK,
-+};
-+static const unsigned int msiof1_clk_c_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 17),
-+};
-+static const unsigned int msiof1_clk_c_mux[] = {
-+	MSIOF1_SCK_C_MARK,
-+};
-+static const unsigned int msiof1_sync_c_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(6, 18),
-+};
-+static const unsigned int msiof1_sync_c_mux[] = {
-+	MSIOF1_SYNC_C_MARK,
-+};
-+static const unsigned int msiof1_ss1_c_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(6, 21),
-+};
-+static const unsigned int msiof1_ss1_c_mux[] = {
-+	MSIOF1_SS1_C_MARK,
-+};
-+static const unsigned int msiof1_ss2_c_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(6, 27),
-+};
-+static const unsigned int msiof1_ss2_c_mux[] = {
-+	MSIOF1_SS2_C_MARK,
-+};
-+static const unsigned int msiof1_txd_c_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(6, 20),
-+};
-+static const unsigned int msiof1_txd_c_mux[] = {
-+	MSIOF1_TXD_C_MARK,
-+};
-+static const unsigned int msiof1_rxd_c_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(6, 19),
-+};
-+static const unsigned int msiof1_rxd_c_mux[] = {
-+	MSIOF1_RXD_C_MARK,
-+};
-+static const unsigned int msiof1_clk_d_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 12),
-+};
-+static const unsigned int msiof1_clk_d_mux[] = {
-+	MSIOF1_SCK_D_MARK,
-+};
-+static const unsigned int msiof1_sync_d_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(5, 15),
-+};
-+static const unsigned int msiof1_sync_d_mux[] = {
-+	MSIOF1_SYNC_D_MARK,
-+};
-+static const unsigned int msiof1_ss1_d_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(5, 16),
-+};
-+static const unsigned int msiof1_ss1_d_mux[] = {
-+	MSIOF1_SS1_D_MARK,
-+};
-+static const unsigned int msiof1_ss2_d_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(5, 21),
-+};
-+static const unsigned int msiof1_ss2_d_mux[] = {
-+	MSIOF1_SS2_D_MARK,
-+};
-+static const unsigned int msiof1_txd_d_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(5, 14),
-+};
-+static const unsigned int msiof1_txd_d_mux[] = {
-+	MSIOF1_TXD_D_MARK,
-+};
-+static const unsigned int msiof1_rxd_d_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(5, 13),
-+};
-+static const unsigned int msiof1_rxd_d_mux[] = {
-+	MSIOF1_RXD_D_MARK,
-+};
-+static const unsigned int msiof1_clk_e_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(3, 0),
-+};
-+static const unsigned int msiof1_clk_e_mux[] = {
-+	MSIOF1_SCK_E_MARK,
-+};
-+static const unsigned int msiof1_sync_e_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(3, 1),
-+};
-+static const unsigned int msiof1_sync_e_mux[] = {
-+	MSIOF1_SYNC_E_MARK,
-+};
-+static const unsigned int msiof1_ss1_e_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(3, 4),
-+};
-+static const unsigned int msiof1_ss1_e_mux[] = {
-+	MSIOF1_SS1_E_MARK,
-+};
-+static const unsigned int msiof1_ss2_e_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(3, 5),
-+};
-+static const unsigned int msiof1_ss2_e_mux[] = {
-+	MSIOF1_SS2_E_MARK,
-+};
-+static const unsigned int msiof1_txd_e_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(3, 3),
-+};
-+static const unsigned int msiof1_txd_e_mux[] = {
-+	MSIOF1_TXD_E_MARK,
-+};
-+static const unsigned int msiof1_rxd_e_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(3, 2),
-+};
-+static const unsigned int msiof1_rxd_e_mux[] = {
-+	MSIOF1_RXD_E_MARK,
-+};
-+static const unsigned int msiof1_clk_f_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 23),
-+};
-+static const unsigned int msiof1_clk_f_mux[] = {
-+	MSIOF1_SCK_F_MARK,
-+};
-+static const unsigned int msiof1_sync_f_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(5, 24),
-+};
-+static const unsigned int msiof1_sync_f_mux[] = {
-+	MSIOF1_SYNC_F_MARK,
-+};
-+static const unsigned int msiof1_ss1_f_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(6, 1),
-+};
-+static const unsigned int msiof1_ss1_f_mux[] = {
-+	MSIOF1_SS1_F_MARK,
-+};
-+static const unsigned int msiof1_ss2_f_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(6, 2),
-+};
-+static const unsigned int msiof1_ss2_f_mux[] = {
-+	MSIOF1_SS2_F_MARK,
-+};
-+static const unsigned int msiof1_txd_f_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(6, 0),
-+};
-+static const unsigned int msiof1_txd_f_mux[] = {
-+	MSIOF1_TXD_F_MARK,
-+};
-+static const unsigned int msiof1_rxd_f_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(5, 25),
-+};
-+static const unsigned int msiof1_rxd_f_mux[] = {
-+	MSIOF1_RXD_F_MARK,
-+};
-+static const unsigned int msiof1_clk_g_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(3, 6),
-+};
-+static const unsigned int msiof1_clk_g_mux[] = {
-+	MSIOF1_SCK_G_MARK,
-+};
-+static const unsigned int msiof1_sync_g_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(3, 7),
-+};
-+static const unsigned int msiof1_sync_g_mux[] = {
-+	MSIOF1_SYNC_G_MARK,
-+};
-+static const unsigned int msiof1_ss1_g_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(3, 10),
-+};
-+static const unsigned int msiof1_ss1_g_mux[] = {
-+	MSIOF1_SS1_G_MARK,
-+};
-+static const unsigned int msiof1_ss2_g_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(3, 11),
-+};
-+static const unsigned int msiof1_ss2_g_mux[] = {
-+	MSIOF1_SS2_G_MARK,
-+};
-+static const unsigned int msiof1_txd_g_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(3, 9),
-+};
-+static const unsigned int msiof1_txd_g_mux[] = {
-+	MSIOF1_TXD_G_MARK,
-+};
-+static const unsigned int msiof1_rxd_g_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(3, 8),
-+};
-+static const unsigned int msiof1_rxd_g_mux[] = {
-+	MSIOF1_RXD_G_MARK,
-+};
-+/* - MSIOF2 ----------------------------------------------------------------- */
-+static const unsigned int msiof2_clk_a_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 9),
-+};
-+static const unsigned int msiof2_clk_a_mux[] = {
-+	MSIOF2_SCK_A_MARK,
-+};
-+static const unsigned int msiof2_sync_a_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(1, 8),
-+};
-+static const unsigned int msiof2_sync_a_mux[] = {
-+	MSIOF2_SYNC_A_MARK,
-+};
-+static const unsigned int msiof2_ss1_a_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(1, 6),
-+};
-+static const unsigned int msiof2_ss1_a_mux[] = {
-+	MSIOF2_SS1_A_MARK,
-+};
-+static const unsigned int msiof2_ss2_a_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(1, 7),
-+};
-+static const unsigned int msiof2_ss2_a_mux[] = {
-+	MSIOF2_SS2_A_MARK,
-+};
-+static const unsigned int msiof2_txd_a_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(1, 11),
-+};
-+static const unsigned int msiof2_txd_a_mux[] = {
-+	MSIOF2_TXD_A_MARK,
-+};
-+static const unsigned int msiof2_rxd_a_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(1, 10),
-+};
-+static const unsigned int msiof2_rxd_a_mux[] = {
-+	MSIOF2_RXD_A_MARK,
-+};
-+static const unsigned int msiof2_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(0, 4),
-+};
-+static const unsigned int msiof2_clk_b_mux[] = {
-+	MSIOF2_SCK_B_MARK,
-+};
-+static const unsigned int msiof2_sync_b_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(0, 5),
-+};
-+static const unsigned int msiof2_sync_b_mux[] = {
-+	MSIOF2_SYNC_B_MARK,
-+};
-+static const unsigned int msiof2_ss1_b_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(0, 0),
-+};
-+static const unsigned int msiof2_ss1_b_mux[] = {
-+	MSIOF2_SS1_B_MARK,
-+};
-+static const unsigned int msiof2_ss2_b_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(0, 1),
-+};
-+static const unsigned int msiof2_ss2_b_mux[] = {
-+	MSIOF2_SS2_B_MARK,
-+};
-+static const unsigned int msiof2_txd_b_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(0, 7),
-+};
-+static const unsigned int msiof2_txd_b_mux[] = {
-+	MSIOF2_TXD_B_MARK,
-+};
-+static const unsigned int msiof2_rxd_b_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(0, 6),
-+};
-+static const unsigned int msiof2_rxd_b_mux[] = {
-+	MSIOF2_RXD_B_MARK,
-+};
-+static const unsigned int msiof2_clk_c_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(2, 12),
-+};
-+static const unsigned int msiof2_clk_c_mux[] = {
-+	MSIOF2_SCK_C_MARK,
-+};
-+static const unsigned int msiof2_sync_c_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(2, 11),
-+};
-+static const unsigned int msiof2_sync_c_mux[] = {
-+	MSIOF2_SYNC_C_MARK,
-+};
-+static const unsigned int msiof2_ss1_c_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(2, 10),
-+};
-+static const unsigned int msiof2_ss1_c_mux[] = {
-+	MSIOF2_SS1_C_MARK,
-+};
-+static const unsigned int msiof2_ss2_c_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(2, 9),
-+};
-+static const unsigned int msiof2_ss2_c_mux[] = {
-+	MSIOF2_SS2_C_MARK,
-+};
-+static const unsigned int msiof2_txd_c_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(2, 14),
-+};
-+static const unsigned int msiof2_txd_c_mux[] = {
-+	MSIOF2_TXD_C_MARK,
-+};
-+static const unsigned int msiof2_rxd_c_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(2, 13),
-+};
-+static const unsigned int msiof2_rxd_c_mux[] = {
-+	MSIOF2_RXD_C_MARK,
-+};
-+static const unsigned int msiof2_clk_d_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(0, 8),
-+};
-+static const unsigned int msiof2_clk_d_mux[] = {
-+	MSIOF2_SCK_D_MARK,
-+};
-+static const unsigned int msiof2_sync_d_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(0, 9),
-+};
-+static const unsigned int msiof2_sync_d_mux[] = {
-+	MSIOF2_SYNC_D_MARK,
-+};
-+static const unsigned int msiof2_ss1_d_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(0, 12),
-+};
-+static const unsigned int msiof2_ss1_d_mux[] = {
-+	MSIOF2_SS1_D_MARK,
-+};
-+static const unsigned int msiof2_ss2_d_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(0, 13),
-+};
-+static const unsigned int msiof2_ss2_d_mux[] = {
-+	MSIOF2_SS2_D_MARK,
-+};
-+static const unsigned int msiof2_txd_d_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(0, 11),
-+};
-+static const unsigned int msiof2_txd_d_mux[] = {
-+	MSIOF2_TXD_D_MARK,
-+};
-+static const unsigned int msiof2_rxd_d_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(0, 10),
-+};
-+static const unsigned int msiof2_rxd_d_mux[] = {
-+	MSIOF2_RXD_D_MARK,
-+};
-+/* - MSIOF3 ----------------------------------------------------------------- */
-+static const unsigned int msiof3_clk_a_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(0, 0),
-+};
-+static const unsigned int msiof3_clk_a_mux[] = {
-+	MSIOF3_SCK_A_MARK,
-+};
-+static const unsigned int msiof3_sync_a_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(0, 1),
-+};
-+static const unsigned int msiof3_sync_a_mux[] = {
-+	MSIOF3_SYNC_A_MARK,
-+};
-+static const unsigned int msiof3_ss1_a_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(0, 14),
-+};
-+static const unsigned int msiof3_ss1_a_mux[] = {
-+	MSIOF3_SS1_A_MARK,
-+};
-+static const unsigned int msiof3_ss2_a_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(0, 15),
-+};
-+static const unsigned int msiof3_ss2_a_mux[] = {
-+	MSIOF3_SS2_A_MARK,
-+};
-+static const unsigned int msiof3_txd_a_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(0, 3),
-+};
-+static const unsigned int msiof3_txd_a_mux[] = {
-+	MSIOF3_TXD_A_MARK,
-+};
-+static const unsigned int msiof3_rxd_a_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(0, 2),
-+};
-+static const unsigned int msiof3_rxd_a_mux[] = {
-+	MSIOF3_RXD_A_MARK,
-+};
-+static const unsigned int msiof3_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 2),
-+};
-+static const unsigned int msiof3_clk_b_mux[] = {
-+	MSIOF3_SCK_B_MARK,
-+};
-+static const unsigned int msiof3_sync_b_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(1, 0),
-+};
-+static const unsigned int msiof3_sync_b_mux[] = {
-+	MSIOF3_SYNC_B_MARK,
-+};
-+static const unsigned int msiof3_ss1_b_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(1, 4),
-+};
-+static const unsigned int msiof3_ss1_b_mux[] = {
-+	MSIOF3_SS1_B_MARK,
-+};
-+static const unsigned int msiof3_ss2_b_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(1, 5),
-+};
-+static const unsigned int msiof3_ss2_b_mux[] = {
-+	MSIOF3_SS2_B_MARK,
-+};
-+static const unsigned int msiof3_txd_b_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(1, 1),
-+};
-+static const unsigned int msiof3_txd_b_mux[] = {
-+	MSIOF3_TXD_B_MARK,
-+};
-+static const unsigned int msiof3_rxd_b_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(1, 3),
-+};
-+static const unsigned int msiof3_rxd_b_mux[] = {
-+	MSIOF3_RXD_B_MARK,
-+};
-+static const unsigned int msiof3_clk_c_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 12),
-+};
-+static const unsigned int msiof3_clk_c_mux[] = {
-+	MSIOF3_SCK_C_MARK,
-+};
-+static const unsigned int msiof3_sync_c_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(1, 13),
-+};
-+static const unsigned int msiof3_sync_c_mux[] = {
-+	MSIOF3_SYNC_C_MARK,
-+};
-+static const unsigned int msiof3_txd_c_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(1, 15),
-+};
-+static const unsigned int msiof3_txd_c_mux[] = {
-+	MSIOF3_TXD_C_MARK,
-+};
-+static const unsigned int msiof3_rxd_c_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(1, 14),
-+};
-+static const unsigned int msiof3_rxd_c_mux[] = {
-+	MSIOF3_RXD_C_MARK,
-+};
-+static const unsigned int msiof3_clk_d_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 22),
-+};
-+static const unsigned int msiof3_clk_d_mux[] = {
-+	MSIOF3_SCK_D_MARK,
-+};
-+static const unsigned int msiof3_sync_d_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(1, 23),
-+};
-+static const unsigned int msiof3_sync_d_mux[] = {
-+	MSIOF3_SYNC_D_MARK,
-+};
-+static const unsigned int msiof3_ss1_d_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(1, 26),
-+};
-+static const unsigned int msiof3_ss1_d_mux[] = {
-+	MSIOF3_SS1_D_MARK,
-+};
-+static const unsigned int msiof3_txd_d_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(1, 25),
-+};
-+static const unsigned int msiof3_txd_d_mux[] = {
-+	MSIOF3_TXD_D_MARK,
-+};
-+static const unsigned int msiof3_rxd_d_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(1, 24),
-+};
-+static const unsigned int msiof3_rxd_d_mux[] = {
-+	MSIOF3_RXD_D_MARK,
-+};
-+
-+static const unsigned int msiof3_clk_e_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(2, 3),
-+};
-+static const unsigned int msiof3_clk_e_mux[] = {
-+	MSIOF3_SCK_E_MARK,
-+};
-+static const unsigned int msiof3_sync_e_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(2, 2),
-+};
-+static const unsigned int msiof3_sync_e_mux[] = {
-+	MSIOF3_SYNC_E_MARK,
-+};
-+static const unsigned int msiof3_ss1_e_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(2, 1),
-+};
-+static const unsigned int msiof3_ss1_e_mux[] = {
-+	MSIOF3_SS1_E_MARK,
-+};
-+static const unsigned int msiof3_ss2_e_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(2, 0),
-+};
-+static const unsigned int msiof3_ss2_e_mux[] = {
-+	MSIOF3_SS1_E_MARK,
-+};
-+static const unsigned int msiof3_txd_e_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(2, 5),
-+};
-+static const unsigned int msiof3_txd_e_mux[] = {
-+	MSIOF3_TXD_E_MARK,
-+};
-+static const unsigned int msiof3_rxd_e_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(2, 4),
-+};
-+static const unsigned int msiof3_rxd_e_mux[] = {
-+	MSIOF3_RXD_E_MARK,
-+};
-+
- /* - SCIF0 ------------------------------------------------------------------ */
- static const unsigned int scif0_data_pins[] = {
- 	/* RX, TX */
-@@ -2532,6 +3231,105 @@ static const struct sh_pfc_pin_group pin
- 	SH_PFC_PIN_GROUP(i2c6_a),
- 	SH_PFC_PIN_GROUP(i2c6_b),
- 	SH_PFC_PIN_GROUP(i2c6_c),
-+	SH_PFC_PIN_GROUP(msiof0_clk),
-+	SH_PFC_PIN_GROUP(msiof0_sync),
-+	SH_PFC_PIN_GROUP(msiof0_ss1),
-+	SH_PFC_PIN_GROUP(msiof0_ss2),
-+	SH_PFC_PIN_GROUP(msiof0_txd),
-+	SH_PFC_PIN_GROUP(msiof0_rxd),
-+	SH_PFC_PIN_GROUP(msiof1_clk_a),
-+	SH_PFC_PIN_GROUP(msiof1_sync_a),
-+	SH_PFC_PIN_GROUP(msiof1_ss1_a),
-+	SH_PFC_PIN_GROUP(msiof1_ss2_a),
-+	SH_PFC_PIN_GROUP(msiof1_txd_a),
-+	SH_PFC_PIN_GROUP(msiof1_rxd_a),
-+	SH_PFC_PIN_GROUP(msiof1_clk_b),
-+	SH_PFC_PIN_GROUP(msiof1_sync_b),
-+	SH_PFC_PIN_GROUP(msiof1_ss1_b),
-+	SH_PFC_PIN_GROUP(msiof1_ss2_b),
-+	SH_PFC_PIN_GROUP(msiof1_txd_b),
-+	SH_PFC_PIN_GROUP(msiof1_rxd_b),
-+	SH_PFC_PIN_GROUP(msiof1_clk_c),
-+	SH_PFC_PIN_GROUP(msiof1_sync_c),
-+	SH_PFC_PIN_GROUP(msiof1_ss1_c),
-+	SH_PFC_PIN_GROUP(msiof1_ss2_c),
-+	SH_PFC_PIN_GROUP(msiof1_txd_c),
-+	SH_PFC_PIN_GROUP(msiof1_rxd_c),
-+	SH_PFC_PIN_GROUP(msiof1_clk_d),
-+	SH_PFC_PIN_GROUP(msiof1_sync_d),
-+	SH_PFC_PIN_GROUP(msiof1_ss1_d),
-+	SH_PFC_PIN_GROUP(msiof1_ss2_d),
-+	SH_PFC_PIN_GROUP(msiof1_txd_d),
-+	SH_PFC_PIN_GROUP(msiof1_rxd_d),
-+	SH_PFC_PIN_GROUP(msiof1_clk_e),
-+	SH_PFC_PIN_GROUP(msiof1_sync_e),
-+	SH_PFC_PIN_GROUP(msiof1_ss1_e),
-+	SH_PFC_PIN_GROUP(msiof1_ss2_e),
-+	SH_PFC_PIN_GROUP(msiof1_txd_e),
-+	SH_PFC_PIN_GROUP(msiof1_rxd_e),
-+	SH_PFC_PIN_GROUP(msiof1_clk_f),
-+	SH_PFC_PIN_GROUP(msiof1_sync_f),
-+	SH_PFC_PIN_GROUP(msiof1_ss1_f),
-+	SH_PFC_PIN_GROUP(msiof1_ss2_f),
-+	SH_PFC_PIN_GROUP(msiof1_txd_f),
-+	SH_PFC_PIN_GROUP(msiof1_rxd_f),
-+	SH_PFC_PIN_GROUP(msiof1_clk_g),
-+	SH_PFC_PIN_GROUP(msiof1_sync_g),
-+	SH_PFC_PIN_GROUP(msiof1_ss1_g),
-+	SH_PFC_PIN_GROUP(msiof1_ss2_g),
-+	SH_PFC_PIN_GROUP(msiof1_txd_g),
-+	SH_PFC_PIN_GROUP(msiof1_rxd_g),
-+	SH_PFC_PIN_GROUP(msiof2_clk_a),
-+	SH_PFC_PIN_GROUP(msiof2_sync_a),
-+	SH_PFC_PIN_GROUP(msiof2_ss1_a),
-+	SH_PFC_PIN_GROUP(msiof2_ss2_a),
-+	SH_PFC_PIN_GROUP(msiof2_txd_a),
-+	SH_PFC_PIN_GROUP(msiof2_rxd_a),
-+	SH_PFC_PIN_GROUP(msiof2_clk_b),
-+	SH_PFC_PIN_GROUP(msiof2_sync_b),
-+	SH_PFC_PIN_GROUP(msiof2_ss1_b),
-+	SH_PFC_PIN_GROUP(msiof2_ss2_b),
-+	SH_PFC_PIN_GROUP(msiof2_txd_b),
-+	SH_PFC_PIN_GROUP(msiof2_rxd_b),
-+	SH_PFC_PIN_GROUP(msiof2_clk_c),
-+	SH_PFC_PIN_GROUP(msiof2_sync_c),
-+	SH_PFC_PIN_GROUP(msiof2_ss1_c),
-+	SH_PFC_PIN_GROUP(msiof2_ss2_c),
-+	SH_PFC_PIN_GROUP(msiof2_txd_c),
-+	SH_PFC_PIN_GROUP(msiof2_rxd_c),
-+	SH_PFC_PIN_GROUP(msiof2_clk_d),
-+	SH_PFC_PIN_GROUP(msiof2_sync_d),
-+	SH_PFC_PIN_GROUP(msiof2_ss1_d),
-+	SH_PFC_PIN_GROUP(msiof2_ss2_d),
-+	SH_PFC_PIN_GROUP(msiof2_txd_d),
-+	SH_PFC_PIN_GROUP(msiof2_rxd_d),
-+	SH_PFC_PIN_GROUP(msiof3_clk_a),
-+	SH_PFC_PIN_GROUP(msiof3_sync_a),
-+	SH_PFC_PIN_GROUP(msiof3_ss1_a),
-+	SH_PFC_PIN_GROUP(msiof3_ss2_a),
-+	SH_PFC_PIN_GROUP(msiof3_txd_a),
-+	SH_PFC_PIN_GROUP(msiof3_rxd_a),
-+	SH_PFC_PIN_GROUP(msiof3_clk_b),
-+	SH_PFC_PIN_GROUP(msiof3_sync_b),
-+	SH_PFC_PIN_GROUP(msiof3_ss1_b),
-+	SH_PFC_PIN_GROUP(msiof3_ss2_b),
-+	SH_PFC_PIN_GROUP(msiof3_txd_b),
-+	SH_PFC_PIN_GROUP(msiof3_rxd_b),
-+	SH_PFC_PIN_GROUP(msiof3_clk_c),
-+	SH_PFC_PIN_GROUP(msiof3_sync_c),
-+	SH_PFC_PIN_GROUP(msiof3_txd_c),
-+	SH_PFC_PIN_GROUP(msiof3_rxd_c),
-+	SH_PFC_PIN_GROUP(msiof3_clk_d),
-+	SH_PFC_PIN_GROUP(msiof3_sync_d),
-+	SH_PFC_PIN_GROUP(msiof3_ss1_d),
-+	SH_PFC_PIN_GROUP(msiof3_txd_d),
-+	SH_PFC_PIN_GROUP(msiof3_rxd_d),
-+	SH_PFC_PIN_GROUP(msiof3_clk_e),
-+	SH_PFC_PIN_GROUP(msiof3_sync_e),
-+	SH_PFC_PIN_GROUP(msiof3_ss1_e),
-+	SH_PFC_PIN_GROUP(msiof3_ss2_e),
-+	SH_PFC_PIN_GROUP(msiof3_txd_e),
-+	SH_PFC_PIN_GROUP(msiof3_rxd_e),
- 	SH_PFC_PIN_GROUP(scif0_data),
- 	SH_PFC_PIN_GROUP(scif0_clk),
- 	SH_PFC_PIN_GROUP(scif0_ctrl),
-@@ -2692,6 +3490,117 @@ static const char * const i2c6_groups[]
- 	"i2c6_c",
- };
- 
-+static const char * const msiof0_groups[] = {
-+	"msiof0_clk",
-+	"msiof0_sync",
-+	"msiof0_ss1",
-+	"msiof0_ss2",
-+	"msiof0_txd",
-+	"msiof0_rxd",
-+};
-+
-+static const char * const msiof1_groups[] = {
-+	"msiof1_clk_a",
-+	"msiof1_sync_a",
-+	"msiof1_ss1_a",
-+	"msiof1_ss2_a",
-+	"msiof1_txd_a",
-+	"msiof1_rxd_a",
-+	"msiof1_clk_b",
-+	"msiof1_sync_b",
-+	"msiof1_ss1_b",
-+	"msiof1_ss2_b",
-+	"msiof1_txd_b",
-+	"msiof1_rxd_b",
-+	"msiof1_clk_c",
-+	"msiof1_sync_c",
-+	"msiof1_ss1_c",
-+	"msiof1_ss2_c",
-+	"msiof1_txd_c",
-+	"msiof1_rxd_c",
-+	"msiof1_clk_d",
-+	"msiof1_sync_d",
-+	"msiof1_ss1_d",
-+	"msiof1_ss2_d",
-+	"msiof1_txd_d",
-+	"msiof1_rxd_d",
-+	"msiof1_clk_e",
-+	"msiof1_sync_e",
-+	"msiof1_ss1_e",
-+	"msiof1_ss2_e",
-+	"msiof1_txd_e",
-+	"msiof1_rxd_e",
-+	"msiof1_clk_f",
-+	"msiof1_sync_f",
-+	"msiof1_ss1_f",
-+	"msiof1_ss2_f",
-+	"msiof1_txd_f",
-+	"msiof1_rxd_f",
-+	"msiof1_clk_g",
-+	"msiof1_sync_g",
-+	"msiof1_ss1_g",
-+	"msiof1_ss2_g",
-+	"msiof1_txd_g",
-+	"msiof1_rxd_g",
-+};
-+
-+static const char * const msiof2_groups[] = {
-+	"msiof2_clk_a",
-+	"msiof2_sync_a",
-+	"msiof2_ss1_a",
-+	"msiof2_ss2_a",
-+	"msiof2_txd_a",
-+	"msiof2_rxd_a",
-+	"msiof2_clk_b",
-+	"msiof2_sync_b",
-+	"msiof2_ss1_b",
-+	"msiof2_ss2_b",
-+	"msiof2_txd_b",
-+	"msiof2_rxd_b",
-+	"msiof2_clk_c",
-+	"msiof2_sync_c",
-+	"msiof2_ss1_c",
-+	"msiof2_ss2_c",
-+	"msiof2_txd_c",
-+	"msiof2_rxd_c",
-+	"msiof2_clk_d",
-+	"msiof2_sync_d",
-+	"msiof2_ss1_d",
-+	"msiof2_ss2_d",
-+	"msiof2_txd_d",
-+	"msiof2_rxd_d",
-+};
-+
-+static const char * const msiof3_groups[] = {
-+	"msiof3_clk_a",
-+	"msiof3_sync_a",
-+	"msiof3_ss1_a",
-+	"msiof3_ss2_a",
-+	"msiof3_txd_a",
-+	"msiof3_rxd_a",
-+	"msiof3_clk_b",
-+	"msiof3_sync_b",
-+	"msiof3_ss1_b",
-+	"msiof3_ss2_b",
-+	"msiof3_txd_b",
-+	"msiof3_rxd_b",
-+	"msiof3_clk_c",
-+	"msiof3_sync_c",
-+	"msiof3_txd_c",
-+	"msiof3_rxd_c",
-+	"msiof3_clk_d",
-+	"msiof3_sync_d",
-+	"msiof3_ss1_d",
-+	"msiof3_txd_d",
-+	"msiof3_rxd_d",
-+	"msiof3_clk_e",
-+	"msiof3_sync_e",
-+	"msiof3_ss1_e",
-+	"msiof3_ss2_e",
-+	"msiof3_txd_e",
-+	"msiof3_rxd_e",
-+};
-+
- static const char * const scif0_groups[] = {
- 	"scif0_data",
- 	"scif0_clk",
-@@ -2795,6 +3704,10 @@ static const struct sh_pfc_function pinm
- 	SH_PFC_FUNCTION(i2c1),
- 	SH_PFC_FUNCTION(i2c2),
- 	SH_PFC_FUNCTION(i2c6),
-+	SH_PFC_FUNCTION(msiof0),
-+	SH_PFC_FUNCTION(msiof1),
-+	SH_PFC_FUNCTION(msiof2),
-+	SH_PFC_FUNCTION(msiof3),
- 	SH_PFC_FUNCTION(scif0),
- 	SH_PFC_FUNCTION(scif1),
- 	SH_PFC_FUNCTION(scif2),
diff --git a/patches.renesas/0167-clk-renesas-r8a7796-Add-FCP-clocks.patch b/patches.renesas/0167-clk-renesas-r8a7796-Add-FCP-clocks.patch
deleted file mode 100644
index 93f1331657c712..00000000000000
--- a/patches.renesas/0167-clk-renesas-r8a7796-Add-FCP-clocks.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 5ddba901cd6b3183589ba210fee0bef970bfbadd Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 22 Oct 2016 14:29:04 +0300
-Subject: [PATCH 167/299] clk: renesas: r8a7796: Add FCP clocks
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit f4407a6e26b1abf9a1e168fa893783f999112df2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -142,6 +142,14 @@ static const struct mssr_mod_clk r8a7796
- 	DEF_MOD("hscif1",		 519,	R8A7796_CLK_S3D1),
- 	DEF_MOD("hscif0",		 520,	R8A7796_CLK_S3D1),
- 	DEF_MOD("thermal",		 522,	R8A7796_CLK_CP),
-+	DEF_MOD("fcpvd2",		 601,	R8A7796_CLK_S0D2),
-+	DEF_MOD("fcpvd1",		 602,	R8A7796_CLK_S0D2),
-+	DEF_MOD("fcpvd0",		 603,	R8A7796_CLK_S0D2),
-+	DEF_MOD("fcpvb0",		 607,	R8A7796_CLK_S0D1),
-+	DEF_MOD("fcpvi0",		 611,	R8A7796_CLK_S0D1),
-+	DEF_MOD("fcpf0",		 615,	R8A7796_CLK_S0D1),
-+	DEF_MOD("fcpci0",		 617,	R8A7796_CLK_S0D2),
-+	DEF_MOD("fcpcs",		 619,	R8A7796_CLK_S0D2),
- 	DEF_MOD("etheravb",		 812,	R8A7796_CLK_S0D6),
- 	DEF_MOD("gpio7",		 905,	R8A7796_CLK_S3D4),
- 	DEF_MOD("gpio6",		 906,	R8A7796_CLK_S3D4),
diff --git a/patches.renesas/0167-pinctrl-sh-pfc-r8a7793-Implement-voltage-switching-f.patch b/patches.renesas/0167-pinctrl-sh-pfc-r8a7793-Implement-voltage-switching-f.patch
deleted file mode 100644
index ceb5cdcee122d8..00000000000000
--- a/patches.renesas/0167-pinctrl-sh-pfc-r8a7793-Implement-voltage-switching-f.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From ef077d11eb9d7d4f84a38be0faebdd7a251890a8 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 1 Dec 2016 14:21:07 +0100
-Subject: [PATCH 167/255] pinctrl: sh-pfc: r8a7793: Implement voltage switching
- for SDHI
-
-Voltage switching is the same as on the r8a7791.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit aa6931f135d293cf6b0d527360845ff38455bc72)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7791.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
-@@ -6459,6 +6459,7 @@ const struct sh_pfc_soc_info r8a7791_pin
- #ifdef CONFIG_PINCTRL_PFC_R8A7793
- const struct sh_pfc_soc_info r8a7793_pinmux_info = {
- 	.name = "r8a77930_pfc",
-+	.ops = &r8a7791_pinmux_ops,
- 	.unlock_reg = 0xe6060000, /* PMMR */
- 
- 	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
diff --git a/patches.renesas/0167-pinctrl-sh-pfc-r8a7795-Add-SCIF_CLK-support.patch b/patches.renesas/0167-pinctrl-sh-pfc-r8a7795-Add-SCIF_CLK-support.patch
deleted file mode 100644
index fd336ff32f9aff..00000000000000
--- a/patches.renesas/0167-pinctrl-sh-pfc-r8a7795-Add-SCIF_CLK-support.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From 7beacd9e07c79c5ce325c5e8e4ceb1eff76ccf66 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 13 Mar 2017 11:28:39 +0100
-Subject: [PATCH 167/286] pinctrl: sh-pfc: r8a7795: Add SCIF_CLK support
-
-Add pins, groups, and a function for SCIF_CLK on R-Car H3 ES2.0.
-SCIF_CLK is the external clock source for the Baud Rate Generator for
-External Clock (BRG) on (H)SCIF serial ports.
-
-Extracted from a big patch in the BSP by Takeshi Kihara.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-(cherry picked from commit d14a39edf757f5bdd73cf25d0155d7cfb271e782)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7795.c |   24 ++++++++++++++++++++++++
- 1 file changed, 24 insertions(+)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
-@@ -1773,6 +1773,22 @@ static const unsigned int scif5_clk_b_mu
- 	SCK5_B_MARK,
- };
- 
-+/* - SCIF Clock ------------------------------------------------------------- */
-+static const unsigned int scif_clk_a_pins[] = {
-+	/* SCIF_CLK */
-+	RCAR_GP_PIN(6, 23),
-+};
-+static const unsigned int scif_clk_a_mux[] = {
-+	SCIF_CLK_A_MARK,
-+};
-+static const unsigned int scif_clk_b_pins[] = {
-+	/* SCIF_CLK */
-+	RCAR_GP_PIN(5, 9),
-+};
-+static const unsigned int scif_clk_b_mux[] = {
-+	SCIF_CLK_B_MARK,
-+};
-+
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(scif0_data),
- 	SH_PFC_PIN_GROUP(scif0_clk),
-@@ -1801,6 +1817,8 @@ static const struct sh_pfc_pin_group pin
- 	SH_PFC_PIN_GROUP(scif5_clk_a),
- 	SH_PFC_PIN_GROUP(scif5_data_b),
- 	SH_PFC_PIN_GROUP(scif5_clk_b),
-+	SH_PFC_PIN_GROUP(scif_clk_a),
-+	SH_PFC_PIN_GROUP(scif_clk_b),
- };
- 
- static const char * const scif0_groups[] = {
-@@ -1848,6 +1866,11 @@ static const char * const scif5_groups[]
- 	"scif5_clk_b",
- };
- 
-+static const char * const scif_clk_groups[] = {
-+	"scif_clk_a",
-+	"scif_clk_b",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(scif0),
- 	SH_PFC_FUNCTION(scif1),
-@@ -1855,6 +1878,7 @@ static const struct sh_pfc_function pinm
- 	SH_PFC_FUNCTION(scif3),
- 	SH_PFC_FUNCTION(scif4),
- 	SH_PFC_FUNCTION(scif5),
-+	SH_PFC_FUNCTION(scif_clk),
- };
- 
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
diff --git a/patches.renesas/0168-clk-renesas-r8a7796-Add-VSP-clocks.patch b/patches.renesas/0168-clk-renesas-r8a7796-Add-VSP-clocks.patch
deleted file mode 100644
index 5f5558081c15ad..00000000000000
--- a/patches.renesas/0168-clk-renesas-r8a7796-Add-VSP-clocks.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 4fe34cb66543480fb2c72d3ab1d7e3c4d0557521 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 22 Oct 2016 14:29:05 +0300
-Subject: [PATCH 168/299] clk: renesas: r8a7796: Add VSP clocks
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 88ddc1f8e3674f0b71016f5461868f14a02281a2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -150,6 +150,11 @@ static const struct mssr_mod_clk r8a7796
- 	DEF_MOD("fcpf0",		 615,	R8A7796_CLK_S0D1),
- 	DEF_MOD("fcpci0",		 617,	R8A7796_CLK_S0D2),
- 	DEF_MOD("fcpcs",		 619,	R8A7796_CLK_S0D2),
-+	DEF_MOD("vspd2",		 621,	R8A7796_CLK_S0D2),
-+	DEF_MOD("vspd1",		 622,	R8A7796_CLK_S0D2),
-+	DEF_MOD("vspd0",		 623,	R8A7796_CLK_S0D2),
-+	DEF_MOD("vspb",			 626,	R8A7796_CLK_S0D1),
-+	DEF_MOD("vspi0",		 631,	R8A7796_CLK_S0D1),
- 	DEF_MOD("etheravb",		 812,	R8A7796_CLK_S0D6),
- 	DEF_MOD("gpio7",		 905,	R8A7796_CLK_S3D4),
- 	DEF_MOD("gpio6",		 906,	R8A7796_CLK_S3D4),
diff --git a/patches.renesas/0168-pinctrl-sh-pfc-r8a7796-Add-HSCIF-pins-groups-and-fun.patch b/patches.renesas/0168-pinctrl-sh-pfc-r8a7796-Add-HSCIF-pins-groups-and-fun.patch
deleted file mode 100644
index d8ee0c2711aa84..00000000000000
--- a/patches.renesas/0168-pinctrl-sh-pfc-r8a7796-Add-HSCIF-pins-groups-and-fun.patch
+++ /dev/null
@@ -1,329 +0,0 @@
-From 4976404a26a63ebd1092b44a26924e1d4e73e5f8 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Wed, 7 Dec 2016 17:44:46 +0100
-Subject: [PATCH 168/255] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and
- functions
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-[geert: Fix hscif2_clk_[bc]_mux[] and hscif4_ctrl_mux[]]
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-
-(cherry picked from commit 0e4e4999aac16641f47699e8929693b83a7a4d64)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7796.c |  283 +++++++++++++++++++++++++++++++++++
- 1 file changed, 283 insertions(+)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
-@@ -1998,6 +1998,213 @@ static const unsigned int du_disp_mux[]
- 	DU_DISP_MARK,
- };
- 
-+/* - HSCIF0 ----------------------------------------------------------------- */
-+static const unsigned int hscif0_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14),
-+};
-+static const unsigned int hscif0_data_mux[] = {
-+	HRX0_MARK, HTX0_MARK,
-+};
-+static const unsigned int hscif0_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 12),
-+};
-+static const unsigned int hscif0_clk_mux[] = {
-+	HSCK0_MARK,
-+};
-+static const unsigned int hscif0_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 15),
-+};
-+static const unsigned int hscif0_ctrl_mux[] = {
-+	HRTS0_N_MARK, HCTS0_N_MARK,
-+};
-+/* - HSCIF1 ----------------------------------------------------------------- */
-+static const unsigned int hscif1_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
-+};
-+static const unsigned int hscif1_data_a_mux[] = {
-+	HRX1_A_MARK, HTX1_A_MARK,
-+};
-+static const unsigned int hscif1_clk_a_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 21),
-+};
-+static const unsigned int hscif1_clk_a_mux[] = {
-+	HSCK1_A_MARK,
-+};
-+static const unsigned int hscif1_ctrl_a_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7),
-+};
-+static const unsigned int hscif1_ctrl_a_mux[] = {
-+	HRTS1_N_A_MARK, HCTS1_N_A_MARK,
-+};
-+
-+static const unsigned int hscif1_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
-+};
-+static const unsigned int hscif1_data_b_mux[] = {
-+	HRX1_B_MARK, HTX1_B_MARK,
-+};
-+static const unsigned int hscif1_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 0),
-+};
-+static const unsigned int hscif1_clk_b_mux[] = {
-+	HSCK1_B_MARK,
-+};
-+static const unsigned int hscif1_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3),
-+};
-+static const unsigned int hscif1_ctrl_b_mux[] = {
-+	HRTS1_N_B_MARK, HCTS1_N_B_MARK,
-+};
-+/* - HSCIF2 ----------------------------------------------------------------- */
-+static const unsigned int hscif2_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
-+};
-+static const unsigned int hscif2_data_a_mux[] = {
-+	HRX2_A_MARK, HTX2_A_MARK,
-+};
-+static const unsigned int hscif2_clk_a_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 10),
-+};
-+static const unsigned int hscif2_clk_a_mux[] = {
-+	HSCK2_A_MARK,
-+};
-+static const unsigned int hscif2_ctrl_a_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6),
-+};
-+static const unsigned int hscif2_ctrl_a_mux[] = {
-+	HRTS2_N_A_MARK, HCTS2_N_A_MARK,
-+};
-+
-+static const unsigned int hscif2_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
-+};
-+static const unsigned int hscif2_data_b_mux[] = {
-+	HRX2_B_MARK, HTX2_B_MARK,
-+};
-+static const unsigned int hscif2_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 21),
-+};
-+static const unsigned int hscif2_clk_b_mux[] = {
-+	HSCK2_B_MARK,
-+};
-+static const unsigned int hscif2_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 19),
-+};
-+static const unsigned int hscif2_ctrl_b_mux[] = {
-+	HRTS2_N_B_MARK, HCTS2_N_B_MARK,
-+};
-+
-+static const unsigned int hscif2_data_c_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(6, 25), RCAR_GP_PIN(6, 26),
-+};
-+static const unsigned int hscif2_data_c_mux[] = {
-+	HRX2_C_MARK, HTX2_C_MARK,
-+};
-+static const unsigned int hscif2_clk_c_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 24),
-+};
-+static const unsigned int hscif2_clk_c_mux[] = {
-+	HSCK2_C_MARK,
-+};
-+static const unsigned int hscif2_ctrl_c_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 27),
-+};
-+static const unsigned int hscif2_ctrl_c_mux[] = {
-+	HRTS2_N_C_MARK, HCTS2_N_C_MARK,
-+};
-+/* - HSCIF3 ----------------------------------------------------------------- */
-+static const unsigned int hscif3_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
-+};
-+static const unsigned int hscif3_data_a_mux[] = {
-+	HRX3_A_MARK, HTX3_A_MARK,
-+};
-+static const unsigned int hscif3_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 22),
-+};
-+static const unsigned int hscif3_clk_mux[] = {
-+	HSCK3_MARK,
-+};
-+static const unsigned int hscif3_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
-+};
-+static const unsigned int hscif3_ctrl_mux[] = {
-+	HRTS3_N_MARK, HCTS3_N_MARK,
-+};
-+
-+static const unsigned int hscif3_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
-+};
-+static const unsigned int hscif3_data_b_mux[] = {
-+	HRX3_B_MARK, HTX3_B_MARK,
-+};
-+static const unsigned int hscif3_data_c_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
-+};
-+static const unsigned int hscif3_data_c_mux[] = {
-+	HRX3_C_MARK, HTX3_C_MARK,
-+};
-+static const unsigned int hscif3_data_d_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
-+};
-+static const unsigned int hscif3_data_d_mux[] = {
-+	HRX3_D_MARK, HTX3_D_MARK,
-+};
-+/* - HSCIF4 ----------------------------------------------------------------- */
-+static const unsigned int hscif4_data_a_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
-+};
-+static const unsigned int hscif4_data_a_mux[] = {
-+	HRX4_A_MARK, HTX4_A_MARK,
-+};
-+static const unsigned int hscif4_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 11),
-+};
-+static const unsigned int hscif4_clk_mux[] = {
-+	HSCK4_MARK,
-+};
-+static const unsigned int hscif4_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14),
-+};
-+static const unsigned int hscif4_ctrl_mux[] = {
-+	HRTS4_N_MARK, HCTS4_N_MARK,
-+};
-+
-+static const unsigned int hscif4_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
-+};
-+static const unsigned int hscif4_data_b_mux[] = {
-+	HRX4_B_MARK, HTX4_B_MARK,
-+};
-+
- /* - I2C -------------------------------------------------------------------- */
- static const unsigned int i2c1_a_pins[] = {
- 	/* SDA, SCL */
-@@ -3224,6 +3431,34 @@ static const struct sh_pfc_pin_group pin
- 	SH_PFC_PIN_GROUP(du_oddf),
- 	SH_PFC_PIN_GROUP(du_cde),
- 	SH_PFC_PIN_GROUP(du_disp),
-+	SH_PFC_PIN_GROUP(hscif0_data),
-+	SH_PFC_PIN_GROUP(hscif0_clk),
-+	SH_PFC_PIN_GROUP(hscif0_ctrl),
-+	SH_PFC_PIN_GROUP(hscif1_data_a),
-+	SH_PFC_PIN_GROUP(hscif1_clk_a),
-+	SH_PFC_PIN_GROUP(hscif1_ctrl_a),
-+	SH_PFC_PIN_GROUP(hscif1_data_b),
-+	SH_PFC_PIN_GROUP(hscif1_clk_b),
-+	SH_PFC_PIN_GROUP(hscif1_ctrl_b),
-+	SH_PFC_PIN_GROUP(hscif2_data_a),
-+	SH_PFC_PIN_GROUP(hscif2_clk_a),
-+	SH_PFC_PIN_GROUP(hscif2_ctrl_a),
-+	SH_PFC_PIN_GROUP(hscif2_data_b),
-+	SH_PFC_PIN_GROUP(hscif2_clk_b),
-+	SH_PFC_PIN_GROUP(hscif2_ctrl_b),
-+	SH_PFC_PIN_GROUP(hscif2_data_c),
-+	SH_PFC_PIN_GROUP(hscif2_clk_c),
-+	SH_PFC_PIN_GROUP(hscif2_ctrl_c),
-+	SH_PFC_PIN_GROUP(hscif3_data_a),
-+	SH_PFC_PIN_GROUP(hscif3_clk),
-+	SH_PFC_PIN_GROUP(hscif3_ctrl),
-+	SH_PFC_PIN_GROUP(hscif3_data_b),
-+	SH_PFC_PIN_GROUP(hscif3_data_c),
-+	SH_PFC_PIN_GROUP(hscif3_data_d),
-+	SH_PFC_PIN_GROUP(hscif4_data_a),
-+	SH_PFC_PIN_GROUP(hscif4_clk),
-+	SH_PFC_PIN_GROUP(hscif4_ctrl),
-+	SH_PFC_PIN_GROUP(hscif4_data_b),
- 	SH_PFC_PIN_GROUP(i2c1_a),
- 	SH_PFC_PIN_GROUP(i2c1_b),
- 	SH_PFC_PIN_GROUP(i2c2_a),
-@@ -3474,6 +3709,49 @@ static const char * const du_groups[] =
- 	"du_disp",
- };
- 
-+static const char * const hscif0_groups[] = {
-+	"hscif0_data",
-+	"hscif0_clk",
-+	"hscif0_ctrl",
-+};
-+
-+static const char * const hscif1_groups[] = {
-+	"hscif1_data_a",
-+	"hscif1_clk_a",
-+	"hscif1_ctrl_a",
-+	"hscif1_data_b",
-+	"hscif1_clk_b",
-+	"hscif1_ctrl_b",
-+};
-+
-+static const char * const hscif2_groups[] = {
-+	"hscif2_data_a",
-+	"hscif2_clk_a",
-+	"hscif2_ctrl_a",
-+	"hscif2_data_b",
-+	"hscif2_clk_b",
-+	"hscif2_ctrl_b",
-+	"hscif2_data_c",
-+	"hscif2_clk_c",
-+	"hscif2_ctrl_c",
-+};
-+
-+static const char * const hscif3_groups[] = {
-+	"hscif3_data_a",
-+	"hscif3_clk",
-+	"hscif3_ctrl",
-+	"hscif3_data_b",
-+	"hscif3_data_c",
-+	"hscif3_data_d",
-+};
-+
-+static const char * const hscif4_groups[] = {
-+	"hscif4_data_a",
-+	"hscif4_clk",
-+	"hscif4_ctrl",
-+	"hscif4_data_b",
-+};
-+
- static const char * const i2c1_groups[] = {
- 	"i2c1_a",
- 	"i2c1_b",
-@@ -3701,6 +3979,11 @@ static const struct sh_pfc_function pinm
- 	SH_PFC_FUNCTION(drif2),
- 	SH_PFC_FUNCTION(drif3),
- 	SH_PFC_FUNCTION(du),
-+	SH_PFC_FUNCTION(hscif0),
-+	SH_PFC_FUNCTION(hscif1),
-+	SH_PFC_FUNCTION(hscif2),
-+	SH_PFC_FUNCTION(hscif3),
-+	SH_PFC_FUNCTION(hscif4),
- 	SH_PFC_FUNCTION(i2c1),
- 	SH_PFC_FUNCTION(i2c2),
- 	SH_PFC_FUNCTION(i2c6),
diff --git a/patches.renesas/0169-clk-renesas-r8a7796-Add-DU-and-LVDS-clocks.patch b/patches.renesas/0169-clk-renesas-r8a7796-Add-DU-and-LVDS-clocks.patch
deleted file mode 100644
index 5a08dddb6c3fbd..00000000000000
--- a/patches.renesas/0169-clk-renesas-r8a7796-Add-DU-and-LVDS-clocks.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From c3b3138fb1f824695a509e55ce467907d4436d54 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 22 Oct 2016 14:29:06 +0300
-Subject: [PATCH 169/299] clk: renesas: r8a7796: Add DU and LVDS clocks
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit dbdcc4f996df280eb2758095b4774ea62da8a2a7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -155,6 +155,10 @@ static const struct mssr_mod_clk r8a7796
- 	DEF_MOD("vspd0",		 623,	R8A7796_CLK_S0D2),
- 	DEF_MOD("vspb",			 626,	R8A7796_CLK_S0D1),
- 	DEF_MOD("vspi0",		 631,	R8A7796_CLK_S0D1),
-+	DEF_MOD("du2",			 722,	R8A7796_CLK_S2D1),
-+	DEF_MOD("du1",			 723,	R8A7796_CLK_S2D1),
-+	DEF_MOD("du0",			 724,	R8A7796_CLK_S2D1),
-+	DEF_MOD("lvds",			 727,	R8A7796_CLK_S2D1),
- 	DEF_MOD("etheravb",		 812,	R8A7796_CLK_S0D6),
- 	DEF_MOD("gpio7",		 905,	R8A7796_CLK_S3D4),
- 	DEF_MOD("gpio6",		 906,	R8A7796_CLK_S3D4),
diff --git a/patches.renesas/0169-pinctrl-sh-pfc-r8a7791-Add-ADI-pinconf-support.patch b/patches.renesas/0169-pinctrl-sh-pfc-r8a7791-Add-ADI-pinconf-support.patch
deleted file mode 100644
index 8a010a217ccd57..00000000000000
--- a/patches.renesas/0169-pinctrl-sh-pfc-r8a7791-Add-ADI-pinconf-support.patch
+++ /dev/null
@@ -1,132 +0,0 @@
-From 8ecd1130c505e2f9342e5262b0aa9fa837e9a304 Mon Sep 17 00:00:00 2001
-From: Jacopo Mondi <jacopo@jmondi.org>
-Date: Thu, 1 Dec 2016 23:14:12 +0100
-Subject: [PATCH 169/255] pinctrl: sh-pfc: r8a7791: Add ADI pinconf support
-
-Add pin configuration support for Gyro-ADC, named ADI on r8a7791 SoC.
-
-Signed-off-by: Jacopo Mondi <jacopo@jmondi.org>
-Tested-by: Marek Vasut <marek.vasut@gmail.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 07254d835dfc1e06a8cdfb565e7371176a4b93f9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7791.c |   86 +++++++++++++++++++++++++++++++++++
- 1 file changed, 86 insertions(+)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
-@@ -1695,6 +1695,72 @@ static const struct sh_pfc_pin pinmux_pi
- 	PINMUX_GPIO_GP_ALL(),
- };
- 
-+/* - ADI -------------------------------------------------------------------- */
-+static const unsigned int adi_common_pins[] = {
-+	/* ADIDATA, ADICS/SAMP, ADICLK */
-+	RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25), RCAR_GP_PIN(6, 26),
-+};
-+static const unsigned int adi_common_mux[] = {
-+	/* ADIDATA, ADICS/SAMP, ADICLK */
-+	ADIDATA_MARK, ADICS_SAMP_MARK, ADICLK_MARK,
-+};
-+static const unsigned int adi_chsel0_pins[] = {
-+	/* ADICHS 0 */
-+	RCAR_GP_PIN(6, 27),
-+};
-+static const unsigned int adi_chsel0_mux[] = {
-+	/* ADICHS 0 */
-+	ADICHS0_MARK,
-+};
-+static const unsigned int adi_chsel1_pins[] = {
-+	/* ADICHS 1 */
-+	RCAR_GP_PIN(6, 28),
-+};
-+static const unsigned int adi_chsel1_mux[] = {
-+	/* ADICHS 1 */
-+	ADICHS1_MARK,
-+};
-+static const unsigned int adi_chsel2_pins[] = {
-+	/* ADICHS 2 */
-+	RCAR_GP_PIN(6, 29),
-+};
-+static const unsigned int adi_chsel2_mux[] = {
-+	/* ADICHS 2 */
-+	ADICHS2_MARK,
-+};
-+static const unsigned int adi_common_b_pins[] = {
-+	/* ADIDATA B, ADICS/SAMP B, ADICLK B */
-+	RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 26), RCAR_GP_PIN(5, 27),
-+};
-+static const unsigned int adi_common_b_mux[] = {
-+	/* ADIDATA B, ADICS/SAMP B, ADICLK B */
-+	ADIDATA_B_MARK, ADICS_SAMP_B_MARK, ADICLK_B_MARK,
-+};
-+static const unsigned int adi_chsel0_b_pins[] = {
-+	/* ADICHS B 0 */
-+	RCAR_GP_PIN(5, 28),
-+};
-+static const unsigned int adi_chsel0_b_mux[] = {
-+	/* ADICHS B 0 */
-+	ADICHS0_B_MARK,
-+};
-+static const unsigned int adi_chsel1_b_pins[] = {
-+	/* ADICHS B 1 */
-+	RCAR_GP_PIN(5, 29),
-+};
-+static const unsigned int adi_chsel1_b_mux[] = {
-+	/* ADICHS B 1 */
-+	ADICHS1_B_MARK,
-+};
-+static const unsigned int adi_chsel2_b_pins[] = {
-+	/* ADICHS B 2 */
-+	RCAR_GP_PIN(5, 30),
-+};
-+static const unsigned int adi_chsel2_b_mux[] = {
-+	/* ADICHS B 2 */
-+	ADICHS2_B_MARK,
-+};
-+
- /* - Audio Clock ------------------------------------------------------------ */
- static const unsigned int audio_clk_a_pins[] = {
- 	/* CLK */
-@@ -4347,6 +4413,14 @@ static const unsigned int vin2_clk_mux[]
- };
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
-+	SH_PFC_PIN_GROUP(adi_common),
-+	SH_PFC_PIN_GROUP(adi_chsel0),
-+	SH_PFC_PIN_GROUP(adi_chsel1),
-+	SH_PFC_PIN_GROUP(adi_chsel2),
-+	SH_PFC_PIN_GROUP(adi_common_b),
-+	SH_PFC_PIN_GROUP(adi_chsel0_b),
-+	SH_PFC_PIN_GROUP(adi_chsel1_b),
-+	SH_PFC_PIN_GROUP(adi_chsel2_b),
- 	SH_PFC_PIN_GROUP(audio_clk_a),
- 	SH_PFC_PIN_GROUP(audio_clk_b),
- 	SH_PFC_PIN_GROUP(audio_clk_b_b),
-@@ -4691,6 +4765,17 @@ static const struct sh_pfc_pin_group pin
- 	SH_PFC_PIN_GROUP(vin2_clk),
- };
- 
-+static const char * const adi_groups[] = {
-+	"adi_common",
-+	"adi_chsel0",
-+	"adi_chsel1",
-+	"adi_chsel2",
-+	"adi_common_b",
-+	"adi_chsel0_b",
-+	"adi_chsel1_b",
-+	"adi_chsel2_b",
-+};
-+
- static const char * const audio_clk_groups[] = {
- 	"audio_clk_a",
- 	"audio_clk_b",
-@@ -5196,6 +5281,7 @@ static const char * const vin2_groups[]
- };
- 
- static const struct sh_pfc_function pinmux_functions[] = {
-+	SH_PFC_FUNCTION(adi),
- 	SH_PFC_FUNCTION(audio_clk),
- 	SH_PFC_FUNCTION(avb),
- 	SH_PFC_FUNCTION(can0),
diff --git a/patches.renesas/0170-ARM-dts-r8a7778-Add-device-node-for-RESET-WDT-module.patch b/patches.renesas/0170-ARM-dts-r8a7778-Add-device-node-for-RESET-WDT-module.patch
deleted file mode 100644
index 1961a4645fe91a..00000000000000
--- a/patches.renesas/0170-ARM-dts-r8a7778-Add-device-node-for-RESET-WDT-module.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From a591b23beeb4ba7a3fba9213ad0c2bd8eaf1b5f3 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 1 Jun 2016 13:46:16 +0200
-Subject: [PATCH 170/299] ARM: dts: r8a7778: Add device node for RESET/WDT
- module
-
-Add a device node for the RESET/WDT module, which provides a.o. reset
-control, mode pin monitoring, and watchdog control.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-(cherry picked from commit e2eb35e03af7c884bf4373802a28a59aa63070b8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -626,4 +626,9 @@
- 				"sru-src6", "sru-src7", "sru-src8";
- 		};
- 	};
-+
-+	rst: reset-controller@ffcc0000 {
-+		compatible = "renesas,r8a7778-reset-wdt";
-+		reg = <0xffcc0000 0x40>;
-+	};
- };
diff --git a/patches.renesas/0170-tty-serial-sh-sci-set-error-code-when-kasprintf-fail.patch b/patches.renesas/0170-tty-serial-sh-sci-set-error-code-when-kasprintf-fail.patch
deleted file mode 100644
index 9c09ce97b28575..00000000000000
--- a/patches.renesas/0170-tty-serial-sh-sci-set-error-code-when-kasprintf-fail.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 6bdd9719a00061d387517cd5690e2130525d5e6b Mon Sep 17 00:00:00 2001
-From: Pan Bian <bianpan2016@163.com>
-Date: Sat, 3 Dec 2016 18:40:25 +0800
-Subject: [PATCH 170/255] tty: serial: sh-sci: set error code when kasprintf
- fails
-
-When the call to kasprintf() returns a NULL pointer, function
-sci_request_irq() frees the preallocated memory and returns 0 is
-returned. Because 0 means no error, the caller of sci_request_irq()
-will keep going, and the freed memory may be used or freed again. To
-avoid the above issue, this patch assigns "-ENOMEM" to the return
-variable ret.
-
-Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=188691
-
-Signed-off-by: Pan Bian <bianpan2016@163.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 623ac1d4a52f279d9379bae61ae1eb37c5767f96)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |    4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -1755,8 +1755,10 @@ static int sci_request_irq(struct sci_po
- 		desc = sci_irq_desc + i;
- 		port->irqstr[j] = kasprintf(GFP_KERNEL, "%s:%s",
- 					    dev_name(up->dev), desc->desc);
--		if (!port->irqstr[j])
-+		if (!port->irqstr[j]) {
-+			ret = -ENOMEM;
- 			goto out_nomem;
-+		}
- 
- 		ret = request_irq(irq, desc->handler, up->irqflags,
- 				  port->irqstr[j], port);
diff --git a/patches.renesas/0171-ARM-dts-r8a7779-Add-device-node-for-RESET-WDT-module.patch b/patches.renesas/0171-ARM-dts-r8a7779-Add-device-node-for-RESET-WDT-module.patch
deleted file mode 100644
index 31d756947bd492..00000000000000
--- a/patches.renesas/0171-ARM-dts-r8a7779-Add-device-node-for-RESET-WDT-module.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 39ca823cfc8748d8dc57837eaa15ac1c004fe35d Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 1 Jun 2016 13:47:30 +0200
-Subject: [PATCH 171/299] ARM: dts: r8a7779: Add device node for RESET/WDT
- module
-
-Add a device node for the RESET/WDT module, which provides a.o. reset
-control, mode pin monitoring, and watchdog control.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-(cherry picked from commit ad40150ab896455efa3677ebb9b469801c3f7214)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -590,6 +590,11 @@
- 		};
- 	};
- 
-+	rst: reset-controller@ffcc0000 {
-+		compatible = "renesas,r8a7779-reset-wdt";
-+		reg = <0xffcc0000 0x48>;
-+	};
-+
- 	sysc: system-controller@ffd85000 {
- 		compatible = "renesas,r8a7779-sysc";
- 		reg = <0xffd85000 0x0200>;
diff --git a/patches.renesas/0171-pinctrl-sh-pfc-r8a7791-Fix-IPSR-comment-typos.patch b/patches.renesas/0171-pinctrl-sh-pfc-r8a7791-Fix-IPSR-comment-typos.patch
deleted file mode 100644
index 301c85c347f072..00000000000000
--- a/patches.renesas/0171-pinctrl-sh-pfc-r8a7791-Fix-IPSR-comment-typos.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 782ab75e31402a584270aecee91764660a6de41f Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 31 Mar 2017 23:29:23 +0300
-Subject: [PATCH 171/286] pinctrl: sh-pfc: r8a7791: Fix IPSR comment typos
-
-The IPSR field names in the comments have been fat-fingered in a couple
-places --  fix those silly typos...
-
-Fixes: 508845196238 ("pinctrl: sh-pfc: r8a7791 PFC support")
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 0cbdc11482d72ad164e33ef7cc57b01e8b61e40d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7791.c |    6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
-@@ -5711,7 +5711,7 @@ static const struct pinmux_cfg_reg pinmu
- 	},
- 	{ PINMUX_CFG_REG_VAR("IPSR2", 0xE6060028, 32,
- 			     2, 3, 2, 2, 2, 2, 3, 3, 3, 3, 2, 2, 3) {
--		/* IP2_31_20 [2] */
-+		/* IP2_31_30 [2] */
- 		0, 0, 0, 0,
- 		/* IP2_29_27 [3] */
- 		FN_EX_CS3_N, FN_ATADIR0_N, FN_MSIOF2_TXD,
-@@ -5731,7 +5731,7 @@ static const struct pinmux_cfg_reg pinmu
- 		/* IP2_15_13 [3] */
- 		FN_A24, FN_DREQ2, FN_IO3, FN_TX1, FN_SCIFA1_TXD,
- 		0, 0, 0,
--		/* IP2_12_0 [3] */
-+		/* IP2_12_10 [3] */
- 		FN_A23, FN_IO2, FN_BPFCLK_B, FN_RX0, FN_SCIFA0_RXD,
- 		0, 0, 0,
- 		/* IP2_9_7 [3] */
-@@ -6042,7 +6042,7 @@ static const struct pinmux_cfg_reg pinmu
- 		/* IP10_24_22 [3] */
- 		FN_VI0_R1, FN_VI2_DATA2, FN_GLO_I1_B, FN_TS_SCK0_C, FN_ATAG1_N,
- 		0, 0, 0,
--		/* IP10_21_29 [3] */
-+		/* IP10_21_19 [3] */
- 		FN_VI0_R0, FN_VI2_DATA1, FN_GLO_I0_B,
- 		FN_TS_SDATA0_C, FN_ATACS11_N,
- 		0, 0, 0,
diff --git a/patches.renesas/0171-serial-sh-sci-Set-the-SCSCR-TE-and-RE-bits-in-the-dr.patch b/patches.renesas/0171-serial-sh-sci-Set-the-SCSCR-TE-and-RE-bits-in-the-dr.patch
deleted file mode 100644
index 029c819e4a7d7b..00000000000000
--- a/patches.renesas/0171-serial-sh-sci-Set-the-SCSCR-TE-and-RE-bits-in-the-dr.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 605282473a9d30883cd53ac235957a26589e4437 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Jan 2017 16:43:23 +0200
-Subject: [PATCH 171/255] serial: sh-sci: Set the SCSCR TE and RE bits in the
- driver
-
-The Transmit Enable and Receive Enable bits are set in the scscr field
-of all instances of the sh-sci platform data. Set them in the driver
-directly to prepare for their removal from platform data.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 9f8325b3c19cf2e5df6b9624480748421104d00c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |   13 +++++++------
- 1 file changed, 7 insertions(+), 6 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -2357,7 +2357,8 @@ done:
- 		serial_port_out(port, SCFCR, ctrl);
- 	}
- 
--	scr_val |= s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0);
-+	scr_val |= SCSCR_RE | SCSCR_TE |
-+		   (s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0));
- 	dev_dbg(port->dev, "SCSCR 0x%x\n", scr_val);
- 	serial_port_out(port, SCSCR, scr_val);
- 	if ((srr + 1 == 5) &&
-@@ -2811,7 +2812,8 @@ static void serial_console_write(struct
- 
- 	/* first save SCSCR then disable interrupts, keep clock source */
- 	ctrl = serial_port_in(port, SCSCR);
--	ctrl_temp = (sci_port->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)) |
-+	ctrl_temp = SCSCR_RE | SCSCR_TE |
-+		    (sci_port->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)) |
- 		    (ctrl & (SCSCR_CKE1 | SCSCR_CKE0));
- 	serial_port_out(port, SCSCR, ctrl_temp);
- 
-@@ -3013,7 +3015,6 @@ sci_parse_dt(struct platform_device *pde
- 	p->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
- 	p->type = SCI_OF_TYPE(match->data);
- 	p->regtype = SCI_OF_REGTYPE(match->data);
--	p->scscr = SCSCR_RE | SCSCR_TE;
- 
- 	if (of_find_property(np, "uart-has-rtscts", NULL))
- 		p->capabilities |= SCIx_HAVE_RTSCTS;
-@@ -3181,9 +3182,9 @@ static int __init early_console_setup(st
- 	sci_ports[0].cfg = &port_cfg;
- 	sci_ports[0].cfg->type = type;
- 	sci_probe_regmap(sci_ports[0].cfg);
--	port_cfg.scscr = sci_serial_in(&sci_ports[0].port, SCSCR) |
--			 SCSCR_RE | SCSCR_TE;
--	sci_serial_out(&sci_ports[0].port, SCSCR, port_cfg.scscr);
-+	port_cfg.scscr = sci_serial_in(&sci_ports[0].port, SCSCR);
-+	sci_serial_out(&sci_ports[0].port, SCSCR,
-+		       SCSCR_RE | SCSCR_TE | port_cfg.scscr);
- 
- 	device->con->write = serial_console_write;
- 	return 0;
diff --git a/patches.renesas/0172-ARM-dts-r8a7790-Add-device-node-for-RST-module.patch b/patches.renesas/0172-ARM-dts-r8a7790-Add-device-node-for-RST-module.patch
deleted file mode 100644
index d1b3a09bab308f..00000000000000
--- a/patches.renesas/0172-ARM-dts-r8a7790-Add-device-node-for-RST-module.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 0a949e95ebefcb823cda0237ba36983b963cacd6 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 12 Jun 2015 10:08:25 +0200
-Subject: [PATCH 172/299] ARM: dts: r8a7790: Add device node for RST module
-
-Add a device node for the RST module, which provides a.o. reset control
-and mode pin monitoring.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-(cherry picked from commit dd2b267bae0461e08a76fb6f6b27664cfa5b9520)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -1474,6 +1474,11 @@
- 		};
- 	};
- 
-+	rst: reset-controller@e6160000 {
-+		compatible = "renesas,r8a7790-rst";
-+		reg = <0 0xe6160000 0 0x0100>;
-+	};
-+
- 	sysc: system-controller@e6180000 {
- 		compatible = "renesas,r8a7790-sysc";
- 		reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0172-serial-sh-sci-Don-t-rely-on-platform-data-flags-when.patch b/patches.renesas/0172-serial-sh-sci-Don-t-rely-on-platform-data-flags-when.patch
deleted file mode 100644
index e1523153fed065..00000000000000
--- a/patches.renesas/0172-serial-sh-sci-Don-t-rely-on-platform-data-flags-when.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 72b1ef6ddb73200e5afaedb6f7440bfd8a7187a2 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Jan 2017 16:43:24 +0200
-Subject: [PATCH 172/255] serial: sh-sci: Don't rely on platform data flags
- when not needed
-
-The UPF_BOOT_AUTOCONF platform data flag is set by all platforms,
-hardcode it.
-
-The UPF_IOREMAP flag is set by a single SH platform and thus needs to be
-kept. However, for ARM platforms, we can base the decision on whether an
-OF node is present and bypass the platform data flags completely.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 3d73f32bfa312155a0990efd95803a3e7061140c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |    7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -2473,7 +2473,7 @@ static int sci_remap_port(struct uart_po
- 	if (port->membase)
- 		return 0;
- 
--	if (port->flags & UPF_IOREMAP) {
-+	if (port->dev->of_node || (port->flags & UPF_IOREMAP)) {
- 		port->membase = ioremap_nocache(port->mapbase, sport->reg_size);
- 		if (unlikely(!port->membase)) {
- 			dev_err(port->dev, "can't remap port#%d\n", port->line);
-@@ -2495,7 +2495,7 @@ static void sci_release_port(struct uart
- {
- 	struct sci_port *sport = to_sci_port(port);
- 
--	if (port->flags & UPF_IOREMAP) {
-+	if (port->dev->of_node || (port->flags & UPF_IOREMAP)) {
- 		iounmap(port->membase);
- 		port->membase = NULL;
- 	}
-@@ -2752,7 +2752,7 @@ static int sci_init_single(struct platfo
- 	}
- 
- 	port->type		= p->type;
--	port->flags		= UPF_FIXED_PORT | p->flags;
-+	port->flags		= UPF_FIXED_PORT | UPF_BOOT_AUTOCONF | p->flags;
- 	port->regshift		= p->regshift;
- 
- 	/*
-@@ -3012,7 +3012,6 @@ sci_parse_dt(struct platform_device *pde
- 
- 	*dev_id = id;
- 
--	p->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
- 	p->type = SCI_OF_TYPE(match->data);
- 	p->regtype = SCI_OF_REGTYPE(match->data);
- 
diff --git a/patches.renesas/0173-ARM-dts-r8a7791-Add-device-node-for-RST-module.patch b/patches.renesas/0173-ARM-dts-r8a7791-Add-device-node-for-RST-module.patch
deleted file mode 100644
index 54d4a0626b3596..00000000000000
--- a/patches.renesas/0173-ARM-dts-r8a7791-Add-device-node-for-RST-module.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From b888e08400a0cd2c8c1e0383a7b551b729961081 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 12 Jun 2015 10:08:25 +0200
-Subject: [PATCH 173/299] ARM: dts: r8a7791: Add device node for RST module
-
-Add a device node for the RST module, which provides a.o. reset control
-and mode pin monitoring.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-(cherry picked from commit 1fd27b80b60d5fabe22abdcb464968c37ea3a366)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -1484,6 +1484,11 @@
- 		};
- 	};
- 
-+	rst: reset-controller@e6160000 {
-+		compatible = "renesas,r8a7791-rst";
-+		reg = <0 0xe6160000 0 0x0100>;
-+	};
-+
- 	sysc: system-controller@e6180000 {
- 		compatible = "renesas,r8a7791-sysc";
- 		reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0173-net-phy-micrel-Restore-led_mode-and-clk_sel-on-resum.patch b/patches.renesas/0173-net-phy-micrel-Restore-led_mode-and-clk_sel-on-resum.patch
deleted file mode 100644
index 8ef0d6f40503b7..00000000000000
--- a/patches.renesas/0173-net-phy-micrel-Restore-led_mode-and-clk_sel-on-resum.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From 1e3c864a163ae8b999df3cdf65338d2d628dd3c8 Mon Sep 17 00:00:00 2001
-From: Leonard Crestez <leonard.crestez@nxp.com>
-Date: Wed, 31 May 2017 13:29:30 +0300
-Subject: [PATCH 173/286] net: phy: micrel: Restore led_mode and clk_sel on
- resume
-
-These bits seem to be lost after a suspend/resume cycle so just set them
-again. Do this by splitting the handling of these bits into a function
-that is also called on resume.
-
-This patch fixes ethernet suspend/resume on imx6ul-14x14-evk boards.
-
-Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 79e498a9c7da0737829ff864aae44df434105676)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/phy/micrel.c |   42 ++++++++++++++++++++++++++++--------------
- 1 file changed, 28 insertions(+), 14 deletions(-)
-
---- a/drivers/net/phy/micrel.c
-+++ b/drivers/net/phy/micrel.c
-@@ -268,23 +268,12 @@ out:
- 	return ret;
- }
- 
--static int kszphy_config_init(struct phy_device *phydev)
-+/* Some config bits need to be set again on resume, handle them here. */
-+static int kszphy_config_reset(struct phy_device *phydev)
- {
- 	struct kszphy_priv *priv = phydev->priv;
--	const struct kszphy_type *type;
- 	int ret;
- 
--	if (!priv)
--		return 0;
--
--	type = priv->type;
--
--	if (type->has_broadcast_disable)
--		kszphy_broadcast_disable(phydev);
--
--	if (type->has_nand_tree_disable)
--		kszphy_nand_tree_disable(phydev);
--
- 	if (priv->rmii_ref_clk_sel) {
- 		ret = kszphy_rmii_clk_sel(phydev, priv->rmii_ref_clk_sel_val);
- 		if (ret) {
-@@ -295,11 +284,30 @@ static int kszphy_config_init(struct phy
- 	}
- 
- 	if (priv->led_mode >= 0)
--		kszphy_setup_led(phydev, type->led_mode_reg, priv->led_mode);
-+		kszphy_setup_led(phydev, priv->type->led_mode_reg, priv->led_mode);
- 
- 	return 0;
- }
- 
-+static int kszphy_config_init(struct phy_device *phydev)
-+{
-+	struct kszphy_priv *priv = phydev->priv;
-+	const struct kszphy_type *type;
-+
-+	if (!priv)
-+		return 0;
-+
-+	type = priv->type;
-+
-+	if (type->has_broadcast_disable)
-+		kszphy_broadcast_disable(phydev);
-+
-+	if (type->has_nand_tree_disable)
-+		kszphy_nand_tree_disable(phydev);
-+
-+	return kszphy_config_reset(phydev);
-+}
-+
- static int ksz8041_config_init(struct phy_device *phydev)
- {
- 	struct device_node *of_node = phydev->mdio.dev.of_node;
-@@ -704,8 +712,14 @@ static int kszphy_suspend(struct phy_dev
- 
- static int kszphy_resume(struct phy_device *phydev)
- {
-+	int ret;
-+
- 	genphy_resume(phydev);
- 
-+	ret = kszphy_config_reset(phydev);
-+	if (ret)
-+		return ret;
-+
- 	/* Enable PHY Interrupts */
- 	if (phy_interrupt_is_valid(phydev)) {
- 		phydev->interrupts = PHY_INTERRUPT_ENABLED;
diff --git a/patches.renesas/0174-ARM-dts-r8a7792-Add-device-node-for-RST-module.patch b/patches.renesas/0174-ARM-dts-r8a7792-Add-device-node-for-RST-module.patch
deleted file mode 100644
index e13283207221e0..00000000000000
--- a/patches.renesas/0174-ARM-dts-r8a7792-Add-device-node-for-RST-module.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From e4adeb2842bb45b2abc55033162d423fcdd93a35 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 21 Oct 2016 12:13:33 +0200
-Subject: [PATCH 174/299] ARM: dts: r8a7792: Add device node for RST module
-
-Add a device node for the RST module, which provides a.o. reset control
-and mode pin monitoring.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit d6f78ec4521bc195b76ff7a54f19a712ba6ecdbc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7792.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7792.dtsi
-+++ b/arch/arm/boot/dts/r8a7792.dtsi
-@@ -117,6 +117,11 @@
- 				      IRQ_TYPE_LEVEL_LOW)>;
- 		};
- 
-+		rst: reset-controller@e6160000 {
-+			compatible = "renesas,r8a7792-rst";
-+			reg = <0 0xe6160000 0 0x0100>;
-+		};
-+
- 		sysc: system-controller@e6180000 {
- 			compatible = "renesas,r8a7792-sysc";
- 			reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0174-serial-sh-sci-Remove-initialization-of-zero-fields-i.patch b/patches.renesas/0174-serial-sh-sci-Remove-initialization-of-zero-fields-i.patch
deleted file mode 100644
index 4e66bd42858fe9..00000000000000
--- a/patches.renesas/0174-serial-sh-sci-Remove-initialization-of-zero-fields-i.patch
+++ /dev/null
@@ -1,221 +0,0 @@
-From 9c43e3295ad6351d0e75770a1b88ee7b507bebd8 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Jan 2017 16:43:33 +0200
-Subject: [PATCH 174/255] serial: sh-sci: Remove initialization of zero fields
- in sci_port_params
-
-The compiler zeros uninitialized fields, don't zero them manually.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 40b34ddb0385a2a698dec150b50e6b400fc373a0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |   94 --------------------------------------------
- 1 file changed, 94 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -160,14 +160,7 @@ struct plat_sci_reg {
- 	u8 offset, size;
- };
- 
--/* Helper for invalidating specific entries of an inherited map. */
--#define sci_reg_invalid	{ .offset = 0, .size = 0 }
--
- static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
--	[SCIx_PROBE_REGTYPE] = {
--		[0 ... SCIx_NR_REGS - 1] = sci_reg_invalid,
--	},
--
- 	/*
- 	 * Common SCI definitions, dependent on the port's regshift
- 	 * value.
-@@ -179,17 +172,6 @@ static const struct plat_sci_reg sci_reg
- 		[SCxTDR]	= { 0x03,  8 },
- 		[SCxSR]		= { 0x04,  8 },
- 		[SCxRDR]	= { 0x05,  8 },
--		[SCFCR]		= sci_reg_invalid,
--		[SCFDR]		= sci_reg_invalid,
--		[SCTFDR]	= sci_reg_invalid,
--		[SCRFDR]	= sci_reg_invalid,
--		[SCSPTR]	= sci_reg_invalid,
--		[SCLSR]		= sci_reg_invalid,
--		[HSSRR]		= sci_reg_invalid,
--		[SCPCR]		= sci_reg_invalid,
--		[SCPDR]		= sci_reg_invalid,
--		[SCDL]		= sci_reg_invalid,
--		[SCCKS]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -204,15 +186,6 @@ static const struct plat_sci_reg sci_reg
- 		[SCxRDR]	= { 0x0a,  8 },
- 		[SCFCR]		= { 0x0c,  8 },
- 		[SCFDR]		= { 0x0e, 16 },
--		[SCTFDR]	= sci_reg_invalid,
--		[SCRFDR]	= sci_reg_invalid,
--		[SCSPTR]	= sci_reg_invalid,
--		[SCLSR]		= sci_reg_invalid,
--		[HSSRR]		= sci_reg_invalid,
--		[SCPCR]		= sci_reg_invalid,
--		[SCPDR]		= sci_reg_invalid,
--		[SCDL]		= sci_reg_invalid,
--		[SCCKS]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -227,15 +200,8 @@ static const struct plat_sci_reg sci_reg
- 		[SCxRDR]	= { 0x24,  8 },
- 		[SCFCR]		= { 0x18, 16 },
- 		[SCFDR]		= { 0x1c, 16 },
--		[SCTFDR]	= sci_reg_invalid,
--		[SCRFDR]	= sci_reg_invalid,
--		[SCSPTR]	= sci_reg_invalid,
--		[SCLSR]		= sci_reg_invalid,
--		[HSSRR]		= sci_reg_invalid,
- 		[SCPCR]		= { 0x30, 16 },
- 		[SCPDR]		= { 0x34, 16 },
--		[SCDL]		= sci_reg_invalid,
--		[SCCKS]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -249,16 +215,10 @@ static const struct plat_sci_reg sci_reg
- 		[SCxSR]		= { 0x14, 16 },
- 		[SCxRDR]	= { 0x60,  8 },
- 		[SCFCR]		= { 0x18, 16 },
--		[SCFDR]		= sci_reg_invalid,
- 		[SCTFDR]	= { 0x38, 16 },
- 		[SCRFDR]	= { 0x3c, 16 },
--		[SCSPTR]	= sci_reg_invalid,
--		[SCLSR]		= sci_reg_invalid,
--		[HSSRR]		= sci_reg_invalid,
- 		[SCPCR]		= { 0x30, 16 },
- 		[SCPDR]		= { 0x34, 16 },
--		[SCDL]		= sci_reg_invalid,
--		[SCCKS]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -274,15 +234,8 @@ static const struct plat_sci_reg sci_reg
- 		[SCxRDR]	= { 0x14,  8 },
- 		[SCFCR]		= { 0x18, 16 },
- 		[SCFDR]		= { 0x1c, 16 },
--		[SCTFDR]	= sci_reg_invalid,
--		[SCRFDR]	= sci_reg_invalid,
- 		[SCSPTR]	= { 0x20, 16 },
- 		[SCLSR]		= { 0x24, 16 },
--		[HSSRR]		= sci_reg_invalid,
--		[SCPCR]		= sci_reg_invalid,
--		[SCPDR]		= sci_reg_invalid,
--		[SCDL]		= sci_reg_invalid,
--		[SCCKS]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -297,15 +250,6 @@ static const struct plat_sci_reg sci_reg
- 		[SCxRDR]	= { 0x0a,  8 },
- 		[SCFCR]		= { 0x0c,  8 },
- 		[SCFDR]		= { 0x0e, 16 },
--		[SCTFDR]	= sci_reg_invalid,
--		[SCRFDR]	= sci_reg_invalid,
--		[SCSPTR]	= sci_reg_invalid,
--		[SCLSR]		= sci_reg_invalid,
--		[HSSRR]		= sci_reg_invalid,
--		[SCPCR]		= sci_reg_invalid,
--		[SCPDR]		= sci_reg_invalid,
--		[SCDL]		= sci_reg_invalid,
--		[SCCKS]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -320,15 +264,8 @@ static const struct plat_sci_reg sci_reg
- 		[SCxRDR]	= { 0x14,  8 },
- 		[SCFCR]		= { 0x18, 16 },
- 		[SCFDR]		= { 0x1c, 16 },
--		[SCTFDR]	= sci_reg_invalid,
--		[SCRFDR]	= sci_reg_invalid,
- 		[SCSPTR]	= { 0x20, 16 },
- 		[SCLSR]		= { 0x24, 16 },
--		[HSSRR]		= sci_reg_invalid,
--		[SCPCR]		= sci_reg_invalid,
--		[SCPDR]		= sci_reg_invalid,
--		[SCDL]		= sci_reg_invalid,
--		[SCCKS]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -344,13 +281,8 @@ static const struct plat_sci_reg sci_reg
- 		[SCxRDR]	= { 0x14,  8 },
- 		[SCFCR]		= { 0x18, 16 },
- 		[SCFDR]		= { 0x1c, 16 },
--		[SCTFDR]	= sci_reg_invalid,
--		[SCRFDR]	= sci_reg_invalid,
- 		[SCSPTR]	= { 0x20, 16 },
- 		[SCLSR]		= { 0x24, 16 },
--		[HSSRR]		= sci_reg_invalid,
--		[SCPCR]		= sci_reg_invalid,
--		[SCPDR]		= sci_reg_invalid,
- 		[SCDL]		= { 0x30, 16 },
- 		[SCCKS]		= { 0x34, 16 },
- 	},
-@@ -367,13 +299,9 @@ static const struct plat_sci_reg sci_reg
- 		[SCxRDR]	= { 0x14,  8 },
- 		[SCFCR]		= { 0x18, 16 },
- 		[SCFDR]		= { 0x1c, 16 },
--		[SCTFDR]	= sci_reg_invalid,
--		[SCRFDR]	= sci_reg_invalid,
- 		[SCSPTR]	= { 0x20, 16 },
- 		[SCLSR]		= { 0x24, 16 },
- 		[HSSRR]		= { 0x40, 16 },
--		[SCPCR]		= sci_reg_invalid,
--		[SCPDR]		= sci_reg_invalid,
- 		[SCDL]		= { 0x30, 16 },
- 		[SCCKS]		= { 0x34, 16 },
- 	},
-@@ -391,15 +319,7 @@ static const struct plat_sci_reg sci_reg
- 		[SCxRDR]	= { 0x14,  8 },
- 		[SCFCR]		= { 0x18, 16 },
- 		[SCFDR]		= { 0x1c, 16 },
--		[SCTFDR]	= sci_reg_invalid,
--		[SCRFDR]	= sci_reg_invalid,
--		[SCSPTR]	= sci_reg_invalid,
- 		[SCLSR]		= { 0x24, 16 },
--		[HSSRR]		= sci_reg_invalid,
--		[SCPCR]		= sci_reg_invalid,
--		[SCPDR]		= sci_reg_invalid,
--		[SCDL]		= sci_reg_invalid,
--		[SCCKS]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -419,11 +339,6 @@ static const struct plat_sci_reg sci_reg
- 		[SCRFDR]	= { 0x20, 16 },
- 		[SCSPTR]	= { 0x24, 16 },
- 		[SCLSR]		= { 0x28, 16 },
--		[HSSRR]		= sci_reg_invalid,
--		[SCPCR]		= sci_reg_invalid,
--		[SCPDR]		= sci_reg_invalid,
--		[SCDL]		= sci_reg_invalid,
--		[SCCKS]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -439,15 +354,6 @@ static const struct plat_sci_reg sci_reg
- 		[SCxRDR]	= { 0x24,  8 },
- 		[SCFCR]		= { 0x18, 16 },
- 		[SCFDR]		= { 0x1c, 16 },
--		[SCTFDR]	= sci_reg_invalid,
--		[SCRFDR]	= sci_reg_invalid,
--		[SCSPTR]	= sci_reg_invalid,
--		[SCLSR]		= sci_reg_invalid,
--		[HSSRR]		= sci_reg_invalid,
--		[SCPCR]		= sci_reg_invalid,
--		[SCPDR]		= sci_reg_invalid,
--		[SCDL]		= sci_reg_invalid,
--		[SCCKS]		= sci_reg_invalid,
- 	},
- };
- 
diff --git a/patches.renesas/0174-soc-renesas-rcar-sysc-Add-support-for-fixing-up-powe.patch b/patches.renesas/0174-soc-renesas-rcar-sysc-Add-support-for-fixing-up-powe.patch
deleted file mode 100644
index b17112a1deb080..00000000000000
--- a/patches.renesas/0174-soc-renesas-rcar-sysc-Add-support-for-fixing-up-powe.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From 0b6f708e3ef268a78ac16a600b28f593ffe222ac Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 31 Mar 2017 11:01:55 +0200
-Subject: [PATCH 174/286] soc: renesas: rcar-sysc: Add support for fixing up
- power area tables
-
-The same SoC may have different power areas, depending on SoC revision.
-One option is to use different sets of power area tables for each SoC
-revision.  However, if the differences are small, it is much more
-space-efficient to have a single set of tables, and fix those up at
-runtime instead.
-
-Hence provide a helper to NULLify power areas that do not exist on some
-revisions (NULLified power areas are skipped during the registration
-phase), and support for an optional initialization callback to e.g. fix
-up power area tables.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit afa6f53df6052968ce3934ad324777c0057e31d1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/soc/renesas/rcar-sysc.c |   25 ++++++++++++++++++++++++-
- drivers/soc/renesas/rcar-sysc.h |   10 ++++++++++
- 2 files changed, 34 insertions(+), 1 deletion(-)
-
---- a/drivers/soc/renesas/rcar-sysc.c
-+++ b/drivers/soc/renesas/rcar-sysc.c
-@@ -2,7 +2,7 @@
-  * R-Car SYSC Power management support
-  *
-  * Copyright (C) 2014  Magnus Damm
-- * Copyright (C) 2015-2016 Glider bvba
-+ * Copyright (C) 2015-2017 Glider bvba
-  *
-  * This file is subject to the terms and conditions of the GNU General Public
-  * License.  See the file "COPYING" in the main directory of this archive
-@@ -334,6 +334,12 @@ static int __init rcar_sysc_pd_init(void
- 
- 	info = match->data;
- 
-+	if (info->init) {
-+		error = info->init();
-+		if (error)
-+			return error;
-+	}
-+
- 	has_cpg_mstp = of_find_compatible_node(NULL, NULL,
- 					       "renesas,cpg-mstp-clocks");
- 
-@@ -377,6 +383,11 @@ static int __init rcar_sysc_pd_init(void
- 		const struct rcar_sysc_area *area = &info->areas[i];
- 		struct rcar_sysc_pd *pd;
- 
-+		if (!area->name) {
-+			/* Skip NULLified area */
-+			continue;
-+		}
-+
- 		pd = kzalloc(sizeof(*pd) + strlen(area->name) + 1, GFP_KERNEL);
- 		if (!pd) {
- 			error = -ENOMEM;
-@@ -406,6 +417,18 @@ out_put:
- }
- early_initcall(rcar_sysc_pd_init);
- 
-+void __init rcar_sysc_nullify(struct rcar_sysc_area *areas,
-+			      unsigned int num_areas, u8 id)
-+{
-+	unsigned int i;
-+
-+	for (i = 0; i < num_areas; i++)
-+		if (areas[i].isr_bit == id) {
-+			areas[i].name = NULL;
-+			return;
-+		}
-+}
-+
- void __init rcar_sysc_init(phys_addr_t base, u32 syscier)
- {
- 	u32 syscimr;
---- a/drivers/soc/renesas/rcar-sysc.h
-+++ b/drivers/soc/renesas/rcar-sysc.h
-@@ -46,6 +46,7 @@ struct rcar_sysc_area {
-  */
- 
- struct rcar_sysc_info {
-+	int (*init)(void);	/* Optional */
- 	const struct rcar_sysc_area *areas;
- 	unsigned int num_areas;
- };
-@@ -59,4 +60,13 @@ extern const struct rcar_sysc_info r8a77
- extern const struct rcar_sysc_info r8a7794_sysc_info;
- extern const struct rcar_sysc_info r8a7795_sysc_info;
- extern const struct rcar_sysc_info r8a7796_sysc_info;
-+
-+
-+    /*
-+     * Helpers for fixing up power area tables depending on SoC revision
-+     */
-+
-+extern void rcar_sysc_nullify(struct rcar_sysc_area *areas,
-+			      unsigned int num_areas, u8 id);
-+
- #endif /* __SOC_RENESAS_RCAR_SYSC_H__ */
diff --git a/patches.renesas/0175-ARM-dts-r8a7793-Add-device-node-for-RST-module.patch b/patches.renesas/0175-ARM-dts-r8a7793-Add-device-node-for-RST-module.patch
deleted file mode 100644
index be4d66aac18c42..00000000000000
--- a/patches.renesas/0175-ARM-dts-r8a7793-Add-device-node-for-RST-module.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 9455f64c5870d25105ed624454077065636ceb4d Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 12 Jun 2015 10:08:25 +0200
-Subject: [PATCH 175/299] ARM: dts: r8a7793: Add device node for RST module
-
-Add a device node for the RST module, which provides a.o. reset control
-and mode pin monitoring.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-(cherry picked from commit eb2d2723d51ed29f706c5a0a2c46ebdbd5baa3bd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7793.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7793.dtsi
-+++ b/arch/arm/boot/dts/r8a7793.dtsi
-@@ -1281,6 +1281,11 @@
- 		};
- 	};
- 
-+	rst: reset-controller@e6160000 {
-+		compatible = "renesas,r8a7793-rst";
-+		reg = <0 0xe6160000 0 0x0100>;
-+	};
-+
- 	sysc: system-controller@e6180000 {
- 		compatible = "renesas,r8a7793-sysc";
- 		reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0175-serial-sh-sci-Replace-regmap-array-with-port-paramet.patch b/patches.renesas/0175-serial-sh-sci-Replace-regmap-array-with-port-paramet.patch
deleted file mode 100644
index aa1716bc1f06ea..00000000000000
--- a/patches.renesas/0175-serial-sh-sci-Replace-regmap-array-with-port-paramet.patch
+++ /dev/null
@@ -1,410 +0,0 @@
-From 215037910bc0dbe6931f71d28e20b90c34126b21 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Jan 2017 16:43:34 +0200
-Subject: [PATCH 175/255] serial: sh-sci: Replace regmap array with port
- parameters
-
-Turn the regmap two-dimensional array to an array of port parameters and
-store a pointer to the port parameters in the sci_port structure. This
-will allow handling additional port type dependent parameters.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit e095ee6b447a35ea90c523ce399d5a61753ade25)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |  278 ++++++++++++++++++++++++--------------------
- 1 file changed, 155 insertions(+), 123 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -101,10 +101,19 @@ enum SCI_CLKS {
- 	for ((_sr) = max_sr(_port); (_sr) >= min_sr(_port); (_sr)--)	\
- 		if ((_port)->sampling_rate_mask & SCI_SR((_sr)))
- 
-+struct plat_sci_reg {
-+	u8 offset, size;
-+};
-+
-+struct sci_port_params {
-+	const struct plat_sci_reg regs[SCIx_NR_REGS];
-+};
-+
- struct sci_port {
- 	struct uart_port	port;
- 
- 	/* Platform configuration */
-+	const struct sci_port_params *params;
- 	struct plat_sci_port	*cfg;
- 	unsigned int		overrun_reg;
- 	unsigned int		overrun_mask;
-@@ -156,69 +165,73 @@ to_sci_port(struct uart_port *uart)
- 	return container_of(uart, struct sci_port, port);
- }
- 
--struct plat_sci_reg {
--	u8 offset, size;
--};
--
--static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
-+static const struct sci_port_params sci_port_params[SCIx_NR_REGTYPES] = {
- 	/*
- 	 * Common SCI definitions, dependent on the port's regshift
- 	 * value.
- 	 */
- 	[SCIx_SCI_REGTYPE] = {
--		[SCSMR]		= { 0x00,  8 },
--		[SCBRR]		= { 0x01,  8 },
--		[SCSCR]		= { 0x02,  8 },
--		[SCxTDR]	= { 0x03,  8 },
--		[SCxSR]		= { 0x04,  8 },
--		[SCxRDR]	= { 0x05,  8 },
-+		.regs = {
-+			[SCSMR]		= { 0x00,  8 },
-+			[SCBRR]		= { 0x01,  8 },
-+			[SCSCR]		= { 0x02,  8 },
-+			[SCxTDR]	= { 0x03,  8 },
-+			[SCxSR]		= { 0x04,  8 },
-+			[SCxRDR]	= { 0x05,  8 },
-+		},
- 	},
- 
- 	/*
- 	 * Common definitions for legacy IrDA ports.
- 	 */
- 	[SCIx_IRDA_REGTYPE] = {
--		[SCSMR]		= { 0x00,  8 },
--		[SCBRR]		= { 0x02,  8 },
--		[SCSCR]		= { 0x04,  8 },
--		[SCxTDR]	= { 0x06,  8 },
--		[SCxSR]		= { 0x08, 16 },
--		[SCxRDR]	= { 0x0a,  8 },
--		[SCFCR]		= { 0x0c,  8 },
--		[SCFDR]		= { 0x0e, 16 },
-+		.regs = {
-+			[SCSMR]		= { 0x00,  8 },
-+			[SCBRR]		= { 0x02,  8 },
-+			[SCSCR]		= { 0x04,  8 },
-+			[SCxTDR]	= { 0x06,  8 },
-+			[SCxSR]		= { 0x08, 16 },
-+			[SCxRDR]	= { 0x0a,  8 },
-+			[SCFCR]		= { 0x0c,  8 },
-+			[SCFDR]		= { 0x0e, 16 },
-+		},
- 	},
- 
- 	/*
- 	 * Common SCIFA definitions.
- 	 */
- 	[SCIx_SCIFA_REGTYPE] = {
--		[SCSMR]		= { 0x00, 16 },
--		[SCBRR]		= { 0x04,  8 },
--		[SCSCR]		= { 0x08, 16 },
--		[SCxTDR]	= { 0x20,  8 },
--		[SCxSR]		= { 0x14, 16 },
--		[SCxRDR]	= { 0x24,  8 },
--		[SCFCR]		= { 0x18, 16 },
--		[SCFDR]		= { 0x1c, 16 },
--		[SCPCR]		= { 0x30, 16 },
--		[SCPDR]		= { 0x34, 16 },
-+		.regs = {
-+			[SCSMR]		= { 0x00, 16 },
-+			[SCBRR]		= { 0x04,  8 },
-+			[SCSCR]		= { 0x08, 16 },
-+			[SCxTDR]	= { 0x20,  8 },
-+			[SCxSR]		= { 0x14, 16 },
-+			[SCxRDR]	= { 0x24,  8 },
-+			[SCFCR]		= { 0x18, 16 },
-+			[SCFDR]		= { 0x1c, 16 },
-+			[SCPCR]		= { 0x30, 16 },
-+			[SCPDR]		= { 0x34, 16 },
-+		},
- 	},
- 
- 	/*
- 	 * Common SCIFB definitions.
- 	 */
- 	[SCIx_SCIFB_REGTYPE] = {
--		[SCSMR]		= { 0x00, 16 },
--		[SCBRR]		= { 0x04,  8 },
--		[SCSCR]		= { 0x08, 16 },
--		[SCxTDR]	= { 0x40,  8 },
--		[SCxSR]		= { 0x14, 16 },
--		[SCxRDR]	= { 0x60,  8 },
--		[SCFCR]		= { 0x18, 16 },
--		[SCTFDR]	= { 0x38, 16 },
--		[SCRFDR]	= { 0x3c, 16 },
--		[SCPCR]		= { 0x30, 16 },
--		[SCPDR]		= { 0x34, 16 },
-+		.regs = {
-+			[SCSMR]		= { 0x00, 16 },
-+			[SCBRR]		= { 0x04,  8 },
-+			[SCSCR]		= { 0x08, 16 },
-+			[SCxTDR]	= { 0x40,  8 },
-+			[SCxSR]		= { 0x14, 16 },
-+			[SCxRDR]	= { 0x60,  8 },
-+			[SCFCR]		= { 0x18, 16 },
-+			[SCTFDR]	= { 0x38, 16 },
-+			[SCRFDR]	= { 0x3c, 16 },
-+			[SCPCR]		= { 0x30, 16 },
-+			[SCPDR]		= { 0x34, 16 },
-+		},
- 	},
- 
- 	/*
-@@ -226,46 +239,52 @@ static const struct plat_sci_reg sci_reg
- 	 * count registers.
- 	 */
- 	[SCIx_SH2_SCIF_FIFODATA_REGTYPE] = {
--		[SCSMR]		= { 0x00, 16 },
--		[SCBRR]		= { 0x04,  8 },
--		[SCSCR]		= { 0x08, 16 },
--		[SCxTDR]	= { 0x0c,  8 },
--		[SCxSR]		= { 0x10, 16 },
--		[SCxRDR]	= { 0x14,  8 },
--		[SCFCR]		= { 0x18, 16 },
--		[SCFDR]		= { 0x1c, 16 },
--		[SCSPTR]	= { 0x20, 16 },
--		[SCLSR]		= { 0x24, 16 },
-+		.regs = {
-+			[SCSMR]		= { 0x00, 16 },
-+			[SCBRR]		= { 0x04,  8 },
-+			[SCSCR]		= { 0x08, 16 },
-+			[SCxTDR]	= { 0x0c,  8 },
-+			[SCxSR]		= { 0x10, 16 },
-+			[SCxRDR]	= { 0x14,  8 },
-+			[SCFCR]		= { 0x18, 16 },
-+			[SCFDR]		= { 0x1c, 16 },
-+			[SCSPTR]	= { 0x20, 16 },
-+			[SCLSR]		= { 0x24, 16 },
-+		},
- 	},
- 
- 	/*
- 	 * Common SH-3 SCIF definitions.
- 	 */
- 	[SCIx_SH3_SCIF_REGTYPE] = {
--		[SCSMR]		= { 0x00,  8 },
--		[SCBRR]		= { 0x02,  8 },
--		[SCSCR]		= { 0x04,  8 },
--		[SCxTDR]	= { 0x06,  8 },
--		[SCxSR]		= { 0x08, 16 },
--		[SCxRDR]	= { 0x0a,  8 },
--		[SCFCR]		= { 0x0c,  8 },
--		[SCFDR]		= { 0x0e, 16 },
-+		.regs = {
-+			[SCSMR]		= { 0x00,  8 },
-+			[SCBRR]		= { 0x02,  8 },
-+			[SCSCR]		= { 0x04,  8 },
-+			[SCxTDR]	= { 0x06,  8 },
-+			[SCxSR]		= { 0x08, 16 },
-+			[SCxRDR]	= { 0x0a,  8 },
-+			[SCFCR]		= { 0x0c,  8 },
-+			[SCFDR]		= { 0x0e, 16 },
-+		},
- 	},
- 
- 	/*
- 	 * Common SH-4(A) SCIF(B) definitions.
- 	 */
- 	[SCIx_SH4_SCIF_REGTYPE] = {
--		[SCSMR]		= { 0x00, 16 },
--		[SCBRR]		= { 0x04,  8 },
--		[SCSCR]		= { 0x08, 16 },
--		[SCxTDR]	= { 0x0c,  8 },
--		[SCxSR]		= { 0x10, 16 },
--		[SCxRDR]	= { 0x14,  8 },
--		[SCFCR]		= { 0x18, 16 },
--		[SCFDR]		= { 0x1c, 16 },
--		[SCSPTR]	= { 0x20, 16 },
--		[SCLSR]		= { 0x24, 16 },
-+		.regs = {
-+			[SCSMR]		= { 0x00, 16 },
-+			[SCBRR]		= { 0x04,  8 },
-+			[SCSCR]		= { 0x08, 16 },
-+			[SCxTDR]	= { 0x0c,  8 },
-+			[SCxSR]		= { 0x10, 16 },
-+			[SCxRDR]	= { 0x14,  8 },
-+			[SCFCR]		= { 0x18, 16 },
-+			[SCFDR]		= { 0x1c, 16 },
-+			[SCSPTR]	= { 0x20, 16 },
-+			[SCLSR]		= { 0x24, 16 },
-+		},
- 	},
- 
- 	/*
-@@ -273,37 +292,41 @@ static const struct plat_sci_reg sci_reg
- 	 * External Clock (BRG).
- 	 */
- 	[SCIx_SH4_SCIF_BRG_REGTYPE] = {
--		[SCSMR]		= { 0x00, 16 },
--		[SCBRR]		= { 0x04,  8 },
--		[SCSCR]		= { 0x08, 16 },
--		[SCxTDR]	= { 0x0c,  8 },
--		[SCxSR]		= { 0x10, 16 },
--		[SCxRDR]	= { 0x14,  8 },
--		[SCFCR]		= { 0x18, 16 },
--		[SCFDR]		= { 0x1c, 16 },
--		[SCSPTR]	= { 0x20, 16 },
--		[SCLSR]		= { 0x24, 16 },
--		[SCDL]		= { 0x30, 16 },
--		[SCCKS]		= { 0x34, 16 },
-+		.regs = {
-+			[SCSMR]		= { 0x00, 16 },
-+			[SCBRR]		= { 0x04,  8 },
-+			[SCSCR]		= { 0x08, 16 },
-+			[SCxTDR]	= { 0x0c,  8 },
-+			[SCxSR]		= { 0x10, 16 },
-+			[SCxRDR]	= { 0x14,  8 },
-+			[SCFCR]		= { 0x18, 16 },
-+			[SCFDR]		= { 0x1c, 16 },
-+			[SCSPTR]	= { 0x20, 16 },
-+			[SCLSR]		= { 0x24, 16 },
-+			[SCDL]		= { 0x30, 16 },
-+			[SCCKS]		= { 0x34, 16 },
-+		},
- 	},
- 
- 	/*
- 	 * Common HSCIF definitions.
- 	 */
- 	[SCIx_HSCIF_REGTYPE] = {
--		[SCSMR]		= { 0x00, 16 },
--		[SCBRR]		= { 0x04,  8 },
--		[SCSCR]		= { 0x08, 16 },
--		[SCxTDR]	= { 0x0c,  8 },
--		[SCxSR]		= { 0x10, 16 },
--		[SCxRDR]	= { 0x14,  8 },
--		[SCFCR]		= { 0x18, 16 },
--		[SCFDR]		= { 0x1c, 16 },
--		[SCSPTR]	= { 0x20, 16 },
--		[SCLSR]		= { 0x24, 16 },
--		[HSSRR]		= { 0x40, 16 },
--		[SCDL]		= { 0x30, 16 },
--		[SCCKS]		= { 0x34, 16 },
-+		.regs = {
-+			[SCSMR]		= { 0x00, 16 },
-+			[SCBRR]		= { 0x04,  8 },
-+			[SCSCR]		= { 0x08, 16 },
-+			[SCxTDR]	= { 0x0c,  8 },
-+			[SCxSR]		= { 0x10, 16 },
-+			[SCxRDR]	= { 0x14,  8 },
-+			[SCFCR]		= { 0x18, 16 },
-+			[SCFDR]		= { 0x1c, 16 },
-+			[SCSPTR]	= { 0x20, 16 },
-+			[SCLSR]		= { 0x24, 16 },
-+			[HSSRR]		= { 0x40, 16 },
-+			[SCDL]		= { 0x30, 16 },
-+			[SCCKS]		= { 0x34, 16 },
-+		},
- 	},
- 
- 	/*
-@@ -311,15 +334,17 @@ static const struct plat_sci_reg sci_reg
- 	 * register.
- 	 */
- 	[SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE] = {
--		[SCSMR]		= { 0x00, 16 },
--		[SCBRR]		= { 0x04,  8 },
--		[SCSCR]		= { 0x08, 16 },
--		[SCxTDR]	= { 0x0c,  8 },
--		[SCxSR]		= { 0x10, 16 },
--		[SCxRDR]	= { 0x14,  8 },
--		[SCFCR]		= { 0x18, 16 },
--		[SCFDR]		= { 0x1c, 16 },
--		[SCLSR]		= { 0x24, 16 },
-+		.regs = {
-+			[SCSMR]		= { 0x00, 16 },
-+			[SCBRR]		= { 0x04,  8 },
-+			[SCSCR]		= { 0x08, 16 },
-+			[SCxTDR]	= { 0x0c,  8 },
-+			[SCxSR]		= { 0x10, 16 },
-+			[SCxRDR]	= { 0x14,  8 },
-+			[SCFCR]		= { 0x18, 16 },
-+			[SCFDR]		= { 0x1c, 16 },
-+			[SCLSR]		= { 0x24, 16 },
-+		},
- 	},
- 
- 	/*
-@@ -327,18 +352,20 @@ static const struct plat_sci_reg sci_reg
- 	 * count registers.
- 	 */
- 	[SCIx_SH4_SCIF_FIFODATA_REGTYPE] = {
--		[SCSMR]		= { 0x00, 16 },
--		[SCBRR]		= { 0x04,  8 },
--		[SCSCR]		= { 0x08, 16 },
--		[SCxTDR]	= { 0x0c,  8 },
--		[SCxSR]		= { 0x10, 16 },
--		[SCxRDR]	= { 0x14,  8 },
--		[SCFCR]		= { 0x18, 16 },
--		[SCFDR]		= { 0x1c, 16 },
--		[SCTFDR]	= { 0x1c, 16 },	/* aliased to SCFDR */
--		[SCRFDR]	= { 0x20, 16 },
--		[SCSPTR]	= { 0x24, 16 },
--		[SCLSR]		= { 0x28, 16 },
-+		.regs = {
-+			[SCSMR]		= { 0x00, 16 },
-+			[SCBRR]		= { 0x04,  8 },
-+			[SCSCR]		= { 0x08, 16 },
-+			[SCxTDR]	= { 0x0c,  8 },
-+			[SCxSR]		= { 0x10, 16 },
-+			[SCxRDR]	= { 0x14,  8 },
-+			[SCFCR]		= { 0x18, 16 },
-+			[SCFDR]		= { 0x1c, 16 },
-+			[SCTFDR]	= { 0x1c, 16 },	/* aliased to SCFDR */
-+			[SCRFDR]	= { 0x20, 16 },
-+			[SCSPTR]	= { 0x24, 16 },
-+			[SCLSR]		= { 0x28, 16 },
-+		},
- 	},
- 
- 	/*
-@@ -346,18 +373,20 @@ static const struct plat_sci_reg sci_reg
- 	 * registers.
- 	 */
- 	[SCIx_SH7705_SCIF_REGTYPE] = {
--		[SCSMR]		= { 0x00, 16 },
--		[SCBRR]		= { 0x04,  8 },
--		[SCSCR]		= { 0x08, 16 },
--		[SCxTDR]	= { 0x20,  8 },
--		[SCxSR]		= { 0x14, 16 },
--		[SCxRDR]	= { 0x24,  8 },
--		[SCFCR]		= { 0x18, 16 },
--		[SCFDR]		= { 0x1c, 16 },
-+		.regs = {
-+			[SCSMR]		= { 0x00, 16 },
-+			[SCBRR]		= { 0x04,  8 },
-+			[SCSCR]		= { 0x08, 16 },
-+			[SCxTDR]	= { 0x20,  8 },
-+			[SCxSR]		= { 0x14, 16 },
-+			[SCxRDR]	= { 0x24,  8 },
-+			[SCFCR]		= { 0x18, 16 },
-+			[SCFDR]		= { 0x1c, 16 },
-+		},
- 	},
- };
- 
--#define sci_getreg(up, offset)		(sci_regmap[to_sci_port(up)->cfg->regtype] + offset)
-+#define sci_getreg(up, offset)		(&to_sci_port(up)->params->regs[offset])
- 
- /*
-  * The "offset" here is rather misleading, in that it refers to an enum
-@@ -2577,6 +2606,8 @@ static int sci_init_single(struct platfo
- 			return ret;
- 	}
- 
-+	sci_port->params = &sci_port_params[p->regtype];
-+
- 	switch (p->type) {
- 	case PORT_SCIFB:
- 		port->fifosize = 256;
-@@ -3087,6 +3118,7 @@ static int __init early_console_setup(st
- 	sci_ports[0].cfg = &port_cfg;
- 	sci_ports[0].cfg->type = type;
- 	sci_probe_regmap(sci_ports[0].cfg);
-+	sci_ports[0].params = &sci_port_params[sci_ports[0].cfg->regtype];
- 	port_cfg.scscr = sci_serial_in(&sci_ports[0].port, SCSCR);
- 	sci_serial_out(&sci_ports[0].port, SCSCR,
- 		       SCSCR_RE | SCSCR_TE | port_cfg.scscr);
diff --git a/patches.renesas/0175-soc-renesas-rcar-sysc-Add-support-for-R-Car-H3-ES2.0.patch b/patches.renesas/0175-soc-renesas-rcar-sysc-Add-support-for-R-Car-H3-ES2.0.patch
deleted file mode 100644
index 95121bff57958b..00000000000000
--- a/patches.renesas/0175-soc-renesas-rcar-sysc-Add-support-for-R-Car-H3-ES2.0.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From d2a85d448dc0d4fff9fdbab27ed4008e6d52a4c7 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 31 Mar 2017 11:01:56 +0200
-Subject: [PATCH 175/286] soc: renesas: rcar-sysc: Add support for R-Car H3
- ES2.0
-
-Power area A2VC0 was removed in revision ES2.0, cfr. R-Car Gen3 Hardware
-User's Manual rev. 0.53E.
-
-Hence remove it from the power area table when not running on ES1.x.
-
-This is in line with the goal to:
-  1. Support both the ES1.x and ES2.0 SoC revisions in a single binary
-     for now,
-  2. Make it clear which code supports ES1.x, so it can easily be
-     identified and removed later, when production SoCs are deemed
-     ubiquitous.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fcb87087261e1be51b4c03677f39246bdc312b1c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/soc/renesas/r8a7795-sysc.c       |   26 ++++++++++++++++++++++++--
- include/dt-bindings/power/r8a7795-sysc.h |    2 +-
- 2 files changed, 25 insertions(+), 3 deletions(-)
-
---- a/drivers/soc/renesas/r8a7795-sysc.c
-+++ b/drivers/soc/renesas/r8a7795-sysc.c
-@@ -1,7 +1,7 @@
- /*
-  * Renesas R-Car H3 System Controller
-  *
-- * Copyright (C) 2016 Glider bvba
-+ * Copyright (C) 2016-2017 Glider bvba
-  *
-  * This program is free software; you can redistribute it and/or modify
-  * it under the terms of the GNU General Public License as published by
-@@ -10,12 +10,13 @@
- 
- #include <linux/bug.h>
- #include <linux/kernel.h>
-+#include <linux/sys_soc.h>
- 
- #include <dt-bindings/power/r8a7795-sysc.h>
- 
- #include "rcar-sysc.h"
- 
--static const struct rcar_sysc_area r8a7795_areas[] __initconst = {
-+static struct rcar_sysc_area r8a7795_areas[] __initdata = {
- 	{ "always-on",	    0, 0, R8A7795_PD_ALWAYS_ON,	-1, PD_ALWAYS_ON },
- 	{ "ca57-scu",	0x1c0, 0, R8A7795_PD_CA57_SCU,	R8A7795_PD_ALWAYS_ON,
- 	  PD_SCU },
-@@ -40,6 +41,7 @@ static const struct rcar_sysc_area r8a77
- 	{ "a3vp",	0x340, 0, R8A7795_PD_A3VP,	R8A7795_PD_ALWAYS_ON },
- 	{ "cr7",	0x240, 0, R8A7795_PD_CR7,	R8A7795_PD_ALWAYS_ON },
- 	{ "a3vc",	0x380, 0, R8A7795_PD_A3VC,	R8A7795_PD_ALWAYS_ON },
-+	/* A2VC0 exists on ES1.x only */
- 	{ "a2vc0",	0x3c0, 0, R8A7795_PD_A2VC0,	R8A7795_PD_A3VC },
- 	{ "a2vc1",	0x3c0, 1, R8A7795_PD_A2VC1,	R8A7795_PD_A3VC },
- 	{ "3dg-a",	0x100, 0, R8A7795_PD_3DG_A,	R8A7795_PD_ALWAYS_ON },
-@@ -50,7 +52,27 @@ static const struct rcar_sysc_area r8a77
- 	{ "a3ir",	0x180, 0, R8A7795_PD_A3IR,	R8A7795_PD_ALWAYS_ON },
- };
- 
-+
-+	/*
-+	 * Fixups for R-Car H3 revisions after ES1.x
-+	 */
-+
-+static const struct soc_device_attribute r8a7795es1[] __initconst = {
-+	{ .soc_id = "r8a7795", .revision = "ES1.*" },
-+	{ /* sentinel */ }
-+};
-+
-+static int __init r8a7795_sysc_init(void)
-+{
-+	if (!soc_device_match(r8a7795es1))
-+		rcar_sysc_nullify(r8a7795_areas, ARRAY_SIZE(r8a7795_areas),
-+				  R8A7795_PD_A2VC0);
-+
-+	return 0;
-+}
-+
- const struct rcar_sysc_info r8a7795_sysc_info __initconst = {
-+	.init = r8a7795_sysc_init,
- 	.areas = r8a7795_areas,
- 	.num_areas = ARRAY_SIZE(r8a7795_areas),
- };
---- a/include/dt-bindings/power/r8a7795-sysc.h
-+++ b/include/dt-bindings/power/r8a7795-sysc.h
-@@ -33,7 +33,7 @@
- #define R8A7795_PD_CA53_SCU		21
- #define R8A7795_PD_3DG_E		22
- #define R8A7795_PD_A3IR			24
--#define R8A7795_PD_A2VC0		25
-+#define R8A7795_PD_A2VC0		25	/* ES1.x only */
- #define R8A7795_PD_A2VC1		26
- 
- /* Always-on power area */
diff --git a/patches.renesas/0176-ARM-dts-r8a7794-Add-device-node-for-RST-module.patch b/patches.renesas/0176-ARM-dts-r8a7794-Add-device-node-for-RST-module.patch
deleted file mode 100644
index e5438de7419a54..00000000000000
--- a/patches.renesas/0176-ARM-dts-r8a7794-Add-device-node-for-RST-module.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 668e75a0d70c7bbf5fdd038e8440acfcf6f9b6a2 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 12 Jun 2015 10:08:25 +0200
-Subject: [PATCH 176/299] ARM: dts: r8a7794: Add device node for RST module
-
-Add a device node for the RST module, which provides a.o. reset control
-and mode pin monitoring.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-(cherry picked from commit 46edf183af72fdb64daf81bcee05f091a9255c0c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7794.dtsi
-+++ b/arch/arm/boot/dts/r8a7794.dtsi
-@@ -1375,6 +1375,11 @@
- 		};
- 	};
- 
-+	rst: reset-controller@e6160000 {
-+		compatible = "renesas,r8a7794-rst";
-+		reg = <0 0xe6160000 0 0x0100>;
-+	};
-+
- 	sysc: system-controller@e6180000 {
- 		compatible = "renesas,r8a7794-sysc";
- 		reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0176-serial-sh-sci-Constify-platform-data.patch b/patches.renesas/0176-serial-sh-sci-Constify-platform-data.patch
deleted file mode 100644
index 50249d7b3e4da1..00000000000000
--- a/patches.renesas/0176-serial-sh-sci-Constify-platform-data.patch
+++ /dev/null
@@ -1,161 +0,0 @@
-From 119495e90c300f3159b36ba85039e99fcd5b23da Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Jan 2017 16:43:35 +0200
-Subject: [PATCH 176/255] serial: sh-sci: Constify platform data
-
-The driver modifies platform data for internal purpose only. Fix that
-and make the platform data structure const.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit daf5a8959a835bd91534e0ab049d0bfe8448536d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |   97 ++++++++++++++++++++++----------------------
- 1 file changed, 49 insertions(+), 48 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -114,7 +114,7 @@ struct sci_port {
- 
- 	/* Platform configuration */
- 	const struct sci_port_params *params;
--	struct plat_sci_port	*cfg;
-+	const struct plat_sci_port *cfg;
- 	unsigned int		overrun_reg;
- 	unsigned int		overrun_mask;
- 	unsigned int		error_mask;
-@@ -420,41 +420,6 @@ static void sci_serial_out(struct uart_p
- 		WARN(1, "Invalid register access\n");
- }
- 
--static int sci_probe_regmap(struct plat_sci_port *cfg)
--{
--	switch (cfg->type) {
--	case PORT_SCI:
--		cfg->regtype = SCIx_SCI_REGTYPE;
--		break;
--	case PORT_IRDA:
--		cfg->regtype = SCIx_IRDA_REGTYPE;
--		break;
--	case PORT_SCIFA:
--		cfg->regtype = SCIx_SCIFA_REGTYPE;
--		break;
--	case PORT_SCIFB:
--		cfg->regtype = SCIx_SCIFB_REGTYPE;
--		break;
--	case PORT_SCIF:
--		/*
--		 * The SH-4 is a bit of a misnomer here, although that's
--		 * where this particular port layout originated. This
--		 * configuration (or some slight variation thereof)
--		 * remains the dominant model for all SCIFs.
--		 */
--		cfg->regtype = SCIx_SH4_SCIF_REGTYPE;
--		break;
--	case PORT_HSCIF:
--		cfg->regtype = SCIx_HSCIF_REGTYPE;
--		break;
--	default:
--		pr_err("Can't probe register map for given port\n");
--		return -EINVAL;
--	}
--
--	return 0;
--}
--
- static void sci_port_enable(struct sci_port *sci_port)
- {
- 	unsigned int i;
-@@ -2561,9 +2526,50 @@ found:
- 	return 0;
- }
- 
-+static const struct sci_port_params *
-+sci_probe_regmap(const struct plat_sci_port *cfg)
-+{
-+	unsigned int regtype;
-+
-+	if (cfg->regtype != SCIx_PROBE_REGTYPE)
-+		return &sci_port_params[cfg->regtype];
-+
-+	switch (cfg->type) {
-+	case PORT_SCI:
-+		regtype = SCIx_SCI_REGTYPE;
-+		break;
-+	case PORT_IRDA:
-+		regtype = SCIx_IRDA_REGTYPE;
-+		break;
-+	case PORT_SCIFA:
-+		regtype = SCIx_SCIFA_REGTYPE;
-+		break;
-+	case PORT_SCIFB:
-+		regtype = SCIx_SCIFB_REGTYPE;
-+		break;
-+	case PORT_SCIF:
-+		/*
-+		 * The SH-4 is a bit of a misnomer here, although that's
-+		 * where this particular port layout originated. This
-+		 * configuration (or some slight variation thereof)
-+		 * remains the dominant model for all SCIFs.
-+		 */
-+		regtype = SCIx_SH4_SCIF_REGTYPE;
-+		break;
-+	case PORT_HSCIF:
-+		regtype = SCIx_HSCIF_REGTYPE;
-+		break;
-+	default:
-+		pr_err("Can't probe register map for given port\n");
-+		return NULL;
-+	}
-+
-+	return &sci_port_params[regtype];
-+}
-+
- static int sci_init_single(struct platform_device *dev,
- 			   struct sci_port *sci_port, unsigned int index,
--			   struct plat_sci_port *p, bool early)
-+			   const struct plat_sci_port *p, bool early)
- {
- 	struct uart_port *port = &sci_port->port;
- 	const struct resource *res;
-@@ -2600,13 +2606,9 @@ static int sci_init_single(struct platfo
- 		sci_port->irqs[3] = sci_port->irqs[0];
- 	}
- 
--	if (p->regtype == SCIx_PROBE_REGTYPE) {
--		ret = sci_probe_regmap(p);
--		if (unlikely(ret))
--			return ret;
--	}
--
--	sci_port->params = &sci_port_params[p->regtype];
-+	sci_port->params = sci_probe_regmap(p);
-+	if (unlikely(sci_port->params == NULL))
-+		return -EINVAL;
- 
- 	switch (p->type) {
- 	case PORT_SCIFB:
-@@ -2824,7 +2826,7 @@ static char early_serial_buf[32];
- 
- static int sci_probe_earlyprintk(struct platform_device *pdev)
- {
--	struct plat_sci_port *cfg = dev_get_platdata(&pdev->dev);
-+	const struct plat_sci_port *cfg = dev_get_platdata(&pdev->dev);
- 
- 	if (early_serial_console.data)
- 		return -EEXIST;
-@@ -3115,10 +3117,9 @@ static int __init early_console_setup(st
- 	device->port.serial_out	= sci_serial_out;
- 	device->port.type = type;
- 	memcpy(&sci_ports[0].port, &device->port, sizeof(struct uart_port));
-+	port_cfg.type = type;
- 	sci_ports[0].cfg = &port_cfg;
--	sci_ports[0].cfg->type = type;
--	sci_probe_regmap(sci_ports[0].cfg);
--	sci_ports[0].params = &sci_port_params[sci_ports[0].cfg->regtype];
-+	sci_ports[0].params = sci_probe_regmap(&port_cfg);
- 	port_cfg.scscr = sci_serial_in(&sci_ports[0].port, SCSCR);
- 	sci_serial_out(&sci_ports[0].port, SCSCR,
- 		       SCSCR_RE | SCSCR_TE | port_cfg.scscr);
diff --git a/patches.renesas/0176-usb-xhci-plat-Enable-async-suspend-resume.patch b/patches.renesas/0176-usb-xhci-plat-Enable-async-suspend-resume.patch
deleted file mode 100644
index dfaae08527ac04..00000000000000
--- a/patches.renesas/0176-usb-xhci-plat-Enable-async-suspend-resume.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 1c9d9aa71732d17d6d0653992f6332d52fa5b72d Mon Sep 17 00:00:00 2001
-From: Andrew Bresticker <abrestic@chromium.org>
-Date: Fri, 7 Apr 2017 17:56:49 +0300
-Subject: [PATCH 176/286] usb: xhci: plat: Enable async suspend/resume
-
-USB host controllers can take a significant amount of time to suspend
-and resume, adding several hundred miliseconds to the kernel resume
-time. Since the XHCI controller has no outside dependencies (other than
-clocks, which are suspended late/resumed early), allow it to suspend and
-resume asynchronously.
-
-Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
-Tested-by: Andrew Bresticker <abrestic@chromium.org>
-Tested-by: Robert Foss <robert.foss@collabora.com>
-Signed-off-by: Robert Foss <robert.foss@collabora.com>
-Reviewed-by: Baolin Wang <baolin.wang@linaro.org>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit c70a1529b29cb1362ade5dd113313fb945e32c3e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-plat.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/usb/host/xhci-plat.c
-+++ b/drivers/usb/host/xhci-plat.c
-@@ -258,6 +258,8 @@ static int xhci_plat_probe(struct platfo
- 	if (ret)
- 		goto dealloc_usb2_hcd;
- 
-+	device_enable_async_suspend(&pdev->dev);
-+
- 	return 0;
- 
- 
diff --git a/patches.renesas/0177-arm64-renesas-r8a7795-dtsi-Add-device-node-for-RST-m.patch b/patches.renesas/0177-arm64-renesas-r8a7795-dtsi-Add-device-node-for-RST-m.patch
deleted file mode 100644
index e2352d66fc2113..00000000000000
--- a/patches.renesas/0177-arm64-renesas-r8a7795-dtsi-Add-device-node-for-RST-m.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 6a333803250cd867d762fd5262f214bd29c5b00f Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 1 Sep 2015 16:15:32 +0200
-Subject: [PATCH 177/299] arm64: renesas: r8a7795 dtsi: Add device node for RST
- module
-
-Add a device node for the RST module, which provides a.o. reset control
-and mode pin monitoring.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-(cherry picked from commit 6ddbb4cec2f426f92e4b1d764a2a4475d1a49475)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm64/boot/dts/renesas/r8a7795.dtsi
----
- arch/arm64/boot/dts/renesas/r8a7795.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
-@@ -321,6 +321,11 @@
- 			#power-domain-cells = <0>;
- 		};
- 
-+		rst: reset-controller@e6160000 {
-+			compatible = "renesas,r8a7795-rst";
-+			reg = <0 0xe6160000 0 0x0200>;
-+		};
-+
- 		prr: chipid@fff00044 {
- 			compatible = "renesas,prr";
- 			reg = <0 0xfff00044 0 4>;
diff --git a/patches.renesas/0177-serial-sh-sci-Extend-sci_port_params-with-more-port-.patch b/patches.renesas/0177-serial-sh-sci-Extend-sci_port_params-with-more-port-.patch
deleted file mode 100644
index 9e49a4afda5b29..00000000000000
--- a/patches.renesas/0177-serial-sh-sci-Extend-sci_port_params-with-more-port-.patch
+++ /dev/null
@@ -1,403 +0,0 @@
-From 628b5dcebf1aca1b9fef75bb4cb3ce4bc208841f Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Jan 2017 16:43:36 +0200
-Subject: [PATCH 177/255] serial: sh-sci: Extend sci_port_params with more port
- parameters
-
-The fifo size, overrun register and mask, sampling rate mask and error
-mask all depend on the port type only and don't need to be computed at
-runtime. Add them to the sci_port_parameters structure.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit b2f20ed9c483859e2e83cfb1a3193e40760c18ad)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |  181 ++++++++++++++++++++++++--------------------
- drivers/tty/serial/sh-sci.h |    4 
- 2 files changed, 102 insertions(+), 83 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -107,6 +107,12 @@ struct plat_sci_reg {
- 
- struct sci_port_params {
- 	const struct plat_sci_reg regs[SCIx_NR_REGS];
-+	unsigned int fifosize;
-+	unsigned int overrun_reg;
-+	unsigned int overrun_mask;
-+	unsigned int sampling_rate_mask;
-+	unsigned int error_mask;
-+	unsigned int error_clear;
- };
- 
- struct sci_port {
-@@ -115,10 +121,6 @@ struct sci_port {
- 	/* Platform configuration */
- 	const struct sci_port_params *params;
- 	const struct plat_sci_port *cfg;
--	unsigned int		overrun_reg;
--	unsigned int		overrun_mask;
--	unsigned int		error_mask;
--	unsigned int		error_clear;
- 	unsigned int		sampling_rate_mask;
- 	resource_size_t		reg_size;
- 	struct mctrl_gpios	*gpios;
-@@ -179,6 +181,12 @@ static const struct sci_port_params sci_
- 			[SCxSR]		= { 0x04,  8 },
- 			[SCxRDR]	= { 0x05,  8 },
- 		},
-+		.fifosize = 1,
-+		.overrun_reg = SCxSR,
-+		.overrun_mask = SCI_ORER,
-+		.sampling_rate_mask = SCI_SR(32),
-+		.error_mask = SCI_DEFAULT_ERROR_MASK | SCI_ORER,
-+		.error_clear = SCI_ERROR_CLEAR & ~SCI_ORER,
- 	},
- 
- 	/*
-@@ -195,6 +203,12 @@ static const struct sci_port_params sci_
- 			[SCFCR]		= { 0x0c,  8 },
- 			[SCFDR]		= { 0x0e, 16 },
- 		},
-+		.fifosize = 1,
-+		.overrun_reg = SCxSR,
-+		.overrun_mask = SCI_ORER,
-+		.sampling_rate_mask = SCI_SR(32),
-+		.error_mask = SCI_DEFAULT_ERROR_MASK | SCI_ORER,
-+		.error_clear = SCI_ERROR_CLEAR & ~SCI_ORER,
- 	},
- 
- 	/*
-@@ -213,6 +227,12 @@ static const struct sci_port_params sci_
- 			[SCPCR]		= { 0x30, 16 },
- 			[SCPDR]		= { 0x34, 16 },
- 		},
-+		.fifosize = 64,
-+		.overrun_reg = SCxSR,
-+		.overrun_mask = SCIFA_ORER,
-+		.sampling_rate_mask = SCI_SR_SCIFAB,
-+		.error_mask = SCIF_DEFAULT_ERROR_MASK | SCIFA_ORER,
-+		.error_clear = SCIF_ERROR_CLEAR & ~SCIFA_ORER,
- 	},
- 
- 	/*
-@@ -232,6 +252,12 @@ static const struct sci_port_params sci_
- 			[SCPCR]		= { 0x30, 16 },
- 			[SCPDR]		= { 0x34, 16 },
- 		},
-+		.fifosize = 256,
-+		.overrun_reg = SCxSR,
-+		.overrun_mask = SCIFA_ORER,
-+		.sampling_rate_mask = SCI_SR_SCIFAB,
-+		.error_mask = SCIF_DEFAULT_ERROR_MASK | SCIFA_ORER,
-+		.error_clear = SCIF_ERROR_CLEAR & ~SCIFA_ORER,
- 	},
- 
- 	/*
-@@ -251,6 +277,12 @@ static const struct sci_port_params sci_
- 			[SCSPTR]	= { 0x20, 16 },
- 			[SCLSR]		= { 0x24, 16 },
- 		},
-+		.fifosize = 16,
-+		.overrun_reg = SCLSR,
-+		.overrun_mask = SCLSR_ORER,
-+		.sampling_rate_mask = SCI_SR(32),
-+		.error_mask = SCIF_DEFAULT_ERROR_MASK,
-+		.error_clear = SCIF_ERROR_CLEAR,
- 	},
- 
- 	/*
-@@ -267,6 +299,12 @@ static const struct sci_port_params sci_
- 			[SCFCR]		= { 0x0c,  8 },
- 			[SCFDR]		= { 0x0e, 16 },
- 		},
-+		.fifosize = 16,
-+		.overrun_reg = SCLSR,
-+		.overrun_mask = SCLSR_ORER,
-+		.sampling_rate_mask = SCI_SR(32),
-+		.error_mask = SCIF_DEFAULT_ERROR_MASK,
-+		.error_clear = SCIF_ERROR_CLEAR,
- 	},
- 
- 	/*
-@@ -285,6 +323,12 @@ static const struct sci_port_params sci_
- 			[SCSPTR]	= { 0x20, 16 },
- 			[SCLSR]		= { 0x24, 16 },
- 		},
-+		.fifosize = 16,
-+		.overrun_reg = SCLSR,
-+		.overrun_mask = SCLSR_ORER,
-+		.sampling_rate_mask = SCI_SR(32),
-+		.error_mask = SCIF_DEFAULT_ERROR_MASK,
-+		.error_clear = SCIF_ERROR_CLEAR,
- 	},
- 
- 	/*
-@@ -306,6 +350,12 @@ static const struct sci_port_params sci_
- 			[SCDL]		= { 0x30, 16 },
- 			[SCCKS]		= { 0x34, 16 },
- 		},
-+		.fifosize = 16,
-+		.overrun_reg = SCLSR,
-+		.overrun_mask = SCLSR_ORER,
-+		.sampling_rate_mask = SCI_SR(32),
-+		.error_mask = SCIF_DEFAULT_ERROR_MASK,
-+		.error_clear = SCIF_ERROR_CLEAR,
- 	},
- 
- 	/*
-@@ -327,6 +377,12 @@ static const struct sci_port_params sci_
- 			[SCDL]		= { 0x30, 16 },
- 			[SCCKS]		= { 0x34, 16 },
- 		},
-+		.fifosize = 128,
-+		.overrun_reg = SCLSR,
-+		.overrun_mask = SCLSR_ORER,
-+		.sampling_rate_mask = SCI_SR_RANGE(8, 32),
-+		.error_mask = SCIF_DEFAULT_ERROR_MASK,
-+		.error_clear = SCIF_ERROR_CLEAR,
- 	},
- 
- 	/*
-@@ -345,6 +401,12 @@ static const struct sci_port_params sci_
- 			[SCFDR]		= { 0x1c, 16 },
- 			[SCLSR]		= { 0x24, 16 },
- 		},
-+		.fifosize = 16,
-+		.overrun_reg = SCLSR,
-+		.overrun_mask = SCLSR_ORER,
-+		.sampling_rate_mask = SCI_SR(32),
-+		.error_mask = SCIF_DEFAULT_ERROR_MASK,
-+		.error_clear = SCIF_ERROR_CLEAR,
- 	},
- 
- 	/*
-@@ -366,6 +428,12 @@ static const struct sci_port_params sci_
- 			[SCSPTR]	= { 0x24, 16 },
- 			[SCLSR]		= { 0x28, 16 },
- 		},
-+		.fifosize = 16,
-+		.overrun_reg = SCLSR,
-+		.overrun_mask = SCLSR_ORER,
-+		.sampling_rate_mask = SCI_SR(32),
-+		.error_mask = SCIF_DEFAULT_ERROR_MASK,
-+		.error_clear = SCIF_ERROR_CLEAR,
- 	},
- 
- 	/*
-@@ -383,6 +451,12 @@ static const struct sci_port_params sci_
- 			[SCFCR]		= { 0x18, 16 },
- 			[SCFDR]		= { 0x1c, 16 },
- 		},
-+		.fifosize = 16,
-+		.overrun_reg = SCxSR,
-+		.overrun_mask = SCIFA_ORER,
-+		.sampling_rate_mask = SCI_SR(16),
-+		.error_mask = SCIF_DEFAULT_ERROR_MASK | SCIFA_ORER,
-+		.error_clear = SCIF_ERROR_CLEAR & ~SCIFA_ORER,
- 	},
- };
- 
-@@ -545,7 +619,7 @@ static void sci_clear_SCxSR(struct uart_
- 	if (port->type == PORT_SCI) {
- 		/* Just store the mask */
- 		serial_port_out(port, SCxSR, mask);
--	} else if (to_sci_port(port)->overrun_mask == SCIFA_ORER) {
-+	} else if (to_sci_port(port)->params->overrun_mask == SCIFA_ORER) {
- 		/* SCIFA/SCIFB and SCIF on SH7705/SH7720/SH7721 */
- 		/* Only clear the status bits we want to clear */
- 		serial_port_out(port, SCxSR,
-@@ -640,11 +714,13 @@ static void sci_init_pins(struct uart_po
- 
- static int sci_txfill(struct uart_port *port)
- {
-+	struct sci_port *s = to_sci_port(port);
-+	unsigned int fifo_mask = (s->params->fifosize << 1) - 1;
- 	const struct plat_sci_reg *reg;
- 
- 	reg = sci_getreg(port, SCTFDR);
- 	if (reg->size)
--		return serial_port_in(port, SCTFDR) & ((port->fifosize << 1) - 1);
-+		return serial_port_in(port, SCTFDR) & fifo_mask;
- 
- 	reg = sci_getreg(port, SCFDR);
- 	if (reg->size)
-@@ -660,15 +736,17 @@ static int sci_txroom(struct uart_port *
- 
- static int sci_rxfill(struct uart_port *port)
- {
-+	struct sci_port *s = to_sci_port(port);
-+	unsigned int fifo_mask = (s->params->fifosize << 1) - 1;
- 	const struct plat_sci_reg *reg;
- 
- 	reg = sci_getreg(port, SCRFDR);
- 	if (reg->size)
--		return serial_port_in(port, SCRFDR) & ((port->fifosize << 1) - 1);
-+		return serial_port_in(port, SCRFDR) & fifo_mask;
- 
- 	reg = sci_getreg(port, SCFDR);
- 	if (reg->size)
--		return serial_port_in(port, SCFDR) & ((port->fifosize << 1) - 1);
-+		return serial_port_in(port, SCFDR) & fifo_mask;
- 
- 	return (serial_port_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
- }
-@@ -881,7 +959,7 @@ static int sci_handle_errors(struct uart
- 	struct sci_port *s = to_sci_port(port);
- 
- 	/* Handle overruns */
--	if (status & s->overrun_mask) {
-+	if (status & s->params->overrun_mask) {
- 		port->icount.overrun++;
- 
- 		/* overrun error */
-@@ -947,14 +1025,14 @@ static int sci_handle_fifo_overrun(struc
- 	int copied = 0;
- 	u16 status;
- 
--	reg = sci_getreg(port, s->overrun_reg);
-+	reg = sci_getreg(port, s->params->overrun_reg);
- 	if (!reg->size)
- 		return 0;
- 
--	status = serial_port_in(port, s->overrun_reg);
--	if (status & s->overrun_mask) {
--		status &= ~s->overrun_mask;
--		serial_port_out(port, s->overrun_reg, status);
-+	status = serial_port_in(port, s->params->overrun_reg);
-+	if (status & s->params->overrun_mask) {
-+		status &= ~s->params->overrun_mask;
-+		serial_port_out(port, s->params->overrun_reg, status);
- 
- 		port->icount.overrun++;
- 
-@@ -1554,12 +1632,10 @@ static irqreturn_t sci_mpxed_interrupt(i
- 
- 	ssr_status = serial_port_in(port, SCxSR);
- 	scr_status = serial_port_in(port, SCSCR);
--	if (s->overrun_reg == SCxSR)
-+	if (s->params->overrun_reg == SCxSR)
- 		orer_status = ssr_status;
--	else {
--		if (sci_getreg(port, s->overrun_reg)->size)
--			orer_status = serial_port_in(port, s->overrun_reg);
--	}
-+	else if (sci_getreg(port, s->params->overrun_reg)->size)
-+		orer_status = serial_port_in(port, s->params->overrun_reg);
- 
- 	err_enabled = scr_status & port_rx_irq_mask(port);
- 
-@@ -1585,7 +1661,7 @@ static irqreturn_t sci_mpxed_interrupt(i
- 		ret = sci_br_interrupt(irq, ptr);
- 
- 	/* Overrun Interrupt */
--	if (orer_status & s->overrun_mask) {
-+	if (orer_status & s->params->overrun_mask) {
- 		sci_handle_fifo_overrun(port);
- 		ret = IRQ_HANDLED;
- 	}
-@@ -2610,51 +2686,13 @@ static int sci_init_single(struct platfo
- 	if (unlikely(sci_port->params == NULL))
- 		return -EINVAL;
- 
--	switch (p->type) {
--	case PORT_SCIFB:
--		port->fifosize = 256;
--		sci_port->overrun_reg = SCxSR;
--		sci_port->overrun_mask = SCIFA_ORER;
--		sci_port->sampling_rate_mask = SCI_SR_SCIFAB;
--		break;
--	case PORT_HSCIF:
--		port->fifosize = 128;
--		sci_port->overrun_reg = SCLSR;
--		sci_port->overrun_mask = SCLSR_ORER;
--		sci_port->sampling_rate_mask = SCI_SR_RANGE(8, 32);
--		break;
--	case PORT_SCIFA:
--		port->fifosize = 64;
--		sci_port->overrun_reg = SCxSR;
--		sci_port->overrun_mask = SCIFA_ORER;
--		sci_port->sampling_rate_mask = SCI_SR_SCIFAB;
--		break;
--	case PORT_SCIF:
--		port->fifosize = 16;
--		if (p->regtype == SCIx_SH7705_SCIF_REGTYPE) {
--			sci_port->overrun_reg = SCxSR;
--			sci_port->overrun_mask = SCIFA_ORER;
--			sci_port->sampling_rate_mask = SCI_SR(16);
--		} else {
--			sci_port->overrun_reg = SCLSR;
--			sci_port->overrun_mask = SCLSR_ORER;
--			sci_port->sampling_rate_mask = SCI_SR(32);
--		}
--		break;
--	default:
--		port->fifosize = 1;
--		sci_port->overrun_reg = SCxSR;
--		sci_port->overrun_mask = SCI_ORER;
--		sci_port->sampling_rate_mask = SCI_SR(32);
--		break;
--	}
--
- 	/* SCIFA on sh7723 and sh7724 need a custom sampling rate that doesn't
- 	 * match the SoC datasheet, this should be investigated. Let platform
- 	 * data override the sampling rate for now.
- 	 */
--	if (p->sampling_rate)
--		sci_port->sampling_rate_mask = SCI_SR(p->sampling_rate);
-+	sci_port->sampling_rate_mask = p->sampling_rate
-+				     ? SCI_SR(p->sampling_rate)
-+				     : sci_port->params->sampling_rate_mask;
- 
- 	if (!early) {
- 		ret = sci_init_clocks(sci_port, &dev->dev);
-@@ -2670,29 +2708,10 @@ static int sci_init_single(struct platfo
- 	sci_port->break_timer.function = sci_break_timer;
- 	init_timer(&sci_port->break_timer);
- 
--	/*
--	 * Establish some sensible defaults for the error detection.
--	 */
--	if (p->type == PORT_SCI) {
--		sci_port->error_mask = SCI_DEFAULT_ERROR_MASK;
--		sci_port->error_clear = SCI_ERROR_CLEAR;
--	} else {
--		sci_port->error_mask = SCIF_DEFAULT_ERROR_MASK;
--		sci_port->error_clear = SCIF_ERROR_CLEAR;
--	}
--
--	/*
--	 * Make the error mask inclusive of overrun detection, if
--	 * supported.
--	 */
--	if (sci_port->overrun_reg == SCxSR) {
--		sci_port->error_mask |= sci_port->overrun_mask;
--		sci_port->error_clear &= ~sci_port->overrun_mask;
--	}
--
- 	port->type		= p->type;
- 	port->flags		= UPF_FIXED_PORT | UPF_BOOT_AUTOCONF | p->flags;
- 	port->regshift		= p->regshift;
-+	port->fifosize		= sci_port->params->fifosize;
- 
- 	/*
- 	 * The UART port needs an IRQ value, so we peg this to the RX IRQ
---- a/drivers/tty/serial/sh-sci.h
-+++ b/drivers/tty/serial/sh-sci.h
-@@ -151,12 +151,12 @@ enum {
- #define SCxSR_PER(port)		(((port)->type == PORT_SCI) ? SCI_PER    : SCIF_PER)
- #define SCxSR_BRK(port)		(((port)->type == PORT_SCI) ? 0x00       : SCIF_BRK)
- 
--#define SCxSR_ERRORS(port)	(to_sci_port(port)->error_mask)
-+#define SCxSR_ERRORS(port)	(to_sci_port(port)->params->error_mask)
- 
- #define SCxSR_RDxF_CLEAR(port) \
- 	(((port)->type == PORT_SCI) ? SCI_RDxF_CLEAR : SCIF_RDxF_CLEAR)
- #define SCxSR_ERROR_CLEAR(port) \
--	(to_sci_port(port)->error_clear)
-+	(to_sci_port(port)->params->error_clear)
- #define SCxSR_TDxE_CLEAR(port) \
- 	(((port)->type == PORT_SCI) ? SCI_TDxE_CLEAR : SCIF_TDxE_CLEAR)
- #define SCxSR_BREAK_CLEAR(port) \
diff --git a/patches.renesas/0177-usb-xhci-clear-EINT-bit-in-status-correctly.patch b/patches.renesas/0177-usb-xhci-clear-EINT-bit-in-status-correctly.patch
deleted file mode 100644
index ea8dc1669382c8..00000000000000
--- a/patches.renesas/0177-usb-xhci-clear-EINT-bit-in-status-correctly.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From cf710c5355d76e66ab14457e5dd69666feb959e2 Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:56:50 +0300
-Subject: [PATCH 177/286] usb: xhci: clear EINT bit in status correctly
-
-EINT(Event Interrupt) is a write-1-to-clear type of bit in xhci
-status register. It should be cleared by writing a 1. Writing 0
-to this bit has no effect.
-
-Xhci driver tries to clear this bit by writing 0 to it. This is
-not the right way to go. This patch corrects this by reading the
-register first, then clearing all RO/RW1C/RsvZ bits and setting
-the clearing bit, and writing back the new value at last.
-
-Xhci spec requires that software that uses EINT shall clear it
-prior to clearing any IP flags in section 5.4.2. This is the
-reason why this patch is CC'ed stable as well.
-
-[old way didn't cause any issues, skip stable, send to next -Mathias]
-
-Cc: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit d1001ab41064c7fe7bffbc1d7c3921912f3ec32d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -724,7 +724,7 @@ void xhci_stop(struct usb_hcd *hcd)
- 	xhci_dbg_trace(xhci, trace_xhci_dbg_init,
- 			"// Disabling event ring interrupts");
- 	temp = readl(&xhci->op_regs->status);
--	writel(temp & ~STS_EINT, &xhci->op_regs->status);
-+	writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status);
- 	temp = readl(&xhci->ir_set->irq_pending);
- 	writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
- 	xhci_print_ir_set(xhci, 0);
-@@ -1097,7 +1097,7 @@ int xhci_resume(struct xhci_hcd *xhci, b
- 
- 		xhci_dbg(xhci, "// Disabling event ring interrupts\n");
- 		temp = readl(&xhci->op_regs->status);
--		writel(temp & ~STS_EINT, &xhci->op_regs->status);
-+		writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status);
- 		temp = readl(&xhci->ir_set->irq_pending);
- 		writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
- 		xhci_print_ir_set(xhci, 0);
diff --git a/patches.renesas/0178-arm64-renesas-r8a7796-dtsi-Add-device-node-for-RST-m.patch b/patches.renesas/0178-arm64-renesas-r8a7796-dtsi-Add-device-node-for-RST-m.patch
deleted file mode 100644
index 4fbcec6d478246..00000000000000
--- a/patches.renesas/0178-arm64-renesas-r8a7796-dtsi-Add-device-node-for-RST-m.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From c4e00c52cc625c2e73ff53a75d2b4c8ba669a864 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 27 May 2016 11:55:26 +0200
-Subject: [PATCH 178/299] arm64: renesas: r8a7796 dtsi: Add device node for RST
- module
-
-Add a device node for the RST module, which provides a.o. reset control
-and mode pin monitoring.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-(cherry picked from commit 65f922c78f9693c037905f00785033aefd97df47)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm64/boot/dts/renesas/r8a7796.dtsi
----
- arch/arm64/boot/dts/renesas/r8a7796.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
-@@ -242,6 +242,11 @@
- 			#power-domain-cells = <0>;
- 		};
- 
-+		rst: reset-controller@e6160000 {
-+			compatible = "renesas,r8a7796-rst";
-+			reg = <0 0xe6160000 0 0x0200>;
-+		};
-+
- 		prr: chipid@fff00044 {
- 			compatible = "renesas,prr";
- 			reg = <0 0xfff00044 0 4>;
diff --git a/patches.renesas/0178-serial-sh-sci-Remove-the-platform-data-dma-slave-rx-.patch b/patches.renesas/0178-serial-sh-sci-Remove-the-platform-data-dma-slave-rx-.patch
deleted file mode 100644
index 7cbe3dc051e82a..00000000000000
--- a/patches.renesas/0178-serial-sh-sci-Remove-the-platform-data-dma-slave-rx-.patch
+++ /dev/null
@@ -1,93 +0,0 @@
-From 4bd9f694da5dd3392214353d5d18d2a1b77d383d Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Jan 2017 16:43:37 +0200
-Subject: [PATCH 178/255] serial: sh-sci: Remove the platform data dma slave
- rx/tx channel IDs
-
-Only SH platforms still use platform data for the sh-sci, and none of
-them declare DMA channels connected to the SCI. Remove the corresponding
-platform data fields and simplify the driver accordingly.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 219fb0c1436e4893a290ba270bc0e644d02465a3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |   23 ++++++-----------------
- include/linux/serial_sci.h  |    3 ---
- 2 files changed, 6 insertions(+), 20 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -1389,20 +1389,14 @@ static void rx_timer_fn(unsigned long ar
- }
- 
- static struct dma_chan *sci_request_dma_chan(struct uart_port *port,
--					     enum dma_transfer_direction dir,
--					     unsigned int id)
-+					     enum dma_transfer_direction dir)
- {
--	dma_cap_mask_t mask;
- 	struct dma_chan *chan;
- 	struct dma_slave_config cfg;
- 	int ret;
- 
--	dma_cap_zero(mask);
--	dma_cap_set(DMA_SLAVE, mask);
--
--	chan = dma_request_slave_channel_compat(mask, shdma_chan_filter,
--					(void *)(unsigned long)id, port->dev,
--					dir == DMA_MEM_TO_DEV ? "tx" : "rx");
-+	chan = dma_request_slave_channel(port->dev,
-+					 dir == DMA_MEM_TO_DEV ? "tx" : "rx");
- 	if (!chan) {
- 		dev_warn(port->dev,
- 			 "dma_request_slave_channel_compat failed\n");
-@@ -1438,12 +1432,11 @@ static void sci_request_dma(struct uart_
- 
- 	dev_dbg(port->dev, "%s: port %d\n", __func__, port->line);
- 
--	if (!port->dev->of_node &&
--	    (s->cfg->dma_slave_tx <= 0 || s->cfg->dma_slave_rx <= 0))
-+	if (!port->dev->of_node)
- 		return;
- 
- 	s->cookie_tx = -EINVAL;
--	chan = sci_request_dma_chan(port, DMA_MEM_TO_DEV, s->cfg->dma_slave_tx);
-+	chan = sci_request_dma_chan(port, DMA_MEM_TO_DEV);
- 	dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan);
- 	if (chan) {
- 		s->chan_tx = chan;
-@@ -1465,7 +1458,7 @@ static void sci_request_dma(struct uart_
- 		INIT_WORK(&s->work_tx, work_fn_tx);
- 	}
- 
--	chan = sci_request_dma_chan(port, DMA_DEV_TO_MEM, s->cfg->dma_slave_rx);
-+	chan = sci_request_dma_chan(port, DMA_DEV_TO_MEM);
- 	dev_dbg(port->dev, "%s: RX: got channel %p\n", __func__, chan);
- 	if (chan) {
- 		unsigned int i;
-@@ -2726,10 +2719,6 @@ static int sci_init_single(struct platfo
- 	port->serial_in		= sci_serial_in;
- 	port->serial_out	= sci_serial_out;
- 
--	if (p->dma_slave_tx > 0 && p->dma_slave_rx > 0)
--		dev_dbg(port->dev, "DMA tx %d, rx %d\n",
--			p->dma_slave_tx, p->dma_slave_rx);
--
- 	return 0;
- }
- 
---- a/include/linux/serial_sci.h
-+++ b/include/linux/serial_sci.h
-@@ -71,9 +71,6 @@ struct plat_sci_port {
- 	unsigned char	regtype;
- 
- 	struct plat_sci_port_ops	*ops;
--
--	unsigned int	dma_slave_tx;
--	unsigned int	dma_slave_rx;
- };
- 
- #endif /* __LINUX_SERIAL_SCI_H */
diff --git a/patches.renesas/0178-usb-xhci-Add-helper-function-xhci_set_power_on.patch b/patches.renesas/0178-usb-xhci-Add-helper-function-xhci_set_power_on.patch
deleted file mode 100644
index 1cc2348ac31694..00000000000000
--- a/patches.renesas/0178-usb-xhci-Add-helper-function-xhci_set_power_on.patch
+++ /dev/null
@@ -1,109 +0,0 @@
-From 2f52c448c1b08f807620823deb0a096a26b754d0 Mon Sep 17 00:00:00 2001
-From: Guoqing Zhang <guoqing.zhang@intel.com>
-Date: Fri, 7 Apr 2017 17:56:51 +0300
-Subject: [PATCH 178/286] usb: xhci: Add helper function xhci_set_power_on().
-
-Refactoring port power on/off related code into
-a helper function xhci_set_power_on() which can
-be reused when enabling test mode.
-
-[set port state to neutral before writing port power -Mathias]
-Signed-off-by: Guoqing Zhang <guoqing.zhang@intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
-(cherry picked from commit a6ff6cbf1fabe7500d8ac25e133e3346db0a0fca)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-hub.c |   66 ++++++++++++++++++++++++++++++--------------
- 1 file changed, 45 insertions(+), 21 deletions(-)
-
---- a/drivers/usb/host/xhci-hub.c
-+++ b/drivers/usb/host/xhci-hub.c
-@@ -561,6 +561,49 @@ static int xhci_get_ports(struct usb_hcd
- 	return max_ports;
- }
- 
-+static __le32 __iomem *xhci_get_port_io_addr(struct usb_hcd *hcd, int index)
-+{
-+	__le32 __iomem **port_array;
-+
-+	xhci_get_ports(hcd, &port_array);
-+	return port_array[index];
-+}
-+
-+/*
-+ * xhci_set_port_power() must be called with xhci->lock held.
-+ * It will release and re-aquire the lock while calling ACPI
-+ * method.
-+ */
-+static void xhci_set_port_power(struct xhci_hcd *xhci, struct usb_hcd *hcd,
-+				u16 index, bool on)
-+{
-+	__le32 __iomem *addr;
-+	u32 temp;
-+	unsigned long flags = 0;
-+
-+	addr = xhci_get_port_io_addr(hcd, index);
-+	temp = readl(addr);
-+	temp = xhci_port_state_to_neutral(temp);
-+	if (on) {
-+		/* Power on */
-+		writel(temp | PORT_POWER, addr);
-+		temp = readl(addr);
-+		xhci_dbg(xhci, "set port power, actual port %d status  = 0x%x\n",
-+						index, temp);
-+	} else {
-+		/* Power off */
-+		writel(temp & ~PORT_POWER, addr);
-+	}
-+
-+	spin_unlock_irqrestore(&xhci->lock, flags);
-+	temp = usb_acpi_power_manageable(hcd->self.root_hub,
-+					index);
-+	if (temp)
-+		usb_acpi_set_power_state(hcd->self.root_hub,
-+			index, on);
-+	spin_lock_irqsave(&xhci->lock, flags);
-+}
-+
- void xhci_set_link_state(struct xhci_hcd *xhci, __le32 __iomem **port_array,
- 				int port_id, u32 link_state)
- {
-@@ -1116,18 +1159,7 @@ int xhci_hub_control(struct usb_hcd *hcd
- 			 * However, hub_wq will ignore the roothub events until
- 			 * the roothub is registered.
- 			 */
--			writel(temp | PORT_POWER, port_array[wIndex]);
--
--			temp = readl(port_array[wIndex]);
--			xhci_dbg(xhci, "set port power, actual port %d status  = 0x%x\n", wIndex, temp);
--
--			spin_unlock_irqrestore(&xhci->lock, flags);
--			temp = usb_acpi_power_manageable(hcd->self.root_hub,
--					wIndex);
--			if (temp)
--				usb_acpi_set_power_state(hcd->self.root_hub,
--						wIndex, true);
--			spin_lock_irqsave(&xhci->lock, flags);
-+			xhci_set_port_power(xhci, hcd, wIndex, true);
- 			break;
- 		case USB_PORT_FEAT_RESET:
- 			temp = (temp | PORT_RESET);
-@@ -1231,15 +1263,7 @@ int xhci_hub_control(struct usb_hcd *hcd
- 					port_array[wIndex], temp);
- 			break;
- 		case USB_PORT_FEAT_POWER:
--			writel(temp & ~PORT_POWER, port_array[wIndex]);
--
--			spin_unlock_irqrestore(&xhci->lock, flags);
--			temp = usb_acpi_power_manageable(hcd->self.root_hub,
--					wIndex);
--			if (temp)
--				usb_acpi_set_power_state(hcd->self.root_hub,
--						wIndex, false);
--			spin_lock_irqsave(&xhci->lock, flags);
-+			xhci_set_port_power(xhci, hcd, wIndex, false);
- 			break;
- 		default:
- 			goto error;
diff --git a/patches.renesas/0179-Input-touchscreen-drop-unnecessary-calls-to-device_i.patch b/patches.renesas/0179-Input-touchscreen-drop-unnecessary-calls-to-device_i.patch
deleted file mode 100644
index 88c39c484d5044..00000000000000
--- a/patches.renesas/0179-Input-touchscreen-drop-unnecessary-calls-to-device_i.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 9f9344aee5ea067658de721eac5be380e4e1e527 Mon Sep 17 00:00:00 2001
-From: Guenter Roeck <linux@roeck-us.net>
-Date: Sat, 21 Jan 2017 23:49:13 -0800
-Subject: [PATCH 179/255] Input: touchscreen - drop unnecessary calls to
- device_init_wakeup
-
-Calling device_init_wakeup in the remove function is unnecessary since the
-device is going away, and thus won't be able to cause any wakeups under any
-circumstances. Besides, the driver cleanup code already handles the
-necessary cleanup.
-
-Similarly, disabling wakeup in the probe error path is unnecessary, as is
-disabling wakeup in the probe function in the first place.
-
-Signed-off-by: Guenter Roeck <linux@roeck-us.net>
-Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
-(cherry picked from commit 8e1b4d83cf8b0e62f5a45792d07f027783c1a07c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/input/touchscreen/ads7846.c    |    2 --
- drivers/input/touchscreen/bu21013_ts.c |    2 --
- drivers/input/touchscreen/eeti_ts.c    |    1 -
- drivers/input/touchscreen/lpc32xx_ts.c |    1 -
- drivers/input/touchscreen/st1232.c     |    1 -
- 5 files changed, 7 deletions(-)
-
---- a/drivers/input/touchscreen/ads7846.c
-+++ b/drivers/input/touchscreen/ads7846.c
-@@ -1462,8 +1462,6 @@ static int ads7846_remove(struct spi_dev
- {
- 	struct ads7846 *ts = spi_get_drvdata(spi);
- 
--	device_init_wakeup(&spi->dev, false);
--
- 	sysfs_remove_group(&spi->dev.kobj, &ads784x_attr_group);
- 
- 	ads7846_disable(ts);
---- a/drivers/input/touchscreen/bu21013_ts.c
-+++ b/drivers/input/touchscreen/bu21013_ts.c
-@@ -637,8 +637,6 @@ static int bu21013_remove(struct i2c_cli
- 
- 	kfree(bu21013_data);
- 
--	device_init_wakeup(&client->dev, false);
--
- 	return 0;
- }
- 
---- a/drivers/input/touchscreen/eeti_ts.c
-+++ b/drivers/input/touchscreen/eeti_ts.c
-@@ -232,7 +232,6 @@ static int eeti_ts_probe(struct i2c_clie
- 	 */
- 	eeti_ts_stop(priv);
- 
--	device_init_wakeup(&client->dev, 0);
- 	return 0;
- 
- err3:
---- a/drivers/input/touchscreen/lpc32xx_ts.c
-+++ b/drivers/input/touchscreen/lpc32xx_ts.c
-@@ -313,7 +313,6 @@ static int lpc32xx_ts_remove(struct plat
- 	struct lpc32xx_tsc *tsc = platform_get_drvdata(pdev);
- 	struct resource *res;
- 
--	device_init_wakeup(&pdev->dev, 0);
- 	free_irq(tsc->irq, tsc);
- 
- 	input_unregister_device(tsc->dev);
---- a/drivers/input/touchscreen/st1232.c
-+++ b/drivers/input/touchscreen/st1232.c
-@@ -237,7 +237,6 @@ static int st1232_ts_remove(struct i2c_c
- {
- 	struct st1232_ts_data *ts = i2c_get_clientdata(client);
- 
--	device_init_wakeup(&client->dev, 0);
- 	st1232_ts_power(ts, false);
- 
- 	return 0;
diff --git a/patches.renesas/0179-clk-renesas-r8a7778-Obtain-mode-pin-values-using-R-C.patch b/patches.renesas/0179-clk-renesas-r8a7778-Obtain-mode-pin-values-using-R-C.patch
deleted file mode 100644
index 648decc0c9a6bf..00000000000000
--- a/patches.renesas/0179-clk-renesas-r8a7778-Obtain-mode-pin-values-using-R-C.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 446bb1a8245bf113400ab05f3194a196fa1c44a0 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 1 Jun 2016 14:46:01 +0200
-Subject: [PATCH 179/299] clk: renesas: r8a7778: Obtain mode pin values using
- R-Car RST driver
-
-Obtain the values of the mode pins from the R-Car RST driver, which
-relies on the presence in DT of a device node for the RESET/WDT module.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-(cherry picked from commit 578d601cbc514b92bc9ed71fd4fb700180275211)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/clk-r8a7778.c |   13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/drivers/clk/renesas/clk-r8a7778.c
-+++ b/drivers/clk/renesas/clk-r8a7778.c
-@@ -12,6 +12,7 @@
- #include <linux/clk/renesas.h>
- #include <linux/of_address.h>
- #include <linux/slab.h>
-+#include <linux/soc/renesas/rcar-rst.h>
- 
- struct r8a7778_cpg {
- 	struct clk_onecell_data data;
-@@ -83,6 +84,18 @@ static void __init r8a7778_cpg_clocks_in
- 	struct clk **clks;
- 	unsigned int i;
- 	int num_clks;
-+	u32 mode;
-+
-+	if (rcar_rst_read_mode_pins(&mode))
-+		return;
-+
-+	BUG_ON(!(mode & BIT(19)));
-+
-+	cpg_mode_rates = (!!(mode & BIT(18)) << 2) |
-+			 (!!(mode & BIT(12)) << 1) |
-+			 (!!(mode & BIT(11)));
-+	cpg_mode_divs = (!!(mode & BIT(2)) << 1) |
-+			(!!(mode & BIT(1)));
- 
- 	num_clks = of_property_count_strings(np, "clock-output-names");
- 	if (num_clks < 0) {
diff --git a/patches.renesas/0179-usb-xhci-Add-helper-function-xhci_disable_slot.patch b/patches.renesas/0179-usb-xhci-Add-helper-function-xhci_disable_slot.patch
deleted file mode 100644
index bb7fbf51813469..00000000000000
--- a/patches.renesas/0179-usb-xhci-Add-helper-function-xhci_disable_slot.patch
+++ /dev/null
@@ -1,119 +0,0 @@
-From 77e05bb8ebc2487f8bd850acb5e383265364ca95 Mon Sep 17 00:00:00 2001
-From: Guoqing Zhang <guoqing.zhang@intel.com>
-Date: Fri, 7 Apr 2017 17:56:52 +0300
-Subject: [PATCH 179/286] usb: xhci: Add helper function xhci_disable_slot().
-
-Refactoring slot disable related code into a helper
-function xhci_disable_slot() which can be used when
-enabling test mode.
-
-Signed-off-by: Guoqing Zhang <guoqing.zhang@intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit f9e609b82479ef48469d42b022b0951abc00dcd1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci.c |   49 ++++++++++++++++++++++++++++++------------------
- drivers/usb/host/xhci.h |    2 +
- 2 files changed, 33 insertions(+), 18 deletions(-)
-
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -3603,8 +3603,6 @@ void xhci_free_dev(struct usb_hcd *hcd,
- {
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
- 	struct xhci_virt_device *virt_dev;
--	unsigned long flags;
--	u32 state;
- 	int i, ret;
- 	struct xhci_command *command;
- 
-@@ -3639,30 +3637,50 @@ void xhci_free_dev(struct usb_hcd *hcd,
- 		del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
- 	}
- 
-+	xhci_disable_slot(xhci, command, udev->slot_id);
-+	/*
-+	 * Event command completion handler will free any data structures
-+	 * associated with the slot.  XXX Can free sleep?
-+	 */
-+}
-+
-+int xhci_disable_slot(struct xhci_hcd *xhci, struct xhci_command *command,
-+			u32 slot_id)
-+{
-+	unsigned long flags;
-+	u32 state;
-+	int ret = 0;
-+	struct xhci_virt_device *virt_dev;
-+
-+	virt_dev = xhci->devs[slot_id];
-+	if (!virt_dev)
-+		return -EINVAL;
-+	if (!command)
-+		command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
-+	if (!command)
-+		return -ENOMEM;
-+
- 	spin_lock_irqsave(&xhci->lock, flags);
- 	/* Don't disable the slot if the host controller is dead. */
- 	state = readl(&xhci->op_regs->status);
- 	if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
- 			(xhci->xhc_state & XHCI_STATE_HALTED)) {
--		xhci_free_virt_device(xhci, udev->slot_id);
-+		xhci_free_virt_device(xhci, slot_id);
- 		spin_unlock_irqrestore(&xhci->lock, flags);
- 		kfree(command);
--		return;
-+		return ret;
- 	}
- 
--	if (xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
--				    udev->slot_id)) {
-+	ret = xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
-+				slot_id);
-+	if (ret) {
- 		spin_unlock_irqrestore(&xhci->lock, flags);
- 		xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
--		return;
-+		return ret;
- 	}
- 	xhci_ring_cmd_db(xhci);
- 	spin_unlock_irqrestore(&xhci->lock, flags);
--
--	/*
--	 * Event command completion handler will free any data structures
--	 * associated with the slot.  XXX Can free sleep?
--	 */
-+	return ret;
- }
- 
- /*
-@@ -3769,15 +3787,10 @@ int xhci_alloc_dev(struct usb_hcd *hcd,
- 
- disable_slot:
- 	/* Disable slot, if we can do it without mem alloc */
--	spin_lock_irqsave(&xhci->lock, flags);
- 	kfree(command->completion);
- 	command->completion = NULL;
- 	command->status = 0;
--	if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
--				     udev->slot_id))
--		xhci_ring_cmd_db(xhci);
--	spin_unlock_irqrestore(&xhci->lock, flags);
--	return 0;
-+	return xhci_disable_slot(xhci, command, udev->slot_id);
- }
- 
- /*
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -2025,6 +2025,8 @@ void xhci_shutdown(struct usb_hcd *hcd);
- int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks);
- void xhci_init_driver(struct hc_driver *drv,
- 		      const struct xhci_driver_overrides *over);
-+int xhci_disable_slot(struct xhci_hcd *xhci,
-+			struct xhci_command *command, u32 slot_id);
- 
- #ifdef	CONFIG_PM
- int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup);
diff --git a/patches.renesas/0180-clk-renesas-r8a7779-Obtain-mode-pin-values-from-R-Ca.patch b/patches.renesas/0180-clk-renesas-r8a7779-Obtain-mode-pin-values-from-R-Ca.patch
deleted file mode 100644
index bf386b50b854c6..00000000000000
--- a/patches.renesas/0180-clk-renesas-r8a7779-Obtain-mode-pin-values-from-R-Ca.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 4a1792929a210e3f17bf4935e751240286f2dbc0 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 1 Jun 2016 14:49:41 +0200
-Subject: [PATCH 180/299] clk: renesas: r8a7779: Obtain mode pin values from
- R-Car RST driver
-
-Obtain the values of the mode pins from the R-Car RST driver, which
-relies on the presence in DT of a device node for the RESET/WDT module.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-(cherry picked from commit 931db8a0c646e23f0c5a3e2175742997d7e60ff5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/clk-r8a7779.c |    9 +++++++--
- 1 file changed, 7 insertions(+), 2 deletions(-)
-
---- a/drivers/clk/renesas/clk-r8a7779.c
-+++ b/drivers/clk/renesas/clk-r8a7779.c
-@@ -18,6 +18,7 @@
- #include <linux/of_address.h>
- #include <linux/slab.h>
- #include <linux/spinlock.h>
-+#include <linux/soc/renesas/rcar-rst.h>
- 
- #include <dt-bindings/clock/r8a7779-clock.h>
- 
-@@ -127,6 +128,10 @@ static void __init r8a7779_cpg_clocks_in
- 	struct clk **clks;
- 	unsigned int i, plla_mult;
- 	int num_clks;
-+	u32 mode;
-+
-+	if (rcar_rst_read_mode_pins(&mode))
-+		return;
- 
- 	num_clks = of_property_count_strings(np, "clock-output-names");
- 	if (num_clks < 0) {
-@@ -148,8 +153,8 @@ static void __init r8a7779_cpg_clocks_in
- 	cpg->data.clks = clks;
- 	cpg->data.clk_num = num_clks;
- 
--	config = &cpg_clk_configs[CPG_CLK_CONFIG_INDEX(cpg_mode)];
--	plla_mult = cpg_plla_mult[CPG_PLLA_MULT_INDEX(cpg_mode)];
-+	config = &cpg_clk_configs[CPG_CLK_CONFIG_INDEX(mode)];
-+	plla_mult = cpg_plla_mult[CPG_PLLA_MULT_INDEX(mode)];
- 
- 	for (i = 0; i < num_clks; ++i) {
- 		const char *name;
diff --git a/patches.renesas/0180-usb-renesas_usbhs-mod_host-fix-typo-connecte-connect.patch b/patches.renesas/0180-usb-renesas_usbhs-mod_host-fix-typo-connecte-connect.patch
deleted file mode 100644
index 6df8136f22e4f1..00000000000000
--- a/patches.renesas/0180-usb-renesas_usbhs-mod_host-fix-typo-connecte-connect.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From c39b17ffe5ced4b91822432703b1805bfb2c0c2b Mon Sep 17 00:00:00 2001
-From: Colin Ian King <colin.king@canonical.com>
-Date: Wed, 28 Dec 2016 16:52:41 +0000
-Subject: [PATCH 180/255] usb: renesas_usbhs: mod_host: fix typo: "connecte" ->
- "connected"
-
-trivial fix to typo in dev_dbg message
-
-Signed-off-by: Colin Ian King <colin.king@canonical.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-(cherry picked from commit ff86110e26c53634fc6c413732f68a6489ea40b2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/renesas_usbhs/mod_host.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/usb/renesas_usbhs/mod_host.c
-+++ b/drivers/usb/renesas_usbhs/mod_host.c
-@@ -577,7 +577,7 @@ static struct usbhsh_device *usbhsh_devi
- 		upphub	= usbhsh_device_number(hpriv, parent);
- 		hubport	= usbhsh_device_hubport(udev);
- 
--		dev_dbg(dev, "%s connecte to Hub [%d:%d](%p)\n", __func__,
-+		dev_dbg(dev, "%s connected to Hub [%d:%d](%p)\n", __func__,
- 			upphub, hubport, parent);
- 	}
- 
diff --git a/patches.renesas/0180-usb-xhci-Expose-xhci_start-function.patch b/patches.renesas/0180-usb-xhci-Expose-xhci_start-function.patch
deleted file mode 100644
index 5a1fe5c6ca976e..00000000000000
--- a/patches.renesas/0180-usb-xhci-Expose-xhci_start-function.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 407c4183a2e2e2c535b18f5630a2f573aa9e4a7c Mon Sep 17 00:00:00 2001
-From: Guoqing Zhang <guoqing.zhang@intel.com>
-Date: Fri, 7 Apr 2017 17:56:53 +0300
-Subject: [PATCH 180/286] usb: xhci: Expose xhci_start() function.
-
-Change the visability of xhci_start() so that it
-can be used when enabling test mode.
-
-Signed-off-by: Guoqing Zhang <guoqing.zhang@intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 26bba5c767de6724f330cdc2ad28bb783674f5a0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci.c |    2 +-
- drivers/usb/host/xhci.h |    1 +
- 2 files changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -125,7 +125,7 @@ int xhci_halt(struct xhci_hcd *xhci)
- /*
-  * Set the run bit and wait for the host to be running.
-  */
--static int xhci_start(struct xhci_hcd *xhci)
-+int xhci_start(struct xhci_hcd *xhci)
- {
- 	u32 temp;
- 	int ret;
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -2017,6 +2017,7 @@ typedef void (*xhci_get_quirks_t)(struct
- int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, int usec);
- void xhci_quiesce(struct xhci_hcd *xhci);
- int xhci_halt(struct xhci_hcd *xhci);
-+int xhci_start(struct xhci_hcd *xhci);
- int xhci_reset(struct xhci_hcd *xhci);
- int xhci_init(struct usb_hcd *hcd);
- int xhci_run(struct usb_hcd *hcd);
diff --git a/patches.renesas/0181-clk-renesas-rcar-gen2-Obtain-mode-pin-values-using-R.patch b/patches.renesas/0181-clk-renesas-rcar-gen2-Obtain-mode-pin-values-using-R.patch
deleted file mode 100644
index c7ae9675bb1b19..00000000000000
--- a/patches.renesas/0181-clk-renesas-rcar-gen2-Obtain-mode-pin-values-using-R.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 512b2778e9d7c63e74c17073b11a1beb905e0a8f Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 7 Jul 2015 14:57:37 +0200
-Subject: [PATCH 181/299] clk: renesas: rcar-gen2: Obtain mode pin values using
- RST driver
-
-Obtain the values of the mode pins from the R-Car RST driver, which
-relies on the presence in DT of a device node for the RST module.
-
-Fall back to our own private copy of rcar_gen2_read_mode_pins() for
-backward-compatibility with old DTs.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-(cherry picked from commit f84c9c3ca9770bd847cb361d67bd385499a20d37)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/clk-rcar-gen2.c |   25 +++++++++++++++++++++++++
- 1 file changed, 25 insertions(+)
-
---- a/drivers/clk/renesas/clk-rcar-gen2.c
-+++ b/drivers/clk/renesas/clk-rcar-gen2.c
-@@ -19,6 +19,7 @@
- #include <linux/of_address.h>
- #include <linux/slab.h>
- #include <linux/spinlock.h>
-+#include <linux/soc/renesas/rcar-rst.h>
- 
- struct rcar_gen2_cpg {
- 	struct clk_onecell_data data;
-@@ -379,6 +380,23 @@ rcar_gen2_cpg_register_clock(struct devi
- 						 4, 0, table, &cpg->lock);
- }
- 
-+/*
-+ * Reset register definitions.
-+ */
-+#define MODEMR	0xe6160060
-+
-+static u32 __init rcar_gen2_read_mode_pins(void)
-+{
-+	void __iomem *modemr = ioremap_nocache(MODEMR, 4);
-+	u32 mode;
-+
-+	BUG_ON(!modemr);
-+	mode = ioread32(modemr);
-+	iounmap(modemr);
-+
-+	return mode;
-+}
-+
- static void __init rcar_gen2_cpg_clocks_init(struct device_node *np)
- {
- 	const struct cpg_pll_config *config;
-@@ -387,6 +405,13 @@ static void __init rcar_gen2_cpg_clocks_
- 	unsigned int i;
- 	int num_clks;
- 
-+	if (rcar_rst_read_mode_pins(&cpg_mode)) {
-+		/* Backward-compatibility with old DT */
-+		pr_warn("%s: failed to obtain mode pins from RST\n",
-+			np->full_name);
-+		cpg_mode = rcar_gen2_read_mode_pins();
-+	}
-+
- 	num_clks = of_property_count_strings(np, "clock-output-names");
- 	if (num_clks < 0) {
- 		pr_err("%s: failed to count clocks\n", __func__);
diff --git a/patches.renesas/0181-usb-renesas_usbhs-Replace-the-deprecated-extcon-API.patch b/patches.renesas/0181-usb-renesas_usbhs-Replace-the-deprecated-extcon-API.patch
deleted file mode 100644
index 175fb2d02cfd4f..00000000000000
--- a/patches.renesas/0181-usb-renesas_usbhs-Replace-the-deprecated-extcon-API.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 5be741c4435d1e87f76b4cff63cc60a67aed6b5f Mon Sep 17 00:00:00 2001
-From: Chanwoo Choi <cw00.choi@samsung.com>
-Date: Mon, 16 Jan 2017 21:37:02 +0900
-Subject: [PATCH 181/255] usb: renesas_usbhs: Replace the deprecated extcon API
-
-This patch replaces the deprecated extcon API as following:
-- extcon_get_cable_state_() -> extcon_get_state()
-
-Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
-Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-(cherry picked from commit ea07b8cf08f71fe5fb49c02b4a29b92a6b357218)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/renesas_usbhs/common.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/usb/renesas_usbhs/common.c
-+++ b/drivers/usb/renesas_usbhs/common.c
-@@ -389,7 +389,7 @@ static void usbhsc_hotplug(struct usbhs_
- 
- 	if (enable && !mod) {
- 		if (priv->edev) {
--			cable = extcon_get_cable_state_(priv->edev, EXTCON_USB_HOST);
-+			cable = extcon_get_state(priv->edev, EXTCON_USB_HOST);
- 			if ((cable > 0 && id != USBHS_HOST) ||
- 			    (!cable && id != USBHS_GADGET)) {
- 				dev_info(&pdev->dev,
diff --git a/patches.renesas/0181-usb-xhci-Add-port-test-modes-support-for-usb2.patch b/patches.renesas/0181-usb-xhci-Add-port-test-modes-support-for-usb2.patch
deleted file mode 100644
index 5087f8826e35be..00000000000000
--- a/patches.renesas/0181-usb-xhci-Add-port-test-modes-support-for-usb2.patch
+++ /dev/null
@@ -1,173 +0,0 @@
-From 3021ef9ba9976ecfde9527caace0ee50534191d2 Mon Sep 17 00:00:00 2001
-From: Guoqing Zhang <guoqing.zhang@intel.com>
-Date: Fri, 7 Apr 2017 17:56:54 +0300
-Subject: [PATCH 181/286] usb: xhci: Add port test modes support for usb2.
-
-For usb2 ports, the port test mode Test_J_State, Test_K_State,
-Test_Packet, Test_SE0_NAK and Test_Force_En can be enabled
-as described in usb2 spec.
-
-USB2 test mode is a required hardware feature for system integrators
-validating their hardware according to USB spec, regarding signal
-strength and stuff. It is purely a hardware test feature.
-
-Usually you need an oscilloscope and have to enable those test modes on
-the hardware. This will send some specific test patterns on D+/D-. There
-is no report available (in Linux itself) as it is purely externally
-visible. Regular USB usage is not possible at that time.
-Anyone (well access to e.g. /dev/bus/usb/001/001 provided) can use it by
-sending appropriate USB_PORT_FEAT_TEST requests to the hub.
-
-[Add better commit message by Alexander Stein  -Mathias]
-Signed-off-by: Guoqing Zhang <guoqing.zhang@intel.com>
-Cc: Alexander Stein <alexander.stein@systec-electronic.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
-(cherry picked from commit 0f1d832ed1fb9527a4cc5fcb8511e85fd0a85185)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-hub.c |   85 ++++++++++++++++++++++++++++++++++++++++++++
- drivers/usb/host/xhci.h     |    2 +
- 2 files changed, 87 insertions(+)
-
---- a/drivers/usb/host/xhci-hub.c
-+++ b/drivers/usb/host/xhci-hub.c
-@@ -604,6 +604,77 @@ static void xhci_set_port_power(struct x
- 	spin_lock_irqsave(&xhci->lock, flags);
- }
- 
-+static void xhci_port_set_test_mode(struct xhci_hcd *xhci,
-+	u16 test_mode, u16 wIndex)
-+{
-+	u32 temp;
-+	__le32 __iomem *addr;
-+
-+	/* xhci only supports test mode for usb2 ports, i.e. xhci->main_hcd */
-+	addr = xhci_get_port_io_addr(xhci->main_hcd, wIndex);
-+	temp = readl(addr + PORTPMSC);
-+	temp |= test_mode << PORT_TEST_MODE_SHIFT;
-+	writel(temp, addr + PORTPMSC);
-+	xhci->test_mode = test_mode;
-+	if (test_mode == TEST_FORCE_EN)
-+		xhci_start(xhci);
-+}
-+
-+static int xhci_enter_test_mode(struct xhci_hcd *xhci,
-+				u16 test_mode, u16 wIndex)
-+{
-+	int i, retval;
-+
-+	/* Disable all Device Slots */
-+	xhci_dbg(xhci, "Disable all slots\n");
-+	for (i = 1; i <= HCS_MAX_SLOTS(xhci->hcs_params1); i++) {
-+		retval = xhci_disable_slot(xhci, NULL, i);
-+		if (retval)
-+			xhci_err(xhci, "Failed to disable slot %d, %d. Enter test mode anyway\n",
-+				 i, retval);
-+	}
-+	/* Put all ports to the Disable state by clear PP */
-+	xhci_dbg(xhci, "Disable all port (PP = 0)\n");
-+	/* Power off USB3 ports*/
-+	for (i = 0; i < xhci->num_usb3_ports; i++)
-+		xhci_set_port_power(xhci, xhci->shared_hcd, i, false);
-+	/* Power off USB2 ports*/
-+	for (i = 0; i < xhci->num_usb2_ports; i++)
-+		xhci_set_port_power(xhci, xhci->main_hcd, i, false);
-+	/* Stop the controller */
-+	xhci_dbg(xhci, "Stop controller\n");
-+	retval = xhci_halt(xhci);
-+	if (retval)
-+		return retval;
-+	/* Disable runtime PM for test mode */
-+	pm_runtime_forbid(xhci_to_hcd(xhci)->self.controller);
-+	/* Set PORTPMSC.PTC field to enter selected test mode */
-+	/* Port is selected by wIndex. port_id = wIndex + 1 */
-+	xhci_dbg(xhci, "Enter Test Mode: %d, Port_id=%d\n",
-+					test_mode, wIndex + 1);
-+	xhci_port_set_test_mode(xhci, test_mode, wIndex);
-+	return retval;
-+}
-+
-+static int xhci_exit_test_mode(struct xhci_hcd *xhci)
-+{
-+	int retval;
-+
-+	if (!xhci->test_mode) {
-+		xhci_err(xhci, "Not in test mode, do nothing.\n");
-+		return 0;
-+	}
-+	if (xhci->test_mode == TEST_FORCE_EN &&
-+		!(xhci->xhc_state & XHCI_STATE_HALTED)) {
-+		retval = xhci_halt(xhci);
-+		if (retval)
-+			return retval;
-+	}
-+	pm_runtime_allow(xhci_to_hcd(xhci)->self.controller);
-+	xhci->test_mode = 0;
-+	return xhci_reset(xhci);
-+}
-+
- void xhci_set_link_state(struct xhci_hcd *xhci, __le32 __iomem **port_array,
- 				int port_id, u32 link_state)
- {
-@@ -962,6 +1033,7 @@ int xhci_hub_control(struct usb_hcd *hcd
- 	u16 link_state = 0;
- 	u16 wake_mask = 0;
- 	u16 timeout = 0;
-+	u16 test_mode = 0;
- 
- 	max_ports = xhci_get_ports(hcd, &port_array);
- 	bus_state = &xhci->bus_state[hcd_index(hcd)];
-@@ -1035,6 +1107,8 @@ int xhci_hub_control(struct usb_hcd *hcd
- 			link_state = (wIndex & 0xff00) >> 3;
- 		if (wValue == USB_PORT_FEAT_REMOTE_WAKE_MASK)
- 			wake_mask = wIndex & 0xff00;
-+		if (wValue == USB_PORT_FEAT_TEST)
-+			test_mode = (wIndex & 0xff00) >> 8;
- 		/* The MSB of wIndex is the U1/U2 timeout */
- 		timeout = (wIndex & 0xff00) >> 8;
- 		wIndex &= 0xff;
-@@ -1198,6 +1272,14 @@ int xhci_hub_control(struct usb_hcd *hcd
- 			temp |= PORT_U2_TIMEOUT(timeout);
- 			writel(temp, port_array[wIndex] + PORTPMSC);
- 			break;
-+		case USB_PORT_FEAT_TEST:
-+			/* 4.19.6 Port Test Modes (USB2 Test Mode) */
-+			if (hcd->speed != HCD_USB2)
-+				goto error;
-+			if (test_mode > TEST_FORCE_EN || test_mode < TEST_J)
-+				goto error;
-+			retval = xhci_enter_test_mode(xhci, test_mode, wIndex);
-+			break;
- 		default:
- 			goto error;
- 		}
-@@ -1265,6 +1347,9 @@ int xhci_hub_control(struct usb_hcd *hcd
- 		case USB_PORT_FEAT_POWER:
- 			xhci_set_port_power(xhci, hcd, wIndex, false);
- 			break;
-+		case USB_PORT_FEAT_TEST:
-+			retval = xhci_exit_test_mode(xhci);
-+			break;
- 		default:
- 			goto error;
- 		}
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -429,6 +429,7 @@ struct xhci_op_regs {
- #define	PORT_L1DS_MASK		(0xff << 8)
- #define	PORT_L1DS(p)		(((p) & 0xff) << 8)
- #define	PORT_HLE		(1 << 16)
-+#define PORT_TEST_MODE_SHIFT	28
- 
- /* USB3 Protocol PORTLI  Port Link Information */
- #define PORT_RX_LANES(p)	(((p) >> 16) & 0xf)
-@@ -1850,6 +1851,7 @@ struct xhci_hcd {
- 	/* Compliance Mode Recovery Data */
- 	struct timer_list	comp_mode_recovery_timer;
- 	u32			port_status_u0;
-+	u16			test_mode;
- /* Compliance Mode Timer Triggered every 2 seconds */
- #define COMP_MODE_RCVRY_MSECS 2000
- 
diff --git a/patches.renesas/0182-clk-renesas-r8a7795-Obtain-mode-pin-values-from-R-Ca.patch b/patches.renesas/0182-clk-renesas-r8a7795-Obtain-mode-pin-values-from-R-Ca.patch
deleted file mode 100644
index e94df25e1d80ca..00000000000000
--- a/patches.renesas/0182-clk-renesas-r8a7795-Obtain-mode-pin-values-from-R-Ca.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From a0ed88e4737b4e0c8f11accc016cc584891b48e8 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 1 Jun 2016 14:54:10 +0200
-Subject: [PATCH 182/299] clk: renesas: r8a7795: Obtain mode pin values from
- R-Car RST driver
-
-Obtain the values of the mode pins from the R-Car RST driver, which
-relies on the presence in DT of a device node for the RST module.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-(cherry picked from commit 969921e0d2b5a582aa6a28cb2208273a2d5679d6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7795-cpg-mssr.c |    8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
---- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
-@@ -15,6 +15,7 @@
- #include <linux/device.h>
- #include <linux/init.h>
- #include <linux/kernel.h>
-+#include <linux/soc/renesas/rcar-rst.h>
- 
- #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
- 
-@@ -311,7 +312,12 @@ static const struct rcar_gen3_cpg_pll_co
- static int __init r8a7795_cpg_mssr_init(struct device *dev)
- {
- 	const struct rcar_gen3_cpg_pll_config *cpg_pll_config;
--	u32 cpg_mode = rcar_gen3_read_mode_pins();
-+	u32 cpg_mode;
-+	int error;
-+
-+	error = rcar_rst_read_mode_pins(&cpg_mode);
-+	if (error)
-+		return error;
- 
- 	cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
- 	if (!cpg_pll_config->extal_div) {
diff --git a/patches.renesas/0182-usb-host-xhci-extract-xhci_slot_state_string.patch b/patches.renesas/0182-usb-host-xhci-extract-xhci_slot_state_string.patch
deleted file mode 100644
index b73d2644895be5..00000000000000
--- a/patches.renesas/0182-usb-host-xhci-extract-xhci_slot_state_string.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From d6bf529c90df506b55c22350b59230489e2e47f1 Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:56:56 +0300
-Subject: [PATCH 182/286] usb: host: xhci: extract xhci_slot_state_string()
-
-By extracting and exposing xhci_slot_state_string() in a header file, we
-can re-use it to print Slot Context State from our tracepoints, which
-can aid in tracking down problems related to command execution.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 52407729fbeabb654d38c0c99661a41a481092d1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-dbg.c |   14 ++------------
- drivers/usb/host/xhci.h     |   16 ++++++++++++++++
- 2 files changed, 18 insertions(+), 12 deletions(-)
-
---- a/drivers/usb/host/xhci-dbg.c
-+++ b/drivers/usb/host/xhci-dbg.c
-@@ -451,19 +451,9 @@ char *xhci_get_slot_state(struct xhci_hc
- 		struct xhci_container_ctx *ctx)
- {
- 	struct xhci_slot_ctx *slot_ctx = xhci_get_slot_ctx(xhci, ctx);
-+	int state = GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state));
- 
--	switch (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state))) {
--	case SLOT_STATE_ENABLED:
--		return "enabled/disabled";
--	case SLOT_STATE_DEFAULT:
--		return "default";
--	case SLOT_STATE_ADDRESSED:
--		return "addressed";
--	case SLOT_STATE_CONFIGURED:
--		return "configured";
--	default:
--		return "reserved";
--	}
-+	return xhci_slot_state_string(state);
- }
- 
- static void xhci_dbg_slot_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx)
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -2165,6 +2165,22 @@ static inline struct xhci_ring *xhci_urb
- 					urb->stream_id);
- }
- 
-+static inline char *xhci_slot_state_string(u32 state)
-+{
-+	switch (state) {
-+	case SLOT_STATE_ENABLED:
-+		return "enabled/disabled";
-+	case SLOT_STATE_DEFAULT:
-+		return "default";
-+	case SLOT_STATE_ADDRESSED:
-+		return "addressed";
-+	case SLOT_STATE_CONFIGURED:
-+		return "configured";
-+	default:
-+		return "reserved";
-+	}
-+}
-+
- static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
- 		u32 field3)
- {
diff --git a/patches.renesas/0182-xhci-simplify-if-statement-to-make-it-more-readable.patch b/patches.renesas/0182-xhci-simplify-if-statement-to-make-it-more-readable.patch
deleted file mode 100644
index 7dcdeee6d5f82f..00000000000000
--- a/patches.renesas/0182-xhci-simplify-if-statement-to-make-it-more-readable.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 34b1ba6ee45abbfa5e20955806ba46d3cd3bd665 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:19:51 +0200
-Subject: [PATCH 182/255] xhci: simplify if statement to make it more readable
-
-No functional change, De Morgan !(A && B) = (!A || !B)
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 505f581c48bc27cd72beb42df47b3012b617ea5c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -916,7 +916,8 @@ void xhci_stop_endpoint_command_watchdog
- 	spin_lock_irqsave(&xhci->lock, flags);
- 
- 	ep->stop_cmds_pending--;
--	if (!(ep->stop_cmds_pending == 0 && (ep->ep_state & EP_HALT_PENDING))) {
-+
-+	if (ep->stop_cmds_pending || !(ep->ep_state & EP_HALT_PENDING)) {
- 		xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
- 				"Stop EP timer ran, but no command pending, "
- 				"exiting.");
diff --git a/patches.renesas/0183-clk-renesas-r8a7796-Obtain-mode-pin-values-from-R-Ca.patch b/patches.renesas/0183-clk-renesas-r8a7796-Obtain-mode-pin-values-from-R-Ca.patch
deleted file mode 100644
index 115e404cffb351..00000000000000
--- a/patches.renesas/0183-clk-renesas-r8a7796-Obtain-mode-pin-values-from-R-Ca.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 62204c330441c2c2a03803d1ee24f6ff5214093a Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 1 Jun 2016 14:54:45 +0200
-Subject: [PATCH 183/299] clk: renesas: r8a7796: Obtain mode pin values from
- R-Car RST driver
-
-Obtain the values of the mode pins from the R-Car RST driver, which
-relies on the presence in DT of a device node for the RST module.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-(cherry picked from commit 05972d48d23927e9d4932a10c8c172ccee4b1a6d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -16,6 +16,7 @@
- #include <linux/device.h>
- #include <linux/init.h>
- #include <linux/kernel.h>
-+#include <linux/soc/renesas/rcar-rst.h>
- 
- #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
- 
-@@ -235,7 +236,12 @@ static const struct rcar_gen3_cpg_pll_co
- static int __init r8a7796_cpg_mssr_init(struct device *dev)
- {
- 	const struct rcar_gen3_cpg_pll_config *cpg_pll_config;
--	u32 cpg_mode = rcar_gen3_read_mode_pins();
-+	u32 cpg_mode;
-+	int error;
-+
-+	error = rcar_rst_read_mode_pins(&cpg_mode);
-+	if (error)
-+		return error;
- 
- 	cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
- 	if (!cpg_pll_config->extal_div) {
diff --git a/patches.renesas/0183-usb-host-xhci-add-Slot-and-EP-Context-tracers.patch b/patches.renesas/0183-usb-host-xhci-add-Slot-and-EP-Context-tracers.patch
deleted file mode 100644
index b896136226b2b2..00000000000000
--- a/patches.renesas/0183-usb-host-xhci-add-Slot-and-EP-Context-tracers.patch
+++ /dev/null
@@ -1,492 +0,0 @@
-From 48ecaf14091fa21627c3837d4488d166fe588fba Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:56:57 +0300
-Subject: [PATCH 183/286] usb: host: xhci: add Slot and EP Context tracers
-
-With these, we can track what's happening with the HW while executing
-each and every command. It will give us visibility into how the
-different contexts are being modified by xHC which can bring insight
-into problems while debugging.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 19a7d0d65c4a813069f4bc4ca701d6a163c337e9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c  |   42 ++++++++++++
- drivers/usb/host/xhci-trace.h |  101 +++++++++++++++++++++++++++++
- drivers/usb/host/xhci.c       |   15 +++-
- drivers/usb/host/xhci.h       |  146 ++++++++++++++++++++++++++++++++++++++++++
- 4 files changed, 302 insertions(+), 2 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -689,6 +689,8 @@ static void xhci_handle_cmd_stop_ep(stru
- 	struct xhci_virt_ep *ep;
- 	struct xhci_td *cur_td = NULL;
- 	struct xhci_td *last_unlinked_td;
-+	struct xhci_ep_ctx *ep_ctx;
-+	struct xhci_virt_device *vdev;
- 
- 	struct xhci_dequeue_state deq_state;
- 
-@@ -702,6 +704,11 @@ static void xhci_handle_cmd_stop_ep(stru
- 
- 	memset(&deq_state, 0, sizeof(deq_state));
- 	ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
-+
-+	vdev = xhci->devs[slot_id];
-+	ep_ctx = xhci_get_ep_ctx(xhci, vdev->out_ctx, ep_index);
-+	trace_xhci_handle_cmd_stop_ep(ep_ctx);
-+
- 	ep = &xhci->devs[slot_id]->eps[ep_index];
- 	last_unlinked_td = list_last_entry(&ep->cancelled_td_list,
- 			struct xhci_td, cancelled_td_list);
-@@ -1032,6 +1039,8 @@ static void xhci_handle_cmd_set_deq(stru
- 
- 	ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
- 	slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx);
-+	trace_xhci_handle_cmd_set_deq(slot_ctx);
-+	trace_xhci_handle_cmd_set_deq_ep(ep_ctx);
- 
- 	if (cmd_comp_code != COMP_SUCCESS) {
- 		unsigned int ep_state;
-@@ -1102,9 +1111,15 @@ cleanup:
- static void xhci_handle_cmd_reset_ep(struct xhci_hcd *xhci, int slot_id,
- 		union xhci_trb *trb, u32 cmd_comp_code)
- {
-+	struct xhci_virt_device *vdev;
-+	struct xhci_ep_ctx *ep_ctx;
- 	unsigned int ep_index;
- 
- 	ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
-+	vdev = xhci->devs[slot_id];
-+	ep_ctx = xhci_get_ep_ctx(xhci, vdev->out_ctx, ep_index);
-+	trace_xhci_handle_cmd_reset_ep(ep_ctx);
-+
- 	/* This command will only fail if the endpoint wasn't halted,
- 	 * but we don't care.
- 	 */
-@@ -1146,10 +1161,15 @@ static void xhci_handle_cmd_enable_slot(
- static void xhci_handle_cmd_disable_slot(struct xhci_hcd *xhci, int slot_id)
- {
- 	struct xhci_virt_device *virt_dev;
-+	struct xhci_slot_ctx *slot_ctx;
- 
- 	virt_dev = xhci->devs[slot_id];
- 	if (!virt_dev)
- 		return;
-+
-+	slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
-+	trace_xhci_handle_cmd_disable_slot(slot_ctx);
-+
- 	if (xhci->quirks & XHCI_EP_LIMIT_QUIRK)
- 		/* Delete default control endpoint resources */
- 		xhci_free_device_endpoint_resources(xhci, virt_dev, true);
-@@ -1161,6 +1181,7 @@ static void xhci_handle_cmd_config_ep(st
- {
- 	struct xhci_virt_device *virt_dev;
- 	struct xhci_input_control_ctx *ctrl_ctx;
-+	struct xhci_ep_ctx *ep_ctx;
- 	unsigned int ep_index;
- 	unsigned int ep_state;
- 	u32 add_flags, drop_flags;
-@@ -1185,6 +1206,9 @@ static void xhci_handle_cmd_config_ep(st
- 	/* Input ctx add_flags are the endpoint index plus one */
- 	ep_index = xhci_last_valid_endpoint(add_flags) - 1;
- 
-+	ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->out_ctx, ep_index);
-+	trace_xhci_handle_cmd_config_ep(ep_ctx);
-+
- 	/* A usb_set_interface() call directly after clearing a halted
- 	 * condition may race on this quirky hardware.  Not worth
- 	 * worrying about, since this is prototype hardware.  Not sure
-@@ -1209,9 +1233,26 @@ static void xhci_handle_cmd_config_ep(st
- 	return;
- }
- 
-+static void xhci_handle_cmd_addr_dev(struct xhci_hcd *xhci, int slot_id)
-+{
-+	struct xhci_virt_device *vdev;
-+	struct xhci_slot_ctx *slot_ctx;
-+
-+	vdev = xhci->devs[slot_id];
-+	slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx);
-+	trace_xhci_handle_cmd_addr_dev(slot_ctx);
-+}
-+
- static void xhci_handle_cmd_reset_dev(struct xhci_hcd *xhci, int slot_id,
- 		struct xhci_event_cmd *event)
- {
-+	struct xhci_virt_device *vdev;
-+	struct xhci_slot_ctx *slot_ctx;
-+
-+	vdev = xhci->devs[slot_id];
-+	slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx);
-+	trace_xhci_handle_cmd_reset_dev(slot_ctx);
-+
- 	xhci_dbg(xhci, "Completed reset device command.\n");
- 	if (!xhci->devs[slot_id])
- 		xhci_warn(xhci, "Reset device command completion "
-@@ -1387,6 +1428,7 @@ static void handle_cmd_completion(struct
- 	case TRB_EVAL_CONTEXT:
- 		break;
- 	case TRB_ADDR_DEV:
-+		xhci_handle_cmd_addr_dev(xhci, slot_id);
- 		break;
- 	case TRB_STOP_RING:
- 		WARN_ON(slot_id != TRB_TO_SLOT_ID(
---- a/drivers/usb/host/xhci-trace.h
-+++ b/drivers/usb/host/xhci-trace.h
-@@ -285,6 +285,107 @@ DEFINE_EVENT(xhci_log_urb, xhci_urb_dequ
- 	TP_ARGS(urb)
- );
- 
-+DECLARE_EVENT_CLASS(xhci_log_ep_ctx,
-+	TP_PROTO(struct xhci_ep_ctx *ctx),
-+	TP_ARGS(ctx),
-+	TP_STRUCT__entry(
-+		__field(u32, info)
-+		__field(u32, info2)
-+		__field(u64, deq)
-+		__field(u32, tx_info)
-+	),
-+	TP_fast_assign(
-+		__entry->info = le32_to_cpu(ctx->ep_info);
-+		__entry->info2 = le32_to_cpu(ctx->ep_info2);
-+		__entry->deq = le64_to_cpu(ctx->deq);
-+		__entry->tx_info = le32_to_cpu(ctx->tx_info);
-+	),
-+	TP_printk("%s", xhci_decode_ep_context(__entry->info,
-+		__entry->info2, __entry->deq, __entry->tx_info)
-+	)
-+);
-+
-+DEFINE_EVENT(xhci_log_ep_ctx, xhci_handle_cmd_stop_ep,
-+	TP_PROTO(struct xhci_ep_ctx *ctx),
-+	TP_ARGS(ctx)
-+);
-+
-+DEFINE_EVENT(xhci_log_ep_ctx, xhci_handle_cmd_set_deq_ep,
-+	TP_PROTO(struct xhci_ep_ctx *ctx),
-+	TP_ARGS(ctx)
-+);
-+
-+DEFINE_EVENT(xhci_log_ep_ctx, xhci_handle_cmd_reset_ep,
-+	TP_PROTO(struct xhci_ep_ctx *ctx),
-+	TP_ARGS(ctx)
-+);
-+
-+DEFINE_EVENT(xhci_log_ep_ctx, xhci_handle_cmd_config_ep,
-+	TP_PROTO(struct xhci_ep_ctx *ctx),
-+	TP_ARGS(ctx)
-+);
-+
-+DECLARE_EVENT_CLASS(xhci_log_slot_ctx,
-+	TP_PROTO(struct xhci_slot_ctx *ctx),
-+	TP_ARGS(ctx),
-+	TP_STRUCT__entry(
-+		__field(u32, info)
-+		__field(u32, info2)
-+		__field(u32, tt_info)
-+		__field(u32, state)
-+	),
-+	TP_fast_assign(
-+		__entry->info = le32_to_cpu(ctx->dev_info);
-+		__entry->info2 = le32_to_cpu(ctx->dev_info2);
-+		__entry->tt_info = le64_to_cpu(ctx->tt_info);
-+		__entry->state = le32_to_cpu(ctx->dev_state);
-+	),
-+	TP_printk("%s", xhci_decode_slot_context(__entry->info,
-+			__entry->info2, __entry->tt_info,
-+			__entry->state)
-+	)
-+);
-+
-+DEFINE_EVENT(xhci_log_slot_ctx, xhci_alloc_dev,
-+	TP_PROTO(struct xhci_slot_ctx *ctx),
-+	TP_ARGS(ctx)
-+);
-+
-+DEFINE_EVENT(xhci_log_slot_ctx, xhci_free_dev,
-+	TP_PROTO(struct xhci_slot_ctx *ctx),
-+	TP_ARGS(ctx)
-+);
-+
-+DEFINE_EVENT(xhci_log_slot_ctx, xhci_handle_cmd_disable_slot,
-+	TP_PROTO(struct xhci_slot_ctx *ctx),
-+	TP_ARGS(ctx)
-+);
-+
-+DEFINE_EVENT(xhci_log_slot_ctx, xhci_discover_or_reset_device,
-+	TP_PROTO(struct xhci_slot_ctx *ctx),
-+	TP_ARGS(ctx)
-+);
-+
-+DEFINE_EVENT(xhci_log_slot_ctx, xhci_setup_device_slot,
-+	TP_PROTO(struct xhci_slot_ctx *ctx),
-+	TP_ARGS(ctx)
-+);
-+
-+DEFINE_EVENT(xhci_log_slot_ctx, xhci_handle_cmd_addr_dev,
-+	TP_PROTO(struct xhci_slot_ctx *ctx),
-+	TP_ARGS(ctx)
-+);
-+
-+DEFINE_EVENT(xhci_log_slot_ctx, xhci_handle_cmd_reset_dev,
-+	TP_PROTO(struct xhci_slot_ctx *ctx),
-+	TP_ARGS(ctx)
-+);
-+
-+DEFINE_EVENT(xhci_log_slot_ctx, xhci_handle_cmd_set_deq,
-+	TP_PROTO(struct xhci_slot_ctx *ctx),
-+	TP_ARGS(ctx)
-+);
-+
- #endif /* __XHCI_TRACE_H */
- 
- /* this part must be outside header guard */
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -3488,6 +3488,8 @@ int xhci_discover_or_reset_device(struct
- 						SLOT_STATE_DISABLED)
- 		return 0;
- 
-+	trace_xhci_discover_or_reset_device(slot_ctx);
-+
- 	xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
- 	/* Allocate the command structure that holds the struct completion.
- 	 * Assume we're in process context, since the normal device reset
-@@ -3603,6 +3605,7 @@ void xhci_free_dev(struct usb_hcd *hcd,
- {
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
- 	struct xhci_virt_device *virt_dev;
-+	struct xhci_slot_ctx *slot_ctx;
- 	int i, ret;
- 	struct xhci_command *command;
- 
-@@ -3630,6 +3633,8 @@ void xhci_free_dev(struct usb_hcd *hcd,
- 	}
- 
- 	virt_dev = xhci->devs[udev->slot_id];
-+	slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
-+	trace_xhci_free_dev(slot_ctx);
- 
- 	/* Stop any wayward timer functions (which may grab the lock) */
- 	for (i = 0; i < 31; i++) {
-@@ -3713,6 +3718,8 @@ static int xhci_reserve_host_control_ep_
- int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
- {
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
-+	struct xhci_virt_device *vdev;
-+	struct xhci_slot_ctx *slot_ctx;
- 	unsigned long flags;
- 	int ret, slot_id;
- 	struct xhci_command *command;
-@@ -3768,6 +3775,10 @@ int xhci_alloc_dev(struct usb_hcd *hcd,
- 		xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
- 		goto disable_slot;
- 	}
-+	vdev = xhci->devs[slot_id];
-+	slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx);
-+	trace_xhci_alloc_dev(slot_ctx);
-+
- 	udev->slot_id = slot_id;
- 
- #ifndef CONFIG_USB_DEFAULT_PERSIST
-@@ -3837,9 +3848,10 @@ static int xhci_setup_device(struct usb_
- 		ret = -EINVAL;
- 		goto out;
- 	}
-+	slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
-+	trace_xhci_setup_device_slot(slot_ctx);
- 
- 	if (setup == SETUP_CONTEXT_ONLY) {
--		slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
- 		if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
- 		    SLOT_STATE_DEFAULT) {
- 			xhci_dbg(xhci, "Slot already in default state\n");
-@@ -3960,7 +3972,6 @@ static int xhci_setup_device(struct usb_
- 	 * USB core uses address 1 for the roothubs, so we add one to the
- 	 * address given back to us by the HC.
- 	 */
--	slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
- 	trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
- 				le32_to_cpu(slot_ctx->dev_info) >> 27);
- 	/* Zero the input context control for later use */
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -622,6 +622,7 @@ struct xhci_slot_ctx {
- #define ROUTE_STRING_MASK	(0xfffff)
- /* Device speed - values defined by PORTSC Device Speed field - 20:23 */
- #define DEV_SPEED	(0xf << 20)
-+#define GET_DEV_SPEED(n) (((n) & DEV_SPEED) >> 20)
- /* bit 24 reserved */
- /* Is this LS/FS device connected through a HS hub? - bit 25 */
- #define DEV_MTT		(0x1 << 25)
-@@ -642,6 +643,7 @@ struct xhci_slot_ctx {
- #define DEVINFO_TO_ROOT_HUB_PORT(p)	(((p) >> 16) & 0xff)
- /* Maximum number of ports under a hub device */
- #define XHCI_MAX_PORTS(p)	(((p) & 0xff) << 24)
-+#define DEVINFO_TO_MAX_PORTS(p)	(((p) & (0xff << 24)) >> 24)
- 
- /* tt_info bitmasks */
- /*
-@@ -656,6 +658,7 @@ struct xhci_slot_ctx {
-  */
- #define TT_PORT		(0xff << 8)
- #define TT_THINK_TIME(p)	(((p) & 0x3) << 16)
-+#define GET_TT_THINK_TIME(p)	(((p) & (0x3 << 16)) >> 16)
- 
- /* dev_state bitmasks */
- /* USB device address - assigned by the HC */
-@@ -2387,5 +2390,148 @@ static inline const char *xhci_decode_tr
- 	return str;
- }
- 
-+static inline const char *xhci_decode_slot_context(u32 info, u32 info2,
-+		u32 tt_info, u32 state)
-+{
-+	static char str[1024];
-+	u32 speed;
-+	u32 hub;
-+	u32 mtt;
-+	int ret = 0;
-+
-+	speed = info & DEV_SPEED;
-+	hub = info & DEV_HUB;
-+	mtt = info & DEV_MTT;
-+
-+	ret = sprintf(str, "RS %05x %s%s%s Ctx Entries %d MEL %d us Port# %d/%d",
-+			info & ROUTE_STRING_MASK,
-+			({ char *s;
-+			switch (speed) {
-+			case SLOT_SPEED_FS:
-+				s = "full-speed";
-+				break;
-+			case SLOT_SPEED_LS:
-+				s = "low-speed";
-+				break;
-+			case SLOT_SPEED_HS:
-+				s = "high-speed";
-+				break;
-+			case SLOT_SPEED_SS:
-+				s = "super-speed";
-+				break;
-+			case SLOT_SPEED_SSP:
-+				s = "super-speed plus";
-+				break;
-+			default:
-+				s = "UNKNOWN speed";
-+			} s; }),
-+			mtt ? " multi-TT" : "",
-+			hub ? " Hub" : "",
-+			(info & LAST_CTX_MASK) >> 27,
-+			info2 & MAX_EXIT,
-+			DEVINFO_TO_ROOT_HUB_PORT(info2),
-+			DEVINFO_TO_MAX_PORTS(info2));
-+
-+	ret += sprintf(str + ret, " [TT Slot %d Port# %d TTT %d Intr %d] Addr %d State %s",
-+			tt_info & TT_SLOT, (tt_info & TT_PORT) >> 8,
-+			GET_TT_THINK_TIME(tt_info), GET_INTR_TARGET(tt_info),
-+			state & DEV_ADDR_MASK,
-+			xhci_slot_state_string(GET_SLOT_STATE(state)));
-+
-+	return str;
-+}
-+
-+static inline const char *xhci_ep_state_string(u8 state)
-+{
-+	switch (state) {
-+	case EP_STATE_DISABLED:
-+		return "disabled";
-+	case EP_STATE_RUNNING:
-+		return "running";
-+	case EP_STATE_HALTED:
-+		return "halted";
-+	case EP_STATE_STOPPED:
-+		return "stopped";
-+	case EP_STATE_ERROR:
-+		return "error";
-+	default:
-+		return "INVALID";
-+	}
-+}
-+
-+static inline const char *xhci_ep_type_string(u8 type)
-+{
-+	switch (type) {
-+	case ISOC_OUT_EP:
-+		return "Isoc OUT";
-+	case BULK_OUT_EP:
-+		return "Bulk OUT";
-+	case INT_OUT_EP:
-+		return "Int OUT";
-+	case CTRL_EP:
-+		return "Ctrl";
-+	case ISOC_IN_EP:
-+		return "Isoc IN";
-+	case BULK_IN_EP:
-+		return "Bulk IN";
-+	case INT_IN_EP:
-+		return "Int IN";
-+	default:
-+		return "INVALID";
-+	}
-+}
-+
-+static inline const char *xhci_decode_ep_context(u32 info, u32 info2, u64 deq,
-+		u32 tx_info)
-+{
-+	static char str[1024];
-+	int ret;
-+
-+	u32 esit;
-+	u16 maxp;
-+	u16 avg;
-+
-+	u8 max_pstr;
-+	u8 ep_state;
-+	u8 interval;
-+	u8 ep_type;
-+	u8 burst;
-+	u8 cerr;
-+	u8 mult;
-+	u8 lsa;
-+	u8 hid;
-+
-+	esit = EP_MAX_ESIT_PAYLOAD_HI(info) << 16 |
-+		EP_MAX_ESIT_PAYLOAD_LO(tx_info);
-+
-+	ep_state = info & EP_STATE_MASK;
-+	max_pstr = info & EP_MAXPSTREAMS_MASK;
-+	interval = CTX_TO_EP_INTERVAL(info);
-+	mult = CTX_TO_EP_MULT(info) + 1;
-+	lsa = info & EP_HAS_LSA;
-+
-+	cerr = (info2 & (3 << 1)) >> 1;
-+	ep_type = CTX_TO_EP_TYPE(info2);
-+	hid = info2 & (1 << 7);
-+	burst = CTX_TO_MAX_BURST(info2);
-+	maxp = MAX_PACKET_DECODED(info2);
-+
-+	avg = EP_AVG_TRB_LENGTH(tx_info);
-+
-+	ret = sprintf(str, "State %s mult %d max P. Streams %d %s",
-+			xhci_ep_state_string(ep_state), mult,
-+			max_pstr, lsa ? "LSA " : "");
-+
-+	ret += sprintf(str + ret, "interval %d us max ESIT payload %d CErr %d ",
-+			(1 << interval) * 125, esit, cerr);
-+
-+	ret += sprintf(str + ret, "Type %s %sburst %d maxp %d deq %016llx ",
-+			xhci_ep_type_string(ep_type), hid ? "HID" : "",
-+			burst, maxp, deq);
-+
-+	ret += sprintf(str + ret, "avg trb len %d", avg);
-+
-+	return str;
-+}
- 
- #endif /* __LINUX_XHCI_HCD_H */
diff --git a/patches.renesas/0183-xhci-rename-EP_HALT_PENDING-to-EP_STOP_CMD_PENDING.patch b/patches.renesas/0183-xhci-rename-EP_HALT_PENDING-to-EP_STOP_CMD_PENDING.patch
deleted file mode 100644
index 4a6fad9520a81c..00000000000000
--- a/patches.renesas/0183-xhci-rename-EP_HALT_PENDING-to-EP_STOP_CMD_PENDING.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From a337e153766013c465bd074ebe8248c9c7cf3205 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:19:52 +0200
-Subject: [PATCH 183/255] xhci: rename EP_HALT_PENDING to EP_STOP_CMD_PENDING
-
-We don't want to confuse halted and stalled endpoint states with
-a flag indicating we are waiting for a stop endpoint command to
-finish or timeout
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 9983a5fc39bfce7581db49f884aa782f24149d93)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    6 +++---
- drivers/usb/host/xhci.c      |    6 +++---
- drivers/usb/host/xhci.h      |    2 +-
- 3 files changed, 7 insertions(+), 7 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -410,7 +410,7 @@ void xhci_ring_ep_doorbell(struct xhci_h
- 	 * pointer command pending because the device can choose to start any
- 	 * stream once the endpoint is on the HW schedule.
- 	 */
--	if ((ep_state & EP_HALT_PENDING) || (ep_state & SET_DEQ_PENDING) ||
-+	if ((ep_state & EP_STOP_CMD_PENDING) || (ep_state & SET_DEQ_PENDING) ||
- 	    (ep_state & EP_HALTED))
- 		return;
- 	writel(DB_VALUE(ep_index, stream_id), db_addr);
-@@ -626,7 +626,7 @@ static void td_to_noop(struct xhci_hcd *
- static void xhci_stop_watchdog_timer_in_irq(struct xhci_hcd *xhci,
- 		struct xhci_virt_ep *ep)
- {
--	ep->ep_state &= ~EP_HALT_PENDING;
-+	ep->ep_state &= ~EP_STOP_CMD_PENDING;
- 	/* Can't del_timer_sync in interrupt, so we attempt to cancel.  If the
- 	 * timer is running on another CPU, we don't decrement stop_cmds_pending
- 	 * (since we didn't successfully stop the watchdog timer).
-@@ -917,7 +917,7 @@ void xhci_stop_endpoint_command_watchdog
- 
- 	ep->stop_cmds_pending--;
- 
--	if (ep->stop_cmds_pending || !(ep->ep_state & EP_HALT_PENDING)) {
-+	if (ep->stop_cmds_pending || !(ep->ep_state & EP_STOP_CMD_PENDING)) {
- 		xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
- 				"Stop EP timer ran, but no command pending, "
- 				"exiting.");
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -1608,13 +1608,13 @@ int xhci_urb_dequeue(struct usb_hcd *hcd
- 	/* Queue a stop endpoint command, but only if this is
- 	 * the first cancellation to be handled.
- 	 */
--	if (!(ep->ep_state & EP_HALT_PENDING)) {
-+	if (!(ep->ep_state & EP_STOP_CMD_PENDING)) {
- 		command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
- 		if (!command) {
- 			ret = -ENOMEM;
- 			goto done;
- 		}
--		ep->ep_state |= EP_HALT_PENDING;
-+		ep->ep_state |= EP_STOP_CMD_PENDING;
- 		ep->stop_cmds_pending++;
- 		ep->stop_cmd_timer.expires = jiffies +
- 			XHCI_STOP_EP_CMD_TIMEOUT * HZ;
-@@ -3655,7 +3655,7 @@ void xhci_free_dev(struct usb_hcd *hcd,
- 
- 	/* Stop any wayward timer functions (which may grab the lock) */
- 	for (i = 0; i < 31; ++i) {
--		virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
-+		virt_dev->eps[i].ep_state &= ~EP_STOP_CMD_PENDING;
- 		del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
- 	}
- 
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -916,7 +916,7 @@ struct xhci_virt_ep {
- 	unsigned int			ep_state;
- #define SET_DEQ_PENDING		(1 << 0)
- #define EP_HALTED		(1 << 1)	/* For stall handling */
--#define EP_HALT_PENDING		(1 << 2)	/* For URB cancellation */
-+#define EP_STOP_CMD_PENDING	(1 << 2)	/* For URB cancellation */
- /* Transitioning the endpoint to using streams, don't enqueue URBs */
- #define EP_GETTING_STREAMS	(1 << 3)
- #define EP_HAS_STREAMS		(1 << 4)
diff --git a/patches.renesas/0184-clk-renesas-rcar-gen3-cpg-Remove-obsolete-rcar_gen3_.patch b/patches.renesas/0184-clk-renesas-rcar-gen3-cpg-Remove-obsolete-rcar_gen3_.patch
deleted file mode 100644
index d8923ef5cb5a2e..00000000000000
--- a/patches.renesas/0184-clk-renesas-rcar-gen3-cpg-Remove-obsolete-rcar_gen3_.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From 8ab3b44a26ce41c6643a996ecf0defa18265fcbf Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 1 Jun 2016 14:56:58 +0200
-Subject: [PATCH 184/299] clk: renesas: rcar-gen3-cpg: Remove obsolete
- rcar_gen3_read_mode_pins()
-
-All R-Car Gen3 clock drivers now obtain the values of the mode pins from
-the R-Car RST driver.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-(cherry picked from commit ddab5aed8ecd277bd34b6421736c882fdff2dfe1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/rcar-gen3-cpg.c |   17 -----------------
- drivers/clk/renesas/rcar-gen3-cpg.h |    1 -
- 2 files changed, 18 deletions(-)
-
---- a/drivers/clk/renesas/rcar-gen3-cpg.c
-+++ b/drivers/clk/renesas/rcar-gen3-cpg.c
-@@ -333,23 +333,6 @@ struct clk * __init rcar_gen3_cpg_clk_re
- 					 __clk_get_name(parent), 0, mult, div);
- }
- 
--/*
-- * Reset register definitions.
-- */
--#define MODEMR	0xe6160060
--
--u32 __init rcar_gen3_read_mode_pins(void)
--{
--	void __iomem *modemr = ioremap_nocache(MODEMR, 4);
--	u32 mode;
--
--	BUG_ON(!modemr);
--	mode = ioread32(modemr);
--	iounmap(modemr);
--
--	return mode;
--}
--
- int __init rcar_gen3_cpg_init(const struct rcar_gen3_cpg_pll_config *config,
- 			      unsigned int clk_extalr)
- {
---- a/drivers/clk/renesas/rcar-gen3-cpg.h
-+++ b/drivers/clk/renesas/rcar-gen3-cpg.h
-@@ -33,7 +33,6 @@ struct rcar_gen3_cpg_pll_config {
- 
- #define CPG_RCKCR	0x240
- 
--u32 rcar_gen3_read_mode_pins(void);
- struct clk *rcar_gen3_cpg_clk_register(struct device *dev,
- 	const struct cpg_core_clk *core, const struct cpg_mssr_info *info,
- 	struct clk **clks, void __iomem *base);
diff --git a/patches.renesas/0184-usb-host-xhci-fix-up-Control-Transfer-TRB-decoder.patch b/patches.renesas/0184-usb-host-xhci-fix-up-Control-Transfer-TRB-decoder.patch
deleted file mode 100644
index 26826045246bd4..00000000000000
--- a/patches.renesas/0184-usb-host-xhci-fix-up-Control-Transfer-TRB-decoder.patch
+++ /dev/null
@@ -1,88 +0,0 @@
-From 3f5f8b07ba901696ac318c4f2014c5faa8e73d7b Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:56:58 +0300
-Subject: [PATCH 184/286] usb: host: xhci: fix up Control Transfer TRB decoder
-
-Format for each TRB in each control transfer stage differs. Let's make
-sure we correctly pretty print these fields to avoid confusion.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 5d062aba0d399c57e2d793603d6e372adb09b4d7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci.h |   59 ++++++++++++++++++++++++++++++------------------
- 1 file changed, 37 insertions(+), 22 deletions(-)
-
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -2224,31 +2224,46 @@ static inline const char *xhci_decode_tr
- 
- 		break;
- 	case TRB_SETUP:
--		sprintf(str,
--			"bRequestType %02x bRequest %02x wValue %02x%02x wIndex %02x%02x wLength %d length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c:%c:%c:%c:%c",
--			field0 & 0xff,
--			(field0 & 0xff00) >> 8,
--			(field0 & 0xff000000) >> 24,
--			(field0 & 0xff0000) >> 16,
--			(field1 & 0xff00) >> 8,
--			field1 & 0xff,
--			(field1 & 0xff000000) >> 16 |
--			(field1 & 0xff0000) >> 16,
--			TRB_LEN(field2), GET_TD_SIZE(field2),
--			GET_INTR_TARGET(field2),
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
--			field3 & TRB_BEI ? 'B' : 'b',
--			field3 & TRB_IDT ? 'I' : 'i',
--			field3 & TRB_IOC ? 'I' : 'i',
--			field3 & TRB_CHAIN ? 'C' : 'c',
--			field3 & TRB_NO_SNOOP ? 'S' : 's',
--			field3 & TRB_ISP ? 'I' : 'i',
--			field3 & TRB_ENT ? 'E' : 'e',
--			field3 & TRB_CYCLE ? 'C' : 'c');
-+		sprintf(str, "bRequestType %02x bRequest %02x wValue %02x%02x wIndex %02x%02x wLength %d length %d TD size %d intr %d type '%s' flags %c:%c:%c",
-+				field0 & 0xff,
-+				(field0 & 0xff00) >> 8,
-+				(field0 & 0xff000000) >> 24,
-+				(field0 & 0xff0000) >> 16,
-+				(field1 & 0xff00) >> 8,
-+				field1 & 0xff,
-+				(field1 & 0xff000000) >> 16 |
-+				(field1 & 0xff0000) >> 16,
-+				TRB_LEN(field2), GET_TD_SIZE(field2),
-+				GET_INTR_TARGET(field2),
-+				xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+				field3 & TRB_IDT ? 'I' : 'i',
-+				field3 & TRB_IOC ? 'I' : 'i',
-+				field3 & TRB_CYCLE ? 'C' : 'c');
- 		break;
--	case TRB_NORMAL:
- 	case TRB_DATA:
-+		sprintf(str, "Buffer %08x%08x length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c:%c:%c:%c",
-+				field1, field0, TRB_LEN(field2), GET_TD_SIZE(field2),
-+				GET_INTR_TARGET(field2),
-+				xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+				field3 & TRB_IDT ? 'I' : 'i',
-+				field3 & TRB_IOC ? 'I' : 'i',
-+				field3 & TRB_CHAIN ? 'C' : 'c',
-+				field3 & TRB_NO_SNOOP ? 'S' : 's',
-+				field3 & TRB_ISP ? 'I' : 'i',
-+				field3 & TRB_ENT ? 'E' : 'e',
-+				field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
- 	case TRB_STATUS:
-+		sprintf(str, "Buffer %08x%08x length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c",
-+				field1, field0, TRB_LEN(field2), GET_TD_SIZE(field2),
-+				GET_INTR_TARGET(field2),
-+				xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+				field3 & TRB_IOC ? 'I' : 'i',
-+				field3 & TRB_CHAIN ? 'C' : 'c',
-+				field3 & TRB_ENT ? 'E' : 'e',
-+				field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	case TRB_NORMAL:
- 	case TRB_ISOC:
- 	case TRB_EVENT_DATA:
- 	case TRB_TR_NOOP:
diff --git a/patches.renesas/0184-xhci-detect-stop-endpoint-race-using-pending-timer-i.patch b/patches.renesas/0184-xhci-detect-stop-endpoint-race-using-pending-timer-i.patch
deleted file mode 100644
index 0a5d795410b3cf..00000000000000
--- a/patches.renesas/0184-xhci-detect-stop-endpoint-race-using-pending-timer-i.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From de192b04234084684aa1a7c8b75634798f97fa0b Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:19:53 +0200
-Subject: [PATCH 184/255] xhci: detect stop endpoint race using pending timer
- instead of counter.
-
-A counter was used to find out if the stop endpoint completion raced with
-the stop endpoint timeout timer. This was needed in case the stop ep
-completion failed to delete the timer as it was running on anoter cpu.
-
-The EP_STOP_CMD_PENDING flag was not enough as a new stop endpoint command
-may be queued between the command completion and timeout function, which
-would set the flag back.
-
-Instead of the separate counter that was used we can detect the race by
-checking both the STOP_EP_PENDING flag and timer_pending in the timeout
-function.
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit f99265965b3203baf5266994578db14851fbf7fa)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   27 +++++++++++----------------
- drivers/usb/host/xhci.c      |    1 -
- drivers/usb/host/xhci.h      |    1 -
- 3 files changed, 11 insertions(+), 18 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -627,12 +627,8 @@ static void xhci_stop_watchdog_timer_in_
- 		struct xhci_virt_ep *ep)
- {
- 	ep->ep_state &= ~EP_STOP_CMD_PENDING;
--	/* Can't del_timer_sync in interrupt, so we attempt to cancel.  If the
--	 * timer is running on another CPU, we don't decrement stop_cmds_pending
--	 * (since we didn't successfully stop the watchdog timer).
--	 */
--	if (del_timer(&ep->stop_cmd_timer))
--		ep->stop_cmds_pending--;
-+	/* Can't del_timer_sync in interrupt */
-+	del_timer(&ep->stop_cmd_timer);
- }
- 
- /*
-@@ -898,10 +894,8 @@ static void xhci_kill_endpoint_urbs(stru
-  * simple flag to say whether there is a pending stop endpoint command for a
-  * particular endpoint.
-  *
-- * Instead we use a combination of that flag and a counter for the number of
-- * pending stop endpoint commands.  If the timer is the tail end of the last
-- * stop endpoint command, and the endpoint's command is still pending, we assume
-- * the host is dying.
-+ * Instead we use a combination of that flag and checking if a new timer is
-+ * pending.
-  */
- void xhci_stop_endpoint_command_watchdog(unsigned long arg)
- {
-@@ -915,13 +909,11 @@ void xhci_stop_endpoint_command_watchdog
- 
- 	spin_lock_irqsave(&xhci->lock, flags);
- 
--	ep->stop_cmds_pending--;
--
--	if (ep->stop_cmds_pending || !(ep->ep_state & EP_STOP_CMD_PENDING)) {
--		xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
--				"Stop EP timer ran, but no command pending, "
--				"exiting.");
-+	/* bail out if cmd completed but raced with stop ep watchdog timer.*/
-+	if (!(ep->ep_state & EP_STOP_CMD_PENDING) ||
-+	    timer_pending(&ep->stop_cmd_timer)) {
- 		spin_unlock_irqrestore(&xhci->lock, flags);
-+		xhci_dbg(xhci, "Stop EP timer raced with cmd completion, exit");
- 		return;
- 	}
- 
-@@ -930,7 +922,10 @@ void xhci_stop_endpoint_command_watchdog
- 	/* Oops, HC is dead or dying or at least not responding to the stop
- 	 * endpoint command.
- 	 */
-+
- 	xhci->xhc_state |= XHCI_STATE_DYING;
-+	ep->ep_state &= ~EP_STOP_CMD_PENDING;
-+
- 	/* Disable interrupts from the host controller and start halting it */
- 	xhci_quiesce(xhci);
- 	spin_unlock_irqrestore(&xhci->lock, flags);
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -1615,7 +1615,6 @@ int xhci_urb_dequeue(struct usb_hcd *hcd
- 			goto done;
- 		}
- 		ep->ep_state |= EP_STOP_CMD_PENDING;
--		ep->stop_cmds_pending++;
- 		ep->stop_cmd_timer.expires = jiffies +
- 			XHCI_STOP_EP_CMD_TIMEOUT * HZ;
- 		add_timer(&ep->stop_cmd_timer);
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -928,7 +928,6 @@ struct xhci_virt_ep {
- 	unsigned int		stopped_stream;
- 	/* Watchdog timer for stop endpoint command to cancel URBs */
- 	struct timer_list	stop_cmd_timer;
--	int			stop_cmds_pending;
- 	struct xhci_hcd		*xhci;
- 	/* Dequeue pointer and dequeue segment for a submitted Set TR Dequeue
- 	 * command.  We'll need to update the ring's dequeue segment and dequeue
diff --git a/patches.renesas/0185-ARM-shmobile-r8a7778-Stop-passing-mode-pins-state-to.patch b/patches.renesas/0185-ARM-shmobile-r8a7778-Stop-passing-mode-pins-state-to.patch
deleted file mode 100644
index c26a17f72a4aad..00000000000000
--- a/patches.renesas/0185-ARM-shmobile-r8a7778-Stop-passing-mode-pins-state-to.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From f3d9f59577c32d68f1e14a940d0f0c44f1193dea Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 1 Jun 2016 15:16:57 +0200
-Subject: [PATCH 185/299] ARM: shmobile: r8a7778: Stop passing mode pins state
- to clock driver
-
-Now the R-Car M1A CPG clock driver obtains the state of the mode pins
-from the R-Car RST driver, there's no longer a need to pass this state
-explicitly. Hence we can just remove the .init_time() callback, the
-generic ARM code will take care of calling of_clk_init().
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
----
- arch/arm/mach-shmobile/setup-r8a7778.c |   15 ---------------
- 1 file changed, 15 deletions(-)
-
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -15,7 +15,6 @@
-  * GNU General Public License for more details.
-  */
- 
--#include <linux/clk/renesas.h>
- #include <linux/io.h>
- #include <linux/irqchip.h>
- 
-@@ -23,19 +22,6 @@
- 
- #include "common.h"
- 
--#define MODEMR 0xffcc0020
--
--static void __init r8a7778_timer_init(void)
--{
--	u32 mode;
--	void __iomem *modemr = ioremap_nocache(MODEMR, 4);
--
--	BUG_ON(!modemr);
--	mode = ioread32(modemr);
--	iounmap(modemr);
--	r8a7778_clocks_init(mode);
--}
--
- #define INT2SMSKCR0	0x82288 /* 0xfe782288 */
- #define INT2SMSKCR1	0x8228c /* 0xfe78228c */
- 
-@@ -70,6 +56,5 @@ DT_MACHINE_START(R8A7778_DT, "Generic R8
- 	.init_early	= shmobile_init_delay,
- 	.init_irq	= r8a7778_init_irq_dt,
- 	.init_late	= shmobile_init_late,
--	.init_time	= r8a7778_timer_init,
- 	.dt_compat	= r8a7778_compat_dt,
- MACHINE_END
diff --git a/patches.renesas/0185-xhci-add-slot-and-endpoint-numbers-to-debug-messages.patch b/patches.renesas/0185-xhci-add-slot-and-endpoint-numbers-to-debug-messages.patch
deleted file mode 100644
index eb96aafe1a9f68..00000000000000
--- a/patches.renesas/0185-xhci-add-slot-and-endpoint-numbers-to-debug-messages.patch
+++ /dev/null
@@ -1,202 +0,0 @@
-From c46ad5147130acb8a3088dc3c05a2a8d32fcf765 Mon Sep 17 00:00:00 2001
-From: Zhengjun Xing <zhengjun.xing@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:56:59 +0300
-Subject: [PATCH 185/286] xhci: add slot and endpoint numbers to debug messages
- in handle_tx_event
-
-There's one annoyance in how xhci prints debug messages, we often
-get logs with messages but it's hard to say from which device and
-endpoint the message originates. Add slot_id, ep_index messages
-in handle_tx_event.
-
-Signed-off-by: Zhengjun Xing <zhengjun.xing@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit b7f769ae1b126086c5ec6686734924bac1dc0a9f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   80 +++++++++++++++++++++++++++++--------------
- 1 file changed, 55 insertions(+), 25 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -2288,7 +2288,8 @@ static int handle_tx_event(struct xhci_h
- 	slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
- 	xdev = xhci->devs[slot_id];
- 	if (!xdev) {
--		xhci_err(xhci, "ERROR Transfer event pointed to bad slot\n");
-+		xhci_err(xhci, "ERROR Transfer event pointed to bad slot %u\n",
-+			 slot_id);
- 		xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
- 			 (unsigned long long) xhci_trb_virt_to_dma(
- 				 xhci->event_ring->deq_seg,
-@@ -2308,8 +2309,9 @@ static int handle_tx_event(struct xhci_h
- 	ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
- 	ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
- 	if (!ep_ring ||  GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) {
--		xhci_err(xhci, "ERROR Transfer event for disabled endpoint "
--				"or incorrect stream ring\n");
-+		xhci_err(xhci,
-+			 "ERROR Transfer event for disabled endpoint slot %u ep %u or incorrect stream ring\n",
-+			  slot_id, ep_index);
- 		xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
- 			 (unsigned long long) xhci_trb_virt_to_dma(
- 				 xhci->event_ring->deq_seg,
-@@ -2343,45 +2345,62 @@ static int handle_tx_event(struct xhci_h
- 			trb_comp_code = COMP_SHORT_PACKET;
- 		else
- 			xhci_warn_ratelimited(xhci,
--					"WARN Successful completion on short TX: needs XHCI_TRUST_TX_LENGTH quirk?\n");
-+					      "WARN Successful completion on short TX for slot %u ep %u: needs XHCI_TRUST_TX_LENGTH quirk?\n",
-+					      slot_id, ep_index);
- 	case COMP_SHORT_PACKET:
- 		break;
- 	case COMP_STOPPED:
--		xhci_dbg(xhci, "Stopped on Transfer TRB\n");
-+		xhci_dbg(xhci, "Stopped on Transfer TRB for slot %u ep %u\n",
-+			 slot_id, ep_index);
- 		break;
- 	case COMP_STOPPED_LENGTH_INVALID:
--		xhci_dbg(xhci, "Stopped on No-op or Link TRB\n");
-+		xhci_dbg(xhci,
-+			 "Stopped on No-op or Link TRB for slot %u ep %u\n",
-+			 slot_id, ep_index);
- 		break;
- 	case COMP_STOPPED_SHORT_PACKET:
--		xhci_dbg(xhci, "Stopped with short packet transfer detected\n");
-+		xhci_dbg(xhci,
-+			 "Stopped with short packet transfer detected for slot %u ep %u\n",
-+			 slot_id, ep_index);
- 		break;
- 	case COMP_STALL_ERROR:
--		xhci_dbg(xhci, "Stalled endpoint\n");
-+		xhci_dbg(xhci, "Stalled endpoint for slot %u ep %u\n", slot_id,
-+			 ep_index);
- 		ep->ep_state |= EP_HALTED;
- 		status = -EPIPE;
- 		break;
- 	case COMP_TRB_ERROR:
--		xhci_warn(xhci, "WARN: TRB error on endpoint\n");
-+		xhci_warn(xhci,
-+			  "WARN: TRB error for slot %u ep %u on endpoint\n",
-+			  slot_id, ep_index);
- 		status = -EILSEQ;
- 		break;
- 	case COMP_SPLIT_TRANSACTION_ERROR:
- 	case COMP_USB_TRANSACTION_ERROR:
--		xhci_dbg(xhci, "Transfer error on endpoint\n");
-+		xhci_dbg(xhci, "Transfer error for slot %u ep %u on endpoint\n",
-+			 slot_id, ep_index);
- 		status = -EPROTO;
- 		break;
- 	case COMP_BABBLE_DETECTED_ERROR:
--		xhci_dbg(xhci, "Babble error on endpoint\n");
-+		xhci_dbg(xhci, "Babble error for slot %u ep %u on endpoint\n",
-+			 slot_id, ep_index);
- 		status = -EOVERFLOW;
- 		break;
- 	case COMP_DATA_BUFFER_ERROR:
--		xhci_warn(xhci, "WARN: HC couldn't access mem fast enough\n");
-+		xhci_warn(xhci,
-+			  "WARN: HC couldn't access mem fast enough for slot %u ep %u\n",
-+			  slot_id, ep_index);
- 		status = -ENOSR;
- 		break;
- 	case COMP_BANDWIDTH_OVERRUN_ERROR:
--		xhci_warn(xhci, "WARN: bandwidth overrun event on endpoint\n");
-+		xhci_warn(xhci,
-+			  "WARN: bandwidth overrun event for slot %u ep %u on endpoint\n",
-+			  slot_id, ep_index);
- 		break;
- 	case COMP_ISOCH_BUFFER_OVERRUN:
--		xhci_warn(xhci, "WARN: buffer overrun event on endpoint\n");
-+		xhci_warn(xhci,
-+			  "WARN: buffer overrun event for slot %u ep %u on endpoint",
-+			  slot_id, ep_index);
- 		break;
- 	case COMP_RING_UNDERRUN:
- 		/*
-@@ -2405,7 +2424,9 @@ static int handle_tx_event(struct xhci_h
- 				 ep_index);
- 		goto cleanup;
- 	case COMP_INCOMPATIBLE_DEVICE_ERROR:
--		xhci_warn(xhci, "WARN: detect an incompatible device");
-+		xhci_warn(xhci,
-+			  "WARN: detect an incompatible device for slot %u ep %u",
-+			  slot_id, ep_index);
- 		status = -EPROTO;
- 		break;
- 	case COMP_MISSED_SERVICE_ERROR:
-@@ -2416,19 +2437,24 @@ static int handle_tx_event(struct xhci_h
- 		 * short transfer when process the ep_ring next time.
- 		 */
- 		ep->skip = true;
--		xhci_dbg(xhci, "Miss service interval error, set skip flag\n");
-+		xhci_dbg(xhci,
-+			 "Miss service interval error for slot %u ep %u, set skip flag\n",
-+			 slot_id, ep_index);
- 		goto cleanup;
- 	case COMP_NO_PING_RESPONSE_ERROR:
- 		ep->skip = true;
--		xhci_dbg(xhci, "No Ping response error, Skip one Isoc TD\n");
-+		xhci_dbg(xhci,
-+			 "No Ping response error for slot %u ep %u, Skip one Isoc TD\n",
-+			 slot_id, ep_index);
- 		goto cleanup;
- 	default:
- 		if (xhci_is_vendor_info_code(xhci, trb_comp_code)) {
- 			status = 0;
- 			break;
- 		}
--		xhci_warn(xhci, "ERROR Unknown event condition %u, HC probably busted\n",
--			  trb_comp_code);
-+		xhci_warn(xhci,
-+			  "ERROR Unknown event condition %u for slot %u ep %u , HC probably busted\n",
-+			  trb_comp_code, slot_id, ep_index);
- 		goto cleanup;
- 	}
- 
-@@ -2454,8 +2480,8 @@ static int handle_tx_event(struct xhci_h
- 			}
- 			if (ep->skip) {
- 				ep->skip = false;
--				xhci_dbg(xhci, "td_list is empty while skip "
--						"flag set. Clear skip flag.\n");
-+				xhci_dbg(xhci, "td_list is empty while skip flag set. Clear skip flag for slot %u ep %u.\n",
-+					 slot_id, ep_index);
- 			}
- 			goto cleanup;
- 		}
-@@ -2463,8 +2489,8 @@ static int handle_tx_event(struct xhci_h
- 		/* We've skipped all the TDs on the ep ring when ep->skip set */
- 		if (ep->skip && td_num == 0) {
- 			ep->skip = false;
--			xhci_dbg(xhci, "All tds on the ep_ring skipped. "
--						"Clear skip flag.\n");
-+			xhci_dbg(xhci, "All tds on the ep_ring skipped. Clear skip flag for slot %u ep %u.\n",
-+				 slot_id, ep_index);
- 			goto cleanup;
- 		}
- 
-@@ -2523,7 +2549,9 @@ static int handle_tx_event(struct xhci_h
- 			ep_ring->last_td_was_short = false;
- 
- 		if (ep->skip) {
--			xhci_dbg(xhci, "Found td. Clear skip flag.\n");
-+			xhci_dbg(xhci,
-+				 "Found td. Clear skip flag for slot %u ep %u.\n",
-+				 slot_id, ep_index);
- 			ep->skip = false;
- 		}
- 
-@@ -2540,7 +2568,9 @@ static int handle_tx_event(struct xhci_h
- 		 * the TD.
- 		 */
- 		if (trb_is_noop(ep_trb)) {
--			xhci_dbg(xhci, "ep_trb is a no-op TRB. Skip it\n");
-+			xhci_dbg(xhci,
-+				 "ep_trb is a no-op TRB. Skip it for slot %u ep %u\n",
-+				 slot_id, ep_index);
- 			goto cleanup;
- 		}
- 
diff --git a/patches.renesas/0185-xhci-remove-unnecessary-check-for-pending-timer.patch b/patches.renesas/0185-xhci-remove-unnecessary-check-for-pending-timer.patch
deleted file mode 100644
index 512094215f5b09..00000000000000
--- a/patches.renesas/0185-xhci-remove-unnecessary-check-for-pending-timer.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From b3432704da4772bf53505619cd98132893d3ec5d Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:19:54 +0200
-Subject: [PATCH 185/255] xhci: remove unnecessary check for pending timer
-
-Checking if the command timeout timer is pending when queueing the
-first command to the command ring is not really useful, remove it.
-
-Suggested-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 6b02e97491c9b4ef54a3b2295f2962b2ceeb25f8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -3818,8 +3818,7 @@ static int queue_command(struct xhci_hcd
- 	list_add_tail(&cmd->cmd_list, &xhci->cmd_list);
- 
- 	/* if there are no other commands queued we start the timeout timer */
--	if (xhci->cmd_list.next == &cmd->cmd_list &&
--	    !delayed_work_pending(&xhci->cmd_timer)) {
-+	if (xhci->cmd_list.next == &cmd->cmd_list) {
- 		xhci->current_cmd = cmd;
- 		xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
- 	}
diff --git a/patches.renesas/0186-ARM-shmobile-r8a7779-Stop-passing-mode-pins-state-to.patch b/patches.renesas/0186-ARM-shmobile-r8a7779-Stop-passing-mode-pins-state-to.patch
deleted file mode 100644
index 5c2321117010a1..00000000000000
--- a/patches.renesas/0186-ARM-shmobile-r8a7779-Stop-passing-mode-pins-state-to.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 2ab9aa93b297f0169e20f0940daa444773bf1e9f Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 1 Jun 2016 15:21:14 +0200
-Subject: [PATCH 186/299] ARM: shmobile: r8a7779: Stop passing mode pins state
- to clock driver
-
-Now the R-Car H1 CPG clock driver obtains the state of the mode pins
-from the R-Car RST driver, there's no longer a need to pass this state
-explicitly. Hence we can just remove the .init_time() callback, the
-generic ARM code will take care of calling of_clk_init() and
-clocksource_probe().
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
----
- arch/arm/mach-shmobile/setup-r8a7779.c |   27 ---------------------------
- 1 file changed, 27 deletions(-)
-
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -14,8 +14,6 @@
-  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-  * GNU General Public License for more details.
-  */
--#include <linux/clk/renesas.h>
--#include <linux/clocksource.h>
- #include <linux/init.h>
- #include <linux/irq.h>
- #include <linux/irqchip.h>
-@@ -76,30 +74,6 @@ static void __init r8a7779_init_irq_dt(v
- 	__raw_writel(0x003fee3f, INT2SMSKCR4);
- }
- 
--#define MODEMR		0xffcc0020
--
--static u32 __init r8a7779_read_mode_pins(void)
--{
--	static u32 mode;
--	static bool mode_valid;
--
--	if (!mode_valid) {
--		void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE);
--		BUG_ON(!modemr);
--		mode = ioread32(modemr);
--		iounmap(modemr);
--		mode_valid = true;
--	}
--
--	return mode;
--}
--
--static void __init r8a7779_init_time(void)
--{
--	r8a7779_clocks_init(r8a7779_read_mode_pins());
--	clocksource_probe();
--}
--
- static const char *const r8a7779_compat_dt[] __initconst = {
- 	"renesas,r8a7779",
- 	NULL,
-@@ -109,7 +83,6 @@ DT_MACHINE_START(R8A7779_DT, "Generic R8
- 	.smp		= smp_ops(r8a7779_smp_ops),
- 	.map_io		= r8a7779_map_io,
- 	.init_early	= shmobile_init_delay,
--	.init_time	= r8a7779_init_time,
- 	.init_irq	= r8a7779_init_irq_dt,
- 	.init_late	= shmobile_init_late,
- 	.dt_compat	= r8a7779_compat_dt,
diff --git a/patches.renesas/0186-usb-xhci-remove-unnecessary-second-abort-try.patch b/patches.renesas/0186-usb-xhci-remove-unnecessary-second-abort-try.patch
deleted file mode 100644
index f33dfbdb05bf01..00000000000000
--- a/patches.renesas/0186-usb-xhci-remove-unnecessary-second-abort-try.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From dbca0492e7c02adc4a6569f705d1102e9573b5ec Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:19:55 +0200
-Subject: [PATCH 186/255] usb: xhci: remove unnecessary second abort try
-
-The second try was a workaround for (what we thought was) command
-ring failing to stop in the first place. But this turns out to be
-due to the race that we have fixed(see "xhci: Fix race related to
-abort operation"). With that fix, it is time to remove the second
-try.
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 1cc6d8617b9107f22ab86cec168f7f53f5ef42be)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   18 +++++-------------
- 1 file changed, 5 insertions(+), 13 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -362,19 +362,11 @@ static int xhci_abort_cmd_ring(struct xh
- 	ret = xhci_handshake(&xhci->op_regs->cmd_ring,
- 			CMD_RING_RUNNING, 0, 5 * 1000 * 1000);
- 	if (ret < 0) {
--		/* we are about to kill xhci, give it one more chance */
--		xhci_write_64(xhci, temp_64 | CMD_RING_ABORT,
--			      &xhci->op_regs->cmd_ring);
--		udelay(1000);
--		ret = xhci_handshake(&xhci->op_regs->cmd_ring,
--				     CMD_RING_RUNNING, 0, 3 * 1000 * 1000);
--		if (ret < 0) {
--			xhci_err(xhci, "Stopped the command ring failed, "
--				 "maybe the host is dead\n");
--			xhci->xhc_state |= XHCI_STATE_DYING;
--			xhci_halt(xhci);
--			return -ESHUTDOWN;
--		}
-+		xhci_err(xhci,
-+			 "Stop command ring failed, maybe the host is dead\n");
-+		xhci->xhc_state |= XHCI_STATE_DYING;
-+		xhci_halt(xhci);
-+		return -ESHUTDOWN;
- 	}
- 	/*
- 	 * Writing the CMD_RING_ABORT bit should cause a cmd completion event,
diff --git a/patches.renesas/0186-xhci-Do-not-halt-the-host-until-both-HCD-have-discon.patch b/patches.renesas/0186-xhci-Do-not-halt-the-host-until-both-HCD-have-discon.patch
deleted file mode 100644
index 174d33a0be211c..00000000000000
--- a/patches.renesas/0186-xhci-Do-not-halt-the-host-until-both-HCD-have-discon.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From c2e1abb35b37a2b46220ea0af7c8d70d8c09edf6 Mon Sep 17 00:00:00 2001
-From: Joel Stanley <joel@jms.id.au>
-Date: Fri, 7 Apr 2017 17:57:00 +0300
-Subject: [PATCH 186/286] xhci: Do not halt the host until both HCD have
- disconnected their devices.
-
-We can't halt the host controller immediately when first HCD is removed as
-it will cause problems if we have devices attached to the second (primary)
-HCD, like a keyboard.
-
-We've been carrying this in our Linux-as-a-bootloader environment for a
-little while now. The machines all have the same TI TUSB73x0 part,
-and when we kexec the devices don't come back until a system power cycle.
-
-[minor adjustments, code comments and remove HALT check  -Mathias]
-Signed-off-by: Joel Stanley <joel@jms.id.au>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
-(cherry picked from commit fe190ed0d60260e44f48d8b0b04f26a8c8898a02)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci.c |   20 ++++++++++----------
- 1 file changed, 10 insertions(+), 10 deletions(-)
-
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -692,21 +692,21 @@ void xhci_stop(struct usb_hcd *hcd)
- 
- 	mutex_lock(&xhci->mutex);
- 
--	if (!(xhci->xhc_state & XHCI_STATE_HALTED)) {
--		spin_lock_irq(&xhci->lock);
--
--		xhci->xhc_state |= XHCI_STATE_HALTED;
--		xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
--		xhci_halt(xhci);
--		xhci_reset(xhci);
--		spin_unlock_irq(&xhci->lock);
--	}
--
-+	/* Only halt host and free memory after both hcds are removed */
- 	if (!usb_hcd_is_primary_hcd(hcd)) {
-+		/* usb core will free this hcd shortly, unset pointer */
-+		xhci->shared_hcd = NULL;
- 		mutex_unlock(&xhci->mutex);
- 		return;
- 	}
- 
-+	spin_lock_irq(&xhci->lock);
-+	xhci->xhc_state |= XHCI_STATE_HALTED;
-+	xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
-+	xhci_halt(xhci);
-+	xhci_reset(xhci);
-+	spin_unlock_irq(&xhci->lock);
-+
- 	xhci_cleanup_msix(xhci);
- 
- 	/* Deleting Compliance Mode Recovery Timer */
diff --git a/patches.renesas/0187-ARM-shmobile-rcar-gen2-Stop-passing-mode-pins-state-.patch b/patches.renesas/0187-ARM-shmobile-rcar-gen2-Stop-passing-mode-pins-state-.patch
deleted file mode 100644
index deda7cf4b21e11..00000000000000
--- a/patches.renesas/0187-ARM-shmobile-rcar-gen2-Stop-passing-mode-pins-state-.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 9feeaae4570f5f6f7d07504e5f5218d3e5a9f8ed Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 7 Jul 2015 15:06:34 +0200
-Subject: [PATCH 187/299] ARM: shmobile: rcar-gen2: Stop passing mode pins
- state to clock driver
-
-Now the R-Car Gen2 CPG clock driver obtains the state of the mode pins
-from the R-Car RST driver, there's no longer a need to pass this state
-explicitly. Hence we can just call of_clk_init() instead.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
----
- arch/arm/mach-shmobile/setup-rcar-gen2.c |    5 ++---
- 1 file changed, 2 insertions(+), 3 deletions(-)
-
---- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
-+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
-@@ -15,7 +15,7 @@
-  * GNU General Public License for more details.
-  */
- 
--#include <linux/clk/renesas.h>
-+#include <linux/clk-provider.h>
- #include <linux/clocksource.h>
- #include <linux/device.h>
- #include <linux/dma-contiguous.h>
-@@ -71,7 +71,6 @@ static unsigned int __init get_extal_fre
- 
- void __init rcar_gen2_timer_init(void)
- {
--	u32 mode = rcar_gen2_read_mode_pins();
- #ifdef CONFIG_ARM_ARCH_TIMER
- 	void __iomem *base;
- 	u32 freq;
-@@ -130,7 +129,7 @@ void __init rcar_gen2_timer_init(void)
- 	iounmap(base);
- #endif /* CONFIG_ARM_ARCH_TIMER */
- 
--	rcar_gen2_clocks_init(mode);
-+	of_clk_init(NULL);
- 	clocksource_probe();
- }
- 
diff --git a/patches.renesas/0187-usb-host-xhci-Remove-unused-addr_64-variable-in-xhci.patch b/patches.renesas/0187-usb-host-xhci-Remove-unused-addr_64-variable-in-xhci.patch
deleted file mode 100644
index 0a7406abb5954c..00000000000000
--- a/patches.renesas/0187-usb-host-xhci-Remove-unused-addr_64-variable-in-xhci.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From fd4df1a30954a108d74cfc8d72887e11844c62d2 Mon Sep 17 00:00:00 2001
-From: Baolin Wang <baolin.wang@linaro.org>
-Date: Mon, 23 Jan 2017 14:19:56 +0200
-Subject: [PATCH 187/255] usb: host: xhci: Remove unused 'addr_64' variable in
- xhci_hcd structure
-
-Since the 'addr_64' variable as legacy is unused now, then remove it from
-xhci_hcd structure.
-
-Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit e22caf8bc140d8efa52922040c173c0b84647b66)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci.h |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1552,7 +1552,6 @@ struct xhci_hcd {
- 	u8		max_ports;
- 	u8		isoc_threshold;
- 	int		event_ring_max;
--	int		addr_64;
- 	/* 4KB min, 128MB max */
- 	int		page_size;
- 	/* Valid values are 12 to 20, inclusive */
diff --git a/patches.renesas/0187-xhci-Rework-how-we-handle-unresponsive-or-hoptlug-re.patch b/patches.renesas/0187-xhci-Rework-how-we-handle-unresponsive-or-hoptlug-re.patch
deleted file mode 100644
index 945ae45aad5660..00000000000000
--- a/patches.renesas/0187-xhci-Rework-how-we-handle-unresponsive-or-hoptlug-re.patch
+++ /dev/null
@@ -1,306 +0,0 @@
-From e5442e57435a715f1ac56397b375bd38e67f7971 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:57:01 +0300
-Subject: [PATCH 187/286] xhci: Rework how we handle unresponsive or hoptlug
- removed hosts
-
-Introduce a new xhci_hc_died() function that takes care of handling
-pending commands and URBs if a host controller becomes unresponsive.
-
-This addresses issues on hotpluggable xhci controllers that disappear
-from the bus suddenly, often while the bus (PCI) remove function is
-still being processed.
-
-xhci_hc_died() sets a XHCI_STATUS_DYING flag to prevent new URBs and
-commands or to be queued. The flag also ensures xhci_hc_died() will
-give back pending commands and URBs once.
-
-Host is considered dead if register read returns 0xffffffff, or host
-fails to abort the command ring, or fails stopping an endpoint after
-trying for 5 seconds.
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit d9f11ba9f107aa335091ab8d7ba5eea714e46e8b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-hub.c  |   12 ++--
- drivers/usb/host/xhci-ring.c |  118 ++++++++++++++++++++-----------------------
- drivers/usb/host/xhci.c      |   16 +++++
- drivers/usb/host/xhci.h      |    1 
- 4 files changed, 80 insertions(+), 67 deletions(-)
-
---- a/drivers/usb/host/xhci-hub.c
-+++ b/drivers/usb/host/xhci-hub.c
-@@ -1074,7 +1074,8 @@ int xhci_hub_control(struct usb_hcd *hcd
- 			goto error;
- 		wIndex--;
- 		temp = readl(port_array[wIndex]);
--		if (temp == 0xffffffff) {
-+		if (temp == ~(u32)0) {
-+			xhci_hc_died(xhci);
- 			retval = -ENODEV;
- 			break;
- 		}
-@@ -1116,7 +1117,8 @@ int xhci_hub_control(struct usb_hcd *hcd
- 			goto error;
- 		wIndex--;
- 		temp = readl(port_array[wIndex]);
--		if (temp == 0xffffffff) {
-+		if (temp == ~(u32)0) {
-+			xhci_hc_died(xhci);
- 			retval = -ENODEV;
- 			break;
- 		}
-@@ -1291,7 +1293,8 @@ int xhci_hub_control(struct usb_hcd *hcd
- 			goto error;
- 		wIndex--;
- 		temp = readl(port_array[wIndex]);
--		if (temp == 0xffffffff) {
-+		if (temp == ~(u32)0) {
-+			xhci_hc_died(xhci);
- 			retval = -ENODEV;
- 			break;
- 		}
-@@ -1402,7 +1405,8 @@ int xhci_hub_status_data(struct usb_hcd
- 	/* For each port, did anything change?  If so, set that bit in buf. */
- 	for (i = 0; i < max_ports; i++) {
- 		temp = readl(port_array[i]);
--		if (temp == 0xffffffff) {
-+		if (temp == ~(u32)0) {
-+			xhci_hc_died(xhci);
- 			retval = -ENODEV;
- 			break;
- 		}
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -359,21 +359,19 @@ static int xhci_abort_cmd_ring(struct xh
- 	xhci_write_64(xhci, temp_64 | CMD_RING_ABORT,
- 			&xhci->op_regs->cmd_ring);
- 
--	/* Section 4.6.1.2 of xHCI 1.0 spec says software should
--	 * time the completion od all xHCI commands, including
--	 * the Command Abort operation. If software doesn't see
--	 * CRR negated in a timely manner (e.g. longer than 5
--	 * seconds), then it should assume that the there are
--	 * larger problems with the xHC and assert HCRST.
-+	/* Section 4.6.1.2 of xHCI 1.0 spec says software should also time the
-+	 * completion of the Command Abort operation. If CRR is not negated in 5
-+	 * seconds then driver handles it as if host died (-ENODEV).
-+	 * In the future we should distinguish between -ENODEV and -ETIMEDOUT
-+	 * and try to recover a -ETIMEDOUT with a host controller reset.
- 	 */
- 	ret = xhci_handshake(&xhci->op_regs->cmd_ring,
- 			CMD_RING_RUNNING, 0, 5 * 1000 * 1000);
- 	if (ret < 0) {
--		xhci_err(xhci,
--			 "Stop command ring failed, maybe the host is dead\n");
--		xhci->xhc_state |= XHCI_STATE_DYING;
-+		xhci_err(xhci, "Abort failed to stop command ring: %d\n", ret);
- 		xhci_halt(xhci);
--		return -ESHUTDOWN;
-+		xhci_hc_died(xhci);
-+		return ret;
- 	}
- 	/*
- 	 * Writing the CMD_RING_ABORT bit should cause a cmd completion event,
-@@ -876,6 +874,40 @@ static void xhci_kill_endpoint_urbs(stru
- 	}
- }
- 
-+/*
-+ * host controller died, register read returns 0xffffffff
-+ * Complete pending commands, mark them ABORTED.
-+ * URBs need to be given back as usb core might be waiting with device locks
-+ * held for the URBs to finish during device disconnect, blocking host remove.
-+ *
-+ * Call with xhci->lock held.
-+ * lock is relased and re-acquired while giving back urb.
-+ */
-+void xhci_hc_died(struct xhci_hcd *xhci)
-+{
-+	int i, j;
-+
-+	if (xhci->xhc_state & XHCI_STATE_DYING)
-+		return;
-+
-+	xhci_err(xhci, "xHCI host controller not responding, assume dead\n");
-+	xhci->xhc_state |= XHCI_STATE_DYING;
-+
-+	xhci_cleanup_command_queue(xhci);
-+
-+	/* return any pending urbs, remove may be waiting for them */
-+	for (i = 0; i <= HCS_MAX_SLOTS(xhci->hcs_params1); i++) {
-+		if (!xhci->devs[i])
-+			continue;
-+		for (j = 0; j < 31; j++)
-+			xhci_kill_endpoint_urbs(xhci, i, j);
-+	}
-+
-+	/* inform usb core hc died if PCI remove isn't already handling it */
-+	if (!(xhci->xhc_state & XHCI_STATE_REMOVING))
-+		usb_hc_died(xhci_to_hcd(xhci));
-+}
-+
- /* Watchdog timer function for when a stop endpoint command fails to complete.
-  * In this case, we assume the host controller is broken or dying or dead.  The
-  * host may still be completing some other events, so we have to be careful to
-@@ -897,7 +929,6 @@ void xhci_stop_endpoint_command_watchdog
- {
- 	struct xhci_hcd *xhci;
- 	struct xhci_virt_ep *ep;
--	int ret, i, j;
- 	unsigned long flags;
- 
- 	ep = (struct xhci_virt_ep *) arg;
-@@ -914,52 +945,22 @@ void xhci_stop_endpoint_command_watchdog
- 	}
- 
- 	xhci_warn(xhci, "xHCI host not responding to stop endpoint command.\n");
--	xhci_warn(xhci, "Assuming host is dying, halting host.\n");
--	/* Oops, HC is dead or dying or at least not responding to the stop
--	 * endpoint command.
--	 */
--
--	xhci->xhc_state |= XHCI_STATE_DYING;
- 	ep->ep_state &= ~EP_STOP_CMD_PENDING;
- 
--	/* Disable interrupts from the host controller and start halting it */
--	xhci_quiesce(xhci);
--	spin_unlock_irqrestore(&xhci->lock, flags);
-+	xhci_halt(xhci);
- 
--	ret = xhci_halt(xhci);
-+	/*
-+	 * handle a stop endpoint cmd timeout as if host died (-ENODEV).
-+	 * In the future we could distinguish between -ENODEV and -ETIMEDOUT
-+	 * and try to recover a -ETIMEDOUT with a host controller reset
-+	 */
-+	xhci_hc_died(xhci);
- 
--	spin_lock_irqsave(&xhci->lock, flags);
--	if (ret < 0) {
--		/* This is bad; the host is not responding to commands and it's
--		 * not allowing itself to be halted.  At least interrupts are
--		 * disabled. If we call usb_hc_died(), it will attempt to
--		 * disconnect all device drivers under this host.  Those
--		 * disconnect() methods will wait for all URBs to be unlinked,
--		 * so we must complete them.
--		 */
--		xhci_warn(xhci, "Non-responsive xHCI host is not halting.\n");
--		xhci_warn(xhci, "Completing active URBs anyway.\n");
--		/* We could turn all TDs on the rings to no-ops.  This won't
--		 * help if the host has cached part of the ring, and is slow if
--		 * we want to preserve the cycle bit.  Skip it and hope the host
--		 * doesn't touch the memory.
--		 */
--	}
--	for (i = 0; i < MAX_HC_SLOTS; i++) {
--		if (!xhci->devs[i])
--			continue;
--		for (j = 0; j < 31; j++)
--			xhci_kill_endpoint_urbs(xhci, i, j);
--	}
- 	spin_unlock_irqrestore(&xhci->lock, flags);
- 	xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
--			"Calling usb_hc_died()");
--	usb_hc_died(xhci_to_hcd(xhci));
--	xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
- 			"xHCI host controller is dead.");
- }
- 
--
- static void update_ring_for_set_deq_completion(struct xhci_hcd *xhci,
- 		struct xhci_virt_device *dev,
- 		struct xhci_ring *ep_ring,
-@@ -1294,7 +1295,6 @@ void xhci_cleanup_command_queue(struct x
- void xhci_handle_command_timeout(struct work_struct *work)
- {
- 	struct xhci_hcd *xhci;
--	int ret;
- 	unsigned long flags;
- 	u64 hw_ring_state;
- 
-@@ -1315,22 +1315,17 @@ void xhci_handle_command_timeout(struct
- 
- 	/* Make sure command ring is running before aborting it */
- 	hw_ring_state = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
-+	if (hw_ring_state == ~(u64)0) {
-+		xhci_hc_died(xhci);
-+		goto time_out_completed;
-+	}
-+
- 	if ((xhci->cmd_ring_state & CMD_RING_STATE_RUNNING) &&
- 	    (hw_ring_state & CMD_RING_RUNNING))  {
- 		/* Prevent new doorbell, and start command abort */
- 		xhci->cmd_ring_state = CMD_RING_STATE_ABORTED;
- 		xhci_dbg(xhci, "Command timeout\n");
--		ret = xhci_abort_cmd_ring(xhci, flags);
--		if (unlikely(ret == -ESHUTDOWN)) {
--			xhci_err(xhci, "Abort command ring failed\n");
--			xhci_cleanup_command_queue(xhci);
--			spin_unlock_irqrestore(&xhci->lock, flags);
--			usb_hc_died(xhci_to_hcd(xhci)->primary_hcd);
--			xhci_dbg(xhci, "xHCI host controller is dead.\n");
--
--			return;
--		}
--
-+		xhci_abort_cmd_ring(xhci, flags);
- 		goto time_out_completed;
- 	}
- 
-@@ -2698,7 +2693,8 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd
- 	spin_lock(&xhci->lock);
- 	/* Check if the xHC generated the interrupt, or the irq is shared */
- 	status = readl(&xhci->op_regs->status);
--	if (status == 0xffffffff) {
-+	if (status == ~(u32)0) {
-+		xhci_hc_died(xhci);
- 		ret = IRQ_HANDLED;
- 		goto out;
- 	}
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -1546,10 +1546,16 @@ int xhci_urb_dequeue(struct usb_hcd *hcd
- 	if (!ep || !ep_ring)
- 		goto err_giveback;
- 
-+	/* If xHC is dead take it down and return ALL URBs in xhci_hc_died() */
- 	temp = readl(&xhci->op_regs->status);
--	if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
-+	if (temp == ~(u32)0 || xhci->xhc_state & XHCI_STATE_DYING) {
-+		xhci_hc_died(xhci);
-+		goto done;
-+	}
-+
-+	if (xhci->xhc_state & XHCI_STATE_HALTED) {
- 		xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
--				"HW died, freeing TD.");
-+				"HC halted, freeing TD manually.");
- 		for (i = urb_priv->num_tds_done;
- 		     i < urb_priv->num_tds;
- 		     i++) {
-@@ -2640,6 +2646,12 @@ static int xhci_configure_endpoint(struc
- 		return -EINVAL;
- 
- 	spin_lock_irqsave(&xhci->lock, flags);
-+
-+	if (xhci->xhc_state & XHCI_STATE_DYING) {
-+		spin_unlock_irqrestore(&xhci->lock, flags);
-+		return -ESHUTDOWN;
-+	}
-+
- 	virt_dev = xhci->devs[udev->slot_id];
- 
- 	ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -2138,6 +2138,7 @@ int xhci_hub_control(struct usb_hcd *hcd
- 		char *buf, u16 wLength);
- int xhci_hub_status_data(struct usb_hcd *hcd, char *buf);
- int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1);
-+void xhci_hc_died(struct xhci_hcd *xhci);
- 
- #ifdef CONFIG_PM
- int xhci_bus_suspend(struct usb_hcd *hcd);
diff --git a/patches.renesas/0188-clk-renesas-r8a7778-Remove-obsolete-r8a7778_clocks_i.patch b/patches.renesas/0188-clk-renesas-r8a7778-Remove-obsolete-r8a7778_clocks_i.patch
deleted file mode 100644
index 669c03db0b98c6..00000000000000
--- a/patches.renesas/0188-clk-renesas-r8a7778-Remove-obsolete-r8a7778_clocks_i.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 9c55b3a32282448976d2d4fe9d6646a48493ff68 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 1 Jun 2016 15:23:22 +0200
-Subject: [PATCH 188/299] clk: renesas: r8a7778: Remove obsolete
- r8a7778_clocks_init()
-
-The R-Car M1A board code no longer calls r8a7778_clocks_init().
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-(cherry picked from commit 7978a78c828ac8d5351b85480e60ada865b9bea9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/clk-r8a7778.c |   13 -------------
- include/linux/clk/renesas.h       |    1 -
- 2 files changed, 14 deletions(-)
-
---- a/drivers/clk/renesas/clk-r8a7778.c
-+++ b/drivers/clk/renesas/clk-r8a7778.c
-@@ -143,16 +143,3 @@ static void __init r8a7778_cpg_clocks_in
- 
- CLK_OF_DECLARE(r8a7778_cpg_clks, "renesas,r8a7778-cpg-clocks",
- 	       r8a7778_cpg_clocks_init);
--
--void __init r8a7778_clocks_init(u32 mode)
--{
--	BUG_ON(!(mode & BIT(19)));
--
--	cpg_mode_rates = (!!(mode & BIT(18)) << 2) |
--			 (!!(mode & BIT(12)) << 1) |
--			 (!!(mode & BIT(11)));
--	cpg_mode_divs = (!!(mode & BIT(2)) << 1) |
--			(!!(mode & BIT(1)));
--
--	of_clk_init(NULL);
--}
---- a/include/linux/clk/renesas.h
-+++ b/include/linux/clk/renesas.h
-@@ -20,7 +20,6 @@ struct device;
- struct device_node;
- struct generic_pm_domain;
- 
--void r8a7778_clocks_init(u32 mode);
- void r8a7779_clocks_init(u32 mode);
- void rcar_gen2_clocks_init(u32 mode);
- 
diff --git a/patches.renesas/0188-usb-xhci-add-xhci_log_ring-trace-events.patch b/patches.renesas/0188-usb-xhci-add-xhci_log_ring-trace-events.patch
deleted file mode 100644
index e3e78f38c59d3c..00000000000000
--- a/patches.renesas/0188-usb-xhci-add-xhci_log_ring-trace-events.patch
+++ /dev/null
@@ -1,150 +0,0 @@
-From 200abe368c59bdfe1fce263d7700e04efb0b7ef3 Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:57:02 +0300
-Subject: [PATCH 188/286] usb: xhci: add xhci_log_ring trace events
-
-This patch creates a new event class called xhci_log_ring, and
-defines the events used for tracing the change of all kinds of
-rings used by an xhci host. An xHCI ring is basically a memory
-block shared between software and hardware. By tracing changes
-of rings, it makes the life easier for debugging hardware or
-software problems.
-
-This info can be used, later, to print, in a human readable way,
-the life cycle of an xHCI ring using the trace-cmd tool and the
-appropriate plugin.
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Reviewed-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit b2d6edbb95487e90ffc22072879b0865ccb89a80)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-mem.c   |    4 ++
- drivers/usb/host/xhci-ring.c  |    5 +++
- drivers/usb/host/xhci-trace.h |   65 ++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 74 insertions(+)
-
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -288,6 +288,8 @@ void xhci_ring_free(struct xhci_hcd *xhc
- 	if (!ring)
- 		return;
- 
-+	trace_xhci_ring_free(ring);
-+
- 	if (ring->first_seg) {
- 		if (ring->type == TYPE_STREAM)
- 			xhci_remove_stream_mapping(ring);
-@@ -400,6 +402,7 @@ static struct xhci_ring *xhci_ring_alloc
- 			cpu_to_le32(LINK_TOGGLE);
- 	}
- 	xhci_initialize_ring_info(ring, cycle_state);
-+	trace_xhci_ring_alloc(ring);
- 	return ring;
- 
- fail:
-@@ -504,6 +507,7 @@ int xhci_ring_expansion(struct xhci_hcd
- 	}
- 
- 	xhci_link_rings(xhci, ring, first, last, num_segs);
-+	trace_xhci_ring_expansion(ring);
- 	xhci_dbg_trace(xhci, trace_xhci_dbg_ring_expansion,
- 			"ring expansion succeed, now has %d segments",
- 			ring->num_segs);
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -191,6 +191,9 @@ static void inc_deq(struct xhci_hcd *xhc
- 		ring->deq_seg = ring->deq_seg->next;
- 		ring->dequeue = ring->deq_seg->trbs;
- 	}
-+
-+	trace_xhci_inc_deq(ring);
-+
- 	return;
- }
- 
-@@ -259,6 +262,8 @@ static void inc_enq(struct xhci_hcd *xhc
- 		ring->enqueue = ring->enq_seg->trbs;
- 		next = ring->enqueue;
- 	}
-+
-+	trace_xhci_inc_enq(ring);
- }
- 
- /*
---- a/drivers/usb/host/xhci-trace.h
-+++ b/drivers/usb/host/xhci-trace.h
-@@ -386,6 +386,71 @@ DEFINE_EVENT(xhci_log_slot_ctx, xhci_han
- 	TP_ARGS(ctx)
- );
- 
-+DECLARE_EVENT_CLASS(xhci_log_ring,
-+	TP_PROTO(struct xhci_ring *ring),
-+	TP_ARGS(ring),
-+	TP_STRUCT__entry(
-+		__field(u32, type)
-+		__field(void *, ring)
-+		__field(dma_addr_t, enq)
-+		__field(dma_addr_t, deq)
-+		__field(dma_addr_t, enq_seg)
-+		__field(dma_addr_t, deq_seg)
-+		__field(unsigned int, num_segs)
-+		__field(unsigned int, stream_id)
-+		__field(unsigned int, cycle_state)
-+		__field(unsigned int, num_trbs_free)
-+		__field(unsigned int, bounce_buf_len)
-+	),
-+	TP_fast_assign(
-+		__entry->ring = ring;
-+		__entry->type = ring->type;
-+		__entry->num_segs = ring->num_segs;
-+		__entry->stream_id = ring->stream_id;
-+		__entry->enq_seg = ring->enq_seg->dma;
-+		__entry->deq_seg = ring->deq_seg->dma;
-+		__entry->cycle_state = ring->cycle_state;
-+		__entry->num_trbs_free = ring->num_trbs_free;
-+		__entry->bounce_buf_len = ring->bounce_buf_len;
-+		__entry->enq = xhci_trb_virt_to_dma(ring->enq_seg, ring->enqueue);
-+		__entry->deq = xhci_trb_virt_to_dma(ring->deq_seg, ring->dequeue);
-+	),
-+	TP_printk("%s %p: enq %pad(%pad) deq %pad(%pad) segs %d stream %d free_trbs %d bounce %d cycle %d",
-+			xhci_ring_type_string(__entry->type), __entry->ring,
-+			&__entry->enq, &__entry->enq_seg,
-+			&__entry->deq, &__entry->deq_seg,
-+			__entry->num_segs,
-+			__entry->stream_id,
-+			__entry->num_trbs_free,
-+			__entry->bounce_buf_len,
-+			__entry->cycle_state
-+		)
-+);
-+
-+DEFINE_EVENT(xhci_log_ring, xhci_ring_alloc,
-+	TP_PROTO(struct xhci_ring *ring),
-+	TP_ARGS(ring)
-+);
-+
-+DEFINE_EVENT(xhci_log_ring, xhci_ring_free,
-+	TP_PROTO(struct xhci_ring *ring),
-+	TP_ARGS(ring)
-+);
-+
-+DEFINE_EVENT(xhci_log_ring, xhci_ring_expansion,
-+	TP_PROTO(struct xhci_ring *ring),
-+	TP_ARGS(ring)
-+);
-+
-+DEFINE_EVENT(xhci_log_ring, xhci_inc_enq,
-+	TP_PROTO(struct xhci_ring *ring),
-+	TP_ARGS(ring)
-+);
-+
-+DEFINE_EVENT(xhci_log_ring, xhci_inc_deq,
-+	TP_PROTO(struct xhci_ring *ring),
-+	TP_ARGS(ring)
-+);
- #endif /* __XHCI_TRACE_H */
- 
- /* this part must be outside header guard */
diff --git a/patches.renesas/0188-xhci-Put-warning-message-on-a-single-line.patch b/patches.renesas/0188-xhci-Put-warning-message-on-a-single-line.patch
deleted file mode 100644
index 18fc34d4d143c5..00000000000000
--- a/patches.renesas/0188-xhci-Put-warning-message-on-a-single-line.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From b0ccb2708be76445939d207c3ae108d3d60a42fc Mon Sep 17 00:00:00 2001
-From: Alexander Stein <alexander.stein@systec-electronic.com>
-Date: Mon, 23 Jan 2017 14:19:57 +0200
-Subject: [PATCH 188/255] xhci: Put warning message on a single line
-
-This allows someone to grep for the complete warning message as in;
-xhci-hcd xhci-hcd.0.auto: USB core suspending device not in U0/U1/U2.
-
-Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 52c31bd5294d838315ea0211a991cfcd60b625ff)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-hub.c |    3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
---- a/drivers/usb/host/xhci-hub.c
-+++ b/drivers/usb/host/xhci-hub.c
-@@ -1020,8 +1020,7 @@ int xhci_hub_control(struct usb_hcd *hcd
- 			temp = readl(port_array[wIndex]);
- 			if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
- 				|| (temp & PORT_PLS_MASK) >= XDEV_U3) {
--				xhci_warn(xhci, "USB core suspending device "
--					  "not in U0/U1/U2.\n");
-+				xhci_warn(xhci, "USB core suspending device not in U0/U1/U2.\n");
- 				goto error;
- 			}
- 
diff --git a/patches.renesas/0189-clk-renesas-r8a7779-Remove-obsolete-r8a7779_clocks_i.patch b/patches.renesas/0189-clk-renesas-r8a7779-Remove-obsolete-r8a7779_clocks_i.patch
deleted file mode 100644
index a94e1fe1c5a0ec..00000000000000
--- a/patches.renesas/0189-clk-renesas-r8a7779-Remove-obsolete-r8a7779_clocks_i.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 29c85b15a5af33890e689a6d9741c61e7350a884 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 1 Jun 2016 15:24:58 +0200
-Subject: [PATCH 189/299] clk: renesas: r8a7779: Remove obsolete
- r8a7779_clocks_init()
-
-The R-Car H1 board code no longer calls r8a7779_clocks_init().
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-(cherry picked from commit b9fe9421d06653d735df07954730795d907e618d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/clk-r8a7779.c |    9 ---------
- include/linux/clk/renesas.h       |    1 -
- 2 files changed, 10 deletions(-)
-
---- a/drivers/clk/renesas/clk-r8a7779.c
-+++ b/drivers/clk/renesas/clk-r8a7779.c
-@@ -89,8 +89,6 @@ static const unsigned int cpg_plla_mult[
-  * Initialization
-  */
- 
--static u32 cpg_mode __initdata;
--
- static struct clk * __init
- r8a7779_cpg_register_clock(struct device_node *np, struct r8a7779_cpg *cpg,
- 			   const struct cpg_clk_config *config,
-@@ -178,10 +176,3 @@ static void __init r8a7779_cpg_clocks_in
- }
- CLK_OF_DECLARE(r8a7779_cpg_clks, "renesas,r8a7779-cpg-clocks",
- 	       r8a7779_cpg_clocks_init);
--
--void __init r8a7779_clocks_init(u32 mode)
--{
--	cpg_mode = mode;
--
--	of_clk_init(NULL);
--}
---- a/include/linux/clk/renesas.h
-+++ b/include/linux/clk/renesas.h
-@@ -20,7 +20,6 @@ struct device;
- struct device_node;
- struct generic_pm_domain;
- 
--void r8a7779_clocks_init(u32 mode);
- void rcar_gen2_clocks_init(u32 mode);
- 
- void cpg_mstp_add_clk_domain(struct device_node *np);
diff --git a/patches.renesas/0189-usb-xhci-remove-unnecessary-assignment.patch b/patches.renesas/0189-usb-xhci-remove-unnecessary-assignment.patch
deleted file mode 100644
index 096b1367ed2492..00000000000000
--- a/patches.renesas/0189-usb-xhci-remove-unnecessary-assignment.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 5f5161919cfbf2bc1fca90025eb20a5b4a87bd7b Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:00 +0200
-Subject: [PATCH 189/255] usb: xhci: remove unnecessary assignment
-
-Drop an unnecessary assignment in prepare_transfer().
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 80c479622fb4564c40813c8f752d3fffd4c5be47)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    2 --
- 1 file changed, 2 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -2847,8 +2847,6 @@ static int prepare_transfer(struct xhci_
- 	td->start_seg = ep_ring->enq_seg;
- 	td->first_trb = ep_ring->enqueue;
- 
--	urb_priv->td[td_index] = td;
--
- 	return 0;
- }
- 
diff --git a/patches.renesas/0189-usb-xhci-remove-xhci_dbg_ep_rings.patch b/patches.renesas/0189-usb-xhci-remove-xhci_dbg_ep_rings.patch
deleted file mode 100644
index 88a5d28eccac00..00000000000000
--- a/patches.renesas/0189-usb-xhci-remove-xhci_dbg_ep_rings.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 3c08379f5b4a56f27173a64e2179d5557ae5462f Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:57:03 +0300
-Subject: [PATCH 189/286] usb: xhci: remove xhci_dbg_ep_rings()
-
-xhci_dbg_ep_rings() isn't used in xhci driver anymore. Remove
-it to reduce the module binary size.
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit b7d09fe863561014085503986cb202f4111be347)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-dbg.c |   24 ------------------------
- drivers/usb/host/xhci.h     |    3 ---
- 2 files changed, 27 deletions(-)
-
---- a/drivers/usb/host/xhci-dbg.c
-+++ b/drivers/usb/host/xhci-dbg.c
-@@ -381,30 +381,6 @@ void xhci_debug_ring(struct xhci_hcd *xh
- 		xhci_debug_segment(xhci, seg);
- }
- 
--void xhci_dbg_ep_rings(struct xhci_hcd *xhci,
--		unsigned int slot_id, unsigned int ep_index,
--		struct xhci_virt_ep *ep)
--{
--	int i;
--	struct xhci_ring *ring;
--
--	if (ep->ep_state & EP_HAS_STREAMS) {
--		for (i = 1; i < ep->stream_info->num_streams; i++) {
--			ring = ep->stream_info->stream_rings[i];
--			xhci_dbg(xhci, "Dev %d endpoint %d stream ID %d:\n",
--				slot_id, ep_index, i);
--			xhci_debug_segment(xhci, ring->deq_seg);
--		}
--	} else {
--		ring = ep->ring;
--		if (!ring)
--			return;
--		xhci_dbg(xhci, "Dev %d endpoint ring %d:\n",
--				slot_id, ep_index);
--		xhci_debug_segment(xhci, ring->deq_seg);
--	}
--}
--
- void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst)
- {
- 	u64 addr = erst->erst_dma_addr;
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1940,9 +1940,6 @@ void xhci_dbg_ring_ptrs(struct xhci_hcd
- void xhci_dbg_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx, unsigned int last_ep);
- char *xhci_get_slot_state(struct xhci_hcd *xhci,
- 		struct xhci_container_ctx *ctx);
--void xhci_dbg_ep_rings(struct xhci_hcd *xhci,
--		unsigned int slot_id, unsigned int ep_index,
--		struct xhci_virt_ep *ep);
- void xhci_dbg_trace(struct xhci_hcd *xhci, void (*trace)(struct va_format *),
- 			const char *fmt, ...);
- 
diff --git a/patches.renesas/0190-clk-renesas-rcar-gen2-Remove-obsolete-rcar_gen2_cloc.patch b/patches.renesas/0190-clk-renesas-rcar-gen2-Remove-obsolete-rcar_gen2_cloc.patch
deleted file mode 100644
index deba2c042d2491..00000000000000
--- a/patches.renesas/0190-clk-renesas-rcar-gen2-Remove-obsolete-rcar_gen2_cloc.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 676e95e2afe018f63924b13475a333c5ecbf8cfb Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 1 Jun 2016 15:26:53 +0200
-Subject: [PATCH 190/299] clk: renesas: rcar-gen2: Remove obsolete
- rcar_gen2_clocks_init()
-
-The R-Car Gen2 board code no longer calls rcar_gen2_clocks_init().
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
-(cherry picked from commit 3e91d07bb592895982400002020d510fd7b6e85f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/clk-rcar-gen2.c |    7 -------
- include/linux/clk/renesas.h         |    2 --
- 2 files changed, 9 deletions(-)
-
---- a/drivers/clk/renesas/clk-rcar-gen2.c
-+++ b/drivers/clk/renesas/clk-rcar-gen2.c
-@@ -460,10 +460,3 @@ static void __init rcar_gen2_cpg_clocks_
- }
- CLK_OF_DECLARE(rcar_gen2_cpg_clks, "renesas,rcar-gen2-cpg-clocks",
- 	       rcar_gen2_cpg_clocks_init);
--
--void __init rcar_gen2_clocks_init(u32 mode)
--{
--	cpg_mode = mode;
--
--	of_clk_init(NULL);
--}
---- a/include/linux/clk/renesas.h
-+++ b/include/linux/clk/renesas.h
-@@ -20,8 +20,6 @@ struct device;
- struct device_node;
- struct generic_pm_domain;
- 
--void rcar_gen2_clocks_init(u32 mode);
--
- void cpg_mstp_add_clk_domain(struct device_node *np);
- #ifdef CONFIG_CLK_RENESAS_CPG_MSTP
- int cpg_mstp_attach_dev(struct generic_pm_domain *unused, struct device *dev);
diff --git a/patches.renesas/0190-usb-xhci-avoid-unnecessary-calculation.patch b/patches.renesas/0190-usb-xhci-avoid-unnecessary-calculation.patch
deleted file mode 100644
index 8a41754c1390a7..00000000000000
--- a/patches.renesas/0190-usb-xhci-avoid-unnecessary-calculation.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 8c6ebb3a7bdd1298f47e6583899fbe66c537bf7c Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:01 +0200
-Subject: [PATCH 190/255] usb: xhci: avoid unnecessary calculation
-
-No need to calculate remainder and length_field, if there is
-no data phase of a control transfer.
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit fb79a6da459b20554151eed84c991cd9bd35ff15)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   20 ++++++++++----------
- 1 file changed, 10 insertions(+), 10 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -3240,7 +3240,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
- 	struct usb_ctrlrequest *setup;
- 	struct xhci_generic_trb *start_trb;
- 	int start_cycle;
--	u32 field, length_field, remainder;
-+	u32 field;
- 	struct urb_priv *urb_priv;
- 	struct xhci_td *td;
- 
-@@ -3313,16 +3313,16 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
- 	else
- 		field = TRB_TYPE(TRB_DATA);
- 
--	remainder = xhci_td_remainder(xhci, 0,
--				   urb->transfer_buffer_length,
--				   urb->transfer_buffer_length,
--				   urb, 1);
--
--	length_field = TRB_LEN(urb->transfer_buffer_length) |
--		TRB_TD_SIZE(remainder) |
--		TRB_INTR_TARGET(0);
--
- 	if (urb->transfer_buffer_length > 0) {
-+		u32 length_field, remainder;
-+
-+		remainder = xhci_td_remainder(xhci, 0,
-+				urb->transfer_buffer_length,
-+				urb->transfer_buffer_length,
-+				urb, 1);
-+		length_field = TRB_LEN(urb->transfer_buffer_length) |
-+				TRB_TD_SIZE(remainder) |
-+				TRB_INTR_TARGET(0);
- 		if (setup->bRequestType & USB_DIR_IN)
- 			field |= TRB_DIR_IN;
- 		queue_trb(xhci, ep_ring, true,
diff --git a/patches.renesas/0190-usb-xhci-make-several-functions-static.patch b/patches.renesas/0190-usb-xhci-make-several-functions-static.patch
deleted file mode 100644
index 78fbc147741260..00000000000000
--- a/patches.renesas/0190-usb-xhci-make-several-functions-static.patch
+++ /dev/null
@@ -1,360 +0,0 @@
-From ccd1c25032c5707877cc11c2925debaa0c58adee Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:57:04 +0300
-Subject: [PATCH 190/286] usb: xhci: make several functions static
-
-Several functions have a single user in the same file where it
-is defined. There's no need to expose it anywhere else.
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 3969384cf88aa2726afb05ad5d1c6ec27e670f07)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci.c |   59 ++++++++++++++++++++++++------------------------
- drivers/usb/host/xhci.h |   41 ---------------------------------
- 2 files changed, 30 insertions(+), 70 deletions(-)
-
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -542,7 +542,7 @@ static int xhci_all_ports_seen_u0(struct
-  * device contexts (?), set up a command ring segment (or two?), create event
-  * ring (one for now).
-  */
--int xhci_init(struct usb_hcd *hcd)
-+static int xhci_init(struct usb_hcd *hcd)
- {
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
- 	int retval = 0;
-@@ -685,7 +685,7 @@ EXPORT_SYMBOL_GPL(xhci_run);
-  * Disable device contexts, disable IRQs, and quiesce the HC.
-  * Reset the HC, finish any completed transactions, and cleanup memory.
-  */
--void xhci_stop(struct usb_hcd *hcd)
-+static void xhci_stop(struct usb_hcd *hcd)
- {
- 	u32 temp;
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
-@@ -746,7 +746,7 @@ void xhci_stop(struct usb_hcd *hcd)
-  *
-  * This will only ever be called with the main usb_hcd (the USB3 roothub).
-  */
--void xhci_shutdown(struct usb_hcd *hcd)
-+static void xhci_shutdown(struct usb_hcd *hcd)
- {
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
- 
-@@ -1221,7 +1221,7 @@ unsigned int xhci_get_endpoint_address(u
-  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
-  * bit 1, etc.
-  */
--unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
-+static unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
- {
- 	return 1 << (xhci_get_endpoint_index(desc) + 1);
- }
-@@ -1230,7 +1230,7 @@ unsigned int xhci_get_endpoint_flag(stru
-  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
-  * bit 1, etc.
-  */
--unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
-+static unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
- {
- 	return 1 << (ep_index + 1);
- }
-@@ -1374,7 +1374,7 @@ command_cleanup:
-  * non-error returns are a promise to giveback() the urb later
-  * we drop ownership so next owner (or urb unlink) can get it
-  */
--int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
-+static int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
- {
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
- 	unsigned long flags;
-@@ -1510,7 +1510,7 @@ free_priv:
-  * Note that this function can be called in any context, or so says
-  * usb_hcd_unlink_urb()
-  */
--int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
-+static int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
- {
- 	unsigned long flags;
- 	int ret, i;
-@@ -1627,7 +1627,7 @@ err_giveback:
-  * disabled, so there's no need for mutual exclusion to protect
-  * the xhci->devs[slot_id] structure.
-  */
--int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
-+static int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
- 		struct usb_host_endpoint *ep)
- {
- 	struct xhci_hcd *xhci;
-@@ -1710,7 +1710,7 @@ int xhci_drop_endpoint(struct usb_hcd *h
-  * configuration or alt setting is installed in the device, so there's no need
-  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
-  */
--int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
-+static int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
- 		struct usb_host_endpoint *ep)
- {
- 	struct xhci_hcd *xhci;
-@@ -2381,7 +2381,7 @@ static unsigned int xhci_get_ss_bw_consu
- 
- }
- 
--void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
-+static void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
- 		struct xhci_bw_info *ep_bw,
- 		struct xhci_interval_bw_table *bw_table,
- 		struct usb_device *udev,
-@@ -2746,7 +2746,7 @@ static void xhci_check_bw_drop_ep_stream
-  * else should be touching the xhci->devs[slot_id] structure, so we
-  * don't need to take the xhci->lock for manipulating that.
-  */
--int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
-+static int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
- {
- 	int i;
- 	int ret = 0;
-@@ -2850,7 +2850,7 @@ command_cleanup:
- 	return ret;
- }
- 
--void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
-+static void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
- {
- 	struct xhci_hcd *xhci;
- 	struct xhci_virt_device	*virt_dev;
-@@ -2976,7 +2976,7 @@ void xhci_cleanup_stalled_ring(struct xh
-  * Context: in_interrupt
-  */
- 
--void xhci_endpoint_reset(struct usb_hcd *hcd,
-+static void xhci_endpoint_reset(struct usb_hcd *hcd,
- 		struct usb_host_endpoint *ep)
- {
- 	struct xhci_hcd *xhci;
-@@ -3152,7 +3152,7 @@ static u32 xhci_calculate_no_streams_bit
-  * hardware or endpoints claim they can't support the number of requested
-  * stream IDs.
-  */
--int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
-+static int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
- 		struct usb_host_endpoint **eps, unsigned int num_eps,
- 		unsigned int num_streams, gfp_t mem_flags)
- {
-@@ -3316,7 +3316,7 @@ cleanup:
-  * Modify the endpoint context state, submit a configure endpoint command,
-  * and free all endpoint rings for streams if that completes successfully.
-  */
--int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
-+static int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
- 		struct usb_host_endpoint **eps, unsigned int num_eps,
- 		gfp_t mem_flags)
- {
-@@ -3448,7 +3448,8 @@ void xhci_free_device_endpoint_resources
-  * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
-  * re-allocate the device.
-  */
--int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
-+static int xhci_discover_or_reset_device(struct usb_hcd *hcd,
-+		struct usb_device *udev)
- {
- 	int ret, i;
- 	unsigned long flags;
-@@ -3613,7 +3614,7 @@ command_cleanup:
-  * disconnected, and all traffic has been stopped and the endpoints have been
-  * disabled.  Free any HC data structures associated with that device.
-  */
--void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
-+static void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
- {
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
- 	struct xhci_virt_device *virt_dev;
-@@ -4002,12 +4003,12 @@ out:
- 	return ret;
- }
- 
--int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
-+static int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
- {
- 	return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
- }
- 
--int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
-+static int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
- {
- 	return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
- }
-@@ -4164,7 +4165,7 @@ static int xhci_calculate_usb2_hw_lpm_pa
- 	return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
- }
- 
--int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
-+static int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
- 			struct usb_device *udev, int enable)
- {
- 	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
-@@ -4288,7 +4289,7 @@ static int xhci_check_usb2_port_capabili
- 	return 0;
- }
- 
--int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
-+static int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
- {
- 	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
- 	int		portnum = udev->portnum - 1;
-@@ -4697,7 +4698,7 @@ static int calculate_max_exit_latency(st
- }
- 
- /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
--int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
-+static int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
- 			struct usb_device *udev, enum usb3_link_state state)
- {
- 	struct xhci_hcd	*xhci;
-@@ -4728,7 +4729,7 @@ int xhci_enable_usb3_lpm_timeout(struct
- 	return hub_encoded_timeout;
- }
- 
--int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
-+static int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
- 			struct usb_device *udev, enum usb3_link_state state)
- {
- 	struct xhci_hcd	*xhci;
-@@ -4744,24 +4745,24 @@ int xhci_disable_usb3_lpm_timeout(struct
- }
- #else /* CONFIG_PM */
- 
--int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
-+static int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
- 				struct usb_device *udev, int enable)
- {
- 	return 0;
- }
- 
--int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
-+static int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
- {
- 	return 0;
- }
- 
--int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
-+static int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
- 			struct usb_device *udev, enum usb3_link_state state)
- {
- 	return USB3_LPM_DISABLED;
- }
- 
--int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
-+static int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
- 			struct usb_device *udev, enum usb3_link_state state)
- {
- 	return 0;
-@@ -4773,7 +4774,7 @@ int xhci_disable_usb3_lpm_timeout(struct
- /* Once a hub descriptor is fetched for a device, we need to update the xHC's
-  * internal data structures for the device.
-  */
--int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
-+static int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
- 			struct usb_tt *tt, gfp_t mem_flags)
- {
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
-@@ -4879,7 +4880,7 @@ int xhci_update_hub_device(struct usb_hc
- 	return ret;
- }
- 
--int xhci_get_frame(struct usb_hcd *hcd)
-+static int xhci_get_frame(struct usb_hcd *hcd)
- {
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
- 	/* EHCI mods by the periodic size.  Why? */
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1953,16 +1953,8 @@ void xhci_copy_ep0_dequeue_into_input_ct
- 		struct usb_device *udev);
- unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc);
- unsigned int xhci_get_endpoint_address(unsigned int ep_index);
--unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc);
--unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index);
- unsigned int xhci_last_valid_endpoint(u32 added_ctxs);
- void xhci_endpoint_zero(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev, struct usb_host_endpoint *ep);
--void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
--		struct xhci_bw_info *ep_bw,
--		struct xhci_interval_bw_table *bw_table,
--		struct usb_device *udev,
--		struct xhci_virt_ep *virt_ep,
--		struct xhci_tt_bw_info *tt_info);
- void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
- 		struct xhci_virt_device *virt_dev,
- 		int old_active_eps);
-@@ -2021,10 +2013,7 @@ void xhci_quiesce(struct xhci_hcd *xhci)
- int xhci_halt(struct xhci_hcd *xhci);
- int xhci_start(struct xhci_hcd *xhci);
- int xhci_reset(struct xhci_hcd *xhci);
--int xhci_init(struct usb_hcd *hcd);
- int xhci_run(struct usb_hcd *hcd);
--void xhci_stop(struct usb_hcd *hcd);
--void xhci_shutdown(struct usb_hcd *hcd);
- int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks);
- void xhci_init_driver(struct hc_driver *drv,
- 		      const struct xhci_driver_overrides *over);
-@@ -2039,36 +2028,13 @@ int xhci_resume(struct xhci_hcd *xhci, b
- #define	xhci_resume	NULL
- #endif
- 
--int xhci_get_frame(struct usb_hcd *hcd);
- irqreturn_t xhci_irq(struct usb_hcd *hcd);
- irqreturn_t xhci_msi_irq(int irq, void *hcd);
- int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev);
--void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev);
- int xhci_alloc_tt_info(struct xhci_hcd *xhci,
- 		struct xhci_virt_device *virt_dev,
- 		struct usb_device *hdev,
- 		struct usb_tt *tt, gfp_t mem_flags);
--int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
--		struct usb_host_endpoint **eps, unsigned int num_eps,
--		unsigned int num_streams, gfp_t mem_flags);
--int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
--		struct usb_host_endpoint **eps, unsigned int num_eps,
--		gfp_t mem_flags);
--int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev);
--int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev);
--int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev);
--int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
--				struct usb_device *udev, int enable);
--int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
--			struct usb_tt *tt, gfp_t mem_flags);
--int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags);
--int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status);
--int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev, struct usb_host_endpoint *ep);
--int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev, struct usb_host_endpoint *ep);
--void xhci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep);
--int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev);
--int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev);
--void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev);
- 
- /* xHCI ring, segment, TRB, and TD functions */
- dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg, union xhci_trb *trb);
-@@ -2112,9 +2078,6 @@ void xhci_queue_new_dequeue_state(struct
- 		struct xhci_dequeue_state *deq_state);
- void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
- 		unsigned int ep_index, struct xhci_td *td);
--void xhci_queue_config_ep_quirk(struct xhci_hcd *xhci,
--		unsigned int slot_id, unsigned int ep_index,
--		struct xhci_dequeue_state *deq_state);
- void xhci_stop_endpoint_command_watchdog(unsigned long arg);
- void xhci_handle_command_timeout(struct work_struct *work);
- 
-@@ -2125,10 +2088,6 @@ void xhci_cleanup_command_queue(struct x
- /* xHCI roothub code */
- void xhci_set_link_state(struct xhci_hcd *xhci, __le32 __iomem **port_array,
- 				int port_id, u32 link_state);
--int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
--			struct usb_device *udev, enum usb3_link_state state);
--int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
--			struct usb_device *udev, enum usb3_link_state state);
- void xhci_test_and_clear_bit(struct xhci_hcd *xhci, __le32 __iomem **port_array,
- 				int port_id, u32 port_bit);
- int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex,
diff --git a/patches.renesas/0191-clk-renesas-Add-r8a7743-CPG-Core-Clock-Definitions.patch b/patches.renesas/0191-clk-renesas-Add-r8a7743-CPG-Core-Clock-Definitions.patch
deleted file mode 100644
index bf1b972be05fe4..00000000000000
--- a/patches.renesas/0191-clk-renesas-Add-r8a7743-CPG-Core-Clock-Definitions.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 836b7cd3f4fb17f0ccd469a33dc589ef0a7e239d Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Thu, 27 Oct 2016 23:23:35 +0300
-Subject: [PATCH 191/299] clk: renesas: Add r8a7743 CPG Core Clock Definitions
-
-Add macros usable by the device tree sources to reference the R8A7743 CPG
-clocks by index. The data comes from Table 7.2b in revision 1.00 of the
-RZ/G Series User's Manual.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 4e195933de4690c503ce4b93cfd0fb0046dd770b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/dt-bindings/clock/r8a7743-cpg-mssr.h |   43 +++++++++++++++++++++++++++
- 1 file changed, 43 insertions(+)
- create mode 100644 include/dt-bindings/clock/r8a7743-cpg-mssr.h
-
---- /dev/null
-+++ b/include/dt-bindings/clock/r8a7743-cpg-mssr.h
-@@ -0,0 +1,43 @@
-+/*
-+ * Copyright (C) 2016 Cogent Embedded Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+#ifndef __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__
-+#define __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__
-+
-+#include <dt-bindings/clock/renesas-cpg-mssr.h>
-+
-+/* r8a7743 CPG Core Clocks */
-+#define R8A7743_CLK_Z		0
-+#define R8A7743_CLK_ZG		1
-+#define R8A7743_CLK_ZTR		2
-+#define R8A7743_CLK_ZTRD2	3
-+#define R8A7743_CLK_ZT		4
-+#define R8A7743_CLK_ZX		5
-+#define R8A7743_CLK_ZS		6
-+#define R8A7743_CLK_HP		7
-+#define R8A7743_CLK_B		9
-+#define R8A7743_CLK_LB		10
-+#define R8A7743_CLK_P		11
-+#define R8A7743_CLK_CL		12
-+#define R8A7743_CLK_M2		13
-+#define R8A7743_CLK_ZB3		15
-+#define R8A7743_CLK_ZB3D2	16
-+#define R8A7743_CLK_DDR		17
-+#define R8A7743_CLK_SDH		18
-+#define R8A7743_CLK_SD0		19
-+#define R8A7743_CLK_SD2		20
-+#define R8A7743_CLK_SD3		21
-+#define R8A7743_CLK_MMC0	22
-+#define R8A7743_CLK_MP		23
-+#define R8A7743_CLK_QSPI	26
-+#define R8A7743_CLK_CP		27
-+#define R8A7743_CLK_RCAN	28
-+#define R8A7743_CLK_R		29
-+#define R8A7743_CLK_OSC		30
-+
-+#endif /* __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__ */
diff --git a/patches.renesas/0191-usb-xhci-remove-error-messages-for-failed-memory-all.patch b/patches.renesas/0191-usb-xhci-remove-error-messages-for-failed-memory-all.patch
deleted file mode 100644
index a55444046ef494..00000000000000
--- a/patches.renesas/0191-usb-xhci-remove-error-messages-for-failed-memory-all.patch
+++ /dev/null
@@ -1,115 +0,0 @@
-From ecc072c0aa5f3cc28ab1f8b14c57a8b138394bfa Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:57:05 +0300
-Subject: [PATCH 191/286] usb: xhci: remove error messages for failed memory
- allocation
-
-Omit extra messages for memory allocation failure.
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 74e0b5649c26428a4b87f496cef0df8307eff364)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-hub.c  |    4 +---
- drivers/usb/host/xhci-mem.c  |    1 -
- drivers/usb/host/xhci-ring.c |   10 ++++------
- drivers/usb/host/xhci.c      |   13 +++++++------
- 4 files changed, 12 insertions(+), 16 deletions(-)
-
---- a/drivers/usb/host/xhci-hub.c
-+++ b/drivers/usb/host/xhci-hub.c
-@@ -401,10 +401,8 @@ static int xhci_stop_device(struct xhci_
- 	trace_xhci_stop_device(virt_dev);
- 
- 	cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
--	if (!cmd) {
--		xhci_dbg(xhci, "Couldn't allocate command structure.\n");
-+	if (!cmd)
- 		return -ENOMEM;
--	}
- 
- 	spin_lock_irqsave(&xhci->lock, flags);
- 	for (i = LAST_EP_INDEX; i > 0; i--) {
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -2636,7 +2636,6 @@ int xhci_mem_init(struct xhci_hcd *xhci,
- 	return 0;
- 
- fail:
--	xhci_warn(xhci, "Couldn't initialize memory\n");
- 	xhci_halt(xhci);
- 	xhci_reset(xhci);
- 	xhci_mem_cleanup(xhci);
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1138,11 +1138,11 @@ static void xhci_handle_cmd_reset_ep(str
- 	 */
- 	if (xhci->quirks & XHCI_RESET_EP_QUIRK) {
- 		struct xhci_command *command;
-+
- 		command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
--		if (!command) {
--			xhci_warn(xhci, "WARN Cannot submit cfg ep: ENOMEM\n");
-+		if (!command)
- 			return;
--		}
-+
- 		xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
- 				"Queueing configure endpoint command");
- 		xhci_queue_configure_endpoint(xhci, command,
-@@ -4018,10 +4018,8 @@ void xhci_queue_new_dequeue_state(struct
- 
- 	/* This function gets called from contexts where it cannot sleep */
- 	cmd = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
--	if (!cmd) {
--		xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr: ENOMEM\n");
-+	if (!cmd)
- 		return;
--	}
- 
- 	ep->queued_deq_seg = deq_state->new_deq_seg;
- 	ep->queued_deq_ptr = deq_state->new_deq_ptr;
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -664,9 +664,11 @@ int xhci_run(struct usb_hcd *hcd)
- 
- 	if (xhci->quirks & XHCI_NEC_HOST) {
- 		struct xhci_command *command;
-+
- 		command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
- 		if (!command)
- 			return -ENOMEM;
-+
- 		xhci_queue_vendor_command(xhci, command, 0, 0, 0,
- 				TRB_TYPE(TRB_NEC_GET_FW));
- 	}
-@@ -3186,10 +3188,9 @@ static int xhci_alloc_streams(struct usb
- 	}
- 
- 	config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
--	if (!config_cmd) {
--		xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
-+	if (!config_cmd)
- 		return -ENOMEM;
--	}
-+
- 	ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
- 	if (!ctrl_ctx) {
- 		xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
-@@ -4795,11 +4796,11 @@ static int xhci_update_hub_device(struct
- 		xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
- 		return -EINVAL;
- 	}
-+
- 	config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
--	if (!config_cmd) {
--		xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
-+	if (!config_cmd)
- 		return -ENOMEM;
--	}
-+
- 	ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
- 	if (!ctrl_ctx) {
- 		xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
diff --git a/patches.renesas/0191-usb-xhci-use-list_is_singular-for-cmd_list.patch b/patches.renesas/0191-usb-xhci-use-list_is_singular-for-cmd_list.patch
deleted file mode 100644
index 0c15857eb3f7a5..00000000000000
--- a/patches.renesas/0191-usb-xhci-use-list_is_singular-for-cmd_list.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 103b843025dddaf40557b50aa0c4163311765e39 Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:02 +0200
-Subject: [PATCH 191/255] usb: xhci: use list_is_singular for cmd_list
-
-Use list_is_singular() to check if cmd_list has only one entry.
-
-[use list_empty() in queue command instead -Mathias]
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
-(cherry picked from commit daa47f2132dce31fcab7c6ebdcb957e598c768f2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1428,7 +1428,7 @@ static void handle_cmd_completion(struct
- 	}
- 
- 	/* restart timer if this wasn't the last command */
--	if (cmd->cmd_list.next != &xhci->cmd_list) {
-+	if (!list_is_singular(&xhci->cmd_list)) {
- 		xhci->current_cmd = list_entry(cmd->cmd_list.next,
- 					       struct xhci_command, cmd_list);
- 		xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
-@@ -3805,14 +3805,15 @@ static int queue_command(struct xhci_hcd
- 	}
- 
- 	cmd->command_trb = xhci->cmd_ring->enqueue;
--	list_add_tail(&cmd->cmd_list, &xhci->cmd_list);
- 
- 	/* if there are no other commands queued we start the timeout timer */
--	if (xhci->cmd_list.next == &cmd->cmd_list) {
-+	if (list_empty(&xhci->cmd_list)) {
- 		xhci->current_cmd = cmd;
- 		xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
- 	}
- 
-+	list_add_tail(&cmd->cmd_list, &xhci->cmd_list);
-+
- 	queue_trb(xhci, xhci->cmd_ring, false, field1, field2, field3,
- 			field4 | xhci->cmd_ring->cycle_state);
- 	return 0;
diff --git a/patches.renesas/0192-clk-renesas-Add-r8a7745-CPG-Core-Clock-Definitions.patch b/patches.renesas/0192-clk-renesas-Add-r8a7745-CPG-Core-Clock-Definitions.patch
deleted file mode 100644
index f94c68cb061eb1..00000000000000
--- a/patches.renesas/0192-clk-renesas-Add-r8a7745-CPG-Core-Clock-Definitions.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From a0ab454fc7f3ea08ae2471031895ebb9559322ed Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Thu, 27 Oct 2016 23:42:51 +0300
-Subject: [PATCH 192/299] clk: renesas: Add r8a7745 CPG Core Clock Definitions
-
-Add macros usable by the device tree sources to reference the R8A7745
-CPG clocks by index. The data comes from Table 7.2c in revision 1.00 of
-the RZ/G Series User's Manual.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 1fa8a875df6b8aa864f6c4f2b65dbc2ed477b859)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/dt-bindings/clock/r8a7745-cpg-mssr.h |   44 +++++++++++++++++++++++++++
- 1 file changed, 44 insertions(+)
- create mode 100644 include/dt-bindings/clock/r8a7745-cpg-mssr.h
-
---- /dev/null
-+++ b/include/dt-bindings/clock/r8a7745-cpg-mssr.h
-@@ -0,0 +1,44 @@
-+/*
-+ * Copyright (C) 2016 Cogent Embedded Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+#ifndef __DT_BINDINGS_CLOCK_R8A7745_CPG_MSSR_H__
-+#define __DT_BINDINGS_CLOCK_R8A7745_CPG_MSSR_H__
-+
-+#include <dt-bindings/clock/renesas-cpg-mssr.h>
-+
-+/* r8a7745 CPG Core Clocks */
-+#define R8A7745_CLK_Z2		0
-+#define R8A7745_CLK_ZG		1
-+#define R8A7745_CLK_ZTR		2
-+#define R8A7745_CLK_ZTRD2	3
-+#define R8A7745_CLK_ZT		4
-+#define R8A7745_CLK_ZX		5
-+#define R8A7745_CLK_ZS		6
-+#define R8A7745_CLK_HP		7
-+#define R8A7745_CLK_B		9
-+#define R8A7745_CLK_LB		10
-+#define R8A7745_CLK_P		11
-+#define R8A7745_CLK_CL		12
-+#define R8A7745_CLK_CP		13
-+#define R8A7745_CLK_M2		14
-+#define R8A7745_CLK_ZB3		16
-+#define R8A7745_CLK_ZB3D2	17
-+#define R8A7745_CLK_DDR		18
-+#define R8A7745_CLK_SDH		19
-+#define R8A7745_CLK_SD0		20
-+#define R8A7745_CLK_SD2		21
-+#define R8A7745_CLK_SD3		22
-+#define R8A7745_CLK_MMC0	23
-+#define R8A7745_CLK_MP		24
-+#define R8A7745_CLK_QSPI	25
-+#define R8A7745_CLK_CPEX	26
-+#define R8A7745_CLK_RCAN	27
-+#define R8A7745_CLK_R		28
-+#define R8A7745_CLK_OSC		29
-+
-+#endif /* __DT_BINDINGS_CLOCK_R8A7745_CPG_MSSR_H__ */
diff --git a/patches.renesas/0192-usb-host-xhci-change-pre-increments-to-post-incremen.patch b/patches.renesas/0192-usb-host-xhci-change-pre-increments-to-post-incremen.patch
deleted file mode 100644
index f3d78e9cca88fc..00000000000000
--- a/patches.renesas/0192-usb-host-xhci-change-pre-increments-to-post-incremen.patch
+++ /dev/null
@@ -1,209 +0,0 @@
-From 23f411e31f7d6c1a35a4be0d07e7545fa7e8fdec Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:04 +0200
-Subject: [PATCH 192/255] usb: host: xhci: change pre-increments to
- post-increments
-
-This is a cleanup patch only, no functional changes. The idea is just to
-make sure for loops look the same all over the driver.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 98871e9470a50c8c0154b7220495b60ec055e02f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-dbg.c |   20 ++++++++++----------
- drivers/usb/host/xhci-mem.c |    8 ++++----
- drivers/usb/host/xhci.c     |   14 +++++++-------
- 3 files changed, 21 insertions(+), 21 deletions(-)
-
---- a/drivers/usb/host/xhci-dbg.c
-+++ b/drivers/usb/host/xhci-dbg.c
-@@ -177,7 +177,7 @@ static void xhci_print_ports(struct xhci
- 	ports = HCS_MAX_PORTS(xhci->hcs_params1);
- 	addr = &xhci->op_regs->port_status_base;
- 	for (i = 0; i < ports; i++) {
--		for (j = 0; j < NUM_PORT_REGS; ++j) {
-+		for (j = 0; j < NUM_PORT_REGS; j++) {
- 			xhci_dbg(xhci, "%p port %s reg = 0x%x\n",
- 					addr, names[j],
- 					(unsigned int) readl(addr));
-@@ -240,7 +240,7 @@ void xhci_print_run_regs(struct xhci_hcd
- 	xhci_dbg(xhci, "  %p: Microframe index = 0x%x\n",
- 			&xhci->run_regs->microframe_index,
- 			(unsigned int) temp);
--	for (i = 0; i < 7; ++i) {
-+	for (i = 0; i < 7; i++) {
- 		temp = readl(&xhci->run_regs->rsvd[i]);
- 		if (temp != XHCI_INIT_VALUE)
- 			xhci_dbg(xhci, "  WARN: %p: Rsvd[%i] = 0x%x\n",
-@@ -259,7 +259,7 @@ void xhci_print_registers(struct xhci_hc
- void xhci_print_trb_offsets(struct xhci_hcd *xhci, union xhci_trb *trb)
- {
- 	int i;
--	for (i = 0; i < 4; ++i)
-+	for (i = 0; i < 4; i++)
- 		xhci_dbg(xhci, "Offset 0x%x = 0x%x\n",
- 				i*4, trb->generic.field[i]);
- }
-@@ -332,7 +332,7 @@ void xhci_debug_segment(struct xhci_hcd
- 	u64 addr = seg->dma;
- 	union xhci_trb *trb = seg->trbs;
- 
--	for (i = 0; i < TRBS_PER_SEGMENT; ++i) {
-+	for (i = 0; i < TRBS_PER_SEGMENT; i++) {
- 		trb = &seg->trbs[i];
- 		xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n", addr,
- 			 lower_32_bits(le64_to_cpu(trb->link.segment_ptr)),
-@@ -413,7 +413,7 @@ void xhci_dbg_erst(struct xhci_hcd *xhci
- 	int i;
- 	struct xhci_erst_entry *entry;
- 
--	for (i = 0; i < erst->num_entries; ++i) {
-+	for (i = 0; i < erst->num_entries; i++) {
- 		entry = &erst->entries[i];
- 		xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n",
- 			 addr,
-@@ -440,7 +440,7 @@ void xhci_dbg_cmd_ptrs(struct xhci_hcd *
- static void dbg_rsvd64(struct xhci_hcd *xhci, u64 *ctx, dma_addr_t dma)
- {
- 	int i;
--	for (i = 0; i < 4; ++i) {
-+	for (i = 0; i < 4; i++) {
- 		xhci_dbg(xhci, "@%p (virt) @%08llx "
- 			 "(dma) %#08llx - rsvd64[%d]\n",
- 			 &ctx[4 + i], (unsigned long long)dma,
-@@ -496,7 +496,7 @@ static void xhci_dbg_slot_ctx(struct xhc
- 			&slot_ctx->dev_state,
- 			(unsigned long long)dma, slot_ctx->dev_state);
- 	dma += field_size;
--	for (i = 0; i < 4; ++i) {
-+	for (i = 0; i < 4; i++) {
- 		xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n",
- 				&slot_ctx->reserved[i], (unsigned long long)dma,
- 				slot_ctx->reserved[i], i);
-@@ -519,7 +519,7 @@ static void xhci_dbg_ep_ctx(struct xhci_
- 
- 	if (last_ep < 31)
- 		last_ep_ctx = last_ep + 1;
--	for (i = 0; i < last_ep_ctx; ++i) {
-+	for (i = 0; i < last_ep_ctx; i++) {
- 		unsigned int epaddr = xhci_get_endpoint_address(i);
- 		struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, ctx, i);
- 		dma_addr_t dma = ctx->dma +
-@@ -544,7 +544,7 @@ static void xhci_dbg_ep_ctx(struct xhci_
- 				&ep_ctx->tx_info,
- 				(unsigned long long)dma, ep_ctx->tx_info);
- 		dma += field_size;
--		for (j = 0; j < 3; ++j) {
-+		for (j = 0; j < 3; j++) {
- 			xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n",
- 					&ep_ctx->reserved[j],
- 					(unsigned long long)dma,
-@@ -583,7 +583,7 @@ void xhci_dbg_ctx(struct xhci_hcd *xhci,
- 			 &ctrl_ctx->add_flags, (unsigned long long)dma,
- 			 ctrl_ctx->add_flags);
- 		dma += field_size;
--		for (i = 0; i < 6; ++i) {
-+		for (i = 0; i < 6; i++) {
- 			xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd2[%d]\n",
- 				 &ctrl_ctx->rsvd2[i], (unsigned long long)dma,
- 				 ctrl_ctx->rsvd2[i], i);
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -943,7 +943,7 @@ void xhci_free_virt_device(struct xhci_h
- 	if (dev->tt_info)
- 		old_active_eps = dev->tt_info->active_eps;
- 
--	for (i = 0; i < 31; ++i) {
-+	for (i = 0; i < 31; i++) {
- 		if (dev->eps[i].ring)
- 			xhci_ring_free(xhci, dev->eps[i].ring);
- 		if (dev->eps[i].stream_info)
-@@ -1615,7 +1615,7 @@ void xhci_update_bw_info(struct xhci_hcd
- 	unsigned int ep_type;
- 	int i;
- 
--	for (i = 1; i < 31; ++i) {
-+	for (i = 1; i < 31; i++) {
- 		bw_info = &virt_dev->eps[i].bw_info;
- 
- 		/* We can't tell what endpoint type is being dropped, but
-@@ -2600,9 +2600,9 @@ int xhci_mem_init(struct xhci_hcd *xhci,
- 	 * something other than the default (~1ms minimum between interrupts).
- 	 * See section 5.5.1.2.
- 	 */
--	for (i = 0; i < MAX_HC_SLOTS; ++i)
-+	for (i = 0; i < MAX_HC_SLOTS; i++)
- 		xhci->devs[i] = NULL;
--	for (i = 0; i < USB_MAXCHILDREN; ++i) {
-+	for (i = 0; i < USB_MAXCHILDREN; i++) {
- 		xhci->bus_state[0].resume_done[i] = 0;
- 		xhci->bus_state[1].resume_done[i] = 0;
- 		/* Only the USB 2.0 completions will ever be used. */
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -210,7 +210,7 @@ int xhci_reset(struct xhci_hcd *xhci)
- 	ret = xhci_handshake(&xhci->op_regs->status,
- 			STS_CNR, 0, 10 * 1000 * 1000);
- 
--	for (i = 0; i < 2; ++i) {
-+	for (i = 0; i < 2; i++) {
- 		xhci->bus_state[i].port_c_suspend = 0;
- 		xhci->bus_state[i].suspended_ports = 0;
- 		xhci->bus_state[i].resuming_ports = 0;
-@@ -1853,7 +1853,7 @@ static void xhci_zero_in_ctx(struct xhci
- 	slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
- 	/* Endpoint 0 is always valid */
- 	slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
--	for (i = 1; i < 31; ++i) {
-+	for (i = 1; i < 31; i++) {
- 		ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
- 		ep_ctx->ep_info = 0;
- 		ep_ctx->ep_info2 = 0;
-@@ -2825,7 +2825,7 @@ int xhci_check_bandwidth(struct usb_hcd
- 		     LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
- 
- 	/* Free any rings that were dropped, but not changed. */
--	for (i = 1; i < 31; ++i) {
-+	for (i = 1; i < 31; i++) {
- 		if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
- 		    !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
- 			xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
-@@ -2837,7 +2837,7 @@ int xhci_check_bandwidth(struct usb_hcd
- 	 * Install any rings for completely new endpoints or changed endpoints,
- 	 * and free or cache any old rings from changed endpoints.
- 	 */
--	for (i = 1; i < 31; ++i) {
-+	for (i = 1; i < 31; i++) {
- 		if (!virt_dev->eps[i].new_ring)
- 			continue;
- 		/* Only cache or free the old ring if it exists.
-@@ -2871,7 +2871,7 @@ void xhci_reset_bandwidth(struct usb_hcd
- 	xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
- 	virt_dev = xhci->devs[udev->slot_id];
- 	/* Free any rings allocated for added endpoints */
--	for (i = 0; i < 31; ++i) {
-+	for (i = 0; i < 31; i++) {
- 		if (virt_dev->eps[i].new_ring) {
- 			xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
- 			virt_dev->eps[i].new_ring = NULL;
-@@ -3577,7 +3577,7 @@ int xhci_discover_or_reset_device(struct
- 
- 	/* Everything but endpoint 0 is disabled, so free or cache the rings. */
- 	last_freed_endpoint = 1;
--	for (i = 1; i < 31; ++i) {
-+	for (i = 1; i < 31; i++) {
- 		struct xhci_virt_ep *ep = &virt_dev->eps[i];
- 
- 		if (ep->ep_state & EP_HAS_STREAMS) {
-@@ -3653,7 +3653,7 @@ void xhci_free_dev(struct usb_hcd *hcd,
- 	virt_dev = xhci->devs[udev->slot_id];
- 
- 	/* Stop any wayward timer functions (which may grab the lock) */
--	for (i = 0; i < 31; ++i) {
-+	for (i = 0; i < 31; i++) {
- 		virt_dev->eps[i].ep_state &= ~EP_STOP_CMD_PENDING;
- 		del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
- 	}
diff --git a/patches.renesas/0192-usb-xhci-remove-enq_updates-and-deq_updates-from-rin.patch b/patches.renesas/0192-usb-xhci-remove-enq_updates-and-deq_updates-from-rin.patch
deleted file mode 100644
index 5e2a1e78fdfbd0..00000000000000
--- a/patches.renesas/0192-usb-xhci-remove-enq_updates-and-deq_updates-from-rin.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From 3785f93447efda502d8ace0118e23959d18d38c5 Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:57:06 +0300
-Subject: [PATCH 192/286] usb: xhci: remove enq_updates and deq_updates from
- ring
-
-enq_updates and deq_updates were introduced in the first place
-to check whether an xhci hardware is able to respond to trbs
-enqueued in the ring. We now have trb tracers to trace every
-single enqueue/dequeue trb. It's time to remove them and the
-associated debugging code.
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit cd12fd9f6d05d1b2b9ff2630802c55b5fd2e534c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-dbg.c  |    8 --------
- drivers/usb/host/xhci-mem.c  |    3 ---
- drivers/usb/host/xhci-ring.c |    3 ---
- drivers/usb/host/xhci.h      |    2 --
- 4 files changed, 16 deletions(-)
-
---- a/drivers/usb/host/xhci-dbg.c
-+++ b/drivers/usb/host/xhci-dbg.c
-@@ -347,14 +347,10 @@ void xhci_dbg_ring_ptrs(struct xhci_hcd
- 			ring->dequeue,
- 			(unsigned long long)xhci_trb_virt_to_dma(ring->deq_seg,
- 							    ring->dequeue));
--	xhci_dbg(xhci, "Ring deq updated %u times\n",
--			ring->deq_updates);
- 	xhci_dbg(xhci, "Ring enq = %p (virt), 0x%llx (dma)\n",
- 			ring->enqueue,
- 			(unsigned long long)xhci_trb_virt_to_dma(ring->enq_seg,
- 							    ring->enqueue));
--	xhci_dbg(xhci, "Ring enq updated %u times\n",
--			ring->enq_updates);
- }
- 
- /**
-@@ -373,10 +369,6 @@ void xhci_debug_ring(struct xhci_hcd *xh
- 	struct xhci_segment *first_seg = ring->first_seg;
- 	xhci_debug_segment(xhci, first_seg);
- 
--	if (!ring->enq_updates && !ring->deq_updates) {
--		xhci_dbg(xhci, "  Ring has not been updated\n");
--		return;
--	}
- 	for (seg = first_seg->next; seg != first_seg; seg = seg->next)
- 		xhci_debug_segment(xhci, seg);
- }
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -315,9 +315,6 @@ static void xhci_initialize_ring_info(st
- 	 * handling ring expansion, set the cycle state equal to the old ring.
- 	 */
- 	ring->cycle_state = cycle_state;
--	/* Not necessary for new rings, but needed for re-initialized rings */
--	ring->enq_updates = 0;
--	ring->deq_updates = 0;
- 
- 	/*
- 	 * Each segment has a link TRB, and leave an extra TRB for SW
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -167,8 +167,6 @@ static void next_trb(struct xhci_hcd *xh
-  */
- static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring)
- {
--	ring->deq_updates++;
--
- 	/* event ring doesn't have link trbs, check for last trb */
- 	if (ring->type == TYPE_EVENT) {
- 		if (!last_trb_on_seg(ring->deq_seg, ring->dequeue)) {
-@@ -226,7 +224,6 @@ static void inc_enq(struct xhci_hcd *xhc
- 		ring->num_trbs_free--;
- 	next = ++(ring->enqueue);
- 
--	ring->enq_updates++;
- 	/* Update the dequeue pointer further if that was a link TRB */
- 	while (trb_is_link(next)) {
- 
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1570,10 +1570,8 @@ struct xhci_ring {
- 	struct xhci_segment	*last_seg;
- 	union  xhci_trb		*enqueue;
- 	struct xhci_segment	*enq_seg;
--	unsigned int		enq_updates;
- 	union  xhci_trb		*dequeue;
- 	struct xhci_segment	*deq_seg;
--	unsigned int		deq_updates;
- 	struct list_head	td_list;
- 	/*
- 	 * Write the cycle state into the TRB cycle field to give ownership of
diff --git a/patches.renesas/0193-clk-renesas-r8a7796-Add-CSI2-clocks.patch b/patches.renesas/0193-clk-renesas-r8a7796-Add-CSI2-clocks.patch
deleted file mode 100644
index d1330b95f4b8e3..00000000000000
--- a/patches.renesas/0193-clk-renesas-r8a7796-Add-CSI2-clocks.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 2a6c71b94360555b91405356b306a6c9e4af437e Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Tue, 1 Nov 2016 21:12:24 +0100
-Subject: [PATCH 193/299] clk: renesas: r8a7796: Add CSI2 clocks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 5fccac6d945b84e056b8b3b7083a151faaf2492c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -103,6 +103,8 @@ static const struct cpg_core_clk r8a7796
- 	DEF_FIXED("cl",         R8A7796_CLK_CL,    CLK_PLL1_DIV2, 48, 1),
- 	DEF_FIXED("cp",         R8A7796_CLK_CP,    CLK_EXTAL,      2, 1),
- 
-+	DEF_DIV6P1("csi0",      R8A7796_CLK_CSI0,  CLK_PLL1_DIV4, 0x00c),
-+
- 	DEF_DIV6_RO("osc",      R8A7796_CLK_OSC,   CLK_EXTAL, CPG_RCKCR,  8),
- 	DEF_DIV6_RO("r_int",    CLK_RINT,          CLK_EXTAL, CPG_RCKCR, 32),
- 
-@@ -156,6 +158,8 @@ static const struct mssr_mod_clk r8a7796
- 	DEF_MOD("vspd0",		 623,	R8A7796_CLK_S0D2),
- 	DEF_MOD("vspb",			 626,	R8A7796_CLK_S0D1),
- 	DEF_MOD("vspi0",		 631,	R8A7796_CLK_S0D1),
-+	DEF_MOD("csi20",		 714,	R8A7796_CLK_CSI0),
-+	DEF_MOD("csi40",		 716,	R8A7796_CLK_CSI0),
- 	DEF_MOD("du2",			 722,	R8A7796_CLK_S2D1),
- 	DEF_MOD("du1",			 723,	R8A7796_CLK_S2D1),
- 	DEF_MOD("du0",			 724,	R8A7796_CLK_S2D1),
diff --git a/patches.renesas/0193-usb-host-xhci-print-HCIVERSION-on-debug.patch b/patches.renesas/0193-usb-host-xhci-print-HCIVERSION-on-debug.patch
deleted file mode 100644
index 752b2ea1d01a77..00000000000000
--- a/patches.renesas/0193-usb-host-xhci-print-HCIVERSION-on-debug.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 0c318f2a25f85db18c6febf5b722732bc0c8ff5f Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:05 +0200
-Subject: [PATCH 193/255] usb: host: xhci: print HCIVERSION on debug
-
-When calling xhci_dbg_regs() we actually _do_ want to know XHCI's
-version. This might help figure out why certain problems only happen
-in some cases.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit ced09c95963795374c7f8710eeabca1d734315e2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-dbg.c |    2 --
- 1 file changed, 2 deletions(-)
-
---- a/drivers/usb/host/xhci-dbg.c
-+++ b/drivers/usb/host/xhci-dbg.c
-@@ -37,10 +37,8 @@ void xhci_dbg_regs(struct xhci_hcd *xhci
- 			&xhci->cap_regs->hc_capbase, temp);
- 	xhci_dbg(xhci, "//   CAPLENGTH: 0x%x\n",
- 			(unsigned int) HC_LENGTH(temp));
--#if 0
- 	xhci_dbg(xhci, "//   HCIVERSION: 0x%x\n",
- 			(unsigned int) HC_VERSION(temp));
--#endif
- 
- 	xhci_dbg(xhci, "// xHCI operational registers at %p:\n", xhci->op_regs);
- 
diff --git a/patches.renesas/0193-usb-xhci-remove-ring-debugging-code.patch b/patches.renesas/0193-usb-xhci-remove-ring-debugging-code.patch
deleted file mode 100644
index d89f37f56ea375..00000000000000
--- a/patches.renesas/0193-usb-xhci-remove-ring-debugging-code.patch
+++ /dev/null
@@ -1,145 +0,0 @@
-From d64e53c04b734498ee72b6a47c31e784d002054c Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:57:07 +0300
-Subject: [PATCH 193/286] usb: xhci: remove ring debugging code
-
-XHCI ring changes have already been traced by the ring trace
-events. It's unnecessary to put the same messages in kernel
-log. This patch removes the debugging code for a ring.
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 121dcf11908ecea252776c8268aab117f91aa1f5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-dbg.c  |   62 -------------------------------------------
- drivers/usb/host/xhci-ring.c |    4 --
- drivers/usb/host/xhci.c      |    6 ----
- drivers/usb/host/xhci.h      |    3 --
- 4 files changed, 75 deletions(-)
-
---- a/drivers/usb/host/xhci-dbg.c
-+++ b/drivers/usb/host/xhci-dbg.c
-@@ -311,68 +311,6 @@ void xhci_debug_trb(struct xhci_hcd *xhc
- 	}
- }
- 
--/**
-- * Debug a segment with an xHCI ring.
-- *
-- * @return The Link TRB of the segment, or NULL if there is no Link TRB
-- * (which is a bug, since all segments must have a Link TRB).
-- *
-- * Prints out all TRBs in the segment, even those after the Link TRB.
-- *
-- * XXX: should we print out TRBs that the HC owns?  As long as we don't
-- * write, that should be fine...  We shouldn't expect that the memory pointed to
-- * by the TRB is valid at all.  Do we care about ones the HC owns?  Probably,
-- * for HC debugging.
-- */
--void xhci_debug_segment(struct xhci_hcd *xhci, struct xhci_segment *seg)
--{
--	int i;
--	u64 addr = seg->dma;
--	union xhci_trb *trb = seg->trbs;
--
--	for (i = 0; i < TRBS_PER_SEGMENT; i++) {
--		trb = &seg->trbs[i];
--		xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n", addr,
--			 lower_32_bits(le64_to_cpu(trb->link.segment_ptr)),
--			 upper_32_bits(le64_to_cpu(trb->link.segment_ptr)),
--			 le32_to_cpu(trb->link.intr_target),
--			 le32_to_cpu(trb->link.control));
--		addr += sizeof(*trb);
--	}
--}
--
--void xhci_dbg_ring_ptrs(struct xhci_hcd *xhci, struct xhci_ring *ring)
--{
--	xhci_dbg(xhci, "Ring deq = %p (virt), 0x%llx (dma)\n",
--			ring->dequeue,
--			(unsigned long long)xhci_trb_virt_to_dma(ring->deq_seg,
--							    ring->dequeue));
--	xhci_dbg(xhci, "Ring enq = %p (virt), 0x%llx (dma)\n",
--			ring->enqueue,
--			(unsigned long long)xhci_trb_virt_to_dma(ring->enq_seg,
--							    ring->enqueue));
--}
--
--/**
-- * Debugging for an xHCI ring, which is a queue broken into multiple segments.
-- *
-- * Print out each segment in the ring.  Check that the DMA address in
-- * each link segment actually matches the segment's stored DMA address.
-- * Check that the link end bit is only set at the end of the ring.
-- * Check that the dequeue and enqueue pointers point to real data in this ring
-- * (not some other ring).
-- */
--void xhci_debug_ring(struct xhci_hcd *xhci, struct xhci_ring *ring)
--{
--	/* FIXME: Throw an error if any segment doesn't have a Link TRB */
--	struct xhci_segment *seg;
--	struct xhci_segment *first_seg = ring->first_seg;
--	xhci_debug_segment(xhci, first_seg);
--
--	for (seg = first_seg->next; seg != first_seg; seg = seg->next)
--		xhci_debug_segment(xhci, seg);
--}
--
- void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst)
- {
- 	u64 addr = erst->erst_dma_addr;
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -2295,8 +2295,6 @@ static int handle_tx_event(struct xhci_h
- 			 upper_32_bits(le64_to_cpu(event->buffer)),
- 			 le32_to_cpu(event->transfer_len),
- 			 le32_to_cpu(event->flags));
--		xhci_dbg(xhci, "Event ring:\n");
--		xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
- 		return -ENODEV;
- 	}
- 
-@@ -2317,8 +2315,6 @@ static int handle_tx_event(struct xhci_h
- 			 upper_32_bits(le64_to_cpu(event->buffer)),
- 			 le32_to_cpu(event->transfer_len),
- 			 le32_to_cpu(event->flags));
--		xhci_dbg(xhci, "Event ring:\n");
--		xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
- 		return -ENODEV;
- 	}
- 
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -622,16 +622,10 @@ int xhci_run(struct usb_hcd *hcd)
- 	if (ret)
- 		return ret;
- 
--	xhci_dbg(xhci, "Command ring memory map follows:\n");
--	xhci_debug_ring(xhci, xhci->cmd_ring);
--	xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
- 	xhci_dbg_cmd_ptrs(xhci);
- 
- 	xhci_dbg(xhci, "ERST memory map follows:\n");
- 	xhci_dbg_erst(xhci, &xhci->erst);
--	xhci_dbg(xhci, "Event ring:\n");
--	xhci_debug_ring(xhci, xhci->event_ring);
--	xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
- 	temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
- 	temp_64 &= ~ERST_PTR_MASK;
- 	xhci_dbg_trace(xhci, trace_xhci_dbg_init,
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1930,11 +1930,8 @@ void xhci_dbg_regs(struct xhci_hcd *xhci
- void xhci_print_run_regs(struct xhci_hcd *xhci);
- void xhci_print_trb_offsets(struct xhci_hcd *xhci, union xhci_trb *trb);
- void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb);
--void xhci_debug_segment(struct xhci_hcd *xhci, struct xhci_segment *seg);
--void xhci_debug_ring(struct xhci_hcd *xhci, struct xhci_ring *ring);
- void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst);
- void xhci_dbg_cmd_ptrs(struct xhci_hcd *xhci);
--void xhci_dbg_ring_ptrs(struct xhci_hcd *xhci, struct xhci_ring *ring);
- void xhci_dbg_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx, unsigned int last_ep);
- char *xhci_get_slot_state(struct xhci_hcd *xhci,
- 		struct xhci_container_ctx *ctx);
diff --git a/patches.renesas/0194-clk-renesas-r8a7796-Add-VIN-clocks.patch b/patches.renesas/0194-clk-renesas-r8a7796-Add-VIN-clocks.patch
deleted file mode 100644
index c4125204969a33..00000000000000
--- a/patches.renesas/0194-clk-renesas-r8a7796-Add-VIN-clocks.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 0c95f679c19c2ac400d8ca2ba7692dca5fe23980 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Tue, 1 Nov 2016 21:12:25 +0100
-Subject: [PATCH 194/299] clk: renesas: r8a7796: Add VIN clocks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit e6e3558626f6dbc16bc13587a1a981dc2446300e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7796-cpg-mssr.c |    8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
-@@ -164,6 +164,14 @@ static const struct mssr_mod_clk r8a7796
- 	DEF_MOD("du1",			 723,	R8A7796_CLK_S2D1),
- 	DEF_MOD("du0",			 724,	R8A7796_CLK_S2D1),
- 	DEF_MOD("lvds",			 727,	R8A7796_CLK_S2D1),
-+	DEF_MOD("vin7",			 804,	R8A7796_CLK_S0D2),
-+	DEF_MOD("vin6",			 805,	R8A7796_CLK_S0D2),
-+	DEF_MOD("vin5",			 806,	R8A7796_CLK_S0D2),
-+	DEF_MOD("vin4",			 807,	R8A7796_CLK_S0D2),
-+	DEF_MOD("vin3",			 808,	R8A7796_CLK_S0D2),
-+	DEF_MOD("vin2",			 809,	R8A7796_CLK_S0D2),
-+	DEF_MOD("vin1",			 810,	R8A7796_CLK_S0D2),
-+	DEF_MOD("vin0",			 811,	R8A7796_CLK_S0D2),
- 	DEF_MOD("etheravb",		 812,	R8A7796_CLK_S0D6),
- 	DEF_MOD("gpio7",		 905,	R8A7796_CLK_S3D4),
- 	DEF_MOD("gpio6",		 906,	R8A7796_CLK_S3D4),
diff --git a/patches.renesas/0194-usb-host-xhci-rename-completion-codes-to-match-spec.patch b/patches.renesas/0194-usb-host-xhci-rename-completion-codes-to-match-spec.patch
deleted file mode 100644
index ea5259544f05ec..00000000000000
--- a/patches.renesas/0194-usb-host-xhci-rename-completion-codes-to-match-spec.patch
+++ /dev/null
@@ -1,645 +0,0 @@
-From f7ddfde30b9abf4c11431393a9d13eae3a3c8a7c Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:06 +0200
-Subject: [PATCH 194/255] usb: host: xhci: rename completion codes to match
- spec
-
-Cleanup only. This patch is a mechaninal rename to make sure our macros
-for TRB completion codes match what the specification uses to refer to
-such errors. The idea behind this is that it makes it far easier to grep
-the specification and match it with implementation.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 0b7c105a04ca793acf5d39ff9bafebe89182fc6b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-hub.c  |    3 -
- drivers/usb/host/xhci-ring.c |  124 +++++++++++++++++++++----------------------
- drivers/usb/host/xhci.c      |   48 ++++++++--------
- drivers/usb/host/xhci.h      |  106 ++++++++++++------------------------
- 4 files changed, 124 insertions(+), 157 deletions(-)
-
---- a/drivers/usb/host/xhci-hub.c
-+++ b/drivers/usb/host/xhci-hub.c
-@@ -437,7 +437,8 @@ static int xhci_stop_device(struct xhci_
- 	/* Wait for last stop endpoint command to finish */
- 	wait_for_completion(cmd->completion);
- 
--	if (cmd->status == COMP_CMD_ABORT || cmd->status == COMP_CMD_STOP) {
-+	if (cmd->status == COMP_COMMAND_ABORTED ||
-+			cmd->status == COMP_STOPPED) {
- 		xhci_warn(xhci, "Timeout while waiting for stop endpoint command\n");
- 		ret = -ETIME;
- 	}
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -304,10 +304,10 @@ static void xhci_handle_stopped_cmd_ring
- 	/* Turn all aborted commands in list to no-ops, then restart */
- 	list_for_each_entry(i_cmd, &xhci->cmd_list, cmd_list) {
- 
--		if (i_cmd->status != COMP_CMD_ABORT)
-+		if (i_cmd->status != COMP_COMMAND_ABORTED)
- 			continue;
- 
--		i_cmd->status = COMP_CMD_STOP;
-+		i_cmd->status = COMP_STOPPED;
- 
- 		xhci_dbg(xhci, "Turn aborted command %p to no-op\n",
- 			 i_cmd->command_trb);
-@@ -1041,10 +1041,10 @@ static void xhci_handle_cmd_set_deq(stru
- 		unsigned int slot_state;
- 
- 		switch (cmd_comp_code) {
--		case COMP_TRB_ERR:
-+		case COMP_TRB_ERROR:
- 			xhci_warn(xhci, "WARN Set TR Deq Ptr cmd invalid because of stream ID configuration\n");
- 			break;
--		case COMP_CTX_STATE:
-+		case COMP_CONTEXT_STATE_ERROR:
- 			xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due to incorrect slot or ep state.\n");
- 			ep_state = GET_EP_CTX_STATE(ep_ctx);
- 			slot_state = le32_to_cpu(slot_ctx->dev_state);
-@@ -1053,7 +1053,7 @@ static void xhci_handle_cmd_set_deq(stru
- 					"Slot state = %u, EP state = %u",
- 					slot_state, ep_state);
- 			break;
--		case COMP_EBADSLT:
-+		case COMP_SLOT_NOT_ENABLED_ERROR:
- 			xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed because slot %u was not enabled.\n",
- 					slot_id);
- 			break;
-@@ -1250,7 +1250,7 @@ void xhci_cleanup_command_queue(struct x
- {
- 	struct xhci_command *cur_cmd, *tmp_cmd;
- 	list_for_each_entry_safe(cur_cmd, tmp_cmd, &xhci->cmd_list, cmd_list)
--		xhci_complete_del_and_free_cmd(cur_cmd, COMP_CMD_ABORT);
-+		xhci_complete_del_and_free_cmd(cur_cmd, COMP_COMMAND_ABORTED);
- }
- 
- void xhci_handle_command_timeout(struct work_struct *work)
-@@ -1273,7 +1273,7 @@ void xhci_handle_command_timeout(struct
- 		return;
- 	}
- 	/* mark this command to be cancelled */
--	xhci->current_cmd->status = COMP_CMD_ABORT;
-+	xhci->current_cmd->status = COMP_COMMAND_ABORTED;
- 
- 	/* Make sure command ring is running before aborting it */
- 	hw_ring_state = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
-@@ -1347,7 +1347,7 @@ static void handle_cmd_completion(struct
- 	cmd_comp_code = GET_COMP_CODE(le32_to_cpu(event->status));
- 
- 	/* If CMD ring stopped we own the trbs between enqueue and dequeue */
--	if (cmd_comp_code == COMP_CMD_STOP) {
-+	if (cmd_comp_code == COMP_STOPPED) {
- 		complete_all(&xhci->cmd_ring_stop_completion);
- 		return;
- 	}
-@@ -1364,9 +1364,9 @@ static void handle_cmd_completion(struct
- 	 * The command ring is stopped now, but the xHC will issue a Command
- 	 * Ring Stopped event which will cause us to restart it.
- 	 */
--	if (cmd_comp_code == COMP_CMD_ABORT) {
-+	if (cmd_comp_code == COMP_COMMAND_ABORTED) {
- 		xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
--		if (cmd->status == COMP_CMD_ABORT) {
-+		if (cmd->status == COMP_COMMAND_ABORTED) {
- 			if (xhci->current_cmd == cmd)
- 				xhci->current_cmd = NULL;
- 			goto event_handled;
-@@ -1402,8 +1402,8 @@ static void handle_cmd_completion(struct
- 		break;
- 	case TRB_CMD_NOOP:
- 		/* Is this an aborted command turned to NO-OP? */
--		if (cmd->status == COMP_CMD_STOP)
--			cmd_comp_code = COMP_CMD_STOP;
-+		if (cmd->status == COMP_STOPPED)
-+			cmd_comp_code = COMP_STOPPED;
- 		break;
- 	case TRB_RESET_EP:
- 		WARN_ON(slot_id != TRB_TO_SLOT_ID(
-@@ -1796,9 +1796,9 @@ static int xhci_requires_manual_halt_cle
- 		unsigned int trb_comp_code)
- {
- 	/* TRB completion codes that may require a manual halt cleanup */
--	if (trb_comp_code == COMP_TX_ERR ||
--			trb_comp_code == COMP_BABBLE ||
--			trb_comp_code == COMP_SPLIT_ERR)
-+	if (trb_comp_code == COMP_USB_TRANSACTION_ERROR ||
-+			trb_comp_code == COMP_BABBLE_DETECTED_ERROR ||
-+			trb_comp_code == COMP_SPLIT_TRANSACTION_ERROR)
- 		/* The 0.95 spec says a babbling control endpoint
- 		 * is not halted. The 0.96 spec says it is.  Some HW
- 		 * claims to be 0.95 compliant, but it halts the control
-@@ -1852,9 +1852,9 @@ static int finish_td(struct xhci_hcd *xh
- 	if (skip)
- 		goto td_cleanup;
- 
--	if (trb_comp_code == COMP_STOP_INVAL ||
--			trb_comp_code == COMP_STOP ||
--			trb_comp_code == COMP_STOP_SHORT) {
-+	if (trb_comp_code == COMP_STOPPED_LENGTH_INVALID ||
-+			trb_comp_code == COMP_STOPPED ||
-+			trb_comp_code == COMP_STOPPED_SHORT_PACKET) {
- 		/* The Endpoint Stop Command completion will take care of any
- 		 * stopped TDs.  A stopped TD may be restarted, so don't update
- 		 * the ring dequeue pointer or take this TD off any lists yet.
-@@ -1862,7 +1862,7 @@ static int finish_td(struct xhci_hcd *xh
- 		ep->stopped_td = td;
- 		return 0;
- 	}
--	if (trb_comp_code == COMP_STALL ||
-+	if (trb_comp_code == COMP_STALL_ERROR ||
- 		xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
- 						trb_comp_code)) {
- 		/* Issue a reset endpoint command to clear the host side
-@@ -1973,16 +1973,16 @@ static int process_ctrl_td(struct xhci_h
- 		}
- 		*status = 0;
- 		break;
--	case COMP_SHORT_TX:
-+	case COMP_SHORT_PACKET:
- 		*status = 0;
- 		break;
--	case COMP_STOP_SHORT:
-+	case COMP_STOPPED_SHORT_PACKET:
- 		if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
- 			td->urb->actual_length = remaining;
- 		else
- 			xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n");
- 		goto finish_td;
--	case COMP_STOP:
-+	case COMP_STOPPED:
- 		switch (trb_type) {
- 		case TRB_SETUP:
- 			td->urb->actual_length = 0;
-@@ -1996,7 +1996,7 @@ static int process_ctrl_td(struct xhci_h
- 				  trb_type);
- 			goto finish_td;
- 		}
--	case COMP_STOP_INVAL:
-+	case COMP_STOPPED_LENGTH_INVALID:
- 		goto finish_td;
- 	default:
- 		if (!xhci_requires_manual_halt_cleanup(xhci,
-@@ -2005,7 +2005,7 @@ static int process_ctrl_td(struct xhci_h
- 		xhci_dbg(xhci, "TRB error %u, halted endpoint index = %u\n",
- 			 trb_comp_code, ep_index);
- 		/* else fall through */
--	case COMP_STALL:
-+	case COMP_STALL_ERROR:
- 		/* Did we transfer part of the data (middle) phase? */
- 		if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
- 			td->urb->actual_length = requested - remaining;
-@@ -2076,35 +2076,35 @@ static int process_isoc_td(struct xhci_h
- 		}
- 		frame->status = 0;
- 		break;
--	case COMP_SHORT_TX:
-+	case COMP_SHORT_PACKET:
- 		frame->status = short_framestatus;
- 		sum_trbs_for_length = true;
- 		break;
--	case COMP_BW_OVER:
-+	case COMP_BANDWIDTH_OVERRUN_ERROR:
- 		frame->status = -ECOMM;
- 		break;
--	case COMP_BUFF_OVER:
--	case COMP_BABBLE:
-+	case COMP_ISOCH_BUFFER_OVERRUN:
-+	case COMP_BABBLE_DETECTED_ERROR:
- 		frame->status = -EOVERFLOW;
- 		break;
--	case COMP_DEV_ERR:
--	case COMP_STALL:
-+	case COMP_INCOMPATIBLE_DEVICE_ERROR:
-+	case COMP_STALL_ERROR:
- 		frame->status = -EPROTO;
- 		break;
--	case COMP_TX_ERR:
-+	case COMP_USB_TRANSACTION_ERROR:
- 		frame->status = -EPROTO;
- 		if (ep_trb != td->last_trb)
- 			return 0;
- 		break;
--	case COMP_STOP:
-+	case COMP_STOPPED:
- 		sum_trbs_for_length = true;
- 		break;
--	case COMP_STOP_SHORT:
-+	case COMP_STOPPED_SHORT_PACKET:
- 		/* field normally containing residue now contains tranferred */
- 		frame->status = short_framestatus;
- 		requested = remaining;
- 		break;
--	case COMP_STOP_INVAL:
-+	case COMP_STOPPED_LENGTH_INVALID:
- 		requested = 0;
- 		remaining = 0;
- 		break;
-@@ -2181,16 +2181,16 @@ static int process_bulk_intr_td(struct x
- 		}
- 		*status = 0;
- 		break;
--	case COMP_SHORT_TX:
-+	case COMP_SHORT_PACKET:
- 		xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
- 			 td->urb->ep->desc.bEndpointAddress,
- 			 requested, remaining);
- 		*status = 0;
- 		break;
--	case COMP_STOP_SHORT:
-+	case COMP_STOPPED_SHORT_PACKET:
- 		td->urb->actual_length = remaining;
- 		goto finish_td;
--	case COMP_STOP_INVAL:
-+	case COMP_STOPPED_LENGTH_INVALID:
- 		/* stopped on ep trb with invalid length, exclude it */
- 		ep_trb_len	= 0;
- 		remaining	= 0;
-@@ -2296,50 +2296,50 @@ static int handle_tx_event(struct xhci_h
- 		if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0)
- 			break;
- 		if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
--			trb_comp_code = COMP_SHORT_TX;
-+			trb_comp_code = COMP_SHORT_PACKET;
- 		else
- 			xhci_warn_ratelimited(xhci,
- 					"WARN Successful completion on short TX: needs XHCI_TRUST_TX_LENGTH quirk?\n");
--	case COMP_SHORT_TX:
-+	case COMP_SHORT_PACKET:
- 		break;
--	case COMP_STOP:
-+	case COMP_STOPPED:
- 		xhci_dbg(xhci, "Stopped on Transfer TRB\n");
- 		break;
--	case COMP_STOP_INVAL:
-+	case COMP_STOPPED_LENGTH_INVALID:
- 		xhci_dbg(xhci, "Stopped on No-op or Link TRB\n");
- 		break;
--	case COMP_STOP_SHORT:
-+	case COMP_STOPPED_SHORT_PACKET:
- 		xhci_dbg(xhci, "Stopped with short packet transfer detected\n");
- 		break;
--	case COMP_STALL:
-+	case COMP_STALL_ERROR:
- 		xhci_dbg(xhci, "Stalled endpoint\n");
- 		ep->ep_state |= EP_HALTED;
- 		status = -EPIPE;
- 		break;
--	case COMP_TRB_ERR:
-+	case COMP_TRB_ERROR:
- 		xhci_warn(xhci, "WARN: TRB error on endpoint\n");
- 		status = -EILSEQ;
- 		break;
--	case COMP_SPLIT_ERR:
--	case COMP_TX_ERR:
-+	case COMP_SPLIT_TRANSACTION_ERROR:
-+	case COMP_USB_TRANSACTION_ERROR:
- 		xhci_dbg(xhci, "Transfer error on endpoint\n");
- 		status = -EPROTO;
- 		break;
--	case COMP_BABBLE:
-+	case COMP_BABBLE_DETECTED_ERROR:
- 		xhci_dbg(xhci, "Babble error on endpoint\n");
- 		status = -EOVERFLOW;
- 		break;
--	case COMP_DB_ERR:
-+	case COMP_DATA_BUFFER_ERROR:
- 		xhci_warn(xhci, "WARN: HC couldn't access mem fast enough\n");
- 		status = -ENOSR;
- 		break;
--	case COMP_BW_OVER:
-+	case COMP_BANDWIDTH_OVERRUN_ERROR:
- 		xhci_warn(xhci, "WARN: bandwidth overrun event on endpoint\n");
- 		break;
--	case COMP_BUFF_OVER:
-+	case COMP_ISOCH_BUFFER_OVERRUN:
- 		xhci_warn(xhci, "WARN: buffer overrun event on endpoint\n");
- 		break;
--	case COMP_UNDERRUN:
-+	case COMP_RING_UNDERRUN:
- 		/*
- 		 * When the Isoch ring is empty, the xHC will generate
- 		 * a Ring Overrun Event for IN Isoch endpoint or Ring
-@@ -2352,7 +2352,7 @@ static int handle_tx_event(struct xhci_h
- 				 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
- 				 ep_index);
- 		goto cleanup;
--	case COMP_OVERRUN:
-+	case COMP_RING_OVERRUN:
- 		xhci_dbg(xhci, "overrun event on endpoint\n");
- 		if (!list_empty(&ep_ring->td_list))
- 			xhci_dbg(xhci, "Overrun Event for slot %d ep %d "
-@@ -2360,11 +2360,11 @@ static int handle_tx_event(struct xhci_h
- 				 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
- 				 ep_index);
- 		goto cleanup;
--	case COMP_DEV_ERR:
-+	case COMP_INCOMPATIBLE_DEVICE_ERROR:
- 		xhci_warn(xhci, "WARN: detect an incompatible device");
- 		status = -EPROTO;
- 		break;
--	case COMP_MISSED_INT:
-+	case COMP_MISSED_SERVICE_ERROR:
- 		/*
- 		 * When encounter missed service error, one or more isoc tds
- 		 * may be missed by xHC.
-@@ -2374,7 +2374,7 @@ static int handle_tx_event(struct xhci_h
- 		ep->skip = true;
- 		xhci_dbg(xhci, "Miss service interval error, set skip flag\n");
- 		goto cleanup;
--	case COMP_PING_ERR:
-+	case COMP_NO_PING_RESPONSE_ERROR:
- 		ep->skip = true;
- 		xhci_dbg(xhci, "No Ping response error, Skip one Isoc TD\n");
- 		goto cleanup;
-@@ -2398,8 +2398,8 @@ static int handle_tx_event(struct xhci_h
- 			 * event if the device was suspended.  Don't print
- 			 * warnings.
- 			 */
--			if (!(trb_comp_code == COMP_STOP ||
--						trb_comp_code == COMP_STOP_INVAL)) {
-+			if (!(trb_comp_code == COMP_STOPPED ||
-+				trb_comp_code == COMP_STOPPED_LENGTH_INVALID)) {
- 				xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n",
- 						TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
- 						ep_index);
-@@ -2440,8 +2440,8 @@ static int handle_tx_event(struct xhci_h
- 		 * last TRB of the previous TD. The command completion handle
- 		 * will take care the rest.
- 		 */
--		if (!ep_seg && (trb_comp_code == COMP_STOP ||
--				   trb_comp_code == COMP_STOP_INVAL)) {
-+		if (!ep_seg && (trb_comp_code == COMP_STOPPED ||
-+			   trb_comp_code == COMP_STOPPED_LENGTH_INVALID)) {
- 			goto cleanup;
- 		}
- 
-@@ -2472,7 +2472,7 @@ static int handle_tx_event(struct xhci_h
- 			skip_isoc_td(xhci, td, event, ep, &status);
- 			goto cleanup;
- 		}
--		if (trb_comp_code == COMP_SHORT_TX)
-+		if (trb_comp_code == COMP_SHORT_PACKET)
- 			ep_ring->last_td_was_short = true;
- 		else
- 			ep_ring->last_td_was_short = false;
-@@ -2505,8 +2505,8 @@ static int handle_tx_event(struct xhci_h
- 					     &status);
- cleanup:
- 		handling_skipped_tds = ep->skip &&
--			trb_comp_code != COMP_MISSED_INT &&
--			trb_comp_code != COMP_PING_ERR;
-+			trb_comp_code != COMP_MISSED_SERVICE_ERROR &&
-+			trb_comp_code != COMP_NO_PING_RESPONSE_ERROR;
- 
- 		/*
- 		 * Do not update event ring dequeue pointer if we're in a loop
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -1868,32 +1868,32 @@ static int xhci_configure_endpoint_resul
- 	int ret;
- 
- 	switch (*cmd_status) {
--	case COMP_CMD_ABORT:
--	case COMP_CMD_STOP:
-+	case COMP_COMMAND_ABORTED:
-+	case COMP_STOPPED:
- 		xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
- 		ret = -ETIME;
- 		break;
--	case COMP_ENOMEM:
-+	case COMP_RESOURCE_ERROR:
- 		dev_warn(&udev->dev,
- 			 "Not enough host controller resources for new device state.\n");
- 		ret = -ENOMEM;
- 		/* FIXME: can we allocate more resources for the HC? */
- 		break;
--	case COMP_BW_ERR:
--	case COMP_2ND_BW_ERR:
-+	case COMP_BANDWIDTH_ERROR:
-+	case COMP_SECONDARY_BANDWIDTH_ERROR:
- 		dev_warn(&udev->dev,
- 			 "Not enough bandwidth for new device state.\n");
- 		ret = -ENOSPC;
- 		/* FIXME: can we go back to the old state? */
- 		break;
--	case COMP_TRB_ERR:
-+	case COMP_TRB_ERROR:
- 		/* the HCD set up something wrong */
- 		dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
- 				"add flag = 1, "
- 				"and endpoint is not disabled.\n");
- 		ret = -EINVAL;
- 		break;
--	case COMP_DEV_ERR:
-+	case COMP_INCOMPATIBLE_DEVICE_ERROR:
- 		dev_warn(&udev->dev,
- 			 "ERROR: Incompatible device for endpoint configure command.\n");
- 		ret = -ENODEV;
-@@ -1919,33 +1919,33 @@ static int xhci_evaluate_context_result(
- 	struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
- 
- 	switch (*cmd_status) {
--	case COMP_CMD_ABORT:
--	case COMP_CMD_STOP:
-+	case COMP_COMMAND_ABORTED:
-+	case COMP_STOPPED:
- 		xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
- 		ret = -ETIME;
- 		break;
--	case COMP_EINVAL:
-+	case COMP_PARAMETER_ERROR:
- 		dev_warn(&udev->dev,
- 			 "WARN: xHCI driver setup invalid evaluate context command.\n");
- 		ret = -EINVAL;
- 		break;
--	case COMP_EBADSLT:
-+	case COMP_SLOT_NOT_ENABLED_ERROR:
- 		dev_warn(&udev->dev,
- 			"WARN: slot not enabled for evaluate context command.\n");
- 		ret = -EINVAL;
- 		break;
--	case COMP_CTX_STATE:
-+	case COMP_CONTEXT_STATE_ERROR:
- 		dev_warn(&udev->dev,
- 			"WARN: invalid context state for evaluate context command.\n");
- 		xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
- 		ret = -EINVAL;
- 		break;
--	case COMP_DEV_ERR:
-+	case COMP_INCOMPATIBLE_DEVICE_ERROR:
- 		dev_warn(&udev->dev,
- 			"ERROR: Incompatible device for evaluate context command.\n");
- 		ret = -ENODEV;
- 		break;
--	case COMP_MEL_ERR:
-+	case COMP_MAX_EXIT_LATENCY_TOO_LARGE_ERROR:
- 		/* Max Exit Latency too large error */
- 		dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
- 		ret = -EINVAL;
-@@ -3541,13 +3541,13 @@ int xhci_discover_or_reset_device(struct
- 	 */
- 	ret = reset_device_cmd->status;
- 	switch (ret) {
--	case COMP_CMD_ABORT:
--	case COMP_CMD_STOP:
-+	case COMP_COMMAND_ABORTED:
-+	case COMP_STOPPED:
- 		xhci_warn(xhci, "Timeout waiting for reset device command\n");
- 		ret = -ETIME;
- 		goto command_cleanup;
--	case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
--	case COMP_CTX_STATE: /* 0.96 completion code for same thing */
-+	case COMP_SLOT_NOT_ENABLED_ERROR: /* 0.95 completion for bad slot ID */
-+	case COMP_CONTEXT_STATE_ERROR: /* 0.96 completion code for same thing */
- 		xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
- 				slot_id,
- 				xhci_get_slot_state(xhci, virt_dev->out_ctx));
-@@ -3907,22 +3907,22 @@ static int xhci_setup_device(struct usb_
- 	 * command on a timeout.
- 	 */
- 	switch (command->status) {
--	case COMP_CMD_ABORT:
--	case COMP_CMD_STOP:
-+	case COMP_COMMAND_ABORTED:
-+	case COMP_STOPPED:
- 		xhci_warn(xhci, "Timeout while waiting for setup device command\n");
- 		ret = -ETIME;
- 		break;
--	case COMP_CTX_STATE:
--	case COMP_EBADSLT:
-+	case COMP_CONTEXT_STATE_ERROR:
-+	case COMP_SLOT_NOT_ENABLED_ERROR:
- 		xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
- 			 act, udev->slot_id);
- 		ret = -EINVAL;
- 		break;
--	case COMP_TX_ERR:
-+	case COMP_USB_TRANSACTION_ERROR:
- 		dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
- 		ret = -EPROTO;
- 		break;
--	case COMP_DEV_ERR:
-+	case COMP_INCOMPATIBLE_DEVICE_ERROR:
- 		dev_warn(&udev->dev,
- 			 "ERROR: Incompatible device for setup %s command\n", act);
- 		ret = -ENODEV;
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1064,76 +1064,42 @@ struct xhci_transfer_event {
- /* Completion Code - only applicable for some types of TRBs */
- #define	COMP_CODE_MASK		(0xff << 24)
- #define GET_COMP_CODE(p)	(((p) & COMP_CODE_MASK) >> 24)
--#define COMP_SUCCESS	1
--/* Data Buffer Error */
--#define COMP_DB_ERR	2
--/* Babble Detected Error */
--#define COMP_BABBLE	3
--/* USB Transaction Error */
--#define COMP_TX_ERR	4
--/* TRB Error - some TRB field is invalid */
--#define COMP_TRB_ERR	5
--/* Stall Error - USB device is stalled */
--#define COMP_STALL	6
--/* Resource Error - HC doesn't have memory for that device configuration */
--#define COMP_ENOMEM	7
--/* Bandwidth Error - not enough room in schedule for this dev config */
--#define COMP_BW_ERR	8
--/* No Slots Available Error - HC ran out of device slots */
--#define COMP_ENOSLOTS	9
--/* Invalid Stream Type Error */
--#define COMP_STREAM_ERR	10
--/* Slot Not Enabled Error - doorbell rung for disabled device slot */
--#define COMP_EBADSLT	11
--/* Endpoint Not Enabled Error */
--#define COMP_EBADEP	12
--/* Short Packet */
--#define COMP_SHORT_TX	13
--/* Ring Underrun - doorbell rung for an empty isoc OUT ep ring */
--#define COMP_UNDERRUN	14
--/* Ring Overrun - isoc IN ep ring is empty when ep is scheduled to RX */
--#define COMP_OVERRUN	15
--/* Virtual Function Event Ring Full Error */
--#define COMP_VF_FULL	16
--/* Parameter Error - Context parameter is invalid */
--#define COMP_EINVAL	17
--/* Bandwidth Overrun Error - isoc ep exceeded its allocated bandwidth */
--#define COMP_BW_OVER	18
--/* Context State Error - illegal context state transition requested */
--#define COMP_CTX_STATE	19
--/* No Ping Response Error - HC didn't get PING_RESPONSE in time to TX */
--#define COMP_PING_ERR	20
--/* Event Ring is full */
--#define COMP_ER_FULL	21
--/* Incompatible Device Error */
--#define COMP_DEV_ERR	22
--/* Missed Service Error - HC couldn't service an isoc ep within interval */
--#define COMP_MISSED_INT	23
--/* Successfully stopped command ring */
--#define COMP_CMD_STOP	24
--/* Successfully aborted current command and stopped command ring */
--#define COMP_CMD_ABORT	25
--/* Stopped - transfer was terminated by a stop endpoint command */
--#define COMP_STOP	26
--/* Same as COMP_EP_STOPPED, but the transferred length in the event is invalid */
--#define COMP_STOP_INVAL	27
--/* Same as COMP_EP_STOPPED, but a short packet detected */
--#define COMP_STOP_SHORT	28
--/* Max Exit Latency Too Large Error */
--#define COMP_MEL_ERR	29
--/* TRB type 30 reserved */
--/* Isoc Buffer Overrun - an isoc IN ep sent more data than could fit in TD */
--#define COMP_BUFF_OVER	31
--/* Event Lost Error - xHC has an "internal event overrun condition" */
--#define COMP_ISSUES	32
--/* Undefined Error - reported when other error codes don't apply */
--#define COMP_UNKNOWN	33
--/* Invalid Stream ID Error */
--#define COMP_STRID_ERR	34
--/* Secondary Bandwidth Error - may be returned by a Configure Endpoint cmd */
--#define COMP_2ND_BW_ERR	35
--/* Split Transaction Error */
--#define	COMP_SPLIT_ERR	36
-+#define COMP_INVALID				0
-+#define COMP_SUCCESS				1
-+#define COMP_DATA_BUFFER_ERROR			2
-+#define COMP_BABBLE_DETECTED_ERROR		3
-+#define COMP_USB_TRANSACTION_ERROR		4
-+#define COMP_TRB_ERROR				5
-+#define COMP_STALL_ERROR			6
-+#define COMP_RESOURCE_ERROR			7
-+#define COMP_BANDWIDTH_ERROR			8
-+#define COMP_NO_SLOTS_AVAILABLE_ERROR		9
-+#define COMP_INVALID_STREAM_TYPE_ERROR		10
-+#define COMP_SLOT_NOT_ENABLED_ERROR		11
-+#define COMP_ENDPOINT_NOT_ENABLED_ERROR		12
-+#define COMP_SHORT_PACKET			13
-+#define COMP_RING_UNDERRUN			14
-+#define COMP_RING_OVERRUN			15
-+#define COMP_VF_EVENT_RING_FULL_ERROR		16
-+#define COMP_PARAMETER_ERROR			17
-+#define COMP_BANDWIDTH_OVERRUN_ERROR		18
-+#define COMP_CONTEXT_STATE_ERROR		19
-+#define COMP_NO_PING_RESPONSE_ERROR		20
-+#define COMP_EVENT_RING_FULL_ERROR		21
-+#define COMP_INCOMPATIBLE_DEVICE_ERROR		22
-+#define COMP_MISSED_SERVICE_ERROR		23
-+#define COMP_COMMAND_RING_STOPPED		24
-+#define COMP_COMMAND_ABORTED			25
-+#define COMP_STOPPED				26
-+#define COMP_STOPPED_LENGTH_INVALID		27
-+#define COMP_STOPPED_SHORT_PACKET		28
-+#define COMP_MAX_EXIT_LATENCY_TOO_LARGE_ERROR	29
-+#define COMP_ISOCH_BUFFER_OVERRUN		31
-+#define COMP_EVENT_LOST_ERROR			32
-+#define COMP_UNDEFINED_ERROR			33
-+#define COMP_INVALID_STREAM_ID_ERROR		34
-+#define COMP_SECONDARY_BANDWIDTH_ERROR		35
-+#define COMP_SPLIT_TRANSACTION_ERROR		36
- 
- struct xhci_link_trb {
- 	/* 64-bit segment pointer*/
diff --git a/patches.renesas/0194-usb-xhci-remove-xhci_debug_trb.patch b/patches.renesas/0194-usb-xhci-remove-xhci_debug_trb.patch
deleted file mode 100644
index 8971e8e9c5b06a..00000000000000
--- a/patches.renesas/0194-usb-xhci-remove-xhci_debug_trb.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From 72f4433f7378cc35088913722628673571273ed7 Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:57:08 +0300
-Subject: [PATCH 194/286] usb: xhci: remove xhci_debug_trb()
-
-Every XHCI TRB has already been traced by the trb trace events.
-It is unnecessary to put the same message in kernel log. This
-patch removes xhci_debug_trb().
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 8c10152ec52b850f9806c5c2f5a93ebe38838959)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-dbg.c  |   57 -------------------------------------------
- drivers/usb/host/xhci-ring.c |    4 ---
- drivers/usb/host/xhci.h      |    2 -
- 3 files changed, 63 deletions(-)
-
---- a/drivers/usb/host/xhci-dbg.c
-+++ b/drivers/usb/host/xhci-dbg.c
-@@ -254,63 +254,6 @@ void xhci_print_registers(struct xhci_hc
- 	xhci_print_ports(xhci);
- }
- 
--void xhci_print_trb_offsets(struct xhci_hcd *xhci, union xhci_trb *trb)
--{
--	int i;
--	for (i = 0; i < 4; i++)
--		xhci_dbg(xhci, "Offset 0x%x = 0x%x\n",
--				i*4, trb->generic.field[i]);
--}
--
--/**
-- * Debug a transfer request block (TRB).
-- */
--void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb)
--{
--	u64	address;
--	u32	type = le32_to_cpu(trb->link.control) & TRB_TYPE_BITMASK;
--
--	switch (type) {
--	case TRB_TYPE(TRB_LINK):
--		xhci_dbg(xhci, "Link TRB:\n");
--		xhci_print_trb_offsets(xhci, trb);
--
--		address = le64_to_cpu(trb->link.segment_ptr);
--		xhci_dbg(xhci, "Next ring segment DMA address = 0x%llx\n", address);
--
--		xhci_dbg(xhci, "Interrupter target = 0x%x\n",
--			 GET_INTR_TARGET(le32_to_cpu(trb->link.intr_target)));
--		xhci_dbg(xhci, "Cycle bit = %u\n",
--			 le32_to_cpu(trb->link.control) & TRB_CYCLE);
--		xhci_dbg(xhci, "Toggle cycle bit = %u\n",
--			 le32_to_cpu(trb->link.control) & LINK_TOGGLE);
--		xhci_dbg(xhci, "No Snoop bit = %u\n",
--			 le32_to_cpu(trb->link.control) & TRB_NO_SNOOP);
--		break;
--	case TRB_TYPE(TRB_TRANSFER):
--		address = le64_to_cpu(trb->trans_event.buffer);
--		/*
--		 * FIXME: look at flags to figure out if it's an address or if
--		 * the data is directly in the buffer field.
--		 */
--		xhci_dbg(xhci, "DMA address or buffer contents= %llu\n", address);
--		break;
--	case TRB_TYPE(TRB_COMPLETION):
--		address = le64_to_cpu(trb->event_cmd.cmd_trb);
--		xhci_dbg(xhci, "Command TRB pointer = %llu\n", address);
--		xhci_dbg(xhci, "Completion status = %u\n",
--			 GET_COMP_CODE(le32_to_cpu(trb->event_cmd.status)));
--		xhci_dbg(xhci, "Flags = 0x%x\n",
--			 le32_to_cpu(trb->event_cmd.flags));
--		break;
--	default:
--		xhci_dbg(xhci, "Unknown TRB with TRB type ID %u\n",
--				(unsigned int) type>>10);
--		xhci_print_trb_offsets(xhci, trb);
--		break;
--	}
--}
--
- void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst)
- {
- 	u64 addr = erst->erst_dma_addr;
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -2466,10 +2466,6 @@ static int handle_tx_event(struct xhci_h
- 				xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n",
- 						TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
- 						ep_index);
--				xhci_dbg(xhci, "Event TRB with TRB type ID %u\n",
--						(le32_to_cpu(event->flags) &
--						 TRB_TYPE_BITMASK)>>10);
--				xhci_print_trb_offsets(xhci, (union xhci_trb *) event);
- 			}
- 			if (ep->skip) {
- 				ep->skip = false;
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1928,8 +1928,6 @@ void xhci_print_ir_set(struct xhci_hcd *
- void xhci_print_registers(struct xhci_hcd *xhci);
- void xhci_dbg_regs(struct xhci_hcd *xhci);
- void xhci_print_run_regs(struct xhci_hcd *xhci);
--void xhci_print_trb_offsets(struct xhci_hcd *xhci, union xhci_trb *trb);
--void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb);
- void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst);
- void xhci_dbg_cmd_ptrs(struct xhci_hcd *xhci);
- void xhci_dbg_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx, unsigned int last_ep);
diff --git a/patches.renesas/0195-clk-renesas-r8a7795-Fix-HDMI-parent-clock.patch b/patches.renesas/0195-clk-renesas-r8a7795-Fix-HDMI-parent-clock.patch
deleted file mode 100644
index 89cdbf5094de62..00000000000000
--- a/patches.renesas/0195-clk-renesas-r8a7795-Fix-HDMI-parent-clock.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 03e737c8ed9ca6ea6aa33c165b13bd49991a8e4f Mon Sep 17 00:00:00 2001
-From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Date: Fri, 4 Nov 2016 14:58:07 +0100
-Subject: [PATCH 195/299] clk: renesas: r8a7795: Fix HDMI parent clock
-
-Correct HDMI parent clock so that the rate of the
-HDMI clock is 1/4 rather than 1/2 of the rate of PLL1
-as per the v0.52 (Jun, 15) manual.
-
-Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 0a30284b9fe19780d4587e74578e460469d88706)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/r8a7795-cpg-mssr.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
-+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
-@@ -98,7 +98,7 @@ static const struct cpg_core_clk r8a7795
- 	DEF_FIXED("cp",         R8A7795_CLK_CP,    CLK_EXTAL,      2, 1),
- 
- 	DEF_DIV6P1("mso",       R8A7795_CLK_MSO,   CLK_PLL1_DIV4, 0x014),
--	DEF_DIV6P1("hdmi",      R8A7795_CLK_HDMI,  CLK_PLL1_DIV2, 0x250),
-+	DEF_DIV6P1("hdmi",      R8A7795_CLK_HDMI,  CLK_PLL1_DIV4, 0x250),
- 	DEF_DIV6P1("canfd",     R8A7795_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
- 	DEF_DIV6P1("csi0",      R8A7795_CLK_CSI0,  CLK_PLL1_DIV4, 0x00c),
- 
diff --git a/patches.renesas/0195-usb-host-xhci-simplify-irq-handler-return.patch b/patches.renesas/0195-usb-host-xhci-simplify-irq-handler-return.patch
deleted file mode 100644
index 2e3edf4d1b2d7b..00000000000000
--- a/patches.renesas/0195-usb-host-xhci-simplify-irq-handler-return.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From 3d71eb22895dbf5e5081b1b96976803e3c6eb090 Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:07 +0200
-Subject: [PATCH 195/255] usb: host: xhci: simplify irq handler return
-
-Instead of having several return points, let's use a local variable and
-a single place to return. This makes the code slightly easier to read.
-
-[set ret = IRQ_HANDLED in default working case  -Mathias]
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
-(cherry picked from commit 76a35293b901915c5dcb4a87a4a0da8d7caf39fe)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   32 +++++++++++++++++---------------
- 1 file changed, 17 insertions(+), 15 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -2608,27 +2608,28 @@ static int xhci_handle_event(struct xhci
- irqreturn_t xhci_irq(struct usb_hcd *hcd)
- {
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
--	u32 status;
--	u64 temp_64;
- 	union xhci_trb *event_ring_deq;
-+	irqreturn_t ret = IRQ_NONE;
- 	dma_addr_t deq;
-+	u64 temp_64;
-+	u32 status;
- 
- 	spin_lock(&xhci->lock);
- 	/* Check if the xHC generated the interrupt, or the irq is shared */
- 	status = readl(&xhci->op_regs->status);
--	if (status == 0xffffffff)
--		goto hw_died;
--
--	if (!(status & STS_EINT)) {
--		spin_unlock(&xhci->lock);
--		return IRQ_NONE;
-+	if (status == 0xffffffff) {
-+		ret = IRQ_HANDLED;
-+		goto out;
- 	}
-+
-+	if (!(status & STS_EINT))
-+		goto out;
-+
- 	if (status & STS_FATAL) {
- 		xhci_warn(xhci, "WARNING: Host System Error\n");
- 		xhci_halt(xhci);
--hw_died:
--		spin_unlock(&xhci->lock);
--		return IRQ_HANDLED;
-+		ret = IRQ_HANDLED;
-+		goto out;
- 	}
- 
- 	/*
-@@ -2659,9 +2660,8 @@ hw_died:
- 		temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
- 		xhci_write_64(xhci, temp_64 | ERST_EHB,
- 				&xhci->ir_set->erst_dequeue);
--		spin_unlock(&xhci->lock);
--
--		return IRQ_HANDLED;
-+		ret = IRQ_HANDLED;
-+		goto out;
- 	}
- 
- 	event_ring_deq = xhci->event_ring->dequeue;
-@@ -2686,10 +2686,12 @@ hw_died:
- 	/* Clear the event handler busy flag (RW1C); event ring is empty. */
- 	temp_64 |= ERST_EHB;
- 	xhci_write_64(xhci, temp_64, &xhci->ir_set->erst_dequeue);
-+	ret = IRQ_HANDLED;
- 
-+out:
- 	spin_unlock(&xhci->lock);
- 
--	return IRQ_HANDLED;
-+	return ret;
- }
- 
- irqreturn_t xhci_msi_irq(int irq, void *hcd)
diff --git a/patches.renesas/0195-usb-xhci-remove-xhci_dbg_ctx.patch b/patches.renesas/0195-usb-xhci-remove-xhci_dbg_ctx.patch
deleted file mode 100644
index 9b7e41eaadfadb..00000000000000
--- a/patches.renesas/0195-usb-xhci-remove-xhci_dbg_ctx.patch
+++ /dev/null
@@ -1,325 +0,0 @@
-From d28bc3b64ca7c8cc5b061893105679fe20c54542 Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:57:09 +0300
-Subject: [PATCH 195/286] usb: xhci: remove xhci_dbg_ctx()
-
-XHCI context changes have already been traced by the trace
-events. It's unnecessary to put the same message in kernel
-log. This patch removes the use of xhci_dbg_ctx().
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit c8844f2ddb0d2bc42a813c567ad4240759f373bd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-dbg.c |  143 --------------------------------------------
- drivers/usb/host/xhci.c     |   37 -----------
- drivers/usb/host/xhci.h     |    1 
- 3 files changed, 181 deletions(-)
-
---- a/drivers/usb/host/xhci-dbg.c
-+++ b/drivers/usb/host/xhci-dbg.c
-@@ -283,19 +283,6 @@ void xhci_dbg_cmd_ptrs(struct xhci_hcd *
- 			upper_32_bits(val));
- }
- 
--/* Print the last 32 bytes for 64-byte contexts */
--static void dbg_rsvd64(struct xhci_hcd *xhci, u64 *ctx, dma_addr_t dma)
--{
--	int i;
--	for (i = 0; i < 4; i++) {
--		xhci_dbg(xhci, "@%p (virt) @%08llx "
--			 "(dma) %#08llx - rsvd64[%d]\n",
--			 &ctx[4 + i], (unsigned long long)dma,
--			 ctx[4 + i], i);
--		dma += 8;
--	}
--}
--
- char *xhci_get_slot_state(struct xhci_hcd *xhci,
- 		struct xhci_container_ctx *ctx)
- {
-@@ -305,136 +292,6 @@ char *xhci_get_slot_state(struct xhci_hc
- 	return xhci_slot_state_string(state);
- }
- 
--static void xhci_dbg_slot_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx)
--{
--	/* Fields are 32 bits wide, DMA addresses are in bytes */
--	int field_size = 32 / 8;
--	int i;
--
--	struct xhci_slot_ctx *slot_ctx = xhci_get_slot_ctx(xhci, ctx);
--	dma_addr_t dma = ctx->dma +
--		((unsigned long)slot_ctx - (unsigned long)ctx->bytes);
--	int csz = HCC_64BYTE_CONTEXT(xhci->hcc_params);
--
--	xhci_dbg(xhci, "Slot Context:\n");
--	xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_info\n",
--			&slot_ctx->dev_info,
--			(unsigned long long)dma, slot_ctx->dev_info);
--	dma += field_size;
--	xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_info2\n",
--			&slot_ctx->dev_info2,
--			(unsigned long long)dma, slot_ctx->dev_info2);
--	dma += field_size;
--	xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - tt_info\n",
--			&slot_ctx->tt_info,
--			(unsigned long long)dma, slot_ctx->tt_info);
--	dma += field_size;
--	xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_state\n",
--			&slot_ctx->dev_state,
--			(unsigned long long)dma, slot_ctx->dev_state);
--	dma += field_size;
--	for (i = 0; i < 4; i++) {
--		xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n",
--				&slot_ctx->reserved[i], (unsigned long long)dma,
--				slot_ctx->reserved[i], i);
--		dma += field_size;
--	}
--
--	if (csz)
--		dbg_rsvd64(xhci, (u64 *)slot_ctx, dma);
--}
--
--static void xhci_dbg_ep_ctx(struct xhci_hcd *xhci,
--		     struct xhci_container_ctx *ctx,
--		     unsigned int last_ep)
--{
--	int i, j;
--	int last_ep_ctx = 31;
--	/* Fields are 32 bits wide, DMA addresses are in bytes */
--	int field_size = 32 / 8;
--	int csz = HCC_64BYTE_CONTEXT(xhci->hcc_params);
--
--	if (last_ep < 31)
--		last_ep_ctx = last_ep + 1;
--	for (i = 0; i < last_ep_ctx; i++) {
--		unsigned int epaddr = xhci_get_endpoint_address(i);
--		struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, ctx, i);
--		dma_addr_t dma = ctx->dma +
--			((unsigned long)ep_ctx - (unsigned long)ctx->bytes);
--
--		xhci_dbg(xhci, "%s Endpoint %02d Context (ep_index %02d):\n",
--				usb_endpoint_out(epaddr) ? "OUT" : "IN",
--				epaddr & USB_ENDPOINT_NUMBER_MASK, i);
--		xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - ep_info\n",
--				&ep_ctx->ep_info,
--				(unsigned long long)dma, ep_ctx->ep_info);
--		dma += field_size;
--		xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - ep_info2\n",
--				&ep_ctx->ep_info2,
--				(unsigned long long)dma, ep_ctx->ep_info2);
--		dma += field_size;
--		xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08llx - deq\n",
--				&ep_ctx->deq,
--				(unsigned long long)dma, ep_ctx->deq);
--		dma += 2*field_size;
--		xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - tx_info\n",
--				&ep_ctx->tx_info,
--				(unsigned long long)dma, ep_ctx->tx_info);
--		dma += field_size;
--		for (j = 0; j < 3; j++) {
--			xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n",
--					&ep_ctx->reserved[j],
--					(unsigned long long)dma,
--					ep_ctx->reserved[j], j);
--			dma += field_size;
--		}
--
--		if (csz)
--			dbg_rsvd64(xhci, (u64 *)ep_ctx, dma);
--	}
--}
--
--void xhci_dbg_ctx(struct xhci_hcd *xhci,
--		  struct xhci_container_ctx *ctx,
--		  unsigned int last_ep)
--{
--	int i;
--	/* Fields are 32 bits wide, DMA addresses are in bytes */
--	int field_size = 32 / 8;
--	dma_addr_t dma = ctx->dma;
--	int csz = HCC_64BYTE_CONTEXT(xhci->hcc_params);
--
--	if (ctx->type == XHCI_CTX_TYPE_INPUT) {
--		struct xhci_input_control_ctx *ctrl_ctx =
--			xhci_get_input_control_ctx(ctx);
--		if (!ctrl_ctx) {
--			xhci_warn(xhci, "Could not get input context, bad type.\n");
--			return;
--		}
--
--		xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - drop flags\n",
--			 &ctrl_ctx->drop_flags, (unsigned long long)dma,
--			 ctrl_ctx->drop_flags);
--		dma += field_size;
--		xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - add flags\n",
--			 &ctrl_ctx->add_flags, (unsigned long long)dma,
--			 ctrl_ctx->add_flags);
--		dma += field_size;
--		for (i = 0; i < 6; i++) {
--			xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd2[%d]\n",
--				 &ctrl_ctx->rsvd2[i], (unsigned long long)dma,
--				 ctrl_ctx->rsvd2[i], i);
--			dma += field_size;
--		}
--
--		if (csz)
--			dbg_rsvd64(xhci, (u64 *)ctrl_ctx, dma);
--	}
--
--	xhci_dbg_slot_ctx(xhci, ctx);
--	xhci_dbg_ep_ctx(xhci, ctx, last_ep);
--}
--
- void xhci_dbg_trace(struct xhci_hcd *xhci, void (*trace)(struct va_format *),
- 			const char *fmt, ...)
- {
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -1347,11 +1347,6 @@ static int xhci_check_maxpacket(struct x
- 		ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
- 		ctrl_ctx->drop_flags = 0;
- 
--		xhci_dbg(xhci, "Slot %d input context\n", slot_id);
--		xhci_dbg_ctx(xhci, command->in_ctx, ep_index);
--		xhci_dbg(xhci, "Slot %d output context\n", slot_id);
--		xhci_dbg_ctx(xhci, out_ctx, ep_index);
--
- 		ret = xhci_configure_endpoint(xhci, urb->dev, command,
- 				true, false);
- 
-@@ -1899,7 +1894,6 @@ static int xhci_evaluate_context_result(
- 		struct usb_device *udev, u32 *cmd_status)
- {
- 	int ret;
--	struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
- 
- 	switch (*cmd_status) {
- 	case COMP_COMMAND_ABORTED:
-@@ -1920,7 +1914,6 @@ static int xhci_evaluate_context_result(
- 	case COMP_CONTEXT_STATE_ERROR:
- 		dev_warn(&udev->dev,
- 			"WARN: invalid context state for evaluate context command.\n");
--		xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
- 		ret = -EINVAL;
- 		break;
- 	case COMP_INCOMPATIBLE_DEVICE_ERROR:
-@@ -2799,9 +2792,6 @@ static int xhci_check_bandwidth(struct u
- 			break;
- 		}
- 	}
--	xhci_dbg(xhci, "New Input Control Context:\n");
--	xhci_dbg_ctx(xhci, virt_dev->in_ctx,
--		     LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
- 
- 	ret = xhci_configure_endpoint(xhci, udev, command,
- 			false, false);
-@@ -2809,10 +2799,6 @@ static int xhci_check_bandwidth(struct u
- 		/* Callee should call reset_bandwidth() */
- 		goto command_cleanup;
- 
--	xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
--	xhci_dbg_ctx(xhci, virt_dev->out_ctx,
--		     LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
--
- 	/* Free any rings that were dropped, but not changed. */
- 	for (i = 1; i < 31; i++) {
- 		if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
-@@ -2879,9 +2865,6 @@ static void xhci_setup_input_ctx_for_con
- 	ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
- 	xhci_slot_copy(xhci, in_ctx, out_ctx);
- 	ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
--
--	xhci_dbg(xhci, "Input Context:\n");
--	xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
- }
- 
- static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
-@@ -3594,9 +3577,6 @@ static int xhci_discover_or_reset_device
- 	}
- 	/* If necessary, update the number of active TTs on this root port */
- 	xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
--
--	xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
--	xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
- 	ret = 0;
- 
- command_cleanup:
-@@ -3896,8 +3876,6 @@ static int xhci_setup_device(struct usb_
- 	ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
- 	ctrl_ctx->drop_flags = 0;
- 
--	xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
--	xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
- 	trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
- 				le32_to_cpu(slot_ctx->dev_info) >> 27);
- 
-@@ -3950,8 +3928,6 @@ static int xhci_setup_device(struct usb_
- 		xhci_err(xhci,
- 			 "ERROR: unexpected setup %s command completion code 0x%x.\n",
- 			 act, command->status);
--		xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
--		xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
- 		trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
- 		ret = -EINVAL;
- 		break;
-@@ -3970,12 +3946,8 @@ static int xhci_setup_device(struct usb_
- 	xhci_dbg_trace(xhci, trace_xhci_dbg_address,
- 			"Output Context DMA address = %#08llx",
- 			(unsigned long long)virt_dev->out_ctx->dma);
--	xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
--	xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
- 	trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
- 				le32_to_cpu(slot_ctx->dev_info) >> 27);
--	xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
--	xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
- 	/*
- 	 * USB core uses address 1 for the roothubs, so we add one to the
- 	 * address given back to us by the HC.
-@@ -4080,14 +4052,10 @@ static int __maybe_unused xhci_change_ma
- 
- 	xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
- 			"Set up evaluate context for LPM MEL change.");
--	xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
--	xhci_dbg_ctx(xhci, command->in_ctx, 0);
- 
- 	/* Issue and wait for the evaluate context command. */
- 	ret = xhci_configure_endpoint(xhci, udev, command,
- 			true, true);
--	xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
--	xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
- 
- 	if (!ret) {
- 		spin_lock_irqsave(&xhci->lock, flags);
-@@ -4855,8 +4823,6 @@ static int xhci_update_hub_device(struct
- 	xhci_dbg(xhci, "Set up %s for hub device.\n",
- 			(xhci->hci_version > 0x95) ?
- 			"configure endpoint" : "evaluate context");
--	xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
--	xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
- 
- 	/* Issue and wait for the configure endpoint or
- 	 * evaluate context command.
-@@ -4868,9 +4834,6 @@ static int xhci_update_hub_device(struct
- 		ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
- 				true, false);
- 
--	xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
--	xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
--
- 	xhci_free_command(xhci, config_cmd);
- 	return ret;
- }
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1930,7 +1930,6 @@ void xhci_dbg_regs(struct xhci_hcd *xhci
- void xhci_print_run_regs(struct xhci_hcd *xhci);
- void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst);
- void xhci_dbg_cmd_ptrs(struct xhci_hcd *xhci);
--void xhci_dbg_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx, unsigned int last_ep);
- char *xhci_get_slot_state(struct xhci_hcd *xhci,
- 		struct xhci_container_ctx *ctx);
- void xhci_dbg_trace(struct xhci_hcd *xhci, void (*trace)(struct va_format *),
diff --git a/patches.renesas/0196-clk-renesas-cpg-mssr-Add-common-R-Car-Gen2-support.patch b/patches.renesas/0196-clk-renesas-cpg-mssr-Add-common-R-Car-Gen2-support.patch
deleted file mode 100644
index 507defdbaf304c..00000000000000
--- a/patches.renesas/0196-clk-renesas-cpg-mssr-Add-common-R-Car-Gen2-support.patch
+++ /dev/null
@@ -1,443 +0,0 @@
-From 722f1ef07b3eed3cc0519a9928cf463352f861d5 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 9 Nov 2016 00:17:25 +0300
-Subject: [PATCH 196/299] clk: renesas: cpg-mssr: Add common R-Car Gen2 support
-
-Add the common R-Car Gen2 (and RZ/G) Clock Pulse Generator / Module
-Standby and Software Reset support code, using the CPG/MSSR driver
-core.
-
-Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert
-Uytterhoeven <geert+renesas@glider.be>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 468389357480f21febb0edfd1482d0fc8f885808)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/renesas/rcar-gen2-cpg.c |  371 ++++++++++++++++++++++++++++++++++++
- drivers/clk/renesas/rcar-gen2-cpg.h |   43 ++++
- 2 files changed, 414 insertions(+)
- create mode 100644 drivers/clk/renesas/rcar-gen2-cpg.c
- create mode 100644 drivers/clk/renesas/rcar-gen2-cpg.h
-
---- /dev/null
-+++ b/drivers/clk/renesas/rcar-gen2-cpg.c
-@@ -0,0 +1,371 @@
-+/*
-+ * R-Car Gen2 Clock Pulse Generator
-+ *
-+ * Copyright (C) 2016 Cogent Embedded Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include <linux/bug.h>
-+#include <linux/clk.h>
-+#include <linux/clk-provider.h>
-+#include <linux/device.h>
-+#include <linux/err.h>
-+#include <linux/init.h>
-+#include <linux/io.h>
-+#include <linux/slab.h>
-+
-+#include "renesas-cpg-mssr.h"
-+#include "rcar-gen2-cpg.h"
-+
-+#define CPG_FRQCRB		0x0004
-+#define CPG_FRQCRB_KICK		BIT(31)
-+#define CPG_SDCKCR		0x0074
-+#define CPG_PLL0CR		0x00d8
-+#define CPG_PLL0CR_STC_SHIFT	24
-+#define CPG_PLL0CR_STC_MASK	(0x7f << CPG_PLL0CR_STC_SHIFT)
-+#define CPG_FRQCRC		0x00e0
-+#define CPG_FRQCRC_ZFC_SHIFT	8
-+#define CPG_FRQCRC_ZFC_MASK	(0x1f << CPG_FRQCRC_ZFC_SHIFT)
-+#define CPG_ADSPCKCR		0x025c
-+#define CPG_RCANCKCR		0x0270
-+
-+static spinlock_t cpg_lock;
-+
-+/*
-+ * Z Clock
-+ *
-+ * Traits of this clock:
-+ * prepare - clk_prepare only ensures that parents are prepared
-+ * enable - clk_enable only ensures that parents are enabled
-+ * rate - rate is adjustable.  clk->rate = parent->rate * mult / 32
-+ * parent - fixed parent.  No clk_set_parent support
-+ */
-+
-+struct cpg_z_clk {
-+	struct clk_hw hw;
-+	void __iomem *reg;
-+	void __iomem *kick_reg;
-+};
-+
-+#define to_z_clk(_hw)	container_of(_hw, struct cpg_z_clk, hw)
-+
-+static unsigned long cpg_z_clk_recalc_rate(struct clk_hw *hw,
-+					   unsigned long parent_rate)
-+{
-+	struct cpg_z_clk *zclk = to_z_clk(hw);
-+	unsigned int mult;
-+	unsigned int val;
-+
-+	val = (readl(zclk->reg) & CPG_FRQCRC_ZFC_MASK) >> CPG_FRQCRC_ZFC_SHIFT;
-+	mult = 32 - val;
-+
-+	return div_u64((u64)parent_rate * mult, 32);
-+}
-+
-+static long cpg_z_clk_round_rate(struct clk_hw *hw, unsigned long rate,
-+				 unsigned long *parent_rate)
-+{
-+	unsigned long prate  = *parent_rate;
-+	unsigned int mult;
-+
-+	if (!prate)
-+		prate = 1;
-+
-+	mult = div_u64((u64)rate * 32, prate);
-+	mult = clamp(mult, 1U, 32U);
-+
-+	return *parent_rate / 32 * mult;
-+}
-+
-+static int cpg_z_clk_set_rate(struct clk_hw *hw, unsigned long rate,
-+			      unsigned long parent_rate)
-+{
-+	struct cpg_z_clk *zclk = to_z_clk(hw);
-+	unsigned int mult;
-+	u32 val, kick;
-+	unsigned int i;
-+
-+	mult = div_u64((u64)rate * 32, parent_rate);
-+	mult = clamp(mult, 1U, 32U);
-+
-+	if (readl(zclk->kick_reg) & CPG_FRQCRB_KICK)
-+		return -EBUSY;
-+
-+	val = readl(zclk->reg);
-+	val &= ~CPG_FRQCRC_ZFC_MASK;
-+	val |= (32 - mult) << CPG_FRQCRC_ZFC_SHIFT;
-+	writel(val, zclk->reg);
-+
-+	/*
-+	 * Set KICK bit in FRQCRB to update hardware setting and wait for
-+	 * clock change completion.
-+	 */
-+	kick = readl(zclk->kick_reg);
-+	kick |= CPG_FRQCRB_KICK;
-+	writel(kick, zclk->kick_reg);
-+
-+	/*
-+	 * Note: There is no HW information about the worst case latency.
-+	 *
-+	 * Using experimental measurements, it seems that no more than
-+	 * ~10 iterations are needed, independently of the CPU rate.
-+	 * Since this value might be dependent on external xtal rate, pll1
-+	 * rate or even the other emulation clocks rate, use 1000 as a
-+	 * "super" safe value.
-+	 */
-+	for (i = 1000; i; i--) {
-+		if (!(readl(zclk->kick_reg) & CPG_FRQCRB_KICK))
-+			return 0;
-+
-+		cpu_relax();
-+	}
-+
-+	return -ETIMEDOUT;
-+}
-+
-+static const struct clk_ops cpg_z_clk_ops = {
-+	.recalc_rate = cpg_z_clk_recalc_rate,
-+	.round_rate = cpg_z_clk_round_rate,
-+	.set_rate = cpg_z_clk_set_rate,
-+};
-+
-+static struct clk * __init cpg_z_clk_register(const char *name,
-+					      const char *parent_name,
-+					      void __iomem *base)
-+{
-+	struct clk_init_data init;
-+	struct cpg_z_clk *zclk;
-+	struct clk *clk;
-+
-+	zclk = kzalloc(sizeof(*zclk), GFP_KERNEL);
-+	if (!zclk)
-+		return ERR_PTR(-ENOMEM);
-+
-+	init.name = name;
-+	init.ops = &cpg_z_clk_ops;
-+	init.flags = 0;
-+	init.parent_names = &parent_name;
-+	init.num_parents = 1;
-+
-+	zclk->reg = base + CPG_FRQCRC;
-+	zclk->kick_reg = base + CPG_FRQCRB;
-+	zclk->hw.init = &init;
-+
-+	clk = clk_register(NULL, &zclk->hw);
-+	if (IS_ERR(clk))
-+		kfree(zclk);
-+
-+	return clk;
-+}
-+
-+static struct clk * __init cpg_rcan_clk_register(const char *name,
-+						 const char *parent_name,
-+						 void __iomem *base)
-+{
-+	struct clk_fixed_factor *fixed;
-+	struct clk_gate *gate;
-+	struct clk *clk;
-+
-+	fixed = kzalloc(sizeof(*fixed), GFP_KERNEL);
-+	if (!fixed)
-+		return ERR_PTR(-ENOMEM);
-+
-+	fixed->mult = 1;
-+	fixed->div = 6;
-+
-+	gate = kzalloc(sizeof(*gate), GFP_KERNEL);
-+	if (!gate) {
-+		kfree(fixed);
-+		return ERR_PTR(-ENOMEM);
-+	}
-+
-+	gate->reg = base + CPG_RCANCKCR;
-+	gate->bit_idx = 8;
-+	gate->flags = CLK_GATE_SET_TO_DISABLE;
-+	gate->lock = &cpg_lock;
-+
-+	clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,
-+				     &fixed->hw, &clk_fixed_factor_ops,
-+				     &gate->hw, &clk_gate_ops, 0);
-+	if (IS_ERR(clk)) {
-+		kfree(gate);
-+		kfree(fixed);
-+	}
-+
-+	return clk;
-+}
-+
-+/* ADSP divisors */
-+static const struct clk_div_table cpg_adsp_div_table[] = {
-+	{  1,  3 }, {  2,  4 }, {  3,  6 }, {  4,  8 },
-+	{  5, 12 }, {  6, 16 }, {  7, 18 }, {  8, 24 },
-+	{ 10, 36 }, { 11, 48 }, {  0,  0 },
-+};
-+
-+static struct clk * __init cpg_adsp_clk_register(const char *name,
-+						 const char *parent_name,
-+						 void __iomem *base)
-+{
-+	struct clk_divider *div;
-+	struct clk_gate *gate;
-+	struct clk *clk;
-+
-+	div = kzalloc(sizeof(*div), GFP_KERNEL);
-+	if (!div)
-+		return ERR_PTR(-ENOMEM);
-+
-+	div->reg = base + CPG_ADSPCKCR;
-+	div->width = 4;
-+	div->table = cpg_adsp_div_table;
-+	div->lock = &cpg_lock;
-+
-+	gate = kzalloc(sizeof(*gate), GFP_KERNEL);
-+	if (!gate) {
-+		kfree(div);
-+		return ERR_PTR(-ENOMEM);
-+	}
-+
-+	gate->reg = base + CPG_ADSPCKCR;
-+	gate->bit_idx = 8;
-+	gate->flags = CLK_GATE_SET_TO_DISABLE;
-+	gate->lock = &cpg_lock;
-+
-+	clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,
-+				     &div->hw, &clk_divider_ops,
-+				     &gate->hw, &clk_gate_ops, 0);
-+	if (IS_ERR(clk)) {
-+		kfree(gate);
-+		kfree(div);
-+	}
-+
-+	return clk;
-+}
-+
-+/* SDHI divisors */
-+static const struct clk_div_table cpg_sdh_div_table[] = {
-+	{  0,  2 }, {  1,  3 }, {  2,  4 }, {  3,  6 },
-+	{  4,  8 }, {  5, 12 }, {  6, 16 }, {  7, 18 },
-+	{  8, 24 }, { 10, 36 }, { 11, 48 }, {  0,  0 },
-+};
-+
-+static const struct clk_div_table cpg_sd01_div_table[] = {
-+	{  4,  8 }, {  5, 12 }, {  6, 16 }, {  7, 18 },
-+	{  8, 24 }, { 10, 36 }, { 11, 48 }, { 12, 10 },
-+	{  0,  0 },
-+};
-+
-+static const struct rcar_gen2_cpg_pll_config *cpg_pll_config __initdata;
-+static unsigned int cpg_pll0_div __initdata;
-+static u32 cpg_mode __initdata;
-+
-+struct clk * __init rcar_gen2_cpg_clk_register(struct device *dev,
-+					       const struct cpg_core_clk *core,
-+					       const struct cpg_mssr_info *info,
-+					       struct clk **clks,
-+					       void __iomem *base)
-+{
-+	const struct clk_div_table *table = NULL;
-+	const struct clk *parent;
-+	const char *parent_name;
-+	unsigned int mult = 1;
-+	unsigned int div = 1;
-+	unsigned int shift;
-+
-+	parent = clks[core->parent];
-+	if (IS_ERR(parent))
-+		return ERR_CAST(parent);
-+
-+	parent_name = __clk_get_name(parent);
-+
-+	switch (core->type) {
-+	/* R-Car Gen2 */
-+	case CLK_TYPE_GEN2_MAIN:
-+		div = cpg_pll_config->extal_div;
-+		break;
-+
-+	case CLK_TYPE_GEN2_PLL0:
-+		/*
-+		 * PLL0 is a  configurable multiplier clock except on R-Car
-+		 * V2H/E2. Register the PLL0 clock as a fixed factor clock for
-+		 * now as there's no generic multiplier clock implementation and
-+		 * we  currently  have no need to change  the multiplier value.
-+		 */
-+		mult = cpg_pll_config->pll0_mult;
-+		div  = cpg_pll0_div;
-+		if (!mult) {
-+			u32 pll0cr = readl(base + CPG_PLL0CR);
-+
-+			mult = (((pll0cr & CPG_PLL0CR_STC_MASK) >>
-+				 CPG_PLL0CR_STC_SHIFT) + 1) * 2;
-+		}
-+		break;
-+
-+	case CLK_TYPE_GEN2_PLL1:
-+		mult = cpg_pll_config->pll1_mult / 2;
-+		break;
-+
-+	case CLK_TYPE_GEN2_PLL3:
-+		mult = cpg_pll_config->pll3_mult;
-+		break;
-+
-+	case CLK_TYPE_GEN2_Z:
-+		return cpg_z_clk_register(core->name, parent_name, base);
-+
-+	case CLK_TYPE_GEN2_LB:
-+		div = cpg_mode & BIT(18) ? 36 : 24;
-+		break;
-+
-+	case CLK_TYPE_GEN2_ADSP:
-+		return cpg_adsp_clk_register(core->name, parent_name, base);
-+
-+	case CLK_TYPE_GEN2_SDH:
-+		table = cpg_sdh_div_table;
-+		shift = 8;
-+		break;
-+
-+	case CLK_TYPE_GEN2_SD0:
-+		table = cpg_sd01_div_table;
-+		shift = 4;
-+		break;
-+
-+	case CLK_TYPE_GEN2_SD1:
-+		table = cpg_sd01_div_table;
-+		shift = 0;
-+		break;
-+
-+	case CLK_TYPE_GEN2_QSPI:
-+		div = (cpg_mode & (BIT(3) | BIT(2) | BIT(1))) == BIT(2) ?
-+		      8 : 10;
-+		break;
-+
-+	case CLK_TYPE_GEN2_RCAN:
-+		return cpg_rcan_clk_register(core->name, parent_name, base);
-+
-+	default:
-+		return ERR_PTR(-EINVAL);
-+	}
-+
-+	if (!table)
-+		return clk_register_fixed_factor(NULL, core->name, parent_name,
-+						 0, mult, div);
-+	else
-+		return clk_register_divider_table(NULL, core->name,
-+						  parent_name, 0,
-+						  base + CPG_SDCKCR, shift, 4,
-+						  0, table, &cpg_lock);
-+}
-+
-+int __init rcar_gen2_cpg_init(const struct rcar_gen2_cpg_pll_config *config,
-+			      unsigned int pll0_div, u32 mode)
-+{
-+	cpg_pll_config = config;
-+	cpg_pll0_div = pll0_div;
-+	cpg_mode = mode;
-+
-+	spin_lock_init(&cpg_lock);
-+
-+	return 0;
-+}
---- /dev/null
-+++ b/drivers/clk/renesas/rcar-gen2-cpg.h
-@@ -0,0 +1,43 @@
-+/*
-+ * R-Car Gen2 Clock Pulse Generator
-+ *
-+ * Copyright (C) 2016 Cogent Embedded Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation; version 2 of the License.
-+ */
-+
-+#ifndef __CLK_RENESAS_RCAR_GEN2_CPG_H__
-+#define __CLK_RENESAS_RCAR_GEN2_CPG_H__
-+
-+enum rcar_gen2_clk_types {
-+	CLK_TYPE_GEN2_MAIN = CLK_TYPE_CUSTOM,
-+	CLK_TYPE_GEN2_PLL0,
-+	CLK_TYPE_GEN2_PLL1,
-+	CLK_TYPE_GEN2_PLL3,
-+	CLK_TYPE_GEN2_Z,
-+	CLK_TYPE_GEN2_LB,
-+	CLK_TYPE_GEN2_ADSP,
-+	CLK_TYPE_GEN2_SDH,
-+	CLK_TYPE_GEN2_SD0,
-+	CLK_TYPE_GEN2_SD1,
-+	CLK_TYPE_GEN2_QSPI,
-+	CLK_TYPE_GEN2_RCAN,
-+};
-+
-+struct rcar_gen2_cpg_pll_config {
-+	unsigned int extal_div;
-+	unsigned int pll1_mult;
-+	unsigned int pll3_mult;
-+	unsigned int pll0_mult;		/* leave as zero if PLL0CR exists */
-+};
-+
-+struct clk *rcar_gen2_cpg_clk_register(struct device *dev,
-+				       const struct cpg_core_clk *core,
-+				       const struct cpg_mssr_info *info,
-+				       struct clk **clks, void __iomem *base);
-+int rcar_gen2_cpg_init(const struct rcar_gen2_cpg_pll_config *config,
-+		       unsigned int pll0_div, u32 mode);
-+
-+#endif
diff --git a/patches.renesas/0196-usb-host-xhci-use-slightly-better-list-helpers.patch b/patches.renesas/0196-usb-host-xhci-use-slightly-better-list-helpers.patch
deleted file mode 100644
index 093d13f2ac6b55..00000000000000
--- a/patches.renesas/0196-usb-host-xhci-use-slightly-better-list-helpers.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From 17fe56b3294003385f4706221ad468bc0eb991dc Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:09 +0200
-Subject: [PATCH 196/255] usb: host: xhci: use slightly better list helpers
-
-Replace list_entry() with list_first_entry() and list_for_each() with
-list_for_each_entry(). This makes the code slightly more readable.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 04861f83367eaa3f32e3a1433afe8274e9a5f7f1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   19 ++++++++++---------
- 1 file changed, 10 insertions(+), 9 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -689,7 +689,6 @@ static void xhci_handle_cmd_stop_ep(stru
- 	unsigned int ep_index;
- 	struct xhci_ring *ep_ring;
- 	struct xhci_virt_ep *ep;
--	struct list_head *entry;
- 	struct xhci_td *cur_td = NULL;
- 	struct xhci_td *last_unlinked_td;
- 
-@@ -706,6 +705,8 @@ static void xhci_handle_cmd_stop_ep(stru
- 	memset(&deq_state, 0, sizeof(deq_state));
- 	ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
- 	ep = &xhci->devs[slot_id]->eps[ep_index];
-+	last_unlinked_td = list_last_entry(&ep->cancelled_td_list,
-+			struct xhci_td, cancelled_td_list);
- 
- 	if (list_empty(&ep->cancelled_td_list)) {
- 		xhci_stop_watchdog_timer_in_irq(xhci, ep);
-@@ -719,8 +720,7 @@ static void xhci_handle_cmd_stop_ep(stru
- 	 * it.  We're also in the event handler, so we can't get re-interrupted
- 	 * if another Stop Endpoint command completes
- 	 */
--	list_for_each(entry, &ep->cancelled_td_list) {
--		cur_td = list_entry(entry, struct xhci_td, cancelled_td_list);
-+	list_for_each_entry(cur_td, &ep->cancelled_td_list, cancelled_td_list) {
- 		xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
- 				"Removing canceled TD starting at 0x%llx (dma).",
- 				(unsigned long long)xhci_trb_virt_to_dma(
-@@ -762,7 +762,7 @@ remove_finished_td:
- 		 */
- 		list_del_init(&cur_td->td_list);
- 	}
--	last_unlinked_td = cur_td;
-+
- 	xhci_stop_watchdog_timer_in_irq(xhci, ep);
- 
- 	/* If necessary, queue a Set Transfer Ring Dequeue Pointer command */
-@@ -784,7 +784,7 @@ remove_finished_td:
- 	 * So stop when we've completed the URB for the last TD we unlinked.
- 	 */
- 	do {
--		cur_td = list_entry(ep->cancelled_td_list.next,
-+		cur_td = list_first_entry(&ep->cancelled_td_list,
- 				struct xhci_td, cancelled_td_list);
- 		list_del_init(&cur_td->cancelled_td_list);
- 
-@@ -1338,7 +1338,7 @@ static void handle_cmd_completion(struct
- 		return;
- 	}
- 
--	cmd = list_entry(xhci->cmd_list.next, struct xhci_command, cmd_list);
-+	cmd = list_first_entry(&xhci->cmd_list, struct xhci_command, cmd_list);
- 
- 	cancel_delayed_work(&xhci->cmd_timer);
- 
-@@ -1429,8 +1429,8 @@ static void handle_cmd_completion(struct
- 
- 	/* restart timer if this wasn't the last command */
- 	if (!list_is_singular(&xhci->cmd_list)) {
--		xhci->current_cmd = list_entry(cmd->cmd_list.next,
--					       struct xhci_command, cmd_list);
-+		xhci->current_cmd = list_first_entry(&cmd->cmd_list,
-+						struct xhci_command, cmd_list);
- 		xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
- 	} else if (xhci->current_cmd == cmd) {
- 		xhci->current_cmd = NULL;
-@@ -2424,7 +2424,8 @@ static int handle_tx_event(struct xhci_h
- 			goto cleanup;
- 		}
- 
--		td = list_entry(ep_ring->td_list.next, struct xhci_td, td_list);
-+		td = list_first_entry(&ep_ring->td_list, struct xhci_td,
-+				      td_list);
- 		if (ep->skip)
- 			td_num--;
- 
diff --git a/patches.renesas/0196-usb-xhci-fix-link-trb-decoding.patch b/patches.renesas/0196-usb-xhci-fix-link-trb-decoding.patch
deleted file mode 100644
index 27fe92b10411e1..00000000000000
--- a/patches.renesas/0196-usb-xhci-fix-link-trb-decoding.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 248f2891d24f12be25f879ff27496cd2516de5c3 Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:57:10 +0300
-Subject: [PATCH 196/286] usb: xhci: fix link trb decoding
-
-xhci_decode_trb() treats a link trb in the same way as that for
-an event trb. This patch fixes this by decoding the link trb
-according to the spec.
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 96d9a6eb97d77d6a3768f101f400c42743799bb2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci.h |   12 +++++-------
- 1 file changed, 5 insertions(+), 7 deletions(-)
-
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -2142,14 +2142,12 @@ static inline const char *xhci_decode_tr
- 	switch (type) {
- 	case TRB_LINK:
- 		sprintf(str,
--			"TRB %08x%08x status '%s' len %d slot %d ep %d type '%s' flags %c:%c",
--			field1, field0,
--			xhci_trb_comp_code_string(GET_COMP_CODE(field2)),
--			EVENT_TRB_LEN(field2), TRB_TO_SLOT_ID(field3),
--			/* Macro decrements 1, maybe it shouldn't?!? */
--			TRB_TO_EP_INDEX(field3) + 1,
-+			"LINK %08x%08x intr %d type '%s' flags %c:%c:%c:%c",
-+			field1, field0, GET_INTR_TARGET(field2),
- 			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
--			field3 & EVENT_DATA ? 'E' : 'e',
-+			field3 & TRB_IOC ? 'I' : 'i',
-+			field3 & TRB_CHAIN ? 'C' : 'c',
-+			field3 & TRB_TC ? 'T' : 't',
- 			field3 & TRB_CYCLE ? 'C' : 'c');
- 		break;
- 	case TRB_TRANSFER:
diff --git a/patches.renesas/0197-clk-renesas-cpg-mssr-Add-R8A7743-support.patch b/patches.renesas/0197-clk-renesas-cpg-mssr-Add-R8A7743-support.patch
deleted file mode 100644
index 2a6be7272497d3..00000000000000
--- a/patches.renesas/0197-clk-renesas-cpg-mssr-Add-R8A7743-support.patch
+++ /dev/null
@@ -1,365 +0,0 @@
-From f4b1e8000040d9bb35ebfdcf4556f7c2d1d3bb4f Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 9 Nov 2016 00:21:50 +0300
-Subject: [PATCH 197/299] clk: renesas: cpg-mssr: Add R8A7743 support
-
-Add RZ/G1M (R8A7743) Clock Pulse Generator / Module Standby and Software
-Reset support, using the CPG/MSSR driver core and the common R-Car Gen2
-(and RZ/G) code.
-
-Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert
-Uytterhoeven <geert+renesas@glider.be>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit c0b2d75d2a4bf6a3f29d13c4bfa2557dfa22828d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt |    4 
- drivers/clk/renesas/Kconfig                                  |    1 
- drivers/clk/renesas/Makefile                                 |    1 
- drivers/clk/renesas/r8a7743-cpg-mssr.c                       |  270 +++++++++++
- drivers/clk/renesas/renesas-cpg-mssr.c                       |    6 
- drivers/clk/renesas/renesas-cpg-mssr.h                       |    1 
- 6 files changed, 282 insertions(+), 1 deletion(-)
- create mode 100644 drivers/clk/renesas/r8a7743-cpg-mssr.c
-
---- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
-+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
-@@ -13,6 +13,7 @@ They provide the following functionaliti
- 
- Required Properties:
-   - compatible: Must be one of:
-+      - "renesas,r8a7743-cpg-mssr" for the r8a7743 SoC (RZ/G1M)
-       - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)
-       - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)
- 
-@@ -22,8 +23,9 @@ Required Properties:
-   - clocks: References to external parent clocks, one entry for each entry in
-     clock-names
-   - clock-names: List of external parent clock names. Valid names are:
--      - "extal" (r8a7795, r8a7796)
-+      - "extal" (r8a7743, r8a7795, r8a7796)
-       - "extalr" (r8a7795, r8a7796)
-+      - "usb_extal" (r8a7743)
- 
-   - #clock-cells: Must be 2
-       - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"
---- a/drivers/clk/renesas/Kconfig
-+++ b/drivers/clk/renesas/Kconfig
-@@ -1,5 +1,6 @@
- config CLK_RENESAS_CPG_MSSR
- 	bool
-+	default y if ARCH_R8A7743
- 	default y if ARCH_R8A7795
- 	default y if ARCH_R8A7796
- 
---- a/drivers/clk/renesas/Makefile
-+++ b/drivers/clk/renesas/Makefile
-@@ -2,6 +2,7 @@ obj-$(CONFIG_ARCH_EMEV2)		+= clk-emev2.o
- obj-$(CONFIG_ARCH_R7S72100)		+= clk-rz.o
- obj-$(CONFIG_ARCH_R8A73A4)		+= clk-r8a73a4.o clk-div6.o
- obj-$(CONFIG_ARCH_R8A7740)		+= clk-r8a7740.o clk-div6.o
-+obj-$(CONFIG_ARCH_R8A7743)		+= r8a7743-cpg-mssr.o rcar-gen2-cpg.o
- obj-$(CONFIG_ARCH_R8A7778)		+= clk-r8a7778.o
- obj-$(CONFIG_ARCH_R8A7779)		+= clk-r8a7779.o
- obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o clk-div6.o
---- /dev/null
-+++ b/drivers/clk/renesas/r8a7743-cpg-mssr.c
-@@ -0,0 +1,270 @@
-+/*
-+ * r8a7743 Clock Pulse Generator / Module Standby and Software Reset
-+ *
-+ * Copyright (C) 2016 Cogent Embedded Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation; of the License.
-+ */
-+
-+#include <linux/device.h>
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/soc/renesas/rcar-rst.h>
-+
-+#include <dt-bindings/clock/r8a7743-cpg-mssr.h>
-+
-+#include "renesas-cpg-mssr.h"
-+#include "rcar-gen2-cpg.h"
-+
-+enum clk_ids {
-+	/* Core Clock Outputs exported to DT */
-+	LAST_DT_CORE_CLK = R8A7743_CLK_OSC,
-+
-+	/* External Input Clocks */
-+	CLK_EXTAL,
-+	CLK_USB_EXTAL,
-+
-+	/* Internal Core Clocks */
-+	CLK_MAIN,
-+	CLK_PLL0,
-+	CLK_PLL1,
-+	CLK_PLL3,
-+	CLK_PLL1_DIV2,
-+
-+	/* Module Clocks */
-+	MOD_CLK_BASE
-+};
-+
-+static const struct cpg_core_clk r8a7743_core_clks[] __initconst = {
-+	/* External Clock Inputs */
-+	DEF_INPUT("extal",	CLK_EXTAL),
-+	DEF_INPUT("usb_extal",	CLK_USB_EXTAL),
-+
-+	/* Internal Core Clocks */
-+	DEF_BASE(".main",	CLK_MAIN, CLK_TYPE_GEN2_MAIN, CLK_EXTAL),
-+	DEF_BASE(".pll0",	CLK_PLL0, CLK_TYPE_GEN2_PLL0, CLK_MAIN),
-+	DEF_BASE(".pll1",	CLK_PLL1, CLK_TYPE_GEN2_PLL1, CLK_MAIN),
-+	DEF_BASE(".pll3",	CLK_PLL3, CLK_TYPE_GEN2_PLL3, CLK_MAIN),
-+
-+	DEF_FIXED(".pll1_div2",	CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
-+
-+	/* Core Clock Outputs */
-+	DEF_BASE("z",    R8A7743_CLK_Z,    CLK_TYPE_GEN2_Z,	CLK_PLL0),
-+	DEF_BASE("lb",   R8A7743_CLK_LB,   CLK_TYPE_GEN2_LB,	CLK_PLL1),
-+	DEF_BASE("sdh",  R8A7743_CLK_SDH,  CLK_TYPE_GEN2_SDH,	CLK_PLL1),
-+	DEF_BASE("sd0",  R8A7743_CLK_SD0,  CLK_TYPE_GEN2_SD0,	CLK_PLL1),
-+	DEF_BASE("qspi", R8A7743_CLK_QSPI, CLK_TYPE_GEN2_QSPI,	CLK_PLL1_DIV2),
-+	DEF_BASE("rcan", R8A7743_CLK_RCAN, CLK_TYPE_GEN2_RCAN,	CLK_USB_EXTAL),
-+
-+	DEF_FIXED("zg",    R8A7743_CLK_ZG,	CLK_PLL1,	    3, 1),
-+	DEF_FIXED("zx",    R8A7743_CLK_ZX,	CLK_PLL1,	    3, 1),
-+	DEF_FIXED("zs",    R8A7743_CLK_ZS,	CLK_PLL1,	    6, 1),
-+	DEF_FIXED("hp",    R8A7743_CLK_HP,	CLK_PLL1,	   12, 1),
-+	DEF_FIXED("b",     R8A7743_CLK_B,	CLK_PLL1,	   12, 1),
-+	DEF_FIXED("p",     R8A7743_CLK_P,	CLK_PLL1,	   24, 1),
-+	DEF_FIXED("cl",    R8A7743_CLK_CL,	CLK_PLL1,	   48, 1),
-+	DEF_FIXED("m2",    R8A7743_CLK_M2,	CLK_PLL1,	    8, 1),
-+	DEF_FIXED("zb3",   R8A7743_CLK_ZB3,	CLK_PLL3,	    4, 1),
-+	DEF_FIXED("zb3d2", R8A7743_CLK_ZB3D2,	CLK_PLL3,	    8, 1),
-+	DEF_FIXED("ddr",   R8A7743_CLK_DDR,	CLK_PLL3,	    8, 1),
-+	DEF_FIXED("mp",    R8A7743_CLK_MP,	CLK_PLL1_DIV2,	   15, 1),
-+	DEF_FIXED("cp",    R8A7743_CLK_CP,	CLK_EXTAL,	    2, 1),
-+	DEF_FIXED("r",     R8A7743_CLK_R,	CLK_PLL1,	49152, 1),
-+	DEF_FIXED("osc",   R8A7743_CLK_OSC,	CLK_PLL1,	12288, 1),
-+
-+	DEF_DIV6P1("sd2",  R8A7743_CLK_SD2,	CLK_PLL1_DIV2,	0x078),
-+	DEF_DIV6P1("sd3",  R8A7743_CLK_SD3,	CLK_PLL1_DIV2,	0x26c),
-+	DEF_DIV6P1("mmc0", R8A7743_CLK_MMC0,	CLK_PLL1_DIV2,	0x240),
-+};
-+
-+static const struct mssr_mod_clk r8a7743_mod_clks[] __initconst = {
-+	DEF_MOD("msiof0",		   0,	R8A7743_CLK_MP),
-+	DEF_MOD("vcp0",			 101,	R8A7743_CLK_ZS),
-+	DEF_MOD("vpc0",			 103,	R8A7743_CLK_ZS),
-+	DEF_MOD("tmu1",			 111,	R8A7743_CLK_P),
-+	DEF_MOD("3dg",			 112,	R8A7743_CLK_ZG),
-+	DEF_MOD("2d-dmac",		 115,	R8A7743_CLK_ZS),
-+	DEF_MOD("fdp1-1",		 118,	R8A7743_CLK_ZS),
-+	DEF_MOD("fdp1-0",		 119,	R8A7743_CLK_ZS),
-+	DEF_MOD("tmu3",			 121,	R8A7743_CLK_P),
-+	DEF_MOD("tmu2",			 122,	R8A7743_CLK_P),
-+	DEF_MOD("cmt0",			 124,	R8A7743_CLK_R),
-+	DEF_MOD("tmu0",			 125,	R8A7743_CLK_CP),
-+	DEF_MOD("vsp1du1",		 127,	R8A7743_CLK_ZS),
-+	DEF_MOD("vsp1du0",		 128,	R8A7743_CLK_ZS),
-+	DEF_MOD("vsp1-sy",		 131,	R8A7743_CLK_ZS),
-+	DEF_MOD("scifa2",		 202,	R8A7743_CLK_MP),
-+	DEF_MOD("scifa1",		 203,	R8A7743_CLK_MP),
-+	DEF_MOD("scifa0",		 204,	R8A7743_CLK_MP),
-+	DEF_MOD("msiof2",		 205,	R8A7743_CLK_MP),
-+	DEF_MOD("scifb0",		 206,	R8A7743_CLK_MP),
-+	DEF_MOD("scifb1",		 207,	R8A7743_CLK_MP),
-+	DEF_MOD("msiof1",		 208,	R8A7743_CLK_MP),
-+	DEF_MOD("scifb2",		 216,	R8A7743_CLK_MP),
-+	DEF_MOD("sys-dmac1",		 218,	R8A7743_CLK_ZS),
-+	DEF_MOD("sys-dmac0",		 219,	R8A7743_CLK_ZS),
-+	DEF_MOD("tpu0",			 304,	R8A7743_CLK_CP),
-+	DEF_MOD("sdhi3",		 311,	R8A7743_CLK_SD3),
-+	DEF_MOD("sdhi2",		 312,	R8A7743_CLK_SD2),
-+	DEF_MOD("sdhi0",		 314,	R8A7743_CLK_SD0),
-+	DEF_MOD("mmcif0",		 315,	R8A7743_CLK_MMC0),
-+	DEF_MOD("iic0",			 318,	R8A7743_CLK_HP),
-+	DEF_MOD("pciec",		 319,	R8A7743_CLK_MP),
-+	DEF_MOD("iic1",			 323,	R8A7743_CLK_HP),
-+	DEF_MOD("usb3.0",		 328,	R8A7743_CLK_MP),
-+	DEF_MOD("cmt1",			 329,	R8A7743_CLK_R),
-+	DEF_MOD("usbhs-dmac0",		 330,	R8A7743_CLK_HP),
-+	DEF_MOD("usbhs-dmac1",		 331,	R8A7743_CLK_HP),
-+	DEF_MOD("irqc",			 407,	R8A7743_CLK_CP),
-+	DEF_MOD("intc-sys",		 408,	R8A7743_CLK_ZS),
-+	DEF_MOD("audio-dmac1",		 501,	R8A7743_CLK_HP),
-+	DEF_MOD("audio-dmac0",		 502,	R8A7743_CLK_HP),
-+	DEF_MOD("thermal",		 522,	CLK_EXTAL),
-+	DEF_MOD("pwm",			 523,	R8A7743_CLK_P),
-+	DEF_MOD("usb-ehci",		 703,	R8A7743_CLK_MP),
-+	DEF_MOD("usbhs",		 704,	R8A7743_CLK_HP),
-+	DEF_MOD("hscif2",		 713,	R8A7743_CLK_ZS),
-+	DEF_MOD("scif5",		 714,	R8A7743_CLK_P),
-+	DEF_MOD("scif4",		 715,	R8A7743_CLK_P),
-+	DEF_MOD("hscif1",		 716,	R8A7743_CLK_ZS),
-+	DEF_MOD("hscif0",		 717,	R8A7743_CLK_ZS),
-+	DEF_MOD("scif3",		 718,	R8A7743_CLK_P),
-+	DEF_MOD("scif2",		 719,	R8A7743_CLK_P),
-+	DEF_MOD("scif1",		 720,	R8A7743_CLK_P),
-+	DEF_MOD("scif0",		 721,	R8A7743_CLK_P),
-+	DEF_MOD("du1",			 723,	R8A7743_CLK_ZX),
-+	DEF_MOD("du0",			 724,	R8A7743_CLK_ZX),
-+	DEF_MOD("lvds0",		 726,	R8A7743_CLK_ZX),
-+	DEF_MOD("ipmmu-sgx",		 800,	R8A7743_CLK_ZX),
-+	DEF_MOD("vin2",			 809,	R8A7743_CLK_ZG),
-+	DEF_MOD("vin1",			 810,	R8A7743_CLK_ZG),
-+	DEF_MOD("vin0",			 811,	R8A7743_CLK_ZG),
-+	DEF_MOD("etheravb",		 812,	R8A7743_CLK_HP),
-+	DEF_MOD("ether",		 813,	R8A7743_CLK_P),
-+	DEF_MOD("sata1",		 814,	R8A7743_CLK_ZS),
-+	DEF_MOD("sata0",		 815,	R8A7743_CLK_ZS),
-+	DEF_MOD("gpio7",		 904,	R8A7743_CLK_CP),
-+	DEF_MOD("gpio6",		 905,	R8A7743_CLK_CP),
-+	DEF_MOD("gpio5",		 907,	R8A7743_CLK_CP),
-+	DEF_MOD("gpio4",		 908,	R8A7743_CLK_CP),
-+	DEF_MOD("gpio3",		 909,	R8A7743_CLK_CP),
-+	DEF_MOD("gpio2",		 910,	R8A7743_CLK_CP),
-+	DEF_MOD("gpio1",		 911,	R8A7743_CLK_CP),
-+	DEF_MOD("gpio0",		 912,	R8A7743_CLK_CP),
-+	DEF_MOD("can1",			 915,	R8A7743_CLK_P),
-+	DEF_MOD("can0",			 916,	R8A7743_CLK_P),
-+	DEF_MOD("qspi_mod",		 917,	R8A7743_CLK_QSPI),
-+	DEF_MOD("i2c5",			 925,	R8A7743_CLK_HP),
-+	DEF_MOD("iicdvfs",		 926,	R8A7743_CLK_CP),
-+	DEF_MOD("i2c4",			 927,	R8A7743_CLK_HP),
-+	DEF_MOD("i2c3",			 928,	R8A7743_CLK_HP),
-+	DEF_MOD("i2c2",			 929,	R8A7743_CLK_HP),
-+	DEF_MOD("i2c1",			 930,	R8A7743_CLK_HP),
-+	DEF_MOD("i2c0",			 931,	R8A7743_CLK_HP),
-+	DEF_MOD("ssi-all",		1005,	R8A7743_CLK_P),
-+	DEF_MOD("ssi9",			1006,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi8",			1007,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi7",			1008,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi6",			1009,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi5",			1010,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi4",			1011,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi3",			1012,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi2",			1013,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi1",			1014,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi0",			1015,	MOD_CLK_ID(1005)),
-+	DEF_MOD("scu-all",		1017,	R8A7743_CLK_P),
-+	DEF_MOD("scu-dvc1",		1018,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-dvc0",		1019,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-ctu1-mix1",	1020,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-ctu0-mix0",	1021,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src9",		1022,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src8",		1023,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src7",		1024,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src6",		1025,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src5",		1026,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src4",		1027,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src3",		1028,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src2",		1029,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src1",		1030,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src0",		1031,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scifa3",		1106,	R8A7743_CLK_MP),
-+	DEF_MOD("scifa4",		1107,	R8A7743_CLK_MP),
-+	DEF_MOD("scifa5",		1108,	R8A7743_CLK_MP),
-+};
-+
-+static const unsigned int r8a7743_crit_mod_clks[] __initconst = {
-+	MOD_CLK_ID(408),	/* INTC-SYS (GIC) */
-+};
-+
-+/*
-+ * CPG Clock Data
-+ */
-+
-+/*
-+ *    MD	EXTAL		PLL0	PLL1	PLL3
-+ * 14 13 19	(MHz)		*1	*1
-+ *---------------------------------------------------
-+ * 0  0  0	15		x172/2	x208/2	x106
-+ * 0  0  1	15		x172/2	x208/2	x88
-+ * 0  1  0	20		x130/2	x156/2	x80
-+ * 0  1  1	20		x130/2	x156/2	x66
-+ * 1  0  0	26 / 2		x200/2	x240/2	x122
-+ * 1  0  1	26 / 2		x200/2	x240/2	x102
-+ * 1  1  0	30 / 2		x172/2	x208/2	x106
-+ * 1  1  1	30 / 2		x172/2	x208/2	x88
-+ *
-+ * *1 :	Table 7.5a indicates VCO output (PLLx = VCO/2)
-+ */
-+#define CPG_PLL_CONFIG_INDEX(md)	((((md) & BIT(14)) >> 12) | \
-+					 (((md) & BIT(13)) >> 12) | \
-+					 (((md) & BIT(19)) >> 19))
-+
-+static const struct rcar_gen2_cpg_pll_config cpg_pll_configs[8] __initconst = {
-+	/* EXTAL div	PLL1 mult	PLL3 mult */
-+	{ 1,		208,		106,	},
-+	{ 1,		208,		88,	},
-+	{ 1,		156,		80,	},
-+	{ 1,		156,		66,	},
-+	{ 2,		240,		122,	},
-+	{ 2,		240,		102,	},
-+	{ 2,		208,		106,	},
-+	{ 2,		208,		88,	},
-+};
-+
-+static int __init r8a7743_cpg_mssr_init(struct device *dev)
-+{
-+	const struct rcar_gen2_cpg_pll_config *cpg_pll_config;
-+	u32 cpg_mode;
-+	int error;
-+
-+	error = rcar_rst_read_mode_pins(&cpg_mode);
-+	if (error)
-+		return error;
-+
-+	cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
-+
-+	return rcar_gen2_cpg_init(cpg_pll_config, 2, cpg_mode);
-+}
-+
-+const struct cpg_mssr_info r8a7743_cpg_mssr_info __initconst = {
-+	/* Core Clocks */
-+	.core_clks = r8a7743_core_clks,
-+	.num_core_clks = ARRAY_SIZE(r8a7743_core_clks),
-+	.last_dt_core_clk = LAST_DT_CORE_CLK,
-+	.num_total_core_clks = MOD_CLK_BASE,
-+
-+	/* Module Clocks */
-+	.mod_clks = r8a7743_mod_clks,
-+	.num_mod_clks = ARRAY_SIZE(r8a7743_mod_clks),
-+	.num_hw_mod_clks = 12 * 32,
-+
-+	/* Critical Module Clocks */
-+	.crit_mod_clks = r8a7743_crit_mod_clks,
-+	.num_crit_mod_clks = ARRAY_SIZE(r8a7743_crit_mod_clks),
-+
-+	/* Callbacks */
-+	.init = r8a7743_cpg_mssr_init,
-+	.cpg_clk_register = rcar_gen2_cpg_clk_register,
-+};
---- a/drivers/clk/renesas/renesas-cpg-mssr.c
-+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
-@@ -503,6 +503,12 @@ static int __init cpg_mssr_add_clk_domai
- }
- 
- static const struct of_device_id cpg_mssr_match[] = {
-+#ifdef CONFIG_ARCH_R8A7743
-+	{
-+		.compatible = "renesas,r8a7743-cpg-mssr",
-+		.data = &r8a7743_cpg_mssr_info,
-+	},
-+#endif
- #ifdef CONFIG_ARCH_R8A7795
- 	{
- 		.compatible = "renesas,r8a7795-cpg-mssr",
---- a/drivers/clk/renesas/renesas-cpg-mssr.h
-+++ b/drivers/clk/renesas/renesas-cpg-mssr.h
-@@ -130,6 +130,7 @@ struct cpg_mssr_info {
- 					struct clk **clks, void __iomem *base);
- };
- 
-+extern const struct cpg_mssr_info r8a7743_cpg_mssr_info;
- extern const struct cpg_mssr_info r8a7795_cpg_mssr_info;
- extern const struct cpg_mssr_info r8a7796_cpg_mssr_info;
- #endif
diff --git a/patches.renesas/0197-usb-host-xhci-reorder-variable-definitions.patch b/patches.renesas/0197-usb-host-xhci-reorder-variable-definitions.patch
deleted file mode 100644
index b4e27084cd4a1c..00000000000000
--- a/patches.renesas/0197-usb-host-xhci-reorder-variable-definitions.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 472de28e1eeda25e4fedaea6781e8196d9288404 Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:10 +0200
-Subject: [PATCH 197/255] usb: host: xhci: reorder variable definitions
-
-no functional changes. Simple cleanup to make sure variables are ordered
-in a 'reverse christmas tree' fashion. While at that, also remove an
-obsolete comment which doesn't apply anymore.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit be0f50c2e3c4bb9bd8fcb4b89879ae62308019bf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   12 ++++--------
- 1 file changed, 4 insertions(+), 8 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1825,22 +1825,18 @@ int xhci_is_vendor_info_code(struct xhci
- 	return 0;
- }
- 
--/*
-- * Finish the td processing, remove the td from td list;
-- * Return 1 if the urb can be given back.
-- */
- static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
- 	union xhci_trb *ep_trb, struct xhci_transfer_event *event,
- 	struct xhci_virt_ep *ep, int *status, bool skip)
- {
- 	struct xhci_virt_device *xdev;
--	struct xhci_ring *ep_ring;
--	unsigned int slot_id;
--	int ep_index;
--	struct urb *urb = NULL;
- 	struct xhci_ep_ctx *ep_ctx;
-+	struct xhci_ring *ep_ring;
- 	struct urb_priv	*urb_priv;
-+	struct urb *urb = NULL;
-+	unsigned int slot_id;
- 	u32 trb_comp_code;
-+	int ep_index;
- 
- 	slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
- 	xdev = xhci->devs[slot_id];
diff --git a/patches.renesas/0197-usb-xhci-refine-xhci_decode_trb.patch b/patches.renesas/0197-usb-xhci-refine-xhci_decode_trb.patch
deleted file mode 100644
index 18ecee26655270..00000000000000
--- a/patches.renesas/0197-usb-xhci-refine-xhci_decode_trb.patch
+++ /dev/null
@@ -1,195 +0,0 @@
-From 78d15a9ca068a20a9884df7da237740b0cfac1ea Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Fri, 7 Apr 2017 17:57:11 +0300
-Subject: [PATCH 197/286] usb: xhci: refine xhci_decode_trb()
-
-Replace 'TRB_FIELD_TO_TYPE(field3)' with 'type' to simplify
-code.
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit d2561626b9d126a94753ad6f048114bab702f02f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci.h |   40 ++++++++++++++++++++--------------------
- 1 file changed, 20 insertions(+), 20 deletions(-)
-
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -2144,7 +2144,7 @@ static inline const char *xhci_decode_tr
- 		sprintf(str,
- 			"LINK %08x%08x intr %d type '%s' flags %c:%c:%c:%c",
- 			field1, field0, GET_INTR_TARGET(field2),
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			field3 & TRB_IOC ? 'I' : 'i',
- 			field3 & TRB_CHAIN ? 'C' : 'c',
- 			field3 & TRB_TC ? 'T' : 't',
-@@ -2165,7 +2165,7 @@ static inline const char *xhci_decode_tr
- 			EVENT_TRB_LEN(field2), TRB_TO_SLOT_ID(field3),
- 			/* Macro decrements 1, maybe it shouldn't?!? */
- 			TRB_TO_EP_INDEX(field3) + 1,
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			field3 & EVENT_DATA ? 'E' : 'e',
- 			field3 & TRB_CYCLE ? 'C' : 'c');
- 
-@@ -2182,7 +2182,7 @@ static inline const char *xhci_decode_tr
- 				(field1 & 0xff0000) >> 16,
- 				TRB_LEN(field2), GET_TD_SIZE(field2),
- 				GET_INTR_TARGET(field2),
--				xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+				xhci_trb_type_string(type),
- 				field3 & TRB_IDT ? 'I' : 'i',
- 				field3 & TRB_IOC ? 'I' : 'i',
- 				field3 & TRB_CYCLE ? 'C' : 'c');
-@@ -2191,7 +2191,7 @@ static inline const char *xhci_decode_tr
- 		sprintf(str, "Buffer %08x%08x length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c:%c:%c:%c",
- 				field1, field0, TRB_LEN(field2), GET_TD_SIZE(field2),
- 				GET_INTR_TARGET(field2),
--				xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+				xhci_trb_type_string(type),
- 				field3 & TRB_IDT ? 'I' : 'i',
- 				field3 & TRB_IOC ? 'I' : 'i',
- 				field3 & TRB_CHAIN ? 'C' : 'c',
-@@ -2204,7 +2204,7 @@ static inline const char *xhci_decode_tr
- 		sprintf(str, "Buffer %08x%08x length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c",
- 				field1, field0, TRB_LEN(field2), GET_TD_SIZE(field2),
- 				GET_INTR_TARGET(field2),
--				xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+				xhci_trb_type_string(type),
- 				field3 & TRB_IOC ? 'I' : 'i',
- 				field3 & TRB_CHAIN ? 'C' : 'c',
- 				field3 & TRB_ENT ? 'E' : 'e',
-@@ -2218,7 +2218,7 @@ static inline const char *xhci_decode_tr
- 			"Buffer %08x%08x length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c:%c:%c:%c:%c",
- 			field1, field0, TRB_LEN(field2), GET_TD_SIZE(field2),
- 			GET_INTR_TARGET(field2),
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			field3 & TRB_BEI ? 'B' : 'b',
- 			field3 & TRB_IDT ? 'I' : 'i',
- 			field3 & TRB_IOC ? 'I' : 'i',
-@@ -2233,21 +2233,21 @@ static inline const char *xhci_decode_tr
- 	case TRB_ENABLE_SLOT:
- 		sprintf(str,
- 			"%s: flags %c",
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			field3 & TRB_CYCLE ? 'C' : 'c');
- 		break;
- 	case TRB_DISABLE_SLOT:
- 	case TRB_NEG_BANDWIDTH:
- 		sprintf(str,
- 			"%s: slot %d flags %c",
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			TRB_TO_SLOT_ID(field3),
- 			field3 & TRB_CYCLE ? 'C' : 'c');
- 		break;
- 	case TRB_ADDR_DEV:
- 		sprintf(str,
- 			"%s: ctx %08x%08x slot %d flags %c:%c",
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			field1, field0,
- 			TRB_TO_SLOT_ID(field3),
- 			field3 & TRB_BSR ? 'B' : 'b',
-@@ -2256,7 +2256,7 @@ static inline const char *xhci_decode_tr
- 	case TRB_CONFIG_EP:
- 		sprintf(str,
- 			"%s: ctx %08x%08x slot %d flags %c:%c",
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			field1, field0,
- 			TRB_TO_SLOT_ID(field3),
- 			field3 & TRB_DC ? 'D' : 'd',
-@@ -2265,7 +2265,7 @@ static inline const char *xhci_decode_tr
- 	case TRB_EVAL_CONTEXT:
- 		sprintf(str,
- 			"%s: ctx %08x%08x slot %d flags %c",
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			field1, field0,
- 			TRB_TO_SLOT_ID(field3),
- 			field3 & TRB_CYCLE ? 'C' : 'c');
-@@ -2273,7 +2273,7 @@ static inline const char *xhci_decode_tr
- 	case TRB_RESET_EP:
- 		sprintf(str,
- 			"%s: ctx %08x%08x slot %d ep %d flags %c",
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			field1, field0,
- 			TRB_TO_SLOT_ID(field3),
- 			/* Macro decrements 1, maybe it shouldn't?!? */
-@@ -2283,7 +2283,7 @@ static inline const char *xhci_decode_tr
- 	case TRB_STOP_RING:
- 		sprintf(str,
- 			"%s: slot %d sp %d ep %d flags %c",
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			TRB_TO_SLOT_ID(field3),
- 			TRB_TO_SUSPEND_PORT(field3),
- 			/* Macro decrements 1, maybe it shouldn't?!? */
-@@ -2293,7 +2293,7 @@ static inline const char *xhci_decode_tr
- 	case TRB_SET_DEQ:
- 		sprintf(str,
- 			"%s: deq %08x%08x stream %d slot %d ep %d flags %c",
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			field1, field0,
- 			TRB_TO_STREAM_ID(field2),
- 			TRB_TO_SLOT_ID(field3),
-@@ -2304,14 +2304,14 @@ static inline const char *xhci_decode_tr
- 	case TRB_RESET_DEV:
- 		sprintf(str,
- 			"%s: slot %d flags %c",
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			TRB_TO_SLOT_ID(field3),
- 			field3 & TRB_CYCLE ? 'C' : 'c');
- 		break;
- 	case TRB_FORCE_EVENT:
- 		sprintf(str,
- 			"%s: event %08x%08x vf intr %d vf id %d flags %c",
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			field1, field0,
- 			TRB_TO_VF_INTR_TARGET(field2),
- 			TRB_TO_VF_ID(field3),
-@@ -2320,14 +2320,14 @@ static inline const char *xhci_decode_tr
- 	case TRB_SET_LT:
- 		sprintf(str,
- 			"%s: belt %d flags %c",
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			TRB_TO_BELT(field3),
- 			field3 & TRB_CYCLE ? 'C' : 'c');
- 		break;
- 	case TRB_GET_BW:
- 		sprintf(str,
- 			"%s: ctx %08x%08x slot %d speed %d flags %c",
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			field1, field0,
- 			TRB_TO_SLOT_ID(field3),
- 			TRB_TO_DEV_SPEED(field3),
-@@ -2336,7 +2336,7 @@ static inline const char *xhci_decode_tr
- 	case TRB_FORCE_HEADER:
- 		sprintf(str,
- 			"%s: info %08x%08x%08x pkt type %d roothub port %d flags %c",
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			field2, field1, field0 & 0xffffffe0,
- 			TRB_TO_PACKET_TYPE(field0),
- 			TRB_TO_ROOTHUB_PORT(field3),
-@@ -2345,7 +2345,7 @@ static inline const char *xhci_decode_tr
- 	default:
- 		sprintf(str,
- 			"type '%s' -> raw %08x %08x %08x %08x",
--			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			xhci_trb_type_string(type),
- 			field0, field1, field2, field3);
- 	}
- 
diff --git a/patches.renesas/0198-clk-renesas-cpg-mssr-Add-R8A7745-support.patch b/patches.renesas/0198-clk-renesas-cpg-mssr-Add-R8A7745-support.patch
deleted file mode 100644
index c522847f46e30a..00000000000000
--- a/patches.renesas/0198-clk-renesas-cpg-mssr-Add-R8A7745-support.patch
+++ /dev/null
@@ -1,356 +0,0 @@
-From 0c784f4afe506226423a481da2768ad4e1b28e33 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 9 Nov 2016 00:25:08 +0300
-Subject: [PATCH 198/299] clk: renesas: cpg-mssr: Add R8A7745 support
-
-Add RZ/G1E (R8A7745) Clock Pulse Generator / Module Standby and Software
-Reset support, using the CPG/MSSR driver core and the common R-Car Gen2
-(and RZ/G) code.
-
-Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert
-Uytterhoeven <geert+renesas@glider.be>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 9127d54bb89471592b3c8af6c6273c21db6de6a6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt |    5 
- drivers/clk/renesas/Kconfig                                  |    1 
- drivers/clk/renesas/Makefile                                 |    1 
- drivers/clk/renesas/r8a7745-cpg-mssr.c                       |  259 +++++++++++
- drivers/clk/renesas/renesas-cpg-mssr.c                       |    6 
- drivers/clk/renesas/renesas-cpg-mssr.h                       |    1 
- 6 files changed, 271 insertions(+), 2 deletions(-)
- create mode 100644 drivers/clk/renesas/r8a7745-cpg-mssr.c
-
---- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
-+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
-@@ -14,6 +14,7 @@ They provide the following functionaliti
- Required Properties:
-   - compatible: Must be one of:
-       - "renesas,r8a7743-cpg-mssr" for the r8a7743 SoC (RZ/G1M)
-+      - "renesas,r8a7745-cpg-mssr" for the r8a7745 SoC (RZ/G1E)
-       - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)
-       - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)
- 
-@@ -23,9 +24,9 @@ Required Properties:
-   - clocks: References to external parent clocks, one entry for each entry in
-     clock-names
-   - clock-names: List of external parent clock names. Valid names are:
--      - "extal" (r8a7743, r8a7795, r8a7796)
-+      - "extal" (r8a7743, r8a7745, r8a7795, r8a7796)
-       - "extalr" (r8a7795, r8a7796)
--      - "usb_extal" (r8a7743)
-+      - "usb_extal" (r8a7743, r8a7745)
- 
-   - #clock-cells: Must be 2
-       - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"
---- a/drivers/clk/renesas/Kconfig
-+++ b/drivers/clk/renesas/Kconfig
-@@ -1,6 +1,7 @@
- config CLK_RENESAS_CPG_MSSR
- 	bool
- 	default y if ARCH_R8A7743
-+	default y if ARCH_R8A7745
- 	default y if ARCH_R8A7795
- 	default y if ARCH_R8A7796
- 
---- a/drivers/clk/renesas/Makefile
-+++ b/drivers/clk/renesas/Makefile
-@@ -3,6 +3,7 @@ obj-$(CONFIG_ARCH_R7S72100)		+= clk-rz.o
- obj-$(CONFIG_ARCH_R8A73A4)		+= clk-r8a73a4.o clk-div6.o
- obj-$(CONFIG_ARCH_R8A7740)		+= clk-r8a7740.o clk-div6.o
- obj-$(CONFIG_ARCH_R8A7743)		+= r8a7743-cpg-mssr.o rcar-gen2-cpg.o
-+obj-$(CONFIG_ARCH_R8A7745)		+= r8a7745-cpg-mssr.o rcar-gen2-cpg.o
- obj-$(CONFIG_ARCH_R8A7778)		+= clk-r8a7778.o
- obj-$(CONFIG_ARCH_R8A7779)		+= clk-r8a7779.o
- obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o clk-div6.o
---- /dev/null
-+++ b/drivers/clk/renesas/r8a7745-cpg-mssr.c
-@@ -0,0 +1,259 @@
-+/*
-+ * r8a7745 Clock Pulse Generator / Module Standby and Software Reset
-+ *
-+ * Copyright (C) 2016 Cogent Embedded Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation; of the License.
-+ */
-+
-+#include <linux/device.h>
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/soc/renesas/rcar-rst.h>
-+
-+#include <dt-bindings/clock/r8a7745-cpg-mssr.h>
-+
-+#include "renesas-cpg-mssr.h"
-+#include "rcar-gen2-cpg.h"
-+
-+enum clk_ids {
-+	/* Core Clock Outputs exported to DT */
-+	LAST_DT_CORE_CLK = R8A7745_CLK_OSC,
-+
-+	/* External Input Clocks */
-+	CLK_EXTAL,
-+	CLK_USB_EXTAL,
-+
-+	/* Internal Core Clocks */
-+	CLK_MAIN,
-+	CLK_PLL0,
-+	CLK_PLL1,
-+	CLK_PLL3,
-+	CLK_PLL1_DIV2,
-+
-+	/* Module Clocks */
-+	MOD_CLK_BASE
-+};
-+
-+static const struct cpg_core_clk r8a7745_core_clks[] __initconst = {
-+	/* External Clock Inputs */
-+	DEF_INPUT("extal",	CLK_EXTAL),
-+	DEF_INPUT("usb_extal",	CLK_USB_EXTAL),
-+
-+	/* Internal Core Clocks */
-+	DEF_BASE(".main",	CLK_MAIN, CLK_TYPE_GEN2_MAIN, CLK_EXTAL),
-+	DEF_BASE(".pll0",	CLK_PLL0, CLK_TYPE_GEN2_PLL0, CLK_MAIN),
-+	DEF_BASE(".pll1",	CLK_PLL1, CLK_TYPE_GEN2_PLL1, CLK_MAIN),
-+	DEF_BASE(".pll3",	CLK_PLL3, CLK_TYPE_GEN2_PLL3, CLK_MAIN),
-+
-+	DEF_FIXED(".pll1_div2",	CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
-+
-+	/* Core Clock Outputs */
-+	DEF_BASE("lb",   R8A7745_CLK_LB,   CLK_TYPE_GEN2_LB,	CLK_PLL1),
-+	DEF_BASE("sdh",  R8A7745_CLK_SDH,  CLK_TYPE_GEN2_SDH,	CLK_PLL1),
-+	DEF_BASE("sd0",  R8A7745_CLK_SD0,  CLK_TYPE_GEN2_SD0,	CLK_PLL1),
-+	DEF_BASE("qspi", R8A7745_CLK_QSPI, CLK_TYPE_GEN2_QSPI,	CLK_PLL1_DIV2),
-+	DEF_BASE("rcan", R8A7745_CLK_RCAN, CLK_TYPE_GEN2_RCAN,	CLK_USB_EXTAL),
-+
-+	DEF_FIXED("z2",    R8A7745_CLK_Z2,	CLK_PLL0,	    1, 1),
-+	DEF_FIXED("zg",    R8A7745_CLK_ZG,	CLK_PLL1,	    6, 1),
-+	DEF_FIXED("zx",    R8A7745_CLK_ZX,	CLK_PLL1,	    3, 1),
-+	DEF_FIXED("zs",    R8A7745_CLK_ZS,	CLK_PLL1,	    6, 1),
-+	DEF_FIXED("hp",    R8A7745_CLK_HP,	CLK_PLL1,	   12, 1),
-+	DEF_FIXED("b",     R8A7745_CLK_B,	CLK_PLL1,	   12, 1),
-+	DEF_FIXED("p",     R8A7745_CLK_P,	CLK_PLL1,	   24, 1),
-+	DEF_FIXED("cl",    R8A7745_CLK_CL,	CLK_PLL1,	   48, 1),
-+	DEF_FIXED("cp",    R8A7745_CLK_CP,	CLK_PLL1,	   48, 1),
-+	DEF_FIXED("m2",    R8A7745_CLK_M2,	CLK_PLL1,	    8, 1),
-+	DEF_FIXED("zb3",   R8A7745_CLK_ZB3,	CLK_PLL3,	    4, 1),
-+	DEF_FIXED("zb3d2", R8A7745_CLK_ZB3D2,	CLK_PLL3,	    8, 1),
-+	DEF_FIXED("ddr",   R8A7745_CLK_DDR,	CLK_PLL3,	    8, 1),
-+	DEF_FIXED("mp",    R8A7745_CLK_MP,	CLK_PLL1_DIV2,	   15, 1),
-+	DEF_FIXED("cpex",  R8A7745_CLK_CPEX,	CLK_EXTAL,	    2, 1),
-+	DEF_FIXED("r",     R8A7745_CLK_R,	CLK_PLL1,	49152, 1),
-+	DEF_FIXED("osc",   R8A7745_CLK_OSC,	CLK_PLL1,	12288, 1),
-+
-+	DEF_DIV6P1("sd2",  R8A7745_CLK_SD2,	CLK_PLL1_DIV2,	0x078),
-+	DEF_DIV6P1("sd3",  R8A7745_CLK_SD3,	CLK_PLL1_DIV2,	0x26c),
-+	DEF_DIV6P1("mmc0", R8A7745_CLK_MMC0,	CLK_PLL1_DIV2,	0x240),
-+};
-+
-+static const struct mssr_mod_clk r8a7745_mod_clks[] __initconst = {
-+	DEF_MOD("msiof0",		   0,	R8A7745_CLK_MP),
-+	DEF_MOD("vcp0",			 101,	R8A7745_CLK_ZS),
-+	DEF_MOD("vpc0",			 103,	R8A7745_CLK_ZS),
-+	DEF_MOD("tmu1",			 111,	R8A7745_CLK_P),
-+	DEF_MOD("3dg",			 112,	R8A7745_CLK_ZG),
-+	DEF_MOD("2d-dmac",		 115,	R8A7745_CLK_ZS),
-+	DEF_MOD("fdp1-0",		 119,	R8A7745_CLK_ZS),
-+	DEF_MOD("tmu3",			 121,	R8A7745_CLK_P),
-+	DEF_MOD("tmu2",			 122,	R8A7745_CLK_P),
-+	DEF_MOD("cmt0",			 124,	R8A7745_CLK_R),
-+	DEF_MOD("tmu0",			 125,	R8A7745_CLK_CP),
-+	DEF_MOD("vsp1du0",		 128,	R8A7745_CLK_ZS),
-+	DEF_MOD("vsp1-sy",		 131,	R8A7745_CLK_ZS),
-+	DEF_MOD("scifa2",		 202,	R8A7745_CLK_MP),
-+	DEF_MOD("scifa1",		 203,	R8A7745_CLK_MP),
-+	DEF_MOD("scifa0",		 204,	R8A7745_CLK_MP),
-+	DEF_MOD("msiof2",		 205,	R8A7745_CLK_MP),
-+	DEF_MOD("scifb0",		 206,	R8A7745_CLK_MP),
-+	DEF_MOD("scifb1",		 207,	R8A7745_CLK_MP),
-+	DEF_MOD("msiof1",		 208,	R8A7745_CLK_MP),
-+	DEF_MOD("scifb2",		 216,	R8A7745_CLK_MP),
-+	DEF_MOD("sys-dmac1",		 218,	R8A7745_CLK_ZS),
-+	DEF_MOD("sys-dmac0",		 219,	R8A7745_CLK_ZS),
-+	DEF_MOD("tpu0",			 304,	R8A7745_CLK_CP),
-+	DEF_MOD("sdhi3",		 311,	R8A7745_CLK_SD3),
-+	DEF_MOD("sdhi2",		 312,	R8A7745_CLK_SD2),
-+	DEF_MOD("sdhi0",		 314,	R8A7745_CLK_SD0),
-+	DEF_MOD("mmcif0",		 315,	R8A7745_CLK_MMC0),
-+	DEF_MOD("iic0",			 318,	R8A7745_CLK_HP),
-+	DEF_MOD("iic1",			 323,	R8A7745_CLK_HP),
-+	DEF_MOD("cmt1",			 329,	R8A7745_CLK_R),
-+	DEF_MOD("usbhs-dmac0",		 330,	R8A7745_CLK_HP),
-+	DEF_MOD("usbhs-dmac1",		 331,	R8A7745_CLK_HP),
-+	DEF_MOD("irqc",			 407,	R8A7745_CLK_CP),
-+	DEF_MOD("intc-sys",		 408,	R8A7745_CLK_ZS),
-+	DEF_MOD("audio-dmac0",		 502,	R8A7745_CLK_HP),
-+	DEF_MOD("pwm",			 523,	R8A7745_CLK_P),
-+	DEF_MOD("usb-ehci",		 703,	R8A7745_CLK_MP),
-+	DEF_MOD("usbhs",		 704,	R8A7745_CLK_HP),
-+	DEF_MOD("hscif2",		 713,	R8A7745_CLK_ZS),
-+	DEF_MOD("scif5",		 714,	R8A7745_CLK_P),
-+	DEF_MOD("scif4",		 715,	R8A7745_CLK_P),
-+	DEF_MOD("hscif1",		 716,	R8A7745_CLK_ZS),
-+	DEF_MOD("hscif0",		 717,	R8A7745_CLK_ZS),
-+	DEF_MOD("scif3",		 718,	R8A7745_CLK_P),
-+	DEF_MOD("scif2",		 719,	R8A7745_CLK_P),
-+	DEF_MOD("scif1",		 720,	R8A7745_CLK_P),
-+	DEF_MOD("scif0",		 721,	R8A7745_CLK_P),
-+	DEF_MOD("du0",			 724,	R8A7745_CLK_ZX),
-+	DEF_MOD("ipmmu-sgx",		 800,	R8A7745_CLK_ZX),
-+	DEF_MOD("vin1",			 810,	R8A7745_CLK_ZG),
-+	DEF_MOD("vin0",			 811,	R8A7745_CLK_ZG),
-+	DEF_MOD("etheravb",		 812,	R8A7745_CLK_HP),
-+	DEF_MOD("ether",		 813,	R8A7745_CLK_P),
-+	DEF_MOD("gpio6",		 905,	R8A7745_CLK_CP),
-+	DEF_MOD("gpio5",		 907,	R8A7745_CLK_CP),
-+	DEF_MOD("gpio4",		 908,	R8A7745_CLK_CP),
-+	DEF_MOD("gpio3",		 909,	R8A7745_CLK_CP),
-+	DEF_MOD("gpio2",		 910,	R8A7745_CLK_CP),
-+	DEF_MOD("gpio1",		 911,	R8A7745_CLK_CP),
-+	DEF_MOD("gpio0",		 912,	R8A7745_CLK_CP),
-+	DEF_MOD("can1",			 915,	R8A7745_CLK_P),
-+	DEF_MOD("can0",			 916,	R8A7745_CLK_P),
-+	DEF_MOD("qspi_mod",		 917,	R8A7745_CLK_QSPI),
-+	DEF_MOD("i2c5",			 925,	R8A7745_CLK_HP),
-+	DEF_MOD("i2c4",			 927,	R8A7745_CLK_HP),
-+	DEF_MOD("i2c3",			 928,	R8A7745_CLK_HP),
-+	DEF_MOD("i2c2",			 929,	R8A7745_CLK_HP),
-+	DEF_MOD("i2c1",			 930,	R8A7745_CLK_HP),
-+	DEF_MOD("i2c0",			 931,	R8A7745_CLK_HP),
-+	DEF_MOD("ssi-all",		1005,	R8A7745_CLK_P),
-+	DEF_MOD("ssi9",			1006,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi8",			1007,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi7",			1008,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi6",			1009,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi5",			1010,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi4",			1011,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi3",			1012,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi2",			1013,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi1",			1014,	MOD_CLK_ID(1005)),
-+	DEF_MOD("ssi0",			1015,	MOD_CLK_ID(1005)),
-+	DEF_MOD("scu-all",		1017,	R8A7745_CLK_P),
-+	DEF_MOD("scu-dvc1",		1018,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-dvc0",		1019,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-ctu1-mix1",	1020,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-ctu0-mix0",	1021,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src9",		1022,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src8",		1023,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src7",		1024,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src6",		1025,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src5",		1026,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src4",		1027,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src3",		1028,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src2",		1029,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src1",		1030,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scu-src0",		1031,	MOD_CLK_ID(1017)),
-+	DEF_MOD("scifa3",		1106,	R8A7745_CLK_MP),
-+	DEF_MOD("scifa4",		1107,	R8A7745_CLK_MP),
-+	DEF_MOD("scifa5",		1108,	R8A7745_CLK_MP),
-+};
-+
-+static const unsigned int r8a7745_crit_mod_clks[] __initconst = {
-+	MOD_CLK_ID(408),	/* INTC-SYS (GIC) */
-+};
-+
-+/*
-+ * CPG Clock Data
-+ */
-+
-+/*
-+ *    MD	EXTAL		PLL0	PLL1	PLL3
-+ * 14 13 19	(MHz)		*1	*2
-+ *---------------------------------------------------
-+ * 0  0  0	15		x200/3	x208/2	x106
-+ * 0  0  1	15		x200/3	x208/2	x88
-+ * 0  1  0	20		x150/3	x156/2	x80
-+ * 0  1  1	20		x150/3	x156/2	x66
-+ * 1  0  0	26 / 2		x230/3	x240/2	x122
-+ * 1  0  1	26 / 2		x230/3	x240/2	x102
-+ * 1  1  0	30 / 2		x200/3	x208/2	x106
-+ * 1  1  1	30 / 2		x200/3	x208/2	x88
-+ *
-+ * *1 :	Table 7.5b indicates VCO output (PLL0 = VCO/3)
-+ * *2 :	Table 7.5b indicates VCO output (PLL1 = VCO/2)
-+ */
-+#define CPG_PLL_CONFIG_INDEX(md)	((((md) & BIT(14)) >> 12) | \
-+					 (((md) & BIT(13)) >> 12) | \
-+					 (((md) & BIT(19)) >> 19))
-+
-+static const struct rcar_gen2_cpg_pll_config cpg_pll_configs[8] __initconst = {
-+	/* EXTAL div	PLL1 mult	PLL3 mult	PLL0 mult */
-+	{ 1,		208,		106,		200	},
-+	{ 1,		208,		88,		200	},
-+	{ 1,		156,		80,		150	},
-+	{ 1,		156,		66,		150	},
-+	{ 2,		240,		122,		230	},
-+	{ 2,		240,		102,		230	},
-+	{ 2,		208,		106,		200	},
-+	{ 2,		208,		88,		200	},
-+};
-+
-+static int __init r8a7745_cpg_mssr_init(struct device *dev)
-+{
-+	const struct rcar_gen2_cpg_pll_config *cpg_pll_config;
-+	u32 cpg_mode;
-+	int error;
-+
-+	error = rcar_rst_read_mode_pins(&cpg_mode);
-+	if (error)
-+		return error;
-+
-+	cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
-+
-+	return rcar_gen2_cpg_init(cpg_pll_config, 3, cpg_mode);
-+}
-+
-+const struct cpg_mssr_info r8a7745_cpg_mssr_info __initconst = {
-+	/* Core Clocks */
-+	.core_clks = r8a7745_core_clks,
-+	.num_core_clks = ARRAY_SIZE(r8a7745_core_clks),
-+	.last_dt_core_clk = LAST_DT_CORE_CLK,
-+	.num_total_core_clks = MOD_CLK_BASE,
-+
-+	/* Module Clocks */
-+	.mod_clks = r8a7745_mod_clks,
-+	.num_mod_clks = ARRAY_SIZE(r8a7745_mod_clks),
-+	.num_hw_mod_clks = 12 * 32,
-+
-+	/* Critical Module Clocks */
-+	.crit_mod_clks = r8a7745_crit_mod_clks,
-+	.num_crit_mod_clks = ARRAY_SIZE(r8a7745_crit_mod_clks),
-+
-+	/* Callbacks */
-+	.init = r8a7745_cpg_mssr_init,
-+	.cpg_clk_register = rcar_gen2_cpg_clk_register,
-+};
---- a/drivers/clk/renesas/renesas-cpg-mssr.c
-+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
-@@ -509,6 +509,12 @@ static const struct of_device_id cpg_mss
- 		.data = &r8a7743_cpg_mssr_info,
- 	},
- #endif
-+#ifdef CONFIG_ARCH_R8A7745
-+	{
-+		.compatible = "renesas,r8a7745-cpg-mssr",
-+		.data = &r8a7745_cpg_mssr_info,
-+	},
-+#endif
- #ifdef CONFIG_ARCH_R8A7795
- 	{
- 		.compatible = "renesas,r8a7795-cpg-mssr",
---- a/drivers/clk/renesas/renesas-cpg-mssr.h
-+++ b/drivers/clk/renesas/renesas-cpg-mssr.h
-@@ -131,6 +131,7 @@ struct cpg_mssr_info {
- };
- 
- extern const struct cpg_mssr_info r8a7743_cpg_mssr_info;
-+extern const struct cpg_mssr_info r8a7745_cpg_mssr_info;
- extern const struct cpg_mssr_info r8a7795_cpg_mssr_info;
- extern const struct cpg_mssr_info r8a7796_cpg_mssr_info;
- #endif
diff --git a/patches.renesas/0198-usb-host-xhci-introduce-xhci_td_cleanup.patch b/patches.renesas/0198-usb-host-xhci-introduce-xhci_td_cleanup.patch
deleted file mode 100644
index f1231a609a2850..00000000000000
--- a/patches.renesas/0198-usb-host-xhci-introduce-xhci_td_cleanup.patch
+++ /dev/null
@@ -1,134 +0,0 @@
-From 1eb94a825e9c0bb4890e2c8c4154b8b7f371b954 Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:11 +0200
-Subject: [PATCH 198/255] usb: host: xhci: introduce xhci_td_cleanup()
-
-By extracting xhci_td_cleanup() from finish_td(), code before clearer
-and easier to follow.
-
-There are no functional changes with this patch. It's merely a cleanup.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 55fa4396b24db2adbcf5659ce3d7397c31e6b51c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   92 +++++++++++++++++++++++--------------------
- 1 file changed, 50 insertions(+), 42 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1825,6 +1825,55 @@ int xhci_is_vendor_info_code(struct xhci
- 	return 0;
- }
- 
-+static int xhci_td_cleanup(struct xhci_hcd *xhci, struct xhci_td *td,
-+		struct xhci_ring *ep_ring, int *status)
-+{
-+	struct urb_priv	*urb_priv;
-+	struct urb *urb = NULL;
-+
-+	/* Clean up the endpoint's TD list */
-+	urb = td->urb;
-+	urb_priv = urb->hcpriv;
-+
-+	/* if a bounce buffer was used to align this td then unmap it */
-+	if (td->bounce_seg)
-+		xhci_unmap_td_bounce_buffer(xhci, ep_ring, td);
-+
-+	/* Do one last check of the actual transfer length.
-+	 * If the host controller said we transferred more data than the buffer
-+	 * length, urb->actual_length will be a very big number (since it's
-+	 * unsigned).  Play it safe and say we didn't transfer anything.
-+	 */
-+	if (urb->actual_length > urb->transfer_buffer_length) {
-+		xhci_warn(xhci, "URB req %u and actual %u transfer length mismatch\n",
-+			  urb->transfer_buffer_length, urb->actual_length);
-+		urb->actual_length = 0;
-+		*status = 0;
-+	}
-+	list_del_init(&td->td_list);
-+	/* Was this TD slated to be cancelled but completed anyway? */
-+	if (!list_empty(&td->cancelled_td_list))
-+		list_del_init(&td->cancelled_td_list);
-+
-+	inc_td_cnt(urb);
-+	/* Giveback the urb when all the tds are completed */
-+	if (last_td_in_urb(td)) {
-+		if ((urb->actual_length != urb->transfer_buffer_length &&
-+		     (urb->transfer_flags & URB_SHORT_NOT_OK)) ||
-+		    (*status != 0 && !usb_endpoint_xfer_isoc(&urb->ep->desc)))
-+			xhci_dbg(xhci, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
-+				 urb, urb->actual_length,
-+				 urb->transfer_buffer_length, *status);
-+
-+		/* set isoc urb status to 0 just as EHCI, UHCI, and OHCI */
-+		if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
-+			*status = 0;
-+		xhci_giveback_urb_in_irq(xhci, td, *status);
-+	}
-+
-+	return 0;
-+}
-+
- static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
- 	union xhci_trb *ep_trb, struct xhci_transfer_event *event,
- 	struct xhci_virt_ep *ep, int *status, bool skip)
-@@ -1832,8 +1881,6 @@ static int finish_td(struct xhci_hcd *xh
- 	struct xhci_virt_device *xdev;
- 	struct xhci_ep_ctx *ep_ctx;
- 	struct xhci_ring *ep_ring;
--	struct urb_priv	*urb_priv;
--	struct urb *urb = NULL;
- 	unsigned int slot_id;
- 	u32 trb_comp_code;
- 	int ep_index;
-@@ -1876,46 +1923,7 @@ static int finish_td(struct xhci_hcd *xh
- 	}
- 
- td_cleanup:
--	/* Clean up the endpoint's TD list */
--	urb = td->urb;
--	urb_priv = urb->hcpriv;
--
--	/* if a bounce buffer was used to align this td then unmap it */
--	if (td->bounce_seg)
--		xhci_unmap_td_bounce_buffer(xhci, ep_ring, td);
--
--	/* Do one last check of the actual transfer length.
--	 * If the host controller said we transferred more data than the buffer
--	 * length, urb->actual_length will be a very big number (since it's
--	 * unsigned).  Play it safe and say we didn't transfer anything.
--	 */
--	if (urb->actual_length > urb->transfer_buffer_length) {
--		xhci_warn(xhci, "URB req %u and actual %u transfer length mismatch\n",
--			  urb->transfer_buffer_length, urb->actual_length);
--		urb->actual_length = 0;
--		*status = 0;
--	}
--	list_del_init(&td->td_list);
--	/* Was this TD slated to be cancelled but completed anyway? */
--	if (!list_empty(&td->cancelled_td_list))
--		list_del_init(&td->cancelled_td_list);
--
--	inc_td_cnt(urb);
--	/* Giveback the urb when all the tds are completed */
--	if (last_td_in_urb(td)) {
--		if ((urb->actual_length != urb->transfer_buffer_length &&
--		     (urb->transfer_flags & URB_SHORT_NOT_OK)) ||
--		    (*status != 0 && !usb_endpoint_xfer_isoc(&urb->ep->desc)))
--			xhci_dbg(xhci, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
--				 urb, urb->actual_length,
--				 urb->transfer_buffer_length, *status);
--
--		/* set isoc urb status to 0 just as EHCI, UHCI, and OHCI */
--		if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
--			*status = 0;
--		xhci_giveback_urb_in_irq(xhci, td, *status);
--	}
--	return 0;
-+	return xhci_td_cleanup(xhci, td, ep_ring, status);
- }
- 
- /* sum trb lengths from ring dequeue up to stop_trb, _excluding_ stop_trb */
diff --git a/patches.renesas/0198-usb-xhci-bInterval-quirk-for-TI-TUSB73x0.patch b/patches.renesas/0198-usb-xhci-bInterval-quirk-for-TI-TUSB73x0.patch
deleted file mode 100644
index a1c6b0bd2b8623..00000000000000
--- a/patches.renesas/0198-usb-xhci-bInterval-quirk-for-TI-TUSB73x0.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From dec687bcc93701a13e19a359c687e20c33a382a3 Mon Sep 17 00:00:00 2001
-From: Roger Quadros <rogerq@ti.com>
-Date: Fri, 7 Apr 2017 17:57:12 +0300
-Subject: [PATCH 198/286] usb: xhci: bInterval quirk for TI TUSB73x0
-
-As per [1] issue #4,
-"The periodic EP scheduler always tries to schedule the EPs
-that have large intervals (interval equal to or greater than
-128 microframes) into different microframes. So it maintains
-an internal counter and increments for each large interval
-EP added. When the counter is greater than 128, the scheduler
-rejects the new EP. So when the hub re-enumerated 128 times,
-it triggers this condition."
-
-This results in Bandwidth error when devices with periodic
-endpoints (ISO/INT) having bInterval > 7 are plugged and
-unplugged several times on a TUSB73x0 XHCI host.
-
-Workaround this issue by limiting the bInterval to 7
-(i.e. interval to 6) for High-speed or faster periodic endpoints.
-
-[1] - http://www.ti.com/lit/er/sllz076/sllz076.pdf
-
-Cc: stable <stable@vger.kernel.org>
-Signed-off-by: Roger Quadros <rogerq@ti.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 69307ccb9ad7ccb653e332de68effdeaaab6907d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-pci.c |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/drivers/usb/host/xhci-pci.c
-+++ b/drivers/usb/host/xhci-pci.c
-@@ -217,6 +217,9 @@ static void xhci_pci_quirks(struct devic
- 	if (pdev->vendor == PCI_VENDOR_ID_TI && pdev->device == 0x8241)
- 		xhci->quirks |= XHCI_LIMIT_ENDPOINT_INTERVAL_7;
- 
-+	if (pdev->vendor == PCI_VENDOR_ID_TI && pdev->device == 0x8241)
-+		xhci->quirks |= XHCI_LIMIT_ENDPOINT_INTERVAL_7;
-+
- 	if (xhci->quirks & XHCI_RESET_ON_RESUME)
- 		xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
- 				"QUIRK: Resetting on resume");
diff --git a/patches.renesas/0199-ARM-dts-r7s72100-add-mmcif-clock-to-device-tree.patch b/patches.renesas/0199-ARM-dts-r7s72100-add-mmcif-clock-to-device-tree.patch
deleted file mode 100644
index 324893379580ca..00000000000000
--- a/patches.renesas/0199-ARM-dts-r7s72100-add-mmcif-clock-to-device-tree.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From d970f65930e1af70b60bc271d27b314daf76e94f Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Thu, 15 Sep 2016 15:34:02 -0400
-Subject: [PATCH 199/299] ARM: dts: r7s72100: add mmcif clock to device tree
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6c35a666566cf48faaa95699b0d79c6b8cad824c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100.dtsi            |    9 +++++++++
- include/dt-bindings/clock/r7s72100-clock.h |    3 +++
- 2 files changed, 12 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100.dtsi
-+++ b/arch/arm/boot/dts/r7s72100.dtsi
-@@ -117,6 +117,15 @@
- 			clock-output-names = "ether";
- 		};
- 
-+		mstp8_clks: mstp8_clks@fcfe0434 {
-+			#clock-cells = <1>;
-+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0xfcfe0434 4>;
-+			clocks = <&p1_clk>;
-+			clock-indices = <R7S72100_CLK_MMCIF>;
-+			clock-output-names = "mmcif";
-+		};
-+
- 		mstp9_clks: mstp9_clks@fcfe0438 {
- 			#clock-cells = <1>;
- 			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
---- a/include/dt-bindings/clock/r7s72100-clock.h
-+++ b/include/dt-bindings/clock/r7s72100-clock.h
-@@ -28,6 +28,9 @@
- /* MSTP7 */
- #define R7S72100_CLK_ETHER	4
- 
-+/* MSTP8 */
-+#define R7S72100_CLK_MMCIF	4
-+
- /* MSTP9 */
- #define R7S72100_CLK_I2C0	7
- #define R7S72100_CLK_I2C1	6
diff --git a/patches.renesas/0199-usb-host-xhci-remove-bogus-__releases-__acquires-ann.patch b/patches.renesas/0199-usb-host-xhci-remove-bogus-__releases-__acquires-ann.patch
deleted file mode 100644
index 7002e85b4970e4..00000000000000
--- a/patches.renesas/0199-usb-host-xhci-remove-bogus-__releases-__acquires-ann.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 804aff6c2d4f3d9d74b4921fddeeef6ae7a5059c Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:12 +0200
-Subject: [PATCH 199/255] usb: host: xhci: remove bogus
- __releases()/__acquires() annotation
-
-handle_tx_event() is not releasing xhci->lock nor reacquiring it, remove
-the bogus annotation.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit f3899a28e2b8a6f208187033789ac0f038d3c08e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    2 --
- 1 file changed, 2 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -2226,8 +2226,6 @@ finish_td:
-  */
- static int handle_tx_event(struct xhci_hcd *xhci,
- 		struct xhci_transfer_event *event)
--	__releases(&xhci->lock)
--	__acquires(&xhci->lock)
- {
- 	struct xhci_virt_device *xdev;
- 	struct xhci_virt_ep *ep;
diff --git a/patches.renesas/0199-xhci-use-correct-flags-for-spin_lock_irqrestore-when.patch b/patches.renesas/0199-xhci-use-correct-flags-for-spin_lock_irqrestore-when.patch
deleted file mode 100644
index b02c83f496e4cd..00000000000000
--- a/patches.renesas/0199-xhci-use-correct-flags-for-spin_lock_irqrestore-when.patch
+++ /dev/null
@@ -1,109 +0,0 @@
-From 073324c8d390be34710adb3e1bb9eecc82cce9ce Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Thu, 13 Apr 2017 14:01:04 +0300
-Subject: [PATCH 199/286] xhci: use correct flags for spin_lock_irqrestore()
- when setting port power
-
-commit a6ff6cbf1fab ("usb: xhci: Add helper function xhci_set_power_on().")
-created a helper to control port power that needs to be called with
-xhci->lock held and interrupts disabled.
-It released the lock with spin_unlock_irqrestore using a new zero flag
-variable instead of the original flag from spin_lock_irqsave.
-This regression triggered a static checker warning about bogus flags, and
-a null pointer dereference on armada-385.
-
-Fix it by passing a pointer to the correct flags and using it instead
-
-Fixes: a6ff6cbf1fab ("usb: xhci: Add helper function xhci_set_power_on().")
-Cc: Guoqing Zhang <guoqing.zhang@intel.com>
-Reported-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
-Tested-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit ec1dafe8ec5f846d6b1b280309d8b03d25b096fd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-hub.c |   20 ++++++++++----------
- 1 file changed, 10 insertions(+), 10 deletions(-)
-
---- a/drivers/usb/host/xhci-hub.c
-+++ b/drivers/usb/host/xhci-hub.c
-@@ -573,11 +573,10 @@ static __le32 __iomem *xhci_get_port_io_
-  * method.
-  */
- static void xhci_set_port_power(struct xhci_hcd *xhci, struct usb_hcd *hcd,
--				u16 index, bool on)
-+				u16 index, bool on, unsigned long *flags)
- {
- 	__le32 __iomem *addr;
- 	u32 temp;
--	unsigned long flags = 0;
- 
- 	addr = xhci_get_port_io_addr(hcd, index);
- 	temp = readl(addr);
-@@ -593,13 +592,13 @@ static void xhci_set_port_power(struct x
- 		writel(temp & ~PORT_POWER, addr);
- 	}
- 
--	spin_unlock_irqrestore(&xhci->lock, flags);
-+	spin_unlock_irqrestore(&xhci->lock, *flags);
- 	temp = usb_acpi_power_manageable(hcd->self.root_hub,
- 					index);
- 	if (temp)
- 		usb_acpi_set_power_state(hcd->self.root_hub,
- 			index, on);
--	spin_lock_irqsave(&xhci->lock, flags);
-+	spin_lock_irqsave(&xhci->lock, *flags);
- }
- 
- static void xhci_port_set_test_mode(struct xhci_hcd *xhci,
-@@ -619,7 +618,7 @@ static void xhci_port_set_test_mode(stru
- }
- 
- static int xhci_enter_test_mode(struct xhci_hcd *xhci,
--				u16 test_mode, u16 wIndex)
-+				u16 test_mode, u16 wIndex, unsigned long *flags)
- {
- 	int i, retval;
- 
-@@ -635,10 +634,10 @@ static int xhci_enter_test_mode(struct x
- 	xhci_dbg(xhci, "Disable all port (PP = 0)\n");
- 	/* Power off USB3 ports*/
- 	for (i = 0; i < xhci->num_usb3_ports; i++)
--		xhci_set_port_power(xhci, xhci->shared_hcd, i, false);
-+		xhci_set_port_power(xhci, xhci->shared_hcd, i, false, flags);
- 	/* Power off USB2 ports*/
- 	for (i = 0; i < xhci->num_usb2_ports; i++)
--		xhci_set_port_power(xhci, xhci->main_hcd, i, false);
-+		xhci_set_port_power(xhci, xhci->main_hcd, i, false, flags);
- 	/* Stop the controller */
- 	xhci_dbg(xhci, "Stop controller\n");
- 	retval = xhci_halt(xhci);
-@@ -1233,7 +1232,7 @@ int xhci_hub_control(struct usb_hcd *hcd
- 			 * However, hub_wq will ignore the roothub events until
- 			 * the roothub is registered.
- 			 */
--			xhci_set_port_power(xhci, hcd, wIndex, true);
-+			xhci_set_port_power(xhci, hcd, wIndex, true, &flags);
- 			break;
- 		case USB_PORT_FEAT_RESET:
- 			temp = (temp | PORT_RESET);
-@@ -1278,7 +1277,8 @@ int xhci_hub_control(struct usb_hcd *hcd
- 				goto error;
- 			if (test_mode > TEST_FORCE_EN || test_mode < TEST_J)
- 				goto error;
--			retval = xhci_enter_test_mode(xhci, test_mode, wIndex);
-+			retval = xhci_enter_test_mode(xhci, test_mode, wIndex,
-+						      &flags);
- 			break;
- 		default:
- 			goto error;
-@@ -1346,7 +1346,7 @@ int xhci_hub_control(struct usb_hcd *hcd
- 					port_array[wIndex], temp);
- 			break;
- 		case USB_PORT_FEAT_POWER:
--			xhci_set_port_power(xhci, hcd, wIndex, false);
-+			xhci_set_port_power(xhci, hcd, wIndex, false, &flags);
- 			break;
- 		case USB_PORT_FEAT_TEST:
- 			retval = xhci_exit_test_mode(xhci);
diff --git a/patches.renesas/0200-ARM-dts-r8a7791-set-maximum-frequency-for-SDHI-clock.patch b/patches.renesas/0200-ARM-dts-r8a7791-set-maximum-frequency-for-SDHI-clock.patch
deleted file mode 100644
index 6f1b8fc7809beb..00000000000000
--- a/patches.renesas/0200-ARM-dts-r8a7791-set-maximum-frequency-for-SDHI-clock.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From ddc830a67a534300539aa47572cf6d850dd3f6ca Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Sep 2016 12:57:01 +0200
-Subject: [PATCH 200/299] ARM: dts: r8a7791: set maximum frequency for SDHI
- clocks
-
-Define the upper limit otherwise the driver cannot utilize max speeds.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1efd670a73a6ac1be3126f48f2025a6e9f173ba1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -583,6 +583,7 @@
- 		dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- 		       <&dmac1 0xcd>, <&dmac1 0xce>;
- 		dma-names = "tx", "rx", "tx", "rx";
-+		max-frequency = <195000000>;
- 		power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- 		status = "disabled";
- 	};
-@@ -595,6 +596,7 @@
- 		dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- 		       <&dmac1 0xc1>, <&dmac1 0xc2>;
- 		dma-names = "tx", "rx", "tx", "rx";
-+		max-frequency = <97500000>;
- 		power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- 		status = "disabled";
- 	};
-@@ -607,6 +609,7 @@
- 		dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- 		       <&dmac1 0xd3>, <&dmac1 0xd4>;
- 		dma-names = "tx", "rx", "tx", "rx";
-+		max-frequency = <97500000>;
- 		power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- 		status = "disabled";
- 	};
diff --git a/patches.renesas/0200-usb-host-plat-Enable-xHCI-plat-runtime-PM.patch b/patches.renesas/0200-usb-host-plat-Enable-xHCI-plat-runtime-PM.patch
deleted file mode 100644
index 1c39cfd54b80c7..00000000000000
--- a/patches.renesas/0200-usb-host-plat-Enable-xHCI-plat-runtime-PM.patch
+++ /dev/null
@@ -1,125 +0,0 @@
-From 48814bc6ea992e21c21315c5dbafc7ca723dbb0b Mon Sep 17 00:00:00 2001
-From: Baolin Wang <baolin.wang@linaro.org>
-Date: Wed, 19 Apr 2017 16:55:45 +0300
-Subject: [PATCH 200/286] usb: host: plat: Enable xHCI plat runtime PM
-
-Enable the xHCI plat runtime PM for parent device to suspend/resume
-xHCI. Also call pm_runtime_forbid() in probe() function to force users
-to explicitly enable runtime pm using power/control in sysfs, in case
-some parent devices didn't implement runtime PM callbacks.
-
-[set do_wakeup to true when runtime suspending -Mathias]
-Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit b0c69b4bace3703a29e08dda2b5a10e1073cb9cd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/usb/host/xhci-plat.c
----
- drivers/usb/host/xhci-plat.c |   53 +++++++++++++++++++++++++++++++++++++------
- 1 file changed, 46 insertions(+), 7 deletions(-)
-
---- a/drivers/usb/host/xhci-plat.c
-+++ b/drivers/usb/host/xhci-plat.c
-@@ -179,9 +179,15 @@ static int xhci_plat_probe(struct platfo
- 			return ret;
- 	}
- 
-+	pm_runtime_set_active(&pdev->dev);
-+	pm_runtime_enable(&pdev->dev);
-+	pm_runtime_get_noresume(&pdev->dev);
-+
- 	hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
--	if (!hcd)
--		return -ENOMEM;
-+	if (!hcd) {
-+		ret = -ENOMEM;
-+		goto disable_runtime;
-+	}
- 
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	hcd->regs = devm_ioremap_resource(&pdev->dev, res);
-@@ -259,6 +265,13 @@ static int xhci_plat_probe(struct platfo
- 		goto dealloc_usb2_hcd;
- 
- 	device_enable_async_suspend(&pdev->dev);
-+	pm_runtime_put_noidle(&pdev->dev);
-+
-+	/*
-+	 * Prevent runtime pm from being on as default, users should enable
-+	 * runtime pm using power/control in sysfs.
-+	 */
-+	pm_runtime_forbid(&pdev->dev);
- 
- 	return 0;
- 
-@@ -279,6 +292,10 @@ disable_clk:
- put_hcd:
- 	usb_put_hcd(hcd);
- 
-+disable_runtime:
-+	pm_runtime_put_noidle(&pdev->dev);
-+	pm_runtime_disable(&pdev->dev);
-+
- 	return ret;
- }
- 
-@@ -300,6 +317,9 @@ static int xhci_plat_remove(struct platf
- 		clk_disable_unprepare(clk);
- 	usb_put_hcd(hcd);
- 
-+	pm_runtime_set_suspended(&dev->dev);
-+	pm_runtime_disable(&dev->dev);
-+
- 	return 0;
- }
- 
-@@ -327,14 +347,33 @@ static int xhci_plat_resume(struct devic
- 
- 	return xhci_resume(xhci, 0);
- }
-+#endif /* CONFIG_PM_SLEEP */
-+
-+#ifdef CONFIG_PM
-+static int xhci_plat_runtime_suspend(struct device *dev)
-+{
-+	struct usb_hcd  *hcd = dev_get_drvdata(dev);
-+	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
-+
-+	return xhci_suspend(xhci, true);
-+}
-+
-+static int xhci_plat_runtime_resume(struct device *dev)
-+{
-+	struct usb_hcd  *hcd = dev_get_drvdata(dev);
-+	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
-+
-+	return xhci_resume(xhci, 0);
-+}
-+#endif /* CONFIG_PM */
- 
- static const struct dev_pm_ops xhci_plat_pm_ops = {
- 	SET_SYSTEM_SLEEP_PM_OPS(xhci_plat_suspend, xhci_plat_resume)
-+
-+	SET_RUNTIME_PM_OPS(xhci_plat_runtime_suspend,
-+			   xhci_plat_runtime_resume,
-+			   NULL)
- };
--#define DEV_PM_OPS	(&xhci_plat_pm_ops)
--#else
--#define DEV_PM_OPS	NULL
--#endif /* CONFIG_PM */
- 
- static const struct acpi_device_id usb_xhci_acpi_match[] = {
- 	/* XHCI-compliant USB Controller */
-@@ -348,7 +387,7 @@ static struct platform_driver usb_xhci_d
- 	.remove	= xhci_plat_remove,
- 	.driver	= {
- 		.name = "xhci-hcd",
--		.pm = DEV_PM_OPS,
-+		.pm = &xhci_plat_pm_ops,
- 		.of_match_table = of_match_ptr(usb_xhci_of_match),
- 		.acpi_match_table = ACPI_PTR(usb_xhci_acpi_match),
- 	},
diff --git a/patches.renesas/0200-usb-host-xhci-check-for-a-valid-ring-when-unmapping-.patch b/patches.renesas/0200-usb-host-xhci-check-for-a-valid-ring-when-unmapping-.patch
deleted file mode 100644
index 51a5db616afa7f..00000000000000
--- a/patches.renesas/0200-usb-host-xhci-check-for-a-valid-ring-when-unmapping-.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 06b343e6491daae63773eb5ef03d90596a4ddf96 Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:13 +0200
-Subject: [PATCH 200/255] usb: host: xhci: check for a valid ring when
- unmapping bounce buffer
-
-This way we can remove checks for valid ring from call sites of
-xhci_unmap_td_bounce_buffer()
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit f45e2a02112a1ed03925521c9f48e4bdc25c7032)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -655,7 +655,7 @@ static void xhci_unmap_td_bounce_buffer(
- 	struct xhci_segment *seg = td->bounce_seg;
- 	struct urb *urb = td->urb;
- 
--	if (!seg || !urb)
-+	if (!ring || !seg || !urb)
- 		return;
- 
- 	if (usb_urb_dir_out(urb)) {
diff --git a/patches.renesas/0201-ARM-shmobile-defconfig-Enable-CONFIG_CGROUPS.patch b/patches.renesas/0201-ARM-shmobile-defconfig-Enable-CONFIG_CGROUPS.patch
deleted file mode 100644
index e199e0964a8639..00000000000000
--- a/patches.renesas/0201-ARM-shmobile-defconfig-Enable-CONFIG_CGROUPS.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 35511083ad3498057427ced8c4cf3cfd8f85b0d2 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Wed, 10 Aug 2016 15:17:56 +0200
-Subject: [PATCH 201/299] ARM: shmobile: defconfig: Enable CONFIG_CGROUPS
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Enable support for CONFIG_CGROUPS in shmobile_defconfig.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a604a37d46b80899d5a09d937fdd670e93af690d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/shmobile_defconfig |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/configs/shmobile_defconfig
-+++ b/arch/arm/configs/shmobile_defconfig
-@@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y
- CONFIG_NO_HZ=y
- CONFIG_IKCONFIG=y
- CONFIG_IKCONFIG_PROC=y
-+CONFIG_CGROUPS=y
- CONFIG_BLK_DEV_INITRD=y
- CONFIG_CC_OPTIMIZE_FOR_SIZE=y
- CONFIG_SYSCTL_SYSCALL=y
diff --git a/patches.renesas/0201-usb-host-xhci-plat-enable-clk-in-resume-timing.patch b/patches.renesas/0201-usb-host-xhci-plat-enable-clk-in-resume-timing.patch
deleted file mode 100644
index 277ee0eb0035a3..00000000000000
--- a/patches.renesas/0201-usb-host-xhci-plat-enable-clk-in-resume-timing.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 61d5b51b6425b09da807e2ce31232e8c56f172c9 Mon Sep 17 00:00:00 2001
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Date: Wed, 19 Apr 2017 16:55:46 +0300
-Subject: [PATCH 201/286] usb: host: xhci-plat: enable clk in resume timing
-
-This patch enables the clk in resume timing when device_may_wakeup()
-is false. Otherwise, kernel panic happens when R-Car resumes the system
-from Suspend-to-RAM because the clk is disabled.
-
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 835e4241e714fbd659838618466766b132823da3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-plat.c |   11 ++++++++++-
- 1 file changed, 10 insertions(+), 1 deletion(-)
-
---- a/drivers/usb/host/xhci-plat.c
-+++ b/drivers/usb/host/xhci-plat.c
-@@ -328,6 +328,7 @@ static int xhci_plat_suspend(struct devi
- {
- 	struct usb_hcd	*hcd = dev_get_drvdata(dev);
- 	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
-+	int ret;
- 
- 	/*
- 	 * xhci_suspend() needs `do_wakeup` to know whether host is allowed
-@@ -337,7 +338,12 @@ static int xhci_plat_suspend(struct devi
- 	 * reconsider this when xhci_plat_suspend enlarges its scope, e.g.,
- 	 * also applies to runtime suspend.
- 	 */
--	return xhci_suspend(xhci, device_may_wakeup(dev));
-+	ret = xhci_suspend(xhci, device_may_wakeup(dev));
-+
-+	if (!device_may_wakeup(dev) && !IS_ERR(xhci->clk))
-+		clk_disable_unprepare(xhci->clk);
-+
-+	return ret;
- }
- 
- static int xhci_plat_resume(struct device *dev)
-@@ -345,6 +351,9 @@ static int xhci_plat_resume(struct devic
- 	struct usb_hcd	*hcd = dev_get_drvdata(dev);
- 	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
- 
-+	if (!device_may_wakeup(dev) && !IS_ERR(xhci->clk))
-+		clk_prepare_enable(xhci->clk);
-+
- 	return xhci_resume(xhci, 0);
- }
- #endif /* CONFIG_PM_SLEEP */
diff --git a/patches.renesas/0201-usb-host-xhci-unconditionally-call-xhci_unmap_td_bou.patch b/patches.renesas/0201-usb-host-xhci-unconditionally-call-xhci_unmap_td_bou.patch
deleted file mode 100644
index cbeea8bbc59c15..00000000000000
--- a/patches.renesas/0201-usb-host-xhci-unconditionally-call-xhci_unmap_td_bou.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 547161efca2c19b5fca1a02e8716dd0a95c07e08 Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:14 +0200
-Subject: [PATCH 201/255] usb: host: xhci: unconditionally call
- xhci_unmap_td_bounce_buffer()
-
-xhci_unmap_td_bounce_buffer() already checks for a valid td->bounce_seg
-and bails out early if that's invalid. There's no need to check for this
-twice.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit a60f2f2ffabe14a559510dcf347bef9a7a312516)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    9 +++------
- 1 file changed, 3 insertions(+), 6 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -793,8 +793,7 @@ remove_finished_td:
- 		 * just overwrite it (because the URB has been unlinked).
- 		 */
- 		ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
--		if (ep_ring && cur_td->bounce_seg)
--			xhci_unmap_td_bounce_buffer(xhci, ep_ring, cur_td);
-+		xhci_unmap_td_bounce_buffer(xhci, ep_ring, cur_td);
- 		inc_td_cnt(cur_td->urb);
- 		if (last_td_in_urb(cur_td))
- 			xhci_giveback_urb_in_irq(xhci, cur_td, 0);
-@@ -820,8 +819,7 @@ static void xhci_kill_ring_urbs(struct x
- 		if (!list_empty(&cur_td->cancelled_td_list))
- 			list_del_init(&cur_td->cancelled_td_list);
- 
--		if (cur_td->bounce_seg)
--			xhci_unmap_td_bounce_buffer(xhci, ring, cur_td);
-+		xhci_unmap_td_bounce_buffer(xhci, ring, cur_td);
- 
- 		inc_td_cnt(cur_td->urb);
- 		if (last_td_in_urb(cur_td))
-@@ -1836,8 +1834,7 @@ static int xhci_td_cleanup(struct xhci_h
- 	urb_priv = urb->hcpriv;
- 
- 	/* if a bounce buffer was used to align this td then unmap it */
--	if (td->bounce_seg)
--		xhci_unmap_td_bounce_buffer(xhci, ep_ring, td);
-+	xhci_unmap_td_bounce_buffer(xhci, ep_ring, td);
- 
- 	/* Do one last check of the actual transfer length.
- 	 * If the host controller said we transferred more data than the buffer
diff --git a/patches.renesas/0202-ARM-shmobile-Sort-Kconfig-selections.patch b/patches.renesas/0202-ARM-shmobile-Sort-Kconfig-selections.patch
deleted file mode 100644
index 24e87f31fcdee1..00000000000000
--- a/patches.renesas/0202-ARM-shmobile-Sort-Kconfig-selections.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 40a6fe2d8346020e0b317110c0e94258cfc53522 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 23 Sep 2016 10:28:40 +0200
-Subject: [PATCH 202/299] ARM: shmobile: Sort Kconfig selections
-
-Sort alphabetically all symbols selected by ARCH_RENESAS
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9255f6fd453e1ba7ffa58427a04c52f68b96862f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig |    6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -32,16 +32,16 @@ config ARCH_RMOBILE
- menuconfig ARCH_RENESAS
- 	bool "Renesas ARM SoCs"
- 	depends on ARCH_MULTI_V7 && MMU
-+	select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
- 	select ARCH_SHMOBILE
- 	select ARCH_SHMOBILE_MULTI
-+	select ARM_GIC
-+	select GPIOLIB
- 	select HAVE_ARM_SCU if SMP
- 	select HAVE_ARM_TWD if SMP
--	select ARM_GIC
--	select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
- 	select NO_IOPORT_MAP
- 	select PINCTRL
- 	select SOC_BUS
--	select GPIOLIB
- 	select ZONE_DMA if ARM_LPAE
- 
- if ARCH_RENESAS
diff --git a/patches.renesas/0202-usb-host-xhci-plat-add-resume_quirk.patch b/patches.renesas/0202-usb-host-xhci-plat-add-resume_quirk.patch
deleted file mode 100644
index 2b496318143cd5..00000000000000
--- a/patches.renesas/0202-usb-host-xhci-plat-add-resume_quirk.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 851c48ee8cb0166ef723eb677d6b4120956215d4 Mon Sep 17 00:00:00 2001
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Date: Wed, 19 Apr 2017 16:55:47 +0300
-Subject: [PATCH 202/286] usb: host: xhci-plat: add resume_quirk()
-
-This patch adds resume_quirk() to do platform specific process in
-resume timing.
-
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 98c0a3ffa30c4b389257f7e7ee80ab9e90b78924)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-plat.c |   15 +++++++++++++++
- drivers/usb/host/xhci-plat.h |    1 +
- 2 files changed, 16 insertions(+)
-
---- a/drivers/usb/host/xhci-plat.c
-+++ b/drivers/usb/host/xhci-plat.c
-@@ -54,6 +54,16 @@ static int xhci_priv_init_quirk(struct u
- 	return priv->init_quirk(hcd);
- }
- 
-+static int xhci_priv_resume_quirk(struct usb_hcd *hcd)
-+{
-+	struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
-+
-+	if (!priv->resume_quirk)
-+		return 0;
-+
-+	return priv->resume_quirk(hcd);
-+}
-+
- static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci)
- {
- 	/*
-@@ -350,10 +360,15 @@ static int xhci_plat_resume(struct devic
- {
- 	struct usb_hcd	*hcd = dev_get_drvdata(dev);
- 	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
-+	int ret;
- 
- 	if (!device_may_wakeup(dev) && !IS_ERR(xhci->clk))
- 		clk_prepare_enable(xhci->clk);
- 
-+	ret = xhci_priv_resume_quirk(hcd);
-+	if (ret)
-+		return ret;
-+
- 	return xhci_resume(xhci, 0);
- }
- #endif /* CONFIG_PM_SLEEP */
---- a/drivers/usb/host/xhci-plat.h
-+++ b/drivers/usb/host/xhci-plat.h
-@@ -17,6 +17,7 @@ struct xhci_plat_priv {
- 	const char *firmware_name;
- 	void (*plat_start)(struct usb_hcd *);
- 	int (*init_quirk)(struct usb_hcd *);
-+	int (*resume_quirk)(struct usb_hcd *);
- };
- 
- #define hcd_to_xhci_priv(h) ((struct xhci_plat_priv *)hcd_to_xhci(h)->priv)
diff --git a/patches.renesas/0202-xhci-Introduce-helper-to-turn-one-TRB-into-a-no-op.patch b/patches.renesas/0202-xhci-Introduce-helper-to-turn-one-TRB-into-a-no-op.patch
deleted file mode 100644
index 4f44a0dbe52045..00000000000000
--- a/patches.renesas/0202-xhci-Introduce-helper-to-turn-one-TRB-into-a-no-op.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 86866e7445ac9ead508402559f4a6c64fc4d6a94 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:15 +0200
-Subject: [PATCH 202/255] xhci: Introduce helper to turn one TRB into a no-op
-
-Useful for turning both transfer and command trbs
-into no-ops.
-
-Based on earlier code by Felipe Balbi <felipe.balbi@linux.intel.com>
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit ae1e3f07320884ff25354d8233dc18d5283b0bb8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   29 +++++++++++++++++------------
- 1 file changed, 17 insertions(+), 12 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -129,6 +129,21 @@ static void inc_td_cnt(struct urb *urb)
- 	urb_priv->td_cnt++;
- }
- 
-+static void trb_to_noop(union xhci_trb *trb, u32 noop_type)
-+{
-+	if (trb_is_link(trb)) {
-+		/* unchain chained link TRBs */
-+		trb->link.control &= cpu_to_le32(~TRB_CHAIN);
-+	} else {
-+		trb->generic.field[0] = 0;
-+		trb->generic.field[1] = 0;
-+		trb->generic.field[2] = 0;
-+		/* Preserve only the cycle bit of this TRB */
-+		trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
-+		trb->generic.field[3] |= cpu_to_le32(TRB_TYPE(noop_type));
-+	}
-+}
-+
- /* Updates trb to point to the next TRB in the ring, and updates seg if the next
-  * TRB is in a new segment.  This does not skip over link TRBs, and it does not
-  * effect the ring dequeue or enqueue pointers.
-@@ -592,18 +607,8 @@ static void td_to_noop(struct xhci_hcd *
- 	union xhci_trb *trb		= td->first_trb;
- 
- 	while (1) {
--		if (trb_is_link(trb)) {
--			/* unchain chained link TRBs */
--			trb->link.control &= cpu_to_le32(~TRB_CHAIN);
--		} else {
--			trb->generic.field[0] = 0;
--			trb->generic.field[1] = 0;
--			trb->generic.field[2] = 0;
--			/* Preserve only the cycle bit of this TRB */
--			trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
--			trb->generic.field[3] |= cpu_to_le32(
--				TRB_TYPE(TRB_TR_NOOP));
--		}
-+		trb_to_noop(trb, TRB_TR_NOOP);
-+
- 		/* flip cycle if asked to */
- 		if (flip_cycle && trb != td->first_trb && trb != td->last_trb)
- 			trb->generic.field[3] ^= cpu_to_le32(TRB_CYCLE);
diff --git a/patches.renesas/0203-ARM-shmobile-r8a7743-basic-SoC-support.patch b/patches.renesas/0203-ARM-shmobile-r8a7743-basic-SoC-support.patch
deleted file mode 100644
index fdb199189a521d..00000000000000
--- a/patches.renesas/0203-ARM-shmobile-r8a7743-basic-SoC-support.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From d4a8fe5e7081f251939aa28bbfb44f115e859dcb Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Thu, 6 Oct 2016 00:37:08 +0300
-Subject: [PATCH 203/299] ARM: shmobile: r8a7743: basic SoC support
-
-Add minimal support for the RZ/G1M (R8A7743) SoC.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e920565a1cc4a352719b42ba5e83d952a9a26507)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/arm/shmobile.txt |    2 +
- arch/arm/mach-shmobile/Kconfig                     |    4 ++
- arch/arm/mach-shmobile/Makefile                    |    1 
- arch/arm/mach-shmobile/setup-r8a7743.c             |   34 +++++++++++++++++++++
- 4 files changed, 41 insertions(+)
- create mode 100644 arch/arm/mach-shmobile/setup-r8a7743.c
-
---- a/Documentation/devicetree/bindings/arm/shmobile.txt
-+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
-@@ -13,6 +13,8 @@ SoCs:
-     compatible = "renesas,r8a73a4"
-   - R-Mobile A1 (R8A77400)
-     compatible = "renesas,r8a7740"
-+  - RZ/G1M (R8A77430)
-+    compatible = "renesas,r8a7743"
-   - R-Car M1A (R8A77781)
-     compatible = "renesas,r8a7778"
-   - R-Car H1 (R8A77790)
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -68,6 +68,10 @@ config ARCH_R8A7740
- 	select ARCH_RMOBILE
- 	select RENESAS_INTC_IRQPIN
- 
-+config ARCH_R8A7743
-+	bool "RZ/G1M (R8A77430)"
-+	select ARCH_RCAR_GEN2
-+
- config ARCH_R8A7778
- 	bool "R-Car M1A (R8A77781)"
- 	select ARCH_RCAR_GEN1
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -9,6 +9,7 @@ obj-y				:= timer.o
- obj-$(CONFIG_ARCH_SH73A0)	+= setup-sh73a0.o
- obj-$(CONFIG_ARCH_R8A73A4)	+= setup-r8a73a4.o
- obj-$(CONFIG_ARCH_R8A7740)	+= setup-r8a7740.o
-+obj-$(CONFIG_ARCH_R8A7743)	+= setup-r8a7743.o
- obj-$(CONFIG_ARCH_R8A7778)	+= setup-r8a7778.o
- obj-$(CONFIG_ARCH_R8A7779)	+= setup-r8a7779.o pm-r8a7779.o
- obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o
---- /dev/null
-+++ b/arch/arm/mach-shmobile/setup-r8a7743.c
-@@ -0,0 +1,34 @@
-+/*
-+ * r8a7743 processor support
-+ *
-+ * Copyright (C) 2016 Cogent Embedded, Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ *  published by the Free Software Foundation; of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/init.h>
-+
-+#include <asm/mach/arch.h>
-+
-+#include "common.h"
-+#include "rcar-gen2.h"
-+
-+static const char * const r8a7743_boards_compat_dt[] __initconst = {
-+	"renesas,r8a7743",
-+	NULL,
-+};
-+
-+DT_MACHINE_START(R8A7743_DT, "Generic R8A7743 (Flattened Device Tree)")
-+	.init_early	= shmobile_init_delay,
-+	.init_time	= rcar_gen2_timer_init,
-+	.init_late	= shmobile_init_late,
-+	.reserve	= rcar_gen2_reserve,
-+	.dt_compat	= r8a7743_boards_compat_dt,
-+MACHINE_END
diff --git a/patches.renesas/0203-usb-host-xhci-plat-set-resume_quirk-for-R-Car-contro.patch b/patches.renesas/0203-usb-host-xhci-plat-set-resume_quirk-for-R-Car-contro.patch
deleted file mode 100644
index 9df971b703e306..00000000000000
--- a/patches.renesas/0203-usb-host-xhci-plat-set-resume_quirk-for-R-Car-contro.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From 174e9a14644894909e20cf6a9ff8646563bf7513 Mon Sep 17 00:00:00 2001
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Date: Wed, 19 Apr 2017 16:55:48 +0300
-Subject: [PATCH 203/286] usb: host: xhci-plat: set resume_quirk() for R-Car
- controllers
-
-This patch sets resume_quirk() for R-Car controllers to re-download
-the firmware in resume timing. Otherwise, if the controller's power
-is down in suspend timing, the firmware in the controller goes away,
-and then the controller doesn't work after resume.
-
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 435cc1138ec94af7497ea68c8eb8b0c17cfcf002)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-plat.c |    3 +++
- drivers/usb/host/xhci-rcar.c |   11 +++++++++++
- drivers/usb/host/xhci-rcar.h |    6 ++++++
- 3 files changed, 20 insertions(+)
-
---- a/drivers/usb/host/xhci-plat.c
-+++ b/drivers/usb/host/xhci-plat.c
-@@ -102,18 +102,21 @@ static const struct xhci_plat_priv xhci_
- 	.firmware_name = XHCI_RCAR_FIRMWARE_NAME_V1,
- 	.init_quirk = xhci_rcar_init_quirk,
- 	.plat_start = xhci_rcar_start,
-+	.resume_quirk = xhci_rcar_resume_quirk,
- };
- 
- static const struct xhci_plat_priv xhci_plat_renesas_rcar_gen3 = {
- 	.firmware_name = XHCI_RCAR_FIRMWARE_NAME_V2,
- 	.init_quirk = xhci_rcar_init_quirk,
- 	.plat_start = xhci_rcar_start,
-+	.resume_quirk = xhci_rcar_resume_quirk,
- };
- 
- static const struct xhci_plat_priv xhci_plat_renesas_rcar_r8a7796 = {
- 	.firmware_name = XHCI_RCAR_FIRMWARE_NAME_V3,
- 	.init_quirk = xhci_rcar_init_quirk,
- 	.plat_start = xhci_rcar_start,
-+	.resume_quirk = xhci_rcar_resume_quirk,
- };
- 
- static const struct of_device_id usb_xhci_of_match[] = {
---- a/drivers/usb/host/xhci-rcar.c
-+++ b/drivers/usb/host/xhci-rcar.c
-@@ -198,3 +198,14 @@ int xhci_rcar_init_quirk(struct usb_hcd
- 
- 	return xhci_rcar_download_firmware(hcd);
- }
-+
-+int xhci_rcar_resume_quirk(struct usb_hcd *hcd)
-+{
-+	int ret;
-+
-+	ret = xhci_rcar_download_firmware(hcd);
-+	if (!ret)
-+		xhci_rcar_start(hcd);
-+
-+	return ret;
-+}
---- a/drivers/usb/host/xhci-rcar.h
-+++ b/drivers/usb/host/xhci-rcar.h
-@@ -18,6 +18,7 @@
- #if IS_ENABLED(CONFIG_USB_XHCI_RCAR)
- void xhci_rcar_start(struct usb_hcd *hcd);
- int xhci_rcar_init_quirk(struct usb_hcd *hcd);
-+int xhci_rcar_resume_quirk(struct usb_hcd *hcd);
- #else
- static inline void xhci_rcar_start(struct usb_hcd *hcd)
- {
-@@ -27,5 +28,10 @@ static inline int xhci_rcar_init_quirk(s
- {
- 	return 0;
- }
-+
-+static inline int xhci_rcar_resume_quirk(struct usb_hcd *hcd)
-+{
-+	return 0;
-+}
- #endif
- #endif /* _XHCI_RCAR_H */
diff --git a/patches.renesas/0203-xhci-use-the-trb_to_noop-helper-for-command-trbs.patch b/patches.renesas/0203-xhci-use-the-trb_to_noop-helper-for-command-trbs.patch
deleted file mode 100644
index 868917ed1a3748..00000000000000
--- a/patches.renesas/0203-xhci-use-the-trb_to_noop-helper-for-command-trbs.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From ed9c0e52ee23f8a06e3eb752a6824d4abd31c685 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:16 +0200
-Subject: [PATCH 203/255] xhci: use the trb_to_noop() helper for command trbs
-
-Remove duplicate code by using trb_to_noop() when
-handling Aborted commads
-
-Based on earlier code by Felipe Balbi <felipe.balbi@linux.intel.com>
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 5278204c98188ac9fd2e75b936eec1015d062a75)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   12 ++----------
- 1 file changed, 2 insertions(+), 10 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -314,7 +314,6 @@ static void xhci_handle_stopped_cmd_ring
- 					 struct xhci_command *cur_cmd)
- {
- 	struct xhci_command *i_cmd;
--	u32 cycle_state;
- 
- 	/* Turn all aborted commands in list to no-ops, then restart */
- 	list_for_each_entry(i_cmd, &xhci->cmd_list, cmd_list) {
-@@ -326,15 +325,8 @@ static void xhci_handle_stopped_cmd_ring
- 
- 		xhci_dbg(xhci, "Turn aborted command %p to no-op\n",
- 			 i_cmd->command_trb);
--		/* get cycle state from the original cmd trb */
--		cycle_state = le32_to_cpu(
--			i_cmd->command_trb->generic.field[3]) &	TRB_CYCLE;
--		/* modify the command trb to no-op command */
--		i_cmd->command_trb->generic.field[0] = 0;
--		i_cmd->command_trb->generic.field[1] = 0;
--		i_cmd->command_trb->generic.field[2] = 0;
--		i_cmd->command_trb->generic.field[3] = cpu_to_le32(
--			TRB_TYPE(TRB_CMD_NOOP) | cycle_state);
-+
-+		trb_to_noop(i_cmd->command_trb, TRB_CMD_NOOP);
- 
- 		/*
- 		 * caller waiting for completion is called when command
diff --git a/patches.renesas/0204-ARM-shmobile-document-SK-RZG1M-board.patch b/patches.renesas/0204-ARM-shmobile-document-SK-RZG1M-board.patch
deleted file mode 100644
index 1a1e3bc01d6172..00000000000000
--- a/patches.renesas/0204-ARM-shmobile-document-SK-RZG1M-board.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 159a8e4afba95397f47bff385f029e4b4e3018f3 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Thu, 6 Oct 2016 00:45:18 +0300
-Subject: [PATCH 204/299] ARM: shmobile: document SK-RZG1M board
-
-Document the SK-RZG1M device tree bindings, listing it as a supported board.
-
-This allows to use checkpatch.pl to validate .dts files referring to the
-SK-RZG1M board.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7c1959d6879f29c2b789c572e8f358d77b49d39b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/arm/shmobile.txt |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/Documentation/devicetree/bindings/arm/shmobile.txt
-+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
-@@ -77,6 +77,8 @@ Boards:
-     compatible = "renesas,salvator-x", "renesas,r8a7796";
-   - SILK (RTP0RC7794LCB00011S)
-     compatible = "renesas,silk", "renesas,r8a7794"
-+  - SK-RZG1M (YR8A77430S000BE)
-+    compatible = "renesas,sk-rzg1m", "renesas,r8a7743"
-   - Wheat
-     compatible = "renesas,wheat", "renesas,r8a7792"
- 
diff --git a/patches.renesas/0204-usb-host-xhci-convert-to-list_for_each_entry_safe.patch b/patches.renesas/0204-usb-host-xhci-convert-to-list_for_each_entry_safe.patch
deleted file mode 100644
index ddbcb41f2d9871..00000000000000
--- a/patches.renesas/0204-usb-host-xhci-convert-to-list_for_each_entry_safe.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 38cdfd1d15a427e1010347cbbbd4fe4781427f4e Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:17 +0200
-Subject: [PATCH 204/255] usb: host: xhci: convert to
- list_for_each_entry_safe()
-
-instead of using while(!list_empty()) followed by list_first_entry(), we
-can actually use list_for_each_entry_safe().
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit a54cfae3c7727c2c172fdcd5886b4235b833da6c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   15 ++++++++-------
- 1 file changed, 8 insertions(+), 7 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -808,11 +808,11 @@ remove_finished_td:
- static void xhci_kill_ring_urbs(struct xhci_hcd *xhci, struct xhci_ring *ring)
- {
- 	struct xhci_td *cur_td;
-+	struct xhci_td *tmp;
- 
--	while (!list_empty(&ring->td_list)) {
--		cur_td = list_first_entry(&ring->td_list,
--				struct xhci_td, td_list);
-+	list_for_each_entry_safe(cur_td, tmp, &ring->td_list, td_list) {
- 		list_del_init(&cur_td->td_list);
-+
- 		if (!list_empty(&cur_td->cancelled_td_list))
- 			list_del_init(&cur_td->cancelled_td_list);
- 
-@@ -828,6 +828,7 @@ static void xhci_kill_endpoint_urbs(stru
- 		int slot_id, int ep_index)
- {
- 	struct xhci_td *cur_td;
-+	struct xhci_td *tmp;
- 	struct xhci_virt_ep *ep;
- 	struct xhci_ring *ring;
- 
-@@ -856,12 +857,12 @@ static void xhci_kill_endpoint_urbs(stru
- 				slot_id, ep_index);
- 		xhci_kill_ring_urbs(xhci, ring);
- 	}
--	while (!list_empty(&ep->cancelled_td_list)) {
--		cur_td = list_first_entry(&ep->cancelled_td_list,
--				struct xhci_td, cancelled_td_list);
--		list_del_init(&cur_td->cancelled_td_list);
- 
-+	list_for_each_entry_safe(cur_td, tmp, &ep->cancelled_td_list,
-+			cancelled_td_list) {
-+		list_del_init(&cur_td->cancelled_td_list);
- 		inc_td_cnt(cur_td->urb);
-+
- 		if (last_td_in_urb(cur_td))
- 			xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
- 	}
diff --git a/patches.renesas/0204-usb-host-xhci-using-correct-specification-chapter-re.patch b/patches.renesas/0204-usb-host-xhci-using-correct-specification-chapter-re.patch
deleted file mode 100644
index b21095dc9d52e1..00000000000000
--- a/patches.renesas/0204-usb-host-xhci-using-correct-specification-chapter-re.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 518c497272f31e9b43f2ba7dcd69b0b02001ef64 Mon Sep 17 00:00:00 2001
-From: Peter Chen <peter.chen@nxp.com>
-Date: Wed, 19 Apr 2017 16:55:50 +0300
-Subject: [PATCH 204/286] usb: host: xhci: using correct specification chapter
- reference for DCBAAP
-
-Using correct specification chapter reference for DCBAAP
-(Device Context Base Address Array Pointer).
-
-Signed-off-by: Peter Chen <peter.chen@nxp.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 724e882daeb67d58d04a3d0f8cccdd33775bb9bb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-mem.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -2451,7 +2451,7 @@ int xhci_mem_init(struct xhci_hcd *xhci,
- 	writel(val, &xhci->op_regs->config_reg);
- 
- 	/*
--	 * Section 5.4.8 - doorbell array must be
-+	 * xHCI section 5.4.6 - doorbell array must be
- 	 * "physically contiguous and 64-byte (cache line) aligned".
- 	 */
- 	xhci->dcbaa = dma_alloc_coherent(dev, sizeof(*xhci->dcbaa), &dma,
diff --git a/patches.renesas/0205-ARM-shmobile-r8a7794-alt-Add-board-part-number-to-DT.patch b/patches.renesas/0205-ARM-shmobile-r8a7794-alt-Add-board-part-number-to-DT.patch
deleted file mode 100644
index d32d8595991739..00000000000000
--- a/patches.renesas/0205-ARM-shmobile-r8a7794-alt-Add-board-part-number-to-DT.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From a62f5c3c86115f66960a1866f8dcda59ceb8f8d4 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 4 Oct 2016 15:20:47 +0200
-Subject: [PATCH 205/299] ARM: shmobile: r8a7794/alt: Add board part number to
- DT bindings
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d4a2c642ec968970fef015aa1f450b20cc37b67a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/arm/shmobile.txt |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/Documentation/devicetree/bindings/arm/shmobile.txt
-+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
-@@ -37,7 +37,7 @@ SoCs:
- 
- Boards:
- 
--  - Alt
-+  - Alt (RTP0RC7794SEB00010S)
-     compatible = "renesas,alt", "renesas,r8a7794"
-   - APE6-EVM
-     compatible = "renesas,ape6evm", "renesas,r8a73a4"
diff --git a/patches.renesas/0205-usb-host-xhci-combine-event-TRB-completion-debugging.patch b/patches.renesas/0205-usb-host-xhci-combine-event-TRB-completion-debugging.patch
deleted file mode 100644
index f6690e0fe25fde..00000000000000
--- a/patches.renesas/0205-usb-host-xhci-combine-event-TRB-completion-debugging.patch
+++ /dev/null
@@ -1,109 +0,0 @@
-From c823c464a858884b075f6ccb19792538f44d776f Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:18 +0200
-Subject: [PATCH 205/255] usb: host: xhci: combine event TRB completion
- debugging messages
-
-If we just provide a helper to convert completion code to string, we can
-combine all debugging messages into a single print.
-
-[keep the old debug messages, for warn and grep -Mathias]
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
-(cherry picked from commit ed6d643b14e7bc2fac794a0bbac7dd742ca2ed80)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci.h |   80 ++++++++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 80 insertions(+)
-
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1101,6 +1101,86 @@ struct xhci_transfer_event {
- #define COMP_SECONDARY_BANDWIDTH_ERROR		35
- #define COMP_SPLIT_TRANSACTION_ERROR		36
- 
-+static inline const char *xhci_trb_comp_code_string(u8 status)
-+{
-+	switch (status) {
-+	case COMP_INVALID:
-+		return "Invalid";
-+	case COMP_SUCCESS:
-+		return "Success";
-+	case COMP_DATA_BUFFER_ERROR:
-+		return "Data Buffer Error";
-+	case COMP_BABBLE_DETECTED_ERROR:
-+		return "Babble Detected";
-+	case COMP_USB_TRANSACTION_ERROR:
-+		return "USB Transaction Error";
-+	case COMP_TRB_ERROR:
-+		return "TRB Error";
-+	case COMP_STALL_ERROR:
-+		return "Stall Error";
-+	case COMP_RESOURCE_ERROR:
-+		return "Resource Error";
-+	case COMP_BANDWIDTH_ERROR:
-+		return "Bandwidth Error";
-+	case COMP_NO_SLOTS_AVAILABLE_ERROR:
-+		return "No Slots Available Error";
-+	case COMP_INVALID_STREAM_TYPE_ERROR:
-+		return "Invalid Stream Type Error";
-+	case COMP_SLOT_NOT_ENABLED_ERROR:
-+		return "Slot Not Enabled Error";
-+	case COMP_ENDPOINT_NOT_ENABLED_ERROR:
-+		return "Endpoint Not Enabled Error";
-+	case COMP_SHORT_PACKET:
-+		return "Short Packet";
-+	case COMP_RING_UNDERRUN:
-+		return "Ring Underrun";
-+	case COMP_RING_OVERRUN:
-+		return "Ring Overrun";
-+	case COMP_VF_EVENT_RING_FULL_ERROR:
-+		return "VF Event Ring Full Error";
-+	case COMP_PARAMETER_ERROR:
-+		return "Parameter Error";
-+	case COMP_BANDWIDTH_OVERRUN_ERROR:
-+		return "Bandwidth Overrun Error";
-+	case COMP_CONTEXT_STATE_ERROR:
-+		return "Context State Error";
-+	case COMP_NO_PING_RESPONSE_ERROR:
-+		return "No Ping Response Error";
-+	case COMP_EVENT_RING_FULL_ERROR:
-+		return "Event Ring Full Error";
-+	case COMP_INCOMPATIBLE_DEVICE_ERROR:
-+		return "Incompatible Device Error";
-+	case COMP_MISSED_SERVICE_ERROR:
-+		return "Missed Service Error";
-+	case COMP_COMMAND_RING_STOPPED:
-+		return "Command Ring Stopped";
-+	case COMP_COMMAND_ABORTED:
-+		return "Command Aborted";
-+	case COMP_STOPPED:
-+		return "Stopped";
-+	case COMP_STOPPED_LENGTH_INVALID:
-+		return "Stopped - Length Invalid";
-+	case COMP_STOPPED_SHORT_PACKET:
-+		return "Stopped - Short Packet";
-+	case COMP_MAX_EXIT_LATENCY_TOO_LARGE_ERROR:
-+		return "Max Exit Latency Too Large Error";
-+	case COMP_ISOCH_BUFFER_OVERRUN:
-+		return "Isoch Buffer Overrun";
-+	case COMP_EVENT_LOST_ERROR:
-+		return "Event Lost Error";
-+	case COMP_UNDEFINED_ERROR:
-+		return "Undefined Error";
-+	case COMP_INVALID_STREAM_ID_ERROR:
-+		return "Invalid Stream ID Error";
-+	case COMP_SECONDARY_BANDWIDTH_ERROR:
-+		return "Secondary Bandwidth Error";
-+	case COMP_SPLIT_TRANSACTION_ERROR:
-+		return "Split Transaction Error";
-+	default:
-+		return "Unknown!!";
-+	}
-+}
-+
- struct xhci_link_trb {
- 	/* 64-bit segment pointer*/
- 	__le64 segment_ptr;
diff --git a/patches.renesas/0205-usb-host-xhci-delete-sp_dma_buffers-for-scratchpad.patch b/patches.renesas/0205-usb-host-xhci-delete-sp_dma_buffers-for-scratchpad.patch
deleted file mode 100644
index d84584080ffca1..00000000000000
--- a/patches.renesas/0205-usb-host-xhci-delete-sp_dma_buffers-for-scratchpad.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 061a8f44430c7be41c541a35e8993150e0412248 Mon Sep 17 00:00:00 2001
-From: Peter Chen <peter.chen@nxp.com>
-Date: Wed, 19 Apr 2017 16:55:51 +0300
-Subject: [PATCH 205/286] usb: host: xhci: delete sp_dma_buffers for scratchpad
-
-We already have sp_array to store each scratch buffer address for xHC,
-it doesn't need another sp_dma_buffers array to store it.
-
-Signed-off-by: Peter Chen <peter.chen@nxp.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 314eaf7dec13b975e51c8faf980f7b0f4e20b3e9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-mem.c |   18 ++++--------------
- drivers/usb/host/xhci.h     |    1 -
- 2 files changed, 4 insertions(+), 15 deletions(-)
-
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -1738,36 +1738,27 @@ static int scratchpad_alloc(struct xhci_
- 	if (!xhci->scratchpad->sp_buffers)
- 		goto fail_sp3;
- 
--	xhci->scratchpad->sp_dma_buffers =
--		kzalloc(sizeof(dma_addr_t) * num_sp, flags);
--
--	if (!xhci->scratchpad->sp_dma_buffers)
--		goto fail_sp4;
--
- 	xhci->dcbaa->dev_context_ptrs[0] = cpu_to_le64(xhci->scratchpad->sp_dma);
- 	for (i = 0; i < num_sp; i++) {
- 		dma_addr_t dma;
- 		void *buf = dma_zalloc_coherent(dev, xhci->page_size, &dma,
- 				flags);
- 		if (!buf)
--			goto fail_sp5;
-+			goto fail_sp4;
- 
- 		xhci->scratchpad->sp_array[i] = dma;
- 		xhci->scratchpad->sp_buffers[i] = buf;
--		xhci->scratchpad->sp_dma_buffers[i] = dma;
- 	}
- 
- 	return 0;
- 
-- fail_sp5:
-+ fail_sp4:
- 	for (i = i - 1; i >= 0; i--) {
- 		dma_free_coherent(dev, xhci->page_size,
- 				    xhci->scratchpad->sp_buffers[i],
--				    xhci->scratchpad->sp_dma_buffers[i]);
-+				    xhci->scratchpad->sp_array[i]);
- 	}
--	kfree(xhci->scratchpad->sp_dma_buffers);
- 
-- fail_sp4:
- 	kfree(xhci->scratchpad->sp_buffers);
- 
-  fail_sp3:
-@@ -1797,9 +1788,8 @@ static void scratchpad_free(struct xhci_
- 	for (i = 0; i < num_sp; i++) {
- 		dma_free_coherent(dev, xhci->page_size,
- 				    xhci->scratchpad->sp_buffers[i],
--				    xhci->scratchpad->sp_dma_buffers[i]);
-+				    xhci->scratchpad->sp_array[i]);
- 	}
--	kfree(xhci->scratchpad->sp_dma_buffers);
- 	kfree(xhci->scratchpad->sp_buffers);
- 	dma_free_coherent(dev, num_sp * sizeof(u64),
- 			    xhci->scratchpad->sp_array,
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1610,7 +1610,6 @@ struct xhci_scratchpad {
- 	u64 *sp_array;
- 	dma_addr_t sp_dma;
- 	void **sp_buffers;
--	dma_addr_t *sp_dma_buffers;
- };
- 
- struct urb_priv {
diff --git a/patches.renesas/0206-ARM-shmobile-r8a7793-gose-Add-board-part-number-to-D.patch b/patches.renesas/0206-ARM-shmobile-r8a7793-gose-Add-board-part-number-to-D.patch
deleted file mode 100644
index b2b674c796fa55..00000000000000
--- a/patches.renesas/0206-ARM-shmobile-r8a7793-gose-Add-board-part-number-to-D.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From d2a559c3e94696810a48f6112f6cd9a1e71e1883 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 4 Oct 2016 15:20:48 +0200
-Subject: [PATCH 206/299] ARM: shmobile: r8a7793/gose: Add board part number to
- DT bindings
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4b8f5955be83c539d2defe0a81313c11c0e3b3ad)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/arm/shmobile.txt |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/Documentation/devicetree/bindings/arm/shmobile.txt
-+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
-@@ -49,7 +49,7 @@ Boards:
-     compatible = "renesas,bockw", "renesas,r8a7778"
-   - Genmai (RTK772100BC00000BR)
-     compatible = "renesas,genmai", "renesas,r7s72100"
--  - Gose
-+  - Gose (RTP0RC7793SEB00010S)
-     compatible = "renesas,gose", "renesas,r8a7793"
-   - H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKB00010S)
-     compatible = "renesas,h3ulcb", "renesas,r8a7795";
diff --git a/patches.renesas/0206-usb-host-xhci-make-a-generic-TRB-tracer.patch b/patches.renesas/0206-usb-host-xhci-make-a-generic-TRB-tracer.patch
deleted file mode 100644
index d238d8798cd5fe..00000000000000
--- a/patches.renesas/0206-usb-host-xhci-make-a-generic-TRB-tracer.patch
+++ /dev/null
@@ -1,518 +0,0 @@
-From e69caaab839079cadd29abdff525ddfd4cb65ce4 Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:19 +0200
-Subject: [PATCH 206/255] usb: host: xhci: make a generic TRB tracer
-
-instead of having a tracer that can only trace command completions,
-let's promote this tracer so it can trace and decode any TRB.
-
-With that, it will be easier to extrapolate the lifetime of any TRB
-which might help debugging certain issues.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit a37c3f76e6a6b5eabacb1364c2218b0daafab18a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c  |   14 +
- drivers/usb/host/xhci-trace.h |   55 ++++---
- drivers/usb/host/xhci.h       |  329 ++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 375 insertions(+), 23 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1322,6 +1322,9 @@ static void handle_cmd_completion(struct
- 
- 	cmd_dma = le64_to_cpu(event->cmd_trb);
- 	cmd_trb = xhci->cmd_ring->dequeue;
-+
-+	trace_xhci_handle_command(xhci->cmd_ring, &cmd_trb->generic);
-+
- 	cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
- 			cmd_trb);
- 	/*
-@@ -1338,8 +1341,6 @@ static void handle_cmd_completion(struct
- 
- 	cancel_delayed_work(&xhci->cmd_timer);
- 
--	trace_xhci_cmd_completion(cmd_trb, (struct xhci_generic_trb *) event);
--
- 	cmd_comp_code = GET_COMP_CODE(le32_to_cpu(event->status));
- 
- 	/* If CMD ring stopped we own the trbs between enqueue and dequeue */
-@@ -2482,6 +2483,10 @@ static int handle_tx_event(struct xhci_h
- 
- 		ep_trb = &ep_seg->trbs[(ep_trb_dma - ep_seg->dma) /
- 						sizeof(*ep_trb)];
-+
-+		trace_xhci_handle_transfer(ep_ring,
-+				(struct xhci_generic_trb *) ep_trb);
-+
- 		/*
- 		 * No-op TRB should not trigger interrupts.
- 		 * If ep_trb is a no-op TRB, it means the
-@@ -2548,6 +2553,8 @@ static int xhci_handle_event(struct xhci
- 	    xhci->event_ring->cycle_state)
- 		return 0;
- 
-+	trace_xhci_handle_event(xhci->event_ring, &event->generic);
-+
- 	/*
- 	 * Barrier between reading the TRB_CYCLE (valid) flag above and any
- 	 * speculative reads of the event's flags/data below.
-@@ -2717,6 +2724,9 @@ static void queue_trb(struct xhci_hcd *x
- 	trb->field[1] = cpu_to_le32(field2);
- 	trb->field[2] = cpu_to_le32(field3);
- 	trb->field[3] = cpu_to_le32(field4);
-+
-+	trace_xhci_queue_trb(ring, trb);
-+
- 	inc_enq(xhci, ring, more_trbs_coming);
- }
- 
---- a/drivers/usb/host/xhci-trace.h
-+++ b/drivers/usb/host/xhci-trace.h
-@@ -115,34 +115,47 @@ DEFINE_EVENT(xhci_log_ctx, xhci_address_
- 	TP_ARGS(xhci, ctx, ep_num)
- );
- 
--DECLARE_EVENT_CLASS(xhci_log_event,
--	TP_PROTO(void *trb_va, struct xhci_generic_trb *ev),
--	TP_ARGS(trb_va, ev),
-+DECLARE_EVENT_CLASS(xhci_log_trb,
-+	TP_PROTO(struct xhci_ring *ring, struct xhci_generic_trb *trb),
-+	TP_ARGS(ring, trb),
- 	TP_STRUCT__entry(
--		__field(void *, va)
--		__field(u64, dma)
--		__field(u32, status)
--		__field(u32, flags)
--		__dynamic_array(u8, trb, sizeof(struct xhci_generic_trb))
-+		__field(u32, type)
-+		__field(u32, field0)
-+		__field(u32, field1)
-+		__field(u32, field2)
-+		__field(u32, field3)
- 	),
- 	TP_fast_assign(
--		__entry->va = trb_va;
--		__entry->dma = ((u64)le32_to_cpu(ev->field[1])) << 32 |
--					le32_to_cpu(ev->field[0]);
--		__entry->status = le32_to_cpu(ev->field[2]);
--		__entry->flags = le32_to_cpu(ev->field[3]);
--		memcpy(__get_dynamic_array(trb), trb_va,
--			sizeof(struct xhci_generic_trb));
-+		__entry->type = ring->type;
-+		__entry->field0 = le32_to_cpu(trb->field[0]);
-+		__entry->field1 = le32_to_cpu(trb->field[1]);
-+		__entry->field2 = le32_to_cpu(trb->field[2]);
-+		__entry->field3 = le32_to_cpu(trb->field[3]);
- 	),
--	TP_printk("\ntrb_dma=@%llx, trb_va=@%p, status=%08x, flags=%08x",
--			(unsigned long long) __entry->dma, __entry->va,
--			__entry->status, __entry->flags
-+	TP_printk("%s: %s", xhci_ring_type_string(__entry->type),
-+			xhci_decode_trb(__entry->field0, __entry->field1,
-+					__entry->field2, __entry->field3)
- 	)
- );
- 
--DEFINE_EVENT(xhci_log_event, xhci_cmd_completion,
--	TP_PROTO(void *trb_va, struct xhci_generic_trb *ev),
--	TP_ARGS(trb_va, ev)
-+DEFINE_EVENT(xhci_log_trb, xhci_handle_event,
-+	TP_PROTO(struct xhci_ring *ring, struct xhci_generic_trb *trb),
-+	TP_ARGS(ring, trb)
-+);
-+
-+DEFINE_EVENT(xhci_log_trb, xhci_handle_command,
-+	TP_PROTO(struct xhci_ring *ring, struct xhci_generic_trb *trb),
-+	TP_ARGS(ring, trb)
-+);
-+
-+DEFINE_EVENT(xhci_log_trb, xhci_handle_transfer,
-+	TP_PROTO(struct xhci_ring *ring, struct xhci_generic_trb *trb),
-+	TP_ARGS(ring, trb)
-+);
-+
-+DEFINE_EVENT(xhci_log_trb, xhci_queue_trb,
-+	TP_PROTO(struct xhci_ring *ring, struct xhci_generic_trb *trb),
-+	TP_ARGS(ring, trb)
- );
- 
- #endif /* __XHCI_TRACE_H */
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1203,6 +1203,27 @@ struct xhci_event_cmd {
- 
- /* Address device - disable SetAddress */
- #define TRB_BSR		(1<<9)
-+
-+/* Configure Endpoint - Deconfigure */
-+#define TRB_DC		(1<<9)
-+
-+/* Stop Ring - Transfer State Preserve */
-+#define TRB_TSP		(1<<9)
-+
-+/* Force Event */
-+#define TRB_TO_VF_INTR_TARGET(p)	(((p) & (0x3ff << 22)) >> 22)
-+#define TRB_TO_VF_ID(p)			(((p) & (0xff << 16)) >> 16)
-+
-+/* Set Latency Tolerance Value */
-+#define TRB_TO_BELT(p)			(((p) & (0xfff << 16)) >> 16)
-+
-+/* Get Port Bandwidth */
-+#define TRB_TO_DEV_SPEED(p)		(((p) & (0xf << 16)) >> 16)
-+
-+/* Force Header */
-+#define TRB_TO_PACKET_TYPE(p)		((p) & 0x1f)
-+#define TRB_TO_ROOTHUB_PORT(p)		(((p) & (0xff << 24)) >> 24)
-+
- enum xhci_setup_dev {
- 	SETUP_CONTEXT_ONLY,
- 	SETUP_CONTEXT_ADDRESS,
-@@ -1226,16 +1247,21 @@ enum xhci_setup_dev {
- #define STREAM_ID_FOR_TRB(p)		((((p)) & 0xffff) << 16)
- #define SCT_FOR_TRB(p)			(((p) << 1) & 0x7)
- 
-+/* Link TRB specific fields */
-+#define TRB_TC			(1<<1)
- 
- /* Port Status Change Event TRB fields */
- /* Port ID - bits 31:24 */
- #define GET_PORT_ID(p)		(((p) & (0xff << 24)) >> 24)
- 
-+#define EVENT_DATA		(1 << 2)
-+
- /* Normal TRB fields */
- /* transfer_len bitmasks - bits 0:16 */
- #define	TRB_LEN(p)		((p) & 0x1ffff)
- /* TD Size, packets remaining in this TD, bits 21:17 (5 bits, so max 31) */
- #define TRB_TD_SIZE(p)          (min((p), (u32)31) << 17)
-+#define GET_TD_SIZE(p)		(((p) & 0x3e0000) >> 17)
- /* xhci 1.1 uses the TD_SIZE field for TBC if Extended TBC is enabled (ETE) */
- #define TRB_TD_SIZE_TBC(p)      (min((p), (u32)31) << 17)
- /* Interrupter Target - which MSI-X vector to target the completion event at */
-@@ -1363,6 +1389,80 @@ union xhci_trb {
- /* Get NEC firmware revision. */
- #define	TRB_NEC_GET_FW		49
- 
-+static inline const char *xhci_trb_type_string(u8 type)
-+{
-+	switch (type) {
-+	case TRB_NORMAL:
-+		return "Normal";
-+	case TRB_SETUP:
-+		return "Setup Stage";
-+	case TRB_DATA:
-+		return "Data Stage";
-+	case TRB_STATUS:
-+		return "Status Stage";
-+	case TRB_ISOC:
-+		return "Isoch";
-+	case TRB_LINK:
-+		return "Link";
-+	case TRB_EVENT_DATA:
-+		return "Event Data";
-+	case TRB_TR_NOOP:
-+		return "No-Op";
-+	case TRB_ENABLE_SLOT:
-+		return "Enable Slot Command";
-+	case TRB_DISABLE_SLOT:
-+		return "Disable Slot Command";
-+	case TRB_ADDR_DEV:
-+		return "Address Device Command";
-+	case TRB_CONFIG_EP:
-+		return "Configure Endpoint Command";
-+	case TRB_EVAL_CONTEXT:
-+		return "Evaluate Context Command";
-+	case TRB_RESET_EP:
-+		return "Reset Endpoint Command";
-+	case TRB_STOP_RING:
-+		return "Stop Ring Command";
-+	case TRB_SET_DEQ:
-+		return "Set TR Dequeue Pointer Command";
-+	case TRB_RESET_DEV:
-+		return "Reset Device Command";
-+	case TRB_FORCE_EVENT:
-+		return "Force Event Command";
-+	case TRB_NEG_BANDWIDTH:
-+		return "Negotiate Bandwidth Command";
-+	case TRB_SET_LT:
-+		return "Set Latency Tolerance Value Command";
-+	case TRB_GET_BW:
-+		return "Get Port Bandwidth Command";
-+	case TRB_FORCE_HEADER:
-+		return "Force Header Command";
-+	case TRB_CMD_NOOP:
-+		return "No-Op Command";
-+	case TRB_TRANSFER:
-+		return "Transfer Event";
-+	case TRB_COMPLETION:
-+		return "Command Completion Event";
-+	case TRB_PORT_STATUS:
-+		return "Port Status Change Event";
-+	case TRB_BANDWIDTH_EVENT:
-+		return "Bandwidth Request Event";
-+	case TRB_DOORBELL:
-+		return "Doorbell Event";
-+	case TRB_HC_EVENT:
-+		return "Host Controller Event";
-+	case TRB_DEV_NOTE:
-+		return "Device Notification Event";
-+	case TRB_MFINDEX_WRAP:
-+		return "MFINDEX Wrap Event";
-+	case TRB_NEC_CMD_COMP:
-+		return "NEC Command Completion Event";
-+	case TRB_NEC_GET_FW:
-+		return "NET Get Firmware Revision Command";
-+	default:
-+		return "UNKNOWN";
-+	}
-+}
-+
- #define TRB_TYPE_LINK(x)	(((x) & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK))
- /* Above, but for __le32 types -- can avoid work by swapping constants: */
- #define TRB_TYPE_LINK_LE32(x)	(((x) & cpu_to_le32(TRB_TYPE_BITMASK)) == \
-@@ -1439,6 +1539,28 @@ enum xhci_ring_type {
- 	TYPE_EVENT,
- };
- 
-+static inline const char *xhci_ring_type_string(enum xhci_ring_type type)
-+{
-+	switch (type) {
-+	case TYPE_CTRL:
-+		return "CTRL";
-+	case TYPE_ISOC:
-+		return "ISOC";
-+	case TYPE_BULK:
-+		return "BULK";
-+	case TYPE_INTR:
-+		return "INTR";
-+	case TYPE_STREAM:
-+		return "STREAM";
-+	case TYPE_COMMAND:
-+		return "CMD";
-+	case TYPE_EVENT:
-+		return "EVENT";
-+	}
-+
-+	return "UNKNOWN";
-+}
-+
- struct xhci_ring {
- 	struct xhci_segment	*first_seg;
- 	struct xhci_segment	*last_seg;
-@@ -2038,4 +2160,211 @@ static inline struct xhci_ring *xhci_urb
- 					urb->stream_id);
- }
- 
-+static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
-+		u32 field3)
-+{
-+	static char str[256];
-+	int type = TRB_FIELD_TO_TYPE(field3);
-+
-+	switch (type) {
-+	case TRB_LINK:
-+		sprintf(str,
-+			"TRB %08x%08x status '%s' len %d slot %d ep %d type '%s' flags %c:%c",
-+			field1, field0,
-+			xhci_trb_comp_code_string(GET_COMP_CODE(field2)),
-+			EVENT_TRB_LEN(field2), TRB_TO_SLOT_ID(field3),
-+			/* Macro decrements 1, maybe it shouldn't?!? */
-+			TRB_TO_EP_INDEX(field3) + 1,
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			field3 & EVENT_DATA ? 'E' : 'e',
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	case TRB_TRANSFER:
-+	case TRB_COMPLETION:
-+	case TRB_PORT_STATUS:
-+	case TRB_BANDWIDTH_EVENT:
-+	case TRB_DOORBELL:
-+	case TRB_HC_EVENT:
-+	case TRB_DEV_NOTE:
-+	case TRB_MFINDEX_WRAP:
-+		sprintf(str,
-+			"TRB %08x%08x status '%s' len %d slot %d ep %d type '%s' flags %c:%c",
-+			field1, field0,
-+			xhci_trb_comp_code_string(GET_COMP_CODE(field2)),
-+			EVENT_TRB_LEN(field2), TRB_TO_SLOT_ID(field3),
-+			/* Macro decrements 1, maybe it shouldn't?!? */
-+			TRB_TO_EP_INDEX(field3) + 1,
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			field3 & EVENT_DATA ? 'E' : 'e',
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+
-+		break;
-+	case TRB_SETUP:
-+		sprintf(str,
-+			"bRequestType %02x bRequest %02x wValue %02x%02x wIndex %02x%02x wLength %d length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c:%c:%c:%c:%c",
-+			field0 & 0xff,
-+			(field0 & 0xff00) >> 8,
-+			(field0 & 0xff000000) >> 24,
-+			(field0 & 0xff0000) >> 16,
-+			(field1 & 0xff00) >> 8,
-+			field1 & 0xff,
-+			(field1 & 0xff000000) >> 16 |
-+			(field1 & 0xff0000) >> 16,
-+			TRB_LEN(field2), GET_TD_SIZE(field2),
-+			GET_INTR_TARGET(field2),
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			field3 & TRB_BEI ? 'B' : 'b',
-+			field3 & TRB_IDT ? 'I' : 'i',
-+			field3 & TRB_IOC ? 'I' : 'i',
-+			field3 & TRB_CHAIN ? 'C' : 'c',
-+			field3 & TRB_NO_SNOOP ? 'S' : 's',
-+			field3 & TRB_ISP ? 'I' : 'i',
-+			field3 & TRB_ENT ? 'E' : 'e',
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	case TRB_NORMAL:
-+	case TRB_DATA:
-+	case TRB_STATUS:
-+	case TRB_ISOC:
-+	case TRB_EVENT_DATA:
-+	case TRB_TR_NOOP:
-+		sprintf(str,
-+			"Buffer %08x%08x length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c:%c:%c:%c:%c",
-+			field1, field0, TRB_LEN(field2), GET_TD_SIZE(field2),
-+			GET_INTR_TARGET(field2),
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			field3 & TRB_BEI ? 'B' : 'b',
-+			field3 & TRB_IDT ? 'I' : 'i',
-+			field3 & TRB_IOC ? 'I' : 'i',
-+			field3 & TRB_CHAIN ? 'C' : 'c',
-+			field3 & TRB_NO_SNOOP ? 'S' : 's',
-+			field3 & TRB_ISP ? 'I' : 'i',
-+			field3 & TRB_ENT ? 'E' : 'e',
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+
-+	case TRB_CMD_NOOP:
-+	case TRB_ENABLE_SLOT:
-+		sprintf(str,
-+			"%s: flags %c",
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	case TRB_DISABLE_SLOT:
-+	case TRB_NEG_BANDWIDTH:
-+		sprintf(str,
-+			"%s: slot %d flags %c",
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			TRB_TO_SLOT_ID(field3),
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	case TRB_ADDR_DEV:
-+		sprintf(str,
-+			"%s: ctx %08x%08x slot %d flags %c:%c",
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			field1, field0,
-+			TRB_TO_SLOT_ID(field3),
-+			field3 & TRB_BSR ? 'B' : 'b',
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	case TRB_CONFIG_EP:
-+		sprintf(str,
-+			"%s: ctx %08x%08x slot %d flags %c:%c",
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			field1, field0,
-+			TRB_TO_SLOT_ID(field3),
-+			field3 & TRB_DC ? 'D' : 'd',
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	case TRB_EVAL_CONTEXT:
-+		sprintf(str,
-+			"%s: ctx %08x%08x slot %d flags %c",
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			field1, field0,
-+			TRB_TO_SLOT_ID(field3),
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	case TRB_RESET_EP:
-+		sprintf(str,
-+			"%s: ctx %08x%08x slot %d ep %d flags %c",
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			field1, field0,
-+			TRB_TO_SLOT_ID(field3),
-+			/* Macro decrements 1, maybe it shouldn't?!? */
-+			TRB_TO_EP_INDEX(field3) + 1,
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	case TRB_STOP_RING:
-+		sprintf(str,
-+			"%s: slot %d sp %d ep %d flags %c",
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			TRB_TO_SLOT_ID(field3),
-+			TRB_TO_SUSPEND_PORT(field3),
-+			/* Macro decrements 1, maybe it shouldn't?!? */
-+			TRB_TO_EP_INDEX(field3) + 1,
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	case TRB_SET_DEQ:
-+		sprintf(str,
-+			"%s: deq %08x%08x stream %d slot %d ep %d flags %c",
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			field1, field0,
-+			TRB_TO_STREAM_ID(field2),
-+			TRB_TO_SLOT_ID(field3),
-+			/* Macro decrements 1, maybe it shouldn't?!? */
-+			TRB_TO_EP_INDEX(field3) + 1,
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	case TRB_RESET_DEV:
-+		sprintf(str,
-+			"%s: slot %d flags %c",
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			TRB_TO_SLOT_ID(field3),
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	case TRB_FORCE_EVENT:
-+		sprintf(str,
-+			"%s: event %08x%08x vf intr %d vf id %d flags %c",
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			field1, field0,
-+			TRB_TO_VF_INTR_TARGET(field2),
-+			TRB_TO_VF_ID(field3),
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	case TRB_SET_LT:
-+		sprintf(str,
-+			"%s: belt %d flags %c",
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			TRB_TO_BELT(field3),
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	case TRB_GET_BW:
-+		sprintf(str,
-+			"%s: ctx %08x%08x slot %d speed %d flags %c",
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			field1, field0,
-+			TRB_TO_SLOT_ID(field3),
-+			TRB_TO_DEV_SPEED(field3),
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	case TRB_FORCE_HEADER:
-+		sprintf(str,
-+			"%s: info %08x%08x%08x pkt type %d roothub port %d flags %c",
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			field2, field1, field0 & 0xffffffe0,
-+			TRB_TO_PACKET_TYPE(field0),
-+			TRB_TO_ROOTHUB_PORT(field3),
-+			field3 & TRB_CYCLE ? 'C' : 'c');
-+		break;
-+	default:
-+		sprintf(str,
-+			"type '%s' -> raw %08x %08x %08x %08x",
-+			xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
-+			field0, field1, field2, field3);
-+	}
-+
-+	return str;
-+}
-+
-+
- #endif /* __LINUX_XHCI_HCD_H */
diff --git a/patches.renesas/0206-usb-host-xhci-remove-ifdef-around-PM-functions.patch b/patches.renesas/0206-usb-host-xhci-remove-ifdef-around-PM-functions.patch
deleted file mode 100644
index ab6d1d23e5279f..00000000000000
--- a/patches.renesas/0206-usb-host-xhci-remove-ifdef-around-PM-functions.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 5106e20c153d4a513b44cef20545120449099563 Mon Sep 17 00:00:00 2001
-From: Arnd Bergmann <arnd@arndb.de>
-Date: Fri, 21 Apr 2017 23:42:54 +0200
-Subject: [PATCH 206/286] usb: host: xhci: remove #ifdef around PM functions
-
-The #ifdef is slightly wrong as it doesn't cover the xhci_priv_resume_quirk()
-function, causing a harmless warning:
-
-drivers/usb/host/xhci-plat.c:58:12: error: 'xhci_priv_resume_quirk' defined but not used [-Werror=unused-function]
- static int xhci_priv_resume_quirk(struct usb_hcd *hcd)
-
-A simpler way to do this correctly is to use __maybe_unused annotations
-that let the compiler silently drop the functions when there is no
-reference.
-
-Fixes: b0c69b4bace3 ("usb: host: plat: Enable xHCI plat runtime PM")
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit d852ed98f62e0d44f594adb850b3d6cedb5c9292)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-plat.c |   12 ++++--------
- drivers/usb/host/xhci.h      |    5 -----
- 2 files changed, 4 insertions(+), 13 deletions(-)
-
---- a/drivers/usb/host/xhci-plat.c
-+++ b/drivers/usb/host/xhci-plat.c
-@@ -336,8 +336,7 @@ static int xhci_plat_remove(struct platf
- 	return 0;
- }
- 
--#ifdef CONFIG_PM_SLEEP
--static int xhci_plat_suspend(struct device *dev)
-+static int __maybe_unused xhci_plat_suspend(struct device *dev)
- {
- 	struct usb_hcd	*hcd = dev_get_drvdata(dev);
- 	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
-@@ -359,7 +358,7 @@ static int xhci_plat_suspend(struct devi
- 	return ret;
- }
- 
--static int xhci_plat_resume(struct device *dev)
-+static int __maybe_unused xhci_plat_resume(struct device *dev)
- {
- 	struct usb_hcd	*hcd = dev_get_drvdata(dev);
- 	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
-@@ -374,10 +373,8 @@ static int xhci_plat_resume(struct devic
- 
- 	return xhci_resume(xhci, 0);
- }
--#endif /* CONFIG_PM_SLEEP */
- 
--#ifdef CONFIG_PM
--static int xhci_plat_runtime_suspend(struct device *dev)
-+static int __maybe_unused xhci_plat_runtime_suspend(struct device *dev)
- {
- 	struct usb_hcd  *hcd = dev_get_drvdata(dev);
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
-@@ -385,14 +382,13 @@ static int xhci_plat_runtime_suspend(str
- 	return xhci_suspend(xhci, true);
- }
- 
--static int xhci_plat_runtime_resume(struct device *dev)
-+static int __maybe_unused xhci_plat_runtime_resume(struct device *dev)
- {
- 	struct usb_hcd  *hcd = dev_get_drvdata(dev);
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
- 
- 	return xhci_resume(xhci, 0);
- }
--#endif /* CONFIG_PM */
- 
- static const struct dev_pm_ops xhci_plat_pm_ops = {
- 	SET_SYSTEM_SLEEP_PM_OPS(xhci_plat_suspend, xhci_plat_resume)
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -2011,13 +2011,8 @@ void xhci_init_driver(struct hc_driver *
- int xhci_disable_slot(struct xhci_hcd *xhci,
- 			struct xhci_command *command, u32 slot_id);
- 
--#ifdef	CONFIG_PM
- int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup);
- int xhci_resume(struct xhci_hcd *xhci, bool hibernated);
--#else
--#define	xhci_suspend	NULL
--#define	xhci_resume	NULL
--#endif
- 
- irqreturn_t xhci_irq(struct usb_hcd *hcd);
- irqreturn_t xhci_msi_irq(int irq, void *hcd);
diff --git a/patches.renesas/0207-ARM-shmobile-Consolidate-R8A7743-and-R8A779-234-mach.patch b/patches.renesas/0207-ARM-shmobile-Consolidate-R8A7743-and-R8A779-234-mach.patch
deleted file mode 100644
index fe590d45d98721..00000000000000
--- a/patches.renesas/0207-ARM-shmobile-Consolidate-R8A7743-and-R8A779-234-mach.patch
+++ /dev/null
@@ -1,238 +0,0 @@
-From 978ded7a63ecadfe4e267aaafbc6311114456621 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 17 Oct 2016 16:59:04 +0300
-Subject: [PATCH 207/299] ARM: shmobile: Consolidate R8A7743 and R8A779[234]
- machine definitions
-
-The four SoCs use identical machine operations, consolidate them into
-two machine definitions in a single file.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a0c4e2ccb31540f8972d8f36d32ace6b30e88e0f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Makefile          |    4 ---
- arch/arm/mach-shmobile/setup-r8a7743.c   |   34 ------------------------------
- arch/arm/mach-shmobile/setup-r8a7792.c   |   35 -------------------------------
- arch/arm/mach-shmobile/setup-r8a7793.c   |   33 -----------------------------
- arch/arm/mach-shmobile/setup-r8a7794.c   |   33 -----------------------------
- arch/arm/mach-shmobile/setup-rcar-gen2.c |   33 +++++++++++++++++++++++++++++
- 6 files changed, 33 insertions(+), 139 deletions(-)
- delete mode 100644 arch/arm/mach-shmobile/setup-r8a7743.c
- delete mode 100644 arch/arm/mach-shmobile/setup-r8a7792.c
- delete mode 100644 arch/arm/mach-shmobile/setup-r8a7793.c
- delete mode 100644 arch/arm/mach-shmobile/setup-r8a7794.c
-
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -9,14 +9,10 @@ obj-y				:= timer.o
- obj-$(CONFIG_ARCH_SH73A0)	+= setup-sh73a0.o
- obj-$(CONFIG_ARCH_R8A73A4)	+= setup-r8a73a4.o
- obj-$(CONFIG_ARCH_R8A7740)	+= setup-r8a7740.o
--obj-$(CONFIG_ARCH_R8A7743)	+= setup-r8a7743.o
- obj-$(CONFIG_ARCH_R8A7778)	+= setup-r8a7778.o
- obj-$(CONFIG_ARCH_R8A7779)	+= setup-r8a7779.o pm-r8a7779.o
- obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o
- obj-$(CONFIG_ARCH_R8A7791)	+= setup-r8a7791.o
--obj-$(CONFIG_ARCH_R8A7792)	+= setup-r8a7792.o
--obj-$(CONFIG_ARCH_R8A7793)	+= setup-r8a7793.o
--obj-$(CONFIG_ARCH_R8A7794)	+= setup-r8a7794.o
- obj-$(CONFIG_ARCH_EMEV2)	+= setup-emev2.o
- obj-$(CONFIG_ARCH_R7S72100)	+= setup-r7s72100.o
- 
---- a/arch/arm/mach-shmobile/setup-r8a7743.c
-+++ /dev/null
-@@ -1,34 +0,0 @@
--/*
-- * r8a7743 processor support
-- *
-- * Copyright (C) 2016 Cogent Embedded, Inc.
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License version 2 as
-- *  published by the Free Software Foundation; of the License.
-- *
-- * This program is distributed in the hope that it will be useful,
-- * but WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- * GNU General Public License for more details.
-- */
--
--#include <linux/init.h>
--
--#include <asm/mach/arch.h>
--
--#include "common.h"
--#include "rcar-gen2.h"
--
--static const char * const r8a7743_boards_compat_dt[] __initconst = {
--	"renesas,r8a7743",
--	NULL,
--};
--
--DT_MACHINE_START(R8A7743_DT, "Generic R8A7743 (Flattened Device Tree)")
--	.init_early	= shmobile_init_delay,
--	.init_time	= rcar_gen2_timer_init,
--	.init_late	= shmobile_init_late,
--	.reserve	= rcar_gen2_reserve,
--	.dt_compat	= r8a7743_boards_compat_dt,
--MACHINE_END
---- a/arch/arm/mach-shmobile/setup-r8a7792.c
-+++ /dev/null
-@@ -1,35 +0,0 @@
--/*
-- * r8a7792 processor support
-- *
-- * Copyright (C) 2014 Renesas Electronics Corporation
-- * Copyright (C) 2016 Cogent  Embedded, Inc.
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; version 2 of the License.
-- *
-- * This program is distributed in the hope that it will be useful,
-- * but WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- * GNU General Public License for more details.
-- */
--
--#include <linux/of_platform.h>
--
--#include <asm/mach/arch.h>
--
--#include "common.h"
--#include "rcar-gen2.h"
--
--static const char * const r8a7792_boards_compat_dt[] __initconst = {
--	"renesas,r8a7792",
--	NULL,
--};
--
--DT_MACHINE_START(R8A7792_DT, "Generic R8A7792 (Flattened Device Tree)")
--	.init_early	= shmobile_init_delay,
--	.init_late	= shmobile_init_late,
--	.init_time	= rcar_gen2_timer_init,
--	.reserve	= rcar_gen2_reserve,
--	.dt_compat	= r8a7792_boards_compat_dt,
--MACHINE_END
---- a/arch/arm/mach-shmobile/setup-r8a7793.c
-+++ /dev/null
-@@ -1,33 +0,0 @@
--/*
-- * r8a7793 processor support
-- *
-- * Copyright (C) 2015  Ulrich Hecht
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; version 2 of the License.
-- *
-- * This program is distributed in the hope that it will be useful,
-- * but WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- * GNU General Public License for more details.
-- */
--
--#include <linux/init.h>
--#include <asm/mach/arch.h>
--
--#include "common.h"
--#include "rcar-gen2.h"
--
--static const char * const r8a7793_boards_compat_dt[] __initconst = {
--	"renesas,r8a7793",
--	NULL,
--};
--
--DT_MACHINE_START(R8A7793_DT, "Generic R8A7793 (Flattened Device Tree)")
--	.init_early	= shmobile_init_delay,
--	.init_time	= rcar_gen2_timer_init,
--	.init_late	= shmobile_init_late,
--	.reserve	= rcar_gen2_reserve,
--	.dt_compat	= r8a7793_boards_compat_dt,
--MACHINE_END
---- a/arch/arm/mach-shmobile/setup-r8a7794.c
-+++ /dev/null
-@@ -1,33 +0,0 @@
--/*
-- * r8a7794 processor support
-- *
-- * Copyright (C) 2014  Renesas Electronics Corporation
-- * Copyright (C) 2014  Ulrich Hecht
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; version 2 of the License.
-- *
-- * This program is distributed in the hope that it will be useful,
-- * but WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- * GNU General Public License for more details.
-- */
--
--#include <linux/of_platform.h>
--#include "common.h"
--#include "rcar-gen2.h"
--#include <asm/mach/arch.h>
--
--static const char * const r8a7794_boards_compat_dt[] __initconst = {
--	"renesas,r8a7794",
--	NULL,
--};
--
--DT_MACHINE_START(R8A7794_DT, "Generic R8A7794 (Flattened Device Tree)")
--	.init_early	= shmobile_init_delay,
--	.init_late	= shmobile_init_late,
--	.init_time	= rcar_gen2_timer_init,
--	.reserve	= rcar_gen2_reserve,
--	.dt_compat	= r8a7794_boards_compat_dt,
--MACHINE_END
---- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
-+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
-@@ -24,6 +24,7 @@
- #include <linux/memblock.h>
- #include <linux/of.h>
- #include <linux/of_fdt.h>
-+#include <linux/of_platform.h>
- #include <asm/mach/arch.h>
- #include "common.h"
- #include "rcar-gen2.h"
-@@ -202,3 +203,35 @@ void __init rcar_gen2_reserve(void)
- 	}
- #endif
- }
-+
-+static const char * const rcar_gen2_boards_compat_dt[] __initconst = {
-+	/*
-+	 * R8A7790 and R8A7791 can't be handled here as long as they need SMP
-+	 * initialization fallback.
-+	 */
-+	"renesas,r8a7792",
-+	"renesas,r8a7793",
-+	"renesas,r8a7794",
-+	NULL,
-+};
-+
-+DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)")
-+	.init_early	= shmobile_init_delay,
-+	.init_late	= shmobile_init_late,
-+	.init_time	= rcar_gen2_timer_init,
-+	.reserve	= rcar_gen2_reserve,
-+	.dt_compat	= rcar_gen2_boards_compat_dt,
-+MACHINE_END
-+
-+static const char * const rz_g1_boards_compat_dt[] __initconst = {
-+	"renesas,r8a7743",
-+	NULL,
-+};
-+
-+DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)")
-+	.init_early	= shmobile_init_delay,
-+	.init_late	= shmobile_init_late,
-+	.init_time	= rcar_gen2_timer_init,
-+	.reserve	= rcar_gen2_reserve,
-+	.dt_compat	= rz_g1_boards_compat_dt,
-+MACHINE_END
diff --git a/patches.renesas/0207-media-v4l-Add-metadata-buffer-type-and-format.patch b/patches.renesas/0207-media-v4l-Add-metadata-buffer-type-and-format.patch
deleted file mode 100644
index e682ec8bb7d32c..00000000000000
--- a/patches.renesas/0207-media-v4l-Add-metadata-buffer-type-and-format.patch
+++ /dev/null
@@ -1,479 +0,0 @@
-From dcb49656a8af3d454bb75c06cb30a2eb8651c081 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 12 Apr 2016 19:40:46 -0300
-Subject: [PATCH 207/286] [media] v4l: Add metadata buffer type and format
-
-The metadata buffer type is used to transfer metadata between userspace
-and kernelspace through a V4L2 buffers queue. It comes with a new
-metadata capture capability and format description.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Guennadi Liakhovetski <guennadi.liakhovetski@intel.com>
-Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-[hans.verkuil@cisco.com: removed left-over 'experimental' note]
-[hans.verkuil@cisco.com: add newline after _v4l2-meta-format label]
-
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit fb9ffa6a7f7ef39cc0f14f417b66411be5492512)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/media/uapi/v4l/buffer.rst          |    3 +
- Documentation/media/uapi/v4l/dev-meta.rst        |   58 +++++++++++++++++++++++
- Documentation/media/uapi/v4l/devices.rst         |    1 
- Documentation/media/uapi/v4l/vidioc-querycap.rst |    3 +
- Documentation/media/videodev2.h.rst.exceptions   |    2 
- drivers/media/v4l2-core/v4l2-compat-ioctl32.c    |   21 ++++++++
- drivers/media/v4l2-core/v4l2-dev.c               |   16 +++---
- drivers/media/v4l2-core/v4l2-ioctl.c             |   34 +++++++++++++
- drivers/media/v4l2-core/videobuf2-v4l2.c         |    3 +
- include/media/v4l2-ioctl.h                       |   17 ++++++
- include/trace/events/v4l2.h                      |    1 
- include/uapi/linux/videodev2.h                   |   13 +++++
- 12 files changed, 166 insertions(+), 6 deletions(-)
- create mode 100644 Documentation/media/uapi/v4l/dev-meta.rst
-
---- a/Documentation/media/uapi/v4l/buffer.rst
-+++ b/Documentation/media/uapi/v4l/buffer.rst
-@@ -330,6 +330,9 @@ enum v4l2_buf_type
-       - 12
-       - Buffer for Software Defined Radio (SDR) output stream, see
- 	:ref:`sdr`.
-+    * - ``V4L2_BUF_TYPE_META_CAPTURE``
-+      - 13
-+      - Buffer for metadata capture, see :ref:`metadata`.
- 
- 
- 
---- /dev/null
-+++ b/Documentation/media/uapi/v4l/dev-meta.rst
-@@ -0,0 +1,58 @@
-+.. -*- coding: utf-8; mode: rst -*-
-+
-+.. _metadata:
-+
-+******************
-+Metadata Interface
-+******************
-+
-+Metadata refers to any non-image data that supplements video frames with
-+additional information. This may include statistics computed over the image
-+or frame capture parameters supplied by the image source. This interface is
-+intended for transfer of metadata to userspace and control of that operation.
-+
-+The metadata interface is implemented on video capture device nodes. The device
-+can be dedicated to metadata or can implement both video and metadata capture
-+as specified in its reported capabilities.
-+
-+Querying Capabilities
-+=====================
-+
-+Device nodes supporting the metadata interface set the ``V4L2_CAP_META_CAPTURE``
-+flag in the ``device_caps`` field of the
-+:c:type:`v4l2_capability` structure returned by the :c:func:`VIDIOC_QUERYCAP`
-+ioctl. That flag means the device can capture metadata to memory.
-+
-+At least one of the read/write or streaming I/O methods must be supported.
-+
-+
-+Data Format Negotiation
-+=======================
-+
-+The metadata device uses the :ref:`format` ioctls to select the capture format.
-+The metadata buffer content format is bound to that selected format. In addition
-+to the basic :ref:`format` ioctls, the :c:func:`VIDIOC_ENUM_FMT` ioctl must be
-+supported as well.
-+
-+To use the :ref:`format` ioctls applications set the ``type`` field of the
-+:c:type:`v4l2_format` structure to ``V4L2_BUF_TYPE_META_CAPTURE`` and use the
-+:c:type:`v4l2_meta_format` ``meta`` member of the ``fmt`` union as needed per
-+the desired operation. Both drivers and applications must set the remainder of
-+the :c:type:`v4l2_format` structure to 0.
-+
-+.. _v4l2-meta-format:
-+
-+.. flat-table:: struct v4l2_meta_format
-+    :header-rows:  0
-+    :stub-columns: 0
-+    :widths:       1 1 2
-+
-+    * - __u32
-+      - ``dataformat``
-+      - The data format, set by the application. This is a little endian
-+        :ref:`four character code <v4l2-fourcc>`. V4L2 defines metadata formats
-+        in :ref:`meta-formats`.
-+    * - __u32
-+      - ``buffersize``
-+      - Maximum buffer size in bytes required for data. The value is set by the
-+        driver.
---- a/Documentation/media/uapi/v4l/devices.rst
-+++ b/Documentation/media/uapi/v4l/devices.rst
-@@ -25,3 +25,4 @@ Interfaces
-     dev-touch
-     dev-event
-     dev-subdev
-+    dev-meta
---- a/Documentation/media/uapi/v4l/vidioc-querycap.rst
-+++ b/Documentation/media/uapi/v4l/vidioc-querycap.rst
-@@ -236,6 +236,9 @@ specification the ioctl returns an ``EIN
-     * - ``V4L2_CAP_SDR_OUTPUT``
-       - 0x00400000
-       - The device supports the :ref:`SDR Output <sdr>` interface.
-+    * - ``V4L2_CAP_META_CAPTURE``
-+      - 0x00800000
-+      - The device supports the :ref:`metadata` capture interface.
-     * - ``V4L2_CAP_READWRITE``
-       - 0x01000000
-       - The device supports the :ref:`read() <rw>` and/or
---- a/Documentation/media/videodev2.h.rst.exceptions
-+++ b/Documentation/media/videodev2.h.rst.exceptions
-@@ -27,6 +27,7 @@ replace symbol V4L2_FIELD_SEQ_TB :c:type
- replace symbol V4L2_FIELD_TOP :c:type:`v4l2_field`
- 
- # Documented enum v4l2_buf_type
-+replace symbol V4L2_BUF_TYPE_META_CAPTURE :c:type:`v4l2_buf_type`
- replace symbol V4L2_BUF_TYPE_SDR_CAPTURE :c:type:`v4l2_buf_type`
- replace symbol V4L2_BUF_TYPE_SDR_OUTPUT :c:type:`v4l2_buf_type`
- replace symbol V4L2_BUF_TYPE_SLICED_VBI_CAPTURE :c:type:`v4l2_buf_type`
-@@ -148,6 +149,7 @@ replace define V4L2_CAP_MODULATOR device
- replace define V4L2_CAP_SDR_CAPTURE device-capabilities
- replace define V4L2_CAP_EXT_PIX_FORMAT device-capabilities
- replace define V4L2_CAP_SDR_OUTPUT device-capabilities
-+replace define V4L2_CAP_META_CAPTURE device-capabilities
- replace define V4L2_CAP_READWRITE device-capabilities
- replace define V4L2_CAP_ASYNCIO device-capabilities
- replace define V4L2_CAP_STREAMING device-capabilities
---- a/drivers/media/v4l2-core/v4l2-compat-ioctl32.c
-+++ b/drivers/media/v4l2-core/v4l2-compat-ioctl32.c
-@@ -130,6 +130,20 @@ static int put_v4l2_window32(struct v4l2
- 	return 0;
- }
- 
-+static inline int get_v4l2_meta_format(struct v4l2_meta_format *kp, struct v4l2_meta_format __user *up)
-+{
-+	if (copy_from_user(kp, up, sizeof(struct v4l2_meta_format)))
-+		return -EFAULT;
-+	return 0;
-+}
-+
-+static inline int put_v4l2_meta_format(struct v4l2_meta_format *kp, struct v4l2_meta_format __user *up)
-+{
-+	if (copy_to_user(up, kp, sizeof(struct v4l2_meta_format)))
-+		return -EFAULT;
-+	return 0;
-+}
-+
- struct v4l2_format32 {
- 	__u32	type;	/* enum v4l2_buf_type */
- 	union {
-@@ -139,6 +153,7 @@ struct v4l2_format32 {
- 		struct v4l2_vbi_format	vbi;
- 		struct v4l2_sliced_vbi_format	sliced;
- 		struct v4l2_sdr_format	sdr;
-+		struct v4l2_meta_format	meta;
- 		__u8	raw_data[200];        /* user-defined */
- 	} fmt;
- };
-@@ -226,6 +241,9 @@ static int __get_v4l2_format32(struct v4
- 	case V4L2_BUF_TYPE_SDR_OUTPUT:
- 		return copy_in_user(&kp->fmt.sdr, &up->fmt.sdr,
- 				    sizeof(kp->fmt.sdr)) ? -EFAULT : 0;
-+	case V4L2_BUF_TYPE_META_CAPTURE:
-+		return copy_in_user(&kp->fmt.meta, &up->fmt.meta,
-+				    sizeof(kb->fmt.meta)) ? -EFAULT : 0;
- 	default:
- 		return -EINVAL;
- 	}
-@@ -292,6 +310,9 @@ static int __put_v4l2_format32(struct v4
- 	case V4L2_BUF_TYPE_SDR_OUTPUT:
- 		return copy_in_user(&up->fmt.sdr, &kp->fmt.sdr,
- 				    sizeof(kp->fmt.sdr)) ? -EFAULT : 0;
-+	case V4L2_BUF_TYPE_META_CAPTURE:
-+		return copy_in_user(&up->fmt.meta, &kp->fmt.meta,
-+				    sizeof(kp->fmt.sdr)) ? -EFAULT : 0;
- 	default:
- 		return -EINVAL;
- 	}
---- a/drivers/media/v4l2-core/v4l2-dev.c
-+++ b/drivers/media/v4l2-core/v4l2-dev.c
-@@ -575,30 +575,34 @@ static void determine_valid_ioctls(struc
- 		set_bit(_IOC_NR(VIDIOC_ENUM_FREQ_BANDS), valid_ioctls);
- 
- 	if (is_vid || is_tch) {
--		/* video specific ioctls */
-+		/* video and metadata specific ioctls */
- 		if ((is_rx && (ops->vidioc_enum_fmt_vid_cap ||
- 			       ops->vidioc_enum_fmt_vid_cap_mplane ||
--			       ops->vidioc_enum_fmt_vid_overlay)) ||
-+			       ops->vidioc_enum_fmt_vid_overlay ||
-+			       ops->vidioc_enum_fmt_meta_cap)) ||
- 		    (is_tx && (ops->vidioc_enum_fmt_vid_out ||
- 			       ops->vidioc_enum_fmt_vid_out_mplane)))
- 			set_bit(_IOC_NR(VIDIOC_ENUM_FMT), valid_ioctls);
- 		if ((is_rx && (ops->vidioc_g_fmt_vid_cap ||
- 			       ops->vidioc_g_fmt_vid_cap_mplane ||
--			       ops->vidioc_g_fmt_vid_overlay)) ||
-+			       ops->vidioc_g_fmt_vid_overlay ||
-+			       ops->vidioc_g_fmt_meta_cap)) ||
- 		    (is_tx && (ops->vidioc_g_fmt_vid_out ||
- 			       ops->vidioc_g_fmt_vid_out_mplane ||
- 			       ops->vidioc_g_fmt_vid_out_overlay)))
- 			 set_bit(_IOC_NR(VIDIOC_G_FMT), valid_ioctls);
- 		if ((is_rx && (ops->vidioc_s_fmt_vid_cap ||
- 			       ops->vidioc_s_fmt_vid_cap_mplane ||
--			       ops->vidioc_s_fmt_vid_overlay)) ||
-+			       ops->vidioc_s_fmt_vid_overlay ||
-+			       ops->vidioc_s_fmt_meta_cap)) ||
- 		    (is_tx && (ops->vidioc_s_fmt_vid_out ||
- 			       ops->vidioc_s_fmt_vid_out_mplane ||
- 			       ops->vidioc_s_fmt_vid_out_overlay)))
- 			 set_bit(_IOC_NR(VIDIOC_S_FMT), valid_ioctls);
- 		if ((is_rx && (ops->vidioc_try_fmt_vid_cap ||
- 			       ops->vidioc_try_fmt_vid_cap_mplane ||
--			       ops->vidioc_try_fmt_vid_overlay)) ||
-+			       ops->vidioc_try_fmt_vid_overlay ||
-+			       ops->vidioc_try_fmt_meta_cap)) ||
- 		    (is_tx && (ops->vidioc_try_fmt_vid_out ||
- 			       ops->vidioc_try_fmt_vid_out_mplane ||
- 			       ops->vidioc_try_fmt_vid_out_overlay)))
-@@ -664,7 +668,7 @@ static void determine_valid_ioctls(struc
- 	}
- 
- 	if (is_vid || is_vbi || is_sdr || is_tch) {
--		/* ioctls valid for video, vbi or sdr */
-+		/* ioctls valid for video, metadata, vbi or sdr */
- 		SET_VALID_IOCTL(ops, VIDIOC_REQBUFS, vidioc_reqbufs);
- 		SET_VALID_IOCTL(ops, VIDIOC_QUERYBUF, vidioc_querybuf);
- 		SET_VALID_IOCTL(ops, VIDIOC_QBUF, vidioc_qbuf);
---- a/drivers/media/v4l2-core/v4l2-ioctl.c
-+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
-@@ -155,6 +155,7 @@ const char *v4l2_type_names[] = {
- 	[V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE] = "vid-out-mplane",
- 	[V4L2_BUF_TYPE_SDR_CAPTURE]        = "sdr-cap",
- 	[V4L2_BUF_TYPE_SDR_OUTPUT]         = "sdr-out",
-+	[V4L2_BUF_TYPE_META_CAPTURE]       = "meta-cap",
- };
- EXPORT_SYMBOL(v4l2_type_names);
- 
-@@ -249,6 +250,7 @@ static void v4l_print_format(const void
- 	const struct v4l2_sliced_vbi_format *sliced;
- 	const struct v4l2_window *win;
- 	const struct v4l2_sdr_format *sdr;
-+	const struct v4l2_meta_format *meta;
- 	unsigned i;
- 
- 	pr_cont("type=%s", prt_names(p->type, v4l2_type_names));
-@@ -336,6 +338,15 @@ static void v4l_print_format(const void
- 			(sdr->pixelformat >> 16) & 0xff,
- 			(sdr->pixelformat >> 24) & 0xff);
- 		break;
-+	case V4L2_BUF_TYPE_META_CAPTURE:
-+		meta = &p->fmt.meta;
-+		pr_cont(", dataformat=%c%c%c%c, buffersize=%u\n",
-+			(meta->dataformat >>  0) & 0xff,
-+			(meta->dataformat >>  8) & 0xff,
-+			(meta->dataformat >> 16) & 0xff,
-+			(meta->dataformat >> 24) & 0xff,
-+			meta->buffersize);
-+		break;
- 	}
- }
- 
-@@ -982,6 +993,10 @@ static int check_fmt(struct file *file,
- 		if (is_sdr && is_tx && ops->vidioc_g_fmt_sdr_out)
- 			return 0;
- 		break;
-+	case V4L2_BUF_TYPE_META_CAPTURE:
-+		if (is_vid && is_rx && ops->vidioc_g_fmt_meta_cap)
-+			return 0;
-+		break;
- 	default:
- 		break;
- 	}
-@@ -1357,6 +1372,11 @@ static int v4l_enum_fmt(const struct v4l
- 			break;
- 		ret = ops->vidioc_enum_fmt_sdr_out(file, fh, arg);
- 		break;
-+	case V4L2_BUF_TYPE_META_CAPTURE:
-+		if (unlikely(!is_rx || !is_vid || !ops->vidioc_enum_fmt_meta_cap))
-+			break;
-+		ret = ops->vidioc_enum_fmt_meta_cap(file, fh, arg);
-+		break;
- 	}
- 	if (ret == 0)
- 		v4l_fill_fmtdesc(p);
-@@ -1456,6 +1476,10 @@ static int v4l_g_fmt(const struct v4l2_i
- 		if (unlikely(!is_tx || !is_sdr || !ops->vidioc_g_fmt_sdr_out))
- 			break;
- 		return ops->vidioc_g_fmt_sdr_out(file, fh, arg);
-+	case V4L2_BUF_TYPE_META_CAPTURE:
-+		if (unlikely(!is_rx || !is_vid || !ops->vidioc_g_fmt_meta_cap))
-+			break;
-+		return ops->vidioc_g_fmt_meta_cap(file, fh, arg);
- 	}
- 	return -EINVAL;
- }
-@@ -1561,6 +1585,11 @@ static int v4l_s_fmt(const struct v4l2_i
- 			break;
- 		CLEAR_AFTER_FIELD(p, fmt.sdr);
- 		return ops->vidioc_s_fmt_sdr_out(file, fh, arg);
-+	case V4L2_BUF_TYPE_META_CAPTURE:
-+		if (unlikely(!is_rx || !is_vid || !ops->vidioc_s_fmt_meta_cap))
-+			break;
-+		CLEAR_AFTER_FIELD(p, fmt.meta);
-+		return ops->vidioc_s_fmt_meta_cap(file, fh, arg);
- 	}
- 	return -EINVAL;
- }
-@@ -1646,6 +1675,11 @@ static int v4l_try_fmt(const struct v4l2
- 			break;
- 		CLEAR_AFTER_FIELD(p, fmt.sdr);
- 		return ops->vidioc_try_fmt_sdr_out(file, fh, arg);
-+	case V4L2_BUF_TYPE_META_CAPTURE:
-+		if (unlikely(!is_rx || !is_vid || !ops->vidioc_try_fmt_meta_cap))
-+			break;
-+		CLEAR_AFTER_FIELD(p, fmt.meta);
-+		return ops->vidioc_try_fmt_meta_cap(file, fh, arg);
- 	}
- 	return -EINVAL;
- }
---- a/drivers/media/v4l2-core/videobuf2-v4l2.c
-+++ b/drivers/media/v4l2-core/videobuf2-v4l2.c
-@@ -546,6 +546,9 @@ int vb2_create_bufs(struct vb2_queue *q,
- 	case V4L2_BUF_TYPE_SDR_OUTPUT:
- 		requested_sizes[0] = f->fmt.sdr.buffersize;
- 		break;
-+	case V4L2_BUF_TYPE_META_CAPTURE:
-+		requested_sizes[0] = f->fmt.meta.buffersize;
-+		break;
- 	default:
- 		return -EINVAL;
- 	}
---- a/include/media/v4l2-ioctl.h
-+++ b/include/media/v4l2-ioctl.h
-@@ -43,6 +43,9 @@ struct v4l2_fh;
-  * @vidioc_enum_fmt_sdr_out: pointer to the function that implements
-  *	:ref:`VIDIOC_ENUM_FMT <vidioc_enum_fmt>` ioctl logic
-  *	for Software Defined Radio output
-+ * @vidioc_enum_fmt_meta_cap: pointer to the function that implements
-+ *	:ref:`VIDIOC_ENUM_FMT <vidioc_enum_fmt>` ioctl logic
-+ *	for metadata capture
-  * @vidioc_g_fmt_vid_cap: pointer to the function that implements
-  *	:ref:`VIDIOC_G_FMT <vidioc_g_fmt>` ioctl logic for video capture
-  *	in single plane mode
-@@ -73,6 +76,8 @@ struct v4l2_fh;
-  * @vidioc_g_fmt_sdr_out: pointer to the function that implements
-  *	:ref:`VIDIOC_G_FMT <vidioc_g_fmt>` ioctl logic for Software Defined
-  *	Radio output
-+ * @vidioc_g_fmt_meta_cap: pointer to the function that implements
-+ *	:ref:`VIDIOC_G_FMT <vidioc_g_fmt>` ioctl logic for metadata capture
-  * @vidioc_s_fmt_vid_cap: pointer to the function that implements
-  *	:ref:`VIDIOC_S_FMT <vidioc_g_fmt>` ioctl logic for video capture
-  *	in single plane mode
-@@ -103,6 +108,8 @@ struct v4l2_fh;
-  * @vidioc_s_fmt_sdr_out: pointer to the function that implements
-  *	:ref:`VIDIOC_S_FMT <vidioc_g_fmt>` ioctl logic for Software Defined
-  *	Radio output
-+ * @vidioc_s_fmt_meta_cap: pointer to the function that implements
-+ *	:ref:`VIDIOC_S_FMT <vidioc_g_fmt>` ioctl logic for metadata capture
-  * @vidioc_try_fmt_vid_cap: pointer to the function that implements
-  *	:ref:`VIDIOC_TRY_FMT <vidioc_g_fmt>` ioctl logic for video capture
-  *	in single plane mode
-@@ -135,6 +142,8 @@ struct v4l2_fh;
-  * @vidioc_try_fmt_sdr_out: pointer to the function that implements
-  *	:ref:`VIDIOC_TRY_FMT <vidioc_g_fmt>` ioctl logic for Software Defined
-  *	Radio output
-+ * @vidioc_try_fmt_meta_cap: pointer to the function that implements
-+ *	:ref:`VIDIOC_TRY_FMT <vidioc_g_fmt>` ioctl logic for metadata capture
-  * @vidioc_reqbufs: pointer to the function that implements
-  *	:ref:`VIDIOC_REQBUFS <vidioc_reqbufs>` ioctl
-  * @vidioc_querybuf: pointer to the function that implements
-@@ -305,6 +314,8 @@ struct v4l2_ioctl_ops {
- 				       struct v4l2_fmtdesc *f);
- 	int (*vidioc_enum_fmt_sdr_out)(struct file *file, void *fh,
- 				       struct v4l2_fmtdesc *f);
-+	int (*vidioc_enum_fmt_meta_cap)(struct file *file, void *fh,
-+					struct v4l2_fmtdesc *f);
- 
- 	/* VIDIOC_G_FMT handlers */
- 	int (*vidioc_g_fmt_vid_cap)(struct file *file, void *fh,
-@@ -331,6 +342,8 @@ struct v4l2_ioctl_ops {
- 				    struct v4l2_format *f);
- 	int (*vidioc_g_fmt_sdr_out)(struct file *file, void *fh,
- 				    struct v4l2_format *f);
-+	int (*vidioc_g_fmt_meta_cap)(struct file *file, void *fh,
-+				     struct v4l2_format *f);
- 
- 	/* VIDIOC_S_FMT handlers */
- 	int (*vidioc_s_fmt_vid_cap)(struct file *file, void *fh,
-@@ -357,6 +370,8 @@ struct v4l2_ioctl_ops {
- 				    struct v4l2_format *f);
- 	int (*vidioc_s_fmt_sdr_out)(struct file *file, void *fh,
- 				    struct v4l2_format *f);
-+	int (*vidioc_s_fmt_meta_cap)(struct file *file, void *fh,
-+				     struct v4l2_format *f);
- 
- 	/* VIDIOC_TRY_FMT handlers */
- 	int (*vidioc_try_fmt_vid_cap)(struct file *file, void *fh,
-@@ -383,6 +398,8 @@ struct v4l2_ioctl_ops {
- 				      struct v4l2_format *f);
- 	int (*vidioc_try_fmt_sdr_out)(struct file *file, void *fh,
- 				      struct v4l2_format *f);
-+	int (*vidioc_try_fmt_meta_cap)(struct file *file, void *fh,
-+				       struct v4l2_format *f);
- 
- 	/* Buffer handlers */
- 	int (*vidioc_reqbufs)(struct file *file, void *fh,
---- a/include/trace/events/v4l2.h
-+++ b/include/trace/events/v4l2.h
-@@ -29,6 +29,7 @@
- 	EM( V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,  "VIDEO_OUTPUT_MPLANE" )	\
- 	EM( V4L2_BUF_TYPE_SDR_CAPTURE,          "SDR_CAPTURE" )		\
- 	EM( V4L2_BUF_TYPE_SDR_OUTPUT,           "SDR_OUTPUT" )		\
-+	EM( V4L2_BUF_TYPE_META_CAPTURE,		"META_CAPTURE" )	\
- 	EMe(V4L2_BUF_TYPE_PRIVATE,		"PRIVATE" )
- 
- SHOW_TYPE
---- a/include/uapi/linux/videodev2.h
-+++ b/include/uapi/linux/videodev2.h
-@@ -143,6 +143,7 @@ enum v4l2_buf_type {
- 	V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE  = 10,
- 	V4L2_BUF_TYPE_SDR_CAPTURE          = 11,
- 	V4L2_BUF_TYPE_SDR_OUTPUT           = 12,
-+	V4L2_BUF_TYPE_META_CAPTURE         = 13,
- 	/* Deprecated, do not use */
- 	V4L2_BUF_TYPE_PRIVATE              = 0x80,
- };
-@@ -453,6 +454,7 @@ struct v4l2_capability {
- #define V4L2_CAP_SDR_CAPTURE		0x00100000  /* Is a SDR capture device */
- #define V4L2_CAP_EXT_PIX_FORMAT		0x00200000  /* Supports the extended pixel format */
- #define V4L2_CAP_SDR_OUTPUT		0x00400000  /* Is a SDR output device */
-+#define V4L2_CAP_META_CAPTURE		0x00800000  /* Is a metadata capture device */
- 
- #define V4L2_CAP_READWRITE              0x01000000  /* read/write systemcalls */
- #define V4L2_CAP_ASYNCIO                0x02000000  /* async I/O */
-@@ -2049,6 +2051,16 @@ struct v4l2_sdr_format {
- } __attribute__ ((packed));
- 
- /**
-+ * struct v4l2_meta_format - metadata format definition
-+ * @dataformat:		little endian four character code (fourcc)
-+ * @buffersize:		maximum size in bytes required for data
-+ */
-+struct v4l2_meta_format {
-+	__u32				dataformat;
-+	__u32				buffersize;
-+} __attribute__ ((packed));
-+
-+/**
-  * struct v4l2_format - stream data format
-  * @type:	enum v4l2_buf_type; type of the data stream
-  * @pix:	definition of an image format
-@@ -2067,6 +2079,7 @@ struct v4l2_format {
- 		struct v4l2_vbi_format		vbi;     /* V4L2_BUF_TYPE_VBI_CAPTURE */
- 		struct v4l2_sliced_vbi_format	sliced;  /* V4L2_BUF_TYPE_SLICED_VBI_CAPTURE */
- 		struct v4l2_sdr_format		sdr;     /* V4L2_BUF_TYPE_SDR_CAPTURE */
-+		struct v4l2_meta_format		meta;    /* V4L2_BUF_TYPE_META_CAPTURE */
- 		__u8	raw_data[200];                   /* user-defined */
- 	} fmt;
- };
diff --git a/patches.renesas/0207-usb-host-xhci-add-urb_enqueue-dequeue-giveback-trace.patch b/patches.renesas/0207-usb-host-xhci-add-urb_enqueue-dequeue-giveback-trace.patch
deleted file mode 100644
index 68ceb520382b17..00000000000000
--- a/patches.renesas/0207-usb-host-xhci-add-urb_enqueue-dequeue-giveback-trace.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From dc2a19b1b1626287d9fd4949a440b1b2f668bb73 Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:20 +0200
-Subject: [PATCH 207/255] usb: host: xhci: add urb_enqueue/dequeue/giveback
- tracers
-
-These three new tracers will help us tie TRBs into URBs by *also*
-looking into URB lifetime.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 5abdc2e6e12ff040a218dc807be4c4d9866b265f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c  |    1 
- drivers/usb/host/xhci-trace.h |   70 ++++++++++++++++++++++++++++++++++++++++++
- drivers/usb/host/xhci.c       |    5 +++
- 3 files changed, 76 insertions(+)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -642,6 +642,7 @@ static void xhci_giveback_urb_in_irq(str
- 	usb_hcd_unlink_urb_from_ep(hcd, urb);
- 	spin_unlock(&xhci->lock);
- 	usb_hcd_giveback_urb(hcd, urb, status);
-+	trace_xhci_urb_giveback(urb);
- 	spin_lock(&xhci->lock);
- }
- 
---- a/drivers/usb/host/xhci-trace.h
-+++ b/drivers/usb/host/xhci-trace.h
-@@ -158,6 +158,76 @@ DEFINE_EVENT(xhci_log_trb, xhci_queue_tr
- 	TP_ARGS(ring, trb)
- );
- 
-+DECLARE_EVENT_CLASS(xhci_log_urb,
-+	TP_PROTO(struct urb *urb),
-+	TP_ARGS(urb),
-+	TP_STRUCT__entry(
-+		__field(void *, urb)
-+		__field(unsigned int, pipe)
-+		__field(unsigned int, stream)
-+		__field(int, status)
-+		__field(unsigned int, flags)
-+		__field(int, num_mapped_sgs)
-+		__field(int, num_sgs)
-+		__field(int, length)
-+		__field(int, actual)
-+		__field(int, epnum)
-+		__field(int, dir_in)
-+		__field(int, type)
-+	),
-+	TP_fast_assign(
-+		__entry->urb = urb;
-+		__entry->pipe = urb->pipe;
-+		__entry->stream = urb->stream_id;
-+		__entry->status = urb->status;
-+		__entry->flags = urb->transfer_flags;
-+		__entry->num_mapped_sgs = urb->num_mapped_sgs;
-+		__entry->num_sgs = urb->num_sgs;
-+		__entry->length = urb->transfer_buffer_length;
-+		__entry->actual = urb->actual_length;
-+		__entry->epnum = usb_endpoint_num(&urb->ep->desc);
-+		__entry->dir_in = usb_endpoint_dir_in(&urb->ep->desc);
-+		__entry->type = usb_endpoint_type(&urb->ep->desc);
-+	),
-+	TP_printk("ep%d%s-%s: urb %p pipe %u length %d/%d sgs %d/%d stream %d flags %08x",
-+			__entry->epnum, __entry->dir_in ? "in" : "out",
-+			({ char *s;
-+			switch (__entry->type) {
-+			case USB_ENDPOINT_XFER_INT:
-+				s = "intr";
-+				break;
-+			case USB_ENDPOINT_XFER_CONTROL:
-+				s = "control";
-+				break;
-+			case USB_ENDPOINT_XFER_BULK:
-+				s = "bulk";
-+				break;
-+			case USB_ENDPOINT_XFER_ISOC:
-+				s = "isoc";
-+				break;
-+			default:
-+				s = "UNKNOWN";
-+			} s; }), __entry->urb, __entry->pipe, __entry->actual,
-+			__entry->length, __entry->num_mapped_sgs,
-+			__entry->num_sgs, __entry->stream, __entry->flags
-+		)
-+);
-+
-+DEFINE_EVENT(xhci_log_urb, xhci_urb_enqueue,
-+	TP_PROTO(struct urb *urb),
-+	TP_ARGS(urb)
-+);
-+
-+DEFINE_EVENT(xhci_log_urb, xhci_urb_giveback,
-+	TP_PROTO(struct urb *urb),
-+	TP_ARGS(urb)
-+);
-+
-+DEFINE_EVENT(xhci_log_urb, xhci_urb_dequeue,
-+	TP_PROTO(struct urb *urb),
-+	TP_ARGS(urb)
-+);
-+
- #endif /* __XHCI_TRACE_H */
- 
- /* this part must be outside header guard */
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -1428,6 +1428,8 @@ int xhci_urb_enqueue(struct usb_hcd *hcd
- 	urb_priv->td_cnt = 0;
- 	urb->hcpriv = urb_priv;
- 
-+	trace_xhci_urb_enqueue(urb);
-+
- 	if (usb_endpoint_xfer_control(&urb->ep->desc)) {
- 		/* Check to see if the max packet size for the default control
- 		 * endpoint changed during FS device enumeration
-@@ -1554,6 +1556,9 @@ int xhci_urb_dequeue(struct usb_hcd *hcd
- 
- 	xhci = hcd_to_xhci(hcd);
- 	spin_lock_irqsave(&xhci->lock, flags);
-+
-+	trace_xhci_urb_dequeue(urb);
-+
- 	/* Make sure the URB hasn't completed or been unlinked already */
- 	ret = usb_hcd_check_unlink_urb(hcd, urb, status);
- 	if (ret || !urb->hcpriv)
diff --git a/patches.renesas/0208-ARM-shmobile-select-errata-798181-for-SoCs-with-CA15.patch b/patches.renesas/0208-ARM-shmobile-select-errata-798181-for-SoCs-with-CA15.patch
deleted file mode 100644
index 9421e29c1f0930..00000000000000
--- a/patches.renesas/0208-ARM-shmobile-select-errata-798181-for-SoCs-with-CA15.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 047f555d215c880e0472aeef4c98c63062cb0696 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 27 Oct 2016 09:00:06 +0200
-Subject: [PATCH 208/299] ARM: shmobile: select errata 798181 for SoCs with
- CA15 cores
-
-Select ARM errata 798181 on SoCs cores affected CA15 cores.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-(cherry picked from commit 44c1a893820d3ce4806c5248ad0c0fa7ffcbe380)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig |    6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -61,6 +61,7 @@ config ARCH_R7S72100
- config ARCH_R8A73A4
- 	bool "R-Mobile APE6 (R8A73A40)"
- 	select ARCH_RMOBILE
-+	select ARM_ERRATA_798181 if SMP
- 	select RENESAS_IRQC
- 
- config ARCH_R8A7740
-@@ -71,6 +72,7 @@ config ARCH_R8A7740
- config ARCH_R8A7743
- 	bool "RZ/G1M (R8A77430)"
- 	select ARCH_RCAR_GEN2
-+	select ARM_ERRATA_798181 if SMP
- 
- config ARCH_R8A7778
- 	bool "R-Car M1A (R8A77781)"
-@@ -83,20 +85,24 @@ config ARCH_R8A7779
- config ARCH_R8A7790
- 	bool "R-Car H2 (R8A77900)"
- 	select ARCH_RCAR_GEN2
-+	select ARM_ERRATA_798181 if SMP
- 	select I2C
- 
- config ARCH_R8A7791
- 	bool "R-Car M2-W (R8A77910)"
- 	select ARCH_RCAR_GEN2
-+	select ARM_ERRATA_798181 if SMP
- 	select I2C
- 
- config ARCH_R8A7792
- 	bool "R-Car V2H (R8A77920)"
- 	select ARCH_RCAR_GEN2
-+	select ARM_ERRATA_798181 if SMP
- 
- config ARCH_R8A7793
- 	bool "R-Car M2-N (R8A7793)"
- 	select ARCH_RCAR_GEN2
-+	select ARM_ERRATA_798181 if SMP
- 	select I2C
- 
- config ARCH_R8A7794
diff --git a/patches.renesas/0208-media-v4l-vsp1-Add-histogram-support.patch b/patches.renesas/0208-media-v4l-vsp1-Add-histogram-support.patch
deleted file mode 100644
index a9cd9e4f6d5cfc..00000000000000
--- a/patches.renesas/0208-media-v4l-vsp1-Add-histogram-support.patch
+++ /dev/null
@@ -1,777 +0,0 @@
-From 3bb2173f582e52b15ed1529d1d08d723b39ca8b2 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 7 Sep 2016 08:58:49 -0300
-Subject: [PATCH 208/286] [media] v4l: vsp1: Add histogram support
-
-The histogram common code will be used to implement support for both the
-HGO and HGT histogram computation engines.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 99362e32332b5ce591a67a632073668754f28b0d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/Kconfig           |    1 
- drivers/media/platform/vsp1/Makefile     |    1 
- drivers/media/platform/vsp1/vsp1_histo.c |  646 +++++++++++++++++++++++++++++++
- drivers/media/platform/vsp1/vsp1_histo.h |   84 ++++
- 4 files changed, 732 insertions(+)
- create mode 100644 drivers/media/platform/vsp1/vsp1_histo.c
- create mode 100644 drivers/media/platform/vsp1/vsp1_histo.h
-
---- a/drivers/media/platform/Kconfig
-+++ b/drivers/media/platform/Kconfig
-@@ -334,6 +334,7 @@ config VIDEO_RENESAS_VSP1
- 	depends on (ARCH_RENESAS && OF) || COMPILE_TEST
- 	depends on (!ARM64 && !VIDEO_RENESAS_FCP) || VIDEO_RENESAS_FCP
- 	select VIDEOBUF2_DMA_CONTIG
-+	select VIDEOBUF2_VMALLOC
- 	---help---
- 	  This is a V4L2 driver for the Renesas VSP1 video processing engine.
- 
---- a/drivers/media/platform/vsp1/Makefile
-+++ b/drivers/media/platform/vsp1/Makefile
-@@ -3,6 +3,7 @@ vsp1-y					+= vsp1_dl.o vsp1_drm.o vsp1_
- vsp1-y					+= vsp1_rpf.o vsp1_rwpf.o vsp1_wpf.o
- vsp1-y					+= vsp1_clu.o vsp1_hsit.o vsp1_lut.o
- vsp1-y					+= vsp1_bru.o vsp1_sru.o vsp1_uds.o
-+vsp1-y					+= vsp1_histo.o
- vsp1-y					+= vsp1_lif.o
- 
- obj-$(CONFIG_VIDEO_RENESAS_VSP1)	+= vsp1.o
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_histo.c
-@@ -0,0 +1,646 @@
-+/*
-+ * vsp1_histo.c  --  R-Car VSP1 Histogram API
-+ *
-+ * Copyright (C) 2016 Renesas Electronics Corporation
-+ * Copyright (C) 2016 Laurent Pinchart
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/device.h>
-+#include <linux/gfp.h>
-+
-+#include <media/v4l2-ioctl.h>
-+#include <media/v4l2-subdev.h>
-+#include <media/videobuf2-vmalloc.h>
-+
-+#include "vsp1.h"
-+#include "vsp1_histo.h"
-+#include "vsp1_pipe.h"
-+
-+#define HISTO_MIN_SIZE				4U
-+#define HISTO_MAX_SIZE				8192U
-+
-+/* -----------------------------------------------------------------------------
-+ * Buffer Operations
-+ */
-+
-+static inline struct vsp1_histogram_buffer *
-+to_vsp1_histogram_buffer(struct vb2_v4l2_buffer *vbuf)
-+{
-+	return container_of(vbuf, struct vsp1_histogram_buffer, buf);
-+}
-+
-+struct vsp1_histogram_buffer *
-+vsp1_histogram_buffer_get(struct vsp1_histogram *histo)
-+{
-+	struct vsp1_histogram_buffer *buf = NULL;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&histo->irqlock, flags);
-+
-+	if (list_empty(&histo->irqqueue))
-+		goto done;
-+
-+	buf = list_first_entry(&histo->irqqueue, struct vsp1_histogram_buffer,
-+			       queue);
-+	list_del(&buf->queue);
-+	histo->readout = true;
-+
-+done:
-+	spin_unlock_irqrestore(&histo->irqlock, flags);
-+	return buf;
-+}
-+
-+void vsp1_histogram_buffer_complete(struct vsp1_histogram *histo,
-+				    struct vsp1_histogram_buffer *buf,
-+				    size_t size)
-+{
-+	struct vsp1_pipeline *pipe = histo->pipe;
-+	unsigned long flags;
-+
-+	/*
-+	 * The pipeline pointer is guaranteed to be valid as this function is
-+	 * called from the frame completion interrupt handler, which can only
-+	 * occur when video streaming is active.
-+	 */
-+	buf->buf.sequence = pipe->sequence;
-+	buf->buf.vb2_buf.timestamp = ktime_get_ns();
-+	vb2_set_plane_payload(&buf->buf.vb2_buf, 0, size);
-+	vb2_buffer_done(&buf->buf.vb2_buf, VB2_BUF_STATE_DONE);
-+
-+	spin_lock_irqsave(&histo->irqlock, flags);
-+	histo->readout = false;
-+	wake_up(&histo->wait_queue);
-+	spin_unlock_irqrestore(&histo->irqlock, flags);
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * videobuf2 Queue Operations
-+ */
-+
-+static int histo_queue_setup(struct vb2_queue *vq, unsigned int *nbuffers,
-+			     unsigned int *nplanes, unsigned int sizes[],
-+			     struct device *alloc_devs[])
-+{
-+	struct vsp1_histogram *histo = vb2_get_drv_priv(vq);
-+
-+	if (*nplanes) {
-+		if (*nplanes != 1)
-+			return -EINVAL;
-+
-+		if (sizes[0] < histo->data_size)
-+			return -EINVAL;
-+
-+		return 0;
-+	}
-+
-+	*nplanes = 1;
-+	sizes[0] = histo->data_size;
-+
-+	return 0;
-+}
-+
-+static int histo_buffer_prepare(struct vb2_buffer *vb)
-+{
-+	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
-+	struct vsp1_histogram *histo = vb2_get_drv_priv(vb->vb2_queue);
-+	struct vsp1_histogram_buffer *buf = to_vsp1_histogram_buffer(vbuf);
-+
-+	if (vb->num_planes != 1)
-+		return -EINVAL;
-+
-+	if (vb2_plane_size(vb, 0) < histo->data_size)
-+		return -EINVAL;
-+
-+	buf->addr = vb2_plane_vaddr(vb, 0);
-+
-+	return 0;
-+}
-+
-+static void histo_buffer_queue(struct vb2_buffer *vb)
-+{
-+	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
-+	struct vsp1_histogram *histo = vb2_get_drv_priv(vb->vb2_queue);
-+	struct vsp1_histogram_buffer *buf = to_vsp1_histogram_buffer(vbuf);
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&histo->irqlock, flags);
-+	list_add_tail(&buf->queue, &histo->irqqueue);
-+	spin_unlock_irqrestore(&histo->irqlock, flags);
-+}
-+
-+static int histo_start_streaming(struct vb2_queue *vq, unsigned int count)
-+{
-+	return 0;
-+}
-+
-+static void histo_stop_streaming(struct vb2_queue *vq)
-+{
-+	struct vsp1_histogram *histo = vb2_get_drv_priv(vq);
-+	struct vsp1_histogram_buffer *buffer;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&histo->irqlock, flags);
-+
-+	/* Remove all buffers from the IRQ queue. */
-+	list_for_each_entry(buffer, &histo->irqqueue, queue)
-+		vb2_buffer_done(&buffer->buf.vb2_buf, VB2_BUF_STATE_ERROR);
-+	INIT_LIST_HEAD(&histo->irqqueue);
-+
-+	/* Wait for the buffer being read out (if any) to complete. */
-+	wait_event_lock_irq(histo->wait_queue, !histo->readout, histo->irqlock);
-+
-+	spin_unlock_irqrestore(&histo->irqlock, flags);
-+}
-+
-+static const struct vb2_ops histo_video_queue_qops = {
-+	.queue_setup = histo_queue_setup,
-+	.buf_prepare = histo_buffer_prepare,
-+	.buf_queue = histo_buffer_queue,
-+	.wait_prepare = vb2_ops_wait_prepare,
-+	.wait_finish = vb2_ops_wait_finish,
-+	.start_streaming = histo_start_streaming,
-+	.stop_streaming = histo_stop_streaming,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 Subdevice Operations
-+ */
-+
-+static int histo_enum_mbus_code(struct v4l2_subdev *subdev,
-+				struct v4l2_subdev_pad_config *cfg,
-+				struct v4l2_subdev_mbus_code_enum *code)
-+{
-+	struct vsp1_histogram *histo = subdev_to_histo(subdev);
-+
-+	if (code->pad == HISTO_PAD_SOURCE) {
-+		code->code = MEDIA_BUS_FMT_FIXED;
-+		return 0;
-+	}
-+
-+	return vsp1_subdev_enum_mbus_code(subdev, cfg, code, histo->formats,
-+					  histo->num_formats);
-+}
-+
-+static int histo_enum_frame_size(struct v4l2_subdev *subdev,
-+				 struct v4l2_subdev_pad_config *cfg,
-+				 struct v4l2_subdev_frame_size_enum *fse)
-+{
-+	if (fse->pad != HISTO_PAD_SINK)
-+		return -EINVAL;
-+
-+	return vsp1_subdev_enum_frame_size(subdev, cfg, fse, HISTO_MIN_SIZE,
-+					   HISTO_MIN_SIZE, HISTO_MAX_SIZE,
-+					   HISTO_MAX_SIZE);
-+}
-+
-+static int histo_get_selection(struct v4l2_subdev *subdev,
-+			       struct v4l2_subdev_pad_config *cfg,
-+			       struct v4l2_subdev_selection *sel)
-+{
-+	struct vsp1_histogram *histo = subdev_to_histo(subdev);
-+	struct v4l2_subdev_pad_config *config;
-+	struct v4l2_mbus_framefmt *format;
-+	struct v4l2_rect *crop;
-+	int ret = 0;
-+
-+	if (sel->pad != HISTO_PAD_SINK)
-+		return -EINVAL;
-+
-+	mutex_lock(&histo->entity.lock);
-+
-+	config = vsp1_entity_get_pad_config(&histo->entity, cfg, sel->which);
-+	if (!config) {
-+		ret = -EINVAL;
-+		goto done;
-+	}
-+
-+	switch (sel->target) {
-+	case V4L2_SEL_TGT_COMPOSE_BOUNDS:
-+	case V4L2_SEL_TGT_COMPOSE_DEFAULT:
-+		crop = vsp1_entity_get_pad_selection(&histo->entity, config,
-+						     HISTO_PAD_SINK,
-+						     V4L2_SEL_TGT_CROP);
-+		sel->r.left = 0;
-+		sel->r.top = 0;
-+		sel->r.width = crop->width;
-+		sel->r.height = crop->height;
-+		break;
-+
-+	case V4L2_SEL_TGT_CROP_BOUNDS:
-+	case V4L2_SEL_TGT_CROP_DEFAULT:
-+		format = vsp1_entity_get_pad_format(&histo->entity, config,
-+						    HISTO_PAD_SINK);
-+		sel->r.left = 0;
-+		sel->r.top = 0;
-+		sel->r.width = format->width;
-+		sel->r.height = format->height;
-+		break;
-+
-+	case V4L2_SEL_TGT_COMPOSE:
-+	case V4L2_SEL_TGT_CROP:
-+		sel->r = *vsp1_entity_get_pad_selection(&histo->entity, config,
-+							sel->pad, sel->target);
-+		break;
-+
-+	default:
-+		ret = -EINVAL;
-+		break;
-+	}
-+
-+done:
-+	mutex_unlock(&histo->entity.lock);
-+	return ret;
-+}
-+
-+static int histo_set_crop(struct v4l2_subdev *subdev,
-+			  struct v4l2_subdev_pad_config *config,
-+			 struct v4l2_subdev_selection *sel)
-+{
-+	struct vsp1_histogram *histo = subdev_to_histo(subdev);
-+	struct v4l2_mbus_framefmt *format;
-+	struct v4l2_rect *selection;
-+
-+	/* The crop rectangle must be inside the input frame. */
-+	format = vsp1_entity_get_pad_format(&histo->entity, config,
-+					    HISTO_PAD_SINK);
-+	sel->r.left = clamp_t(unsigned int, sel->r.left, 0, format->width - 1);
-+	sel->r.top = clamp_t(unsigned int, sel->r.top, 0, format->height - 1);
-+	sel->r.width = clamp_t(unsigned int, sel->r.width, HISTO_MIN_SIZE,
-+			       format->width - sel->r.left);
-+	sel->r.height = clamp_t(unsigned int, sel->r.height, HISTO_MIN_SIZE,
-+				format->height - sel->r.top);
-+
-+	/* Set the crop rectangle and reset the compose rectangle. */
-+	selection = vsp1_entity_get_pad_selection(&histo->entity, config,
-+						  sel->pad, V4L2_SEL_TGT_CROP);
-+	*selection = sel->r;
-+
-+	selection = vsp1_entity_get_pad_selection(&histo->entity, config,
-+						  sel->pad,
-+						  V4L2_SEL_TGT_COMPOSE);
-+	*selection = sel->r;
-+
-+	return 0;
-+}
-+
-+static int histo_set_compose(struct v4l2_subdev *subdev,
-+			     struct v4l2_subdev_pad_config *config,
-+			     struct v4l2_subdev_selection *sel)
-+{
-+	struct vsp1_histogram *histo = subdev_to_histo(subdev);
-+	struct v4l2_rect *compose;
-+	struct v4l2_rect *crop;
-+	unsigned int ratio;
-+
-+	/*
-+	 * The compose rectangle is used to configure downscaling, the top left
-+	 * corner is fixed to (0,0) and the size to 1/2 or 1/4 of the crop
-+	 * rectangle.
-+	 */
-+	sel->r.left = 0;
-+	sel->r.top = 0;
-+
-+	crop = vsp1_entity_get_pad_selection(&histo->entity, config, sel->pad,
-+					     V4L2_SEL_TGT_CROP);
-+
-+	/*
-+	 * Clamp the width and height to acceptable values first and then
-+	 * compute the closest rounded dividing ratio.
-+	 *
-+	 * Ratio	Rounded ratio
-+	 * --------------------------
-+	 * [1.0 1.5[	1
-+	 * [1.5 3.0[	2
-+	 * [3.0 4.0]	4
-+	 *
-+	 * The rounded ratio can be computed using
-+	 *
-+	 * 1 << (ceil(ratio * 2) / 3)
-+	 */
-+	sel->r.width = clamp(sel->r.width, crop->width / 4, crop->width);
-+	ratio = 1 << (crop->width * 2 / sel->r.width / 3);
-+	sel->r.width = crop->width / ratio;
-+
-+
-+	sel->r.height = clamp(sel->r.height, crop->height / 4, crop->height);
-+	ratio = 1 << (crop->height * 2 / sel->r.height / 3);
-+	sel->r.height = crop->height / ratio;
-+
-+	compose = vsp1_entity_get_pad_selection(&histo->entity, config,
-+						sel->pad,
-+						V4L2_SEL_TGT_COMPOSE);
-+	*compose = sel->r;
-+
-+	return 0;
-+}
-+
-+static int histo_set_selection(struct v4l2_subdev *subdev,
-+			       struct v4l2_subdev_pad_config *cfg,
-+			       struct v4l2_subdev_selection *sel)
-+{
-+	struct vsp1_histogram *histo = subdev_to_histo(subdev);
-+	struct v4l2_subdev_pad_config *config;
-+	int ret;
-+
-+	if (sel->pad != HISTO_PAD_SINK)
-+		return -EINVAL;
-+
-+	mutex_lock(&histo->entity.lock);
-+
-+	config = vsp1_entity_get_pad_config(&histo->entity, cfg, sel->which);
-+	if (!config) {
-+		ret = -EINVAL;
-+		goto done;
-+	}
-+
-+	if (sel->target == V4L2_SEL_TGT_CROP)
-+		ret = histo_set_crop(subdev, config, sel);
-+	else if (sel->target == V4L2_SEL_TGT_COMPOSE)
-+		ret = histo_set_compose(subdev, config, sel);
-+	else
-+		ret = -EINVAL;
-+
-+done:
-+	mutex_unlock(&histo->entity.lock);
-+	return ret;
-+}
-+
-+static int histo_get_format(struct v4l2_subdev *subdev,
-+			    struct v4l2_subdev_pad_config *cfg,
-+			    struct v4l2_subdev_format *fmt)
-+{
-+	if (fmt->pad == HISTO_PAD_SOURCE) {
-+		fmt->format.code = MEDIA_BUS_FMT_FIXED;
-+		fmt->format.width = 0;
-+		fmt->format.height = 0;
-+		fmt->format.field = V4L2_FIELD_NONE;
-+		fmt->format.colorspace = V4L2_COLORSPACE_RAW;
-+		return 0;
-+	}
-+
-+	return vsp1_subdev_get_pad_format(subdev, cfg, fmt);
-+}
-+
-+static int histo_set_format(struct v4l2_subdev *subdev,
-+			    struct v4l2_subdev_pad_config *cfg,
-+			    struct v4l2_subdev_format *fmt)
-+{
-+	struct vsp1_histogram *histo = subdev_to_histo(subdev);
-+	struct v4l2_subdev_pad_config *config;
-+	struct v4l2_mbus_framefmt *format;
-+	struct v4l2_rect *selection;
-+	unsigned int i;
-+	int ret = 0;
-+
-+	if (fmt->pad != HISTO_PAD_SINK)
-+		return histo_get_format(subdev, cfg, fmt);
-+
-+	mutex_lock(&histo->entity.lock);
-+
-+	config = vsp1_entity_get_pad_config(&histo->entity, cfg, fmt->which);
-+	if (!config) {
-+		ret = -EINVAL;
-+		goto done;
-+	}
-+
-+	/*
-+	 * Default to the first format if the requested format is not
-+	 * supported.
-+	 */
-+	for (i = 0; i < histo->num_formats; ++i) {
-+		if (fmt->format.code == histo->formats[i])
-+			break;
-+	}
-+	if (i == histo->num_formats)
-+		fmt->format.code = histo->formats[0];
-+
-+	format = vsp1_entity_get_pad_format(&histo->entity, config, fmt->pad);
-+
-+	format->code = fmt->format.code;
-+	format->width = clamp_t(unsigned int, fmt->format.width,
-+				HISTO_MIN_SIZE, HISTO_MAX_SIZE);
-+	format->height = clamp_t(unsigned int, fmt->format.height,
-+				 HISTO_MIN_SIZE, HISTO_MAX_SIZE);
-+	format->field = V4L2_FIELD_NONE;
-+	format->colorspace = V4L2_COLORSPACE_SRGB;
-+
-+	fmt->format = *format;
-+
-+	/* Reset the crop and compose rectangles */
-+	selection = vsp1_entity_get_pad_selection(&histo->entity, config,
-+						  fmt->pad, V4L2_SEL_TGT_CROP);
-+	selection->left = 0;
-+	selection->top = 0;
-+	selection->width = format->width;
-+	selection->height = format->height;
-+
-+	selection = vsp1_entity_get_pad_selection(&histo->entity, config,
-+						  fmt->pad,
-+						  V4L2_SEL_TGT_COMPOSE);
-+	selection->left = 0;
-+	selection->top = 0;
-+	selection->width = format->width;
-+	selection->height = format->height;
-+
-+done:
-+	mutex_unlock(&histo->entity.lock);
-+	return ret;
-+}
-+
-+static const struct v4l2_subdev_pad_ops histo_pad_ops = {
-+	.enum_mbus_code = histo_enum_mbus_code,
-+	.enum_frame_size = histo_enum_frame_size,
-+	.get_fmt = histo_get_format,
-+	.set_fmt = histo_set_format,
-+	.get_selection = histo_get_selection,
-+	.set_selection = histo_set_selection,
-+};
-+
-+static const struct v4l2_subdev_ops histo_ops = {
-+	.pad    = &histo_pad_ops,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 ioctls
-+ */
-+
-+static int histo_v4l2_querycap(struct file *file, void *fh,
-+			       struct v4l2_capability *cap)
-+{
-+	struct v4l2_fh *vfh = file->private_data;
-+	struct vsp1_histogram *histo = vdev_to_histo(vfh->vdev);
-+
-+	cap->capabilities = V4L2_CAP_DEVICE_CAPS | V4L2_CAP_STREAMING
-+			  | V4L2_CAP_VIDEO_CAPTURE_MPLANE
-+			  | V4L2_CAP_VIDEO_OUTPUT_MPLANE
-+			  | V4L2_CAP_META_CAPTURE;
-+	cap->device_caps = V4L2_CAP_META_CAPTURE
-+			 | V4L2_CAP_STREAMING;
-+
-+	strlcpy(cap->driver, "vsp1", sizeof(cap->driver));
-+	strlcpy(cap->card, histo->video.name, sizeof(cap->card));
-+	snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
-+		 dev_name(histo->entity.vsp1->dev));
-+
-+	return 0;
-+}
-+
-+static int histo_v4l2_enum_format(struct file *file, void *fh,
-+				  struct v4l2_fmtdesc *f)
-+{
-+	struct v4l2_fh *vfh = file->private_data;
-+	struct vsp1_histogram *histo = vdev_to_histo(vfh->vdev);
-+
-+	if (f->index > 0 || f->type != histo->queue.type)
-+		return -EINVAL;
-+
-+	f->pixelformat = histo->meta_format;
-+
-+	return 0;
-+}
-+
-+static int histo_v4l2_get_format(struct file *file, void *fh,
-+				 struct v4l2_format *format)
-+{
-+	struct v4l2_fh *vfh = file->private_data;
-+	struct vsp1_histogram *histo = vdev_to_histo(vfh->vdev);
-+	struct v4l2_meta_format *meta = &format->fmt.meta;
-+
-+	if (format->type != histo->queue.type)
-+		return -EINVAL;
-+
-+	memset(meta, 0, sizeof(*meta));
-+
-+	meta->dataformat = histo->meta_format;
-+	meta->buffersize = histo->data_size;
-+
-+	return 0;
-+}
-+
-+static const struct v4l2_ioctl_ops histo_v4l2_ioctl_ops = {
-+	.vidioc_querycap		= histo_v4l2_querycap,
-+	.vidioc_enum_fmt_meta_cap	= histo_v4l2_enum_format,
-+	.vidioc_g_fmt_meta_cap		= histo_v4l2_get_format,
-+	.vidioc_s_fmt_meta_cap		= histo_v4l2_get_format,
-+	.vidioc_try_fmt_meta_cap	= histo_v4l2_get_format,
-+	.vidioc_reqbufs			= vb2_ioctl_reqbufs,
-+	.vidioc_querybuf		= vb2_ioctl_querybuf,
-+	.vidioc_qbuf			= vb2_ioctl_qbuf,
-+	.vidioc_dqbuf			= vb2_ioctl_dqbuf,
-+	.vidioc_create_bufs		= vb2_ioctl_create_bufs,
-+	.vidioc_prepare_buf		= vb2_ioctl_prepare_buf,
-+	.vidioc_streamon		= vb2_ioctl_streamon,
-+	.vidioc_streamoff		= vb2_ioctl_streamoff,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 File Operations
-+ */
-+
-+static const struct v4l2_file_operations histo_v4l2_fops = {
-+	.owner = THIS_MODULE,
-+	.unlocked_ioctl = video_ioctl2,
-+	.open = v4l2_fh_open,
-+	.release = vb2_fop_release,
-+	.poll = vb2_fop_poll,
-+	.mmap = vb2_fop_mmap,
-+};
-+
-+static void vsp1_histogram_cleanup(struct vsp1_histogram *histo)
-+{
-+	if (video_is_registered(&histo->video))
-+		video_unregister_device(&histo->video);
-+
-+	media_entity_cleanup(&histo->video.entity);
-+}
-+
-+void vsp1_histogram_destroy(struct vsp1_entity *entity)
-+{
-+	struct vsp1_histogram *histo = subdev_to_histo(&entity->subdev);
-+
-+	vsp1_histogram_cleanup(histo);
-+}
-+
-+int vsp1_histogram_init(struct vsp1_device *vsp1, struct vsp1_histogram *histo,
-+			enum vsp1_entity_type type, const char *name,
-+			const struct vsp1_entity_operations *ops,
-+			const unsigned int *formats, unsigned int num_formats,
-+			size_t data_size, u32 meta_format)
-+{
-+	int ret;
-+
-+	histo->formats = formats;
-+	histo->num_formats = num_formats;
-+	histo->data_size = data_size;
-+	histo->meta_format = meta_format;
-+
-+	histo->pad.flags = MEDIA_PAD_FL_SINK;
-+	histo->video.vfl_dir = VFL_DIR_RX;
-+
-+	mutex_init(&histo->lock);
-+	spin_lock_init(&histo->irqlock);
-+	INIT_LIST_HEAD(&histo->irqqueue);
-+	init_waitqueue_head(&histo->wait_queue);
-+
-+	/* Initialize the VSP entity... */
-+	histo->entity.ops = ops;
-+	histo->entity.type = type;
-+
-+	ret = vsp1_entity_init(vsp1, &histo->entity, name, 2, &histo_ops,
-+			       MEDIA_ENT_F_PROC_VIDEO_STATISTICS);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* ... and the media entity... */
-+	ret = media_entity_pads_init(&histo->video.entity, 1, &histo->pad);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* ... and the video node... */
-+	histo->video.v4l2_dev = &vsp1->v4l2_dev;
-+	histo->video.fops = &histo_v4l2_fops;
-+	snprintf(histo->video.name, sizeof(histo->video.name),
-+		 "%s histo", histo->entity.subdev.name);
-+	histo->video.vfl_type = VFL_TYPE_GRABBER;
-+	histo->video.release = video_device_release_empty;
-+	histo->video.ioctl_ops = &histo_v4l2_ioctl_ops;
-+
-+	video_set_drvdata(&histo->video, histo);
-+
-+	/* ... and the buffers queue... */
-+	histo->queue.type = V4L2_BUF_TYPE_META_CAPTURE;
-+	histo->queue.io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
-+	histo->queue.lock = &histo->lock;
-+	histo->queue.drv_priv = histo;
-+	histo->queue.buf_struct_size = sizeof(struct vsp1_histogram_buffer);
-+	histo->queue.ops = &histo_video_queue_qops;
-+	histo->queue.mem_ops = &vb2_vmalloc_memops;
-+	histo->queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
-+	histo->queue.dev = vsp1->dev;
-+	ret = vb2_queue_init(&histo->queue);
-+	if (ret < 0) {
-+		dev_err(vsp1->dev, "failed to initialize vb2 queue\n");
-+		goto error;
-+	}
-+
-+	/* ... and register the video device. */
-+	histo->video.queue = &histo->queue;
-+	ret = video_register_device(&histo->video, VFL_TYPE_GRABBER, -1);
-+	if (ret < 0) {
-+		dev_err(vsp1->dev, "failed to register video device\n");
-+		goto error;
-+	}
-+
-+	return 0;
-+
-+error:
-+	vsp1_histogram_cleanup(histo);
-+	return ret;
-+}
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_histo.h
-@@ -0,0 +1,84 @@
-+/*
-+ * vsp1_histo.h  --  R-Car VSP1 Histogram API
-+ *
-+ * Copyright (C) 2016 Renesas Electronics Corporation
-+ * Copyright (C) 2016 Laurent Pinchart
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+#ifndef __VSP1_HISTO_H__
-+#define __VSP1_HISTO_H__
-+
-+#include <linux/list.h>
-+#include <linux/mutex.h>
-+#include <linux/spinlock.h>
-+
-+#include <media/media-entity.h>
-+#include <media/v4l2-dev.h>
-+#include <media/videobuf2-v4l2.h>
-+
-+#include "vsp1_entity.h"
-+
-+struct vsp1_device;
-+struct vsp1_pipeline;
-+
-+#define HISTO_PAD_SINK				0
-+#define HISTO_PAD_SOURCE			1
-+
-+struct vsp1_histogram_buffer {
-+	struct vb2_v4l2_buffer buf;
-+	struct list_head queue;
-+	void *addr;
-+};
-+
-+struct vsp1_histogram {
-+	struct vsp1_pipeline *pipe;
-+
-+	struct vsp1_entity entity;
-+	struct video_device video;
-+	struct media_pad pad;
-+
-+	const u32 *formats;
-+	unsigned int num_formats;
-+	size_t data_size;
-+	u32 meta_format;
-+
-+	struct mutex lock;
-+	struct vb2_queue queue;
-+
-+	spinlock_t irqlock;
-+	struct list_head irqqueue;
-+
-+	wait_queue_head_t wait_queue;
-+	bool readout;
-+};
-+
-+static inline struct vsp1_histogram *vdev_to_histo(struct video_device *vdev)
-+{
-+	return container_of(vdev, struct vsp1_histogram, video);
-+}
-+
-+static inline struct vsp1_histogram *subdev_to_histo(struct v4l2_subdev *subdev)
-+{
-+	return container_of(subdev, struct vsp1_histogram, entity.subdev);
-+}
-+
-+int vsp1_histogram_init(struct vsp1_device *vsp1, struct vsp1_histogram *histo,
-+			enum vsp1_entity_type type, const char *name,
-+			const struct vsp1_entity_operations *ops,
-+			const unsigned int *formats, unsigned int num_formats,
-+			size_t data_size, u32 meta_format);
-+void vsp1_histogram_destroy(struct vsp1_entity *entity);
-+
-+struct vsp1_histogram_buffer *
-+vsp1_histogram_buffer_get(struct vsp1_histogram *histo);
-+void vsp1_histogram_buffer_complete(struct vsp1_histogram *histo,
-+				    struct vsp1_histogram_buffer *buf,
-+				    size_t size);
-+
-+#endif /* __VSP1_HISTO_H__ */
diff --git a/patches.renesas/0208-usb-host-xhci-convert-several-if-to-a-single-switch-.patch b/patches.renesas/0208-usb-host-xhci-convert-several-if-to-a-single-switch-.patch
deleted file mode 100644
index 7a4ea89259c878..00000000000000
--- a/patches.renesas/0208-usb-host-xhci-convert-several-if-to-a-single-switch-.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From e579a27a32a7da75d8ea58d8e2919cfa724200f6 Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:21 +0200
-Subject: [PATCH 208/255] usb: host: xhci: convert several if() to a single
- switch statement
-
-when getting endpoint type, a switch statement looks
-better than a series of if () branches. There are no
-functional changes with this patch, cleanup only.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit c0e625c41abbcc12c4981823889e3dc126252fb5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-mem.c |   10 ++++++----
- 1 file changed, 6 insertions(+), 4 deletions(-)
-
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -1431,14 +1431,16 @@ static u32 xhci_get_endpoint_type(struct
- 
- 	in = usb_endpoint_dir_in(&ep->desc);
- 
--	if (usb_endpoint_xfer_control(&ep->desc))
-+	switch (usb_endpoint_type(&ep->desc)) {
-+	case USB_ENDPOINT_XFER_CONTROL:
- 		return CTRL_EP;
--	if (usb_endpoint_xfer_bulk(&ep->desc))
-+	case USB_ENDPOINT_XFER_BULK:
- 		return in ? BULK_IN_EP : BULK_OUT_EP;
--	if (usb_endpoint_xfer_isoc(&ep->desc))
-+	case USB_ENDPOINT_XFER_ISOC:
- 		return in ? ISOC_IN_EP : ISOC_OUT_EP;
--	if (usb_endpoint_xfer_int(&ep->desc))
-+	case USB_ENDPOINT_XFER_INT:
- 		return in ? INT_IN_EP : INT_OUT_EP;
-+	}
- 	return 0;
- }
- 
diff --git a/patches.renesas/0209-ARM-shmobile-r8a7779-marzen-Add-board-part-number-to.patch b/patches.renesas/0209-ARM-shmobile-r8a7779-marzen-Add-board-part-number-to.patch
deleted file mode 100644
index 4e82d5fe68d9b1..00000000000000
--- a/patches.renesas/0209-ARM-shmobile-r8a7779-marzen-Add-board-part-number-to.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 8a924e7606e13f7ce4aa6d19bd75b171dc4f3a77 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 31 Oct 2016 14:43:04 +0100
-Subject: [PATCH 209/299] ARM: shmobile: r8a7779/marzen: Add board part number
- to DT bindings
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9652623f8f019edc93a7a934a10b7d0b90421d5a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	Documentation/devicetree/bindings/arm/shmobile.txt
----
- Documentation/devicetree/bindings/arm/shmobile.txt |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/Documentation/devicetree/bindings/arm/shmobile.txt
-+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
-@@ -65,7 +65,7 @@ Boards:
-     compatible = "renesas,lager", "renesas,r8a7790"
-   - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKB00010S)
-     compatible = "renesas,m3ulcb", "renesas,r8a7796";
--  - Marzen
-+  - Marzen (R0P7779A00010S)
-     compatible = "renesas,marzen", "renesas,r8a7779"
-   - Porter (M2-LCDP)
-     compatible = "renesas,porter", "renesas,r8a7791"
diff --git a/patches.renesas/0209-media-v4l-vsp1-Support-histogram-generators-in-pipel.patch b/patches.renesas/0209-media-v4l-vsp1-Support-histogram-generators-in-pipel.patch
deleted file mode 100644
index b705c12084648a..00000000000000
--- a/patches.renesas/0209-media-v4l-vsp1-Support-histogram-generators-in-pipel.patch
+++ /dev/null
@@ -1,326 +0,0 @@
-From d501b911bf10e28e5227dda7eb071f0799465eb7 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 7 Sep 2016 09:09:53 -0300
-Subject: [PATCH 209/286] [media] v4l: vsp1: Support histogram generators in
- pipeline configuration
-
-Histogram generators are single-pad entities that branch as leaf nodes
-at any point in the pipeline. Make sure that pipeline traversal and
-routing configuration support them correctly.
-
-Support for the actual HGO and HGT operation will come later.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit c8663c8e15c95a351296d9d284b0cad5d373234c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_drm.c    |    2 
- drivers/media/platform/vsp1/vsp1_drv.c    |    4 
- drivers/media/platform/vsp1/vsp1_entity.c |  124 ++++++++++++++++++++++++++----
- drivers/media/platform/vsp1/vsp1_entity.h |    8 +
- drivers/media/platform/vsp1/vsp1_pipe.c   |    6 -
- drivers/media/platform/vsp1/vsp1_video.c  |   18 ++--
- 6 files changed, 134 insertions(+), 28 deletions(-)
-
---- a/drivers/media/platform/vsp1/vsp1_drm.c
-+++ b/drivers/media/platform/vsp1/vsp1_drm.c
-@@ -496,7 +496,7 @@ void vsp1_du_atomic_flush(struct device
- 			}
- 		}
- 
--		vsp1_entity_route_setup(entity, dl);
-+		vsp1_entity_route_setup(entity, pipe, dl);
- 
- 		if (entity->ops->configure) {
- 			entity->ops->configure(entity, pipe, dl,
---- a/drivers/media/platform/vsp1/vsp1_drv.c
-+++ b/drivers/media/platform/vsp1/vsp1_drv.c
-@@ -105,7 +105,9 @@ static int vsp1_create_sink_links(struct
- 		if (source->type == sink->type)
- 			continue;
- 
--		if (source->type == VSP1_ENTITY_LIF ||
-+		if (source->type == VSP1_ENTITY_HGO ||
-+		    source->type == VSP1_ENTITY_HGT ||
-+		    source->type == VSP1_ENTITY_LIF ||
- 		    source->type == VSP1_ENTITY_WPF)
- 			continue;
- 
---- a/drivers/media/platform/vsp1/vsp1_entity.c
-+++ b/drivers/media/platform/vsp1/vsp1_entity.c
-@@ -21,6 +21,8 @@
- #include "vsp1.h"
- #include "vsp1_dl.h"
- #include "vsp1_entity.h"
-+#include "vsp1_pipe.h"
-+#include "vsp1_rwpf.h"
- 
- static inline struct vsp1_entity *
- media_entity_to_vsp1_entity(struct media_entity *entity)
-@@ -28,11 +30,14 @@ media_entity_to_vsp1_entity(struct media
- 	return container_of(entity, struct vsp1_entity, subdev.entity);
- }
- 
--void vsp1_entity_route_setup(struct vsp1_entity *source,
-+void vsp1_entity_route_setup(struct vsp1_entity *entity,
-+			     struct vsp1_pipeline *pipe,
- 			     struct vsp1_dl_list *dl)
- {
-+	struct vsp1_entity *source;
- 	struct vsp1_entity *sink;
- 
-+	source = entity;
- 	if (source->route->reg == 0)
- 		return;
- 
-@@ -283,25 +288,32 @@ done:
-  * Media Operations
-  */
- 
--int vsp1_entity_link_setup(struct media_entity *entity,
--			   const struct media_pad *local,
--			   const struct media_pad *remote, u32 flags)
-+static int vsp1_entity_link_setup_source(const struct media_pad *source_pad,
-+					 const struct media_pad *sink_pad,
-+					 u32 flags)
- {
- 	struct vsp1_entity *source;
- 
--	if (!(local->flags & MEDIA_PAD_FL_SOURCE))
--		return 0;
--
--	source = media_entity_to_vsp1_entity(local->entity);
-+	source = media_entity_to_vsp1_entity(source_pad->entity);
- 
- 	if (!source->route)
- 		return 0;
- 
- 	if (flags & MEDIA_LNK_FL_ENABLED) {
--		if (source->sink)
--			return -EBUSY;
--		source->sink = remote->entity;
--		source->sink_pad = remote->index;
-+		struct vsp1_entity *sink
-+			= media_entity_to_vsp1_entity(sink_pad->entity);
-+
-+		/*
-+		 * Fan-out is limited to one for the normal data path plus
-+		 * optional HGO and HGT. We ignore the HGO and HGT here.
-+		 */
-+		if (sink->type != VSP1_ENTITY_HGO &&
-+		    sink->type != VSP1_ENTITY_HGT) {
-+			if (source->sink)
-+				return -EBUSY;
-+			source->sink = sink_pad->entity;
-+			source->sink_pad = sink_pad->index;
-+		}
- 	} else {
- 		source->sink = NULL;
- 		source->sink_pad = 0;
-@@ -310,6 +322,85 @@ int vsp1_entity_link_setup(struct media_
- 	return 0;
- }
- 
-+static int vsp1_entity_link_setup_sink(const struct media_pad *source_pad,
-+				       const struct media_pad *sink_pad,
-+				       u32 flags)
-+{
-+	struct vsp1_entity *sink;
-+
-+	sink = media_entity_to_vsp1_entity(sink_pad->entity);
-+
-+	if (flags & MEDIA_LNK_FL_ENABLED) {
-+		/* Fan-in is limited to one. */
-+		if (sink->sources[sink_pad->index])
-+			return -EBUSY;
-+
-+		sink->sources[sink_pad->index] = source_pad->entity;
-+	} else {
-+		sink->sources[sink_pad->index] = NULL;
-+	}
-+
-+	return 0;
-+}
-+
-+int vsp1_entity_link_setup(struct media_entity *entity,
-+			   const struct media_pad *local,
-+			   const struct media_pad *remote, u32 flags)
-+{
-+	if (local->flags & MEDIA_PAD_FL_SOURCE)
-+		return vsp1_entity_link_setup_source(local, remote, flags);
-+	else
-+		return vsp1_entity_link_setup_sink(remote, local, flags);
-+}
-+
-+/**
-+ * vsp1_entity_remote_pad - Find the pad at the remote end of a link
-+ * @pad: Pad at the local end of the link
-+ *
-+ * Search for a remote pad connected to the given pad by iterating over all
-+ * links originating or terminating at that pad until an enabled link is found.
-+ *
-+ * Our link setup implementation guarantees that the output fan-out will not be
-+ * higher than one for the data pipelines, except for the links to the HGO and
-+ * HGT that can be enabled in addition to a regular data link. When traversing
-+ * outgoing links this function ignores HGO and HGT entities and should thus be
-+ * used in place of the generic media_entity_remote_pad() function to traverse
-+ * data pipelines.
-+ *
-+ * Return a pointer to the pad at the remote end of the first found enabled
-+ * link, or NULL if no enabled link has been found.
-+ */
-+struct media_pad *vsp1_entity_remote_pad(struct media_pad *pad)
-+{
-+	struct media_link *link;
-+
-+	list_for_each_entry(link, &pad->entity->links, list) {
-+		struct vsp1_entity *entity;
-+
-+		if (!(link->flags & MEDIA_LNK_FL_ENABLED))
-+			continue;
-+
-+		/* If we're the sink the source will never be an HGO or HGT. */
-+		if (link->sink == pad)
-+			return link->source;
-+
-+		if (link->source != pad)
-+			continue;
-+
-+		/* If the sink isn't a subdevice it can't be an HGO or HGT. */
-+		if (!is_media_entity_v4l2_subdev(link->sink->entity))
-+			return link->sink;
-+
-+		entity = media_entity_to_vsp1_entity(link->sink->entity);
-+		if (entity->type != VSP1_ENTITY_HGO &&
-+		    entity->type != VSP1_ENTITY_HGT)
-+			return link->sink;
-+	}
-+
-+	return NULL;
-+
-+}
-+
- /* -----------------------------------------------------------------------------
-  * Initialization
-  */
-@@ -388,7 +479,14 @@ int vsp1_entity_init(struct vsp1_device
- 	for (i = 0; i < num_pads - 1; ++i)
- 		entity->pads[i].flags = MEDIA_PAD_FL_SINK;
- 
--	entity->pads[num_pads - 1].flags = MEDIA_PAD_FL_SOURCE;
-+	entity->sources = devm_kcalloc(vsp1->dev, max(num_pads - 1, 1U),
-+				       sizeof(*entity->sources), GFP_KERNEL);
-+	if (entity->sources == NULL)
-+		return -ENOMEM;
-+
-+	/* Single-pad entities only have a sink. */
-+	entity->pads[num_pads - 1].flags = num_pads > 1 ? MEDIA_PAD_FL_SOURCE
-+					 : MEDIA_PAD_FL_SINK;
- 
- 	/* Initialize the media entity. */
- 	ret = media_entity_pads_init(&entity->subdev.entity, num_pads,
---- a/drivers/media/platform/vsp1/vsp1_entity.h
-+++ b/drivers/media/platform/vsp1/vsp1_entity.h
-@@ -25,6 +25,8 @@ struct vsp1_pipeline;
- enum vsp1_entity_type {
- 	VSP1_ENTITY_BRU,
- 	VSP1_ENTITY_CLU,
-+	VSP1_ENTITY_HGO,
-+	VSP1_ENTITY_HGT,
- 	VSP1_ENTITY_HSI,
- 	VSP1_ENTITY_HST,
- 	VSP1_ENTITY_LIF,
-@@ -102,6 +104,7 @@ struct vsp1_entity {
- 	struct media_pad *pads;
- 	unsigned int source_pad;
- 
-+	struct media_entity **sources;
- 	struct media_entity *sink;
- 	unsigned int sink_pad;
- 
-@@ -142,9 +145,12 @@ vsp1_entity_get_pad_selection(struct vsp
- int vsp1_entity_init_cfg(struct v4l2_subdev *subdev,
- 			 struct v4l2_subdev_pad_config *cfg);
- 
--void vsp1_entity_route_setup(struct vsp1_entity *source,
-+void vsp1_entity_route_setup(struct vsp1_entity *entity,
-+			     struct vsp1_pipeline *pipe,
- 			     struct vsp1_dl_list *dl);
- 
-+struct media_pad *vsp1_entity_remote_pad(struct media_pad *pad);
-+
- int vsp1_subdev_get_pad_format(struct v4l2_subdev *subdev,
- 			       struct v4l2_subdev_pad_config *cfg,
- 			       struct v4l2_subdev_format *fmt);
---- a/drivers/media/platform/vsp1/vsp1_pipe.c
-+++ b/drivers/media/platform/vsp1/vsp1_pipe.c
-@@ -252,6 +252,7 @@ bool vsp1_pipeline_stopped(struct vsp1_p
- 
- int vsp1_pipeline_stop(struct vsp1_pipeline *pipe)
- {
-+	struct vsp1_device *vsp1 = pipe->output->entity.vsp1;
- 	struct vsp1_entity *entity;
- 	unsigned long flags;
- 	int ret;
-@@ -261,8 +262,7 @@ int vsp1_pipeline_stop(struct vsp1_pipel
- 		 * When using display lists in continuous frame mode the only
- 		 * way to stop the pipeline is to reset the hardware.
- 		 */
--		ret = vsp1_reset_wpf(pipe->output->entity.vsp1,
--				     pipe->output->entity.index);
-+		ret = vsp1_reset_wpf(vsp1, pipe->output->entity.index);
- 		if (ret == 0) {
- 			spin_lock_irqsave(&pipe->irqlock, flags);
- 			pipe->state = VSP1_PIPELINE_STOPPED;
-@@ -282,7 +282,7 @@ int vsp1_pipeline_stop(struct vsp1_pipel
- 
- 	list_for_each_entry(entity, &pipe->entities, list_pipe) {
- 		if (entity->route && entity->route->reg)
--			vsp1_write(entity->vsp1, entity->route->reg,
-+			vsp1_write(vsp1, entity->route->reg,
- 				   VI6_DPR_NODE_UNUSED);
- 	}
- 
---- a/drivers/media/platform/vsp1/vsp1_video.c
-+++ b/drivers/media/platform/vsp1/vsp1_video.c
-@@ -486,7 +486,12 @@ static int vsp1_video_pipeline_build_bra
- 	if (ret < 0)
- 		return ret;
- 
--	pad = media_entity_remote_pad(&input->entity.pads[RWPF_PAD_SOURCE]);
-+	/*
-+	 * The main data path doesn't include the HGO or HGT, use
-+	 * vsp1_entity_remote_pad() to traverse the graph.
-+	 */
-+
-+	pad = vsp1_entity_remote_pad(&input->entity.pads[RWPF_PAD_SOURCE]);
- 
- 	while (1) {
- 		if (pad == NULL) {
-@@ -539,14 +544,9 @@ static int vsp1_video_pipeline_build_bra
- 					: &input->entity;
- 		}
- 
--		/*
--		 * Follow the source link. The link setup operations ensure
--		 * that the output fan-out can't be more than one, there is thus
--		 * no need to verify here that only a single source link is
--		 * activated.
--		 */
-+		/* Follow the source link, ignoring any HGO or HGT. */
- 		pad = &entity->pads[entity->source_pad];
--		pad = media_entity_remote_pad(pad);
-+		pad = vsp1_entity_remote_pad(pad);
- 	}
- 
- 	/* The last entity must be the output WPF. */
-@@ -800,7 +800,7 @@ static int vsp1_video_setup_pipeline(str
- 	}
- 
- 	list_for_each_entry(entity, &pipe->entities, list_pipe) {
--		vsp1_entity_route_setup(entity, pipe->dl);
-+		vsp1_entity_route_setup(entity, pipe, pipe->dl);
- 
- 		if (entity->ops->configure)
- 			entity->ops->configure(entity, pipe, pipe->dl,
diff --git a/patches.renesas/0209-usb-host-xhci-add-xhci_virt_device-tracer.patch b/patches.renesas/0209-usb-host-xhci-add-xhci_virt_device-tracer.patch
deleted file mode 100644
index c62ac37a31fce5..00000000000000
--- a/patches.renesas/0209-usb-host-xhci-add-xhci_virt_device-tracer.patch
+++ /dev/null
@@ -1,138 +0,0 @@
-From db7e3a1af9f2c9262e7709904fa331c0ca508a3d Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:23 +0200
-Subject: [PATCH 209/255] usb: host: xhci: add xhci_virt_device tracer
-
-Let's start tracing at least part of an xhci_virt_device lifetime. We
-might want to extend this tracepoint class later, but for now it already
-exposes quite a bit of valuable information.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit a711edeeb1a1e80fb8626ee28acc15f084dcb107)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-hub.c   |    2 +
- drivers/usb/host/xhci-mem.c   |    7 +++++
- drivers/usb/host/xhci-trace.h |   57 ++++++++++++++++++++++++++++++++++++++++++
- drivers/usb/host/xhci.c       |    1 
- 4 files changed, 67 insertions(+)
-
---- a/drivers/usb/host/xhci-hub.c
-+++ b/drivers/usb/host/xhci-hub.c
-@@ -398,6 +398,8 @@ static int xhci_stop_device(struct xhci_
- 	if (!virt_dev)
- 		return -ENODEV;
- 
-+	trace_xhci_stop_device(virt_dev);
-+
- 	cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
- 	if (!cmd) {
- 		xhci_dbg(xhci, "Couldn't allocate command structure.\n");
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -936,6 +936,9 @@ void xhci_free_virt_device(struct xhci_h
- 		return;
- 
- 	dev = xhci->devs[slot_id];
-+
-+	trace_xhci_free_virt_device(dev);
-+
- 	xhci->dcbaa->dev_context_ptrs[slot_id] = 0;
- 	if (!dev)
- 		return;
-@@ -1085,6 +1088,8 @@ int xhci_alloc_virt_device(struct xhci_h
- 
- 	xhci->devs[slot_id] = dev;
- 
-+	trace_xhci_alloc_virt_device(dev);
-+
- 	return 1;
- fail:
- 	if (dev->eps[0].ring)
-@@ -1266,6 +1271,8 @@ int xhci_setup_addressable_virt_dev(stru
- 	ep0_ctx->deq = cpu_to_le64(dev->eps[0].ring->first_seg->dma |
- 				   dev->eps[0].ring->cycle_state);
- 
-+	trace_xhci_setup_addressable_virt_device(dev);
-+
- 	/* Steps 7 and 8 were done in xhci_alloc_virt_device() */
- 
- 	return 0;
---- a/drivers/usb/host/xhci-trace.h
-+++ b/drivers/usb/host/xhci-trace.h
-@@ -158,6 +158,63 @@ DEFINE_EVENT(xhci_log_trb, xhci_queue_tr
- 	TP_ARGS(ring, trb)
- );
- 
-+DECLARE_EVENT_CLASS(xhci_log_virt_dev,
-+	TP_PROTO(struct xhci_virt_device *vdev),
-+	TP_ARGS(vdev),
-+	TP_STRUCT__entry(
-+		__field(void *, vdev)
-+		__field(unsigned long long, out_ctx)
-+		__field(unsigned long long, in_ctx)
-+		__field(int, devnum)
-+		__field(int, state)
-+		__field(int, speed)
-+		__field(u8, portnum)
-+		__field(u8, level)
-+		__field(int, slot_id)
-+	),
-+	TP_fast_assign(
-+		__entry->vdev = vdev;
-+		__entry->in_ctx = (unsigned long long) vdev->in_ctx->dma;
-+		__entry->out_ctx = (unsigned long long) vdev->out_ctx->dma;
-+		__entry->devnum = vdev->udev->devnum;
-+		__entry->state = vdev->udev->state;
-+		__entry->speed = vdev->udev->speed;
-+		__entry->portnum = vdev->udev->portnum;
-+		__entry->level = vdev->udev->level;
-+		__entry->slot_id = vdev->udev->slot_id;
-+	),
-+	TP_printk("vdev %p ctx %llx | %llx num %d state %d speed %d port %d level %d slot %d",
-+		__entry->vdev, __entry->in_ctx, __entry->out_ctx,
-+		__entry->devnum, __entry->state, __entry->speed,
-+		__entry->portnum, __entry->level, __entry->slot_id
-+	)
-+);
-+
-+DEFINE_EVENT(xhci_log_virt_dev, xhci_alloc_virt_device,
-+	TP_PROTO(struct xhci_virt_device *vdev),
-+	TP_ARGS(vdev)
-+);
-+
-+DEFINE_EVENT(xhci_log_virt_dev, xhci_free_virt_device,
-+	TP_PROTO(struct xhci_virt_device *vdev),
-+	TP_ARGS(vdev)
-+);
-+
-+DEFINE_EVENT(xhci_log_virt_dev, xhci_setup_device,
-+	TP_PROTO(struct xhci_virt_device *vdev),
-+	TP_ARGS(vdev)
-+);
-+
-+DEFINE_EVENT(xhci_log_virt_dev, xhci_setup_addressable_virt_device,
-+	TP_PROTO(struct xhci_virt_device *vdev),
-+	TP_ARGS(vdev)
-+);
-+
-+DEFINE_EVENT(xhci_log_virt_dev, xhci_stop_device,
-+	TP_PROTO(struct xhci_virt_device *vdev),
-+	TP_ARGS(vdev)
-+);
-+
- DECLARE_EVENT_CLASS(xhci_log_urb,
- 	TP_PROTO(struct urb *urb),
- 	TP_ARGS(urb),
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -3893,6 +3893,7 @@ static int xhci_setup_device(struct usb_
- 				le32_to_cpu(slot_ctx->dev_info) >> 27);
- 
- 	spin_lock_irqsave(&xhci->lock, flags);
-+	trace_xhci_setup_device(virt_dev);
- 	ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
- 					udev->slot_id, setup);
- 	if (ret) {
diff --git a/patches.renesas/0210-ARM-dts-koelsch-enable-UHS-for-SDHI-0-1-3.patch b/patches.renesas/0210-ARM-dts-koelsch-enable-UHS-for-SDHI-0-1-3.patch
deleted file mode 100644
index 9fb8f31fdb0752..00000000000000
--- a/patches.renesas/0210-ARM-dts-koelsch-enable-UHS-for-SDHI-0-1-3.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From 101cfba35e6e943945a2c54925cea00f50882286 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Sep 2016 12:57:02 +0200
-Subject: [PATCH 210/299] ARM: dts: koelsch: enable UHS for SDHI 0, 1 & 3
-
-Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1,2}.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-(cherry picked from commit d3cec922fe2030235588aa6fe53d6470b4e7496f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791-koelsch.dts |   33 ++++++++++++++++++++++++++++++---
- 1 file changed, 30 insertions(+), 3 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7791-koelsch.dts
-+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
-@@ -360,16 +360,37 @@
- 	sdhi0_pins: sd0 {
- 		groups = "sdhi0_data4", "sdhi0_ctrl";
- 		function = "sdhi0";
-+		power-source = <3300>;
-+	};
-+
-+	sdhi0_pins_uhs: sd0_uhs {
-+		groups = "sdhi0_data4", "sdhi0_ctrl";
-+		function = "sdhi0";
-+		power-source = <1800>;
- 	};
- 
- 	sdhi1_pins: sd1 {
- 		groups = "sdhi1_data4", "sdhi1_ctrl";
- 		function = "sdhi1";
-+		power-source = <3300>;
-+	};
-+
-+	sdhi1_pins_uhs: sd1_uhs {
-+		groups = "sdhi1_data4", "sdhi1_ctrl";
-+		function = "sdhi1";
-+		power-source = <1800>;
- 	};
- 
- 	sdhi2_pins: sd2 {
- 		groups = "sdhi2_data4", "sdhi2_ctrl";
- 		function = "sdhi2";
-+		power-source = <3300>;
-+	};
-+
-+	sdhi2_pins_uhs: sd2_uhs {
-+		groups = "sdhi2_data4", "sdhi2_ctrl";
-+		function = "sdhi2";
-+		power-source = <1800>;
- 	};
- 
- 	qspi_pins: qspi {
-@@ -454,33 +475,39 @@
- 
- &sdhi0 {
- 	pinctrl-0 = <&sdhi0_pins>;
--	pinctrl-names = "default";
-+	pinctrl-1 = <&sdhi0_pins_uhs>;
-+	pinctrl-names = "default", "state_uhs";
- 
- 	vmmc-supply = <&vcc_sdhi0>;
- 	vqmmc-supply = <&vccq_sdhi0>;
- 	cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
- 	wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
-+	sd-uhs-sdr50;
- 	status = "okay";
- };
- 
- &sdhi1 {
- 	pinctrl-0 = <&sdhi1_pins>;
--	pinctrl-names = "default";
-+	pinctrl-1 = <&sdhi1_pins_uhs>;
-+	pinctrl-names = "default", "state_uhs";
- 
- 	vmmc-supply = <&vcc_sdhi1>;
- 	vqmmc-supply = <&vccq_sdhi1>;
- 	cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
- 	wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
-+	sd-uhs-sdr50;
- 	status = "okay";
- };
- 
- &sdhi2 {
- 	pinctrl-0 = <&sdhi2_pins>;
--	pinctrl-names = "default";
-+	pinctrl-1 = <&sdhi2_pins_uhs>;
-+	pinctrl-names = "default", "state_uhs";
- 
- 	vmmc-supply = <&vcc_sdhi2>;
- 	vqmmc-supply = <&vccq_sdhi2>;
- 	cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
-+	sd-uhs-sdr50;
- 	status = "okay";
- };
- 
diff --git a/patches.renesas/0210-media-v4l-vsp1-Fix-HGO-and-HGT-routing-register-addr.patch b/patches.renesas/0210-media-v4l-vsp1-Fix-HGO-and-HGT-routing-register-addr.patch
deleted file mode 100644
index ed9d6279ae8f1f..00000000000000
--- a/patches.renesas/0210-media-v4l-vsp1-Fix-HGO-and-HGT-routing-register-addr.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From ce8020eb50029756f4a36c7850aac90d70666c06 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 7 Sep 2016 09:36:31 -0300
-Subject: [PATCH 210/286] [media] v4l: vsp1: Fix HGO and HGT routing register
- addresses
-
-The addresses are incorrect, fix them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 98eee2550f7b5e800641e90469f400a8c06fde73)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_regs.h |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/media/platform/vsp1/vsp1_regs.h
-+++ b/drivers/media/platform/vsp1/vsp1_regs.h
-@@ -328,8 +328,8 @@
- #define VI6_DPR_ROUTE_RT_MASK		(0x3f << 0)
- #define VI6_DPR_ROUTE_RT_SHIFT		0
- 
--#define VI6_DPR_HGO_SMPPT		0x2050
--#define VI6_DPR_HGT_SMPPT		0x2054
-+#define VI6_DPR_HGO_SMPPT		0x2054
-+#define VI6_DPR_HGT_SMPPT		0x2058
- #define VI6_DPR_SMPPT_TGW_MASK		(7 << 8)
- #define VI6_DPR_SMPPT_TGW_SHIFT		8
- #define VI6_DPR_SMPPT_PT_MASK		(0x3f << 0)
diff --git a/patches.renesas/0210-xhci-rename-size-variable-to-num_tds.patch b/patches.renesas/0210-xhci-rename-size-variable-to-num_tds.patch
deleted file mode 100644
index 173af3ed166e21..00000000000000
--- a/patches.renesas/0210-xhci-rename-size-variable-to-num_tds.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From d03f4ba30be03a65d4e55b5e432ba4c35117a91c Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:24 +0200
-Subject: [PATCH 210/255] xhci: rename size variable to num_tds
-
-No functinal changes.
-num_tds describes the number of transfer descriptor better than "size"
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit e6f7caa3de7a6a093e23d2722e45676a6e886e4c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci.c |   16 ++++++++--------
- 1 file changed, 8 insertions(+), 8 deletions(-)
-
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -1382,7 +1382,7 @@ int xhci_urb_enqueue(struct usb_hcd *hcd
- 	int ret = 0;
- 	unsigned int slot_id, ep_index;
- 	struct urb_priv	*urb_priv;
--	int size, i;
-+	int num_tds, i;
- 
- 	if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
- 					true, true, __func__) <= 0)
-@@ -1399,32 +1399,32 @@ int xhci_urb_enqueue(struct usb_hcd *hcd
- 	}
- 
- 	if (usb_endpoint_xfer_isoc(&urb->ep->desc))
--		size = urb->number_of_packets;
-+		num_tds = urb->number_of_packets;
- 	else if (usb_endpoint_is_bulk_out(&urb->ep->desc) &&
- 	    urb->transfer_buffer_length > 0 &&
- 	    urb->transfer_flags & URB_ZERO_PACKET &&
- 	    !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc)))
--		size = 2;
-+		num_tds = 2;
- 	else
--		size = 1;
-+		num_tds = 1;
- 
- 	urb_priv = kzalloc(sizeof(struct urb_priv) +
--				  size * sizeof(struct xhci_td *), mem_flags);
-+			   num_tds * sizeof(struct xhci_td *), mem_flags);
- 	if (!urb_priv)
- 		return -ENOMEM;
- 
--	buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
-+	buffer = kzalloc(num_tds * sizeof(struct xhci_td), mem_flags);
- 	if (!buffer) {
- 		kfree(urb_priv);
- 		return -ENOMEM;
- 	}
- 
--	for (i = 0; i < size; i++) {
-+	for (i = 0; i < num_tds; i++) {
- 		urb_priv->td[i] = buffer;
- 		buffer++;
- 	}
- 
--	urb_priv->length = size;
-+	urb_priv->length = num_tds;
- 	urb_priv->td_cnt = 0;
- 	urb->hcpriv = urb_priv;
- 
diff --git a/patches.renesas/0211-ARM-dts-r8a7794-set-maximum-frequency-for-SDHI-clock.patch b/patches.renesas/0211-ARM-dts-r8a7794-set-maximum-frequency-for-SDHI-clock.patch
deleted file mode 100644
index 7b8da979f3ad74..00000000000000
--- a/patches.renesas/0211-ARM-dts-r8a7794-set-maximum-frequency-for-SDHI-clock.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From bbab815ff6d362f9e2676482ea738fde41ee73be Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Sep 2016 12:57:03 +0200
-Subject: [PATCH 211/299] ARM: dts: r8a7794: set maximum frequency for SDHI
- clocks
-
-Define the upper limit otherwise the driver cannot utilize max speeds.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-(cherry picked from commit 5babb5d46413ac8af5ae4f3b9cc93616b3ee2bd1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794.dtsi |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7794.dtsi
-+++ b/arch/arm/boot/dts/r8a7794.dtsi
-@@ -730,6 +730,7 @@
- 		dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- 		       <&dmac1 0xcd>, <&dmac1 0xce>;
- 		dma-names = "tx", "rx", "tx", "rx";
-+		max-frequency = <195000000>;
- 		power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- 		status = "disabled";
- 	};
-@@ -742,6 +743,7 @@
- 		dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- 		       <&dmac1 0xc1>, <&dmac1 0xc2>;
- 		dma-names = "tx", "rx", "tx", "rx";
-+		max-frequency = <97500000>;
- 		power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- 		status = "disabled";
- 	};
-@@ -754,6 +756,7 @@
- 		dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- 		       <&dmac1 0xd3>, <&dmac1 0xd4>;
- 		dma-names = "tx", "rx", "tx", "rx";
-+		max-frequency = <97500000>;
- 		power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- 		status = "disabled";
- 	};
diff --git a/patches.renesas/0211-media-v4l-Define-a-pixel-format-for-the-R-Car-VSP1-1.patch b/patches.renesas/0211-media-v4l-Define-a-pixel-format-for-the-R-Car-VSP1-1.patch
deleted file mode 100644
index 3ffc34d2dbdae1..00000000000000
--- a/patches.renesas/0211-media-v4l-Define-a-pixel-format-for-the-R-Car-VSP1-1.patch
+++ /dev/null
@@ -1,243 +0,0 @@
-From 96b1fe62230c19e2304dab807b5b284333ac9eb3 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 10 Apr 2016 04:37:48 -0300
-Subject: [PATCH 211/286] [media] v4l: Define a pixel format for the R-Car VSP1
- 1-D histogram engine
-
-The format is used on the R-Car VSP1 video queues that carry
-1-D histogram statistics data.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 14d66538716574f8899b22bff24a68301e65f08d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/media/uapi/v4l/meta-formats.rst         |   15 +
- Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgo.rst |  168 ++++++++++++++++++
- Documentation/media/uapi/v4l/pixfmt.rst               |    1 
- drivers/media/v4l2-core/v4l2-ioctl.c                  |    1 
- include/uapi/linux/videodev2.h                        |    3 
- 5 files changed, 188 insertions(+)
- create mode 100644 Documentation/media/uapi/v4l/meta-formats.rst
- create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgo.rst
-
---- /dev/null
-+++ b/Documentation/media/uapi/v4l/meta-formats.rst
-@@ -0,0 +1,15 @@
-+.. -*- coding: utf-8; mode: rst -*-
-+
-+.. _meta-formats:
-+
-+****************
-+Metadata Formats
-+****************
-+
-+These formats are used for the :ref:`metadata` interface only.
-+
-+
-+.. toctree::
-+    :maxdepth: 1
-+
-+    pixfmt-meta-vsp1-hgo
---- /dev/null
-+++ b/Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgo.rst
-@@ -0,0 +1,168 @@
-+.. -*- coding: utf-8; mode: rst -*-
-+
-+.. _v4l2-meta-fmt-vsp1-hgo:
-+
-+*******************************
-+V4L2_META_FMT_VSP1_HGO ('VSPH')
-+*******************************
-+
-+Renesas R-Car VSP1 1-D Histogram Data
-+
-+
-+Description
-+===========
-+
-+This format describes histogram data generated by the Renesas R-Car VSP1 1-D
-+Histogram (HGO) engine.
-+
-+The VSP1 HGO is a histogram computation engine that can operate on RGB, YCrCb
-+or HSV data. It operates on a possibly cropped and subsampled input image and
-+computes the minimum, maximum and sum of all pixels as well as per-channel
-+histograms.
-+
-+The HGO can compute histograms independently per channel, on the maximum of the
-+three channels (RGB data only) or on the Y channel only (YCbCr only). It can
-+additionally output the histogram with 64 or 256 bins, resulting in four
-+possible modes of operation.
-+
-+- In *64 bins normal mode*, the HGO operates on the three channels independently
-+  to compute three 64-bins histograms. RGB, YCbCr and HSV image formats are
-+  supported.
-+- In *64 bins maximum mode*, the HGO operates on the maximum of the (R, G, B)
-+  channels to compute a single 64-bins histogram. Only the RGB image format is
-+  supported.
-+- In *256 bins normal mode*, the HGO operates on the Y channel to compute a
-+  single 256-bins histogram. Only the YCbCr image format is supported.
-+- In *256 bins maximum mode*, the HGO operates on the maximum of the (R, G, B)
-+  channels to compute a single 256-bins histogram. Only the RGB image format is
-+  supported.
-+
-+**Byte Order.**
-+All data is stored in memory in little endian format. Each cell in the tables
-+contains one byte.
-+
-+.. flat-table:: VSP1 HGO Data - 64 Bins, Normal Mode (792 bytes)
-+    :header-rows:  2
-+    :stub-columns: 0
-+
-+    * - Offset
-+      - :cspan:`4` Memory
-+    * -
-+      - [31:24]
-+      - [23:16]
-+      - [15:8]
-+      - [7:0]
-+    * - 0
-+      - -
-+      - R/Cr/H max [7:0]
-+      - -
-+      - R/Cr/H min [7:0]
-+    * - 4
-+      - -
-+      - G/Y/S max [7:0]
-+      - -
-+      - G/Y/S min [7:0]
-+    * - 8
-+      - -
-+      - B/Cb/V max [7:0]
-+      - -
-+      - B/Cb/V min [7:0]
-+    * - 12
-+      - :cspan:`4` R/Cr/H sum [31:0]
-+    * - 16
-+      - :cspan:`4` G/Y/S sum [31:0]
-+    * - 20
-+      - :cspan:`4` B/Cb/V sum [31:0]
-+    * - 24
-+      - :cspan:`4` R/Cr/H bin 0 [31:0]
-+    * -
-+      - :cspan:`4` ...
-+    * - 276
-+      - :cspan:`4` R/Cr/H bin 63 [31:0]
-+    * - 280
-+      - :cspan:`4` G/Y/S bin 0 [31:0]
-+    * -
-+      - :cspan:`4` ...
-+    * - 532
-+      - :cspan:`4` G/Y/S bin 63 [31:0]
-+    * - 536
-+      - :cspan:`4` B/Cb/V bin 0 [31:0]
-+    * -
-+      - :cspan:`4` ...
-+    * - 788
-+      - :cspan:`4` B/Cb/V bin 63 [31:0]
-+
-+.. flat-table:: VSP1 HGO Data - 64 Bins, Max Mode (264 bytes)
-+    :header-rows:  2
-+    :stub-columns: 0
-+
-+    * - Offset
-+      - :cspan:`4` Memory
-+    * -
-+      - [31:24]
-+      - [23:16]
-+      - [15:8]
-+      - [7:0]
-+    * - 0
-+      - -
-+      - max(R,G,B) max [7:0]
-+      - -
-+      - max(R,G,B) min [7:0]
-+    * - 4
-+      - :cspan:`4` max(R,G,B) sum [31:0]
-+    * - 8
-+      - :cspan:`4` max(R,G,B) bin 0 [31:0]
-+    * -
-+      - :cspan:`4` ...
-+    * - 260
-+      - :cspan:`4` max(R,G,B) bin 63 [31:0]
-+
-+.. flat-table:: VSP1 HGO Data - 256 Bins, Normal Mode (1032 bytes)
-+    :header-rows:  2
-+    :stub-columns: 0
-+
-+    * - Offset
-+      - :cspan:`4` Memory
-+    * -
-+      - [31:24]
-+      - [23:16]
-+      - [15:8]
-+      - [7:0]
-+    * - 0
-+      - -
-+      - Y max [7:0]
-+      - -
-+      - Y min [7:0]
-+    * - 4
-+      - :cspan:`4` Y sum [31:0]
-+    * - 8
-+      - :cspan:`4` Y bin 0 [31:0]
-+    * -
-+      - :cspan:`4` ...
-+    * - 1028
-+      - :cspan:`4` Y bin 255 [31:0]
-+
-+.. flat-table:: VSP1 HGO Data - 256 Bins, Max Mode (1032 bytes)
-+    :header-rows:  2
-+    :stub-columns: 0
-+
-+    * - Offset
-+      - :cspan:`4` Memory
-+    * -
-+      - [31:24]
-+      - [23:16]
-+      - [15:8]
-+      - [7:0]
-+    * - 0
-+      - -
-+      - max(R,G,B) max [7:0]
-+      - -
-+      - max(R,G,B) min [7:0]
-+    * - 4
-+      - :cspan:`4` max(R,G,B) sum [31:0]
-+    * - 8
-+      - :cspan:`4` max(R,G,B) bin 0 [31:0]
-+    * -
-+      - :cspan:`4` ...
-+    * - 1028
-+      - :cspan:`4` max(R,G,B) bin 255 [31:0]
---- a/Documentation/media/uapi/v4l/pixfmt.rst
-+++ b/Documentation/media/uapi/v4l/pixfmt.rst
-@@ -33,4 +33,5 @@ see also :ref:`VIDIOC_G_FBUF <VIDIOC_G_F
-     pixfmt-013
-     sdr-formats
-     tch-formats
-+    meta-formats
-     pixfmt-reserved
---- a/drivers/media/v4l2-core/v4l2-ioctl.c
-+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
-@@ -1265,6 +1265,7 @@ static void v4l_fill_fmtdesc(struct v4l2
- 	case V4L2_TCH_FMT_DELTA_TD08:	descr = "8-bit signed deltas"; break;
- 	case V4L2_TCH_FMT_TU16:		descr = "16-bit unsigned touch data"; break;
- 	case V4L2_TCH_FMT_TU08:		descr = "8-bit unsigned touch data"; break;
-+	case V4L2_META_FMT_VSP1_HGO:	descr = "R-Car VSP1 1-D Histogram"; break;
- 
- 	default:
- 		/* Compressed formats */
---- a/include/uapi/linux/videodev2.h
-+++ b/include/uapi/linux/videodev2.h
-@@ -672,6 +672,9 @@ struct v4l2_pix_format {
- #define V4L2_TCH_FMT_TU16	v4l2_fourcc('T', 'U', '1', '6') /* 16-bit unsigned touch data */
- #define V4L2_TCH_FMT_TU08	v4l2_fourcc('T', 'U', '0', '8') /* 8-bit unsigned touch data */
- 
-+/* Meta-data formats */
-+#define V4L2_META_FMT_VSP1_HGO    v4l2_fourcc('V', 'S', 'P', 'H') /* R-Car VSP1 Histogram */
-+
- /* priv field value to indicates that subsequent fields are valid. */
- #define V4L2_PIX_FMT_PRIV_MAGIC		0xfeedcafe
- 
diff --git a/patches.renesas/0211-xhci-Rename-variables-related-to-transfer-descritpor.patch b/patches.renesas/0211-xhci-Rename-variables-related-to-transfer-descritpor.patch
deleted file mode 100644
index f7779f4fc19c28..00000000000000
--- a/patches.renesas/0211-xhci-Rename-variables-related-to-transfer-descritpor.patch
+++ /dev/null
@@ -1,128 +0,0 @@
-From fd64265d9c1d9b5d14252e1f15e7cfa9ce9c47cf Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:25 +0200
-Subject: [PATCH 211/255] xhci: Rename variables related to transfer
- descritpors
-
-urb_priv structure has a count on how many TDs the
-URB contains, and how many of those TD's we have handled.
-
-rename:
-length -> num_tds
-td_cnt -> num_tds_done
-
-No functional changes
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 9ef7fbbb4fdfb857e606a9fd550faa8011cce5e2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   10 +++++-----
- drivers/usb/host/xhci.c      |   14 +++++++-------
- drivers/usb/host/xhci.h      |    4 ++--
- 3 files changed, 14 insertions(+), 14 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -119,14 +119,14 @@ static bool last_td_in_urb(struct xhci_t
- {
- 	struct urb_priv *urb_priv = td->urb->hcpriv;
- 
--	return urb_priv->td_cnt == urb_priv->length;
-+	return urb_priv->num_tds_done == urb_priv->num_tds;
- }
- 
- static void inc_td_cnt(struct urb *urb)
- {
- 	struct urb_priv *urb_priv = urb->hcpriv;
- 
--	urb_priv->td_cnt++;
-+	urb_priv->num_tds_done++;
- }
- 
- static void trb_to_noop(union xhci_trb *trb, u32 noop_type)
-@@ -2058,7 +2058,7 @@ static int process_isoc_td(struct xhci_h
- 	ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
- 	trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
- 	urb_priv = td->urb->hcpriv;
--	idx = urb_priv->td_cnt;
-+	idx = urb_priv->num_tds_done;
- 	frame = &td->urb->iso_frame_desc[idx];
- 	requested = frame->length;
- 	remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
-@@ -2137,7 +2137,7 @@ static int skip_isoc_td(struct xhci_hcd
- 
- 	ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
- 	urb_priv = td->urb->hcpriv;
--	idx = urb_priv->td_cnt;
-+	idx = urb_priv->num_tds_done;
- 	frame = &td->urb->iso_frame_desc[idx];
- 
- 	/* The transfer is partly done. */
-@@ -3134,7 +3134,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
- 	urb_priv = urb->hcpriv;
- 
- 	/* Deal with URB_ZERO_PACKET - need one more td/trb */
--	if (urb->transfer_flags & URB_ZERO_PACKET && urb_priv->length > 1)
-+	if (urb->transfer_flags & URB_ZERO_PACKET && urb_priv->num_tds > 1)
- 		need_zero_pkt = true;
- 
- 	td = urb_priv->td[0];
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -1424,8 +1424,8 @@ int xhci_urb_enqueue(struct usb_hcd *hcd
- 		buffer++;
- 	}
- 
--	urb_priv->length = num_tds;
--	urb_priv->td_cnt = 0;
-+	urb_priv->num_tds = num_tds;
-+	urb_priv->num_tds_done = 0;
- 	urb->hcpriv = urb_priv;
- 
- 	trace_xhci_urb_enqueue(urb);
-@@ -1568,8 +1568,8 @@ int xhci_urb_dequeue(struct usb_hcd *hcd
- 		xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
- 				"HW died, freeing TD.");
- 		urb_priv = urb->hcpriv;
--		for (i = urb_priv->td_cnt;
--		     i < urb_priv->length && xhci->devs[urb->dev->slot_id];
-+		for (i = urb_priv->num_tds_done;
-+		     i < urb_priv->num_tds && xhci->devs[urb->dev->slot_id];
- 		     i++) {
- 			td = urb_priv->td[i];
- 			if (!list_empty(&td->td_list))
-@@ -1594,8 +1594,8 @@ int xhci_urb_dequeue(struct usb_hcd *hcd
- 	}
- 
- 	urb_priv = urb->hcpriv;
--	i = urb_priv->td_cnt;
--	if (i < urb_priv->length)
-+	i = urb_priv->num_tds_done;
-+	if (i < urb_priv->num_tds)
- 		xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
- 				"Cancel URB %p, dev %s, ep 0x%x, "
- 				"starting at offset 0x%llx",
-@@ -1605,7 +1605,7 @@ int xhci_urb_dequeue(struct usb_hcd *hcd
- 					urb_priv->td[i]->start_seg,
- 					urb_priv->td[i]->first_trb));
- 
--	for (; i < urb_priv->length; i++) {
-+	for (; i < urb_priv->num_tds; i++) {
- 		td = urb_priv->td[i];
- 		list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
- 	}
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1612,8 +1612,8 @@ struct xhci_scratchpad {
- };
- 
- struct urb_priv {
--	int	length;
--	int	td_cnt;
-+	int	num_tds;
-+	int	num_tds_done;
- 	struct	xhci_td	*td[0];
- };
- 
diff --git a/patches.renesas/0212-ARM-dts-alt-enable-UHS-for-SDHI-0-1.patch b/patches.renesas/0212-ARM-dts-alt-enable-UHS-for-SDHI-0-1.patch
deleted file mode 100644
index a1e1e96e2b12b6..00000000000000
--- a/patches.renesas/0212-ARM-dts-alt-enable-UHS-for-SDHI-0-1.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From 4e06dc3a8106ca1177b40c0deefbd513cb350149 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 13 Sep 2016 12:57:04 +0200
-Subject: [PATCH 212/299] ARM: dts: alt: enable UHS for SDHI 0 & 1
-
-Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1}.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-(cherry picked from commit 9510f3492589866a1aa738951bd30e68b2aae7a7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794-alt.dts |   22 ++++++++++++++++++++--
- 1 file changed, 20 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7794-alt.dts
-+++ b/arch/arm/boot/dts/r8a7794-alt.dts
-@@ -207,11 +207,25 @@
- 	sdhi0_pins: sd0 {
- 		groups = "sdhi0_data4", "sdhi0_ctrl";
- 		function = "sdhi0";
-+		power-source = <3300>;
-+	};
-+
-+	sdhi0_pins_uhs: sd0_uhs {
-+		groups = "sdhi0_data4", "sdhi0_ctrl";
-+		function = "sdhi0";
-+		power-source = <1800>;
- 	};
- 
- 	sdhi1_pins: sd1 {
- 		groups = "sdhi1_data4", "sdhi1_ctrl";
- 		function = "sdhi1";
-+		power-source = <3300>;
-+	};
-+
-+	sdhi1_pins_uhs: sd1_uhs {
-+		groups = "sdhi1_data4", "sdhi1_ctrl";
-+		function = "sdhi1";
-+		power-source = <1800>;
- 	};
- };
- 
-@@ -255,23 +269,27 @@
- 
- &sdhi0 {
- 	pinctrl-0 = <&sdhi0_pins>;
--	pinctrl-names = "default";
-+	pinctrl-1 = <&sdhi0_pins_uhs>;
-+	pinctrl-names = "default", "state_uhs";
- 
- 	vmmc-supply = <&vcc_sdhi0>;
- 	vqmmc-supply = <&vccq_sdhi0>;
- 	cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
- 	wp-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>;
-+	sd-uhs-sdr50;
- 	status = "okay";
- };
- 
- &sdhi1 {
- 	pinctrl-0 = <&sdhi1_pins>;
--	pinctrl-names = "default";
-+	pinctrl-1 = <&sdhi1_pins_uhs>;
-+	pinctrl-names = "default", "state_uhs";
- 
- 	vmmc-supply = <&vcc_sdhi1>;
- 	vqmmc-supply = <&vccq_sdhi1>;
- 	cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
- 	wp-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
-+	sd-uhs-sdr50;
- 	status = "okay";
- };
- 
diff --git a/patches.renesas/0212-media-v4l-vsp1-Add-HGO-support.patch b/patches.renesas/0212-media-v4l-vsp1-Add-HGO-support.patch
deleted file mode 100644
index 485234e8056ee0..00000000000000
--- a/patches.renesas/0212-media-v4l-vsp1-Add-HGO-support.patch
+++ /dev/null
@@ -1,611 +0,0 @@
-From a701a78aa7955e562a42e1f8748d193750efb158 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 24 Feb 2016 20:40:22 -0300
-Subject: [PATCH 212/286] [media] v4l: vsp1: Add HGO support
-
-The HGO is a Histogram Generator One-Dimension. It computes per-channel
-histograms over a configurable region of the image with optional
-subsampling.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit f2421521de185c0281799712863db8e23d29a375)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/Makefile      |    2 
- drivers/media/platform/vsp1/vsp1.h        |    3 
- drivers/media/platform/vsp1/vsp1_drv.c    |   42 ++++-
- drivers/media/platform/vsp1/vsp1_entity.c |   16 ++
- drivers/media/platform/vsp1/vsp1_hgo.c    |  228 ++++++++++++++++++++++++++++++
- drivers/media/platform/vsp1/vsp1_hgo.h    |   45 +++++
- drivers/media/platform/vsp1/vsp1_pipe.c   |   16 ++
- drivers/media/platform/vsp1/vsp1_pipe.h   |    2 
- drivers/media/platform/vsp1/vsp1_regs.h   |   20 ++
- drivers/media/platform/vsp1/vsp1_video.c  |    6 
- 10 files changed, 367 insertions(+), 13 deletions(-)
- create mode 100644 drivers/media/platform/vsp1/vsp1_hgo.c
- create mode 100644 drivers/media/platform/vsp1/vsp1_hgo.h
-
---- a/drivers/media/platform/vsp1/Makefile
-+++ b/drivers/media/platform/vsp1/Makefile
-@@ -3,7 +3,7 @@ vsp1-y					+= vsp1_dl.o vsp1_drm.o vsp1_
- vsp1-y					+= vsp1_rpf.o vsp1_rwpf.o vsp1_wpf.o
- vsp1-y					+= vsp1_clu.o vsp1_hsit.o vsp1_lut.o
- vsp1-y					+= vsp1_bru.o vsp1_sru.o vsp1_uds.o
--vsp1-y					+= vsp1_histo.o
-+vsp1-y					+= vsp1_hgo.o vsp1_histo.o
- vsp1-y					+= vsp1_lif.o
- 
- obj-$(CONFIG_VIDEO_RENESAS_VSP1)	+= vsp1.o
---- a/drivers/media/platform/vsp1/vsp1.h
-+++ b/drivers/media/platform/vsp1/vsp1.h
-@@ -32,6 +32,7 @@ struct vsp1_entity;
- struct vsp1_platform_data;
- struct vsp1_bru;
- struct vsp1_clu;
-+struct vsp1_hgo;
- struct vsp1_hsit;
- struct vsp1_lif;
- struct vsp1_lut;
-@@ -50,6 +51,7 @@ struct vsp1_uds;
- #define VSP1_HAS_CLU		(1 << 4)
- #define VSP1_HAS_WPF_VFLIP	(1 << 5)
- #define VSP1_HAS_WPF_HFLIP	(1 << 6)
-+#define VSP1_HAS_HGO		(1 << 7)
- 
- struct vsp1_device_info {
- 	u32 version;
-@@ -73,6 +75,7 @@ struct vsp1_device {
- 
- 	struct vsp1_bru *bru;
- 	struct vsp1_clu *clu;
-+	struct vsp1_hgo *hgo;
- 	struct vsp1_hsit *hsi;
- 	struct vsp1_hsit *hst;
- 	struct vsp1_lif *lif;
---- a/drivers/media/platform/vsp1/vsp1_drv.c
-+++ b/drivers/media/platform/vsp1/vsp1_drv.c
-@@ -30,6 +30,7 @@
- #include "vsp1_clu.h"
- #include "vsp1_dl.h"
- #include "vsp1_drm.h"
-+#include "vsp1_hgo.h"
- #include "vsp1_hsit.h"
- #include "vsp1_lif.h"
- #include "vsp1_lut.h"
-@@ -150,6 +151,16 @@ static int vsp1_uapi_create_links(struct
- 			return ret;
- 	}
- 
-+	if (vsp1->hgo) {
-+		ret = media_create_pad_link(&vsp1->hgo->histo.entity.subdev.entity,
-+					    HISTO_PAD_SOURCE,
-+					    &vsp1->hgo->histo.video.entity, 0,
-+					    MEDIA_LNK_FL_ENABLED |
-+					    MEDIA_LNK_FL_IMMUTABLE);
-+		if (ret < 0)
-+			return ret;
-+	}
-+
- 	if (vsp1->lif) {
- 		ret = media_create_pad_link(&vsp1->wpf[0]->entity.subdev.entity,
- 					    RWPF_PAD_SOURCE,
-@@ -283,6 +294,17 @@ static int vsp1_create_entities(struct v
- 
- 	list_add_tail(&vsp1->hst->entity.list_dev, &vsp1->entities);
- 
-+	if (vsp1->info->features & VSP1_HAS_HGO && vsp1->info->uapi) {
-+		vsp1->hgo = vsp1_hgo_create(vsp1);
-+		if (IS_ERR(vsp1->hgo)) {
-+			ret = PTR_ERR(vsp1->hgo);
-+			goto done;
-+		}
-+
-+		list_add_tail(&vsp1->hgo->histo.entity.list_dev,
-+			      &vsp1->entities);
-+	}
-+
- 	/*
- 	 * The LIF is only supported when used in conjunction with the DU, in
- 	 * which case the userspace API is disabled. If the userspace API is
-@@ -580,8 +602,8 @@ static const struct vsp1_device_info vsp
- 		.version = VI6_IP_VERSION_MODEL_VSPS_H2,
- 		.model = "VSP1-S",
- 		.gen = 2,
--		.features = VSP1_HAS_BRU | VSP1_HAS_CLU | VSP1_HAS_LUT
--			  | VSP1_HAS_SRU | VSP1_HAS_WPF_VFLIP,
-+		.features = VSP1_HAS_BRU | VSP1_HAS_CLU | VSP1_HAS_HGO
-+			  | VSP1_HAS_LUT | VSP1_HAS_SRU | VSP1_HAS_WPF_VFLIP,
- 		.rpf_count = 5,
- 		.uds_count = 3,
- 		.wpf_count = 4,
-@@ -601,7 +623,8 @@ static const struct vsp1_device_info vsp
- 		.version = VI6_IP_VERSION_MODEL_VSPD_GEN2,
- 		.model = "VSP1-D",
- 		.gen = 2,
--		.features = VSP1_HAS_BRU | VSP1_HAS_LIF | VSP1_HAS_LUT,
-+		.features = VSP1_HAS_BRU | VSP1_HAS_HGO | VSP1_HAS_LIF
-+			  | VSP1_HAS_LUT,
- 		.rpf_count = 4,
- 		.uds_count = 1,
- 		.wpf_count = 1,
-@@ -611,8 +634,8 @@ static const struct vsp1_device_info vsp
- 		.version = VI6_IP_VERSION_MODEL_VSPS_M2,
- 		.model = "VSP1-S",
- 		.gen = 2,
--		.features = VSP1_HAS_BRU | VSP1_HAS_CLU | VSP1_HAS_LUT
--			  | VSP1_HAS_SRU | VSP1_HAS_WPF_VFLIP,
-+		.features = VSP1_HAS_BRU | VSP1_HAS_CLU | VSP1_HAS_HGO
-+			  | VSP1_HAS_LUT | VSP1_HAS_SRU | VSP1_HAS_WPF_VFLIP,
- 		.rpf_count = 5,
- 		.uds_count = 1,
- 		.wpf_count = 4,
-@@ -644,8 +667,9 @@ static const struct vsp1_device_info vsp
- 		.version = VI6_IP_VERSION_MODEL_VSPI_GEN3,
- 		.model = "VSP2-I",
- 		.gen = 3,
--		.features = VSP1_HAS_CLU | VSP1_HAS_LUT | VSP1_HAS_SRU
--			  | VSP1_HAS_WPF_HFLIP | VSP1_HAS_WPF_VFLIP,
-+		.features = VSP1_HAS_CLU | VSP1_HAS_HGO | VSP1_HAS_LUT
-+			  | VSP1_HAS_SRU | VSP1_HAS_WPF_HFLIP
-+			  | VSP1_HAS_WPF_VFLIP,
- 		.rpf_count = 1,
- 		.uds_count = 1,
- 		.wpf_count = 1,
-@@ -663,8 +687,8 @@ static const struct vsp1_device_info vsp
- 		.version = VI6_IP_VERSION_MODEL_VSPBC_GEN3,
- 		.model = "VSP2-BC",
- 		.gen = 3,
--		.features = VSP1_HAS_BRU | VSP1_HAS_CLU | VSP1_HAS_LUT
--			  | VSP1_HAS_WPF_VFLIP,
-+		.features = VSP1_HAS_BRU | VSP1_HAS_CLU | VSP1_HAS_HGO
-+			  | VSP1_HAS_LUT | VSP1_HAS_WPF_VFLIP,
- 		.rpf_count = 5,
- 		.wpf_count = 1,
- 		.num_bru_inputs = 5,
---- a/drivers/media/platform/vsp1/vsp1_entity.c
-+++ b/drivers/media/platform/vsp1/vsp1_entity.c
-@@ -37,6 +37,21 @@ void vsp1_entity_route_setup(struct vsp1
- 	struct vsp1_entity *source;
- 	struct vsp1_entity *sink;
- 
-+	if (entity->type == VSP1_ENTITY_HGO) {
-+		u32 smppt;
-+
-+		/*
-+		 * The HGO is a special case, its routing is configured on the
-+		 * sink pad.
-+		 */
-+		source = media_entity_to_vsp1_entity(entity->sources[0]);
-+		smppt = (pipe->output->entity.index << VI6_DPR_SMPPT_TGW_SHIFT)
-+		      | (source->route->output << VI6_DPR_SMPPT_PT_SHIFT);
-+
-+		vsp1_dl_list_write(dl, VI6_DPR_HGO_SMPPT, smppt);
-+		return;
-+	}
-+
- 	source = entity;
- 	if (source->route->reg == 0)
- 		return;
-@@ -427,6 +442,7 @@ static const struct vsp1_route vsp1_rout
- 	    VI6_DPR_NODE_BRU_IN(2), VI6_DPR_NODE_BRU_IN(3),
- 	    VI6_DPR_NODE_BRU_IN(4) }, VI6_DPR_NODE_BRU_OUT },
- 	VSP1_ENTITY_ROUTE(CLU),
-+	{ VSP1_ENTITY_HGO, 0, 0, { 0, }, 0 },
- 	VSP1_ENTITY_ROUTE(HSI),
- 	VSP1_ENTITY_ROUTE(HST),
- 	{ VSP1_ENTITY_LIF, 0, 0, { VI6_DPR_NODE_LIF, }, VI6_DPR_NODE_LIF },
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_hgo.c
-@@ -0,0 +1,228 @@
-+/*
-+ * vsp1_hgo.c  --  R-Car VSP1 Histogram Generator 1D
-+ *
-+ * Copyright (C) 2016 Renesas Electronics Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/device.h>
-+#include <linux/gfp.h>
-+
-+#include <media/v4l2-subdev.h>
-+#include <media/videobuf2-vmalloc.h>
-+
-+#include "vsp1.h"
-+#include "vsp1_dl.h"
-+#include "vsp1_hgo.h"
-+
-+#define HGO_DATA_SIZE				((2 + 256) * 4)
-+
-+/* -----------------------------------------------------------------------------
-+ * Device Access
-+ */
-+
-+static inline u32 vsp1_hgo_read(struct vsp1_hgo *hgo, u32 reg)
-+{
-+	return vsp1_read(hgo->histo.entity.vsp1, reg);
-+}
-+
-+static inline void vsp1_hgo_write(struct vsp1_hgo *hgo, struct vsp1_dl_list *dl,
-+				  u32 reg, u32 data)
-+{
-+	vsp1_dl_list_write(dl, reg, data);
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Frame End Handler
-+ */
-+
-+void vsp1_hgo_frame_end(struct vsp1_entity *entity)
-+{
-+	struct vsp1_hgo *hgo = to_hgo(&entity->subdev);
-+	struct vsp1_histogram_buffer *buf;
-+	unsigned int i;
-+	size_t size;
-+	u32 *data;
-+
-+	buf = vsp1_histogram_buffer_get(&hgo->histo);
-+	if (!buf)
-+		return;
-+
-+	data = buf->addr;
-+
-+	if (hgo->num_bins == 256) {
-+		*data++ = vsp1_hgo_read(hgo, VI6_HGO_G_MAXMIN);
-+		*data++ = vsp1_hgo_read(hgo, VI6_HGO_G_SUM);
-+
-+		for (i = 0; i < 256; ++i) {
-+			vsp1_write(hgo->histo.entity.vsp1,
-+				   VI6_HGO_EXT_HIST_ADDR, i);
-+			*data++ = vsp1_hgo_read(hgo, VI6_HGO_EXT_HIST_DATA);
-+		}
-+
-+		size = (2 + 256) * sizeof(u32);
-+	} else if (hgo->max_rgb) {
-+		*data++ = vsp1_hgo_read(hgo, VI6_HGO_G_MAXMIN);
-+		*data++ = vsp1_hgo_read(hgo, VI6_HGO_G_SUM);
-+
-+		for (i = 0; i < 64; ++i)
-+			*data++ = vsp1_hgo_read(hgo, VI6_HGO_G_HISTO(i));
-+
-+		size = (2 + 64) * sizeof(u32);
-+	} else {
-+		*data++ = vsp1_hgo_read(hgo, VI6_HGO_R_MAXMIN);
-+		*data++ = vsp1_hgo_read(hgo, VI6_HGO_G_MAXMIN);
-+		*data++ = vsp1_hgo_read(hgo, VI6_HGO_B_MAXMIN);
-+
-+		*data++ = vsp1_hgo_read(hgo, VI6_HGO_R_SUM);
-+		*data++ = vsp1_hgo_read(hgo, VI6_HGO_G_SUM);
-+		*data++ = vsp1_hgo_read(hgo, VI6_HGO_B_SUM);
-+
-+		for (i = 0; i < 64; ++i) {
-+			data[i] = vsp1_hgo_read(hgo, VI6_HGO_R_HISTO(i));
-+			data[i+64] = vsp1_hgo_read(hgo, VI6_HGO_G_HISTO(i));
-+			data[i+128] = vsp1_hgo_read(hgo, VI6_HGO_B_HISTO(i));
-+		}
-+
-+		size = (6 + 64 * 3) * sizeof(u32);
-+	}
-+
-+	vsp1_histogram_buffer_complete(&hgo->histo, buf, size);
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Controls
-+ */
-+
-+#define V4L2_CID_VSP1_HGO_MAX_RGB		(V4L2_CID_USER_BASE | 0x1001)
-+#define V4L2_CID_VSP1_HGO_NUM_BINS		(V4L2_CID_USER_BASE | 0x1002)
-+
-+static const struct v4l2_ctrl_config hgo_max_rgb_control = {
-+	.id = V4L2_CID_VSP1_HGO_MAX_RGB,
-+	.name = "Maximum RGB Mode",
-+	.type = V4L2_CTRL_TYPE_BOOLEAN,
-+	.min = 0,
-+	.max = 1,
-+	.def = 0,
-+	.step = 1,
-+};
-+
-+static const s64 hgo_num_bins[] = {
-+	64, 256,
-+};
-+
-+static const struct v4l2_ctrl_config hgo_num_bins_control = {
-+	.id = V4L2_CID_VSP1_HGO_NUM_BINS,
-+	.name = "Number of Bins",
-+	.type = V4L2_CTRL_TYPE_INTEGER_MENU,
-+	.min = 0,
-+	.max = 1,
-+	.def = 0,
-+	.qmenu_int = hgo_num_bins,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * VSP1 Entity Operations
-+ */
-+
-+static void hgo_configure(struct vsp1_entity *entity,
-+			  struct vsp1_pipeline *pipe,
-+			  struct vsp1_dl_list *dl,
-+			  enum vsp1_entity_params params)
-+{
-+	struct vsp1_hgo *hgo = to_hgo(&entity->subdev);
-+	struct v4l2_rect *compose;
-+	struct v4l2_rect *crop;
-+	unsigned int hratio;
-+	unsigned int vratio;
-+
-+	if (params != VSP1_ENTITY_PARAMS_INIT)
-+		return;
-+
-+	crop = vsp1_entity_get_pad_selection(entity, entity->config,
-+					     HISTO_PAD_SINK, V4L2_SEL_TGT_CROP);
-+	compose = vsp1_entity_get_pad_selection(entity, entity->config,
-+						HISTO_PAD_SINK,
-+						V4L2_SEL_TGT_COMPOSE);
-+
-+	vsp1_hgo_write(hgo, dl, VI6_HGO_REGRST, VI6_HGO_REGRST_RCLEA);
-+
-+	vsp1_hgo_write(hgo, dl, VI6_HGO_OFFSET,
-+		       (crop->left << VI6_HGO_OFFSET_HOFFSET_SHIFT) |
-+		       (crop->top << VI6_HGO_OFFSET_VOFFSET_SHIFT));
-+	vsp1_hgo_write(hgo, dl, VI6_HGO_SIZE,
-+		       (crop->width << VI6_HGO_SIZE_HSIZE_SHIFT) |
-+		       (crop->height << VI6_HGO_SIZE_VSIZE_SHIFT));
-+
-+	mutex_lock(hgo->ctrls.handler.lock);
-+	hgo->max_rgb = hgo->ctrls.max_rgb->cur.val;
-+	if (hgo->ctrls.num_bins)
-+		hgo->num_bins = hgo_num_bins[hgo->ctrls.num_bins->cur.val];
-+	mutex_unlock(hgo->ctrls.handler.lock);
-+
-+	hratio = crop->width * 2 / compose->width / 3;
-+	vratio = crop->height * 2 / compose->height / 3;
-+	vsp1_hgo_write(hgo, dl, VI6_HGO_MODE,
-+		       (hgo->num_bins == 256 ? VI6_HGO_MODE_STEP : 0) |
-+		       (hgo->max_rgb ? VI6_HGO_MODE_MAXRGB : 0) |
-+		       (hratio << VI6_HGO_MODE_HRATIO_SHIFT) |
-+		       (vratio << VI6_HGO_MODE_VRATIO_SHIFT));
-+}
-+
-+static const struct vsp1_entity_operations hgo_entity_ops = {
-+	.configure = hgo_configure,
-+	.destroy = vsp1_histogram_destroy,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Initialization and Cleanup
-+ */
-+
-+static const unsigned int hgo_mbus_formats[] = {
-+	MEDIA_BUS_FMT_AYUV8_1X32,
-+	MEDIA_BUS_FMT_ARGB8888_1X32,
-+	MEDIA_BUS_FMT_AHSV8888_1X32,
-+};
-+
-+struct vsp1_hgo *vsp1_hgo_create(struct vsp1_device *vsp1)
-+{
-+	struct vsp1_hgo *hgo;
-+	int ret;
-+
-+	hgo = devm_kzalloc(vsp1->dev, sizeof(*hgo), GFP_KERNEL);
-+	if (hgo == NULL)
-+		return ERR_PTR(-ENOMEM);
-+
-+	/* Initialize the control handler. */
-+	v4l2_ctrl_handler_init(&hgo->ctrls.handler,
-+			       vsp1->info->gen == 3 ? 2 : 1);
-+	hgo->ctrls.max_rgb = v4l2_ctrl_new_custom(&hgo->ctrls.handler,
-+						  &hgo_max_rgb_control, NULL);
-+	if (vsp1->info->gen == 3)
-+		hgo->ctrls.num_bins =
-+			v4l2_ctrl_new_custom(&hgo->ctrls.handler,
-+					     &hgo_num_bins_control, NULL);
-+
-+	hgo->max_rgb = false;
-+	hgo->num_bins = 64;
-+
-+	hgo->histo.entity.subdev.ctrl_handler = &hgo->ctrls.handler;
-+
-+	/* Initialize the video device and queue for statistics data. */
-+	ret = vsp1_histogram_init(vsp1, &hgo->histo, VSP1_ENTITY_HGO, "hgo",
-+				  &hgo_entity_ops, hgo_mbus_formats,
-+				  ARRAY_SIZE(hgo_mbus_formats),
-+				  HGO_DATA_SIZE, V4L2_META_FMT_VSP1_HGO);
-+	if (ret < 0) {
-+		vsp1_entity_destroy(&hgo->histo.entity);
-+		return ERR_PTR(ret);
-+	}
-+
-+	return hgo;
-+}
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_hgo.h
-@@ -0,0 +1,45 @@
-+/*
-+ * vsp1_hgo.h  --  R-Car VSP1 Histogram Generator 1D
-+ *
-+ * Copyright (C) 2016 Renesas Electronics Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+#ifndef __VSP1_HGO_H__
-+#define __VSP1_HGO_H__
-+
-+#include <media/media-entity.h>
-+#include <media/v4l2-ctrls.h>
-+#include <media/v4l2-subdev.h>
-+
-+#include "vsp1_histo.h"
-+
-+struct vsp1_device;
-+
-+struct vsp1_hgo {
-+	struct vsp1_histogram histo;
-+
-+	struct {
-+		struct v4l2_ctrl_handler handler;
-+		struct v4l2_ctrl *max_rgb;
-+		struct v4l2_ctrl *num_bins;
-+	} ctrls;
-+
-+	bool max_rgb;
-+	unsigned int num_bins;
-+};
-+
-+static inline struct vsp1_hgo *to_hgo(struct v4l2_subdev *subdev)
-+{
-+	return container_of(subdev, struct vsp1_hgo, histo.entity.subdev);
-+}
-+
-+struct vsp1_hgo *vsp1_hgo_create(struct vsp1_device *vsp1);
-+void vsp1_hgo_frame_end(struct vsp1_entity *hgo);
-+
-+#endif /* __VSP1_HGO_H__ */
---- a/drivers/media/platform/vsp1/vsp1_pipe.c
-+++ b/drivers/media/platform/vsp1/vsp1_pipe.c
-@@ -23,6 +23,7 @@
- #include "vsp1_bru.h"
- #include "vsp1_dl.h"
- #include "vsp1_entity.h"
-+#include "vsp1_hgo.h"
- #include "vsp1_pipe.h"
- #include "vsp1_rwpf.h"
- #include "vsp1_uds.h"
-@@ -204,11 +205,18 @@ void vsp1_pipeline_reset(struct vsp1_pip
- 		pipe->output = NULL;
- 	}
- 
-+	if (pipe->hgo) {
-+		struct vsp1_hgo *hgo = to_hgo(&pipe->hgo->subdev);
-+
-+		hgo->histo.pipe = NULL;
-+	}
-+
- 	INIT_LIST_HEAD(&pipe->entities);
- 	pipe->state = VSP1_PIPELINE_STOPPED;
- 	pipe->buffers_ready = 0;
- 	pipe->num_inputs = 0;
- 	pipe->bru = NULL;
-+	pipe->hgo = NULL;
- 	pipe->lif = NULL;
- 	pipe->uds = NULL;
- }
-@@ -286,6 +294,11 @@ int vsp1_pipeline_stop(struct vsp1_pipel
- 				   VI6_DPR_NODE_UNUSED);
- 	}
- 
-+	if (pipe->hgo)
-+		vsp1_write(vsp1, VI6_DPR_HGO_SMPPT,
-+			   (7 << VI6_DPR_SMPPT_TGW_SHIFT) |
-+			   (VI6_DPR_NODE_UNUSED << VI6_DPR_SMPPT_PT_SHIFT));
-+
- 	v4l2_subdev_call(&pipe->output->entity.subdev, video, s_stream, 0);
- 
- 	return ret;
-@@ -309,6 +322,9 @@ void vsp1_pipeline_frame_end(struct vsp1
- 
- 	vsp1_dlm_irq_frame_end(pipe->output->dlm);
- 
-+	if (pipe->hgo)
-+		vsp1_hgo_frame_end(pipe->hgo);
-+
- 	if (pipe->frame_end)
- 		pipe->frame_end(pipe);
- 
---- a/drivers/media/platform/vsp1/vsp1_pipe.h
-+++ b/drivers/media/platform/vsp1/vsp1_pipe.h
-@@ -73,6 +73,7 @@ enum vsp1_pipeline_state {
-  * @inputs: array of RPFs in the pipeline (indexed by RPF index)
-  * @output: WPF at the output of the pipeline
-  * @bru: BRU entity, if present
-+ * @hgo: HGO entity, if present
-  * @lif: LIF entity, if present
-  * @uds: UDS entity, if present
-  * @uds_input: entity at the input of the UDS, if the UDS is present
-@@ -101,6 +102,7 @@ struct vsp1_pipeline {
- 	struct vsp1_rwpf *inputs[VSP1_MAX_RPF];
- 	struct vsp1_rwpf *output;
- 	struct vsp1_entity *bru;
-+	struct vsp1_entity *hgo;
- 	struct vsp1_entity *lif;
- 	struct vsp1_entity *uds;
- 	struct vsp1_entity *uds_input;
---- a/drivers/media/platform/vsp1/vsp1_regs.h
-+++ b/drivers/media/platform/vsp1/vsp1_regs.h
-@@ -590,24 +590,38 @@
-  */
- 
- #define VI6_HGO_OFFSET			0x3000
-+#define VI6_HGO_OFFSET_HOFFSET_SHIFT	16
-+#define VI6_HGO_OFFSET_VOFFSET_SHIFT	0
- #define VI6_HGO_SIZE			0x3004
-+#define VI6_HGO_SIZE_HSIZE_SHIFT	16
-+#define VI6_HGO_SIZE_VSIZE_SHIFT	0
- #define VI6_HGO_MODE			0x3008
-+#define VI6_HGO_MODE_STEP		(1 << 10)
-+#define VI6_HGO_MODE_MAXRGB		(1 << 7)
-+#define VI6_HGO_MODE_OFSB_R		(1 << 6)
-+#define VI6_HGO_MODE_OFSB_G		(1 << 5)
-+#define VI6_HGO_MODE_OFSB_B		(1 << 4)
-+#define VI6_HGO_MODE_HRATIO_SHIFT	2
-+#define VI6_HGO_MODE_VRATIO_SHIFT	0
- #define VI6_HGO_LB_TH			0x300c
- #define VI6_HGO_LBn_H(n)		(0x3010 + (n) * 8)
- #define VI6_HGO_LBn_V(n)		(0x3014 + (n) * 8)
--#define VI6_HGO_R_HISTO			0x3030
-+#define VI6_HGO_R_HISTO(n)		(0x3030 + (n) * 4)
- #define VI6_HGO_R_MAXMIN		0x3130
- #define VI6_HGO_R_SUM			0x3134
- #define VI6_HGO_R_LB_DET		0x3138
--#define VI6_HGO_G_HISTO			0x3140
-+#define VI6_HGO_G_HISTO(n)		(0x3140 + (n) * 4)
- #define VI6_HGO_G_MAXMIN		0x3240
- #define VI6_HGO_G_SUM			0x3244
- #define VI6_HGO_G_LB_DET		0x3248
--#define VI6_HGO_B_HISTO			0x3250
-+#define VI6_HGO_B_HISTO(n)		(0x3250 + (n) * 4)
- #define VI6_HGO_B_MAXMIN		0x3350
- #define VI6_HGO_B_SUM			0x3354
- #define VI6_HGO_B_LB_DET		0x3358
-+#define VI6_HGO_EXT_HIST_ADDR		0x335c
-+#define VI6_HGO_EXT_HIST_DATA		0x3360
- #define VI6_HGO_REGRST			0x33fc
-+#define VI6_HGO_REGRST_RCLEA		(1 << 0)
- 
- /* -----------------------------------------------------------------------------
-  * HGT Control Registers
---- a/drivers/media/platform/vsp1/vsp1_video.c
-+++ b/drivers/media/platform/vsp1/vsp1_video.c
-@@ -31,6 +31,7 @@
- #include "vsp1_bru.h"
- #include "vsp1_dl.h"
- #include "vsp1_entity.h"
-+#include "vsp1_hgo.h"
- #include "vsp1_pipe.h"
- #include "vsp1_rwpf.h"
- #include "vsp1_uds.h"
-@@ -601,6 +602,11 @@ static int vsp1_video_pipeline_build(str
- 			pipe->lif = e;
- 		} else if (e->type == VSP1_ENTITY_BRU) {
- 			pipe->bru = e;
-+		} else if (e->type == VSP1_ENTITY_HGO) {
-+			struct vsp1_hgo *hgo = to_hgo(subdev);
-+
-+			pipe->hgo = e;
-+			hgo->histo.pipe = pipe;
- 		}
- 	}
- 
diff --git a/patches.renesas/0212-xhci-simplify-how-we-store-TDs-in-urb-private-data.patch b/patches.renesas/0212-xhci-simplify-how-we-store-TDs-in-urb-private-data.patch
deleted file mode 100644
index 058c691b7291de..00000000000000
--- a/patches.renesas/0212-xhci-simplify-how-we-store-TDs-in-urb-private-data.patch
+++ /dev/null
@@ -1,193 +0,0 @@
-From 16082b87853b93a25922e59440045f57fb5df292 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:26 +0200
-Subject: [PATCH 212/255] xhci: simplify how we store TDs in urb private data
-
-Instead of storing a zero length array of td pointers, and then
-allocate memory both for the td pointer array and the td's, just
-use a zero length array of actual td's in urb private data.
-
-old:
-
-struct urb_priv {
-       struct xhci_td *td[0]
-}
-
-new:
-
-struct urb_priv {
-        struct xhci_td td[0]
-}
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 7e64b0373af50fa46d3bf441f1c079615bbdf77f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-mem.c  |    5 +----
- drivers/usb/host/xhci-ring.c |   20 ++++++++++----------
- drivers/usb/host/xhci.c      |   24 ++++++------------------
- drivers/usb/host/xhci.h      |    2 +-
- 4 files changed, 18 insertions(+), 33 deletions(-)
-
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -1845,10 +1845,7 @@ struct xhci_command *xhci_alloc_command(
- 
- void xhci_urb_free_priv(struct urb_priv *urb_priv)
- {
--	if (urb_priv) {
--		kfree(urb_priv->td[0]);
--		kfree(urb_priv);
--	}
-+	kfree(urb_priv);
- }
- 
- void xhci_free_command(struct xhci_hcd *xhci,
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -2841,7 +2841,7 @@ static int prepare_transfer(struct xhci_
- 		return ret;
- 
- 	urb_priv = urb->hcpriv;
--	td = urb_priv->td[td_index];
-+	td = &urb_priv->td[td_index];
- 
- 	INIT_LIST_HEAD(&td->td_list);
- 	INIT_LIST_HEAD(&td->cancelled_td_list);
-@@ -3137,7 +3137,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
- 	if (urb->transfer_flags & URB_ZERO_PACKET && urb_priv->num_tds > 1)
- 		need_zero_pkt = true;
- 
--	td = urb_priv->td[0];
-+	td = &urb_priv->td[0];
- 
- 	/*
- 	 * Don't give the first TRB to the hardware (by toggling the cycle bit)
-@@ -3230,7 +3230,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
- 		ret = prepare_transfer(xhci, xhci->devs[slot_id],
- 				       ep_index, urb->stream_id,
- 				       1, urb, 1, mem_flags);
--		urb_priv->td[1]->last_trb = ring->enqueue;
-+		urb_priv->td[1].last_trb = ring->enqueue;
- 		field = TRB_TYPE(TRB_NORMAL) | ring->cycle_state | TRB_IOC;
- 		queue_trb(xhci, ring, 0, 0, 0, TRB_INTR_TARGET(0), field);
- 	}
-@@ -3282,7 +3282,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
- 		return ret;
- 
- 	urb_priv = urb->hcpriv;
--	td = urb_priv->td[0];
-+	td = &urb_priv->td[0];
- 
- 	/*
- 	 * Don't give the first TRB to the hardware (by toggling the cycle bit)
-@@ -3570,7 +3570,7 @@ static int xhci_queue_isoc_tx(struct xhc
- 				return ret;
- 			goto cleanup;
- 		}
--		td = urb_priv->td[i];
-+		td = &urb_priv->td[i];
- 
- 		/* use SIA as default, if frame id is used overwrite it */
- 		sia_frame_id = TRB_SIA;
-@@ -3677,20 +3677,20 @@ cleanup:
- 	/* Clean up a partially enqueued isoc transfer. */
- 
- 	for (i--; i >= 0; i--)
--		list_del_init(&urb_priv->td[i]->td_list);
-+		list_del_init(&urb_priv->td[i].td_list);
- 
- 	/* Use the first TD as a temporary variable to turn the TDs we've queued
- 	 * into No-ops with a software-owned cycle bit. That way the hardware
- 	 * won't accidentally start executing bogus TDs when we partially
- 	 * overwrite them.  td->first_trb and td->start_seg are already set.
- 	 */
--	urb_priv->td[0]->last_trb = ep_ring->enqueue;
-+	urb_priv->td[0].last_trb = ep_ring->enqueue;
- 	/* Every TRB except the first & last will have its cycle bit flipped. */
--	td_to_noop(xhci, ep_ring, urb_priv->td[0], true);
-+	td_to_noop(xhci, ep_ring, &urb_priv->td[0], true);
- 
- 	/* Reset the ring enqueue back to the first TRB and its cycle bit. */
--	ep_ring->enqueue = urb_priv->td[0]->first_trb;
--	ep_ring->enq_seg = urb_priv->td[0]->start_seg;
-+	ep_ring->enqueue = urb_priv->td[0].first_trb;
-+	ep_ring->enq_seg = urb_priv->td[0].start_seg;
- 	ep_ring->cycle_state = start_cycle;
- 	ep_ring->num_trbs_free = ep_ring->num_trbs_free_temp;
- 	usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -1377,12 +1377,11 @@ command_cleanup:
- int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
- {
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
--	struct xhci_td *buffer;
- 	unsigned long flags;
- 	int ret = 0;
- 	unsigned int slot_id, ep_index;
- 	struct urb_priv	*urb_priv;
--	int num_tds, i;
-+	int num_tds;
- 
- 	if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
- 					true, true, __func__) <= 0)
-@@ -1409,21 +1408,10 @@ int xhci_urb_enqueue(struct usb_hcd *hcd
- 		num_tds = 1;
- 
- 	urb_priv = kzalloc(sizeof(struct urb_priv) +
--			   num_tds * sizeof(struct xhci_td *), mem_flags);
-+			   num_tds * sizeof(struct xhci_td), mem_flags);
- 	if (!urb_priv)
- 		return -ENOMEM;
- 
--	buffer = kzalloc(num_tds * sizeof(struct xhci_td), mem_flags);
--	if (!buffer) {
--		kfree(urb_priv);
--		return -ENOMEM;
--	}
--
--	for (i = 0; i < num_tds; i++) {
--		urb_priv->td[i] = buffer;
--		buffer++;
--	}
--
- 	urb_priv->num_tds = num_tds;
- 	urb_priv->num_tds_done = 0;
- 	urb->hcpriv = urb_priv;
-@@ -1571,7 +1559,7 @@ int xhci_urb_dequeue(struct usb_hcd *hcd
- 		for (i = urb_priv->num_tds_done;
- 		     i < urb_priv->num_tds && xhci->devs[urb->dev->slot_id];
- 		     i++) {
--			td = urb_priv->td[i];
-+			td = &urb_priv->td[i];
- 			if (!list_empty(&td->td_list))
- 				list_del_init(&td->td_list);
- 			if (!list_empty(&td->cancelled_td_list))
-@@ -1602,11 +1590,11 @@ int xhci_urb_dequeue(struct usb_hcd *hcd
- 				urb, urb->dev->devpath,
- 				urb->ep->desc.bEndpointAddress,
- 				(unsigned long long) xhci_trb_virt_to_dma(
--					urb_priv->td[i]->start_seg,
--					urb_priv->td[i]->first_trb));
-+					urb_priv->td[i].start_seg,
-+					urb_priv->td[i].first_trb));
- 
- 	for (; i < urb_priv->num_tds; i++) {
--		td = urb_priv->td[i];
-+		td = &urb_priv->td[i];
- 		list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
- 	}
- 
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1614,7 +1614,7 @@ struct xhci_scratchpad {
- struct urb_priv {
- 	int	num_tds;
- 	int	num_tds_done;
--	struct	xhci_td	*td[0];
-+	struct	xhci_td	td[0];
- };
- 
- /*
diff --git a/patches.renesas/0213-ARM-dts-r8a7790-Correct-SCIFB-reg-properties-to-cove.patch b/patches.renesas/0213-ARM-dts-r8a7790-Correct-SCIFB-reg-properties-to-cove.patch
deleted file mode 100644
index 718624799c1934..00000000000000
--- a/patches.renesas/0213-ARM-dts-r8a7790-Correct-SCIFB-reg-properties-to-cove.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 7a52029d74480768817e96f84885ddc0e9782945 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 19 Sep 2016 16:18:53 +0200
-Subject: [PATCH 213/299] ARM: dts: r8a7790: Correct SCIFB reg properties to
- cover all registers
-
-Several SCIFB registers reside outside the reported register ranges.
-Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
-ioremap().
-
-Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
-SH/R-Mobile SoCs.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f31fbe837b4213b7371d78e2b48786853faadd31)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi |    6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -711,7 +711,7 @@
- 	scifb0: serial@e6c20000 {
- 		compatible = "renesas,scifb-r8a7790",
- 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
--		reg = <0 0xe6c20000 0 64>;
-+		reg = <0 0xe6c20000 0 0x100>;
- 		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>;
- 		clock-names = "fck";
-@@ -725,7 +725,7 @@
- 	scifb1: serial@e6c30000 {
- 		compatible = "renesas,scifb-r8a7790",
- 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
--		reg = <0 0xe6c30000 0 64>;
-+		reg = <0 0xe6c30000 0 0x100>;
- 		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>;
- 		clock-names = "fck";
-@@ -739,7 +739,7 @@
- 	scifb2: serial@e6ce0000 {
- 		compatible = "renesas,scifb-r8a7790",
- 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
--		reg = <0 0xe6ce0000 0 64>;
-+		reg = <0 0xe6ce0000 0 0x100>;
- 		interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>;
- 		clock-names = "fck";
diff --git a/patches.renesas/0213-media-v4l-Define-a-pixel-format-for-the-R-Car-VSP1-2.patch b/patches.renesas/0213-media-v4l-Define-a-pixel-format-for-the-R-Car-VSP1-2.patch
deleted file mode 100644
index fb4ed2e55e4fd6..00000000000000
--- a/patches.renesas/0213-media-v4l-Define-a-pixel-format-for-the-R-Car-VSP1-2.patch
+++ /dev/null
@@ -1,179 +0,0 @@
-From 69f764f419f6d1c31bfdf23df8f39760e7faf332 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Tue, 6 Sep 2016 11:38:55 -0300
-Subject: [PATCH 213/286] [media] v4l: Define a pixel format for the R-Car VSP1
- 2-D histogram engine
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The format is used on the R-Car VSP1 video queues that carry
-2-D histogram statistics data.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 5deb1c04c9f2cc3fe4b355a55a8fad244683a54a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/media/uapi/v4l/meta-formats.rst         |    1 
- Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgt.rst |  120 ++++++++++++++++++
- drivers/media/v4l2-core/v4l2-ioctl.c                  |    1 
- include/uapi/linux/videodev2.h                        |    3 
- 4 files changed, 124 insertions(+), 1 deletion(-)
- create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgt.rst
-
---- a/Documentation/media/uapi/v4l/meta-formats.rst
-+++ b/Documentation/media/uapi/v4l/meta-formats.rst
-@@ -13,3 +13,4 @@ These formats are used for the :ref:`met
-     :maxdepth: 1
- 
-     pixfmt-meta-vsp1-hgo
-+    pixfmt-meta-vsp1-hgt
---- /dev/null
-+++ b/Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgt.rst
-@@ -0,0 +1,120 @@
-+.. -*- coding: utf-8; mode: rst -*-
-+
-+.. _v4l2-meta-fmt-vsp1-hgt:
-+
-+*******************************
-+V4L2_META_FMT_VSP1_HGT ('VSPT')
-+*******************************
-+
-+Renesas R-Car VSP1 2-D Histogram Data
-+
-+
-+Description
-+===========
-+
-+This format describes histogram data generated by the Renesas R-Car VSP1
-+2-D Histogram (HGT) engine.
-+
-+The VSP1 HGT is a histogram computation engine that operates on HSV
-+data. It operates on a possibly cropped and subsampled input image and
-+computes the sum, maximum and minimum of the S component as well as a
-+weighted frequency histogram based on the H and S components.
-+
-+The histogram is a matrix of 6 Hue and 32 Saturation buckets, 192 in
-+total. Each HSV value is added to one or more buckets with a weight
-+between 1 and 16 depending on the Hue areas configuration. Finding the
-+corresponding buckets is done by inspecting the H and S value independently.
-+
-+The Saturation position **n** (0 - 31) of the bucket in the matrix is
-+found by the expression:
-+
-+    n = S / 8
-+
-+The Hue position **m** (0 - 5) of the bucket in the matrix depends on
-+how the HGT Hue areas are configured. There are 6 user configurable Hue
-+Areas which can be configured to cover overlapping Hue values:
-+
-+::
-+
-+         Area 0       Area 1       Area 2       Area 3       Area 4       Area 5
-+        ________     ________     ________     ________     ________     ________
-+   \   /|      |\   /|      |\   /|      |\   /|      |\   /|      |\   /|      |\   /
-+    \ / |      | \ / |      | \ / |      | \ / |      | \ / |      | \ / |      | \ /
-+     X  |      |  X  |      |  X  |      |  X  |      |  X  |      |  X  |      |  X
-+    / \ |      | / \ |      | / \ |      | / \ |      | / \ |      | / \ |      | / \
-+   /   \|      |/   \|      |/   \|      |/   \|      |/   \|      |/   \|      |/   \
-+  5U   0L      0U   1L      1U   2L      2U   3L      3U   4L      4U   5L      5U   0L
-+        <0..............................Hue Value............................255>
-+
-+When two consecutive areas don't overlap (n+1L is equal to nU) the boundary
-+value is considered as part of the lower area.
-+
-+Pixels with a hue value included in the centre of an area (between nL and nU
-+included) are attributed to that single area and given a weight of 16. Pixels
-+with a hue value included in the overlapping region between two areas (between
-+n+1L and nU excluded) are attributed to both areas and given a weight for each
-+of these areas proportional to their position along the diagonal lines
-+(rounded down).
-+
-+The Hue area setup must match one of the following constrains:
-+
-+::
-+
-+    0L <= 0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <= 5U
-+
-+::
-+
-+    0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <= 5U <= 0L
-+
-+**Byte Order.**
-+All data is stored in memory in little endian format. Each cell in the tables
-+contains one byte.
-+
-+.. flat-table:: VSP1 HGT Data - (776 bytes)
-+    :header-rows:  2
-+    :stub-columns: 0
-+
-+    * - Offset
-+      - :cspan:`4` Memory
-+    * -
-+      - [31:24]
-+      - [23:16]
-+      - [15:8]
-+      - [7:0]
-+    * - 0
-+      - -
-+      - S max [7:0]
-+      - -
-+      - S min [7:0]
-+    * - 4
-+      - :cspan:`4` S sum [31:0]
-+    * - 8
-+      - :cspan:`4` Histogram bucket (m=0, n=0) [31:0]
-+    * - 12
-+      - :cspan:`4` Histogram bucket (m=0, n=1) [31:0]
-+    * -
-+      - :cspan:`4` ...
-+    * - 132
-+      - :cspan:`4` Histogram bucket (m=0, n=31) [31:0]
-+    * - 136
-+      - :cspan:`4` Histogram bucket (m=1, n=0) [31:0]
-+    * -
-+      - :cspan:`4` ...
-+    * - 264
-+      - :cspan:`4` Histogram bucket (m=2, n=0) [31:0]
-+    * -
-+      - :cspan:`4` ...
-+    * - 392
-+      - :cspan:`4` Histogram bucket (m=3, n=0) [31:0]
-+    * -
-+      - :cspan:`4` ...
-+    * - 520
-+      - :cspan:`4` Histogram bucket (m=4, n=0) [31:0]
-+    * -
-+      - :cspan:`4` ...
-+    * - 648
-+      - :cspan:`4` Histogram bucket (m=5, n=0) [31:0]
-+    * -
-+      - :cspan:`4` ...
-+    * - 772
-+      - :cspan:`4` Histogram bucket (m=5, n=31) [31:0]
---- a/drivers/media/v4l2-core/v4l2-ioctl.c
-+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
-@@ -1266,6 +1266,7 @@ static void v4l_fill_fmtdesc(struct v4l2
- 	case V4L2_TCH_FMT_TU16:		descr = "16-bit unsigned touch data"; break;
- 	case V4L2_TCH_FMT_TU08:		descr = "8-bit unsigned touch data"; break;
- 	case V4L2_META_FMT_VSP1_HGO:	descr = "R-Car VSP1 1-D Histogram"; break;
-+	case V4L2_META_FMT_VSP1_HGT:	descr = "R-Car VSP1 2-D Histogram"; break;
- 
- 	default:
- 		/* Compressed formats */
---- a/include/uapi/linux/videodev2.h
-+++ b/include/uapi/linux/videodev2.h
-@@ -673,7 +673,8 @@ struct v4l2_pix_format {
- #define V4L2_TCH_FMT_TU08	v4l2_fourcc('T', 'U', '0', '8') /* 8-bit unsigned touch data */
- 
- /* Meta-data formats */
--#define V4L2_META_FMT_VSP1_HGO    v4l2_fourcc('V', 'S', 'P', 'H') /* R-Car VSP1 Histogram */
-+#define V4L2_META_FMT_VSP1_HGO    v4l2_fourcc('V', 'S', 'P', 'H') /* R-Car VSP1 1-D Histogram */
-+#define V4L2_META_FMT_VSP1_HGT    v4l2_fourcc('V', 'S', 'P', 'T') /* R-Car VSP1 2-D Histogram */
- 
- /* priv field value to indicates that subsequent fields are valid. */
- #define V4L2_PIX_FMT_PRIV_MAGIC		0xfeedcafe
diff --git a/patches.renesas/0213-xhci-refactor-xhci_urb_enqueue.patch b/patches.renesas/0213-xhci-refactor-xhci_urb_enqueue.patch
deleted file mode 100644
index 847406fd5066df..00000000000000
--- a/patches.renesas/0213-xhci-refactor-xhci_urb_enqueue.patch
+++ /dev/null
@@ -1,141 +0,0 @@
-From 5e5a6008f3024ed20a17fce204e5167555b0aa41 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Mon, 23 Jan 2017 14:20:27 +0200
-Subject: [PATCH 213/255] xhci: refactor xhci_urb_enqueue
-
-Use switch instead of several if statements
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 6969408de2681e1f9dfaed0b311d067ce3c75474)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci.c |   93 +++++++++++++++++++-----------------------------
- 1 file changed, 37 insertions(+), 56 deletions(-)
-
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -1379,7 +1379,7 @@ int xhci_urb_enqueue(struct usb_hcd *hcd
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
- 	unsigned long flags;
- 	int ret = 0;
--	unsigned int slot_id, ep_index;
-+	unsigned int slot_id, ep_index, ep_state;
- 	struct urb_priv	*urb_priv;
- 	int num_tds;
- 
-@@ -1393,8 +1393,7 @@ int xhci_urb_enqueue(struct usb_hcd *hcd
- 	if (!HCD_HW_ACCESSIBLE(hcd)) {
- 		if (!in_interrupt())
- 			xhci_dbg(xhci, "urb submitted during PCI suspend\n");
--		ret = -ESHUTDOWN;
--		goto exit;
-+		return -ESHUTDOWN;
- 	}
- 
- 	if (usb_endpoint_xfer_isoc(&urb->ep->desc))
-@@ -1431,69 +1430,51 @@ int xhci_urb_enqueue(struct usb_hcd *hcd
- 				return ret;
- 			}
- 		}
-+	}
- 
--		/* We have a spinlock and interrupts disabled, so we must pass
--		 * atomic context to this function, which may allocate memory.
--		 */
--		spin_lock_irqsave(&xhci->lock, flags);
--		if (xhci->xhc_state & XHCI_STATE_DYING)
--			goto dying;
-+	spin_lock_irqsave(&xhci->lock, flags);
-+
-+	if (xhci->xhc_state & XHCI_STATE_DYING) {
-+		xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for non-responsive xHCI host.\n",
-+			 urb->ep->desc.bEndpointAddress, urb);
-+		ret = -ESHUTDOWN;
-+		goto free_priv;
-+	}
-+
-+	switch (usb_endpoint_type(&urb->ep->desc)) {
-+
-+	case USB_ENDPOINT_XFER_CONTROL:
- 		ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
--				slot_id, ep_index);
--		if (ret)
--			goto free_priv;
--		spin_unlock_irqrestore(&xhci->lock, flags);
--	} else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
--		spin_lock_irqsave(&xhci->lock, flags);
--		if (xhci->xhc_state & XHCI_STATE_DYING)
--			goto dying;
--		if (xhci->devs[slot_id]->eps[ep_index].ep_state &
--				EP_GETTING_STREAMS) {
--			xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
--					"is transitioning to using streams.\n");
--			ret = -EINVAL;
--		} else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
--				EP_GETTING_NO_STREAMS) {
--			xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
--					"is transitioning to "
--					"not having streams.\n");
-+					 slot_id, ep_index);
-+		break;
-+	case USB_ENDPOINT_XFER_BULK:
-+		ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
-+		if (ep_state & (EP_GETTING_STREAMS | EP_GETTING_NO_STREAMS)) {
-+			xhci_warn(xhci, "WARN: Can't enqueue URB, ep in streams transition state %x\n",
-+				  ep_state);
- 			ret = -EINVAL;
--		} else {
--			ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
--					slot_id, ep_index);
-+			break;
- 		}
--		if (ret)
--			goto free_priv;
--		spin_unlock_irqrestore(&xhci->lock, flags);
--	} else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
--		spin_lock_irqsave(&xhci->lock, flags);
--		if (xhci->xhc_state & XHCI_STATE_DYING)
--			goto dying;
-+		ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
-+					 slot_id, ep_index);
-+		break;
-+
-+
-+	case USB_ENDPOINT_XFER_INT:
- 		ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
- 				slot_id, ep_index);
--		if (ret)
--			goto free_priv;
--		spin_unlock_irqrestore(&xhci->lock, flags);
--	} else {
--		spin_lock_irqsave(&xhci->lock, flags);
--		if (xhci->xhc_state & XHCI_STATE_DYING)
--			goto dying;
-+		break;
-+
-+	case USB_ENDPOINT_XFER_ISOC:
- 		ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
- 				slot_id, ep_index);
--		if (ret)
--			goto free_priv;
--		spin_unlock_irqrestore(&xhci->lock, flags);
- 	}
--exit:
--	return ret;
--dying:
--	xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
--			"non-responsive xHCI host.\n",
--			urb->ep->desc.bEndpointAddress, urb);
--	ret = -ESHUTDOWN;
-+
-+	if (ret) {
- free_priv:
--	xhci_urb_free_priv(urb_priv);
--	urb->hcpriv = NULL;
-+		xhci_urb_free_priv(urb_priv);
-+		urb->hcpriv = NULL;
-+	}
- 	spin_unlock_irqrestore(&xhci->lock, flags);
- 	return ret;
- }
diff --git a/patches.renesas/0214-ARM-dts-r8a7791-Correct-SCIFB-reg-properties-to-cove.patch b/patches.renesas/0214-ARM-dts-r8a7791-Correct-SCIFB-reg-properties-to-cove.patch
deleted file mode 100644
index bb3d141067dd5b..00000000000000
--- a/patches.renesas/0214-ARM-dts-r8a7791-Correct-SCIFB-reg-properties-to-cove.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 64cbc62c56350020b93f77d391505d8aee2be26a Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 19 Sep 2016 16:18:54 +0200
-Subject: [PATCH 214/299] ARM: dts: r8a7791: Correct SCIFB reg properties to
- cover all registers
-
-Several SCIFB registers reside outside the reported register ranges.
-Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
-ioremap().
-
-Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
-SH/R-Mobile SoCs.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5f25f9f52e1954d3ccec43976e10ea1a8075e536)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi |    6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -701,7 +701,7 @@
- 	scifb0: serial@e6c20000 {
- 		compatible = "renesas,scifb-r8a7791",
- 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
--		reg = <0 0xe6c20000 0 64>;
-+		reg = <0 0xe6c20000 0 0x100>;
- 		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>;
- 		clock-names = "fck";
-@@ -715,7 +715,7 @@
- 	scifb1: serial@e6c30000 {
- 		compatible = "renesas,scifb-r8a7791",
- 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
--		reg = <0 0xe6c30000 0 64>;
-+		reg = <0 0xe6c30000 0 0x100>;
- 		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>;
- 		clock-names = "fck";
-@@ -729,7 +729,7 @@
- 	scifb2: serial@e6ce0000 {
- 		compatible = "renesas,scifb-r8a7791",
- 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
--		reg = <0 0xe6ce0000 0 64>;
-+		reg = <0 0xe6ce0000 0 0x100>;
- 		interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>;
- 		clock-names = "fck";
diff --git a/patches.renesas/0214-media-v4l-vsp1-Add-HGT-support.patch b/patches.renesas/0214-media-v4l-vsp1-Add-HGT-support.patch
deleted file mode 100644
index d6fc1033883bdc..00000000000000
--- a/patches.renesas/0214-media-v4l-vsp1-Add-HGT-support.patch
+++ /dev/null
@@ -1,567 +0,0 @@
-From 46fb484fe23b9463b2e5fbc3e23252cd1060903c Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
- <niklas.soderlund+renesas@ragnatech.se>
-Date: Tue, 6 Sep 2016 11:38:56 -0300
-Subject: [PATCH 214/286] [media] v4l: vsp1: Add HGT support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The HGT is a Histogram Generator Two-Dimensions. It computes a weighted
-frequency histograms for hue and saturation areas over a configurable
-region of the image with optional subsampling.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 0ac702d5b903d441ef64e61f453de7c0ce1322fa)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/Makefile      |    2 
- drivers/media/platform/vsp1/vsp1.h        |    3 
- drivers/media/platform/vsp1/vsp1_drv.c    |   32 +++-
- drivers/media/platform/vsp1/vsp1_entity.c |   14 +
- drivers/media/platform/vsp1/vsp1_hgt.c    |  222 ++++++++++++++++++++++++++++++
- drivers/media/platform/vsp1/vsp1_hgt.h    |   42 +++++
- drivers/media/platform/vsp1/vsp1_pipe.c   |   16 ++
- drivers/media/platform/vsp1/vsp1_pipe.h   |    2 
- drivers/media/platform/vsp1/vsp1_regs.h   |    9 +
- drivers/media/platform/vsp1/vsp1_video.c  |    6 
- 10 files changed, 343 insertions(+), 5 deletions(-)
- create mode 100644 drivers/media/platform/vsp1/vsp1_hgt.c
- create mode 100644 drivers/media/platform/vsp1/vsp1_hgt.h
-
---- a/drivers/media/platform/vsp1/Makefile
-+++ b/drivers/media/platform/vsp1/Makefile
-@@ -3,7 +3,7 @@ vsp1-y					+= vsp1_dl.o vsp1_drm.o vsp1_
- vsp1-y					+= vsp1_rpf.o vsp1_rwpf.o vsp1_wpf.o
- vsp1-y					+= vsp1_clu.o vsp1_hsit.o vsp1_lut.o
- vsp1-y					+= vsp1_bru.o vsp1_sru.o vsp1_uds.o
--vsp1-y					+= vsp1_hgo.o vsp1_histo.o
-+vsp1-y					+= vsp1_hgo.o vsp1_hgt.o vsp1_histo.o
- vsp1-y					+= vsp1_lif.o
- 
- obj-$(CONFIG_VIDEO_RENESAS_VSP1)	+= vsp1.o
---- a/drivers/media/platform/vsp1/vsp1.h
-+++ b/drivers/media/platform/vsp1/vsp1.h
-@@ -33,6 +33,7 @@ struct vsp1_platform_data;
- struct vsp1_bru;
- struct vsp1_clu;
- struct vsp1_hgo;
-+struct vsp1_hgt;
- struct vsp1_hsit;
- struct vsp1_lif;
- struct vsp1_lut;
-@@ -52,6 +53,7 @@ struct vsp1_uds;
- #define VSP1_HAS_WPF_VFLIP	(1 << 5)
- #define VSP1_HAS_WPF_HFLIP	(1 << 6)
- #define VSP1_HAS_HGO		(1 << 7)
-+#define VSP1_HAS_HGT		(1 << 8)
- 
- struct vsp1_device_info {
- 	u32 version;
-@@ -76,6 +78,7 @@ struct vsp1_device {
- 	struct vsp1_bru *bru;
- 	struct vsp1_clu *clu;
- 	struct vsp1_hgo *hgo;
-+	struct vsp1_hgt *hgt;
- 	struct vsp1_hsit *hsi;
- 	struct vsp1_hsit *hst;
- 	struct vsp1_lif *lif;
---- a/drivers/media/platform/vsp1/vsp1_drv.c
-+++ b/drivers/media/platform/vsp1/vsp1_drv.c
-@@ -31,6 +31,7 @@
- #include "vsp1_dl.h"
- #include "vsp1_drm.h"
- #include "vsp1_hgo.h"
-+#include "vsp1_hgt.h"
- #include "vsp1_hsit.h"
- #include "vsp1_lif.h"
- #include "vsp1_lut.h"
-@@ -161,6 +162,16 @@ static int vsp1_uapi_create_links(struct
- 			return ret;
- 	}
- 
-+	if (vsp1->hgt) {
-+		ret = media_create_pad_link(&vsp1->hgt->histo.entity.subdev.entity,
-+					    HISTO_PAD_SOURCE,
-+					    &vsp1->hgt->histo.video.entity, 0,
-+					    MEDIA_LNK_FL_ENABLED |
-+					    MEDIA_LNK_FL_IMMUTABLE);
-+		if (ret < 0)
-+			return ret;
-+	}
-+
- 	if (vsp1->lif) {
- 		ret = media_create_pad_link(&vsp1->wpf[0]->entity.subdev.entity,
- 					    RWPF_PAD_SOURCE,
-@@ -305,6 +316,17 @@ static int vsp1_create_entities(struct v
- 			      &vsp1->entities);
- 	}
- 
-+	if (vsp1->info->features & VSP1_HAS_HGT && vsp1->info->uapi) {
-+		vsp1->hgt = vsp1_hgt_create(vsp1);
-+		if (IS_ERR(vsp1->hgt)) {
-+			ret = PTR_ERR(vsp1->hgt);
-+			goto done;
-+		}
-+
-+		list_add_tail(&vsp1->hgt->histo.entity.list_dev,
-+			      &vsp1->entities);
-+	}
-+
- 	/*
- 	 * The LIF is only supported when used in conjunction with the DU, in
- 	 * which case the userspace API is disabled. If the userspace API is
-@@ -603,7 +625,8 @@ static const struct vsp1_device_info vsp
- 		.model = "VSP1-S",
- 		.gen = 2,
- 		.features = VSP1_HAS_BRU | VSP1_HAS_CLU | VSP1_HAS_HGO
--			  | VSP1_HAS_LUT | VSP1_HAS_SRU | VSP1_HAS_WPF_VFLIP,
-+			  | VSP1_HAS_HGT | VSP1_HAS_LUT | VSP1_HAS_SRU
-+			  | VSP1_HAS_WPF_VFLIP,
- 		.rpf_count = 5,
- 		.uds_count = 3,
- 		.wpf_count = 4,
-@@ -635,7 +658,8 @@ static const struct vsp1_device_info vsp
- 		.model = "VSP1-S",
- 		.gen = 2,
- 		.features = VSP1_HAS_BRU | VSP1_HAS_CLU | VSP1_HAS_HGO
--			  | VSP1_HAS_LUT | VSP1_HAS_SRU | VSP1_HAS_WPF_VFLIP,
-+			  | VSP1_HAS_HGT | VSP1_HAS_LUT | VSP1_HAS_SRU
-+			  | VSP1_HAS_WPF_VFLIP,
- 		.rpf_count = 5,
- 		.uds_count = 1,
- 		.wpf_count = 4,
-@@ -667,8 +691,8 @@ static const struct vsp1_device_info vsp
- 		.version = VI6_IP_VERSION_MODEL_VSPI_GEN3,
- 		.model = "VSP2-I",
- 		.gen = 3,
--		.features = VSP1_HAS_CLU | VSP1_HAS_HGO | VSP1_HAS_LUT
--			  | VSP1_HAS_SRU | VSP1_HAS_WPF_HFLIP
-+		.features = VSP1_HAS_CLU | VSP1_HAS_HGO | VSP1_HAS_HGT
-+			  | VSP1_HAS_LUT | VSP1_HAS_SRU | VSP1_HAS_WPF_HFLIP
- 			  | VSP1_HAS_WPF_VFLIP,
- 		.rpf_count = 1,
- 		.uds_count = 1,
---- a/drivers/media/platform/vsp1/vsp1_entity.c
-+++ b/drivers/media/platform/vsp1/vsp1_entity.c
-@@ -50,6 +50,19 @@ void vsp1_entity_route_setup(struct vsp1
- 
- 		vsp1_dl_list_write(dl, VI6_DPR_HGO_SMPPT, smppt);
- 		return;
-+	} else if (entity->type == VSP1_ENTITY_HGT) {
-+		u32 smppt;
-+
-+		/*
-+		 * The HGT is a special case, its routing is configured on the
-+		 * sink pad.
-+		 */
-+		source = media_entity_to_vsp1_entity(entity->sources[0]);
-+		smppt = (pipe->output->entity.index << VI6_DPR_SMPPT_TGW_SHIFT)
-+		      | (source->route->output << VI6_DPR_SMPPT_PT_SHIFT);
-+
-+		vsp1_dl_list_write(dl, VI6_DPR_HGT_SMPPT, smppt);
-+		return;
- 	}
- 
- 	source = entity;
-@@ -443,6 +456,7 @@ static const struct vsp1_route vsp1_rout
- 	    VI6_DPR_NODE_BRU_IN(4) }, VI6_DPR_NODE_BRU_OUT },
- 	VSP1_ENTITY_ROUTE(CLU),
- 	{ VSP1_ENTITY_HGO, 0, 0, { 0, }, 0 },
-+	{ VSP1_ENTITY_HGT, 0, 0, { 0, }, 0 },
- 	VSP1_ENTITY_ROUTE(HSI),
- 	VSP1_ENTITY_ROUTE(HST),
- 	{ VSP1_ENTITY_LIF, 0, 0, { VI6_DPR_NODE_LIF, }, VI6_DPR_NODE_LIF },
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_hgt.c
-@@ -0,0 +1,222 @@
-+/*
-+ * vsp1_hgt.c  --  R-Car VSP1 Histogram Generator 2D
-+ *
-+ * Copyright (C) 2016 Renesas Electronics Corporation
-+ *
-+ * Contact: Niklas Söderlund (niklas.soderlund@ragnatech.se)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/device.h>
-+#include <linux/gfp.h>
-+
-+#include <media/v4l2-subdev.h>
-+#include <media/videobuf2-vmalloc.h>
-+
-+#include "vsp1.h"
-+#include "vsp1_dl.h"
-+#include "vsp1_hgt.h"
-+
-+#define HGT_DATA_SIZE				((2 +  6 * 32) * 4)
-+
-+/* -----------------------------------------------------------------------------
-+ * Device Access
-+ */
-+
-+static inline u32 vsp1_hgt_read(struct vsp1_hgt *hgt, u32 reg)
-+{
-+	return vsp1_read(hgt->histo.entity.vsp1, reg);
-+}
-+
-+static inline void vsp1_hgt_write(struct vsp1_hgt *hgt, struct vsp1_dl_list *dl,
-+				  u32 reg, u32 data)
-+{
-+	vsp1_dl_list_write(dl, reg, data);
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Frame End Handler
-+ */
-+
-+void vsp1_hgt_frame_end(struct vsp1_entity *entity)
-+{
-+	struct vsp1_hgt *hgt = to_hgt(&entity->subdev);
-+	struct vsp1_histogram_buffer *buf;
-+	unsigned int m;
-+	unsigned int n;
-+	u32 *data;
-+
-+	buf = vsp1_histogram_buffer_get(&hgt->histo);
-+	if (!buf)
-+		return;
-+
-+	data = buf->addr;
-+
-+	*data++ = vsp1_hgt_read(hgt, VI6_HGT_MAXMIN);
-+	*data++ = vsp1_hgt_read(hgt, VI6_HGT_SUM);
-+
-+	for (m = 0; m < 6; ++m)
-+		for (n = 0; n < 32; ++n)
-+			*data++ = vsp1_hgt_read(hgt, VI6_HGT_HISTO(m, n));
-+
-+	vsp1_histogram_buffer_complete(&hgt->histo, buf, HGT_DATA_SIZE);
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Controls
-+ */
-+
-+#define V4L2_CID_VSP1_HGT_HUE_AREAS	(V4L2_CID_USER_BASE | 0x1001)
-+
-+static int hgt_hue_areas_try_ctrl(struct v4l2_ctrl *ctrl)
-+{
-+	const u8 *values = ctrl->p_new.p_u8;
-+	unsigned int i;
-+
-+	/*
-+	 * The hardware has constraints on the hue area boundaries beyond the
-+	 * control min, max and step. The values must match one of the following
-+	 * expressions.
-+	 *
-+	 * 0L <= 0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <= 5U
-+	 * 0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <= 5U <= 0L
-+	 *
-+	 * Start by verifying the common part...
-+	 */
-+	for (i = 1; i < (HGT_NUM_HUE_AREAS * 2) - 1; ++i) {
-+		if (values[i] > values[i+1])
-+			return -EINVAL;
-+	}
-+
-+	/* ... and handle 0L separately. */
-+	if (values[0] > values[1] && values[11] > values[0])
-+		return -EINVAL;
-+
-+	return 0;
-+}
-+
-+static int hgt_hue_areas_s_ctrl(struct v4l2_ctrl *ctrl)
-+{
-+	struct vsp1_hgt *hgt = container_of(ctrl->handler, struct vsp1_hgt,
-+					    ctrls);
-+
-+	memcpy(hgt->hue_areas, ctrl->p_new.p_u8, sizeof(hgt->hue_areas));
-+	return 0;
-+}
-+
-+static const struct v4l2_ctrl_ops hgt_hue_areas_ctrl_ops = {
-+	.try_ctrl = hgt_hue_areas_try_ctrl,
-+	.s_ctrl = hgt_hue_areas_s_ctrl,
-+};
-+
-+static const struct v4l2_ctrl_config hgt_hue_areas = {
-+	.ops = &hgt_hue_areas_ctrl_ops,
-+	.id = V4L2_CID_VSP1_HGT_HUE_AREAS,
-+	.name = "Boundary Values for Hue Area",
-+	.type = V4L2_CTRL_TYPE_U8,
-+	.min = 0,
-+	.max = 255,
-+	.def = 0,
-+	.step = 1,
-+	.dims = { 12 },
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * VSP1 Entity Operations
-+ */
-+
-+static void hgt_configure(struct vsp1_entity *entity,
-+			  struct vsp1_pipeline *pipe,
-+			  struct vsp1_dl_list *dl,
-+			  enum vsp1_entity_params params)
-+{
-+	struct vsp1_hgt *hgt = to_hgt(&entity->subdev);
-+	struct v4l2_rect *compose;
-+	struct v4l2_rect *crop;
-+	unsigned int hratio;
-+	unsigned int vratio;
-+	u8 lower;
-+	u8 upper;
-+	unsigned int i;
-+
-+	if (params != VSP1_ENTITY_PARAMS_INIT)
-+		return;
-+
-+	crop = vsp1_entity_get_pad_selection(entity, entity->config,
-+					     HISTO_PAD_SINK, V4L2_SEL_TGT_CROP);
-+	compose = vsp1_entity_get_pad_selection(entity, entity->config,
-+						HISTO_PAD_SINK,
-+						V4L2_SEL_TGT_COMPOSE);
-+
-+	vsp1_hgt_write(hgt, dl, VI6_HGT_REGRST, VI6_HGT_REGRST_RCLEA);
-+
-+	vsp1_hgt_write(hgt, dl, VI6_HGT_OFFSET,
-+		       (crop->left << VI6_HGT_OFFSET_HOFFSET_SHIFT) |
-+		       (crop->top << VI6_HGT_OFFSET_VOFFSET_SHIFT));
-+	vsp1_hgt_write(hgt, dl, VI6_HGT_SIZE,
-+		       (crop->width << VI6_HGT_SIZE_HSIZE_SHIFT) |
-+		       (crop->height << VI6_HGT_SIZE_VSIZE_SHIFT));
-+
-+	mutex_lock(hgt->ctrls.lock);
-+	for (i = 0; i < HGT_NUM_HUE_AREAS; ++i) {
-+		lower = hgt->hue_areas[i*2 + 0];
-+		upper = hgt->hue_areas[i*2 + 1];
-+		vsp1_hgt_write(hgt, dl, VI6_HGT_HUE_AREA(i),
-+			       (lower << VI6_HGT_HUE_AREA_LOWER_SHIFT) |
-+			       (upper << VI6_HGT_HUE_AREA_UPPER_SHIFT));
-+	}
-+	mutex_unlock(hgt->ctrls.lock);
-+
-+	hratio = crop->width * 2 / compose->width / 3;
-+	vratio = crop->height * 2 / compose->height / 3;
-+	vsp1_hgt_write(hgt, dl, VI6_HGT_MODE,
-+		       (hratio << VI6_HGT_MODE_HRATIO_SHIFT) |
-+		       (vratio << VI6_HGT_MODE_VRATIO_SHIFT));
-+}
-+
-+static const struct vsp1_entity_operations hgt_entity_ops = {
-+	.configure = hgt_configure,
-+	.destroy = vsp1_histogram_destroy,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Initialization and Cleanup
-+ */
-+
-+static const unsigned int hgt_mbus_formats[] = {
-+	MEDIA_BUS_FMT_AHSV8888_1X32,
-+};
-+
-+struct vsp1_hgt *vsp1_hgt_create(struct vsp1_device *vsp1)
-+{
-+	struct vsp1_hgt *hgt;
-+	int ret;
-+
-+	hgt = devm_kzalloc(vsp1->dev, sizeof(*hgt), GFP_KERNEL);
-+	if (hgt == NULL)
-+		return ERR_PTR(-ENOMEM);
-+
-+	/* Initialize the control handler. */
-+	v4l2_ctrl_handler_init(&hgt->ctrls, 1);
-+	v4l2_ctrl_new_custom(&hgt->ctrls, &hgt_hue_areas, NULL);
-+
-+	hgt->histo.entity.subdev.ctrl_handler = &hgt->ctrls;
-+
-+	/* Initialize the video device and queue for statistics data. */
-+	ret = vsp1_histogram_init(vsp1, &hgt->histo, VSP1_ENTITY_HGT, "hgt",
-+				  &hgt_entity_ops, hgt_mbus_formats,
-+				  ARRAY_SIZE(hgt_mbus_formats),
-+				  HGT_DATA_SIZE, V4L2_META_FMT_VSP1_HGT);
-+	if (ret < 0) {
-+		vsp1_entity_destroy(&hgt->histo.entity);
-+		return ERR_PTR(ret);
-+	}
-+
-+	v4l2_ctrl_handler_setup(&hgt->ctrls);
-+
-+	return hgt;
-+}
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_hgt.h
-@@ -0,0 +1,42 @@
-+/*
-+ * vsp1_hgt.h  --  R-Car VSP1 Histogram Generator 2D
-+ *
-+ * Copyright (C) 2016 Renesas Electronics Corporation
-+ *
-+ * Contact: Niklas Söderlund (niklas.soderlund@ragnatech.se)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+#ifndef __VSP1_HGT_H__
-+#define __VSP1_HGT_H__
-+
-+#include <media/media-entity.h>
-+#include <media/v4l2-ctrls.h>
-+#include <media/v4l2-subdev.h>
-+
-+#include "vsp1_histo.h"
-+
-+struct vsp1_device;
-+
-+#define HGT_NUM_HUE_AREAS			6
-+
-+struct vsp1_hgt {
-+	struct vsp1_histogram histo;
-+
-+	struct v4l2_ctrl_handler ctrls;
-+
-+	u8 hue_areas[HGT_NUM_HUE_AREAS * 2];
-+};
-+
-+static inline struct vsp1_hgt *to_hgt(struct v4l2_subdev *subdev)
-+{
-+	return container_of(subdev, struct vsp1_hgt, histo.entity.subdev);
-+}
-+
-+struct vsp1_hgt *vsp1_hgt_create(struct vsp1_device *vsp1);
-+void vsp1_hgt_frame_end(struct vsp1_entity *hgt);
-+
-+#endif /* __VSP1_HGT_H__ */
---- a/drivers/media/platform/vsp1/vsp1_pipe.c
-+++ b/drivers/media/platform/vsp1/vsp1_pipe.c
-@@ -24,6 +24,7 @@
- #include "vsp1_dl.h"
- #include "vsp1_entity.h"
- #include "vsp1_hgo.h"
-+#include "vsp1_hgt.h"
- #include "vsp1_pipe.h"
- #include "vsp1_rwpf.h"
- #include "vsp1_uds.h"
-@@ -211,12 +212,19 @@ void vsp1_pipeline_reset(struct vsp1_pip
- 		hgo->histo.pipe = NULL;
- 	}
- 
-+	if (pipe->hgt) {
-+		struct vsp1_hgt *hgt = to_hgt(&pipe->hgt->subdev);
-+
-+		hgt->histo.pipe = NULL;
-+	}
-+
- 	INIT_LIST_HEAD(&pipe->entities);
- 	pipe->state = VSP1_PIPELINE_STOPPED;
- 	pipe->buffers_ready = 0;
- 	pipe->num_inputs = 0;
- 	pipe->bru = NULL;
- 	pipe->hgo = NULL;
-+	pipe->hgt = NULL;
- 	pipe->lif = NULL;
- 	pipe->uds = NULL;
- }
-@@ -299,6 +307,11 @@ int vsp1_pipeline_stop(struct vsp1_pipel
- 			   (7 << VI6_DPR_SMPPT_TGW_SHIFT) |
- 			   (VI6_DPR_NODE_UNUSED << VI6_DPR_SMPPT_PT_SHIFT));
- 
-+	if (pipe->hgt)
-+		vsp1_write(vsp1, VI6_DPR_HGT_SMPPT,
-+			   (7 << VI6_DPR_SMPPT_TGW_SHIFT) |
-+			   (VI6_DPR_NODE_UNUSED << VI6_DPR_SMPPT_PT_SHIFT));
-+
- 	v4l2_subdev_call(&pipe->output->entity.subdev, video, s_stream, 0);
- 
- 	return ret;
-@@ -325,6 +338,9 @@ void vsp1_pipeline_frame_end(struct vsp1
- 	if (pipe->hgo)
- 		vsp1_hgo_frame_end(pipe->hgo);
- 
-+	if (pipe->hgt)
-+		vsp1_hgt_frame_end(pipe->hgt);
-+
- 	if (pipe->frame_end)
- 		pipe->frame_end(pipe);
- 
---- a/drivers/media/platform/vsp1/vsp1_pipe.h
-+++ b/drivers/media/platform/vsp1/vsp1_pipe.h
-@@ -74,6 +74,7 @@ enum vsp1_pipeline_state {
-  * @output: WPF at the output of the pipeline
-  * @bru: BRU entity, if present
-  * @hgo: HGO entity, if present
-+ * @hgt: HGT entity, if present
-  * @lif: LIF entity, if present
-  * @uds: UDS entity, if present
-  * @uds_input: entity at the input of the UDS, if the UDS is present
-@@ -103,6 +104,7 @@ struct vsp1_pipeline {
- 	struct vsp1_rwpf *output;
- 	struct vsp1_entity *bru;
- 	struct vsp1_entity *hgo;
-+	struct vsp1_entity *hgt;
- 	struct vsp1_entity *lif;
- 	struct vsp1_entity *uds;
- 	struct vsp1_entity *uds_input;
---- a/drivers/media/platform/vsp1/vsp1_regs.h
-+++ b/drivers/media/platform/vsp1/vsp1_regs.h
-@@ -628,9 +628,17 @@
-  */
- 
- #define VI6_HGT_OFFSET			0x3400
-+#define VI6_HGT_OFFSET_HOFFSET_SHIFT	16
-+#define VI6_HGT_OFFSET_VOFFSET_SHIFT	0
- #define VI6_HGT_SIZE			0x3404
-+#define VI6_HGT_SIZE_HSIZE_SHIFT	16
-+#define VI6_HGT_SIZE_VSIZE_SHIFT	0
- #define VI6_HGT_MODE			0x3408
-+#define VI6_HGT_MODE_HRATIO_SHIFT	2
-+#define VI6_HGT_MODE_VRATIO_SHIFT	0
- #define VI6_HGT_HUE_AREA(n)		(0x340c + (n) * 4)
-+#define VI6_HGT_HUE_AREA_LOWER_SHIFT	16
-+#define VI6_HGT_HUE_AREA_UPPER_SHIFT	0
- #define VI6_HGT_LB_TH			0x3424
- #define VI6_HGT_LBn_H(n)		(0x3438 + (n) * 8)
- #define VI6_HGT_LBn_V(n)		(0x342c + (n) * 8)
-@@ -639,6 +647,7 @@
- #define VI6_HGT_SUM			0x3754
- #define VI6_HGT_LB_DET			0x3758
- #define VI6_HGT_REGRST			0x37fc
-+#define VI6_HGT_REGRST_RCLEA		(1 << 0)
- 
- /* -----------------------------------------------------------------------------
-  * LIF Control Registers
---- a/drivers/media/platform/vsp1/vsp1_video.c
-+++ b/drivers/media/platform/vsp1/vsp1_video.c
-@@ -32,6 +32,7 @@
- #include "vsp1_dl.h"
- #include "vsp1_entity.h"
- #include "vsp1_hgo.h"
-+#include "vsp1_hgt.h"
- #include "vsp1_pipe.h"
- #include "vsp1_rwpf.h"
- #include "vsp1_uds.h"
-@@ -607,6 +608,11 @@ static int vsp1_video_pipeline_build(str
- 
- 			pipe->hgo = e;
- 			hgo->histo.pipe = pipe;
-+		} else if (e->type == VSP1_ENTITY_HGT) {
-+			struct vsp1_hgt *hgt = to_hgt(subdev);
-+
-+			pipe->hgt = e;
-+			hgt->histo.pipe = pipe;
- 		}
- 	}
- 
diff --git a/patches.renesas/0215-ARM-dts-r8a7793-Correct-SCIFB-reg-properties-to-cove.patch b/patches.renesas/0215-ARM-dts-r8a7793-Correct-SCIFB-reg-properties-to-cove.patch
deleted file mode 100644
index cc5a627ba55ae5..00000000000000
--- a/patches.renesas/0215-ARM-dts-r8a7793-Correct-SCIFB-reg-properties-to-cove.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From a38ecb3d6595b2e4994667a2ab1345b25954990c Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 19 Sep 2016 16:18:55 +0200
-Subject: [PATCH 215/299] ARM: dts: r8a7793: Correct SCIFB reg properties to
- cover all registers
-
-Several SCIFB registers reside outside the reported register ranges.
-Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
-ioremap().
-
-Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
-SH/R-Mobile SoCs.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 88b8596ba95599fefa5a5f1a709c70796a0e8163)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7793.dtsi |    6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7793.dtsi
-+++ b/arch/arm/boot/dts/r8a7793.dtsi
-@@ -665,7 +665,7 @@
- 	scifb0: serial@e6c20000 {
- 		compatible = "renesas,scifb-r8a7793",
- 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
--		reg = <0 0xe6c20000 0 64>;
-+		reg = <0 0xe6c20000 0 0x100>;
- 		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp2_clks R8A7793_CLK_SCIFB0>;
- 		clock-names = "fck";
-@@ -679,7 +679,7 @@
- 	scifb1: serial@e6c30000 {
- 		compatible = "renesas,scifb-r8a7793",
- 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
--		reg = <0 0xe6c30000 0 64>;
-+		reg = <0 0xe6c30000 0 0x100>;
- 		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp2_clks R8A7793_CLK_SCIFB1>;
- 		clock-names = "fck";
-@@ -693,7 +693,7 @@
- 	scifb2: serial@e6ce0000 {
- 		compatible = "renesas,scifb-r8a7793",
- 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
--		reg = <0 0xe6ce0000 0 64>;
-+		reg = <0 0xe6ce0000 0 0x100>;
- 		interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp2_clks R8A7793_CLK_SCIFB2>;
- 		clock-names = "fck";
diff --git a/patches.renesas/0215-media-videodev.h-add-V4L2_CTRL_FLAG_MODIFY_LAYOUT.patch b/patches.renesas/0215-media-videodev.h-add-V4L2_CTRL_FLAG_MODIFY_LAYOUT.patch
deleted file mode 100644
index 53cb195cd2395e..00000000000000
--- a/patches.renesas/0215-media-videodev.h-add-V4L2_CTRL_FLAG_MODIFY_LAYOUT.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 9d979d0fa80c7756b5f7f55fdfe6af60a46cccae Mon Sep 17 00:00:00 2001
-From: Hans Verkuil <hans.verkuil@cisco.com>
-Date: Mon, 10 Apr 2017 16:15:26 -0300
-Subject: [PATCH 215/286] [media] videodev.h: add V4L2_CTRL_FLAG_MODIFY_LAYOUT
-
-Add new flag to indicate that changing this control will change the
-buffer/mediabus layout as well.
-
-Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
-Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 6df8be763115a0ce6b486ea304742e5646f74287)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/uapi/linux/videodev2.h |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/include/uapi/linux/videodev2.h
-+++ b/include/uapi/linux/videodev2.h
-@@ -1622,6 +1622,7 @@ struct v4l2_querymenu {
- #define V4L2_CTRL_FLAG_VOLATILE		0x0080
- #define V4L2_CTRL_FLAG_HAS_PAYLOAD	0x0100
- #define V4L2_CTRL_FLAG_EXECUTE_ON_WRITE	0x0200
-+#define V4L2_CTRL_FLAG_MODIFY_LAYOUT	0x0400
- 
- /*  Query flags, to be ORed with the control ID */
- #define V4L2_CTRL_FLAG_NEXT_CTRL	0x80000000
diff --git a/patches.renesas/0215-xhci-Set-URB-actual-length-for-stopped-control-trans.patch b/patches.renesas/0215-xhci-Set-URB-actual-length-for-stopped-control-trans.patch
deleted file mode 100644
index f2f63485b5545c..00000000000000
--- a/patches.renesas/0215-xhci-Set-URB-actual-length-for-stopped-control-trans.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From a45cdd1c2e0fc7ad3a81d25a3603c42f2363460d Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Tue, 28 Mar 2017 15:55:29 +0300
-Subject: [PATCH 215/255] xhci: Set URB actual length for stopped control
- transfers
-
-A control transfer that stopped at the status stage incorrectly
-warned about a "unexpected TRB Type 4", and did not set the
-transferred actual_length for the URB.
-
-The URB actual_length for control transfers should contain the
-bytes transferred in the data stage.
-
-Bytes of a partially sent setup stage and missing bytes from
-status stage should be left out.
-
-Cc: <stable@vger.kernel.org>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 0ab2881a406b9fd46224a3e8253bbc0141b4f844)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1992,6 +1992,9 @@ static int process_ctrl_td(struct xhci_h
- 		case TRB_NORMAL:
- 			td->urb->actual_length = requested - remaining;
- 			goto finish_td;
-+		case TRB_STATUS:
-+			td->urb->actual_length = requested;
-+			goto finish_td;
- 		default:
- 			xhci_warn(xhci, "WARN: unexpected TRB Type %d\n",
- 				  trb_type);
diff --git a/patches.renesas/0216-ARM-dts-r8a7794-Correct-SCIFB-reg-properties-to-cove.patch b/patches.renesas/0216-ARM-dts-r8a7794-Correct-SCIFB-reg-properties-to-cove.patch
deleted file mode 100644
index 76eafea33cefa7..00000000000000
--- a/patches.renesas/0216-ARM-dts-r8a7794-Correct-SCIFB-reg-properties-to-cove.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 855b6dfcdf43e601150eaf387ff3d781ab026c6d Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 19 Sep 2016 16:18:56 +0200
-Subject: [PATCH 216/299] ARM: dts: r8a7794: Correct SCIFB reg properties to
- cover all registers
-
-Several SCIFB registers reside outside the reported register ranges.
-Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
-ioremap().
-
-Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
-SH/R-Mobile SoCs.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 655ea555064251e0b094848d378d4a67e8ebb0ed)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794.dtsi |    6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7794.dtsi
-+++ b/arch/arm/boot/dts/r8a7794.dtsi
-@@ -410,7 +410,7 @@
- 	scifb0: serial@e6c20000 {
- 		compatible = "renesas,scifb-r8a7794",
- 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
--		reg = <0 0xe6c20000 0 64>;
-+		reg = <0 0xe6c20000 0 0x100>;
- 		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp2_clks R8A7794_CLK_SCIFB0>;
- 		clock-names = "fck";
-@@ -424,7 +424,7 @@
- 	scifb1: serial@e6c30000 {
- 		compatible = "renesas,scifb-r8a7794",
- 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
--		reg = <0 0xe6c30000 0 64>;
-+		reg = <0 0xe6c30000 0 0x100>;
- 		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp2_clks R8A7794_CLK_SCIFB1>;
- 		clock-names = "fck";
-@@ -438,7 +438,7 @@
- 	scifb2: serial@e6ce0000 {
- 		compatible = "renesas,scifb-r8a7794",
- 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
--		reg = <0 0xe6ce0000 0 64>;
-+		reg = <0 0xe6ce0000 0 0x100>;
- 		interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp2_clks R8A7794_CLK_SCIFB2>;
- 		clock-names = "fck";
diff --git a/patches.renesas/0216-media-vsp1-set-V4L2_CTRL_FLAG_MODIFY_LAYOUT-for-hist.patch b/patches.renesas/0216-media-vsp1-set-V4L2_CTRL_FLAG_MODIFY_LAYOUT-for-hist.patch
deleted file mode 100644
index 42ca18eb21f8dd..00000000000000
--- a/patches.renesas/0216-media-vsp1-set-V4L2_CTRL_FLAG_MODIFY_LAYOUT-for-hist.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From e64b3bc96390b5bd3341a0000a2561bda1109c9b Mon Sep 17 00:00:00 2001
-From: Hans Verkuil <hans.verkuil@cisco.com>
-Date: Mon, 10 Apr 2017 16:18:06 -0300
-Subject: [PATCH 216/286] [media] vsp1: set V4L2_CTRL_FLAG_MODIFY_LAYOUT for
- histogram controls
-
-The two histogram controls will modify the layout of the
-metadata, so this flag should be set.
-
-Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
-Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 6c1c0afd19317a15d6f2ae4965a73be7240aba18)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_hgo.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/media/platform/vsp1/vsp1_hgo.c
-+++ b/drivers/media/platform/vsp1/vsp1_hgo.c
-@@ -111,6 +111,7 @@ static const struct v4l2_ctrl_config hgo
- 	.max = 1,
- 	.def = 0,
- 	.step = 1,
-+	.flags = V4L2_CTRL_FLAG_MODIFY_LAYOUT,
- };
- 
- static const s64 hgo_num_bins[] = {
-@@ -125,6 +126,7 @@ static const struct v4l2_ctrl_config hgo
- 	.max = 1,
- 	.def = 0,
- 	.qmenu_int = hgo_num_bins,
-+	.flags = V4L2_CTRL_FLAG_MODIFY_LAYOUT,
- };
- 
- /* -----------------------------------------------------------------------------
diff --git a/patches.renesas/0216-xhci-Manually-give-back-cancelled-URB-if-we-can-t-qu.patch b/patches.renesas/0216-xhci-Manually-give-back-cancelled-URB-if-we-can-t-qu.patch
deleted file mode 100644
index c9df389c165e15..00000000000000
--- a/patches.renesas/0216-xhci-Manually-give-back-cancelled-URB-if-we-can-t-qu.patch
+++ /dev/null
@@ -1,137 +0,0 @@
-From a347cb5b19008f4f443ec7ab2f35d8a90630cb01 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Tue, 28 Mar 2017 15:55:30 +0300
-Subject: [PATCH 216/255] xhci: Manually give back cancelled URB if we can't
- queue it for cancel
-
-xhci needs to take care of four scenarios when asked to cancel a URB.
-
-1 URB is not queued or already given back.
-  usb_hcd_check_unlink_urb() will return an error, we pass the error on
-
-2 We fail to find xhci internal structures from urb private data such as
-  virtual device and endpoint ring.
-  Give back URB immediately, can't do anything about internal structures.
-
-3 URB private data has valid pointers to xhci internal data, but host is
-  not  responding.
-  give back URB immedately and remove the URB from the endpoint lists.
-
-4 Everyting is working
-  add URB to cancel list, queue a command to stop the endpoint, after
-  which the URB can be turned to no-op or skipped, removed from lists,
-  and given back.
-
-We failed to give back the urb in case 2 where the correct device and
-endpoint pointers could not be retrieved from URB private data.
-
-This caused a hang on Dell Inspiron 5558/0VNM2T at resume from suspend
-as urb was never returned.
-
-[  245.270505] INFO: task rtsx_usb_ms_1:254 blocked for more than 120 seconds.
-[  245.272244]       Tainted: G        W       4.11.0-rc3-ARCH #2
-[  245.273983] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message.
-[  245.275737] rtsx_usb_ms_1   D    0   254      2 0x00000000
-[  245.277524] Call Trace:
-[  245.279278]  __schedule+0x2d3/0x8a0
-[  245.281077]  schedule+0x3d/0x90
-[  245.281961]  usb_kill_urb.part.3+0x6c/0xa0 [usbcore]
-[  245.282861]  ? wake_atomic_t_function+0x60/0x60
-[  245.283760]  usb_kill_urb+0x21/0x30 [usbcore]
-[  245.284649]  usb_start_wait_urb+0xe5/0x170 [usbcore]
-[  245.285541]  ? try_to_del_timer_sync+0x53/0x80
-[  245.286434]  usb_bulk_msg+0xbd/0x160 [usbcore]
-[  245.287326]  rtsx_usb_send_cmd+0x63/0x90 [rtsx_usb]
-
-Reported-by: diego.viola@gmail.com
-Tested-by: diego.viola@gmail.com
-Cc: stable@vger.kernel.org
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit d3519b9d9606991a1305596348b6d690bfa3eb27)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci.c |   43 +++++++++++++++++++++++++------------------
- 1 file changed, 25 insertions(+), 18 deletions(-)
-
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -1522,6 +1522,7 @@ int xhci_urb_dequeue(struct usb_hcd *hcd
- 	struct xhci_ring *ep_ring;
- 	struct xhci_virt_ep *ep;
- 	struct xhci_command *command;
-+	struct xhci_virt_device *vdev;
- 
- 	xhci = hcd_to_xhci(hcd);
- 	spin_lock_irqsave(&xhci->lock, flags);
-@@ -1530,15 +1531,27 @@ int xhci_urb_dequeue(struct usb_hcd *hcd
- 
- 	/* Make sure the URB hasn't completed or been unlinked already */
- 	ret = usb_hcd_check_unlink_urb(hcd, urb, status);
--	if (ret || !urb->hcpriv)
-+	if (ret)
- 		goto done;
-+
-+	/* give back URB now if we can't queue it for cancel */
-+	vdev = xhci->devs[urb->dev->slot_id];
-+	urb_priv = urb->hcpriv;
-+	if (!vdev || !urb_priv)
-+		goto err_giveback;
-+
-+	ep_index = xhci_get_endpoint_index(&urb->ep->desc);
-+	ep = &vdev->eps[ep_index];
-+	ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
-+	if (!ep || !ep_ring)
-+		goto err_giveback;
-+
- 	temp = readl(&xhci->op_regs->status);
- 	if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
- 		xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
- 				"HW died, freeing TD.");
--		urb_priv = urb->hcpriv;
- 		for (i = urb_priv->num_tds_done;
--		     i < urb_priv->num_tds && xhci->devs[urb->dev->slot_id];
-+		     i < urb_priv->num_tds;
- 		     i++) {
- 			td = &urb_priv->td[i];
- 			if (!list_empty(&td->td_list))
-@@ -1546,23 +1559,9 @@ int xhci_urb_dequeue(struct usb_hcd *hcd
- 			if (!list_empty(&td->cancelled_td_list))
- 				list_del_init(&td->cancelled_td_list);
- 		}
--
--		usb_hcd_unlink_urb_from_ep(hcd, urb);
--		spin_unlock_irqrestore(&xhci->lock, flags);
--		usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
--		xhci_urb_free_priv(urb_priv);
--		return ret;
--	}
--
--	ep_index = xhci_get_endpoint_index(&urb->ep->desc);
--	ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
--	ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
--	if (!ep_ring) {
--		ret = -EINVAL;
--		goto done;
-+		goto err_giveback;
- 	}
- 
--	urb_priv = urb->hcpriv;
- 	i = urb_priv->num_tds_done;
- 	if (i < urb_priv->num_tds)
- 		xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
-@@ -1599,6 +1598,14 @@ int xhci_urb_dequeue(struct usb_hcd *hcd
- done:
- 	spin_unlock_irqrestore(&xhci->lock, flags);
- 	return ret;
-+
-+err_giveback:
-+	if (urb_priv)
-+		xhci_urb_free_priv(urb_priv);
-+	usb_hcd_unlink_urb_from_ep(hcd, urb);
-+	spin_unlock_irqrestore(&xhci->lock, flags);
-+	usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
-+	return ret;
- }
- 
- /* Drop an endpoint from a new bandwidth configuration for this device.
diff --git a/patches.renesas/0217-ARM-dts-wheat-add-DU-support.patch b/patches.renesas/0217-ARM-dts-wheat-add-DU-support.patch
deleted file mode 100644
index 8b5b55e868974a..00000000000000
--- a/patches.renesas/0217-ARM-dts-wheat-add-DU-support.patch
+++ /dev/null
@@ -1,165 +0,0 @@
-From 016d1820cd9559e8c22c6ee48281212ddd78973f Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 23 Sep 2016 00:06:43 +0300
-Subject: [PATCH 217/299] ARM: dts: wheat: add DU support
-
-Define  the  Wheat board dependent  part of the DU device node.
-Add the device nodes for the Analog Devices ADV7513 HDMI transmitters
-connected to DU0/1.  Add the necessary subnodes to interconnect DU with
-HDMI transmitters/connectors.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f6eea82a87db2753e2f7c0454f078fb630eb72cd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7792-wheat.dts |  126 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 126 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7792-wheat.dts
-+++ b/arch/arm/boot/dts/r8a7792-wheat.dts
-@@ -86,6 +86,34 @@
- 		gpio = <&gpio11 12 GPIO_ACTIVE_HIGH>;
- 		enable-active-high;
- 	};
-+
-+	hdmi-out0 {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi_con0: endpoint {
-+				remote-endpoint = <&adv7513_0_out>;
-+			};
-+		};
-+	};
-+
-+	hdmi-out1 {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi_con1: endpoint {
-+				remote-endpoint = <&adv7513_1_out>;
-+			};
-+		};
-+	};
-+
-+	osc2_clk: osc2 {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		clock-frequency = <74250000>;
-+	};
- };
- 
- &extal_clk {
-@@ -128,6 +156,16 @@
- 		groups = "qspi_ctrl", "qspi_data4";
- 		function = "qspi";
- 	};
-+
-+	du0_pins: du0 {
-+		groups = "du0_rgb888", "du0_sync", "du0_disp";
-+		function = "du0";
-+	};
-+
-+	du1_pins: du1 {
-+		groups = "du1_rgb666", "du1_sync", "du1_disp";
-+		function = "du1";
-+	};
- };
- 
- &scif0 {
-@@ -196,4 +234,92 @@
- 			};
- 		};
- 	};
-+};
-+
-+&i2c4 {
-+	status = "okay";
-+	clock-frequency = <400000>;
-+
-+	hdmi@3d {
-+		compatible = "adi,adv7513";
-+		reg = <0x3d>;
-+
-+		adi,input-depth = <8>;
-+		adi,input-colorspace = "rgb";
-+		adi,input-clock = "1x";
-+		adi,input-style = <1>;
-+		adi,input-justification = "evenly";
-+
-+		ports {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+
-+			port@0 {
-+				reg = <0>;
-+				adv7513_0_in: endpoint {
-+					remote-endpoint = <&du_out_rgb0>;
-+				};
-+			};
-+
-+			port@1 {
-+				reg = <1>;
-+				adv7513_0_out: endpoint {
-+					remote-endpoint = <&hdmi_con0>;
-+				};
-+			};
-+		};
-+	};
-+
-+	hdmi@39 {
-+		compatible = "adi,adv7513";
-+		reg = <0x39>;
-+
-+		adi,input-depth = <8>;
-+		adi,input-colorspace = "rgb";
-+		adi,input-clock = "1x";
-+		adi,input-style = <1>;
-+		adi,input-justification = "evenly";
-+
-+		ports {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+
-+			port@0 {
-+				reg = <0>;
-+				adv7513_1_in: endpoint {
-+					remote-endpoint = <&du_out_rgb1>;
-+				};
-+			};
-+
-+			port@1 {
-+				reg = <1>;
-+				adv7513_1_out: endpoint {
-+					remote-endpoint = <&hdmi_con1>;
-+				};
-+			};
-+		};
-+	};
-+};
-+
-+&du {
-+	pinctrl-0 = <&du0_pins &du1_pins>;
-+	pinctrl-names = "default";
-+
-+	clocks = <&mstp7_clks R8A7792_CLK_DU0>, <&mstp7_clks R8A7792_CLK_DU1>,
-+		 <&osc2_clk>;
-+	clock-names = "du.0", "du.1", "dclkin.0";
-+	status = "okay";
-+
-+	ports {
-+		port@0 {
-+			endpoint {
-+				remote-endpoint = <&adv7513_0_in>;
-+			};
-+		};
-+		port@1 {
-+			endpoint {
-+				remote-endpoint = <&adv7513_1_in>;
-+			};
-+		};
-+	};
- };
diff --git a/patches.renesas/0217-media-pixfmt-meta-vsp1-hgo.rst-remove-spurious.patch b/patches.renesas/0217-media-pixfmt-meta-vsp1-hgo.rst-remove-spurious.patch
deleted file mode 100644
index ad77623d21f55b..00000000000000
--- a/patches.renesas/0217-media-pixfmt-meta-vsp1-hgo.rst-remove-spurious.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From b393dc54a098c960c91c5b6a12557703005b4288 Mon Sep 17 00:00:00 2001
-From: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-Date: Wed, 19 Apr 2017 08:01:18 -0300
-Subject: [PATCH 217/286] [media] pixfmt-meta-vsp1-hgo.rst: remove spurious '-'
-
-Remove spurious '-' in the VSP1 hgo table.
-
-This resulted in a weird dot character that also caused
-the row to be double-height.
-
-We used to have it on other tables, but we got rid of them
-on changeset 8ed29e302dd1 ("[media] subdev-formats.rst: remove
-spurious '-'").
-
-Fixes: 14d665387165 ("[media] v4l: Define a pixel format for the R-Car VSP1 1-D histogram engine")
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 242b0c4cc96f97d0a3b96343acd21613b63fa4a6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgo.rst |   24 +++++++++---------
- 1 file changed, 12 insertions(+), 12 deletions(-)
-
---- a/Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgo.rst
-+++ b/Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgo.rst
-@@ -53,19 +53,19 @@ contains one byte.
-       - [15:8]
-       - [7:0]
-     * - 0
--      - -
-+      -
-       - R/Cr/H max [7:0]
--      - -
-+      -
-       - R/Cr/H min [7:0]
-     * - 4
--      - -
-+      -
-       - G/Y/S max [7:0]
--      - -
-+      -
-       - G/Y/S min [7:0]
-     * - 8
--      - -
-+      -
-       - B/Cb/V max [7:0]
--      - -
-+      -
-       - B/Cb/V min [7:0]
-     * - 12
-       - :cspan:`4` R/Cr/H sum [31:0]
-@@ -104,9 +104,9 @@ contains one byte.
-       - [15:8]
-       - [7:0]
-     * - 0
--      - -
-+      -
-       - max(R,G,B) max [7:0]
--      - -
-+      -
-       - max(R,G,B) min [7:0]
-     * - 4
-       - :cspan:`4` max(R,G,B) sum [31:0]
-@@ -129,9 +129,9 @@ contains one byte.
-       - [15:8]
-       - [7:0]
-     * - 0
--      - -
-+      -
-       - Y max [7:0]
--      - -
-+      -
-       - Y min [7:0]
-     * - 4
-       - :cspan:`4` Y sum [31:0]
-@@ -154,9 +154,9 @@ contains one byte.
-       - [15:8]
-       - [7:0]
-     * - 0
--      - -
-+      -
-       - max(R,G,B) max [7:0]
--      - -
-+      -
-       - max(R,G,B) min [7:0]
-     * - 4
-       - :cspan:`4` max(R,G,B) sum [31:0]
diff --git a/patches.renesas/0217-ravb-Add-tx-and-rx-clock-internal-delays-mode-of-APS.patch b/patches.renesas/0217-ravb-Add-tx-and-rx-clock-internal-delays-mode-of-APS.patch
deleted file mode 100644
index 7e103f7ac35ef2..00000000000000
--- a/patches.renesas/0217-ravb-Add-tx-and-rx-clock-internal-delays-mode-of-APS.patch
+++ /dev/null
@@ -1,104 +0,0 @@
-From 0eb77c7eee992b750fc8ab3888c5abf2caea7140 Mon Sep 17 00:00:00 2001
-From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
-Date: Fri, 27 Jan 2017 20:46:26 +0100
-Subject: [PATCH 217/255] ravb: Add tx and rx clock internal delays mode of
- APSR
-
-This patch enables tx and rx clock internal delay modes (TDM and RDM).
-
-This is to address a failure in the case of 1Gbps communication using the
-by salvator-x board with the KSZ9031RNX phy. This has been reported to
-occur with both the r8a7795 (H3) and r8a7796 (M3-W) SoCs.
-
-With this change APSR internal delay modes are enabled for
-"rgmii-id", "rgmii-rxid" and "rgmii-txid" phy modes as follows:
-
-phy mode   | ASPR delay mode
------------+----------------
-rgmii-id   | TDM and RDM
-rgmii-rxid | RDM
-rgmii-txid | TDM
-
-Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 61fccb2d6274f77de6d16a0dc74eda813e90eb64)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/ravb.h      |   10 ++++++++++
- drivers/net/ethernet/renesas/ravb_main.c |   23 +++++++++++++++++++++++
- 2 files changed, 33 insertions(+)
-
---- a/drivers/net/ethernet/renesas/ravb.h
-+++ b/drivers/net/ethernet/renesas/ravb.h
-@@ -76,6 +76,7 @@ enum ravb_reg {
- 	CDAR20	= 0x0060,
- 	CDAR21	= 0x0064,
- 	ESR	= 0x0088,
-+	APSR	= 0x008C,	/* R-Car Gen3 only */
- 	RCR	= 0x0090,
- 	RQC0	= 0x0094,
- 	RQC1	= 0x0098,
-@@ -248,6 +249,15 @@ enum ESR_BIT {
- 	ESR_EIL		= 0x00001000,
- };
- 
-+/* APSR */
-+enum APSR_BIT {
-+	APSR_MEMS		= 0x00000002,
-+	APSR_CMSW		= 0x00000010,
-+	APSR_DM			= 0x00006000,	/* Undocumented? */
-+	APSR_DM_RDM		= 0x00002000,
-+	APSR_DM_TDM		= 0x00004000,
-+};
-+
- /* RCR */
- enum RCR_BIT {
- 	RCR_EFFS	= 0x00000001,
---- a/drivers/net/ethernet/renesas/ravb_main.c
-+++ b/drivers/net/ethernet/renesas/ravb_main.c
-@@ -1897,6 +1897,23 @@ static void ravb_set_config_mode(struct
- 	}
- }
- 
-+/* Set tx and rx clock internal delay modes */
-+static void ravb_set_delay_mode(struct net_device *ndev)
-+{
-+	struct ravb_private *priv = netdev_priv(ndev);
-+	int set = 0;
-+
-+	if (priv->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
-+	    priv->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID)
-+		set |= APSR_DM_RDM;
-+
-+	if (priv->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
-+	    priv->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID)
-+		set |= APSR_DM_TDM;
-+
-+	ravb_modify(ndev, APSR, APSR_DM, set);
-+}
-+
- static int ravb_probe(struct platform_device *pdev)
- {
- 	struct device_node *np = pdev->dev.of_node;
-@@ -2009,6 +2026,9 @@ static int ravb_probe(struct platform_de
- 	/* Request GTI loading */
- 	ravb_modify(ndev, GCCR, GCCR_LTI, GCCR_LTI);
- 
-+	if (priv->chip_id != RCAR_GEN2)
-+		ravb_set_delay_mode(ndev);
-+
- 	/* Allocate descriptor base address table */
- 	priv->desc_bat_size = sizeof(struct ravb_desc) * DBAT_ENTRY_NUM;
- 	priv->desc_bat = dma_alloc_coherent(ndev->dev.parent, priv->desc_bat_size,
-@@ -2145,6 +2165,9 @@ static int __maybe_unused ravb_resume(st
- 	/* Request GTI loading */
- 	ravb_modify(ndev, GCCR, GCCR_LTI, GCCR_LTI);
- 
-+	if (priv->chip_id != RCAR_GEN2)
-+		ravb_set_delay_mode(ndev);
-+
- 	/* Restore descriptor base address table */
- 	ravb_write(ndev, priv->desc_bat_dma, DBAT);
- 
diff --git a/patches.renesas/0218-ARM-dts-r8a7792-add-MSIOF-clocks.patch b/patches.renesas/0218-ARM-dts-r8a7792-add-MSIOF-clocks.patch
deleted file mode 100644
index f9f80ef8086b18..00000000000000
--- a/patches.renesas/0218-ARM-dts-r8a7792-add-MSIOF-clocks.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 7fb4b5bdc8a9f93316864b0d16a3bffca70c6709 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Mon, 5 Sep 2016 23:55:01 +0300
-Subject: [PATCH 218/299] ARM: dts: r8a7792: add MSIOF clocks
-
-Describe the MSIOF0/1 clocks and their parent, MP clock in the R8A7792
-device  tree.
-
-Based  on the original (and large) patch by Vladimir Barinov
-<vladimir.barinov@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5cef452bf895cc38af3a4e20f85c20c1a4d41001)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7792.dtsi |   21 +++++++++++++++++++--
- 1 file changed, 19 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7792.dtsi
-+++ b/arch/arm/boot/dts/r8a7792.dtsi
-@@ -767,6 +767,13 @@
- 			clock-div = <48>;
- 			clock-mult = <1>;
- 		};
-+		mp_clk: mp {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&pll1_div2_clk>;
-+			#clock-cells = <0>;
-+			clock-div = <15>;
-+			clock-mult = <1>;
-+		};
- 		m2_clk: m2 {
- 			compatible = "fixed-factor-clock";
- 			clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
-@@ -797,6 +804,15 @@
- 		};
- 
- 		/* Gate clocks */
-+		mstp0_clks: mstp0_clks@e6150130 {
-+			compatible = "renesas,r8a7792-mstp-clocks",
-+				     "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
-+			clocks = <&mp_clk>;
-+			#clock-cells = <1>;
-+			clock-indices = <R8A7792_CLK_MSIOF0>;
-+			clock-output-names = "msiof0";
-+		};
- 		mstp1_clks: mstp1_clks@e6150134 {
- 			compatible = "renesas,r8a7792-mstp-clocks",
- 				     "renesas,cpg-mstp-clocks";
-@@ -815,12 +831,13 @@
- 			compatible = "renesas,r8a7792-mstp-clocks",
- 				     "renesas,cpg-mstp-clocks";
- 			reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
--			clocks = <&zs_clk>, <&zs_clk>;
-+			clocks = <&mp_clk>, <&zs_clk>, <&zs_clk>;
- 			#clock-cells = <1>;
- 			clock-indices = <
-+				R8A7792_CLK_MSIOF1
- 				R8A7792_CLK_SYS_DMAC1 R8A7792_CLK_SYS_DMAC0
- 			>;
--			clock-output-names = "sys-dmac1", "sys-dmac0";
-+			clock-output-names = "msiof1", "sys-dmac1", "sys-dmac0";
- 		};
- 		mstp3_clks: mstp3_clks@e615013c {
- 			compatible = "renesas,r8a7792-mstp-clocks",
diff --git a/patches.renesas/0218-USB-host-xhci-use-max-port-define.patch b/patches.renesas/0218-USB-host-xhci-use-max-port-define.patch
deleted file mode 100644
index 7970e6a846a3ce..00000000000000
--- a/patches.renesas/0218-USB-host-xhci-use-max-port-define.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 6aa7a961938db0c6a530a035fb0812f9330aafcb Mon Sep 17 00:00:00 2001
-From: Johan Hovold <johan@kernel.org>
-Date: Wed, 10 May 2017 18:18:30 +0200
-Subject: [PATCH 218/286] USB: host: xhci: use max-port define
-
-Use the new define for the maximum number of SuperSpeed ports instead of
-a constant when allocating xHCI root hubs.
-
-Signed-off-by: Johan Hovold <johan@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 5120a266928a07231d198bb518f6fe73148786a3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-mem.c |    7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -2327,10 +2327,11 @@ static int xhci_setup_port_arrays(struct
- 	/* Place limits on the number of roothub ports so that the hub
- 	 * descriptors aren't longer than the USB core will allocate.
- 	 */
--	if (xhci->num_usb3_ports > 15) {
-+	if (xhci->num_usb3_ports > USB_SS_MAXPORTS) {
- 		xhci_dbg_trace(xhci, trace_xhci_dbg_init,
--				"Limiting USB 3.0 roothub ports to 15.");
--		xhci->num_usb3_ports = 15;
-+				"Limiting USB 3.0 roothub ports to %u.",
-+				USB_SS_MAXPORTS);
-+		xhci->num_usb3_ports = USB_SS_MAXPORTS;
- 	}
- 	if (xhci->num_usb2_ports > USB_MAXCHILDREN) {
- 		xhci_dbg_trace(xhci, trace_xhci_dbg_init,
diff --git a/patches.renesas/0218-ravb-Support-1Gbps-on-R-Car-H3-ES1.1-and-R-Car-M3-W.patch b/patches.renesas/0218-ravb-Support-1Gbps-on-R-Car-H3-ES1.1-and-R-Car-M3-W.patch
deleted file mode 100644
index cd9baf12b5bea6..00000000000000
--- a/patches.renesas/0218-ravb-Support-1Gbps-on-R-Car-H3-ES1.1-and-R-Car-M3-W.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 857f329237b380fa7b69cb29952c17a451393aaf Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 27 Jan 2017 20:46:27 +0100
-Subject: [PATCH 218/255] ravb: Support 1Gbps on R-Car H3 ES1.1+ and R-Car M3-W
-
-The limitation to 10/100Mbit speeds on R-Car Gen3 is valid for R-Car H3
-ES1.0 only. Check for the exact SoC model to allow 1Gbps on newer
-revisions of R-Car H3, and on R-Car M3-W.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 0e98f9d5f0b4a9012bd4fb5ff88b3ea290deb6a8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/ravb_main.c |   10 ++++++++--
- 1 file changed, 8 insertions(+), 2 deletions(-)
-
---- a/drivers/net/ethernet/renesas/ravb_main.c
-+++ b/drivers/net/ethernet/renesas/ravb_main.c
-@@ -31,6 +31,7 @@
- #include <linux/pm_runtime.h>
- #include <linux/slab.h>
- #include <linux/spinlock.h>
-+#include <linux/sys_soc.h>
- 
- #include <asm/div64.h>
- 
-@@ -998,6 +999,11 @@ static void ravb_adjust_link(struct net_
- 		phy_print_status(phydev);
- }
- 
-+static const struct soc_device_attribute r8a7795es10[] = {
-+	{ .soc_id = "r8a7795", .revision = "ES1.0", },
-+	{ /* sentinel */ }
-+};
-+
- /* PHY init function */
- static int ravb_phy_init(struct net_device *ndev)
- {
-@@ -1033,10 +1039,10 @@ static int ravb_phy_init(struct net_devi
- 		goto err_deregister_fixed_link;
- 	}
- 
--	/* This driver only support 10/100Mbit speeds on Gen3
-+	/* This driver only support 10/100Mbit speeds on R-Car H3 ES1.0
- 	 * at this time.
- 	 */
--	if (priv->chip_id == RCAR_GEN3) {
-+	if (soc_device_match(r8a7795es10)) {
- 		err = phy_set_max_speed(phydev, SPEED_100);
- 		if (err) {
- 			netdev_err(ndev, "failed to limit PHY to 100Mbit/s\n");
diff --git a/patches.renesas/0219-ARM-dts-r8a7792-add-MSIOF-support.patch b/patches.renesas/0219-ARM-dts-r8a7792-add-MSIOF-support.patch
deleted file mode 100644
index 45168142289c32..00000000000000
--- a/patches.renesas/0219-ARM-dts-r8a7792-add-MSIOF-support.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From b809d0567d320266632d878163cfa50fc04eca3f Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Mon, 5 Sep 2016 23:55:57 +0300
-Subject: [PATCH 219/299] ARM: dts: r8a7792: add MSIOF support
-
-Define the generic R8A7792 parts of the MSIOF0/1 device nodes.
-
-Based  on the original (and large) patch by Vladimir Barinov
-<vladimir.barinov@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b0663cd4211a26eb7fcaed98a26b3d117dc34926)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7792.dtsi |   30 ++++++++++++++++++++++++++++++
- 1 file changed, 30 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7792.dtsi
-+++ b/arch/arm/boot/dts/r8a7792.dtsi
-@@ -26,6 +26,8 @@
- 		i2c4 = &i2c4;
- 		i2c5 = &i2c5;
- 		spi0 = &qspi;
-+		spi1 = &msiof0;
-+		spi2 = &msiof1;
- 		vin0 = &vin0;
- 		vin1 = &vin1;
- 		vin2 = &vin2;
-@@ -574,6 +576,34 @@
- 			#address-cells = <1>;
- 			#size-cells = <0>;
- 			status = "disabled";
-+		};
-+
-+		msiof0: spi@e6e20000 {
-+			compatible = "renesas,msiof-r8a7792";
-+			reg = <0 0xe6e20000 0 0x0064>;
-+			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&mstp0_clks R8A7792_CLK_MSIOF0>;
-+			dmas = <&dmac0 0x51>, <&dmac0 0x52>,
-+			       <&dmac1 0x51>, <&dmac1 0x52>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			status = "disabled";
-+		};
-+
-+		msiof1: spi@e6e10000 {
-+			compatible = "renesas,msiof-r8a7792";
-+			reg = <0 0xe6e10000 0 0x0064>;
-+			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&mstp2_clks R8A7792_CLK_MSIOF1>;
-+			dmas = <&dmac0 0x55>, <&dmac0 0x56>,
-+			       <&dmac1 0x55>, <&dmac1 0x56>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			status = "disabled";
- 		};
- 
- 		du: display@feb00000 {
diff --git a/patches.renesas/0219-ravb-Double-free-on-error-in-ravb_start_xmit.patch b/patches.renesas/0219-ravb-Double-free-on-error-in-ravb_start_xmit.patch
deleted file mode 100644
index 93e31078124544..00000000000000
--- a/patches.renesas/0219-ravb-Double-free-on-error-in-ravb_start_xmit.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 8825e544269d30724022625eac0fa4ccc0cacca1 Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Sat, 22 Apr 2017 13:46:56 +0300
-Subject: [PATCH 219/255] ravb: Double free on error in ravb_start_xmit()
-
-If skb_put_padto() fails then it frees the skb.  I shifted that code
-up a bit to make my error handling a little simpler.
-
-Fixes: a0d2f20650e8 ("Renesas Ethernet AVB PTP clock driver")
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 9199cb7677b388b42e3d95c755090dfc5ab2b11a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/ravb_main.c |    7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
---- a/drivers/net/ethernet/renesas/ravb_main.c
-+++ b/drivers/net/ethernet/renesas/ravb_main.c
-@@ -1492,11 +1492,12 @@ static netdev_tx_t ravb_start_xmit(struc
- 		spin_unlock_irqrestore(&priv->lock, flags);
- 		return NETDEV_TX_BUSY;
- 	}
--	entry = priv->cur_tx[q] % (priv->num_tx_ring[q] * NUM_TX_DESC);
--	priv->tx_skb[q][entry / NUM_TX_DESC] = skb;
- 
- 	if (skb_put_padto(skb, ETH_ZLEN))
--		goto drop;
-+		goto exit;
-+
-+	entry = priv->cur_tx[q] % (priv->num_tx_ring[q] * NUM_TX_DESC);
-+	priv->tx_skb[q][entry / NUM_TX_DESC] = skb;
- 
- 	buffer = PTR_ALIGN(priv->tx_align[q], DPTR_ALIGN) +
- 		 entry / NUM_TX_DESC * DPTR_ALIGN;
diff --git a/patches.renesas/0219-usb-xhci-trace-URB-before-giving-it-back-instead-of-.patch b/patches.renesas/0219-usb-xhci-trace-URB-before-giving-it-back-instead-of-.patch
deleted file mode 100644
index e274449e8886e7..00000000000000
--- a/patches.renesas/0219-usb-xhci-trace-URB-before-giving-it-back-instead-of-.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From c298f0d2ac685b2f1d02dfbd0c40df99ec0c5c9a Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Wed, 17 May 2017 18:31:59 +0300
-Subject: [PATCH 219/286] usb: xhci: trace URB before giving it back instead of
- after
-
-Don't access any members of a URB after giving it back.
-URB might be freed by then already.
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 7bc5d5aff356f3ba16c4d1e9eaf95cc99b7574ab)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -641,8 +641,8 @@ static void xhci_giveback_urb_in_irq(str
- 	xhci_urb_free_priv(urb_priv);
- 	usb_hcd_unlink_urb_from_ep(hcd, urb);
- 	spin_unlock(&xhci->lock);
--	usb_hcd_giveback_urb(hcd, urb, status);
- 	trace_xhci_urb_giveback(urb);
-+	usb_hcd_giveback_urb(hcd, urb, status);
- 	spin_lock(&xhci->lock);
- }
- 
diff --git a/patches.renesas/0220-ARM-dts-r7s72100-add-mmcif-to-device-tree.patch b/patches.renesas/0220-ARM-dts-r7s72100-add-mmcif-to-device-tree.patch
deleted file mode 100644
index c8034cee169f5a..00000000000000
--- a/patches.renesas/0220-ARM-dts-r7s72100-add-mmcif-to-device-tree.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From c531912267ffc967524e767fcc91e40d15c353d4 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Tue, 20 Sep 2016 11:46:18 -0400
-Subject: [PATCH 220/299] ARM: dts: r7s72100: add mmcif to device tree
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 887862227ba397bc6b22147284cdccc60a87f72f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100.dtsi |   12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100.dtsi
-+++ b/arch/arm/boot/dts/r7s72100.dtsi
-@@ -450,4 +450,16 @@
- 		#size-cells = <0>;
- 		status = "disabled";
- 	};
-+
-+	mmcif: mmc@e804c800 {
-+		compatible = "renesas,mmcif-r7s72100", "renesas,sh-mmcif";
-+		reg = <0xe804c800 0x80>;
-+		interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH
-+			      GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH
-+			      GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&mstp8_clks R7S72100_CLK_MMCIF>;
-+		reg-io-width = <4>;
-+		bus-width = <8>;
-+		status = "disabled";
-+	};
- };
diff --git a/patches.renesas/0220-clk-add-devm_get_clk_from_child-API.patch b/patches.renesas/0220-clk-add-devm_get_clk_from_child-API.patch
deleted file mode 100644
index ec8f41ca490e94..00000000000000
--- a/patches.renesas/0220-clk-add-devm_get_clk_from_child-API.patch
+++ /dev/null
@@ -1,140 +0,0 @@
-From 27e90992b8093141112912cd24f241bf2f07c6f9 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 5 Dec 2016 05:23:20 +0000
-Subject: [PATCH 220/255] clk: add devm_get_clk_from_child() API
-
-Some driver is using this type of DT bindings for clock (more detail,
-see ${LINUX}/Documentation/devicetree/bindings/sound/simple-card.txt).
-
-	sound_soc {
-		...
-		cpu {
-			clocks = <&xxx>;
-			...
-		};
-		codec {
-			clocks = <&xxx>;
-			...
-		};
-	};
-
-Current driver in this case uses of_clk_get() for each node, but there
-is no devm_of_clk_get() today.
-OTOH, the problem of having devm_of_clk_get() is that it encourages the
-use of of_clk_get() when clk_get() is more desirable.
-
-Thus, this patch adds new devm_get_clk_from_chile() which explicitly
-reads as get a clock from a child node of this device.
-By this function, we can also use this type of DT bindings
-
-	sound_soc {
-		clocks = <&xxx>, <&xxx>;
-		clock-names = "cpu", "codec";
-		clock-ranges;
-		...
-		cpu {
-			...
-		};
-		codec {
-			...
-		};
-	};
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-[sboyd@codeurora.org: Rename subject to clk + add API]
-Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
-(cherry picked from commit 71a2f11511b4d1dc8b8e326e10ec6533b534ddf1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/clk-devres.c |   21 +++++++++++++++++++++
- include/linux/clk.h      |   29 +++++++++++++++++++++++++----
- 2 files changed, 46 insertions(+), 4 deletions(-)
-
---- a/drivers/clk/clk-devres.c
-+++ b/drivers/clk/clk-devres.c
-@@ -53,3 +53,24 @@ void devm_clk_put(struct device *dev, st
- 	WARN_ON(ret);
- }
- EXPORT_SYMBOL(devm_clk_put);
-+
-+struct clk *devm_get_clk_from_child(struct device *dev,
-+				    struct device_node *np, const char *con_id)
-+{
-+	struct clk **ptr, *clk;
-+
-+	ptr = devres_alloc(devm_clk_release, sizeof(*ptr), GFP_KERNEL);
-+	if (!ptr)
-+		return ERR_PTR(-ENOMEM);
-+
-+	clk = of_clk_get_by_name(np, con_id);
-+	if (!IS_ERR(clk)) {
-+		*ptr = clk;
-+		devres_add(dev, ptr);
-+	} else {
-+		devres_free(ptr);
-+	}
-+
-+	return clk;
-+}
-+EXPORT_SYMBOL(devm_get_clk_from_child);
---- a/include/linux/clk.h
-+++ b/include/linux/clk.h
-@@ -17,8 +17,9 @@
- #include <linux/notifier.h>
- 
- struct device;
--
- struct clk;
-+struct device_node;
-+struct of_phandle_args;
- 
- /**
-  * DOC: clk notifier callback types
-@@ -249,6 +250,23 @@ struct clk *clk_get(struct device *dev,
- struct clk *devm_clk_get(struct device *dev, const char *id);
- 
- /**
-+ * devm_get_clk_from_child - lookup and obtain a managed reference to a
-+ *			     clock producer from child node.
-+ * @dev: device for clock "consumer"
-+ * @np: pointer to clock consumer node
-+ * @con_id: clock consumer ID
-+ *
-+ * This function parses the clocks, and uses them to look up the
-+ * struct clk from the registered list of clock providers by using
-+ * @np and @con_id
-+ *
-+ * The clock will automatically be freed when the device is unbound
-+ * from the bus.
-+ */
-+struct clk *devm_get_clk_from_child(struct device *dev,
-+				    struct device_node *np, const char *con_id);
-+
-+/**
-  * clk_enable - inform the system when the clock source should be running.
-  * @clk: clock source
-  *
-@@ -432,6 +450,12 @@ static inline struct clk *devm_clk_get(s
- 	return NULL;
- }
- 
-+static inline struct clk *devm_get_clk_from_child(struct device *dev,
-+				struct device_node *np, const char *con_id)
-+{
-+	return NULL;
-+}
-+
- static inline void clk_put(struct clk *clk) {}
- 
- static inline void devm_clk_put(struct device *dev, struct clk *clk) {}
-@@ -501,9 +525,6 @@ static inline void clk_disable_unprepare
- 	clk_unprepare(clk);
- }
- 
--struct device_node;
--struct of_phandle_args;
--
- #if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK)
- struct clk *of_clk_get(struct device_node *np, int index);
- struct clk *of_clk_get_by_name(struct device_node *np, const char *name);
diff --git a/patches.renesas/0220-usb-host-xhci-ring-don-t-need-to-clear-interrupt-pen.patch b/patches.renesas/0220-usb-host-xhci-ring-don-t-need-to-clear-interrupt-pen.patch
deleted file mode 100644
index a41bb1d80958e8..00000000000000
--- a/patches.renesas/0220-usb-host-xhci-ring-don-t-need-to-clear-interrupt-pen.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 3c19b50440734aca43db7be3feea45aa431b9da4 Mon Sep 17 00:00:00 2001
-From: Peter Chen <peter.chen@nxp.com>
-Date: Wed, 17 May 2017 18:32:02 +0300
-Subject: [PATCH 220/286] usb: host: xhci-ring: don't need to clear interrupt
- pending for MSI enabled hcd
-
-According to xHCI spec Figure 30: Interrupt Throttle Flow Diagram
-
-	If PCI Message Signaled Interrupts (MSI or MSI-X) are enabled,
-       	then the assertion of the Interrupt Pending (IP) flag in Figure 30
-       	generates a PCI Dword write. The IP flag is automatically cleared
-       	by the completion of the PCI write.
-
-the MSI enabled HCs don't need to clear interrupt pending bit, but
-hcd->irq = 0 doesn't equal to MSI enabled HCD. At some Dual-role
-controller software designs, it sets hcd->irq as 0 to avoid HCD
-requesting interrupt, and they want to decide when to call usb_hcd_irq
-by software.
-
-Signed-off-by: Peter Chen <peter.chen@nxp.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 6a29beef9d1b16c762e469d77e28c3de3f5c3dbb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    5 +----
- drivers/usb/host/xhci.c      |    5 +++--
- include/linux/usb/hcd.h      |    1 +
- 3 files changed, 5 insertions(+), 6 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -2710,12 +2710,9 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd
- 	 */
- 	status |= STS_EINT;
- 	writel(status, &xhci->op_regs->status);
--	/* FIXME when MSI-X is supported and there are multiple vectors */
--	/* Clear the MSI-X event interrupt status */
- 
--	if (hcd->irq) {
-+	if (!hcd->msi_enabled) {
- 		u32 irq_pending;
--		/* Acknowledge the PCI interrupt */
- 		irq_pending = readl(&xhci->ir_set->irq_pending);
- 		irq_pending |= IMAN_IP;
- 		writel(irq_pending, &xhci->ir_set->irq_pending);
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -401,9 +401,10 @@ static int xhci_try_enable_msi(struct us
- 		/* fall back to msi*/
- 		ret = xhci_setup_msi(xhci);
- 
--	if (!ret)
--		/* hcd->irq is 0, we have MSI */
-+	if (!ret) {
-+		hcd->msi_enabled = 1;
- 		return 0;
-+	}
- 
- 	if (!pdev->irq) {
- 		xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
---- a/include/linux/usb/hcd.h
-+++ b/include/linux/usb/hcd.h
-@@ -148,6 +148,7 @@ struct usb_hcd {
- 	unsigned		rh_registered:1;/* is root hub registered? */
- 	unsigned		rh_pollable:1;	/* may we poll the root hub? */
- 	unsigned		msix_enabled:1;	/* driver has MSI-X enabled? */
-+	unsigned		msi_enabled:1;	/* driver has MSI enabled? */
- 	unsigned		remove_phy:1;	/* auto-remove USB phy */
- 
- 	/* The next flag is a stopgap, to be removed when all the HCDs
diff --git a/patches.renesas/0221-ARM-dts-r7s72100-add-sdhi-clock-to-device-tree.patch b/patches.renesas/0221-ARM-dts-r7s72100-add-sdhi-clock-to-device-tree.patch
deleted file mode 100644
index 79d36d11154acd..00000000000000
--- a/patches.renesas/0221-ARM-dts-r7s72100-add-sdhi-clock-to-device-tree.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 653ebdeb7451f223d1c18b916d1704e7298088ae Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Thu, 22 Sep 2016 17:32:09 -0400
-Subject: [PATCH 221/299] ARM: dts: r7s72100: add sdhi clock to device tree
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7c8522b7047c77ef598e8b5f9ff6e349c22e0622)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100.dtsi            |    8 ++++++++
- include/dt-bindings/clock/r7s72100-clock.h |    4 ++++
- 2 files changed, 12 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100.dtsi
-+++ b/arch/arm/boot/dts/r7s72100.dtsi
-@@ -149,6 +149,14 @@
- 			>;
- 			clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4";
- 		};
-+		mstp12_clks: mstp12_clks@fcfe0444 {
-+			#clock-cells = <1>;
-+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0xfcfe0444 4>;
-+			clocks = <&p1_clk>, <&p1_clk>;
-+			clock-indices = <R7S72100_CLK_SDHI1 R7S72100_CLK_SDHI0>;
-+			clock-output-names = "sdhi1", "sdhi0";
-+		};
- 	};
- 
- 	cpus {
---- a/include/dt-bindings/clock/r7s72100-clock.h
-+++ b/include/dt-bindings/clock/r7s72100-clock.h
-@@ -44,4 +44,8 @@
- #define R7S72100_CLK_SPI3	4
- #define R7S72100_CLK_SPI4	3
- 
-+/* MSTP12 */
-+#define R7S72100_CLK_SDHI0	3
-+#define R7S72100_CLK_SDHI1	2
-+
- #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
diff --git a/patches.renesas/0221-ASoC-simple-card-use-devm_get_clk_from_child.patch b/patches.renesas/0221-ASoC-simple-card-use-devm_get_clk_from_child.patch
deleted file mode 100644
index 9c8db64e91c7c3..00000000000000
--- a/patches.renesas/0221-ASoC-simple-card-use-devm_get_clk_from_child.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From 2c9ee8866cd69f35af5cbcbf5ef15dcee76e1f7a Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 23 Jan 2017 07:29:42 +0000
-Subject: [PATCH 221/255] ASoC: simple-card: use devm_get_clk_from_child()
-
-Current simple-card-utils is getting clk by of_clk_get(), but didn't call
-clk_free(). Now we can use devm_get_clk_from_child() for this purpose.
-Let's use it.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
-(cherry picked from commit e984fd61e860ce3c45e79d69cf214b8cc6cae7d9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/sound/simple_card_utils.h     |   11 ++++++-----
- sound/soc/generic/simple-card-utils.c |    8 ++++----
- sound/soc/generic/simple-card.c       |    4 ++--
- sound/soc/generic/simple-scu-card.c   |    4 ++--
- 4 files changed, 14 insertions(+), 13 deletions(-)
-
---- a/include/sound/simple_card_utils.h
-+++ b/include/sound/simple_card_utils.h
-@@ -34,11 +34,12 @@ int asoc_simple_card_set_dailink_name(st
- int asoc_simple_card_parse_card_name(struct snd_soc_card *card,
- 				     char *prefix);
- 
--#define asoc_simple_card_parse_clk_cpu(node, dai_link, simple_dai)		\
--	asoc_simple_card_parse_clk(node, dai_link->cpu_of_node, simple_dai)
--#define asoc_simple_card_parse_clk_codec(node, dai_link, simple_dai)		\
--	asoc_simple_card_parse_clk(node, dai_link->codec_of_node, simple_dai)
--int asoc_simple_card_parse_clk(struct device_node *node,
-+#define asoc_simple_card_parse_clk_cpu(dev, node, dai_link, simple_dai)		\
-+	asoc_simple_card_parse_clk(dev, node, dai_link->cpu_of_node, simple_dai)
-+#define asoc_simple_card_parse_clk_codec(dev, node, dai_link, simple_dai)	\
-+	asoc_simple_card_parse_clk(dev, node, dai_link->codec_of_node, simple_dai)
-+int asoc_simple_card_parse_clk(struct device *dev,
-+			       struct device_node *node,
- 			       struct device_node *dai_of_node,
- 			       struct asoc_simple_dai *simple_dai);
- 
---- a/sound/soc/generic/simple-card-utils.c
-+++ b/sound/soc/generic/simple-card-utils.c
-@@ -98,7 +98,8 @@ int asoc_simple_card_parse_card_name(str
- }
- EXPORT_SYMBOL_GPL(asoc_simple_card_parse_card_name);
- 
--int asoc_simple_card_parse_clk(struct device_node *node,
-+int asoc_simple_card_parse_clk(struct device *dev,
-+			       struct device_node *node,
- 			       struct device_node *dai_of_node,
- 			       struct asoc_simple_dai *simple_dai)
- {
-@@ -111,14 +112,13 @@ int asoc_simple_card_parse_clk(struct de
- 	 *  or "system-clock-frequency = <xxx>"
- 	 *  or device's module clock.
- 	 */
--	clk = of_clk_get(node, 0);
-+	clk = devm_get_clk_from_child(dev, node, NULL);
- 	if (!IS_ERR(clk)) {
- 		simple_dai->sysclk = clk_get_rate(clk);
--		simple_dai->clk = clk;
- 	} else if (!of_property_read_u32(node, "system-clock-frequency", &val)) {
- 		simple_dai->sysclk = val;
- 	} else {
--		clk = of_clk_get(dai_of_node, 0);
-+		clk = devm_get_clk_from_child(dev, dai_of_node, NULL);
- 		if (!IS_ERR(clk))
- 			simple_dai->sysclk = clk_get_rate(clk);
- 	}
---- a/sound/soc/generic/simple-card.c
-+++ b/sound/soc/generic/simple-card.c
-@@ -284,11 +284,11 @@ static int asoc_simple_card_dai_link_of(
- 	if (ret < 0)
- 		goto dai_link_of_err;
- 
--	ret = asoc_simple_card_parse_clk_cpu(cpu, dai_link, cpu_dai);
-+	ret = asoc_simple_card_parse_clk_cpu(dev, cpu, dai_link, cpu_dai);
- 	if (ret < 0)
- 		goto dai_link_of_err;
- 
--	ret = asoc_simple_card_parse_clk_codec(codec, dai_link, codec_dai);
-+	ret = asoc_simple_card_parse_clk_codec(dev, codec, dai_link, codec_dai);
- 	if (ret < 0)
- 		goto dai_link_of_err;
- 
---- a/sound/soc/generic/simple-scu-card.c
-+++ b/sound/soc/generic/simple-scu-card.c
-@@ -128,7 +128,7 @@ static int asoc_simple_card_dai_link_of(
- 		if (ret)
- 			return ret;
- 
--		ret = asoc_simple_card_parse_clk_cpu(np, dai_link, dai_props);
-+		ret = asoc_simple_card_parse_clk_cpu(dev, np, dai_link, dai_props);
- 		if (ret < 0)
- 			return ret;
- 
-@@ -153,7 +153,7 @@ static int asoc_simple_card_dai_link_of(
- 		if (ret < 0)
- 			return ret;
- 
--		ret = asoc_simple_card_parse_clk_codec(np, dai_link, dai_props);
-+		ret = asoc_simple_card_parse_clk_codec(dev, np, dai_link, dai_props);
- 		if (ret < 0)
- 			return ret;
- 
diff --git a/patches.renesas/0221-USB-xhci-fix-lock-inversion-problem.patch b/patches.renesas/0221-USB-xhci-fix-lock-inversion-problem.patch
deleted file mode 100644
index 9eeacf558829de..00000000000000
--- a/patches.renesas/0221-USB-xhci-fix-lock-inversion-problem.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 496faf29f63753730016a168773c24173f818c45 Mon Sep 17 00:00:00 2001
-From: Alan Stern <stern@rowland.harvard.edu>
-Date: Wed, 17 May 2017 18:32:03 +0300
-Subject: [PATCH 221/286] USB: xhci: fix lock-inversion problem
-
-With threaded interrupts, bottom-half handlers are called with
-interrupts enabled.  Therefore they can't safely use spin_lock(); they
-have to use spin_lock_irqsave().  Lockdep warns about a violation
-occurring in xhci_irq():
-
-=========================================================
-[ INFO: possible irq lock inversion dependency detected ]
-4.11.0-rc8-dbg+ #1 Not tainted
----------------------------------------------------------
-swapper/7/0 just changed the state of lock:
- (&(&ehci->lock)->rlock){-.-...}, at: [<ffffffffa0130a69>]
-ehci_hrtimer_func+0x29/0xc0 [ehci_hcd]
-but this lock took another, HARDIRQ-unsafe lock in the past:
- (hcd_urb_list_lock){+.....}
-
-and interrupts could create inverse lock ordering between them.
-
-other info that might help us debug this:
- Possible interrupt unsafe locking scenario:
-
-       CPU0                    CPU1
-       ----                    ----
-  lock(hcd_urb_list_lock);
-                               local_irq_disable();
-                               lock(&(&ehci->lock)->rlock);
-                               lock(hcd_urb_list_lock);
-  <Interrupt>
-    lock(&(&ehci->lock)->rlock);
- *** DEADLOCK ***
-
-no locks held by swapper/7/0.
-the shortest dependencies between 2nd lock and 1st lock:
- -> (hcd_urb_list_lock){+.....} ops: 252 {
-    HARDIRQ-ON-W at:
-                      __lock_acquire+0x602/0x1280
-                      lock_acquire+0xd5/0x1c0
-                      _raw_spin_lock+0x2f/0x40
-                      usb_hcd_unlink_urb_from_ep+0x1b/0x60 [usbcore]
-                      xhci_giveback_urb_in_irq.isra.45+0x70/0x1b0 [xhci_hcd]
-                      finish_td.constprop.60+0x1d8/0x2e0 [xhci_hcd]
-                      xhci_irq+0xdd6/0x1fa0 [xhci_hcd]
-                      usb_hcd_irq+0x26/0x40 [usbcore]
-                      irq_forced_thread_fn+0x2f/0x70
-                      irq_thread+0x149/0x1d0
-                      kthread+0x113/0x150
-                      ret_from_fork+0x2e/0x40
-
-This patch fixes the problem.
-
-Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
-Reported-and-tested-by: Bart Van Assche <bart.vanassche@sandisk.com>
-CC: <stable@vger.kernel.org>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 63aea0dbab90a2461faaae357cbc8cfd6c8de9fe)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -2680,11 +2680,12 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
- 	union xhci_trb *event_ring_deq;
- 	irqreturn_t ret = IRQ_NONE;
-+	unsigned long flags;
- 	dma_addr_t deq;
- 	u64 temp_64;
- 	u32 status;
- 
--	spin_lock(&xhci->lock);
-+	spin_lock_irqsave(&xhci->lock, flags);
- 	/* Check if the xHC generated the interrupt, or the irq is shared */
- 	status = readl(&xhci->op_regs->status);
- 	if (status == ~(u32)0) {
-@@ -2757,7 +2758,7 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd
- 	ret = IRQ_HANDLED;
- 
- out:
--	spin_unlock(&xhci->lock);
-+	spin_unlock_irqrestore(&xhci->lock, flags);
- 
- 	return ret;
- }
diff --git a/patches.renesas/0222-ARM-dts-gose-use-generic-pinctrl-properties-in-SDHI-.patch b/patches.renesas/0222-ARM-dts-gose-use-generic-pinctrl-properties-in-SDHI-.patch
deleted file mode 100644
index 3197f4eed8ea2f..00000000000000
--- a/patches.renesas/0222-ARM-dts-gose-use-generic-pinctrl-properties-in-SDHI-.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 4d14016470508aeeb43579a298c7f5dd000ae09e Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Fri, 16 Sep 2016 12:04:54 +0200
-Subject: [PATCH 222/299] ARM: dts: gose: use generic pinctrl properties in
- SDHI nodes
-
-Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and
-groups properties") renesas pfc drivers accept generic "function", "pins"
-and "groups" properties.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit af897250ea54c6f21bd50c350c68e8340556b93b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7793-gose.dts |   12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7793-gose.dts
-+++ b/arch/arm/boot/dts/r8a7793-gose.dts
-@@ -346,18 +346,18 @@
- 	};
- 
- 	sdhi0_pins: sd0 {
--		renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
--		renesas,function = "sdhi0";
-+		groups = "sdhi0_data4", "sdhi0_ctrl";
-+		function = "sdhi0";
- 	};
- 
- 	sdhi1_pins: sd1 {
--		renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
--		renesas,function = "sdhi1";
-+		groups = "sdhi1_data4", "sdhi1_ctrl";
-+		function = "sdhi1";
- 	};
- 
- 	sdhi2_pins: sd2 {
--		renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
--		renesas,function = "sdhi2";
-+		groups = "sdhi2_data4", "sdhi2_ctrl";
-+		function = "sdhi2";
- 	};
- 
- 	qspi_pins: qspi {
diff --git a/patches.renesas/0222-media-v4l-vsp1-Add-VIDIOC_EXPBUF-support.patch b/patches.renesas/0222-media-v4l-vsp1-Add-VIDIOC_EXPBUF-support.patch
deleted file mode 100644
index aec8d21f74a2bc..00000000000000
--- a/patches.renesas/0222-media-v4l-vsp1-Add-VIDIOC_EXPBUF-support.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 1f88d5d1d4b8aad56b3233d7be6a96ffa9186c60 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 12 Dec 2016 08:37:42 -0200
-Subject: [PATCH 222/255] [media] v4l: vsp1: Add VIDIOC_EXPBUF support
-
-Use the vb2 ioctl handler directly.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Jacopo Mondi <jacopo@jmondi.org>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 5a66e2f60ef6a153bba387b1382e527248c959a0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_video.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/media/platform/vsp1/vsp1_video.c
-+++ b/drivers/media/platform/vsp1/vsp1_video.c
-@@ -1034,6 +1034,7 @@ static const struct v4l2_ioctl_ops vsp1_
- 	.vidioc_querybuf		= vb2_ioctl_querybuf,
- 	.vidioc_qbuf			= vb2_ioctl_qbuf,
- 	.vidioc_dqbuf			= vb2_ioctl_dqbuf,
-+	.vidioc_expbuf			= vb2_ioctl_expbuf,
- 	.vidioc_create_bufs		= vb2_ioctl_create_bufs,
- 	.vidioc_prepare_buf		= vb2_ioctl_prepare_buf,
- 	.vidioc_streamon		= vsp1_video_streamon,
diff --git a/patches.renesas/0222-xhci-Fix-command-ring-stop-regression-in-4.11.patch b/patches.renesas/0222-xhci-Fix-command-ring-stop-regression-in-4.11.patch
deleted file mode 100644
index e2a5ed0125228b..00000000000000
--- a/patches.renesas/0222-xhci-Fix-command-ring-stop-regression-in-4.11.patch
+++ /dev/null
@@ -1,104 +0,0 @@
-From 77c768faf176fe66ffbd6d37f237eca6bc7ff4d2 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Wed, 17 May 2017 18:32:05 +0300
-Subject: [PATCH 222/286] xhci: Fix command ring stop regression in 4.11
-
-In 4.11 TRB completion codes were renamed to match spec.
-
-Completion codes for command ring stopped and endpoint stopped
-were mixed, leading to failures while handling a stopped command ring.
-
-Use the correct completion code for command ring stopped events.
-
-Fixes: 0b7c105a04ca ("usb: host: xhci: rename completion codes to match spec")
-Cc: <stable@vger.kernel.org> # 4.11
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 604d02a2a66ab7f93fd3b2bde3698c29ef057b65)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-hub.c  |    2 +-
- drivers/usb/host/xhci-ring.c |    8 ++++----
- drivers/usb/host/xhci.c      |    8 ++++----
- 3 files changed, 9 insertions(+), 9 deletions(-)
-
---- a/drivers/usb/host/xhci-hub.c
-+++ b/drivers/usb/host/xhci-hub.c
-@@ -438,7 +438,7 @@ static int xhci_stop_device(struct xhci_
- 	wait_for_completion(cmd->completion);
- 
- 	if (cmd->status == COMP_COMMAND_ABORTED ||
--			cmd->status == COMP_STOPPED) {
-+	    cmd->status == COMP_COMMAND_RING_STOPPED) {
- 		xhci_warn(xhci, "Timeout while waiting for stop endpoint command\n");
- 		ret = -ETIME;
- 	}
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -323,7 +323,7 @@ static void xhci_handle_stopped_cmd_ring
- 		if (i_cmd->status != COMP_COMMAND_ABORTED)
- 			continue;
- 
--		i_cmd->status = COMP_STOPPED;
-+		i_cmd->status = COMP_COMMAND_RING_STOPPED;
- 
- 		xhci_dbg(xhci, "Turn aborted command %p to no-op\n",
- 			 i_cmd->command_trb);
-@@ -1383,7 +1383,7 @@ static void handle_cmd_completion(struct
- 	cmd_comp_code = GET_COMP_CODE(le32_to_cpu(event->status));
- 
- 	/* If CMD ring stopped we own the trbs between enqueue and dequeue */
--	if (cmd_comp_code == COMP_STOPPED) {
-+	if (cmd_comp_code == COMP_COMMAND_RING_STOPPED) {
- 		complete_all(&xhci->cmd_ring_stop_completion);
- 		return;
- 	}
-@@ -1439,8 +1439,8 @@ static void handle_cmd_completion(struct
- 		break;
- 	case TRB_CMD_NOOP:
- 		/* Is this an aborted command turned to NO-OP? */
--		if (cmd->status == COMP_STOPPED)
--			cmd_comp_code = COMP_STOPPED;
-+		if (cmd->status == COMP_COMMAND_RING_STOPPED)
-+			cmd_comp_code = COMP_COMMAND_RING_STOPPED;
- 		break;
- 	case TRB_RESET_EP:
- 		WARN_ON(slot_id != TRB_TO_SLOT_ID(
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -1848,7 +1848,7 @@ static int xhci_configure_endpoint_resul
- 
- 	switch (*cmd_status) {
- 	case COMP_COMMAND_ABORTED:
--	case COMP_STOPPED:
-+	case COMP_COMMAND_RING_STOPPED:
- 		xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
- 		ret = -ETIME;
- 		break;
-@@ -1898,7 +1898,7 @@ static int xhci_evaluate_context_result(
- 
- 	switch (*cmd_status) {
- 	case COMP_COMMAND_ABORTED:
--	case COMP_STOPPED:
-+	case COMP_COMMAND_RING_STOPPED:
- 		xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
- 		ret = -ETIME;
- 		break;
-@@ -3517,7 +3517,7 @@ static int xhci_discover_or_reset_device
- 	ret = reset_device_cmd->status;
- 	switch (ret) {
- 	case COMP_COMMAND_ABORTED:
--	case COMP_STOPPED:
-+	case COMP_COMMAND_RING_STOPPED:
- 		xhci_warn(xhci, "Timeout waiting for reset device command\n");
- 		ret = -ETIME;
- 		goto command_cleanup;
-@@ -3902,7 +3902,7 @@ static int xhci_setup_device(struct usb_
- 	 */
- 	switch (command->status) {
- 	case COMP_COMMAND_ABORTED:
--	case COMP_STOPPED:
-+	case COMP_COMMAND_RING_STOPPED:
- 		xhci_warn(xhci, "Timeout while waiting for setup device command\n");
- 		ret = -ETIME;
- 		break;
diff --git a/patches.renesas/0223-ARM-dts-r8a7794-Fix-W-1-dtc-warnings.patch b/patches.renesas/0223-ARM-dts-r8a7794-Fix-W-1-dtc-warnings.patch
deleted file mode 100644
index 509b4e2be3984c..00000000000000
--- a/patches.renesas/0223-ARM-dts-r8a7794-Fix-W-1-dtc-warnings.patch
+++ /dev/null
@@ -1,199 +0,0 @@
-From 68d224bec63bf83bdb57cc671b2536377dc1b6de Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 4 Oct 2016 15:31:48 +0200
-Subject: [PATCH 223/299] ARM: dts: r8a7794: Fix W=1 dtc warnings
-
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@0 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@1 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@0 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@1 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@2 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@3 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@4 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@5 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@6 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@7 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property
-Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0f4eebb63eb779b50e05bde0f46ea21213f4c465)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794.dtsi |   58 ++++++++++++++++++++---------------------
- 1 file changed, 29 insertions(+), 29 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7794.dtsi
-+++ b/arch/arm/boot/dts/r8a7794.dtsi
-@@ -1496,62 +1496,62 @@
- 		status = "disabled";
- 
- 		rcar_sound,dvc {
--			dvc0: dvc@0 {
-+			dvc0: dvc-0 {
- 				dmas = <&audma0 0xbc>;
- 				dma-names = "tx";
- 			};
--			dvc1: dvc@1 {
-+			dvc1: dvc-1 {
- 				dmas = <&audma0 0xbe>;
- 				dma-names = "tx";
- 			};
- 		};
- 
- 		rcar_sound,mix {
--			mix0: mix@0 { };
--			mix1: mix@1 { };
-+			mix0: mix-0 { };
-+			mix1: mix-1 { };
- 		};
- 
- 		rcar_sound,ctu {
--			ctu00: ctu@0 { };
--			ctu01: ctu@1 { };
--			ctu02: ctu@2 { };
--			ctu03: ctu@3 { };
--			ctu10: ctu@4 { };
--			ctu11: ctu@5 { };
--			ctu12: ctu@6 { };
--			ctu13: ctu@7 { };
-+			ctu00: ctu-0 { };
-+			ctu01: ctu-1 { };
-+			ctu02: ctu-2 { };
-+			ctu03: ctu-3 { };
-+			ctu10: ctu-4 { };
-+			ctu11: ctu-5 { };
-+			ctu12: ctu-6 { };
-+			ctu13: ctu-7 { };
- 		};
- 
- 		rcar_sound,src {
--			src@0 {
-+			src-0 {
- 				status = "disabled";
- 			};
--			src1: src@1 {
-+			src1: src-1 {
- 				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x87>, <&audma0 0x9c>;
- 				dma-names = "rx", "tx";
- 			};
--			src2: src@2 {
-+			src2: src-2 {
- 				interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x89>, <&audma0 0x9e>;
- 				dma-names = "rx", "tx";
- 			};
--			src3: src@3 {
-+			src3: src-3 {
- 				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x8b>, <&audma0 0xa0>;
- 				dma-names = "rx", "tx";
- 			};
--			src4: src@4 {
-+			src4: src-4 {
- 				interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x8d>, <&audma0 0xb0>;
- 				dma-names = "rx", "tx";
- 			};
--			src5: src@5 {
-+			src5: src-5 {
- 				interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x8f>, <&audma0 0xb2>;
- 				dma-names = "rx", "tx";
- 			};
--			src6: src@6 {
-+			src6: src-6 {
- 				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x91>, <&audma0 0xb4>;
- 				dma-names = "rx", "tx";
-@@ -1559,61 +1559,61 @@
- 		};
- 
- 		rcar_sound,ssi {
--			ssi0: ssi@0 {
-+			ssi0: ssi-0 {
- 				interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x01>, <&audma0 0x02>,
- 				       <&audma0 0x15>, <&audma0 0x16>;
- 				dma-names = "rx", "tx", "rxu", "txu";
- 			};
--			ssi1: ssi@1 {
-+			ssi1: ssi-1 {
- 				interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x03>, <&audma0 0x04>,
- 				       <&audma0 0x49>, <&audma0 0x4a>;
- 				dma-names = "rx", "tx", "rxu", "txu";
- 			};
--			ssi2: ssi@2 {
-+			ssi2: ssi-2 {
- 				interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x05>, <&audma0 0x06>,
- 				       <&audma0 0x63>, <&audma0 0x64>;
- 				dma-names = "rx", "tx", "rxu", "txu";
- 			};
--			ssi3: ssi@3 {
-+			ssi3: ssi-3 {
- 				interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x07>, <&audma0 0x08>,
- 				       <&audma0 0x6f>, <&audma0 0x70>;
- 				dma-names = "rx", "tx", "rxu", "txu";
- 			};
--			ssi4: ssi@4 {
-+			ssi4: ssi-4 {
- 				interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x09>, <&audma0 0x0a>,
- 				       <&audma0 0x71>, <&audma0 0x72>;
- 				dma-names = "rx", "tx", "rxu", "txu";
- 			};
--			ssi5: ssi@5 {
-+			ssi5: ssi-5 {
- 				interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x0b>, <&audma0 0x0c>,
- 				       <&audma0 0x73>, <&audma0 0x74>;
- 				dma-names = "rx", "tx", "rxu", "txu";
- 			};
--			ssi6: ssi@6 {
-+			ssi6: ssi-6 {
- 				interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x0d>, <&audma0 0x0e>,
- 				       <&audma0 0x75>, <&audma0 0x76>;
- 				dma-names = "rx", "tx", "rxu", "txu";
- 			};
--			ssi7: ssi@7 {
-+			ssi7: ssi-7 {
- 				interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x0f>, <&audma0 0x10>,
- 				       <&audma0 0x79>, <&audma0 0x7a>;
- 				dma-names = "rx", "tx", "rxu", "txu";
- 			};
--			ssi8: ssi@8 {
-+			ssi8: ssi-8 {
- 				interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x11>, <&audma0 0x12>,
- 				       <&audma0 0x7b>, <&audma0 0x7c>;
- 				dma-names = "rx", "tx", "rxu", "txu";
- 			};
--			ssi9: ssi@9 {
-+			ssi9: ssi-9 {
- 				interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
- 				dmas = <&audma0 0x13>, <&audma0 0x14>,
- 				       <&audma0 0x7d>, <&audma0 0x7e>;
diff --git a/patches.renesas/0223-dt-bindings-net-sms911x-Add-missing-optional-VDD-reg.patch b/patches.renesas/0223-dt-bindings-net-sms911x-Add-missing-optional-VDD-reg.patch
deleted file mode 100644
index f26f1b2296101b..00000000000000
--- a/patches.renesas/0223-dt-bindings-net-sms911x-Add-missing-optional-VDD-reg.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 8c90cec31f212d5979130e8634fc8c118167f414 Mon Sep 17 00:00:00 2001
-From: Krzysztof Kozlowski <krzk@kernel.org>
-Date: Mon, 19 Jun 2017 18:05:41 +0200
-Subject: [PATCH 223/286] dt-bindings: net: sms911x: Add missing optional VDD
- regulators
-
-The lan911x family of devices require supplying from 3.3 V power
-supplies (connected to VDD_IO, VDD_A and VREG_3.3 pins).  The existing
-driver however obtains only VDD_IO and VDD_A regulators in an optional
-way so document this in bindings.
-
-Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
-Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 7e113321eccba2b52c0e9d11129d370c9511e4db)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/net/smsc911x.txt |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/Documentation/devicetree/bindings/net/smsc911x.txt
-+++ b/Documentation/devicetree/bindings/net/smsc911x.txt
-@@ -27,6 +27,7 @@ Optional properties:
-   of the device. On many systems this is wired high so the device goes
-   out of reset at power-on, but if it is under program control, this
-   optional GPIO can wake up in response to it.
-+- vdd33a-supply, vddvario-supply : 3.3V analog and IO logic power supplies
- 
- Examples:
- 
diff --git a/patches.renesas/0223-sh-Don-t-set-sh-sci-port_reg.patch b/patches.renesas/0223-sh-Don-t-set-sh-sci-port_reg.patch
deleted file mode 100644
index f143610c67d5ac..00000000000000
--- a/patches.renesas/0223-sh-Don-t-set-sh-sci-port_reg.patch
+++ /dev/null
@@ -1,184 +0,0 @@
-From f5bab7a10bbcea5818692b9d3703550f58edf714 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Jan 2017 16:43:29 +0200
-Subject: [PATCH 223/255] sh: Don't set sh-sci port_reg
-
-The driver considers all negative or zero values of the port_reg field
-as invalid. The four platforms that set the field to a register address
-all use an address higher than 0x7fffffff, which is thus considered by
-the driver as invalid. The feature is thus never used, remove it.
-
-The feature could be implemented properly in the future using the
-pinctrl and GPIO APIs if desired.
-
-While at it, don't set the field to SCIx_NOT_SUPPORTED (-1) either,
-leaving it unset leads to the same result. This will allow removing the
-SCIx_NOT_SUPPORTED macro.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit bcce9daa87cd0ad44bf9bdd433eae0474f51e1e2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/sh/kernel/cpu/sh3/setup-sh770x.c
-	arch/sh/kernel/cpu/sh4/setup-sh7750.c
-	arch/sh/kernel/cpu/sh4a/setup-sh7366.c
-	arch/sh/kernel/cpu/sh4a/setup-sh7723.c
-	arch/sh/kernel/cpu/sh4a/setup-sh7724.c
----
- arch/sh/kernel/cpu/sh3/setup-sh770x.c  |    2 --
- arch/sh/kernel/cpu/sh4/setup-sh7750.c  |    1 -
- arch/sh/kernel/cpu/sh4a/setup-sh7366.c |    1 -
- arch/sh/kernel/cpu/sh4a/setup-sh7723.c |    6 ------
- arch/sh/kernel/cpu/sh4a/setup-sh7724.c |    9 ---------
- 5 files changed, 19 deletions(-)
-
---- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
-+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
-@@ -109,7 +109,6 @@ static struct platform_device rtc_device
- };
- 
- static struct plat_sci_port scif0_platform_data = {
--	.port_reg	= 0xa4000136,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE,
- 	.type		= PORT_SCI,
-@@ -160,7 +159,6 @@ static struct platform_device scif1_devi
- #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
-     defined(CONFIG_CPU_SUBTYPE_SH7709)
- static struct plat_sci_port scif2_platform_data = {
--	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE,
- 	.type		= PORT_IRDA,
---- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
-+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
-@@ -38,7 +38,6 @@ static struct platform_device rtc_device
- };
- 
- static struct plat_sci_port sci_platform_data = {
--	.port_reg	= 0xffe0001C,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE,
- 	.type		= PORT_SCI,
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
-@@ -20,7 +20,6 @@
- #include <asm/clock.h>
- 
- static struct plat_sci_port scif0_platform_data = {
--	.port_reg	= 0xa405013e,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.type		= PORT_SCIF,
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
-@@ -23,7 +23,6 @@
- 
- /* Serial */
- static struct plat_sci_port scif0_platform_data = {
--	.port_reg	= 0xa4050160,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.type           = PORT_SCIF,
-@@ -46,7 +45,6 @@ static struct platform_device scif0_devi
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.type           = PORT_SCIF,
-@@ -69,7 +67,6 @@ static struct platform_device scif1_devi
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.type           = PORT_SCIF,
-@@ -93,7 +90,6 @@ static struct platform_device scif2_devi
- 
- static struct plat_sci_port scif3_platform_data = {
- 	.flags          = UPF_BOOT_AUTOCONF,
--	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.sampling_rate	= 8,
- 	.type           = PORT_SCIFA,
-@@ -115,7 +111,6 @@ static struct platform_device scif3_devi
- };
- 
- static struct plat_sci_port scif4_platform_data = {
--	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.sampling_rate	= 8,
-@@ -138,7 +133,6 @@ static struct platform_device scif4_devi
- };
- 
- static struct plat_sci_port scif5_platform_data = {
--	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.sampling_rate	= 8,
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
-@@ -290,7 +290,6 @@ static struct platform_device dma1_devic
- 
- /* Serial */
- static struct plat_sci_port scif0_platform_data = {
--	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.type           = PORT_SCIF,
-@@ -313,7 +312,6 @@ static struct platform_device scif0_devi
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.type           = PORT_SCIF,
-@@ -336,7 +334,6 @@ static struct platform_device scif1_devi
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.type           = PORT_SCIF,
-@@ -359,10 +356,8 @@ static struct platform_device scif2_devi
- };
- 
- static struct plat_sci_port scif3_platform_data = {
--	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE,
--	.sampling_rate	= 8,
- 	.type           = PORT_SCIFA,
- };
- 
-@@ -382,10 +377,8 @@ static struct platform_device scif3_devi
- };
- 
- static struct plat_sci_port scif4_platform_data = {
--	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE,
--	.sampling_rate	= 8,
- 	.type           = PORT_SCIFA,
- };
- 
-@@ -405,10 +398,8 @@ static struct platform_device scif4_devi
- };
- 
- static struct plat_sci_port scif5_platform_data = {
--	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE,
--	.sampling_rate	= 8,
- 	.type           = PORT_SCIFA,
- };
- 
diff --git a/patches.renesas/0224-ARM-dts-r7s72100-add-sdhi-to-device-tree.patch b/patches.renesas/0224-ARM-dts-r7s72100-add-sdhi-to-device-tree.patch
deleted file mode 100644
index 0a998da70140c0..00000000000000
--- a/patches.renesas/0224-ARM-dts-r7s72100-add-sdhi-to-device-tree.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 752835a94ef7ca0e617022a43a51154d7dc6fa73 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Mon, 26 Sep 2016 16:40:31 -0400
-Subject: [PATCH 224/299] ARM: dts: r7s72100: add sdhi to device tree
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 66474697923cd166567b06b492e52adce12393eb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100.dtsi |   26 ++++++++++++++++++++++++++
- 1 file changed, 26 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100.dtsi
-+++ b/arch/arm/boot/dts/r7s72100.dtsi
-@@ -470,4 +470,30 @@
- 		bus-width = <8>;
- 		status = "disabled";
- 	};
-+
-+	sdhi0: sd@e804e000 {
-+		compatible = "renesas,sdhi-r7s72100";
-+		reg = <0xe804e000 0x100>;
-+		interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH
-+			      GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH
-+			      GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
-+
-+		clocks = <&mstp12_clks R7S72100_CLK_SDHI0>;
-+		cap-sd-highspeed;
-+		cap-sdio-irq;
-+		status = "disabled";
-+	};
-+
-+	sdhi1: sd@e804e800 {
-+		compatible = "renesas,sdhi-r7s72100";
-+		reg = <0xe804e800 0x100>;
-+		interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH
-+			      GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH
-+			      GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>;
-+
-+		clocks = <&mstp12_clks R7S72100_CLK_SDHI1>;
-+		cap-sd-highspeed;
-+		cap-sdio-irq;
-+		status = "disabled";
-+	};
- };
diff --git a/patches.renesas/0224-serial-sh-sci-Remove-manual-break-debouncing.patch b/patches.renesas/0224-serial-sh-sci-Remove-manual-break-debouncing.patch
deleted file mode 100644
index 5862eeea9551e0..00000000000000
--- a/patches.renesas/0224-serial-sh-sci-Remove-manual-break-debouncing.patch
+++ /dev/null
@@ -1,256 +0,0 @@
-From 7d25ca02c11d60137c936991edb488b44208877f Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Jan 2017 16:43:38 +0200
-Subject: [PATCH 224/255] serial: sh-sci: Remove manual break debouncing
-
-The sh-sci driver implements manual break debouncing for a few SH
-platforms by reading the value of the RX pin port register. This feature
-is optional and the driver considers all negative or zero values of the
-platform data port_reg field as invalid. As the four platforms that set
-the field to a register address all use an address higher than
-0x7fffffff, the driver will always consider the value as invalid and
-never perform debouncing. The feature is unused, remove it.
-
-Debouncing could be implemented properly in the future using the pinctrl
-and GPIO APIs if desired.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit d5cb1319a91d4f1328b1c70b82c5899acd96af85)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |  124 ++------------------------------------------
- include/linux/serial_sci.h  |    5 -
- 2 files changed, 7 insertions(+), 122 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -125,10 +125,6 @@ struct sci_port {
- 	resource_size_t		reg_size;
- 	struct mctrl_gpios	*gpios;
- 
--	/* Break timer */
--	struct timer_list	break_timer;
--	int			break_flag;
--
- 	/* Clocks */
- 	struct clk		*clks[SCI_NUM_CLKS];
- 	unsigned long		clk_rates[SCI_NUM_CLKS];
-@@ -517,14 +513,6 @@ static void sci_port_disable(struct sci_
- 	if (!sci_port->port.dev)
- 		return;
- 
--	/* Cancel the break timer to ensure that the timer handler will not try
--	 * to access the hardware with clocks and power disabled. Reset the
--	 * break flag to make the break debouncing state machine ready for the
--	 * next break.
--	 */
--	del_timer_sync(&sci_port->break_timer);
--	sci_port->break_flag = 0;
--
- 	for (i = SCI_NUM_CLKS; i-- > 0; )
- 		clk_disable_unprepare(sci_port->clks[i]);
- 
-@@ -751,20 +739,6 @@ static int sci_rxfill(struct uart_port *
- 	return (serial_port_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
- }
- 
--/*
-- * SCI helper for checking the state of the muxed port/RXD pins.
-- */
--static inline int sci_rxd_in(struct uart_port *port)
--{
--	struct sci_port *s = to_sci_port(port);
--
--	if (s->cfg->port_reg <= 0)
--		return 1;
--
--	/* Cast for ARM damage */
--	return !!__raw_readb((void __iomem *)(uintptr_t)s->cfg->port_reg);
--}
--
- /* ********************************************************************** *
-  *                   the interrupt related routines                       *
-  * ********************************************************************** */
-@@ -832,7 +806,6 @@ static void sci_transmit_chars(struct ua
- 
- static void sci_receive_chars(struct uart_port *port)
- {
--	struct sci_port *sci_port = to_sci_port(port);
- 	struct tty_port *tport = &port->state->port;
- 	int i, count, copied = 0;
- 	unsigned short status;
-@@ -852,8 +825,7 @@ static void sci_receive_chars(struct uar
- 
- 		if (port->type == PORT_SCI) {
- 			char c = serial_port_in(port, SCxRDR);
--			if (uart_handle_sysrq_char(port, c) ||
--			    sci_port->break_flag)
-+			if (uart_handle_sysrq_char(port, c))
- 				count = 0;
- 			else
- 				tty_insert_flip_char(tport, c, TTY_NORMAL);
-@@ -862,25 +834,6 @@ static void sci_receive_chars(struct uar
- 				char c = serial_port_in(port, SCxRDR);
- 
- 				status = serial_port_in(port, SCxSR);
--#if defined(CONFIG_CPU_SH3)
--				/* Skip "chars" during break */
--				if (sci_port->break_flag) {
--					if ((c == 0) &&
--					    (status & SCxSR_FER(port))) {
--						count--; i--;
--						continue;
--					}
--
--					/* Nonzero => end-of-break */
--					dev_dbg(port->dev, "debounce<%02x>\n", c);
--					sci_port->break_flag = 0;
--
--					if (STEPFN(c)) {
--						count--; i--;
--						continue;
--					}
--				}
--#endif /* CONFIG_CPU_SH3 */
- 				if (uart_handle_sysrq_char(port, c)) {
- 					count--; i--;
- 					continue;
-@@ -920,37 +873,6 @@ static void sci_receive_chars(struct uar
- 	}
- }
- 
--#define SCI_BREAK_JIFFIES (HZ/20)
--
--/*
-- * The sci generates interrupts during the break,
-- * 1 per millisecond or so during the break period, for 9600 baud.
-- * So dont bother disabling interrupts.
-- * But dont want more than 1 break event.
-- * Use a kernel timer to periodically poll the rx line until
-- * the break is finished.
-- */
--static inline void sci_schedule_break_timer(struct sci_port *port)
--{
--	mod_timer(&port->break_timer, jiffies + SCI_BREAK_JIFFIES);
--}
--
--/* Ensure that two consecutive samples find the break over. */
--static void sci_break_timer(unsigned long data)
--{
--	struct sci_port *port = (struct sci_port *)data;
--
--	if (sci_rxd_in(&port->port) == 0) {
--		port->break_flag = 1;
--		sci_schedule_break_timer(port);
--	} else if (port->break_flag == 1) {
--		/* break is over. */
--		port->break_flag = 2;
--		sci_schedule_break_timer(port);
--	} else
--		port->break_flag = 0;
--}
--
- static int sci_handle_errors(struct uart_port *port)
- {
- 	int copied = 0;
-@@ -970,35 +892,13 @@ static int sci_handle_errors(struct uart
- 	}
- 
- 	if (status & SCxSR_FER(port)) {
--		if (sci_rxd_in(port) == 0) {
--			/* Notify of BREAK */
--			struct sci_port *sci_port = to_sci_port(port);
--
--			if (!sci_port->break_flag) {
--				port->icount.brk++;
--
--				sci_port->break_flag = 1;
--				sci_schedule_break_timer(sci_port);
--
--				/* Do sysrq handling. */
--				if (uart_handle_break(port))
--					return 0;
--
--				dev_dbg(port->dev, "BREAK detected\n");
--
--				if (tty_insert_flip_char(tport, 0, TTY_BREAK))
--					copied++;
--			}
--
--		} else {
--			/* frame error */
--			port->icount.frame++;
-+		/* frame error */
-+		port->icount.frame++;
- 
--			if (tty_insert_flip_char(tport, 0, TTY_FRAME))
--				copied++;
-+		if (tty_insert_flip_char(tport, 0, TTY_FRAME))
-+			copied++;
- 
--			dev_notice(port->dev, "frame error\n");
--		}
-+		dev_notice(port->dev, "frame error\n");
- 	}
- 
- 	if (status & SCxSR_PER(port)) {
-@@ -1051,17 +951,11 @@ static int sci_handle_breaks(struct uart
- 	int copied = 0;
- 	unsigned short status = serial_port_in(port, SCxSR);
- 	struct tty_port *tport = &port->state->port;
--	struct sci_port *s = to_sci_port(port);
- 
- 	if (uart_handle_break(port))
- 		return 0;
- 
--	if (!s->break_flag && status & SCxSR_BRK(port)) {
--#if defined(CONFIG_CPU_SH3)
--		/* Debounce break */
--		s->break_flag = 1;
--#endif
--
-+	if (status & SCxSR_BRK(port)) {
- 		port->icount.brk++;
- 
- 		/* Notify of BREAK */
-@@ -2697,10 +2591,6 @@ static int sci_init_single(struct platfo
- 		pm_runtime_enable(&dev->dev);
- 	}
- 
--	sci_port->break_timer.data = (unsigned long)sci_port;
--	sci_port->break_timer.function = sci_break_timer;
--	init_timer(&sci_port->break_timer);
--
- 	port->type		= p->type;
- 	port->flags		= UPF_FIXED_PORT | UPF_BOOT_AUTOCONF | p->flags;
- 	port->regshift		= p->regshift;
---- a/include/linux/serial_sci.h
-+++ b/include/linux/serial_sci.h
-@@ -9,8 +9,6 @@
-  * Generic header for SuperH (H)SCI(F) (used by sh/sh64 and related parts)
-  */
- 
--#define SCIx_NOT_SUPPORTED	(-1)
--
- /* Serial Control Register (@ = not supported by all parts) */
- #define SCSCR_TIE	BIT(7)	/* Transmit Interrupt Enable */
- #define SCSCR_RIE	BIT(6)	/* Receive Interrupt Enable */
-@@ -41,8 +39,6 @@ enum {
- 	SCIx_NR_REGTYPES,
- };
- 
--struct device;
--
- struct plat_sci_port_ops {
- 	void (*init_pins)(struct uart_port *, unsigned int cflag);
- };
-@@ -66,7 +62,6 @@ struct plat_sci_port {
- 	/*
- 	 * Platform overrides if necessary, defaults otherwise.
- 	 */
--	int		port_reg;
- 	unsigned char	regshift;
- 	unsigned char	regtype;
- 
diff --git a/patches.renesas/0225-ARM-dts-rskrza1-add-sdhi1-DT-support.patch b/patches.renesas/0225-ARM-dts-rskrza1-add-sdhi1-DT-support.patch
deleted file mode 100644
index dea717711e1a63..00000000000000
--- a/patches.renesas/0225-ARM-dts-rskrza1-add-sdhi1-DT-support.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 88c2d6bd681f50b78778209637b6b56c2c0fa15b Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Mon, 26 Sep 2016 16:40:32 -0400
-Subject: [PATCH 225/299] ARM: dts: rskrza1: add sdhi1 DT support
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bba1b7ea9a1cfb1478df2c1cbd8ed6736a5f4f98)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100-rskrza1.dts |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100-rskrza1.dts
-+++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
-@@ -56,6 +56,11 @@
- 	};
- };
- 
-+&sdhi1 {
-+	bus-width = <4>;
-+	status = "okay";
-+};
-+
- &scif2 {
- 	status = "okay";
- };
diff --git a/patches.renesas/0225-drm-bridge-dw-hdmi-Remove-unused-functions.patch b/patches.renesas/0225-drm-bridge-dw-hdmi-Remove-unused-functions.patch
deleted file mode 100644
index c2f3c6a910276a..00000000000000
--- a/patches.renesas/0225-drm-bridge-dw-hdmi-Remove-unused-functions.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 4c38bfb1e3c44dde0ec6f5deea23ac9a53ea0996 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 3 Mar 2017 19:19:58 +0200
-Subject: [PATCH 225/286] drm: bridge: dw-hdmi: Remove unused functions
-
-Most of the hdmi_phy_test_*() functions are unused. Remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Neil Armstrong <narmstrong@baylibre.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Tested-by: Nickey Yang <nickey.yang@rock-chips.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170303172007.26541-2-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 12a3a328eeb1467ef7170b9a710c0b53ee0273eb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |   26 --------------------------
- 1 file changed, 26 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -837,32 +837,6 @@ static inline void hdmi_phy_test_clear(s
- 		  HDMI_PHY_TST0_TSTCLR_MASK, HDMI_PHY_TST0);
- }
- 
--static inline void hdmi_phy_test_enable(struct dw_hdmi *hdmi,
--					unsigned char bit)
--{
--	hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTEN_OFFSET,
--		  HDMI_PHY_TST0_TSTEN_MASK, HDMI_PHY_TST0);
--}
--
--static inline void hdmi_phy_test_clock(struct dw_hdmi *hdmi,
--				       unsigned char bit)
--{
--	hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLK_OFFSET,
--		  HDMI_PHY_TST0_TSTCLK_MASK, HDMI_PHY_TST0);
--}
--
--static inline void hdmi_phy_test_din(struct dw_hdmi *hdmi,
--				     unsigned char bit)
--{
--	hdmi_writeb(hdmi, bit, HDMI_PHY_TST1);
--}
--
--static inline void hdmi_phy_test_dout(struct dw_hdmi *hdmi,
--				      unsigned char bit)
--{
--	hdmi_writeb(hdmi, bit, HDMI_PHY_TST2);
--}
--
- static bool hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, int msec)
- {
- 	u32 val;
diff --git a/patches.renesas/0225-serial-sh-sci-Remove-unused-platform-data-capabiliti.patch b/patches.renesas/0225-serial-sh-sci-Remove-unused-platform-data-capabiliti.patch
deleted file mode 100644
index 8a3b6a5588a31f..00000000000000
--- a/patches.renesas/0225-serial-sh-sci-Remove-unused-platform-data-capabiliti.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From 2b96c21b6e34f18968be422f502aabee24366f97 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Jan 2017 16:43:39 +0200
-Subject: [PATCH 225/255] serial: sh-sci: Remove unused platform data
- capabilities field
-
-The field isn't set by any platform but is only used internally in the
-driver to hold data parsed from DT. Move it to the sci_port structure.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 97ed9790c514066bfae67f22e084b505ed5af436)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |   11 +++++++----
- include/linux/serial_sci.h  |    6 ------
- 2 files changed, 7 insertions(+), 10 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -149,6 +149,7 @@ struct sci_port {
- 	unsigned int			rx_timeout;
- #endif
- 
-+	bool has_rtscts;
- 	bool autorts;
- };
- 
-@@ -680,7 +681,7 @@ static void sci_init_pins(struct uart_po
- 
- 		/* Enable RXD and TXD pin functions */
- 		ctrl &= ~(SCPCR_RXDC | SCPCR_TXDC);
--		if (to_sci_port(port)->cfg->capabilities & SCIx_HAVE_RTSCTS) {
-+		if (to_sci_port(port)->has_rtscts) {
- 			/* RTS# is output, driven 1 */
- 			ctrl |= SCPCR_RTSC;
- 			serial_port_out(port, SCPDR,
-@@ -1751,7 +1752,7 @@ static void sci_set_mctrl(struct uart_po
- 
- 	mctrl_gpio_set(s->gpios, mctrl);
- 
--	if (!(s->cfg->capabilities & SCIx_HAVE_RTSCTS))
-+	if (!s->has_rtscts)
- 		return;
- 
- 	if (!(mctrl & TIOCM_RTS)) {
-@@ -2827,6 +2828,7 @@ sci_parse_dt(struct platform_device *pde
- 	struct device_node *np = pdev->dev.of_node;
- 	const struct of_device_id *match;
- 	struct plat_sci_port *p;
-+	struct sci_port *sp;
- 	int id;
- 
- 	if (!IS_ENABLED(CONFIG_OF) || !np)
-@@ -2847,13 +2849,14 @@ sci_parse_dt(struct platform_device *pde
- 		return NULL;
- 	}
- 
-+	sp = &sci_ports[id];
- 	*dev_id = id;
- 
- 	p->type = SCI_OF_TYPE(match->data);
- 	p->regtype = SCI_OF_REGTYPE(match->data);
- 
- 	if (of_find_property(np, "uart-has-rtscts", NULL))
--		p->capabilities |= SCIx_HAVE_RTSCTS;
-+		sp->has_rtscts = true;
- 
- 	return p;
- }
-@@ -2881,7 +2884,7 @@ static int sci_probe_single(struct platf
- 	if (IS_ERR(sciport->gpios) && PTR_ERR(sciport->gpios) != -ENOSYS)
- 		return PTR_ERR(sciport->gpios);
- 
--	if (p->capabilities & SCIx_HAVE_RTSCTS) {
-+	if (sciport->has_rtscts) {
- 		if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios,
- 							UART_GPIO_CTS)) ||
- 		    !IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios,
---- a/include/linux/serial_sci.h
-+++ b/include/linux/serial_sci.h
-@@ -44,17 +44,11 @@ struct plat_sci_port_ops {
- };
- 
- /*
-- * Port-specific capabilities
-- */
--#define SCIx_HAVE_RTSCTS	BIT(0)
--
--/*
-  * Platform device specific platform_data struct
-  */
- struct plat_sci_port {
- 	unsigned int	type;			/* SCI / SCIF / IRDA / HSCIF */
- 	upf_t		flags;			/* UPF_* flags */
--	unsigned long	capabilities;		/* Port features/capabilities */
- 
- 	unsigned int	sampling_rate;
- 	unsigned int	scscr;			/* SCSCR initialization */
diff --git a/patches.renesas/0226-ARM-dts-lager-Add-entries-for-VIN-HDMI-input-support.patch b/patches.renesas/0226-ARM-dts-lager-Add-entries-for-VIN-HDMI-input-support.patch
deleted file mode 100644
index 4aa55eb9365c0a..00000000000000
--- a/patches.renesas/0226-ARM-dts-lager-Add-entries-for-VIN-HDMI-input-support.patch
+++ /dev/null
@@ -1,125 +0,0 @@
-From 10b2b055773fcc6f5b5212ba2388600df551c926 Mon Sep 17 00:00:00 2001
-From: William Towle <william.towle@codethink.co.uk>
-Date: Tue, 18 Oct 2016 17:01:33 +0200
-Subject: [PATCH 226/299] ARM: dts: lager: Add entries for VIN HDMI input
- support
-
-Add DT entries for vin0, vin0_pins, and adv7612.
-
-Sets the 'default-input' property for ADV7612, enabling image and video
-capture without the need to have userspace specifying routing.
-
-Signed-off-by: William Towle <william.towle@codethink.co.uk>
-Signed-off-by: Rob Taylor <rob.taylor@codethink.co.uk>
-[uli: added interrupt, renamed endpoint, merged default-input]
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 56548d0c5aead2a1f7df43fcb29f93575ff713b4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790-lager.dts |   66 ++++++++++++++++++++++++++++++++++--
- 1 file changed, 64 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7790-lager.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager.dts
-@@ -231,12 +231,23 @@
- 		};
- 	};
- 
-+	hdmi-in {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi_con_in: endpoint {
-+				remote-endpoint = <&adv7612_in>;
-+			};
-+		};
-+	};
-+
- 	hdmi-out {
- 		compatible = "hdmi-connector";
- 		type = "a";
- 
- 		port {
--			hdmi_con: endpoint {
-+			hdmi_con_out: endpoint {
- 				remote-endpoint = <&adv7511_out>;
- 			};
- 		};
-@@ -427,6 +438,11 @@
- 		function = "usb2";
- 	};
- 
-+	vin0_pins: vin0 {
-+		groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk";
-+		function = "vin0";
-+	};
-+
- 	vin1_pins: vin1 {
- 		groups = "vin1_data8", "vin1_clk";
- 		function = "vin1";
-@@ -646,7 +662,34 @@
- 			port@1 {
- 				reg = <1>;
- 				adv7511_out: endpoint {
--					remote-endpoint = <&hdmi_con>;
-+					remote-endpoint = <&hdmi_con_out>;
-+				};
-+			};
-+		};
-+	};
-+
-+	hdmi-in@4c {
-+		compatible = "adi,adv7612";
-+		reg = <0x4c>;
-+		interrupt-parent = <&gpio1>;
-+		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
-+		default-input = <0>;
-+
-+		ports {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+
-+			port@0 {
-+				reg = <0>;
-+				adv7612_in: endpoint {
-+					remote-endpoint = <&hdmi_con_in>;
-+				};
-+			};
-+
-+			port@2 {
-+				reg = <2>;
-+				adv7612_out: endpoint {
-+					remote-endpoint = <&vin0ep2>;
- 				};
- 			};
- 		};
-@@ -722,6 +765,25 @@
- 	status = "okay";
- };
- 
-+/* HDMI video input */
-+&vin0 {
-+	pinctrl-0 = <&vin0_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+
-+	port {
-+		vin0ep2: endpoint {
-+			remote-endpoint = <&adv7612_out>;
-+			bus-width = <24>;
-+			hsync-active = <0>;
-+			vsync-active = <0>;
-+			pclk-sample = <1>;
-+			data-active = <1>;
-+		};
-+	};
-+};
-+
- /* composite video input */
- &vin1 {
- 	pinctrl-0 = <&vin1_pins>;
diff --git a/patches.renesas/0226-drm-bridge-dw-hdmi-Move-CSC-configuration-out-of-PHY.patch b/patches.renesas/0226-drm-bridge-dw-hdmi-Move-CSC-configuration-out-of-PHY.patch
deleted file mode 100644
index 108d5c19c924e8..00000000000000
--- a/patches.renesas/0226-drm-bridge-dw-hdmi-Move-CSC-configuration-out-of-PHY.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From ca1317a0341e6dfef2ee6e2bfde30acf52d4cf48 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 3 Mar 2017 19:19:59 +0200
-Subject: [PATCH 226/286] drm: bridge: dw-hdmi: Move CSC configuration out of
- PHY code
-
-The color space converter isn't part of the PHY, move its configuration
-out of PHY code.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Neil Armstrong <narmstrong@baylibre.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170303172007.26541-3-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 8b9e1c0de3d81c7b2118f8c403a84fad758c3305)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |   25 ++++++++++---------------
- 1 file changed, 10 insertions(+), 15 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -914,7 +914,7 @@ static void dw_hdmi_phy_sel_interface_co
- 			 HDMI_PHY_CONF0_SELDIPIF_MASK);
- }
- 
--static int hdmi_phy_configure(struct dw_hdmi *hdmi, int cscon)
-+static int hdmi_phy_configure(struct dw_hdmi *hdmi)
- {
- 	u8 val, msec;
- 	const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
-@@ -946,14 +946,6 @@ static int hdmi_phy_configure(struct dw_
- 		return -EINVAL;
- 	}
- 
--	/* Enable csc path */
--	if (cscon)
--		val = HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH;
--	else
--		val = HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS;
--
--	hdmi_writeb(hdmi, val, HDMI_MC_FLOWCTRL);
--
- 	/* gen2 tx power off */
- 	dw_hdmi_phy_gen2_txpwron(hdmi, 0);
- 
-@@ -1028,10 +1020,6 @@ static int hdmi_phy_configure(struct dw_
- static int dw_hdmi_phy_init(struct dw_hdmi *hdmi)
- {
- 	int i, ret;
--	bool cscon;
--
--	/*check csc whether needed activated in HDMI mode */
--	cscon = hdmi->sink_is_hdmi && is_color_space_conversion(hdmi);
- 
- 	/* HDMI Phy spec says to do the phy initialization sequence twice */
- 	for (i = 0; i < 2; i++) {
-@@ -1040,8 +1028,7 @@ static int dw_hdmi_phy_init(struct dw_hd
- 		dw_hdmi_phy_enable_tmds(hdmi, 0);
- 		dw_hdmi_phy_enable_powerdown(hdmi, true);
- 
--		/* Enable CSC */
--		ret = hdmi_phy_configure(hdmi, cscon);
-+		ret = hdmi_phy_configure(hdmi);
- 		if (ret)
- 			return ret;
- 	}
-@@ -1303,6 +1290,14 @@ static void dw_hdmi_enable_video_path(st
- 		clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE;
- 		hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
- 	}
-+
-+	/* Enable color space conversion if needed (for HDMI sinks only). */
-+	if (hdmi->sink_is_hdmi && is_color_space_conversion(hdmi))
-+		hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH,
-+			    HDMI_MC_FLOWCTRL);
-+	else
-+		hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS,
-+			    HDMI_MC_FLOWCTRL);
- }
- 
- static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi)
diff --git a/patches.renesas/0226-serial-sh-sci-Compute-the-regshift-value-for-SCI-por.patch b/patches.renesas/0226-serial-sh-sci-Compute-the-regshift-value-for-SCI-por.patch
deleted file mode 100644
index c40d5f3a189a4a..00000000000000
--- a/patches.renesas/0226-serial-sh-sci-Compute-the-regshift-value-for-SCI-por.patch
+++ /dev/null
@@ -1,109 +0,0 @@
-From 861cb580245b6d19b116575e828849373d86d159 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Jan 2017 16:43:40 +0200
-Subject: [PATCH 226/255] serial: sh-sci: Compute the regshift value for SCI
- ports
-
-SCI instances found in SH SoCs have different spacing between registers
-depending on the SoC. The platform data contains a regshift field that
-tells the driver by how many bits to shift the register offset to
-compute its address. We can compute the regshift value automatically
-based on the memory resource size, there's no need to pass the value
-through platform data.
-
-Fix the sh7750 SCI and sh7760 SIM port memory resources length to ensure
-proper computation of the regshift value.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit dfc80387aefb78161f83732804c6d01c89c24595)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/sh/kernel/cpu/sh4/setup-sh7760.c
----
- arch/sh/kernel/cpu/sh3/setup-sh770x.c |    1 -
- arch/sh/kernel/cpu/sh4/setup-sh7750.c |    3 +--
- arch/sh/kernel/cpu/sh4/setup-sh7760.c |   10 ++++++++--
- drivers/tty/serial/sh-sci.c           |    8 +++++++-
- include/linux/serial_sci.h            |    1 -
- 5 files changed, 16 insertions(+), 7 deletions(-)
-
---- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
-+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
-@@ -113,7 +113,6 @@ static struct plat_sci_port scif0_platfo
- 	.scscr		= SCSCR_TE | SCSCR_RE,
- 	.type		= PORT_SCI,
- 	.ops		= &sh770x_sci_port_ops,
--	.regshift	= 1,
- };
- 
- static struct resource scif0_resources[] = {
---- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
-+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
-@@ -41,11 +41,10 @@ static struct plat_sci_port sci_platform
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE,
- 	.type		= PORT_SCI,
--	.regshift	= 2,
- };
- 
- static struct resource sci_resources[] = {
--	DEFINE_RES_MEM(0xffe00000, 0x100),
-+	DEFINE_RES_MEM(0xffe00000, 0x20),
- 	DEFINE_RES_IRQ(evt2irq(0x4e0)),
- };
- 
---- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
-+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
-@@ -205,12 +205,18 @@ static struct platform_device scif2_devi
- static struct plat_sci_port scif3_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
-+	/*
-+	 * This is actually a SIM card module serial port, based on an SCI with
-+	 * additional registers. The sh-sci driver doesn't support the SIM port
-+	 * type, declare it as a SCI. Don't declare the additional registers in
-+	 * the memory resource or the driver will compute an incorrect regshift
-+	 * value.
-+	 */
- 	.type		= PORT_SCI,
--	.regshift	= 2,
- };
- 
- static struct resource scif3_resources[] = {
--	DEFINE_RES_MEM(0xfe480000, 0x100),
-+	DEFINE_RES_MEM(0xfe480000, 0x10),
- 	DEFINE_RES_IRQ(evt2irq(0xc00)),
- 	DEFINE_RES_IRQ(evt2irq(0xc20)),
- 	DEFINE_RES_IRQ(evt2irq(0xc40)),
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -2594,9 +2594,15 @@ static int sci_init_single(struct platfo
- 
- 	port->type		= p->type;
- 	port->flags		= UPF_FIXED_PORT | UPF_BOOT_AUTOCONF | p->flags;
--	port->regshift		= p->regshift;
- 	port->fifosize		= sci_port->params->fifosize;
- 
-+	if (port->type == PORT_SCI) {
-+		if (sci_port->reg_size >= 0x20)
-+			port->regshift = 2;
-+		else
-+			port->regshift = 1;
-+	}
-+
- 	/*
- 	 * The UART port needs an IRQ value, so we peg this to the RX IRQ
- 	 * for the multi-IRQ ports, which is where we are primarily
---- a/include/linux/serial_sci.h
-+++ b/include/linux/serial_sci.h
-@@ -56,7 +56,6 @@ struct plat_sci_port {
- 	/*
- 	 * Platform overrides if necessary, defaults otherwise.
- 	 */
--	unsigned char	regshift;
- 	unsigned char	regtype;
- 
- 	struct plat_sci_port_ops	*ops;
diff --git a/patches.renesas/0227-ARM-dts-koelsch-add-HDMI-input.patch b/patches.renesas/0227-ARM-dts-koelsch-add-HDMI-input.patch
deleted file mode 100644
index 2b5c37c71dea58..00000000000000
--- a/patches.renesas/0227-ARM-dts-koelsch-add-HDMI-input.patch
+++ /dev/null
@@ -1,122 +0,0 @@
-From 6b9e3a41477fb939ceea2b3ee9ee17c751b6ff7c Mon Sep 17 00:00:00 2001
-From: Hans Verkuil <hverkuil@xs4all.nl>
-Date: Tue, 18 Oct 2016 17:01:34 +0200
-Subject: [PATCH 227/299] ARM: dts: koelsch: add HDMI input
-
-Add support in the dts for the HDMI input. Based on the Lager dts
-patch from Ulrich Hecht.
-
-Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
-[uli: removed "renesas," prefixes from pfc nodes]
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 84e3a74664c52b58cd7f5b6fa381f7f1cd1956e0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791-koelsch.dts |   68 +++++++++++++++++++++++++++++++++-
- 1 file changed, 66 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7791-koelsch.dts
-+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
-@@ -265,12 +265,23 @@
- 		};
- 	};
- 
-+	hdmi-in {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi_con_in: endpoint {
-+				remote-endpoint = <&adv7612_in>;
-+			};
-+		};
-+	};
-+
- 	hdmi-out {
- 		compatible = "hdmi-connector";
- 		type = "a";
- 
- 		port {
--			hdmi_con: endpoint {
-+			hdmi_con_out: endpoint {
- 				remote-endpoint = <&adv7511_out>;
- 			};
- 		};
-@@ -414,6 +425,11 @@
- 		function = "usb1";
- 	};
- 
-+	vin0_pins: vin0 {
-+		groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk";
-+		function = "vin0";
-+	};
-+
- 	vin1_pins: vin1 {
- 		groups = "vin1_data8", "vin1_clk";
- 		function = "vin1";
-@@ -617,7 +633,34 @@
- 			port@1 {
- 				reg = <1>;
- 				adv7511_out: endpoint {
--					remote-endpoint = <&hdmi_con>;
-+					remote-endpoint = <&hdmi_con_out>;
-+				};
-+			};
-+		};
-+	};
-+
-+	hdmi-in@4c {
-+		compatible = "adi,adv7612";
-+		reg = <0x4c>;
-+		interrupt-parent = <&gpio4>;
-+		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
-+		default-input = <0>;
-+
-+		ports {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+
-+			port@0 {
-+				reg = <0>;
-+				adv7612_in: endpoint {
-+					remote-endpoint = <&hdmi_con_in>;
-+				};
-+			};
-+
-+			port@2 {
-+				reg = <2>;
-+				adv7612_out: endpoint {
-+					remote-endpoint = <&vin0ep2>;
- 				};
- 			};
- 		};
-@@ -699,6 +742,27 @@
- 	cpu0-supply = <&vdd_dvfs>;
- };
- 
-+/* HDMI video input */
-+&vin0 {
-+	status = "okay";
-+	pinctrl-0 = <&vin0_pins>;
-+	pinctrl-names = "default";
-+
-+	port {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		vin0ep2: endpoint {
-+			remote-endpoint = <&adv7612_out>;
-+			bus-width = <24>;
-+			hsync-active = <0>;
-+			vsync-active = <0>;
-+			pclk-sample = <1>;
-+			data-active = <1>;
-+		};
-+	};
-+};
-+
- /* composite video input */
- &vin1 {
- 	status = "okay";
diff --git a/patches.renesas/0227-drm-bridge-dw-hdmi-Enable-CSC-even-for-DVI.patch b/patches.renesas/0227-drm-bridge-dw-hdmi-Enable-CSC-even-for-DVI.patch
deleted file mode 100644
index ba192cd8ca3ec6..00000000000000
--- a/patches.renesas/0227-drm-bridge-dw-hdmi-Enable-CSC-even-for-DVI.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 4bb5b02aea8ddaeabf767383bb17e3682e23b91f Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Fri, 3 Mar 2017 19:20:00 +0200
-Subject: [PATCH 227/286] drm: bridge: dw-hdmi: Enable CSC even for DVI
-
-If the input pixel format is not RGB, the CSC must be enabled in order to
-provide valid pixel to DVI sinks.
-This patch removes the hdmi only dependency on the CSC enabling.
-
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
-Tested-by: Neil Armstrong <narmstrong@baylibre.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170303172007.26541-4-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 14247d7ce769cfc2269a8b6a58157abb26813f3e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -1291,8 +1291,8 @@ static void dw_hdmi_enable_video_path(st
- 		hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
- 	}
- 
--	/* Enable color space conversion if needed (for HDMI sinks only). */
--	if (hdmi->sink_is_hdmi && is_color_space_conversion(hdmi))
-+	/* Enable color space conversion if needed */
-+	if (is_color_space_conversion(hdmi))
- 		hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH,
- 			    HDMI_MC_FLOWCTRL);
- 	else
diff --git a/patches.renesas/0227-serial-sh-sci-Reformat-sci_parse_dt-for-git-diff.patch b/patches.renesas/0227-serial-sh-sci-Reformat-sci_parse_dt-for-git-diff.patch
deleted file mode 100644
index 016e4ebf06cbc4..00000000000000
--- a/patches.renesas/0227-serial-sh-sci-Reformat-sci_parse_dt-for-git-diff.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From e792492c0246157d7ae04c38322ce3e04c8f0b1c Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Wed, 25 Jan 2017 15:55:49 +0100
-Subject: [PATCH 227/255] serial: sh-sci: Reformat sci_parse_dt() for git diff
-
-As the function header of sci_parse_dt() is split in an unusual way,
-"git diff" gets confused when changes to the body of the function are
-made, and attributes them to the wrong function.
-
-Reformat the function header to fix this.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 54b12c48f0c603f25bac3c7c58a02cee65610171)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -2828,8 +2828,8 @@ static const struct of_device_id of_sci_
- };
- MODULE_DEVICE_TABLE(of, of_sci_match);
- 
--static struct plat_sci_port *
--sci_parse_dt(struct platform_device *pdev, unsigned int *dev_id)
-+static struct plat_sci_port *sci_parse_dt(struct platform_device *pdev,
-+					  unsigned int *dev_id)
- {
- 	struct device_node *np = pdev->dev.of_node;
- 	const struct of_device_id *match;
diff --git a/patches.renesas/0228-ARM-dts-r8a7793-Enable-VIN0-VIN2.patch b/patches.renesas/0228-ARM-dts-r8a7793-Enable-VIN0-VIN2.patch
deleted file mode 100644
index d5d72d76fa103d..00000000000000
--- a/patches.renesas/0228-ARM-dts-r8a7793-Enable-VIN0-VIN2.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 1ab1d8daf7f59d3736fc4d9ca2d37e7035516b1b Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Tue, 18 Oct 2016 17:02:21 +0200
-Subject: [PATCH 228/299] ARM: dts: r8a7793: Enable VIN0-VIN2
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 06b64afa6e981b332dccadcf0b5d52139525b4f6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7793.dtsi |   27 +++++++++++++++++++++++++++
- 1 file changed, 27 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7793.dtsi
-+++ b/arch/arm/boot/dts/r8a7793.dtsi
-@@ -851,6 +851,33 @@
- 		status = "disabled";
- 	};
- 
-+	vin0: video@e6ef0000 {
-+		compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
-+		reg = <0 0xe6ef0000 0 0x1000>;
-+		interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&mstp8_clks R8A7793_CLK_VIN0>;
-+		power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
-+		status = "disabled";
-+	};
-+
-+	vin1: video@e6ef1000 {
-+		compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
-+		reg = <0 0xe6ef1000 0 0x1000>;
-+		interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&mstp8_clks R8A7793_CLK_VIN1>;
-+		power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
-+		status = "disabled";
-+	};
-+
-+	vin2: video@e6ef2000 {
-+		compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
-+		reg = <0 0xe6ef2000 0 0x1000>;
-+		interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&mstp8_clks R8A7793_CLK_VIN2>;
-+		power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
-+		status = "disabled";
-+	};
-+
- 	qspi: spi@e6b10000 {
- 		compatible = "renesas,qspi-r8a7793", "renesas,qspi";
- 		reg = <0 0xe6b10000 0 0x2c>;
diff --git a/patches.renesas/0228-drm-bridge-dw-hdmi-Fix-the-PHY-power-down-sequence.patch b/patches.renesas/0228-drm-bridge-dw-hdmi-Fix-the-PHY-power-down-sequence.patch
deleted file mode 100644
index 7a060438264fc2..00000000000000
--- a/patches.renesas/0228-drm-bridge-dw-hdmi-Fix-the-PHY-power-down-sequence.patch
+++ /dev/null
@@ -1,147 +0,0 @@
-From 50fafc38c436b7d77cc2a0beba931f14f1347b7f Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 6 Mar 2017 01:35:39 +0200
-Subject: [PATCH 228/286] drm: bridge: dw-hdmi: Fix the PHY power down sequence
-
-The PHY requires us to wait for the PHY to switch to low power mode
-after deasserting TXPWRON and before asserting PDDQ in the power down
-sequence, otherwise power down will fail.
-
-The PHY power down can be monitored though the TX_READY bit, available
-through I2C in the PHY registers, or the TX_PHY_LOCK bit, available
-through the HDMI TX registers. As the two are equivalent, let's pick the
-easier solution of polling the TX_PHY_LOCK bit.
-
-The power down code is currently duplicated in multiple places. To avoid
-spreading multiple calls to a TX_PHY_LOCK poll function, we have to
-refactor the power down code and group it all in a single function.
-
-Tests showed that one poll iteration was enough for TX_PHY_LOCK to
-become low, without requiring any additional delay. Retrying the read
-five times with a 1ms to 2ms delay between each attempt should thus be
-more than enough.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Neil Armstrong <narmstrong@baylibre.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170305233539.11898-1-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit b0e583e5b6b90eed40456c394410c154a5160814)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |   52 ++++++++++++++++++++++++++++++++-------
- 1 file changed, 43 insertions(+), 9 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -116,6 +116,7 @@ struct dw_hdmi_i2c {
- struct dw_hdmi_phy_data {
- 	enum dw_hdmi_phy_type type;
- 	const char *name;
-+	unsigned int gen;
- 	bool has_svsret;
- };
- 
-@@ -914,6 +915,40 @@ static void dw_hdmi_phy_sel_interface_co
- 			 HDMI_PHY_CONF0_SELDIPIF_MASK);
- }
- 
-+static void dw_hdmi_phy_power_off(struct dw_hdmi *hdmi)
-+{
-+	const struct dw_hdmi_phy_data *phy = hdmi->phy;
-+	unsigned int i;
-+	u16 val;
-+
-+	if (phy->gen == 1) {
-+		dw_hdmi_phy_enable_tmds(hdmi, 0);
-+		dw_hdmi_phy_enable_powerdown(hdmi, true);
-+		return;
-+	}
-+
-+	dw_hdmi_phy_gen2_txpwron(hdmi, 0);
-+
-+	/*
-+	 * Wait for TX_PHY_LOCK to be deasserted to indicate that the PHY went
-+	 * to low power mode.
-+	 */
-+	for (i = 0; i < 5; ++i) {
-+		val = hdmi_readb(hdmi, HDMI_PHY_STAT0);
-+		if (!(val & HDMI_PHY_TX_PHY_LOCK))
-+			break;
-+
-+		usleep_range(1000, 2000);
-+	}
-+
-+	if (val & HDMI_PHY_TX_PHY_LOCK)
-+		dev_warn(hdmi->dev, "PHY failed to power down\n");
-+	else
-+		dev_dbg(hdmi->dev, "PHY powered down in %u iterations\n", i);
-+
-+	dw_hdmi_phy_gen2_pddq(hdmi, 1);
-+}
-+
- static int hdmi_phy_configure(struct dw_hdmi *hdmi)
- {
- 	u8 val, msec;
-@@ -946,11 +981,7 @@ static int hdmi_phy_configure(struct dw_
- 		return -EINVAL;
- 	}
- 
--	/* gen2 tx power off */
--	dw_hdmi_phy_gen2_txpwron(hdmi, 0);
--
--	/* gen2 pddq */
--	dw_hdmi_phy_gen2_pddq(hdmi, 1);
-+	dw_hdmi_phy_power_off(hdmi);
- 
- 	/* Leave low power consumption mode by asserting SVSRET. */
- 	if (hdmi->phy->has_svsret)
-@@ -1025,8 +1056,6 @@ static int dw_hdmi_phy_init(struct dw_hd
- 	for (i = 0; i < 2; i++) {
- 		dw_hdmi_phy_sel_data_en_pol(hdmi, 1);
- 		dw_hdmi_phy_sel_interface_control(hdmi, 0);
--		dw_hdmi_phy_enable_tmds(hdmi, 0);
--		dw_hdmi_phy_enable_powerdown(hdmi, true);
- 
- 		ret = hdmi_phy_configure(hdmi);
- 		if (ret)
-@@ -1256,8 +1285,7 @@ static void dw_hdmi_phy_disable(struct d
- 	if (!hdmi->phy_enabled)
- 		return;
- 
--	dw_hdmi_phy_enable_tmds(hdmi, 0);
--	dw_hdmi_phy_enable_powerdown(hdmi, true);
-+	dw_hdmi_phy_power_off(hdmi);
- 
- 	hdmi->phy_enabled = false;
- }
-@@ -1827,23 +1855,29 @@ static const struct dw_hdmi_phy_data dw_
- 	{
- 		.type = DW_HDMI_PHY_DWC_HDMI_TX_PHY,
- 		.name = "DWC HDMI TX PHY",
-+		.gen = 1,
- 	}, {
- 		.type = DW_HDMI_PHY_DWC_MHL_PHY_HEAC,
- 		.name = "DWC MHL PHY + HEAC PHY",
-+		.gen = 2,
- 		.has_svsret = true,
- 	}, {
- 		.type = DW_HDMI_PHY_DWC_MHL_PHY,
- 		.name = "DWC MHL PHY",
-+		.gen = 2,
- 		.has_svsret = true,
- 	}, {
- 		.type = DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY_HEAC,
- 		.name = "DWC HDMI 3D TX PHY + HEAC PHY",
-+		.gen = 2,
- 	}, {
- 		.type = DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY,
- 		.name = "DWC HDMI 3D TX PHY",
-+		.gen = 2,
- 	}, {
- 		.type = DW_HDMI_PHY_DWC_HDMI20_TX_PHY,
- 		.name = "DWC HDMI 2.0 TX PHY",
-+		.gen = 2,
- 		.has_svsret = true,
- 	}
- };
diff --git a/patches.renesas/0228-serial-sh-sci-add-FIFO-trigger-bits.patch b/patches.renesas/0228-serial-sh-sci-add-FIFO-trigger-bits.patch
deleted file mode 100644
index 96ab5b49367a44..00000000000000
--- a/patches.renesas/0228-serial-sh-sci-add-FIFO-trigger-bits.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From a631740d6e09004d2fdf0e1a69e0f5fbaeab9e6a Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Thu, 2 Feb 2017 18:10:14 +0100
-Subject: [PATCH 228/255] serial: sh-sci: add FIFO trigger bits
-
-Defines the bits controlling FIFO thresholds, adds the additional
-HSCIF registers to the register map.
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 54e14ae2f3e82b327853e40afa9382a984a56742)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |    2 ++
- drivers/tty/serial/sh-sci.h |    6 ++++++
- 2 files changed, 8 insertions(+)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -373,6 +373,8 @@ static const struct sci_port_params sci_
- 			[HSSRR]		= { 0x40, 16 },
- 			[SCDL]		= { 0x30, 16 },
- 			[SCCKS]		= { 0x34, 16 },
-+			[HSRTRGR]	= { 0x54, 16 },
-+			[HSTTRGR]	= { 0x58, 16 },
- 		},
- 		.fifosize = 128,
- 		.overrun_reg = SCLSR,
---- a/drivers/tty/serial/sh-sci.h
-+++ b/drivers/tty/serial/sh-sci.h
-@@ -29,6 +29,8 @@ enum {
- 	SCPDR,				/* Serial Port Data Register */
- 	SCDL,				/* BRG Frequency Division Register */
- 	SCCKS,				/* BRG Clock Select Register */
-+	HSRTRGR,			/* Rx FIFO Data Count Trigger Register */
-+	HSTTRGR,			/* Tx FIFO Data Count Trigger Register */
- 
- 	SCIx_NR_REGS,
- };
-@@ -99,6 +101,10 @@ enum {
- #define SCIF_BREAK_CLEAR	(u32)(~(SCIF_PER | SCIF_FER | SCIF_BRK))
- 
- /* SCFCR (FIFO Control Register) */
-+#define SCFCR_RTRG1	BIT(7)	/* Receive FIFO Data Count Trigger */
-+#define SCFCR_RTRG0	BIT(6)
-+#define SCFCR_TTRG1	BIT(5)	/* Transmit FIFO Data Count Trigger */
-+#define SCFCR_TTRG0	BIT(4)
- #define SCFCR_MCE	BIT(3)	/* Modem Control Enable */
- #define SCFCR_TFRST	BIT(2)	/* Transmit FIFO Data Register Reset */
- #define SCFCR_RFRST	BIT(1)	/* Receive FIFO Data Register Reset */
diff --git a/patches.renesas/0229-ARM-dts-r8a7779-Fix-DU-reg-property.patch b/patches.renesas/0229-ARM-dts-r8a7779-Fix-DU-reg-property.patch
deleted file mode 100644
index 0887cbc6c5ce38..00000000000000
--- a/patches.renesas/0229-ARM-dts-r8a7779-Fix-DU-reg-property.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 41f0a953d66f739f5d241e56bbbcdc6181d63c33 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 19 Oct 2016 01:23:02 +0300
-Subject: [PATCH 229/299] ARM: dts: r8a7779: Fix DU reg property
-
-The system uses one address cell and one size cell, not two. Fix the DU
-DT node.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 30524edfae10d4af08cb2daed786ae4713ba3fd6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779.dtsi |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -420,7 +420,7 @@
- 
- 	du: display@fff80000 {
- 		compatible = "renesas,du-r8a7779";
--		reg = <0 0xfff80000 0 0x40000>;
-+		reg = <0xfff80000 0x40000>;
- 		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&mstp1_clks R8A7779_CLK_DU>;
- 		power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
diff --git a/patches.renesas/0229-drm-bridge-dw-hdmi-Fix-the-PHY-power-up-sequence.patch b/patches.renesas/0229-drm-bridge-dw-hdmi-Fix-the-PHY-power-up-sequence.patch
deleted file mode 100644
index 4ba2b7a37caef8..00000000000000
--- a/patches.renesas/0229-drm-bridge-dw-hdmi-Fix-the-PHY-power-up-sequence.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From 770344ff161f01bef753f1c91494910f13590e69 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 6 Mar 2017 01:35:57 +0200
-Subject: [PATCH 229/286] drm: bridge: dw-hdmi: Fix the PHY power up sequence
-
-When powering the PHY up we need to wait for the PLL to lock. This is
-done by polling the TX_PHY_LOCK bit in the HDMI_PHY_STAT0 register
-(interrupt-based wait could be implemented as well but is likely
-overkill). The bit is asserted when the PLL locks, but the current code
-incorrectly waits for the bit to be deasserted. Fix it, and while at it,
-replace the udelay() with a sleep as the code never runs in
-non-sleepable context.
-
-To be consistent with the power down implementation move the poll loop
-to the power off function.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Neil Armstrong <narmstrong@baylibre.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170305233557.11945-1-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 181e0ef092a4952aa523c5b9cb21394cf43bcd46)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |   65 ++++++++++++++++++++++-----------------
- 1 file changed, 37 insertions(+), 28 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -949,9 +949,44 @@ static void dw_hdmi_phy_power_off(struct
- 	dw_hdmi_phy_gen2_pddq(hdmi, 1);
- }
- 
-+static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi)
-+{
-+	const struct dw_hdmi_phy_data *phy = hdmi->phy;
-+	unsigned int i;
-+	u8 val;
-+
-+	if (phy->gen == 1) {
-+		dw_hdmi_phy_enable_powerdown(hdmi, false);
-+
-+		/* Toggle TMDS enable. */
-+		dw_hdmi_phy_enable_tmds(hdmi, 0);
-+		dw_hdmi_phy_enable_tmds(hdmi, 1);
-+		return 0;
-+	}
-+
-+	dw_hdmi_phy_gen2_txpwron(hdmi, 1);
-+	dw_hdmi_phy_gen2_pddq(hdmi, 0);
-+
-+	/* Wait for PHY PLL lock */
-+	for (i = 0; i < 5; ++i) {
-+		val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
-+		if (val)
-+			break;
-+
-+		usleep_range(1000, 2000);
-+	}
-+
-+	if (!val) {
-+		dev_err(hdmi->dev, "PHY PLL failed to lock\n");
-+		return -ETIMEDOUT;
-+	}
-+
-+	dev_dbg(hdmi->dev, "PHY PLL locked %u iterations\n", i);
-+	return 0;
-+}
-+
- static int hdmi_phy_configure(struct dw_hdmi *hdmi)
- {
--	u8 val, msec;
- 	const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
- 	const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
- 	const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
-@@ -1019,33 +1054,7 @@ static int hdmi_phy_configure(struct dw_
- 	hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE,
- 			   HDMI_3D_TX_PHY_CKCALCTRL);
- 
--	dw_hdmi_phy_enable_powerdown(hdmi, false);
--
--	/* toggle TMDS enable */
--	dw_hdmi_phy_enable_tmds(hdmi, 0);
--	dw_hdmi_phy_enable_tmds(hdmi, 1);
--
--	/* gen2 tx power on */
--	dw_hdmi_phy_gen2_txpwron(hdmi, 1);
--	dw_hdmi_phy_gen2_pddq(hdmi, 0);
--
--	/* Wait for PHY PLL lock */
--	msec = 5;
--	do {
--		val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
--		if (!val)
--			break;
--
--		if (msec == 0) {
--			dev_err(hdmi->dev, "PHY PLL not locked\n");
--			return -ETIMEDOUT;
--		}
--
--		udelay(1000);
--		msec--;
--	} while (1);
--
--	return 0;
-+	return dw_hdmi_phy_power_on(hdmi);
- }
- 
- static int dw_hdmi_phy_init(struct dw_hdmi *hdmi)
diff --git a/patches.renesas/0229-serial-sh-sci-consider-DR-data-ready-bit-adequately.patch b/patches.renesas/0229-serial-sh-sci-consider-DR-data-ready-bit-adequately.patch
deleted file mode 100644
index 5a44a7182af74e..00000000000000
--- a/patches.renesas/0229-serial-sh-sci-consider-DR-data-ready-bit-adequately.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 3be3a15c397dad6bbe7de365f533af405306690b Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Thu, 2 Feb 2017 18:10:15 +0100
-Subject: [PATCH 229/255] serial: sh-sci: consider DR (data ready) bit
- adequately
-
-To allow operation with a higher RX FIFO interrupt threshold in PIO
-mode, it is necessary to consider the DR bit ("FIFO not full, but no
-data received for 1.5 frames") as an indicator that data can be read.
-Otherwise the driver will let data rot in the FIFO until the threshold
-is reached.
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 88641c79c501735efe3b638ccad57ec077ed47f7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.h |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/tty/serial/sh-sci.h
-+++ b/drivers/tty/serial/sh-sci.h
-@@ -151,7 +151,7 @@ enum {
- #define SCCKS_XIN	BIT(14)	/* SC_CLK uses bus clock (1) or SCIF_CLK (0) */
- 
- #define SCxSR_TEND(port)	(((port)->type == PORT_SCI) ? SCI_TEND   : SCIF_TEND)
--#define SCxSR_RDxF(port)	(((port)->type == PORT_SCI) ? SCI_RDRF   : SCIF_RDF)
-+#define SCxSR_RDxF(port)	(((port)->type == PORT_SCI) ? SCI_RDRF   : SCIF_DR | SCIF_RDF)
- #define SCxSR_TDxE(port)	(((port)->type == PORT_SCI) ? SCI_TDRE   : SCIF_TDFE)
- #define SCxSR_FER(port)		(((port)->type == PORT_SCI) ? SCI_FER    : SCIF_FER)
- #define SCxSR_PER(port)		(((port)->type == PORT_SCI) ? SCI_PER    : SCIF_PER)
diff --git a/patches.renesas/0230-ARM-dts-emev2-Remove-skeleton.dtsi-inclusion.patch b/patches.renesas/0230-ARM-dts-emev2-Remove-skeleton.dtsi-inclusion.patch
deleted file mode 100644
index e3cfd9424234d2..00000000000000
--- a/patches.renesas/0230-ARM-dts-emev2-Remove-skeleton.dtsi-inclusion.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 92c177401e8889262e538e1637df62953c5a90b5 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 21 Oct 2016 11:16:06 +0200
-Subject: [PATCH 230/299] ARM: dts: emev2: Remove skeleton.dtsi inclusion
-
-As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
-as deprecated"), including skeleton.dtsi is deprecated.
-
-This fixes the following warning with W=1:
-
-    Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Mark Rutland <mark.rutland@arm.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 51b884d0e1d881d7b2f4f79d806375cd2b03c50d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/emev2.dtsi |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/emev2.dtsi
-+++ b/arch/arm/boot/dts/emev2.dtsi
-@@ -8,13 +8,14 @@
-  * kind, whether express or implied.
-  */
- 
--#include "skeleton.dtsi"
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/interrupt-controller/irq.h>
- 
- / {
- 	compatible = "renesas,emev2";
- 	interrupt-parent = <&gic>;
-+	#address-cells = <1>;
-+	#size-cells = <1>;
- 
- 	aliases {
- 		gpio0 = &gpio0;
diff --git a/patches.renesas/0230-drm-bridge-dw-hdmi-Create-PHY-operations.patch b/patches.renesas/0230-drm-bridge-dw-hdmi-Create-PHY-operations.patch
deleted file mode 100644
index b9571c711a302b..00000000000000
--- a/patches.renesas/0230-drm-bridge-dw-hdmi-Create-PHY-operations.patch
+++ /dev/null
@@ -1,263 +0,0 @@
-From 7a486124f02c28397f4c399151d91135e3943774 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 6 Mar 2017 01:36:15 +0200
-Subject: [PATCH 230/286] drm: bridge: dw-hdmi: Create PHY operations
-
-The HDMI TX controller support different PHYs whose programming
-interface can vary significantly, especially with vendor PHYs that are
-not provided by Synopsys. To support them, create a PHY operation
-structure that can be provided by the platform glue layer. The existing
-PHY handling code (limited to Synopsys PHY support) is refactored into a
-set of default PHY operations that are used automatically when the
-platform glue doesn't provide its own operations.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Neil Armstrong <narmstrong@baylibre.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170305233615.11993-1-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit f1585f6e29f5aba34e2cd6e3db9f0dd33b046809)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |   95 +++++++++++++++++++++++++++------------
- include/drm/bridge/dw_hdmi.h     |   18 ++++++-
- 2 files changed, 82 insertions(+), 31 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -141,8 +141,12 @@ struct dw_hdmi {
- 	u8 edid[HDMI_EDID_LEN];
- 	bool cable_plugin;
- 
--	const struct dw_hdmi_phy_data *phy;
--	bool phy_enabled;
-+	struct {
-+		const struct dw_hdmi_phy_ops *ops;
-+		const char *name;
-+		void *data;
-+		bool enabled;
-+	} phy;
- 
- 	struct drm_display_mode previous_mode;
- 
-@@ -831,6 +835,10 @@ static void hdmi_video_packetize(struct
- 		  HDMI_VP_CONF);
- }
- 
-+/* -----------------------------------------------------------------------------
-+ * Synopsys PHY Handling
-+ */
-+
- static inline void hdmi_phy_test_clear(struct dw_hdmi *hdmi,
- 				       unsigned char bit)
- {
-@@ -917,7 +925,7 @@ static void dw_hdmi_phy_sel_interface_co
- 
- static void dw_hdmi_phy_power_off(struct dw_hdmi *hdmi)
- {
--	const struct dw_hdmi_phy_data *phy = hdmi->phy;
-+	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
- 	unsigned int i;
- 	u16 val;
- 
-@@ -951,7 +959,7 @@ static void dw_hdmi_phy_power_off(struct
- 
- static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi)
- {
--	const struct dw_hdmi_phy_data *phy = hdmi->phy;
-+	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
- 	unsigned int i;
- 	u8 val;
- 
-@@ -987,6 +995,7 @@ static int dw_hdmi_phy_power_on(struct d
- 
- static int hdmi_phy_configure(struct dw_hdmi *hdmi)
- {
-+	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
- 	const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
- 	const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
- 	const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
-@@ -1019,7 +1028,7 @@ static int hdmi_phy_configure(struct dw_
- 	dw_hdmi_phy_power_off(hdmi);
- 
- 	/* Leave low power consumption mode by asserting SVSRET. */
--	if (hdmi->phy->has_svsret)
-+	if (phy->has_svsret)
- 		dw_hdmi_phy_enable_svsret(hdmi, 1);
- 
- 	/* PHY reset. The reset signal is active high on Gen2 PHYs. */
-@@ -1057,7 +1066,8 @@ static int hdmi_phy_configure(struct dw_
- 	return dw_hdmi_phy_power_on(hdmi);
- }
- 
--static int dw_hdmi_phy_init(struct dw_hdmi *hdmi)
-+static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
-+			    struct drm_display_mode *mode)
- {
- 	int i, ret;
- 
-@@ -1071,10 +1081,31 @@ static int dw_hdmi_phy_init(struct dw_hd
- 			return ret;
- 	}
- 
--	hdmi->phy_enabled = true;
- 	return 0;
- }
- 
-+static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi, void *data)
-+{
-+	dw_hdmi_phy_power_off(hdmi);
-+}
-+
-+static enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi,
-+						      void *data)
-+{
-+	return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ?
-+		connector_status_connected : connector_status_disconnected;
-+}
-+
-+static const struct dw_hdmi_phy_ops dw_hdmi_synopsys_phy_ops = {
-+	.init = dw_hdmi_phy_init,
-+	.disable = dw_hdmi_phy_disable,
-+	.read_hpd = dw_hdmi_phy_read_hpd,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * HDMI TX Setup
-+ */
-+
- static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi)
- {
- 	u8 de;
-@@ -1289,16 +1320,6 @@ static void hdmi_av_composer(struct dw_h
- 	hdmi_writeb(hdmi, vsync_len, HDMI_FC_VSYNCINWIDTH);
- }
- 
--static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi)
--{
--	if (!hdmi->phy_enabled)
--		return;
--
--	dw_hdmi_phy_power_off(hdmi);
--
--	hdmi->phy_enabled = false;
--}
--
- /* HDMI Initialization Step B.4 */
- static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi)
- {
-@@ -1431,9 +1452,10 @@ static int dw_hdmi_setup(struct dw_hdmi
- 	hdmi_av_composer(hdmi, mode);
- 
- 	/* HDMI Initializateion Step B.2 */
--	ret = dw_hdmi_phy_init(hdmi);
-+	ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data, &hdmi->previous_mode);
- 	if (ret)
- 		return ret;
-+	hdmi->phy.enabled = true;
- 
- 	/* HDMI Initialization Step B.3 */
- 	dw_hdmi_enable_video_path(hdmi);
-@@ -1548,7 +1570,11 @@ static void dw_hdmi_poweron(struct dw_hd
- 
- static void dw_hdmi_poweroff(struct dw_hdmi *hdmi)
- {
--	dw_hdmi_phy_disable(hdmi);
-+	if (hdmi->phy.enabled) {
-+		hdmi->phy.ops->disable(hdmi, hdmi->phy.data);
-+		hdmi->phy.enabled = false;
-+	}
-+
- 	hdmi->bridge_is_on = false;
- }
- 
-@@ -1611,8 +1637,7 @@ dw_hdmi_connector_detect(struct drm_conn
- 	dw_hdmi_update_phy_mask(hdmi);
- 	mutex_unlock(&hdmi->mutex);
- 
--	return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ?
--		connector_status_connected : connector_status_disconnected;
-+	return hdmi->phy.ops->read_hpd(hdmi, hdmi->phy.data);
- }
- 
- static int dw_hdmi_connector_get_modes(struct drm_connector *connector)
-@@ -1898,19 +1923,31 @@ static int dw_hdmi_detect_phy(struct dw_
- 
- 	phy_type = hdmi_readb(hdmi, HDMI_CONFIG2_ID);
- 
-+	if (phy_type == DW_HDMI_PHY_VENDOR_PHY) {
-+		/* Vendor PHYs require support from the glue layer. */
-+		if (!hdmi->plat_data->phy_ops || !hdmi->plat_data->phy_name) {
-+			dev_err(hdmi->dev,
-+				"Vendor HDMI PHY not supported by glue layer\n");
-+			return -ENODEV;
-+		}
-+
-+		hdmi->phy.ops = hdmi->plat_data->phy_ops;
-+		hdmi->phy.data = hdmi->plat_data->phy_data;
-+		hdmi->phy.name = hdmi->plat_data->phy_name;
-+		return 0;
-+	}
-+
-+	/* Synopsys PHYs are handled internally. */
- 	for (i = 0; i < ARRAY_SIZE(dw_hdmi_phys); ++i) {
- 		if (dw_hdmi_phys[i].type == phy_type) {
--			hdmi->phy = &dw_hdmi_phys[i];
-+			hdmi->phy.ops = &dw_hdmi_synopsys_phy_ops;
-+			hdmi->phy.name = dw_hdmi_phys[i].name;
-+			hdmi->phy.data = (void *)&dw_hdmi_phys[i];
- 			return 0;
- 		}
- 	}
- 
--	if (phy_type == DW_HDMI_PHY_VENDOR_PHY)
--		dev_err(hdmi->dev, "Unsupported vendor HDMI PHY\n");
--	else
--		dev_err(hdmi->dev, "Unsupported HDMI PHY type (%02x)\n",
--			phy_type);
--
-+	dev_err(hdmi->dev, "Unsupported HDMI PHY type (%02x)\n", phy_type);
- 	return -ENODEV;
- }
- 
-@@ -2031,7 +2068,7 @@ __dw_hdmi_probe(struct platform_device *
- 	dev_info(dev, "Detected HDMI TX controller v%x.%03x %s HDCP (%s)\n",
- 		 hdmi->version >> 12, hdmi->version & 0xfff,
- 		 prod_id1 & HDMI_PRODUCT_ID1_HDCP ? "with" : "without",
--		 hdmi->phy->name);
-+		 hdmi->phy.name);
- 
- 	initialize_hdmi_ih_mutes(hdmi);
- 
---- a/include/drm/bridge/dw_hdmi.h
-+++ b/include/drm/bridge/dw_hdmi.h
-@@ -57,13 +57,27 @@ struct dw_hdmi_phy_config {
- 	u16 vlev_ctr;   /* voltage level control */
- };
- 
-+struct dw_hdmi_phy_ops {
-+	int (*init)(struct dw_hdmi *hdmi, void *data,
-+		    struct drm_display_mode *mode);
-+	void (*disable)(struct dw_hdmi *hdmi, void *data);
-+	enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi, void *data);
-+};
-+
- struct dw_hdmi_plat_data {
- 	enum dw_hdmi_devtype dev_type;
-+	enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
-+					   struct drm_display_mode *mode);
-+
-+	/* Vendor PHY support */
-+	const struct dw_hdmi_phy_ops *phy_ops;
-+	const char *phy_name;
-+	void *phy_data;
-+
-+	/* Synopsys PHY support */
- 	const struct dw_hdmi_mpll_config *mpll_cfg;
- 	const struct dw_hdmi_curr_ctrl *cur_ctr;
- 	const struct dw_hdmi_phy_config *phy_config;
--	enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
--					   struct drm_display_mode *mode);
- };
- 
- int dw_hdmi_probe(struct platform_device *pdev,
diff --git a/patches.renesas/0230-serial-sh-sci-implement-FIFO-threshold-register-sett.patch b/patches.renesas/0230-serial-sh-sci-implement-FIFO-threshold-register-sett.patch
deleted file mode 100644
index 27f66bebc2a351..00000000000000
--- a/patches.renesas/0230-serial-sh-sci-implement-FIFO-threshold-register-sett.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From afc2193b96640358512cc4cafbda052da42bd4db Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Thu, 2 Feb 2017 18:10:16 +0100
-Subject: [PATCH 230/255] serial: sh-sci: implement FIFO threshold register
- setting
-
-Sets the closest match for a desired RX trigger level.
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit a380ed461f66d1b843cf13380a43a5fe790b8430)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |   59 ++++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 59 insertions(+)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -976,6 +976,65 @@ static int sci_handle_breaks(struct uart
- 	return copied;
- }
- 
-+static int scif_set_rtrg(struct uart_port *port, int rx_trig)
-+{
-+	unsigned int bits;
-+
-+	if (rx_trig < 1)
-+		rx_trig = 1;
-+	if (rx_trig >= port->fifosize)
-+		rx_trig = port->fifosize;
-+
-+	/* HSCIF can be set to an arbitrary level. */
-+	if (sci_getreg(port, HSRTRGR)->size) {
-+		serial_port_out(port, HSRTRGR, rx_trig);
-+		return rx_trig;
-+	}
-+
-+	switch (port->type) {
-+	case PORT_SCIF:
-+		if (rx_trig < 4) {
-+			bits = 0;
-+			rx_trig = 1;
-+		} else if (rx_trig < 8) {
-+			bits = SCFCR_RTRG0;
-+			rx_trig = 4;
-+		} else if (rx_trig < 14) {
-+			bits = SCFCR_RTRG1;
-+			rx_trig = 8;
-+		} else {
-+			bits = SCFCR_RTRG0 | SCFCR_RTRG1;
-+			rx_trig = 14;
-+		}
-+		break;
-+	case PORT_SCIFA:
-+	case PORT_SCIFB:
-+		if (rx_trig < 16) {
-+			bits = 0;
-+			rx_trig = 1;
-+		} else if (rx_trig < 32) {
-+			bits = SCFCR_RTRG0;
-+			rx_trig = 16;
-+		} else if (rx_trig < 48) {
-+			bits = SCFCR_RTRG1;
-+			rx_trig = 32;
-+		} else {
-+			bits = SCFCR_RTRG0 | SCFCR_RTRG1;
-+			rx_trig = 48;
-+		}
-+		break;
-+	default:
-+		WARN(1, "unknown FIFO configuration");
-+		return 1;
-+	}
-+
-+	serial_port_out(port, SCFCR,
-+		(serial_port_in(port, SCFCR) &
-+		~(SCFCR_RTRG1 | SCFCR_RTRG0)) | bits);
-+
-+	return rx_trig;
-+}
-+
- #ifdef CONFIG_SERIAL_SH_SCI_DMA
- static void sci_dma_tx_complete(void *arg)
- {
diff --git a/patches.renesas/0231-ARM-dts-r8a7778-Remove-skeleton.dtsi-inclusion.patch b/patches.renesas/0231-ARM-dts-r8a7778-Remove-skeleton.dtsi-inclusion.patch
deleted file mode 100644
index 6f94433fa30511..00000000000000
--- a/patches.renesas/0231-ARM-dts-r8a7778-Remove-skeleton.dtsi-inclusion.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 1b8e1d8a56635f0e17a7b149bba141b14b353c16 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 21 Oct 2016 11:16:07 +0200
-Subject: [PATCH 231/299] ARM: dts: r8a7778: Remove skeleton.dtsi inclusion
-
-As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
-as deprecated"), including skeleton.dtsi is deprecated.
-
-This fixes the following warning with W=1:
-
-    Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Mark Rutland <mark.rutland@arm.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3bc313022dbdc96457add1d2c29d81280d6a2b60)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -14,8 +14,6 @@
-  * kind, whether express or implied.
-  */
- 
--/include/ "skeleton.dtsi"
--
- #include <dt-bindings/clock/r8a7778-clock.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/interrupt-controller/irq.h>
-@@ -23,6 +21,8 @@
- / {
- 	compatible = "renesas,r8a7778";
- 	interrupt-parent = <&gic>;
-+	#address-cells = <1>;
-+	#size-cells = <1>;
- 
- 	cpus {
- 		#address-cells = <1>;
diff --git a/patches.renesas/0231-drm-bridge-dw-hdmi-Add-support-for-custom-PHY-config.patch b/patches.renesas/0231-drm-bridge-dw-hdmi-Add-support-for-custom-PHY-config.patch
deleted file mode 100644
index 6cbfc5fbb75bf7..00000000000000
--- a/patches.renesas/0231-drm-bridge-dw-hdmi-Add-support-for-custom-PHY-config.patch
+++ /dev/null
@@ -1,246 +0,0 @@
-From 9123e67e17add93491c7cda1b235dbce1eddf423 Mon Sep 17 00:00:00 2001
-From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-Date: Fri, 3 Mar 2017 19:20:04 +0200
-Subject: [PATCH 231/286] drm: bridge: dw-hdmi: Add support for custom PHY
- configuration
-
-The DWC HDMI TX controller interfaces with a companion PHY. While
-Synopsys provides multiple standard PHYs, SoC vendors can also integrate
-a custom PHY.
-
-Modularize PHY configuration to support vendor PHYs through platform
-data. The existing PHY configuration code was originally written to
-support the DWC HDMI 3D TX PHY, and seems to be compatible with the DWC
-MLP PHY. The HDMI 2.0 PHY will require a separate configuration
-function.
-
-Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Neil Armstrong <narmstrong@baylibre.com>
-Reviewed-by: Jose Abreu <Jose.Abreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170303172007.26541-8-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 2ef9dfedefd60a12d2b02b1ee0a42be3506c43f2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |  109 ++++++++++++++++++++++++++-------------
- include/drm/bridge/dw_hdmi.h     |    7 ++
- 2 files changed, 81 insertions(+), 35 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -118,6 +118,9 @@ struct dw_hdmi_phy_data {
- 	const char *name;
- 	unsigned int gen;
- 	bool has_svsret;
-+	int (*configure)(struct dw_hdmi *hdmi,
-+			 const struct dw_hdmi_plat_data *pdata,
-+			 unsigned long mpixelclock);
- };
- 
- struct dw_hdmi {
-@@ -860,8 +863,8 @@ static bool hdmi_phy_wait_i2c_done(struc
- 	return true;
- }
- 
--static void hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
--				 unsigned char addr)
-+void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
-+			   unsigned char addr)
- {
- 	hdmi_writeb(hdmi, 0xFF, HDMI_IH_I2CMPHY_STAT0);
- 	hdmi_writeb(hdmi, addr, HDMI_PHY_I2CM_ADDRESS_ADDR);
-@@ -873,6 +876,7 @@ static void hdmi_phy_i2c_write(struct dw
- 		    HDMI_PHY_I2CM_OPERATION_ADDR);
- 	hdmi_phy_wait_i2c_done(hdmi, 1000);
- }
-+EXPORT_SYMBOL_GPL(dw_hdmi_phy_i2c_write);
- 
- static void dw_hdmi_phy_enable_powerdown(struct dw_hdmi *hdmi, bool enable)
- {
-@@ -993,37 +997,67 @@ static int dw_hdmi_phy_power_on(struct d
- 	return 0;
- }
- 
--static int hdmi_phy_configure(struct dw_hdmi *hdmi)
-+/*
-+ * PHY configuration function for the DWC HDMI 3D TX PHY. Based on the available
-+ * information the DWC MHL PHY has the same register layout and is thus also
-+ * supported by this function.
-+ */
-+static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
-+		const struct dw_hdmi_plat_data *pdata,
-+		unsigned long mpixelclock)
- {
--	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
--	const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
- 	const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
- 	const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
- 	const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
- 
- 	/* PLL/MPLL Cfg - always match on final entry */
- 	for (; mpll_config->mpixelclock != ~0UL; mpll_config++)
--		if (hdmi->hdmi_data.video_mode.mpixelclock <=
--		    mpll_config->mpixelclock)
-+		if (mpixelclock <= mpll_config->mpixelclock)
- 			break;
- 
- 	for (; curr_ctrl->mpixelclock != ~0UL; curr_ctrl++)
--		if (hdmi->hdmi_data.video_mode.mpixelclock <=
--		    curr_ctrl->mpixelclock)
-+		if (mpixelclock <= curr_ctrl->mpixelclock)
- 			break;
- 
- 	for (; phy_config->mpixelclock != ~0UL; phy_config++)
--		if (hdmi->hdmi_data.video_mode.mpixelclock <=
--		    phy_config->mpixelclock)
-+		if (mpixelclock <= phy_config->mpixelclock)
- 			break;
- 
- 	if (mpll_config->mpixelclock == ~0UL ||
- 	    curr_ctrl->mpixelclock == ~0UL ||
--	    phy_config->mpixelclock == ~0UL) {
--		dev_err(hdmi->dev, "Pixel clock %d - unsupported by HDMI\n",
--			hdmi->hdmi_data.video_mode.mpixelclock);
-+	    phy_config->mpixelclock == ~0UL)
- 		return -EINVAL;
--	}
-+
-+	dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce,
-+			      HDMI_3D_TX_PHY_CPCE_CTRL);
-+	dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].gmp,
-+			      HDMI_3D_TX_PHY_GMPCTRL);
-+	dw_hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[0],
-+			      HDMI_3D_TX_PHY_CURRCTRL);
-+
-+	dw_hdmi_phy_i2c_write(hdmi, 0, HDMI_3D_TX_PHY_PLLPHBYCTRL);
-+	dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK,
-+			      HDMI_3D_TX_PHY_MSM_CTRL);
-+
-+	dw_hdmi_phy_i2c_write(hdmi, phy_config->term, HDMI_3D_TX_PHY_TXTERM);
-+	dw_hdmi_phy_i2c_write(hdmi, phy_config->sym_ctr,
-+			      HDMI_3D_TX_PHY_CKSYMTXCTRL);
-+	dw_hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr,
-+			      HDMI_3D_TX_PHY_VLEVCTRL);
-+
-+	/* Override and disable clock termination. */
-+	dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE,
-+			      HDMI_3D_TX_PHY_CKCALCTRL);
-+
-+	return 0;
-+}
-+
-+static int hdmi_phy_configure(struct dw_hdmi *hdmi)
-+{
-+	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
-+	const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
-+	unsigned long mpixelclock = hdmi->hdmi_data.video_mode.mpixelclock;
-+	int ret;
- 
- 	dw_hdmi_phy_power_off(hdmi);
- 
-@@ -1042,26 +1076,16 @@ static int hdmi_phy_configure(struct dw_
- 		    HDMI_PHY_I2CM_SLAVE_ADDR);
- 	hdmi_phy_test_clear(hdmi, 0);
- 
--	hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce,
--			   HDMI_3D_TX_PHY_CPCE_CTRL);
--	hdmi_phy_i2c_write(hdmi, mpll_config->res[0].gmp,
--			   HDMI_3D_TX_PHY_GMPCTRL);
--	hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[0],
--			   HDMI_3D_TX_PHY_CURRCTRL);
--
--	hdmi_phy_i2c_write(hdmi, 0, HDMI_3D_TX_PHY_PLLPHBYCTRL);
--	hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK,
--			   HDMI_3D_TX_PHY_MSM_CTRL);
--
--	hdmi_phy_i2c_write(hdmi, phy_config->term, HDMI_3D_TX_PHY_TXTERM);
--	hdmi_phy_i2c_write(hdmi, phy_config->sym_ctr,
--			   HDMI_3D_TX_PHY_CKSYMTXCTRL);
--	hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr,
--			   HDMI_3D_TX_PHY_VLEVCTRL);
--
--	/* Override and disable clock termination. */
--	hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE,
--			   HDMI_3D_TX_PHY_CKCALCTRL);
-+	/* Write to the PHY as configured by the platform */
-+	if (pdata->configure_phy)
-+		ret = pdata->configure_phy(hdmi, pdata, mpixelclock);
-+	else
-+		ret = phy->configure(hdmi, pdata, mpixelclock);
-+	if (ret) {
-+		dev_err(hdmi->dev, "PHY configuration failed (clock %lu)\n",
-+			mpixelclock);
-+		return ret;
-+	}
- 
- 	return dw_hdmi_phy_power_on(hdmi);
- }
-@@ -1895,24 +1919,31 @@ static const struct dw_hdmi_phy_data dw_
- 		.name = "DWC MHL PHY + HEAC PHY",
- 		.gen = 2,
- 		.has_svsret = true,
-+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
- 	}, {
- 		.type = DW_HDMI_PHY_DWC_MHL_PHY,
- 		.name = "DWC MHL PHY",
- 		.gen = 2,
- 		.has_svsret = true,
-+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
- 	}, {
- 		.type = DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY_HEAC,
- 		.name = "DWC HDMI 3D TX PHY + HEAC PHY",
- 		.gen = 2,
-+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
- 	}, {
- 		.type = DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY,
- 		.name = "DWC HDMI 3D TX PHY",
- 		.gen = 2,
-+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
- 	}, {
- 		.type = DW_HDMI_PHY_DWC_HDMI20_TX_PHY,
- 		.name = "DWC HDMI 2.0 TX PHY",
- 		.gen = 2,
- 		.has_svsret = true,
-+	}, {
-+		.type = DW_HDMI_PHY_VENDOR_PHY,
-+		.name = "Vendor PHY",
- 	}
- };
- 
-@@ -1943,6 +1974,14 @@ static int dw_hdmi_detect_phy(struct dw_
- 			hdmi->phy.ops = &dw_hdmi_synopsys_phy_ops;
- 			hdmi->phy.name = dw_hdmi_phys[i].name;
- 			hdmi->phy.data = (void *)&dw_hdmi_phys[i];
-+
-+			if (!dw_hdmi_phys[i].configure &&
-+			    !hdmi->plat_data->configure_phy) {
-+				dev_err(hdmi->dev, "%s requires platform support\n",
-+					hdmi->phy.name);
-+				return -ENODEV;
-+			}
-+
- 			return 0;
- 		}
- 	}
---- a/include/drm/bridge/dw_hdmi.h
-+++ b/include/drm/bridge/dw_hdmi.h
-@@ -78,6 +78,9 @@ struct dw_hdmi_plat_data {
- 	const struct dw_hdmi_mpll_config *mpll_cfg;
- 	const struct dw_hdmi_curr_ctrl *cur_ctr;
- 	const struct dw_hdmi_phy_config *phy_config;
-+	int (*configure_phy)(struct dw_hdmi *hdmi,
-+			     const struct dw_hdmi_plat_data *pdata,
-+			     unsigned long mpixelclock);
- };
- 
- int dw_hdmi_probe(struct platform_device *pdev,
-@@ -91,4 +94,8 @@ void dw_hdmi_set_sample_rate(struct dw_h
- void dw_hdmi_audio_enable(struct dw_hdmi *hdmi);
- void dw_hdmi_audio_disable(struct dw_hdmi *hdmi);
- 
-+/* PHY configuration */
-+void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
-+			   unsigned char addr);
-+
- #endif /* __IMX_HDMI_H__ */
diff --git a/patches.renesas/0231-serial-sh-sci-increase-RX-FIFO-trigger-defaults-for-.patch b/patches.renesas/0231-serial-sh-sci-increase-RX-FIFO-trigger-defaults-for-.patch
deleted file mode 100644
index 9f2e27e35b5966..00000000000000
--- a/patches.renesas/0231-serial-sh-sci-increase-RX-FIFO-trigger-defaults-for-.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From 391e4ad5fa7900897f6e7514d0507662f49159a3 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Fri, 3 Feb 2017 11:38:17 +0100
-Subject: [PATCH 231/255] serial: sh-sci: increase RX FIFO trigger defaults for
- (H)SCIF
-
-Sets reasonable trigger defaults for the various SCIF variants.
-Also corrects the FIFO size for SH7705-style ports.
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 18e8cf159177100e69d528293f8cf6875c0b1bca)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |   29 ++++++++++++++++++++++++++++-
- 1 file changed, 28 insertions(+), 1 deletion(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -148,6 +148,7 @@ struct sci_port {
- 	struct timer_list		rx_timer;
- 	unsigned int			rx_timeout;
- #endif
-+	int				rx_trigger;
- 
- 	bool has_rtscts;
- 	bool autorts;
-@@ -450,7 +451,7 @@ static const struct sci_port_params sci_
- 			[SCFCR]		= { 0x18, 16 },
- 			[SCFDR]		= { 0x1c, 16 },
- 		},
--		.fifosize = 16,
-+		.fifosize = 64,
- 		.overrun_reg = SCxSR,
- 		.overrun_mask = SCIFA_ORER,
- 		.sampling_rate_mask = SCI_SR(16),
-@@ -2077,6 +2078,7 @@ static void sci_reset(struct uart_port *
- {
- 	const struct plat_sci_reg *reg;
- 	unsigned int status;
-+	struct sci_port *s = to_sci_port(port);
- 
- 	do {
- 		status = serial_port_in(port, SCxSR);
-@@ -2096,6 +2098,9 @@ static void sci_reset(struct uart_port *
- 		status &= ~(SCLSR_TO | SCLSR_ORER);
- 		serial_port_out(port, SCLSR, status);
- 	}
-+
-+	if (s->rx_trigger > 1)
-+		scif_set_rtrg(port, s->rx_trigger);
- }
- 
- static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
-@@ -2635,6 +2640,28 @@ static int sci_init_single(struct platfo
- 	if (unlikely(sci_port->params == NULL))
- 		return -EINVAL;
- 
-+	switch (p->type) {
-+	case PORT_SCIFB:
-+		sci_port->rx_trigger = 48;
-+		break;
-+	case PORT_HSCIF:
-+		sci_port->rx_trigger = 64;
-+		break;
-+	case PORT_SCIFA:
-+		sci_port->rx_trigger = 32;
-+		break;
-+	case PORT_SCIF:
-+		if (p->regtype == SCIx_SH7705_SCIF_REGTYPE)
-+			/* RX triggering not implemented for this IP */
-+			sci_port->rx_trigger = 1;
-+		else
-+			sci_port->rx_trigger = 8;
-+		break;
-+	default:
-+		sci_port->rx_trigger = 1;
-+		break;
-+	}
-+
- 	/* SCIFA on sh7723 and sh7724 need a custom sampling rate that doesn't
- 	 * match the SoC datasheet, this should be investigated. Let platform
- 	 * data override the sampling rate for now.
diff --git a/patches.renesas/0232-ARM-dts-r8a7779-Remove-skeleton.dtsi-inclusion.patch b/patches.renesas/0232-ARM-dts-r8a7779-Remove-skeleton.dtsi-inclusion.patch
deleted file mode 100644
index 1df9e567ffb545..00000000000000
--- a/patches.renesas/0232-ARM-dts-r8a7779-Remove-skeleton.dtsi-inclusion.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From dc94c2d248c988aa63c881b00be4e6bea8124b4e Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 21 Oct 2016 11:16:08 +0200
-Subject: [PATCH 232/299] ARM: dts: r8a7779: Remove skeleton.dtsi inclusion
-
-As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
-as deprecated"), including skeleton.dtsi is deprecated.
-
-This fixes the following warning with W=1:
-
-    Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Mark Rutland <mark.rutland@arm.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1cfc0c03602b8e876672ba895377f0ba1445a2d8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779.dtsi |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -9,8 +9,6 @@
-  * kind, whether express or implied.
-  */
- 
--/include/ "skeleton.dtsi"
--
- #include <dt-bindings/clock/r8a7779-clock.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/interrupt-controller/irq.h>
-@@ -19,6 +17,8 @@
- / {
- 	compatible = "renesas,r8a7779";
- 	interrupt-parent = <&gic>;
-+	#address-cells = <1>;
-+	#size-cells = <1>;
- 
- 	cpus {
- 		#address-cells = <1>;
diff --git a/patches.renesas/0232-drm-bridge-dw-hdmi-Remove-device-type-from-platform-.patch b/patches.renesas/0232-drm-bridge-dw-hdmi-Remove-device-type-from-platform-.patch
deleted file mode 100644
index 0fc5fb8688a4b4..00000000000000
--- a/patches.renesas/0232-drm-bridge-dw-hdmi-Remove-device-type-from-platform-.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From d72254b17723fad00a4eaa3eca0f1e9c38e64096 Mon Sep 17 00:00:00 2001
-From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-Date: Fri, 3 Mar 2017 19:20:05 +0200
-Subject: [PATCH 232/286] drm: bridge: dw-hdmi: Remove device type from
- platform data
-
-The device type isn't used anymore now that workarounds and PHY-specific
-operations are performed based on version information read at runtime.
-Remove it.
-
-Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Neil Armstrong <narmstrong@baylibre.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170303172007.26541-9-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 2e6777e8d5dd883b983c8de8797ff92bcb158f7c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c            |    2 --
- drivers/gpu/drm/imx/dw_hdmi-imx.c           |    2 --
- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c |    1 -
- include/drm/bridge/dw_hdmi.h                |    7 -------
- 4 files changed, 12 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -127,7 +127,6 @@ struct dw_hdmi {
- 	struct drm_connector connector;
- 	struct drm_bridge bridge;
- 
--	enum dw_hdmi_devtype dev_type;
- 	unsigned int version;
- 
- 	struct platform_device *audio;
-@@ -2014,7 +2013,6 @@ __dw_hdmi_probe(struct platform_device *
- 
- 	hdmi->plat_data = plat_data;
- 	hdmi->dev = dev;
--	hdmi->dev_type = plat_data->dev_type;
- 	hdmi->sample_rate = 48000;
- 	hdmi->disabled = true;
- 	hdmi->rxsense = true;
---- a/drivers/gpu/drm/imx/dw_hdmi-imx.c
-+++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c
-@@ -175,7 +175,6 @@ static struct dw_hdmi_plat_data imx6q_hd
- 	.mpll_cfg   = imx_mpll_cfg,
- 	.cur_ctr    = imx_cur_ctr,
- 	.phy_config = imx_phy_config,
--	.dev_type   = IMX6Q_HDMI,
- 	.mode_valid = imx6q_hdmi_mode_valid,
- };
- 
-@@ -183,7 +182,6 @@ static struct dw_hdmi_plat_data imx6dl_h
- 	.mpll_cfg = imx_mpll_cfg,
- 	.cur_ctr  = imx_cur_ctr,
- 	.phy_config = imx_phy_config,
--	.dev_type = IMX6DL_HDMI,
- 	.mode_valid = imx6dl_hdmi_mode_valid,
- };
- 
---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-@@ -237,7 +237,6 @@ static const struct dw_hdmi_plat_data ro
- 	.mpll_cfg   = rockchip_mpll_cfg,
- 	.cur_ctr    = rockchip_cur_ctr,
- 	.phy_config = rockchip_phy_config,
--	.dev_type   = RK3288_HDMI,
- };
- 
- static const struct of_device_id dw_hdmi_rockchip_dt_ids[] = {
---- a/include/drm/bridge/dw_hdmi.h
-+++ b/include/drm/bridge/dw_hdmi.h
-@@ -21,12 +21,6 @@ enum {
- 	DW_HDMI_RES_MAX,
- };
- 
--enum dw_hdmi_devtype {
--	IMX6Q_HDMI,
--	IMX6DL_HDMI,
--	RK3288_HDMI,
--};
--
- enum dw_hdmi_phy_type {
- 	DW_HDMI_PHY_DWC_HDMI_TX_PHY = 0x00,
- 	DW_HDMI_PHY_DWC_MHL_PHY_HEAC = 0xb2,
-@@ -65,7 +59,6 @@ struct dw_hdmi_phy_ops {
- };
- 
- struct dw_hdmi_plat_data {
--	enum dw_hdmi_devtype dev_type;
- 	enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
- 					   struct drm_display_mode *mode);
- 
diff --git a/patches.renesas/0232-serial-sh-sci-SCIFA-B-RX-FIFO-software-timeout.patch b/patches.renesas/0232-serial-sh-sci-SCIFA-B-RX-FIFO-software-timeout.patch
deleted file mode 100644
index 2c630167da3fb6..00000000000000
--- a/patches.renesas/0232-serial-sh-sci-SCIFA-B-RX-FIFO-software-timeout.patch
+++ /dev/null
@@ -1,190 +0,0 @@
-From cb0a3e47445a270db1fb100657582efce7674bfd Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Fri, 3 Feb 2017 11:38:18 +0100
-Subject: [PATCH 232/255] serial: sh-sci: SCIFA/B RX FIFO software timeout
-
-Implements support for FIFO fill thresholds greater than one with software
-timeout.
-
-This mechanism is not possible (or at least not useful) on SCIF family
-hardware other than SCIFA and SCIFB because they do not support turning off
-the DR hardware timeout interrupt separately from the RI interrupt.
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 039403765e5da3c6a4c2cc048c201bfad932033a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |  101 +++++++++++++++++++++++++++++---------------
- 1 file changed, 68 insertions(+), 33 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -148,7 +148,10 @@ struct sci_port {
- 	struct timer_list		rx_timer;
- 	unsigned int			rx_timeout;
- #endif
-+	unsigned int			rx_frame;
- 	int				rx_trigger;
-+	struct timer_list		rx_fifo_timer;
-+	int				rx_fifo_timeout;
- 
- 	bool has_rtscts;
- 	bool autorts;
-@@ -1036,6 +1039,24 @@ static int scif_set_rtrg(struct uart_por
- 	return rx_trig;
- }
- 
-+static int scif_rtrg_enabled(struct uart_port *port)
-+{
-+	if (sci_getreg(port, HSRTRGR)->size)
-+		return serial_port_in(port, HSRTRGR) != 0;
-+	else
-+		return (serial_port_in(port, SCFCR) &
-+			(SCFCR_RTRG0 | SCFCR_RTRG1)) != 0;
-+}
-+
-+static void rx_fifo_timer_fn(unsigned long arg)
-+{
-+	struct sci_port *s = (struct sci_port *)arg;
-+	struct uart_port *port = &s->port;
-+
-+	dev_dbg(port->dev, "Rx timed out\n");
-+	scif_set_rtrg(port, 1);
-+}
-+
- #ifdef CONFIG_SERIAL_SH_SCI_DMA
- static void sci_dma_tx_complete(void *arg)
- {
-@@ -1486,10 +1507,10 @@ static inline void sci_free_dma(struct u
- 
- static irqreturn_t sci_rx_interrupt(int irq, void *ptr)
- {
--#ifdef CONFIG_SERIAL_SH_SCI_DMA
- 	struct uart_port *port = ptr;
- 	struct sci_port *s = to_sci_port(port);
- 
-+#ifdef CONFIG_SERIAL_SH_SCI_DMA
- 	if (s->chan_rx) {
- 		u16 scr = serial_port_in(port, SCSCR);
- 		u16 ssr = serial_port_in(port, SCxSR);
-@@ -1514,6 +1535,14 @@ static irqreturn_t sci_rx_interrupt(int
- 	}
- #endif
- 
-+	if (s->rx_trigger > 1 && s->rx_fifo_timeout > 0) {
-+		if (!scif_rtrg_enabled(port))
-+			scif_set_rtrg(port, s->rx_trigger);
-+
-+		mod_timer(&s->rx_fifo_timer, jiffies + DIV_ROUND_UP(
-+			  s->rx_frame * s->rx_fifo_timeout, 1000));
-+	}
-+
- 	/* I think sci_receive_chars has to be called irrespective
- 	 * of whether the I_IXOFF is set, otherwise, how is the interrupt
- 	 * to be disabled?
-@@ -2099,14 +2128,21 @@ static void sci_reset(struct uart_port *
- 		serial_port_out(port, SCLSR, status);
- 	}
- 
--	if (s->rx_trigger > 1)
--		scif_set_rtrg(port, s->rx_trigger);
-+	if (s->rx_trigger > 1) {
-+		if (s->rx_fifo_timeout) {
-+			scif_set_rtrg(port, 1);
-+			setup_timer(&s->rx_fifo_timer, rx_fifo_timer_fn,
-+				    (unsigned long)s);
-+		} else {
-+			scif_set_rtrg(port, s->rx_trigger);
-+		}
-+	}
- }
- 
- static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
- 			    struct ktermios *old)
- {
--	unsigned int baud, smr_val = SCSMR_ASYNC, scr_val = 0, i;
-+	unsigned int baud, smr_val = SCSMR_ASYNC, scr_val = 0, i, bits;
- 	unsigned int brr = 255, cks = 0, srr = 15, dl = 0, sccks = 0;
- 	unsigned int brr1 = 255, cks1 = 0, srr1 = 15, dl1 = 0;
- 	struct sci_port *s = to_sci_port(port);
-@@ -2306,7 +2342,6 @@ done:
- 		sci_set_mctrl(port, port->mctrl);
- 	}
- 
--#ifdef CONFIG_SERIAL_SH_SCI_DMA
- 	/*
- 	 * Calculate delay for 2 DMA buffers (4 FIFO).
- 	 * See serial_core.c::uart_update_timeout().
-@@ -2317,36 +2352,34 @@ done:
- 	 * value obtained by this formula is too small. Therefore, if the value
- 	 * is smaller than 20ms, use 20ms as the timeout value for DMA.
- 	 */
--	if (s->chan_rx) {
--		unsigned int bits;
-+	/* byte size and parity */
-+	switch (termios->c_cflag & CSIZE) {
-+	case CS5:
-+		bits = 7;
-+		break;
-+	case CS6:
-+		bits = 8;
-+		break;
-+	case CS7:
-+		bits = 9;
-+		break;
-+	default:
-+		bits = 10;
-+		break;
-+	}
- 
--		/* byte size and parity */
--		switch (termios->c_cflag & CSIZE) {
--		case CS5:
--			bits = 7;
--			break;
--		case CS6:
--			bits = 8;
--			break;
--		case CS7:
--			bits = 9;
--			break;
--		default:
--			bits = 10;
--			break;
--		}
-+	if (termios->c_cflag & CSTOPB)
-+		bits++;
-+	if (termios->c_cflag & PARENB)
-+		bits++;
- 
--		if (termios->c_cflag & CSTOPB)
--			bits++;
--		if (termios->c_cflag & PARENB)
--			bits++;
--		s->rx_timeout = DIV_ROUND_UP((s->buf_len_rx * 2 * bits * HZ) /
--					     (baud / 10), 10);
--		dev_dbg(port->dev, "DMA Rx t-out %ums, tty t-out %u jiffies\n",
--			s->rx_timeout * 1000 / HZ, port->timeout);
--		if (s->rx_timeout < msecs_to_jiffies(20))
--			s->rx_timeout = msecs_to_jiffies(20);
--	}
-+	s->rx_frame = (100 * bits * HZ) / (baud / 10);
-+#ifdef CONFIG_SERIAL_SH_SCI_DMA
-+	s->rx_timeout = DIV_ROUND_UP(s->buf_len_rx * 2 * s->rx_frame, 1000);
-+	dev_dbg(port->dev, "DMA Rx t-out %ums, tty t-out %u jiffies\n",
-+		s->rx_timeout * 1000 / HZ, port->timeout);
-+	if (s->rx_timeout < msecs_to_jiffies(20))
-+		s->rx_timeout = msecs_to_jiffies(20);
- #endif
- 
- 	if ((termios->c_cflag & CREAD) != 0)
-@@ -2662,6 +2695,8 @@ static int sci_init_single(struct platfo
- 		break;
- 	}
- 
-+	sci_port->rx_fifo_timeout = 0;
-+
- 	/* SCIFA on sh7723 and sh7724 need a custom sampling rate that doesn't
- 	 * match the SoC datasheet, this should be investigated. Let platform
- 	 * data override the sampling rate for now.
diff --git a/patches.renesas/0233-ARM-dts-r8a7740-Remove-skeleton.dtsi-inclusion.patch b/patches.renesas/0233-ARM-dts-r8a7740-Remove-skeleton.dtsi-inclusion.patch
deleted file mode 100644
index 50591705fe07bc..00000000000000
--- a/patches.renesas/0233-ARM-dts-r8a7740-Remove-skeleton.dtsi-inclusion.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 8eb91813415a1ad95a20da346e20bab97b342883 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 21 Oct 2016 11:16:09 +0200
-Subject: [PATCH 233/299] ARM: dts: r8a7740: Remove skeleton.dtsi inclusion
-
-As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
-as deprecated"), including skeleton.dtsi is deprecated.
-
-This fixes the following warning with W=1:
-
-    Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Mark Rutland <mark.rutland@arm.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d0b54c54f1a2257017c2501a56df936c6d921585)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740.dtsi |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7740.dtsi
-+++ b/arch/arm/boot/dts/r8a7740.dtsi
-@@ -8,8 +8,6 @@
-  * kind, whether express or implied.
-  */
- 
--/include/ "skeleton.dtsi"
--
- #include <dt-bindings/clock/r8a7740-clock.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/interrupt-controller/irq.h>
-@@ -17,6 +15,8 @@
- / {
- 	compatible = "renesas,r8a7740";
- 	interrupt-parent = <&gic>;
-+	#address-cells = <1>;
-+	#size-cells = <1>;
- 
- 	cpus {
- 		#address-cells = <1>;
diff --git a/patches.renesas/0233-drm-bridge-dw-hdmi-Switch-to-regmap-for-register-acc.patch b/patches.renesas/0233-drm-bridge-dw-hdmi-Switch-to-regmap-for-register-acc.patch
deleted file mode 100644
index 6bd772c936f14e..00000000000000
--- a/patches.renesas/0233-drm-bridge-dw-hdmi-Switch-to-regmap-for-register-acc.patch
+++ /dev/null
@@ -1,222 +0,0 @@
-From 1211fb5c348a9536dfe31edf9ea7a0620a2bd0c4 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Fri, 3 Mar 2017 19:20:06 +0200
-Subject: [PATCH 233/286] drm: bridge: dw-hdmi: Switch to regmap for register
- access
-
-The Synopsys Designware HDMI TX Controller does not enforce register
-access on platforms instanciating it. The current driver supports two
-different types of memory-mapped flat register access, but in order to
-support the Amlogic Meson SoCs integration, and provide a more generic
-way to handle all sorts of register mapping, switch the register access
-to use the regmap infrastructure.
-
-In the case of registers that are not flat memory-mapped or do not
-conform to the current driver implementation, a regmap struct can be
-given in the plat_data and be used at probe or bind.
-
-Since the AHB audio driver is only available with direct memory access,
-only allow the I2S audio driver to be registered is directly
-memory-mapped.
-
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
-Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Neil Armstrong <narmstrong@baylibre.com>
-Reviewed-by: Jose Abreu <Jose.Abreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170303172007.26541-10-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 80e2f97968b537fc9c1789fce1b7f61609a5aae4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |  109 ++++++++++++++++++++-------------------
- include/drm/bridge/dw_hdmi.h     |    1 
- 2 files changed, 59 insertions(+), 51 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -19,6 +19,7 @@
- #include <linux/hdmi.h>
- #include <linux/mutex.h>
- #include <linux/of_device.h>
-+#include <linux/regmap.h>
- #include <linux/spinlock.h>
- 
- #include <drm/drm_of.h>
-@@ -171,8 +172,8 @@ struct dw_hdmi {
- 	unsigned int audio_n;
- 	bool audio_enable;
- 
--	void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
--	u8 (*read)(struct dw_hdmi *hdmi, int offset);
-+	unsigned int reg_shift;
-+	struct regmap *regm;
- };
- 
- #define HDMI_IH_PHY_STAT0_RX_SENSE \
-@@ -183,42 +184,23 @@ struct dw_hdmi {
- 	(HDMI_PHY_RX_SENSE0 | HDMI_PHY_RX_SENSE1 | \
- 	 HDMI_PHY_RX_SENSE2 | HDMI_PHY_RX_SENSE3)
- 
--static void dw_hdmi_writel(struct dw_hdmi *hdmi, u8 val, int offset)
--{
--	writel(val, hdmi->regs + (offset << 2));
--}
--
--static u8 dw_hdmi_readl(struct dw_hdmi *hdmi, int offset)
--{
--	return readl(hdmi->regs + (offset << 2));
--}
--
--static void dw_hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset)
--{
--	writeb(val, hdmi->regs + offset);
--}
--
--static u8 dw_hdmi_readb(struct dw_hdmi *hdmi, int offset)
--{
--	return readb(hdmi->regs + offset);
--}
--
- static inline void hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset)
- {
--	hdmi->write(hdmi, val, offset);
-+	regmap_write(hdmi->regm, offset << hdmi->reg_shift, val);
- }
- 
- static inline u8 hdmi_readb(struct dw_hdmi *hdmi, int offset)
- {
--	return hdmi->read(hdmi, offset);
-+	unsigned int val = 0;
-+
-+	regmap_read(hdmi->regm, offset << hdmi->reg_shift, &val);
-+
-+	return val;
- }
- 
- static void hdmi_modb(struct dw_hdmi *hdmi, u8 data, u8 mask, unsigned reg)
- {
--	u8 val = hdmi_readb(hdmi, reg) & ~mask;
--
--	val |= data & mask;
--	hdmi_writeb(hdmi, val, reg);
-+	regmap_update_bits(hdmi->regm, reg << hdmi->reg_shift, mask, data);
- }
- 
- static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg,
-@@ -1989,6 +1971,20 @@ static int dw_hdmi_detect_phy(struct dw_
- 	return -ENODEV;
- }
- 
-+static const struct regmap_config hdmi_regmap_8bit_config = {
-+	.reg_bits	= 32,
-+	.val_bits	= 8,
-+	.reg_stride	= 1,
-+	.max_register	= HDMI_I2CM_FS_SCL_LCNT_0_ADDR,
-+};
-+
-+static const struct regmap_config hdmi_regmap_32bit_config = {
-+	.reg_bits	= 32,
-+	.val_bits	= 32,
-+	.reg_stride	= 4,
-+	.max_register	= HDMI_I2CM_FS_SCL_LCNT_0_ADDR << 2,
-+};
-+
- static struct dw_hdmi *
- __dw_hdmi_probe(struct platform_device *pdev,
- 		const struct dw_hdmi_plat_data *plat_data)
-@@ -1998,7 +1994,7 @@ __dw_hdmi_probe(struct platform_device *
- 	struct platform_device_info pdevinfo;
- 	struct device_node *ddc_node;
- 	struct dw_hdmi *hdmi;
--	struct resource *iores;
-+	struct resource *iores = NULL;
- 	int irq;
- 	int ret;
- 	u32 val = 1;
-@@ -2022,22 +2018,6 @@ __dw_hdmi_probe(struct platform_device *
- 	mutex_init(&hdmi->audio_mutex);
- 	spin_lock_init(&hdmi->audio_lock);
- 
--	of_property_read_u32(np, "reg-io-width", &val);
--
--	switch (val) {
--	case 4:
--		hdmi->write = dw_hdmi_writel;
--		hdmi->read = dw_hdmi_readl;
--		break;
--	case 1:
--		hdmi->write = dw_hdmi_writeb;
--		hdmi->read = dw_hdmi_readb;
--		break;
--	default:
--		dev_err(dev, "reg-io-width must be 1 or 4\n");
--		return ERR_PTR(-EINVAL);
--	}
--
- 	ddc_node = of_parse_phandle(np, "ddc-i2c-bus", 0);
- 	if (ddc_node) {
- 		hdmi->ddc = of_get_i2c_adapter_by_node(ddc_node);
-@@ -2051,11 +2031,38 @@ __dw_hdmi_probe(struct platform_device *
- 		dev_dbg(hdmi->dev, "no ddc property found\n");
- 	}
- 
--	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	hdmi->regs = devm_ioremap_resource(dev, iores);
--	if (IS_ERR(hdmi->regs)) {
--		ret = PTR_ERR(hdmi->regs);
--		goto err_res;
-+	if (!plat_data->regm) {
-+		const struct regmap_config *reg_config;
-+
-+		of_property_read_u32(np, "reg-io-width", &val);
-+		switch (val) {
-+		case 4:
-+			reg_config = &hdmi_regmap_32bit_config;
-+			hdmi->reg_shift = 2;
-+			break;
-+		case 1:
-+			reg_config = &hdmi_regmap_8bit_config;
-+			break;
-+		default:
-+			dev_err(dev, "reg-io-width must be 1 or 4\n");
-+			return ERR_PTR(-EINVAL);
-+		}
-+
-+		iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+		hdmi->regs = devm_ioremap_resource(dev, iores);
-+		if (IS_ERR(hdmi->regs)) {
-+			ret = PTR_ERR(hdmi->regs);
-+			goto err_res;
-+		}
-+
-+		hdmi->regm = devm_regmap_init_mmio(dev, hdmi->regs, reg_config);
-+		if (IS_ERR(hdmi->regm)) {
-+			dev_err(dev, "Failed to configure regmap\n");
-+			ret = PTR_ERR(hdmi->regm);
-+			goto err_res;
-+		}
-+	} else {
-+		hdmi->regm = plat_data->regm;
- 	}
- 
- 	hdmi->isfr_clk = devm_clk_get(hdmi->dev, "isfr");
-@@ -2165,7 +2172,7 @@ __dw_hdmi_probe(struct platform_device *
- 	config0 = hdmi_readb(hdmi, HDMI_CONFIG0_ID);
- 	config3 = hdmi_readb(hdmi, HDMI_CONFIG3_ID);
- 
--	if (config3 & HDMI_CONFIG3_AHBAUDDMA) {
-+	if (iores && config3 & HDMI_CONFIG3_AHBAUDDMA) {
- 		struct dw_hdmi_audio_data audio;
- 
- 		audio.phys = iores->start;
---- a/include/drm/bridge/dw_hdmi.h
-+++ b/include/drm/bridge/dw_hdmi.h
-@@ -59,6 +59,7 @@ struct dw_hdmi_phy_ops {
- };
- 
- struct dw_hdmi_plat_data {
-+	struct regmap *regm;
- 	enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
- 					   struct drm_display_mode *mode);
- 
diff --git a/patches.renesas/0233-serial-sh-sci-make-RX-FIFO-parameters-tunable-via-sy.patch b/patches.renesas/0233-serial-sh-sci-make-RX-FIFO-parameters-tunable-via-sy.patch
deleted file mode 100644
index 5e25570167f9ae..00000000000000
--- a/patches.renesas/0233-serial-sh-sci-make-RX-FIFO-parameters-tunable-via-sy.patch
+++ /dev/null
@@ -1,128 +0,0 @@
-From a13ec4fba53f0672fe1836564bbe4208e63d4a22 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Fri, 3 Feb 2017 11:38:19 +0100
-Subject: [PATCH 233/255] serial: sh-sci: make RX FIFO parameters tunable via
- sysfs
-
-Allows tuning of the RX FIFO fill threshold and timeout. (The latter is
-only applicable to SCIFA and SCIFB).
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 5d23188a473da0b2fe6849ccf03578eebfead30e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |   87 ++++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 87 insertions(+)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -1057,6 +1057,66 @@ static void rx_fifo_timer_fn(unsigned lo
- 	scif_set_rtrg(port, 1);
- }
- 
-+static ssize_t rx_trigger_show(struct device *dev,
-+			       struct device_attribute *attr,
-+			       char *buf)
-+{
-+	struct uart_port *port = dev_get_drvdata(dev);
-+	struct sci_port *sci = to_sci_port(port);
-+
-+	return sprintf(buf, "%d\n", sci->rx_trigger);
-+}
-+
-+static ssize_t rx_trigger_store(struct device *dev,
-+				struct device_attribute *attr,
-+				const char *buf,
-+				size_t count)
-+{
-+	struct uart_port *port = dev_get_drvdata(dev);
-+	struct sci_port *sci = to_sci_port(port);
-+	long r;
-+
-+	if (kstrtol(buf, 0, &r) == -EINVAL)
-+		return -EINVAL;
-+	sci->rx_trigger = scif_set_rtrg(port, r);
-+	scif_set_rtrg(port, 1);
-+	return count;
-+}
-+
-+static DEVICE_ATTR(rx_fifo_trigger, 0644, rx_trigger_show, rx_trigger_store);
-+
-+static ssize_t rx_fifo_timeout_show(struct device *dev,
-+			       struct device_attribute *attr,
-+			       char *buf)
-+{
-+	struct uart_port *port = dev_get_drvdata(dev);
-+	struct sci_port *sci = to_sci_port(port);
-+
-+	return sprintf(buf, "%d\n", sci->rx_fifo_timeout);
-+}
-+
-+static ssize_t rx_fifo_timeout_store(struct device *dev,
-+				struct device_attribute *attr,
-+				const char *buf,
-+				size_t count)
-+{
-+	struct uart_port *port = dev_get_drvdata(dev);
-+	struct sci_port *sci = to_sci_port(port);
-+	long r;
-+
-+	if (kstrtol(buf, 0, &r) == -EINVAL)
-+		return -EINVAL;
-+	sci->rx_fifo_timeout = r;
-+	scif_set_rtrg(port, 1);
-+	if (r > 0)
-+		setup_timer(&sci->rx_fifo_timer, rx_fifo_timer_fn,
-+			    (unsigned long)sci);
-+	return count;
-+}
-+
-+static DEVICE_ATTR(rx_fifo_timeout, 0644, rx_fifo_timeout_show, rx_fifo_timeout_store);
-+
-+
- #ifdef CONFIG_SERIAL_SH_SCI_DMA
- static void sci_dma_tx_complete(void *arg)
- {
-@@ -2904,6 +2964,15 @@ static int sci_remove(struct platform_de
- 
- 	sci_cleanup_single(port);
- 
-+	if (port->port.fifosize > 1) {
-+		sysfs_remove_file(&dev->dev.kobj,
-+				  &dev_attr_rx_fifo_trigger.attr);
-+	}
-+	if (port->port.type == PORT_SCIFA || port->port.type == PORT_SCIFB) {
-+		sysfs_remove_file(&dev->dev.kobj,
-+				  &dev_attr_rx_fifo_timeout.attr);
-+	}
-+
- 	return 0;
- }
- 
-@@ -3069,6 +3138,24 @@ static int sci_probe(struct platform_dev
- 	if (ret)
- 		return ret;
- 
-+	if (sp->port.fifosize > 1) {
-+		ret = sysfs_create_file(&dev->dev.kobj,
-+				&dev_attr_rx_fifo_trigger.attr);
-+		if (ret)
-+			return ret;
-+	}
-+	if (sp->port.type == PORT_SCIFA || sp->port.type ==  PORT_SCIFB) {
-+		ret = sysfs_create_file(&dev->dev.kobj,
-+				&dev_attr_rx_fifo_timeout.attr);
-+		if (ret) {
-+			if (sp->port.fifosize > 1) {
-+				sysfs_remove_file(&dev->dev.kobj,
-+					&dev_attr_rx_fifo_trigger.attr);
-+			}
-+			return ret;
-+		}
-+	}
-+
- #ifdef CONFIG_SH_STANDARD_BIOS
- 	sh_bios_gdb_detach();
- #endif
diff --git a/patches.renesas/0234-ARM-dts-sh73a0-Remove-skeleton.dtsi-inclusion.patch b/patches.renesas/0234-ARM-dts-sh73a0-Remove-skeleton.dtsi-inclusion.patch
deleted file mode 100644
index aba398e778242f..00000000000000
--- a/patches.renesas/0234-ARM-dts-sh73a0-Remove-skeleton.dtsi-inclusion.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From e68285e840f4d3ead966a3b6637dba6cec16b006 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Fri, 21 Oct 2016 11:16:10 +0200
-Subject: [PATCH 234/299] ARM: dts: sh73a0: Remove skeleton.dtsi inclusion
-
-As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
-as deprecated"), including skeleton.dtsi is deprecated.
-
-This fixes the following warning with W=1:
-
-    Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Mark Rutland <mark.rutland@arm.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cbdcf396fc862882516d8feeb9af4d8b33a4c7dd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0.dtsi |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/sh73a0.dtsi
-+++ b/arch/arm/boot/dts/sh73a0.dtsi
-@@ -8,8 +8,6 @@
-  * kind, whether express or implied.
-  */
- 
--/include/ "skeleton.dtsi"
--
- #include <dt-bindings/clock/sh73a0-clock.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/interrupt-controller/irq.h>
-@@ -17,6 +15,8 @@
- / {
- 	compatible = "renesas,sh73a0";
- 	interrupt-parent = <&gic>;
-+	#address-cells = <1>;
-+	#size-cells = <1>;
- 
- 	cpus {
- 		#address-cells = <1>;
diff --git a/patches.renesas/0234-drm-bridge-dw-hdmi-Move-the-driver-to-a-separate-dir.patch b/patches.renesas/0234-drm-bridge-dw-hdmi-Move-the-driver-to-a-separate-dir.patch
deleted file mode 100644
index 08baa24c5d88d3..00000000000000
--- a/patches.renesas/0234-drm-bridge-dw-hdmi-Move-the-driver-to-a-separate-dir.patch
+++ /dev/null
@@ -1,8732 +0,0 @@
-From d88a2db7f7ef0a231ef5fc7b91b01f6400ce4d27 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 10 Mar 2017 15:48:12 +0530
-Subject: [PATCH 234/286] drm: bridge: dw-hdmi: Move the driver to a separate
- directory.
-
-The driver is already made of 5 separate source files. Move it to a
-newly created directory named synopsys where more Synopsys bridge
-drivers can be added later (for the DisplayPort controller for
-instance).
-
-Suggested-by: Jose Abreu <Jose.Abreu@synopsys.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170303172007.26541-10-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 35dc8aabc8783d6322a59d774af2858e5955d2ab)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/Kconfig                     | 25 ++--------------------
- drivers/gpu/drm/bridge/Makefile                    |  4 +---
- drivers/gpu/drm/bridge/synopsys/Kconfig            | 23 ++++++++++++++++++++
- drivers/gpu/drm/bridge/synopsys/Makefile           |  5 +++++
- .../drm/bridge/{ => synopsys}/dw-hdmi-ahb-audio.c  |  0
- .../gpu/drm/bridge/{ => synopsys}/dw-hdmi-audio.h  |  0
- .../drm/bridge/{ => synopsys}/dw-hdmi-i2s-audio.c  |  0
- drivers/gpu/drm/bridge/{ => synopsys}/dw-hdmi.c    |  0
- drivers/gpu/drm/bridge/{ => synopsys}/dw-hdmi.h    |  0
- drivers/gpu/drm/bridge/Kconfig                      |   25 
- drivers/gpu/drm/bridge/Makefile                     |    4 
- drivers/gpu/drm/bridge/dw-hdmi-ahb-audio.c          |  652 -----
- drivers/gpu/drm/bridge/dw-hdmi-audio.h              |   21 
- drivers/gpu/drm/bridge/dw-hdmi-i2s-audio.c          |  141 -
- drivers/gpu/drm/bridge/dw-hdmi.c                    | 2314 --------------------
- drivers/gpu/drm/bridge/dw-hdmi.h                    | 1153 ---------
- drivers/gpu/drm/bridge/synopsys/Kconfig             |   23 
- drivers/gpu/drm/bridge/synopsys/Makefile            |    5 
- drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c |  652 +++++
- drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h     |   21 
- drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c |  141 +
- drivers/gpu/drm/bridge/synopsys/dw-hdmi.c           | 2314 ++++++++++++++++++++
- drivers/gpu/drm/bridge/synopsys/dw-hdmi.h           | 1153 +++++++++
- 14 files changed, 4312 insertions(+), 4307 deletions(-)
- create mode 100644 drivers/gpu/drm/bridge/synopsys/Kconfig
- create mode 100644 drivers/gpu/drm/bridge/synopsys/Makefile
- rename drivers/gpu/drm/bridge/{ => synopsys}/dw-hdmi-ahb-audio.c (100%)
- rename drivers/gpu/drm/bridge/{ => synopsys}/dw-hdmi-audio.h (100%)
- rename drivers/gpu/drm/bridge/{ => synopsys}/dw-hdmi-i2s-audio.c (100%)
- rename drivers/gpu/drm/bridge/{ => synopsys}/dw-hdmi.c (100%)
- rename drivers/gpu/drm/bridge/{ => synopsys}/dw-hdmi.h (100%)
-
---- a/drivers/gpu/drm/bridge/Kconfig
-+++ b/drivers/gpu/drm/bridge/Kconfig
-@@ -24,29 +24,6 @@ config DRM_DUMB_VGA_DAC
- 	help
- 	  Support for RGB to VGA DAC based bridges
- 
--config DRM_DW_HDMI
--	tristate
--	select DRM_KMS_HELPER
--
--config DRM_DW_HDMI_AHB_AUDIO
--	tristate "Synopsis Designware AHB Audio interface"
--	depends on DRM_DW_HDMI && SND
--	select SND_PCM
--	select SND_PCM_ELD
--	select SND_PCM_IEC958
--	help
--	  Support the AHB Audio interface which is part of the Synopsis
--	  Designware HDMI block.  This is used in conjunction with
--	  the i.MX6 HDMI driver.
--
--config DRM_DW_HDMI_I2S_AUDIO
--	tristate "Synopsis Designware I2S Audio interface"
--	depends on DRM_DW_HDMI
--	select SND_SOC_HDMI_CODEC
--	help
--	  Support the I2S Audio interface which is part of the Synopsis
--	  Designware HDMI block.
--
- config DRM_NXP_PTN3460
- 	tristate "NXP PTN3460 DP/LVDS bridge"
- 	depends on OF
-@@ -86,4 +63,6 @@ source "drivers/gpu/drm/bridge/analogix/
- 
- source "drivers/gpu/drm/bridge/adv7511/Kconfig"
- 
-+source "drivers/gpu/drm/bridge/synopsys/Kconfig"
-+
- endmenu
---- a/drivers/gpu/drm/bridge/Makefile
-+++ b/drivers/gpu/drm/bridge/Makefile
-@@ -2,12 +2,10 @@ ccflags-y := -Iinclude/drm
- 
- obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
- obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
--obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
--obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
--obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
- obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
- obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
- obj-$(CONFIG_DRM_SII902X) += sii902x.o
- obj-$(CONFIG_DRM_TOSHIBA_TC358767) += tc358767.o
- obj-$(CONFIG_DRM_ANALOGIX_DP) += analogix/
- obj-$(CONFIG_DRM_I2C_ADV7511) += adv7511/
-+obj-y += synopsys/
---- a/drivers/gpu/drm/bridge/dw-hdmi-ahb-audio.c
-+++ /dev/null
-@@ -1,652 +0,0 @@
--/*
-- * DesignWare HDMI audio driver
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License version 2 as
-- * published by the Free Software Foundation.
-- *
-- * Written and tested against the Designware HDMI Tx found in iMX6.
-- */
--#include <linux/io.h>
--#include <linux/interrupt.h>
--#include <linux/module.h>
--#include <linux/platform_device.h>
--#include <drm/bridge/dw_hdmi.h>
--#include <drm/drm_edid.h>
--
--#include <sound/asoundef.h>
--#include <sound/core.h>
--#include <sound/initval.h>
--#include <sound/pcm.h>
--#include <sound/pcm_drm_eld.h>
--#include <sound/pcm_iec958.h>
--
--#include "dw-hdmi-audio.h"
--
--#define DRIVER_NAME "dw-hdmi-ahb-audio"
--
--/* Provide some bits rather than bit offsets */
--enum {
--	HDMI_AHB_DMA_CONF0_SW_FIFO_RST = BIT(7),
--	HDMI_AHB_DMA_CONF0_EN_HLOCK = BIT(3),
--	HDMI_AHB_DMA_START_START = BIT(0),
--	HDMI_AHB_DMA_STOP_STOP = BIT(0),
--	HDMI_IH_MUTE_AHBDMAAUD_STAT0_ERROR = BIT(5),
--	HDMI_IH_MUTE_AHBDMAAUD_STAT0_LOST = BIT(4),
--	HDMI_IH_MUTE_AHBDMAAUD_STAT0_RETRY = BIT(3),
--	HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE = BIT(2),
--	HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFFULL = BIT(1),
--	HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFEMPTY = BIT(0),
--	HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL =
--		HDMI_IH_MUTE_AHBDMAAUD_STAT0_ERROR |
--		HDMI_IH_MUTE_AHBDMAAUD_STAT0_LOST |
--		HDMI_IH_MUTE_AHBDMAAUD_STAT0_RETRY |
--		HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE |
--		HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFFULL |
--		HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFEMPTY,
--	HDMI_IH_AHBDMAAUD_STAT0_ERROR = BIT(5),
--	HDMI_IH_AHBDMAAUD_STAT0_LOST = BIT(4),
--	HDMI_IH_AHBDMAAUD_STAT0_RETRY = BIT(3),
--	HDMI_IH_AHBDMAAUD_STAT0_DONE = BIT(2),
--	HDMI_IH_AHBDMAAUD_STAT0_BUFFFULL = BIT(1),
--	HDMI_IH_AHBDMAAUD_STAT0_BUFFEMPTY = BIT(0),
--	HDMI_IH_AHBDMAAUD_STAT0_ALL =
--		HDMI_IH_AHBDMAAUD_STAT0_ERROR |
--		HDMI_IH_AHBDMAAUD_STAT0_LOST |
--		HDMI_IH_AHBDMAAUD_STAT0_RETRY |
--		HDMI_IH_AHBDMAAUD_STAT0_DONE |
--		HDMI_IH_AHBDMAAUD_STAT0_BUFFFULL |
--		HDMI_IH_AHBDMAAUD_STAT0_BUFFEMPTY,
--	HDMI_AHB_DMA_CONF0_INCR16 = 2 << 1,
--	HDMI_AHB_DMA_CONF0_INCR8 = 1 << 1,
--	HDMI_AHB_DMA_CONF0_INCR4 = 0,
--	HDMI_AHB_DMA_CONF0_BURST_MODE = BIT(0),
--	HDMI_AHB_DMA_MASK_DONE = BIT(7),
--
--	HDMI_REVISION_ID = 0x0001,
--	HDMI_IH_AHBDMAAUD_STAT0 = 0x0109,
--	HDMI_IH_MUTE_AHBDMAAUD_STAT0 = 0x0189,
--	HDMI_FC_AUDICONF2 = 0x1027,
--	HDMI_FC_AUDSCONF = 0x1063,
--	HDMI_FC_AUDSCONF_LAYOUT1 = 1 << 0,
--	HDMI_FC_AUDSCONF_LAYOUT0 = 0 << 0,
--	HDMI_AHB_DMA_CONF0 = 0x3600,
--	HDMI_AHB_DMA_START = 0x3601,
--	HDMI_AHB_DMA_STOP = 0x3602,
--	HDMI_AHB_DMA_THRSLD = 0x3603,
--	HDMI_AHB_DMA_STRADDR0 = 0x3604,
--	HDMI_AHB_DMA_STPADDR0 = 0x3608,
--	HDMI_AHB_DMA_MASK = 0x3614,
--	HDMI_AHB_DMA_POL = 0x3615,
--	HDMI_AHB_DMA_CONF1 = 0x3616,
--	HDMI_AHB_DMA_BUFFPOL = 0x361a,
--};
--
--struct dw_hdmi_channel_conf {
--	u8 conf1;
--	u8 ca;
--};
--
--/*
-- * The default mapping of ALSA channels to HDMI channels and speaker
-- * allocation bits.  Note that we can't do channel remapping here -
-- * channels must be in the same order.
-- *
-- * Mappings for alsa-lib pcm/surround*.conf files:
-- *
-- *		Front	Sur4.0	Sur4.1	Sur5.0	Sur5.1	Sur7.1
-- * Channels	2	4	6	6	6	8
-- *
-- * Our mapping from ALSA channel to CEA686D speaker name and HDMI channel:
-- *
-- *				Number of ALSA channels
-- * ALSA Channel	2	3	4	5	6	7	8
-- * 0		FL:0	=	=	=	=	=	=
-- * 1		FR:1	=	=	=	=	=	=
-- * 2			FC:3	RL:4	LFE:2	=	=	=
-- * 3				RR:5	RL:4	FC:3	=	=
-- * 4					RR:5	RL:4	=	=
-- * 5						RR:5	=	=
-- * 6							RC:6	=
-- * 7							RLC/FRC	RLC/FRC
-- */
--static struct dw_hdmi_channel_conf default_hdmi_channel_config[7] = {
--	{ 0x03, 0x00 },	/* FL,FR */
--	{ 0x0b, 0x02 },	/* FL,FR,FC */
--	{ 0x33, 0x08 },	/* FL,FR,RL,RR */
--	{ 0x37, 0x09 },	/* FL,FR,LFE,RL,RR */
--	{ 0x3f, 0x0b },	/* FL,FR,LFE,FC,RL,RR */
--	{ 0x7f, 0x0f },	/* FL,FR,LFE,FC,RL,RR,RC */
--	{ 0xff, 0x13 },	/* FL,FR,LFE,FC,RL,RR,[FR]RC,[FR]LC */
--};
--
--struct snd_dw_hdmi {
--	struct snd_card *card;
--	struct snd_pcm *pcm;
--	spinlock_t lock;
--	struct dw_hdmi_audio_data data;
--	struct snd_pcm_substream *substream;
--	void (*reformat)(struct snd_dw_hdmi *, size_t, size_t);
--	void *buf_src;
--	void *buf_dst;
--	dma_addr_t buf_addr;
--	unsigned buf_offset;
--	unsigned buf_period;
--	unsigned buf_size;
--	unsigned channels;
--	u8 revision;
--	u8 iec_offset;
--	u8 cs[192][8];
--};
--
--static void dw_hdmi_writel(u32 val, void __iomem *ptr)
--{
--	writeb_relaxed(val, ptr);
--	writeb_relaxed(val >> 8, ptr + 1);
--	writeb_relaxed(val >> 16, ptr + 2);
--	writeb_relaxed(val >> 24, ptr + 3);
--}
--
--/*
-- * Convert to hardware format: The userspace buffer contains IEC958 samples,
-- * with the PCUV bits in bits 31..28 and audio samples in bits 27..4.  We
-- * need these to be in bits 27..24, with the IEC B bit in bit 28, and audio
-- * samples in 23..0.
-- *
-- * Default preamble in bits 3..0: 8 = block start, 4 = even 2 = odd
-- *
-- * Ideally, we could do with having the data properly formatted in userspace.
-- */
--static void dw_hdmi_reformat_iec958(struct snd_dw_hdmi *dw,
--	size_t offset, size_t bytes)
--{
--	u32 *src = dw->buf_src + offset;
--	u32 *dst = dw->buf_dst + offset;
--	u32 *end = dw->buf_src + offset + bytes;
--
--	do {
--		u32 b, sample = *src++;
--
--		b = (sample & 8) << (28 - 3);
--
--		sample >>= 4;
--
--		*dst++ = sample | b;
--	} while (src < end);
--}
--
--static u32 parity(u32 sample)
--{
--	sample ^= sample >> 16;
--	sample ^= sample >> 8;
--	sample ^= sample >> 4;
--	sample ^= sample >> 2;
--	sample ^= sample >> 1;
--	return (sample & 1) << 27;
--}
--
--static void dw_hdmi_reformat_s24(struct snd_dw_hdmi *dw,
--	size_t offset, size_t bytes)
--{
--	u32 *src = dw->buf_src + offset;
--	u32 *dst = dw->buf_dst + offset;
--	u32 *end = dw->buf_src + offset + bytes;
--
--	do {
--		unsigned i;
--		u8 *cs;
--
--		cs = dw->cs[dw->iec_offset++];
--		if (dw->iec_offset >= 192)
--			dw->iec_offset = 0;
--
--		i = dw->channels;
--		do {
--			u32 sample = *src++;
--
--			sample &= ~0xff000000;
--			sample |= *cs++ << 24;
--			sample |= parity(sample & ~0xf8000000);
--
--			*dst++ = sample;
--		} while (--i);
--	} while (src < end);
--}
--
--static void dw_hdmi_create_cs(struct snd_dw_hdmi *dw,
--	struct snd_pcm_runtime *runtime)
--{
--	u8 cs[4];
--	unsigned ch, i, j;
--
--	snd_pcm_create_iec958_consumer(runtime, cs, sizeof(cs));
--
--	memset(dw->cs, 0, sizeof(dw->cs));
--
--	for (ch = 0; ch < 8; ch++) {
--		cs[2] &= ~IEC958_AES2_CON_CHANNEL;
--		cs[2] |= (ch + 1) << 4;
--
--		for (i = 0; i < ARRAY_SIZE(cs); i++) {
--			unsigned c = cs[i];
--
--			for (j = 0; j < 8; j++, c >>= 1)
--				dw->cs[i * 8 + j][ch] = (c & 1) << 2;
--		}
--	}
--	dw->cs[0][0] |= BIT(4);
--}
--
--static void dw_hdmi_start_dma(struct snd_dw_hdmi *dw)
--{
--	void __iomem *base = dw->data.base;
--	unsigned offset = dw->buf_offset;
--	unsigned period = dw->buf_period;
--	u32 start, stop;
--
--	dw->reformat(dw, offset, period);
--
--	/* Clear all irqs before enabling irqs and starting DMA */
--	writeb_relaxed(HDMI_IH_AHBDMAAUD_STAT0_ALL,
--		       base + HDMI_IH_AHBDMAAUD_STAT0);
--
--	start = dw->buf_addr + offset;
--	stop = start + period - 1;
--
--	/* Setup the hardware start/stop addresses */
--	dw_hdmi_writel(start, base + HDMI_AHB_DMA_STRADDR0);
--	dw_hdmi_writel(stop, base + HDMI_AHB_DMA_STPADDR0);
--
--	writeb_relaxed((u8)~HDMI_AHB_DMA_MASK_DONE, base + HDMI_AHB_DMA_MASK);
--	writeb(HDMI_AHB_DMA_START_START, base + HDMI_AHB_DMA_START);
--
--	offset += period;
--	if (offset >= dw->buf_size)
--		offset = 0;
--	dw->buf_offset = offset;
--}
--
--static void dw_hdmi_stop_dma(struct snd_dw_hdmi *dw)
--{
--	/* Disable interrupts before disabling DMA */
--	writeb_relaxed(~0, dw->data.base + HDMI_AHB_DMA_MASK);
--	writeb_relaxed(HDMI_AHB_DMA_STOP_STOP, dw->data.base + HDMI_AHB_DMA_STOP);
--}
--
--static irqreturn_t snd_dw_hdmi_irq(int irq, void *data)
--{
--	struct snd_dw_hdmi *dw = data;
--	struct snd_pcm_substream *substream;
--	unsigned stat;
--
--	stat = readb_relaxed(dw->data.base + HDMI_IH_AHBDMAAUD_STAT0);
--	if (!stat)
--		return IRQ_NONE;
--
--	writeb_relaxed(stat, dw->data.base + HDMI_IH_AHBDMAAUD_STAT0);
--
--	substream = dw->substream;
--	if (stat & HDMI_IH_AHBDMAAUD_STAT0_DONE && substream) {
--		snd_pcm_period_elapsed(substream);
--
--		spin_lock(&dw->lock);
--		if (dw->substream)
--			dw_hdmi_start_dma(dw);
--		spin_unlock(&dw->lock);
--	}
--
--	return IRQ_HANDLED;
--}
--
--static struct snd_pcm_hardware dw_hdmi_hw = {
--	.info = SNDRV_PCM_INFO_INTERLEAVED |
--		SNDRV_PCM_INFO_BLOCK_TRANSFER |
--		SNDRV_PCM_INFO_MMAP |
--		SNDRV_PCM_INFO_MMAP_VALID,
--	.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE |
--		   SNDRV_PCM_FMTBIT_S24_LE,
--	.rates = SNDRV_PCM_RATE_32000 |
--		 SNDRV_PCM_RATE_44100 |
--		 SNDRV_PCM_RATE_48000 |
--		 SNDRV_PCM_RATE_88200 |
--		 SNDRV_PCM_RATE_96000 |
--		 SNDRV_PCM_RATE_176400 |
--		 SNDRV_PCM_RATE_192000,
--	.channels_min = 2,
--	.channels_max = 8,
--	.buffer_bytes_max = 1024 * 1024,
--	.period_bytes_min = 256,
--	.period_bytes_max = 8192,	/* ERR004323: must limit to 8k */
--	.periods_min = 2,
--	.periods_max = 16,
--	.fifo_size = 0,
--};
--
--static int dw_hdmi_open(struct snd_pcm_substream *substream)
--{
--	struct snd_pcm_runtime *runtime = substream->runtime;
--	struct snd_dw_hdmi *dw = substream->private_data;
--	void __iomem *base = dw->data.base;
--	int ret;
--
--	runtime->hw = dw_hdmi_hw;
--
--	ret = snd_pcm_hw_constraint_eld(runtime, dw->data.eld);
--	if (ret < 0)
--		return ret;
--
--	ret = snd_pcm_limit_hw_rates(runtime);
--	if (ret < 0)
--		return ret;
--
--	ret = snd_pcm_hw_constraint_integer(runtime,
--					    SNDRV_PCM_HW_PARAM_PERIODS);
--	if (ret < 0)
--		return ret;
--
--	/* Limit the buffer size to the size of the preallocated buffer */
--	ret = snd_pcm_hw_constraint_minmax(runtime,
--					   SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
--					   0, substream->dma_buffer.bytes);
--	if (ret < 0)
--		return ret;
--
--	/* Clear FIFO */
--	writeb_relaxed(HDMI_AHB_DMA_CONF0_SW_FIFO_RST,
--		       base + HDMI_AHB_DMA_CONF0);
--
--	/* Configure interrupt polarities */
--	writeb_relaxed(~0, base + HDMI_AHB_DMA_POL);
--	writeb_relaxed(~0, base + HDMI_AHB_DMA_BUFFPOL);
--
--	/* Keep interrupts masked, and clear any pending */
--	writeb_relaxed(~0, base + HDMI_AHB_DMA_MASK);
--	writeb_relaxed(~0, base + HDMI_IH_AHBDMAAUD_STAT0);
--
--	ret = request_irq(dw->data.irq, snd_dw_hdmi_irq, IRQF_SHARED,
--			  "dw-hdmi-audio", dw);
--	if (ret)
--		return ret;
--
--	/* Un-mute done interrupt */
--	writeb_relaxed(HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL &
--		       ~HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE,
--		       base + HDMI_IH_MUTE_AHBDMAAUD_STAT0);
--
--	return 0;
--}
--
--static int dw_hdmi_close(struct snd_pcm_substream *substream)
--{
--	struct snd_dw_hdmi *dw = substream->private_data;
--
--	/* Mute all interrupts */
--	writeb_relaxed(HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL,
--		       dw->data.base + HDMI_IH_MUTE_AHBDMAAUD_STAT0);
--
--	free_irq(dw->data.irq, dw);
--
--	return 0;
--}
--
--static int dw_hdmi_hw_free(struct snd_pcm_substream *substream)
--{
--	return snd_pcm_lib_free_vmalloc_buffer(substream);
--}
--
--static int dw_hdmi_hw_params(struct snd_pcm_substream *substream,
--	struct snd_pcm_hw_params *params)
--{
--	/* Allocate the PCM runtime buffer, which is exposed to userspace. */
--	return snd_pcm_lib_alloc_vmalloc_buffer(substream,
--						params_buffer_bytes(params));
--}
--
--static int dw_hdmi_prepare(struct snd_pcm_substream *substream)
--{
--	struct snd_pcm_runtime *runtime = substream->runtime;
--	struct snd_dw_hdmi *dw = substream->private_data;
--	u8 threshold, conf0, conf1, layout, ca;
--
--	/* Setup as per 3.0.5 FSL 4.1.0 BSP */
--	switch (dw->revision) {
--	case 0x0a:
--		conf0 = HDMI_AHB_DMA_CONF0_BURST_MODE |
--			HDMI_AHB_DMA_CONF0_INCR4;
--		if (runtime->channels == 2)
--			threshold = 126;
--		else
--			threshold = 124;
--		break;
--	case 0x1a:
--		conf0 = HDMI_AHB_DMA_CONF0_BURST_MODE |
--			HDMI_AHB_DMA_CONF0_INCR8;
--		threshold = 128;
--		break;
--	default:
--		/* NOTREACHED */
--		return -EINVAL;
--	}
--
--	dw_hdmi_set_sample_rate(dw->data.hdmi, runtime->rate);
--
--	/* Minimum number of bytes in the fifo. */
--	runtime->hw.fifo_size = threshold * 32;
--
--	conf0 |= HDMI_AHB_DMA_CONF0_EN_HLOCK;
--	conf1 = default_hdmi_channel_config[runtime->channels - 2].conf1;
--	ca = default_hdmi_channel_config[runtime->channels - 2].ca;
--
--	/*
--	 * For >2 channel PCM audio, we need to select layout 1
--	 * and set an appropriate channel map.
--	 */
--	if (runtime->channels > 2)
--		layout = HDMI_FC_AUDSCONF_LAYOUT1;
--	else
--		layout = HDMI_FC_AUDSCONF_LAYOUT0;
--
--	writeb_relaxed(threshold, dw->data.base + HDMI_AHB_DMA_THRSLD);
--	writeb_relaxed(conf0, dw->data.base + HDMI_AHB_DMA_CONF0);
--	writeb_relaxed(conf1, dw->data.base + HDMI_AHB_DMA_CONF1);
--	writeb_relaxed(layout, dw->data.base + HDMI_FC_AUDSCONF);
--	writeb_relaxed(ca, dw->data.base + HDMI_FC_AUDICONF2);
--
--	switch (runtime->format) {
--	case SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE:
--		dw->reformat = dw_hdmi_reformat_iec958;
--		break;
--	case SNDRV_PCM_FORMAT_S24_LE:
--		dw_hdmi_create_cs(dw, runtime);
--		dw->reformat = dw_hdmi_reformat_s24;
--		break;
--	}
--	dw->iec_offset = 0;
--	dw->channels = runtime->channels;
--	dw->buf_src  = runtime->dma_area;
--	dw->buf_dst  = substream->dma_buffer.area;
--	dw->buf_addr = substream->dma_buffer.addr;
--	dw->buf_period = snd_pcm_lib_period_bytes(substream);
--	dw->buf_size = snd_pcm_lib_buffer_bytes(substream);
--
--	return 0;
--}
--
--static int dw_hdmi_trigger(struct snd_pcm_substream *substream, int cmd)
--{
--	struct snd_dw_hdmi *dw = substream->private_data;
--	unsigned long flags;
--	int ret = 0;
--
--	switch (cmd) {
--	case SNDRV_PCM_TRIGGER_START:
--		spin_lock_irqsave(&dw->lock, flags);
--		dw->buf_offset = 0;
--		dw->substream = substream;
--		dw_hdmi_start_dma(dw);
--		dw_hdmi_audio_enable(dw->data.hdmi);
--		spin_unlock_irqrestore(&dw->lock, flags);
--		substream->runtime->delay = substream->runtime->period_size;
--		break;
--
--	case SNDRV_PCM_TRIGGER_STOP:
--		spin_lock_irqsave(&dw->lock, flags);
--		dw->substream = NULL;
--		dw_hdmi_stop_dma(dw);
--		dw_hdmi_audio_disable(dw->data.hdmi);
--		spin_unlock_irqrestore(&dw->lock, flags);
--		break;
--
--	default:
--		ret = -EINVAL;
--		break;
--	}
--
--	return ret;
--}
--
--static snd_pcm_uframes_t dw_hdmi_pointer(struct snd_pcm_substream *substream)
--{
--	struct snd_pcm_runtime *runtime = substream->runtime;
--	struct snd_dw_hdmi *dw = substream->private_data;
--
--	/*
--	 * We are unable to report the exact hardware position as
--	 * reading the 32-bit DMA position using 8-bit reads is racy.
--	 */
--	return bytes_to_frames(runtime, dw->buf_offset);
--}
--
--static struct snd_pcm_ops snd_dw_hdmi_ops = {
--	.open = dw_hdmi_open,
--	.close = dw_hdmi_close,
--	.ioctl = snd_pcm_lib_ioctl,
--	.hw_params = dw_hdmi_hw_params,
--	.hw_free = dw_hdmi_hw_free,
--	.prepare = dw_hdmi_prepare,
--	.trigger = dw_hdmi_trigger,
--	.pointer = dw_hdmi_pointer,
--	.page = snd_pcm_lib_get_vmalloc_page,
--};
--
--static int snd_dw_hdmi_probe(struct platform_device *pdev)
--{
--	const struct dw_hdmi_audio_data *data = pdev->dev.platform_data;
--	struct device *dev = pdev->dev.parent;
--	struct snd_dw_hdmi *dw;
--	struct snd_card *card;
--	struct snd_pcm *pcm;
--	unsigned revision;
--	int ret;
--
--	writeb_relaxed(HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL,
--		       data->base + HDMI_IH_MUTE_AHBDMAAUD_STAT0);
--	revision = readb_relaxed(data->base + HDMI_REVISION_ID);
--	if (revision != 0x0a && revision != 0x1a) {
--		dev_err(dev, "dw-hdmi-audio: unknown revision 0x%02x\n",
--			revision);
--		return -ENXIO;
--	}
--
--	ret = snd_card_new(dev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
--			      THIS_MODULE, sizeof(struct snd_dw_hdmi), &card);
--	if (ret < 0)
--		return ret;
--
--	strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver));
--	strlcpy(card->shortname, "DW-HDMI", sizeof(card->shortname));
--	snprintf(card->longname, sizeof(card->longname),
--		 "%s rev 0x%02x, irq %d", card->shortname, revision,
--		 data->irq);
--
--	dw = card->private_data;
--	dw->card = card;
--	dw->data = *data;
--	dw->revision = revision;
--
--	spin_lock_init(&dw->lock);
--
--	ret = snd_pcm_new(card, "DW HDMI", 0, 1, 0, &pcm);
--	if (ret < 0)
--		goto err;
--
--	dw->pcm = pcm;
--	pcm->private_data = dw;
--	strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
--	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_dw_hdmi_ops);
--
--	/*
--	 * To support 8-channel 96kHz audio reliably, we need 512k
--	 * to satisfy alsa with our restricted period (ERR004323).
--	 */
--	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
--			dev, 128 * 1024, 1024 * 1024);
--
--	ret = snd_card_register(card);
--	if (ret < 0)
--		goto err;
--
--	platform_set_drvdata(pdev, dw);
--
--	return 0;
--
--err:
--	snd_card_free(card);
--	return ret;
--}
--
--static int snd_dw_hdmi_remove(struct platform_device *pdev)
--{
--	struct snd_dw_hdmi *dw = platform_get_drvdata(pdev);
--
--	snd_card_free(dw->card);
--
--	return 0;
--}
--
--#if defined(CONFIG_PM_SLEEP) && defined(IS_NOT_BROKEN)
--/*
-- * This code is fine, but requires implementation in the dw_hdmi_trigger()
-- * method which is currently missing as I have no way to test this.
-- */
--static int snd_dw_hdmi_suspend(struct device *dev)
--{
--	struct snd_dw_hdmi *dw = dev_get_drvdata(dev);
--
--	snd_power_change_state(dw->card, SNDRV_CTL_POWER_D3cold);
--	snd_pcm_suspend_all(dw->pcm);
--
--	return 0;
--}
--
--static int snd_dw_hdmi_resume(struct device *dev)
--{
--	struct snd_dw_hdmi *dw = dev_get_drvdata(dev);
--
--	snd_power_change_state(dw->card, SNDRV_CTL_POWER_D0);
--
--	return 0;
--}
--
--static SIMPLE_DEV_PM_OPS(snd_dw_hdmi_pm, snd_dw_hdmi_suspend,
--			 snd_dw_hdmi_resume);
--#define PM_OPS &snd_dw_hdmi_pm
--#else
--#define PM_OPS NULL
--#endif
--
--static struct platform_driver snd_dw_hdmi_driver = {
--	.probe	= snd_dw_hdmi_probe,
--	.remove	= snd_dw_hdmi_remove,
--	.driver	= {
--		.name = DRIVER_NAME,
--		.pm = PM_OPS,
--	},
--};
--
--module_platform_driver(snd_dw_hdmi_driver);
--
--MODULE_AUTHOR("Russell King <rmk+kernel@arm.linux.org.uk>");
--MODULE_DESCRIPTION("Synopsis Designware HDMI AHB ALSA interface");
--MODULE_LICENSE("GPL v2");
--MODULE_ALIAS("platform:" DRIVER_NAME);
---- a/drivers/gpu/drm/bridge/dw-hdmi-audio.h
-+++ /dev/null
-@@ -1,21 +0,0 @@
--#ifndef DW_HDMI_AUDIO_H
--#define DW_HDMI_AUDIO_H
--
--struct dw_hdmi;
--
--struct dw_hdmi_audio_data {
--	phys_addr_t phys;
--	void __iomem *base;
--	int irq;
--	struct dw_hdmi *hdmi;
--	u8 *eld;
--};
--
--struct dw_hdmi_i2s_audio_data {
--	struct dw_hdmi *hdmi;
--
--	void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
--	u8 (*read)(struct dw_hdmi *hdmi, int offset);
--};
--
--#endif
---- a/drivers/gpu/drm/bridge/dw-hdmi-i2s-audio.c
-+++ /dev/null
-@@ -1,141 +0,0 @@
--/*
-- * dw-hdmi-i2s-audio.c
-- *
-- * Copyright (c) 2016 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License version 2 as
-- * published by the Free Software Foundation.
-- */
--#include <drm/bridge/dw_hdmi.h>
--
--#include <sound/hdmi-codec.h>
--
--#include "dw-hdmi.h"
--#include "dw-hdmi-audio.h"
--
--#define DRIVER_NAME "dw-hdmi-i2s-audio"
--
--static inline void hdmi_write(struct dw_hdmi_i2s_audio_data *audio,
--			      u8 val, int offset)
--{
--	struct dw_hdmi *hdmi = audio->hdmi;
--
--	audio->write(hdmi, val, offset);
--}
--
--static inline u8 hdmi_read(struct dw_hdmi_i2s_audio_data *audio, int offset)
--{
--	struct dw_hdmi *hdmi = audio->hdmi;
--
--	return audio->read(hdmi, offset);
--}
--
--static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
--				 struct hdmi_codec_daifmt *fmt,
--				 struct hdmi_codec_params *hparms)
--{
--	struct dw_hdmi_i2s_audio_data *audio = data;
--	struct dw_hdmi *hdmi = audio->hdmi;
--	u8 conf0 = 0;
--	u8 conf1 = 0;
--	u8 inputclkfs = 0;
--
--	/* it cares I2S only */
--	if ((fmt->fmt != HDMI_I2S) ||
--	    (fmt->bit_clk_master | fmt->frame_clk_master)) {
--		dev_err(dev, "unsupported format/settings\n");
--		return -EINVAL;
--	}
--
--	inputclkfs	= HDMI_AUD_INPUTCLKFS_64FS;
--	conf0		= HDMI_AUD_CONF0_I2S_ALL_ENABLE;
--
--	switch (hparms->sample_width) {
--	case 16:
--		conf1 = HDMI_AUD_CONF1_WIDTH_16;
--		break;
--	case 24:
--	case 32:
--		conf1 = HDMI_AUD_CONF1_WIDTH_24;
--		break;
--	}
--
--	dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate);
--
--	hdmi_write(audio, inputclkfs, HDMI_AUD_INPUTCLKFS);
--	hdmi_write(audio, conf0, HDMI_AUD_CONF0);
--	hdmi_write(audio, conf1, HDMI_AUD_CONF1);
--
--	dw_hdmi_audio_enable(hdmi);
--
--	return 0;
--}
--
--static void dw_hdmi_i2s_audio_shutdown(struct device *dev, void *data)
--{
--	struct dw_hdmi_i2s_audio_data *audio = data;
--	struct dw_hdmi *hdmi = audio->hdmi;
--
--	dw_hdmi_audio_disable(hdmi);
--
--	hdmi_write(audio, HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0);
--}
--
--static struct hdmi_codec_ops dw_hdmi_i2s_ops = {
--	.hw_params	= dw_hdmi_i2s_hw_params,
--	.audio_shutdown	= dw_hdmi_i2s_audio_shutdown,
--};
--
--static int snd_dw_hdmi_probe(struct platform_device *pdev)
--{
--	struct dw_hdmi_i2s_audio_data *audio = pdev->dev.platform_data;
--	struct platform_device_info pdevinfo;
--	struct hdmi_codec_pdata pdata;
--	struct platform_device *platform;
--
--	pdata.ops		= &dw_hdmi_i2s_ops;
--	pdata.i2s		= 1;
--	pdata.max_i2s_channels	= 6;
--	pdata.data		= audio;
--
--	memset(&pdevinfo, 0, sizeof(pdevinfo));
--	pdevinfo.parent		= pdev->dev.parent;
--	pdevinfo.id		= PLATFORM_DEVID_AUTO;
--	pdevinfo.name		= HDMI_CODEC_DRV_NAME;
--	pdevinfo.data		= &pdata;
--	pdevinfo.size_data	= sizeof(pdata);
--	pdevinfo.dma_mask	= DMA_BIT_MASK(32);
--
--	platform = platform_device_register_full(&pdevinfo);
--	if (IS_ERR(platform))
--		return PTR_ERR(platform);
--
--	dev_set_drvdata(&pdev->dev, platform);
--
--	return 0;
--}
--
--static int snd_dw_hdmi_remove(struct platform_device *pdev)
--{
--	struct platform_device *platform = dev_get_drvdata(&pdev->dev);
--
--	platform_device_unregister(platform);
--
--	return 0;
--}
--
--static struct platform_driver snd_dw_hdmi_driver = {
--	.probe	= snd_dw_hdmi_probe,
--	.remove	= snd_dw_hdmi_remove,
--	.driver	= {
--		.name = DRIVER_NAME,
--		.owner = THIS_MODULE,
--	},
--};
--module_platform_driver(snd_dw_hdmi_driver);
--
--MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
--MODULE_DESCRIPTION("Synopsis Designware HDMI I2S ALSA SoC interface");
--MODULE_LICENSE("GPL v2");
--MODULE_ALIAS("platform:" DRIVER_NAME);
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ /dev/null
-@@ -1,2314 +0,0 @@
--/*
-- * DesignWare High-Definition Multimedia Interface (HDMI) driver
-- *
-- * Copyright (C) 2013-2015 Mentor Graphics Inc.
-- * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
-- * Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; either version 2 of the License, or
-- * (at your option) any later version.
-- *
-- */
--#include <linux/module.h>
--#include <linux/irq.h>
--#include <linux/delay.h>
--#include <linux/err.h>
--#include <linux/clk.h>
--#include <linux/hdmi.h>
--#include <linux/mutex.h>
--#include <linux/of_device.h>
--#include <linux/regmap.h>
--#include <linux/spinlock.h>
--
--#include <drm/drm_of.h>
--#include <drm/drmP.h>
--#include <drm/drm_atomic_helper.h>
--#include <drm/drm_crtc_helper.h>
--#include <drm/drm_edid.h>
--#include <drm/drm_encoder_slave.h>
--#include <drm/bridge/dw_hdmi.h>
--
--#include "dw-hdmi.h"
--#include "dw-hdmi-audio.h"
--
--#define HDMI_EDID_LEN		512
--
--#define RGB			0
--#define YCBCR444		1
--#define YCBCR422_16BITS		2
--#define YCBCR422_8BITS		3
--#define XVYCC444		4
--
--enum hdmi_datamap {
--	RGB444_8B = 0x01,
--	RGB444_10B = 0x03,
--	RGB444_12B = 0x05,
--	RGB444_16B = 0x07,
--	YCbCr444_8B = 0x09,
--	YCbCr444_10B = 0x0B,
--	YCbCr444_12B = 0x0D,
--	YCbCr444_16B = 0x0F,
--	YCbCr422_8B = 0x16,
--	YCbCr422_10B = 0x14,
--	YCbCr422_12B = 0x12,
--};
--
--static const u16 csc_coeff_default[3][4] = {
--	{ 0x2000, 0x0000, 0x0000, 0x0000 },
--	{ 0x0000, 0x2000, 0x0000, 0x0000 },
--	{ 0x0000, 0x0000, 0x2000, 0x0000 }
--};
--
--static const u16 csc_coeff_rgb_out_eitu601[3][4] = {
--	{ 0x2000, 0x6926, 0x74fd, 0x010e },
--	{ 0x2000, 0x2cdd, 0x0000, 0x7e9a },
--	{ 0x2000, 0x0000, 0x38b4, 0x7e3b }
--};
--
--static const u16 csc_coeff_rgb_out_eitu709[3][4] = {
--	{ 0x2000, 0x7106, 0x7a02, 0x00a7 },
--	{ 0x2000, 0x3264, 0x0000, 0x7e6d },
--	{ 0x2000, 0x0000, 0x3b61, 0x7e25 }
--};
--
--static const u16 csc_coeff_rgb_in_eitu601[3][4] = {
--	{ 0x2591, 0x1322, 0x074b, 0x0000 },
--	{ 0x6535, 0x2000, 0x7acc, 0x0200 },
--	{ 0x6acd, 0x7534, 0x2000, 0x0200 }
--};
--
--static const u16 csc_coeff_rgb_in_eitu709[3][4] = {
--	{ 0x2dc5, 0x0d9b, 0x049e, 0x0000 },
--	{ 0x62f0, 0x2000, 0x7d11, 0x0200 },
--	{ 0x6756, 0x78ab, 0x2000, 0x0200 }
--};
--
--struct hdmi_vmode {
--	bool mdataenablepolarity;
--
--	unsigned int mpixelclock;
--	unsigned int mpixelrepetitioninput;
--	unsigned int mpixelrepetitionoutput;
--};
--
--struct hdmi_data_info {
--	unsigned int enc_in_format;
--	unsigned int enc_out_format;
--	unsigned int enc_color_depth;
--	unsigned int colorimetry;
--	unsigned int pix_repet_factor;
--	unsigned int hdcp_enable;
--	struct hdmi_vmode video_mode;
--};
--
--struct dw_hdmi_i2c {
--	struct i2c_adapter	adap;
--
--	struct mutex		lock;	/* used to serialize data transfers */
--	struct completion	cmp;
--	u8			stat;
--
--	u8			slave_reg;
--	bool			is_regaddr;
--};
--
--struct dw_hdmi_phy_data {
--	enum dw_hdmi_phy_type type;
--	const char *name;
--	unsigned int gen;
--	bool has_svsret;
--	int (*configure)(struct dw_hdmi *hdmi,
--			 const struct dw_hdmi_plat_data *pdata,
--			 unsigned long mpixelclock);
--};
--
--struct dw_hdmi {
--	struct drm_connector connector;
--	struct drm_bridge bridge;
--
--	unsigned int version;
--
--	struct platform_device *audio;
--	struct device *dev;
--	struct clk *isfr_clk;
--	struct clk *iahb_clk;
--	struct dw_hdmi_i2c *i2c;
--
--	struct hdmi_data_info hdmi_data;
--	const struct dw_hdmi_plat_data *plat_data;
--
--	int vic;
--
--	u8 edid[HDMI_EDID_LEN];
--	bool cable_plugin;
--
--	struct {
--		const struct dw_hdmi_phy_ops *ops;
--		const char *name;
--		void *data;
--		bool enabled;
--	} phy;
--
--	struct drm_display_mode previous_mode;
--
--	struct i2c_adapter *ddc;
--	void __iomem *regs;
--	bool sink_is_hdmi;
--	bool sink_has_audio;
--
--	struct mutex mutex;		/* for state below and previous_mode */
--	enum drm_connector_force force;	/* mutex-protected force state */
--	bool disabled;			/* DRM has disabled our bridge */
--	bool bridge_is_on;		/* indicates the bridge is on */
--	bool rxsense;			/* rxsense state */
--	u8 phy_mask;			/* desired phy int mask settings */
--
--	spinlock_t audio_lock;
--	struct mutex audio_mutex;
--	unsigned int sample_rate;
--	unsigned int audio_cts;
--	unsigned int audio_n;
--	bool audio_enable;
--
--	unsigned int reg_shift;
--	struct regmap *regm;
--};
--
--#define HDMI_IH_PHY_STAT0_RX_SENSE \
--	(HDMI_IH_PHY_STAT0_RX_SENSE0 | HDMI_IH_PHY_STAT0_RX_SENSE1 | \
--	 HDMI_IH_PHY_STAT0_RX_SENSE2 | HDMI_IH_PHY_STAT0_RX_SENSE3)
--
--#define HDMI_PHY_RX_SENSE \
--	(HDMI_PHY_RX_SENSE0 | HDMI_PHY_RX_SENSE1 | \
--	 HDMI_PHY_RX_SENSE2 | HDMI_PHY_RX_SENSE3)
--
--static inline void hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset)
--{
--	regmap_write(hdmi->regm, offset << hdmi->reg_shift, val);
--}
--
--static inline u8 hdmi_readb(struct dw_hdmi *hdmi, int offset)
--{
--	unsigned int val = 0;
--
--	regmap_read(hdmi->regm, offset << hdmi->reg_shift, &val);
--
--	return val;
--}
--
--static void hdmi_modb(struct dw_hdmi *hdmi, u8 data, u8 mask, unsigned reg)
--{
--	regmap_update_bits(hdmi->regm, reg << hdmi->reg_shift, mask, data);
--}
--
--static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg,
--			     u8 shift, u8 mask)
--{
--	hdmi_modb(hdmi, data << shift, mask, reg);
--}
--
--static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi)
--{
--	/* Software reset */
--	hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
--
--	/* Set Standard Mode speed (determined to be 100KHz on iMX6) */
--	hdmi_writeb(hdmi, 0x00, HDMI_I2CM_DIV);
--
--	/* Set done, not acknowledged and arbitration interrupt polarities */
--	hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
--	hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL | HDMI_I2CM_CTLINT_ARB_POL,
--		    HDMI_I2CM_CTLINT);
--
--	/* Clear DONE and ERROR interrupts */
--	hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
--		    HDMI_IH_I2CM_STAT0);
--
--	/* Mute DONE and ERROR interrupts */
--	hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
--		    HDMI_IH_MUTE_I2CM_STAT0);
--}
--
--static int dw_hdmi_i2c_read(struct dw_hdmi *hdmi,
--			    unsigned char *buf, unsigned int length)
--{
--	struct dw_hdmi_i2c *i2c = hdmi->i2c;
--	int stat;
--
--	if (!i2c->is_regaddr) {
--		dev_dbg(hdmi->dev, "set read register address to 0\n");
--		i2c->slave_reg = 0x00;
--		i2c->is_regaddr = true;
--	}
--
--	while (length--) {
--		reinit_completion(&i2c->cmp);
--
--		hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
--		hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ,
--			    HDMI_I2CM_OPERATION);
--
--		stat = wait_for_completion_timeout(&i2c->cmp, HZ / 10);
--		if (!stat)
--			return -EAGAIN;
--
--		/* Check for error condition on the bus */
--		if (i2c->stat & HDMI_IH_I2CM_STAT0_ERROR)
--			return -EIO;
--
--		*buf++ = hdmi_readb(hdmi, HDMI_I2CM_DATAI);
--	}
--
--	return 0;
--}
--
--static int dw_hdmi_i2c_write(struct dw_hdmi *hdmi,
--			     unsigned char *buf, unsigned int length)
--{
--	struct dw_hdmi_i2c *i2c = hdmi->i2c;
--	int stat;
--
--	if (!i2c->is_regaddr) {
--		/* Use the first write byte as register address */
--		i2c->slave_reg = buf[0];
--		length--;
--		buf++;
--		i2c->is_regaddr = true;
--	}
--
--	while (length--) {
--		reinit_completion(&i2c->cmp);
--
--		hdmi_writeb(hdmi, *buf++, HDMI_I2CM_DATAO);
--		hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
--		hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_WRITE,
--			    HDMI_I2CM_OPERATION);
--
--		stat = wait_for_completion_timeout(&i2c->cmp, HZ / 10);
--		if (!stat)
--			return -EAGAIN;
--
--		/* Check for error condition on the bus */
--		if (i2c->stat & HDMI_IH_I2CM_STAT0_ERROR)
--			return -EIO;
--	}
--
--	return 0;
--}
--
--static int dw_hdmi_i2c_xfer(struct i2c_adapter *adap,
--			    struct i2c_msg *msgs, int num)
--{
--	struct dw_hdmi *hdmi = i2c_get_adapdata(adap);
--	struct dw_hdmi_i2c *i2c = hdmi->i2c;
--	u8 addr = msgs[0].addr;
--	int i, ret = 0;
--
--	dev_dbg(hdmi->dev, "xfer: num: %d, addr: %#x\n", num, addr);
--
--	for (i = 0; i < num; i++) {
--		if (msgs[i].addr != addr) {
--			dev_warn(hdmi->dev,
--				 "unsupported transfer, changed slave address\n");
--			return -EOPNOTSUPP;
--		}
--
--		if (msgs[i].len == 0) {
--			dev_dbg(hdmi->dev,
--				"unsupported transfer %d/%d, no data\n",
--				i + 1, num);
--			return -EOPNOTSUPP;
--		}
--	}
--
--	mutex_lock(&i2c->lock);
--
--	/* Unmute DONE and ERROR interrupts */
--	hdmi_writeb(hdmi, 0x00, HDMI_IH_MUTE_I2CM_STAT0);
--
--	/* Set slave device address taken from the first I2C message */
--	hdmi_writeb(hdmi, addr, HDMI_I2CM_SLAVE);
--
--	/* Set slave device register address on transfer */
--	i2c->is_regaddr = false;
--
--	for (i = 0; i < num; i++) {
--		dev_dbg(hdmi->dev, "xfer: num: %d/%d, len: %d, flags: %#x\n",
--			i + 1, num, msgs[i].len, msgs[i].flags);
--
--		if (msgs[i].flags & I2C_M_RD)
--			ret = dw_hdmi_i2c_read(hdmi, msgs[i].buf, msgs[i].len);
--		else
--			ret = dw_hdmi_i2c_write(hdmi, msgs[i].buf, msgs[i].len);
--
--		if (ret < 0)
--			break;
--	}
--
--	if (!ret)
--		ret = num;
--
--	/* Mute DONE and ERROR interrupts */
--	hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
--		    HDMI_IH_MUTE_I2CM_STAT0);
--
--	mutex_unlock(&i2c->lock);
--
--	return ret;
--}
--
--static u32 dw_hdmi_i2c_func(struct i2c_adapter *adapter)
--{
--	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
--}
--
--static const struct i2c_algorithm dw_hdmi_algorithm = {
--	.master_xfer	= dw_hdmi_i2c_xfer,
--	.functionality	= dw_hdmi_i2c_func,
--};
--
--static struct i2c_adapter *dw_hdmi_i2c_adapter(struct dw_hdmi *hdmi)
--{
--	struct i2c_adapter *adap;
--	struct dw_hdmi_i2c *i2c;
--	int ret;
--
--	i2c = devm_kzalloc(hdmi->dev, sizeof(*i2c), GFP_KERNEL);
--	if (!i2c)
--		return ERR_PTR(-ENOMEM);
--
--	mutex_init(&i2c->lock);
--	init_completion(&i2c->cmp);
--
--	adap = &i2c->adap;
--	adap->class = I2C_CLASS_DDC;
--	adap->owner = THIS_MODULE;
--	adap->dev.parent = hdmi->dev;
--	adap->algo = &dw_hdmi_algorithm;
--	strlcpy(adap->name, "DesignWare HDMI", sizeof(adap->name));
--	i2c_set_adapdata(adap, hdmi);
--
--	ret = i2c_add_adapter(adap);
--	if (ret) {
--		dev_warn(hdmi->dev, "cannot add %s I2C adapter\n", adap->name);
--		devm_kfree(hdmi->dev, i2c);
--		return ERR_PTR(ret);
--	}
--
--	hdmi->i2c = i2c;
--
--	dev_info(hdmi->dev, "registered %s I2C bus driver\n", adap->name);
--
--	return adap;
--}
--
--static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts,
--			   unsigned int n)
--{
--	/* Must be set/cleared first */
--	hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
--
--	/* nshift factor = 0 */
--	hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3);
--
--	hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) |
--		    HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
--	hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2);
--	hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1);
--
--	hdmi_writeb(hdmi, (n >> 16) & 0x0f, HDMI_AUD_N3);
--	hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2);
--	hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1);
--}
--
--static unsigned int hdmi_compute_n(unsigned int freq, unsigned long pixel_clk)
--{
--	unsigned int n = (128 * freq) / 1000;
--	unsigned int mult = 1;
--
--	while (freq > 48000) {
--		mult *= 2;
--		freq /= 2;
--	}
--
--	switch (freq) {
--	case 32000:
--		if (pixel_clk == 25175000)
--			n = 4576;
--		else if (pixel_clk == 27027000)
--			n = 4096;
--		else if (pixel_clk == 74176000 || pixel_clk == 148352000)
--			n = 11648;
--		else
--			n = 4096;
--		n *= mult;
--		break;
--
--	case 44100:
--		if (pixel_clk == 25175000)
--			n = 7007;
--		else if (pixel_clk == 74176000)
--			n = 17836;
--		else if (pixel_clk == 148352000)
--			n = 8918;
--		else
--			n = 6272;
--		n *= mult;
--		break;
--
--	case 48000:
--		if (pixel_clk == 25175000)
--			n = 6864;
--		else if (pixel_clk == 27027000)
--			n = 6144;
--		else if (pixel_clk == 74176000)
--			n = 11648;
--		else if (pixel_clk == 148352000)
--			n = 5824;
--		else
--			n = 6144;
--		n *= mult;
--		break;
--
--	default:
--		break;
--	}
--
--	return n;
--}
--
--static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi,
--	unsigned long pixel_clk, unsigned int sample_rate)
--{
--	unsigned long ftdms = pixel_clk;
--	unsigned int n, cts;
--	u64 tmp;
--
--	n = hdmi_compute_n(sample_rate, pixel_clk);
--
--	/*
--	 * Compute the CTS value from the N value.  Note that CTS and N
--	 * can be up to 20 bits in total, so we need 64-bit math.  Also
--	 * note that our TDMS clock is not fully accurate; it is accurate
--	 * to kHz.  This can introduce an unnecessary remainder in the
--	 * calculation below, so we don't try to warn about that.
--	 */
--	tmp = (u64)ftdms * n;
--	do_div(tmp, 128 * sample_rate);
--	cts = tmp;
--
--	dev_dbg(hdmi->dev, "%s: fs=%uHz ftdms=%lu.%03luMHz N=%d cts=%d\n",
--		__func__, sample_rate, ftdms / 1000000, (ftdms / 1000) % 1000,
--		n, cts);
--
--	spin_lock_irq(&hdmi->audio_lock);
--	hdmi->audio_n = n;
--	hdmi->audio_cts = cts;
--	hdmi_set_cts_n(hdmi, cts, hdmi->audio_enable ? n : 0);
--	spin_unlock_irq(&hdmi->audio_lock);
--}
--
--static void hdmi_init_clk_regenerator(struct dw_hdmi *hdmi)
--{
--	mutex_lock(&hdmi->audio_mutex);
--	hdmi_set_clk_regenerator(hdmi, 74250000, hdmi->sample_rate);
--	mutex_unlock(&hdmi->audio_mutex);
--}
--
--static void hdmi_clk_regenerator_update_pixel_clock(struct dw_hdmi *hdmi)
--{
--	mutex_lock(&hdmi->audio_mutex);
--	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock,
--				 hdmi->sample_rate);
--	mutex_unlock(&hdmi->audio_mutex);
--}
--
--void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate)
--{
--	mutex_lock(&hdmi->audio_mutex);
--	hdmi->sample_rate = rate;
--	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock,
--				 hdmi->sample_rate);
--	mutex_unlock(&hdmi->audio_mutex);
--}
--EXPORT_SYMBOL_GPL(dw_hdmi_set_sample_rate);
--
--void dw_hdmi_audio_enable(struct dw_hdmi *hdmi)
--{
--	unsigned long flags;
--
--	spin_lock_irqsave(&hdmi->audio_lock, flags);
--	hdmi->audio_enable = true;
--	hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n);
--	spin_unlock_irqrestore(&hdmi->audio_lock, flags);
--}
--EXPORT_SYMBOL_GPL(dw_hdmi_audio_enable);
--
--void dw_hdmi_audio_disable(struct dw_hdmi *hdmi)
--{
--	unsigned long flags;
--
--	spin_lock_irqsave(&hdmi->audio_lock, flags);
--	hdmi->audio_enable = false;
--	hdmi_set_cts_n(hdmi, hdmi->audio_cts, 0);
--	spin_unlock_irqrestore(&hdmi->audio_lock, flags);
--}
--EXPORT_SYMBOL_GPL(dw_hdmi_audio_disable);
--
--/*
-- * this submodule is responsible for the video data synchronization.
-- * for example, for RGB 4:4:4 input, the data map is defined as
-- *			pin{47~40} <==> R[7:0]
-- *			pin{31~24} <==> G[7:0]
-- *			pin{15~8}  <==> B[7:0]
-- */
--static void hdmi_video_sample(struct dw_hdmi *hdmi)
--{
--	int color_format = 0;
--	u8 val;
--
--	if (hdmi->hdmi_data.enc_in_format == RGB) {
--		if (hdmi->hdmi_data.enc_color_depth == 8)
--			color_format = 0x01;
--		else if (hdmi->hdmi_data.enc_color_depth == 10)
--			color_format = 0x03;
--		else if (hdmi->hdmi_data.enc_color_depth == 12)
--			color_format = 0x05;
--		else if (hdmi->hdmi_data.enc_color_depth == 16)
--			color_format = 0x07;
--		else
--			return;
--	} else if (hdmi->hdmi_data.enc_in_format == YCBCR444) {
--		if (hdmi->hdmi_data.enc_color_depth == 8)
--			color_format = 0x09;
--		else if (hdmi->hdmi_data.enc_color_depth == 10)
--			color_format = 0x0B;
--		else if (hdmi->hdmi_data.enc_color_depth == 12)
--			color_format = 0x0D;
--		else if (hdmi->hdmi_data.enc_color_depth == 16)
--			color_format = 0x0F;
--		else
--			return;
--	} else if (hdmi->hdmi_data.enc_in_format == YCBCR422_8BITS) {
--		if (hdmi->hdmi_data.enc_color_depth == 8)
--			color_format = 0x16;
--		else if (hdmi->hdmi_data.enc_color_depth == 10)
--			color_format = 0x14;
--		else if (hdmi->hdmi_data.enc_color_depth == 12)
--			color_format = 0x12;
--		else
--			return;
--	}
--
--	val = HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE |
--		((color_format << HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET) &
--		HDMI_TX_INVID0_VIDEO_MAPPING_MASK);
--	hdmi_writeb(hdmi, val, HDMI_TX_INVID0);
--
--	/* Enable TX stuffing: When DE is inactive, fix the output data to 0 */
--	val = HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE |
--		HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE |
--		HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE;
--	hdmi_writeb(hdmi, val, HDMI_TX_INSTUFFING);
--	hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA0);
--	hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA1);
--	hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA0);
--	hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA1);
--	hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA0);
--	hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA1);
--}
--
--static int is_color_space_conversion(struct dw_hdmi *hdmi)
--{
--	return hdmi->hdmi_data.enc_in_format != hdmi->hdmi_data.enc_out_format;
--}
--
--static int is_color_space_decimation(struct dw_hdmi *hdmi)
--{
--	if (hdmi->hdmi_data.enc_out_format != YCBCR422_8BITS)
--		return 0;
--	if (hdmi->hdmi_data.enc_in_format == RGB ||
--	    hdmi->hdmi_data.enc_in_format == YCBCR444)
--		return 1;
--	return 0;
--}
--
--static int is_color_space_interpolation(struct dw_hdmi *hdmi)
--{
--	if (hdmi->hdmi_data.enc_in_format != YCBCR422_8BITS)
--		return 0;
--	if (hdmi->hdmi_data.enc_out_format == RGB ||
--	    hdmi->hdmi_data.enc_out_format == YCBCR444)
--		return 1;
--	return 0;
--}
--
--static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi)
--{
--	const u16 (*csc_coeff)[3][4] = &csc_coeff_default;
--	unsigned i;
--	u32 csc_scale = 1;
--
--	if (is_color_space_conversion(hdmi)) {
--		if (hdmi->hdmi_data.enc_out_format == RGB) {
--			if (hdmi->hdmi_data.colorimetry ==
--					HDMI_COLORIMETRY_ITU_601)
--				csc_coeff = &csc_coeff_rgb_out_eitu601;
--			else
--				csc_coeff = &csc_coeff_rgb_out_eitu709;
--		} else if (hdmi->hdmi_data.enc_in_format == RGB) {
--			if (hdmi->hdmi_data.colorimetry ==
--					HDMI_COLORIMETRY_ITU_601)
--				csc_coeff = &csc_coeff_rgb_in_eitu601;
--			else
--				csc_coeff = &csc_coeff_rgb_in_eitu709;
--			csc_scale = 0;
--		}
--	}
--
--	/* The CSC registers are sequential, alternating MSB then LSB */
--	for (i = 0; i < ARRAY_SIZE(csc_coeff_default[0]); i++) {
--		u16 coeff_a = (*csc_coeff)[0][i];
--		u16 coeff_b = (*csc_coeff)[1][i];
--		u16 coeff_c = (*csc_coeff)[2][i];
--
--		hdmi_writeb(hdmi, coeff_a & 0xff, HDMI_CSC_COEF_A1_LSB + i * 2);
--		hdmi_writeb(hdmi, coeff_a >> 8, HDMI_CSC_COEF_A1_MSB + i * 2);
--		hdmi_writeb(hdmi, coeff_b & 0xff, HDMI_CSC_COEF_B1_LSB + i * 2);
--		hdmi_writeb(hdmi, coeff_b >> 8, HDMI_CSC_COEF_B1_MSB + i * 2);
--		hdmi_writeb(hdmi, coeff_c & 0xff, HDMI_CSC_COEF_C1_LSB + i * 2);
--		hdmi_writeb(hdmi, coeff_c >> 8, HDMI_CSC_COEF_C1_MSB + i * 2);
--	}
--
--	hdmi_modb(hdmi, csc_scale, HDMI_CSC_SCALE_CSCSCALE_MASK,
--		  HDMI_CSC_SCALE);
--}
--
--static void hdmi_video_csc(struct dw_hdmi *hdmi)
--{
--	int color_depth = 0;
--	int interpolation = HDMI_CSC_CFG_INTMODE_DISABLE;
--	int decimation = 0;
--
--	/* YCC422 interpolation to 444 mode */
--	if (is_color_space_interpolation(hdmi))
--		interpolation = HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1;
--	else if (is_color_space_decimation(hdmi))
--		decimation = HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3;
--
--	if (hdmi->hdmi_data.enc_color_depth == 8)
--		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP;
--	else if (hdmi->hdmi_data.enc_color_depth == 10)
--		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP;
--	else if (hdmi->hdmi_data.enc_color_depth == 12)
--		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP;
--	else if (hdmi->hdmi_data.enc_color_depth == 16)
--		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP;
--	else
--		return;
--
--	/* Configure the CSC registers */
--	hdmi_writeb(hdmi, interpolation | decimation, HDMI_CSC_CFG);
--	hdmi_modb(hdmi, color_depth, HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK,
--		  HDMI_CSC_SCALE);
--
--	dw_hdmi_update_csc_coeffs(hdmi);
--}
--
--/*
-- * HDMI video packetizer is used to packetize the data.
-- * for example, if input is YCC422 mode or repeater is used,
-- * data should be repacked this module can be bypassed.
-- */
--static void hdmi_video_packetize(struct dw_hdmi *hdmi)
--{
--	unsigned int color_depth = 0;
--	unsigned int remap_size = HDMI_VP_REMAP_YCC422_16bit;
--	unsigned int output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_PP;
--	struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data;
--	u8 val, vp_conf;
--
--	if (hdmi_data->enc_out_format == RGB ||
--	    hdmi_data->enc_out_format == YCBCR444) {
--		if (!hdmi_data->enc_color_depth) {
--			output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS;
--		} else if (hdmi_data->enc_color_depth == 8) {
--			color_depth = 4;
--			output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS;
--		} else if (hdmi_data->enc_color_depth == 10) {
--			color_depth = 5;
--		} else if (hdmi_data->enc_color_depth == 12) {
--			color_depth = 6;
--		} else if (hdmi_data->enc_color_depth == 16) {
--			color_depth = 7;
--		} else {
--			return;
--		}
--	} else if (hdmi_data->enc_out_format == YCBCR422_8BITS) {
--		if (!hdmi_data->enc_color_depth ||
--		    hdmi_data->enc_color_depth == 8)
--			remap_size = HDMI_VP_REMAP_YCC422_16bit;
--		else if (hdmi_data->enc_color_depth == 10)
--			remap_size = HDMI_VP_REMAP_YCC422_20bit;
--		else if (hdmi_data->enc_color_depth == 12)
--			remap_size = HDMI_VP_REMAP_YCC422_24bit;
--		else
--			return;
--		output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422;
--	} else {
--		return;
--	}
--
--	/* set the packetizer registers */
--	val = ((color_depth << HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET) &
--		HDMI_VP_PR_CD_COLOR_DEPTH_MASK) |
--		((hdmi_data->pix_repet_factor <<
--		HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET) &
--		HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK);
--	hdmi_writeb(hdmi, val, HDMI_VP_PR_CD);
--
--	hdmi_modb(hdmi, HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE,
--		  HDMI_VP_STUFF_PR_STUFFING_MASK, HDMI_VP_STUFF);
--
--	/* Data from pixel repeater block */
--	if (hdmi_data->pix_repet_factor > 1) {
--		vp_conf = HDMI_VP_CONF_PR_EN_ENABLE |
--			  HDMI_VP_CONF_BYPASS_SELECT_PIX_REPEATER;
--	} else { /* data from packetizer block */
--		vp_conf = HDMI_VP_CONF_PR_EN_DISABLE |
--			  HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER;
--	}
--
--	hdmi_modb(hdmi, vp_conf,
--		  HDMI_VP_CONF_PR_EN_MASK |
--		  HDMI_VP_CONF_BYPASS_SELECT_MASK, HDMI_VP_CONF);
--
--	hdmi_modb(hdmi, 1 << HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET,
--		  HDMI_VP_STUFF_IDEFAULT_PHASE_MASK, HDMI_VP_STUFF);
--
--	hdmi_writeb(hdmi, remap_size, HDMI_VP_REMAP);
--
--	if (output_select == HDMI_VP_CONF_OUTPUT_SELECTOR_PP) {
--		vp_conf = HDMI_VP_CONF_BYPASS_EN_DISABLE |
--			  HDMI_VP_CONF_PP_EN_ENABLE |
--			  HDMI_VP_CONF_YCC422_EN_DISABLE;
--	} else if (output_select == HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422) {
--		vp_conf = HDMI_VP_CONF_BYPASS_EN_DISABLE |
--			  HDMI_VP_CONF_PP_EN_DISABLE |
--			  HDMI_VP_CONF_YCC422_EN_ENABLE;
--	} else if (output_select == HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS) {
--		vp_conf = HDMI_VP_CONF_BYPASS_EN_ENABLE |
--			  HDMI_VP_CONF_PP_EN_DISABLE |
--			  HDMI_VP_CONF_YCC422_EN_DISABLE;
--	} else {
--		return;
--	}
--
--	hdmi_modb(hdmi, vp_conf,
--		  HDMI_VP_CONF_BYPASS_EN_MASK | HDMI_VP_CONF_PP_EN_ENMASK |
--		  HDMI_VP_CONF_YCC422_EN_MASK, HDMI_VP_CONF);
--
--	hdmi_modb(hdmi, HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE |
--			HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE,
--		  HDMI_VP_STUFF_PP_STUFFING_MASK |
--		  HDMI_VP_STUFF_YCC422_STUFFING_MASK, HDMI_VP_STUFF);
--
--	hdmi_modb(hdmi, output_select, HDMI_VP_CONF_OUTPUT_SELECTOR_MASK,
--		  HDMI_VP_CONF);
--}
--
--/* -----------------------------------------------------------------------------
-- * Synopsys PHY Handling
-- */
--
--static inline void hdmi_phy_test_clear(struct dw_hdmi *hdmi,
--				       unsigned char bit)
--{
--	hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLR_OFFSET,
--		  HDMI_PHY_TST0_TSTCLR_MASK, HDMI_PHY_TST0);
--}
--
--static bool hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, int msec)
--{
--	u32 val;
--
--	while ((val = hdmi_readb(hdmi, HDMI_IH_I2CMPHY_STAT0) & 0x3) == 0) {
--		if (msec-- == 0)
--			return false;
--		udelay(1000);
--	}
--	hdmi_writeb(hdmi, val, HDMI_IH_I2CMPHY_STAT0);
--
--	return true;
--}
--
--void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
--			   unsigned char addr)
--{
--	hdmi_writeb(hdmi, 0xFF, HDMI_IH_I2CMPHY_STAT0);
--	hdmi_writeb(hdmi, addr, HDMI_PHY_I2CM_ADDRESS_ADDR);
--	hdmi_writeb(hdmi, (unsigned char)(data >> 8),
--		    HDMI_PHY_I2CM_DATAO_1_ADDR);
--	hdmi_writeb(hdmi, (unsigned char)(data >> 0),
--		    HDMI_PHY_I2CM_DATAO_0_ADDR);
--	hdmi_writeb(hdmi, HDMI_PHY_I2CM_OPERATION_ADDR_WRITE,
--		    HDMI_PHY_I2CM_OPERATION_ADDR);
--	hdmi_phy_wait_i2c_done(hdmi, 1000);
--}
--EXPORT_SYMBOL_GPL(dw_hdmi_phy_i2c_write);
--
--static void dw_hdmi_phy_enable_powerdown(struct dw_hdmi *hdmi, bool enable)
--{
--	hdmi_mask_writeb(hdmi, !enable, HDMI_PHY_CONF0,
--			 HDMI_PHY_CONF0_PDZ_OFFSET,
--			 HDMI_PHY_CONF0_PDZ_MASK);
--}
--
--static void dw_hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, u8 enable)
--{
--	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
--			 HDMI_PHY_CONF0_ENTMDS_OFFSET,
--			 HDMI_PHY_CONF0_ENTMDS_MASK);
--}
--
--static void dw_hdmi_phy_enable_svsret(struct dw_hdmi *hdmi, u8 enable)
--{
--	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
--			 HDMI_PHY_CONF0_SVSRET_OFFSET,
--			 HDMI_PHY_CONF0_SVSRET_MASK);
--}
--
--static void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable)
--{
--	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
--			 HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET,
--			 HDMI_PHY_CONF0_GEN2_PDDQ_MASK);
--}
--
--static void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable)
--{
--	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
--			 HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET,
--			 HDMI_PHY_CONF0_GEN2_TXPWRON_MASK);
--}
--
--static void dw_hdmi_phy_sel_data_en_pol(struct dw_hdmi *hdmi, u8 enable)
--{
--	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
--			 HDMI_PHY_CONF0_SELDATAENPOL_OFFSET,
--			 HDMI_PHY_CONF0_SELDATAENPOL_MASK);
--}
--
--static void dw_hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, u8 enable)
--{
--	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
--			 HDMI_PHY_CONF0_SELDIPIF_OFFSET,
--			 HDMI_PHY_CONF0_SELDIPIF_MASK);
--}
--
--static void dw_hdmi_phy_power_off(struct dw_hdmi *hdmi)
--{
--	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
--	unsigned int i;
--	u16 val;
--
--	if (phy->gen == 1) {
--		dw_hdmi_phy_enable_tmds(hdmi, 0);
--		dw_hdmi_phy_enable_powerdown(hdmi, true);
--		return;
--	}
--
--	dw_hdmi_phy_gen2_txpwron(hdmi, 0);
--
--	/*
--	 * Wait for TX_PHY_LOCK to be deasserted to indicate that the PHY went
--	 * to low power mode.
--	 */
--	for (i = 0; i < 5; ++i) {
--		val = hdmi_readb(hdmi, HDMI_PHY_STAT0);
--		if (!(val & HDMI_PHY_TX_PHY_LOCK))
--			break;
--
--		usleep_range(1000, 2000);
--	}
--
--	if (val & HDMI_PHY_TX_PHY_LOCK)
--		dev_warn(hdmi->dev, "PHY failed to power down\n");
--	else
--		dev_dbg(hdmi->dev, "PHY powered down in %u iterations\n", i);
--
--	dw_hdmi_phy_gen2_pddq(hdmi, 1);
--}
--
--static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi)
--{
--	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
--	unsigned int i;
--	u8 val;
--
--	if (phy->gen == 1) {
--		dw_hdmi_phy_enable_powerdown(hdmi, false);
--
--		/* Toggle TMDS enable. */
--		dw_hdmi_phy_enable_tmds(hdmi, 0);
--		dw_hdmi_phy_enable_tmds(hdmi, 1);
--		return 0;
--	}
--
--	dw_hdmi_phy_gen2_txpwron(hdmi, 1);
--	dw_hdmi_phy_gen2_pddq(hdmi, 0);
--
--	/* Wait for PHY PLL lock */
--	for (i = 0; i < 5; ++i) {
--		val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
--		if (val)
--			break;
--
--		usleep_range(1000, 2000);
--	}
--
--	if (!val) {
--		dev_err(hdmi->dev, "PHY PLL failed to lock\n");
--		return -ETIMEDOUT;
--	}
--
--	dev_dbg(hdmi->dev, "PHY PLL locked %u iterations\n", i);
--	return 0;
--}
--
--/*
-- * PHY configuration function for the DWC HDMI 3D TX PHY. Based on the available
-- * information the DWC MHL PHY has the same register layout and is thus also
-- * supported by this function.
-- */
--static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
--		const struct dw_hdmi_plat_data *pdata,
--		unsigned long mpixelclock)
--{
--	const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
--	const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
--	const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
--
--	/* PLL/MPLL Cfg - always match on final entry */
--	for (; mpll_config->mpixelclock != ~0UL; mpll_config++)
--		if (mpixelclock <= mpll_config->mpixelclock)
--			break;
--
--	for (; curr_ctrl->mpixelclock != ~0UL; curr_ctrl++)
--		if (mpixelclock <= curr_ctrl->mpixelclock)
--			break;
--
--	for (; phy_config->mpixelclock != ~0UL; phy_config++)
--		if (mpixelclock <= phy_config->mpixelclock)
--			break;
--
--	if (mpll_config->mpixelclock == ~0UL ||
--	    curr_ctrl->mpixelclock == ~0UL ||
--	    phy_config->mpixelclock == ~0UL)
--		return -EINVAL;
--
--	dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce,
--			      HDMI_3D_TX_PHY_CPCE_CTRL);
--	dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].gmp,
--			      HDMI_3D_TX_PHY_GMPCTRL);
--	dw_hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[0],
--			      HDMI_3D_TX_PHY_CURRCTRL);
--
--	dw_hdmi_phy_i2c_write(hdmi, 0, HDMI_3D_TX_PHY_PLLPHBYCTRL);
--	dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK,
--			      HDMI_3D_TX_PHY_MSM_CTRL);
--
--	dw_hdmi_phy_i2c_write(hdmi, phy_config->term, HDMI_3D_TX_PHY_TXTERM);
--	dw_hdmi_phy_i2c_write(hdmi, phy_config->sym_ctr,
--			      HDMI_3D_TX_PHY_CKSYMTXCTRL);
--	dw_hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr,
--			      HDMI_3D_TX_PHY_VLEVCTRL);
--
--	/* Override and disable clock termination. */
--	dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE,
--			      HDMI_3D_TX_PHY_CKCALCTRL);
--
--	return 0;
--}
--
--static int hdmi_phy_configure(struct dw_hdmi *hdmi)
--{
--	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
--	const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
--	unsigned long mpixelclock = hdmi->hdmi_data.video_mode.mpixelclock;
--	int ret;
--
--	dw_hdmi_phy_power_off(hdmi);
--
--	/* Leave low power consumption mode by asserting SVSRET. */
--	if (phy->has_svsret)
--		dw_hdmi_phy_enable_svsret(hdmi, 1);
--
--	/* PHY reset. The reset signal is active high on Gen2 PHYs. */
--	hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ);
--	hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ);
--
--	hdmi_writeb(hdmi, HDMI_MC_HEACPHY_RST_ASSERT, HDMI_MC_HEACPHY_RST);
--
--	hdmi_phy_test_clear(hdmi, 1);
--	hdmi_writeb(hdmi, HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2,
--		    HDMI_PHY_I2CM_SLAVE_ADDR);
--	hdmi_phy_test_clear(hdmi, 0);
--
--	/* Write to the PHY as configured by the platform */
--	if (pdata->configure_phy)
--		ret = pdata->configure_phy(hdmi, pdata, mpixelclock);
--	else
--		ret = phy->configure(hdmi, pdata, mpixelclock);
--	if (ret) {
--		dev_err(hdmi->dev, "PHY configuration failed (clock %lu)\n",
--			mpixelclock);
--		return ret;
--	}
--
--	return dw_hdmi_phy_power_on(hdmi);
--}
--
--static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
--			    struct drm_display_mode *mode)
--{
--	int i, ret;
--
--	/* HDMI Phy spec says to do the phy initialization sequence twice */
--	for (i = 0; i < 2; i++) {
--		dw_hdmi_phy_sel_data_en_pol(hdmi, 1);
--		dw_hdmi_phy_sel_interface_control(hdmi, 0);
--
--		ret = hdmi_phy_configure(hdmi);
--		if (ret)
--			return ret;
--	}
--
--	return 0;
--}
--
--static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi, void *data)
--{
--	dw_hdmi_phy_power_off(hdmi);
--}
--
--static enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi,
--						      void *data)
--{
--	return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ?
--		connector_status_connected : connector_status_disconnected;
--}
--
--static const struct dw_hdmi_phy_ops dw_hdmi_synopsys_phy_ops = {
--	.init = dw_hdmi_phy_init,
--	.disable = dw_hdmi_phy_disable,
--	.read_hpd = dw_hdmi_phy_read_hpd,
--};
--
--/* -----------------------------------------------------------------------------
-- * HDMI TX Setup
-- */
--
--static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi)
--{
--	u8 de;
--
--	if (hdmi->hdmi_data.video_mode.mdataenablepolarity)
--		de = HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH;
--	else
--		de = HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_LOW;
--
--	/* disable rx detect */
--	hdmi_modb(hdmi, HDMI_A_HDCPCFG0_RXDETECT_DISABLE,
--		  HDMI_A_HDCPCFG0_RXDETECT_MASK, HDMI_A_HDCPCFG0);
--
--	hdmi_modb(hdmi, de, HDMI_A_VIDPOLCFG_DATAENPOL_MASK, HDMI_A_VIDPOLCFG);
--
--	hdmi_modb(hdmi, HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE,
--		  HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK, HDMI_A_HDCPCFG1);
--}
--
--static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode)
--{
--	struct hdmi_avi_infoframe frame;
--	u8 val;
--
--	/* Initialise info frame from DRM mode */
--	drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
--
--	if (hdmi->hdmi_data.enc_out_format == YCBCR444)
--		frame.colorspace = HDMI_COLORSPACE_YUV444;
--	else if (hdmi->hdmi_data.enc_out_format == YCBCR422_8BITS)
--		frame.colorspace = HDMI_COLORSPACE_YUV422;
--	else
--		frame.colorspace = HDMI_COLORSPACE_RGB;
--
--	/* Set up colorimetry */
--	if (hdmi->hdmi_data.enc_out_format == XVYCC444) {
--		frame.colorimetry = HDMI_COLORIMETRY_EXTENDED;
--		if (hdmi->hdmi_data.colorimetry == HDMI_COLORIMETRY_ITU_601)
--			frame.extended_colorimetry =
--				HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
--		else /*hdmi->hdmi_data.colorimetry == HDMI_COLORIMETRY_ITU_709*/
--			frame.extended_colorimetry =
--				HDMI_EXTENDED_COLORIMETRY_XV_YCC_709;
--	} else if (hdmi->hdmi_data.enc_out_format != RGB) {
--		frame.colorimetry = hdmi->hdmi_data.colorimetry;
--		frame.extended_colorimetry = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
--	} else { /* Carries no data */
--		frame.colorimetry = HDMI_COLORIMETRY_NONE;
--		frame.extended_colorimetry = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
--	}
--
--	frame.scan_mode = HDMI_SCAN_MODE_NONE;
--
--	/*
--	 * The Designware IP uses a different byte format from standard
--	 * AVI info frames, though generally the bits are in the correct
--	 * bytes.
--	 */
--
--	/*
--	 * AVI data byte 1 differences: Colorspace in bits 0,1 rather than 5,6,
--	 * scan info in bits 4,5 rather than 0,1 and active aspect present in
--	 * bit 6 rather than 4.
--	 */
--	val = (frame.scan_mode & 3) << 4 | (frame.colorspace & 3);
--	if (frame.active_aspect & 15)
--		val |= HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT;
--	if (frame.top_bar || frame.bottom_bar)
--		val |= HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR;
--	if (frame.left_bar || frame.right_bar)
--		val |= HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR;
--	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF0);
--
--	/* AVI data byte 2 differences: none */
--	val = ((frame.colorimetry & 0x3) << 6) |
--	      ((frame.picture_aspect & 0x3) << 4) |
--	      (frame.active_aspect & 0xf);
--	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF1);
--
--	/* AVI data byte 3 differences: none */
--	val = ((frame.extended_colorimetry & 0x7) << 4) |
--	      ((frame.quantization_range & 0x3) << 2) |
--	      (frame.nups & 0x3);
--	if (frame.itc)
--		val |= HDMI_FC_AVICONF2_IT_CONTENT_VALID;
--	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF2);
--
--	/* AVI data byte 4 differences: none */
--	val = frame.video_code & 0x7f;
--	hdmi_writeb(hdmi, val, HDMI_FC_AVIVID);
--
--	/* AVI Data Byte 5- set up input and output pixel repetition */
--	val = (((hdmi->hdmi_data.video_mode.mpixelrepetitioninput + 1) <<
--		HDMI_FC_PRCONF_INCOMING_PR_FACTOR_OFFSET) &
--		HDMI_FC_PRCONF_INCOMING_PR_FACTOR_MASK) |
--		((hdmi->hdmi_data.video_mode.mpixelrepetitionoutput <<
--		HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_OFFSET) &
--		HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_MASK);
--	hdmi_writeb(hdmi, val, HDMI_FC_PRCONF);
--
--	/*
--	 * AVI data byte 5 differences: content type in 0,1 rather than 4,5,
--	 * ycc range in bits 2,3 rather than 6,7
--	 */
--	val = ((frame.ycc_quantization_range & 0x3) << 2) |
--	      (frame.content_type & 0x3);
--	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF3);
--
--	/* AVI Data Bytes 6-13 */
--	hdmi_writeb(hdmi, frame.top_bar & 0xff, HDMI_FC_AVIETB0);
--	hdmi_writeb(hdmi, (frame.top_bar >> 8) & 0xff, HDMI_FC_AVIETB1);
--	hdmi_writeb(hdmi, frame.bottom_bar & 0xff, HDMI_FC_AVISBB0);
--	hdmi_writeb(hdmi, (frame.bottom_bar >> 8) & 0xff, HDMI_FC_AVISBB1);
--	hdmi_writeb(hdmi, frame.left_bar & 0xff, HDMI_FC_AVIELB0);
--	hdmi_writeb(hdmi, (frame.left_bar >> 8) & 0xff, HDMI_FC_AVIELB1);
--	hdmi_writeb(hdmi, frame.right_bar & 0xff, HDMI_FC_AVISRB0);
--	hdmi_writeb(hdmi, (frame.right_bar >> 8) & 0xff, HDMI_FC_AVISRB1);
--}
--
--static void hdmi_av_composer(struct dw_hdmi *hdmi,
--			     const struct drm_display_mode *mode)
--{
--	u8 inv_val;
--	struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode;
--	int hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len;
--	unsigned int vdisplay;
--
--	vmode->mpixelclock = mode->clock * 1000;
--
--	dev_dbg(hdmi->dev, "final pixclk = %d\n", vmode->mpixelclock);
--
--	/* Set up HDMI_FC_INVIDCONF */
--	inv_val = (hdmi->hdmi_data.hdcp_enable ?
--		HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE :
--		HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE);
--
--	inv_val |= mode->flags & DRM_MODE_FLAG_PVSYNC ?
--		HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH :
--		HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW;
--
--	inv_val |= mode->flags & DRM_MODE_FLAG_PHSYNC ?
--		HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH :
--		HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW;
--
--	inv_val |= (vmode->mdataenablepolarity ?
--		HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH :
--		HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW);
--
--	if (hdmi->vic == 39)
--		inv_val |= HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH;
--	else
--		inv_val |= mode->flags & DRM_MODE_FLAG_INTERLACE ?
--			HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH :
--			HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW;
--
--	inv_val |= mode->flags & DRM_MODE_FLAG_INTERLACE ?
--		HDMI_FC_INVIDCONF_IN_I_P_INTERLACED :
--		HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE;
--
--	inv_val |= hdmi->sink_is_hdmi ?
--		HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE :
--		HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE;
--
--	hdmi_writeb(hdmi, inv_val, HDMI_FC_INVIDCONF);
--
--	vdisplay = mode->vdisplay;
--	vblank = mode->vtotal - mode->vdisplay;
--	v_de_vs = mode->vsync_start - mode->vdisplay;
--	vsync_len = mode->vsync_end - mode->vsync_start;
--
--	/*
--	 * When we're setting an interlaced mode, we need
--	 * to adjust the vertical timing to suit.
--	 */
--	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
--		vdisplay /= 2;
--		vblank /= 2;
--		v_de_vs /= 2;
--		vsync_len /= 2;
--	}
--
--	/* Set up horizontal active pixel width */
--	hdmi_writeb(hdmi, mode->hdisplay >> 8, HDMI_FC_INHACTV1);
--	hdmi_writeb(hdmi, mode->hdisplay, HDMI_FC_INHACTV0);
--
--	/* Set up vertical active lines */
--	hdmi_writeb(hdmi, vdisplay >> 8, HDMI_FC_INVACTV1);
--	hdmi_writeb(hdmi, vdisplay, HDMI_FC_INVACTV0);
--
--	/* Set up horizontal blanking pixel region width */
--	hblank = mode->htotal - mode->hdisplay;
--	hdmi_writeb(hdmi, hblank >> 8, HDMI_FC_INHBLANK1);
--	hdmi_writeb(hdmi, hblank, HDMI_FC_INHBLANK0);
--
--	/* Set up vertical blanking pixel region width */
--	hdmi_writeb(hdmi, vblank, HDMI_FC_INVBLANK);
--
--	/* Set up HSYNC active edge delay width (in pixel clks) */
--	h_de_hs = mode->hsync_start - mode->hdisplay;
--	hdmi_writeb(hdmi, h_de_hs >> 8, HDMI_FC_HSYNCINDELAY1);
--	hdmi_writeb(hdmi, h_de_hs, HDMI_FC_HSYNCINDELAY0);
--
--	/* Set up VSYNC active edge delay (in lines) */
--	hdmi_writeb(hdmi, v_de_vs, HDMI_FC_VSYNCINDELAY);
--
--	/* Set up HSYNC active pulse width (in pixel clks) */
--	hsync_len = mode->hsync_end - mode->hsync_start;
--	hdmi_writeb(hdmi, hsync_len >> 8, HDMI_FC_HSYNCINWIDTH1);
--	hdmi_writeb(hdmi, hsync_len, HDMI_FC_HSYNCINWIDTH0);
--
--	/* Set up VSYNC active edge delay (in lines) */
--	hdmi_writeb(hdmi, vsync_len, HDMI_FC_VSYNCINWIDTH);
--}
--
--/* HDMI Initialization Step B.4 */
--static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi)
--{
--	u8 clkdis;
--
--	/* control period minimum duration */
--	hdmi_writeb(hdmi, 12, HDMI_FC_CTRLDUR);
--	hdmi_writeb(hdmi, 32, HDMI_FC_EXCTRLDUR);
--	hdmi_writeb(hdmi, 1, HDMI_FC_EXCTRLSPAC);
--
--	/* Set to fill TMDS data channels */
--	hdmi_writeb(hdmi, 0x0B, HDMI_FC_CH0PREAM);
--	hdmi_writeb(hdmi, 0x16, HDMI_FC_CH1PREAM);
--	hdmi_writeb(hdmi, 0x21, HDMI_FC_CH2PREAM);
--
--	/* Enable pixel clock and tmds data path */
--	clkdis = 0x7F;
--	clkdis &= ~HDMI_MC_CLKDIS_PIXELCLK_DISABLE;
--	hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
--
--	clkdis &= ~HDMI_MC_CLKDIS_TMDSCLK_DISABLE;
--	hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
--
--	/* Enable csc path */
--	if (is_color_space_conversion(hdmi)) {
--		clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE;
--		hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
--	}
--
--	/* Enable color space conversion if needed */
--	if (is_color_space_conversion(hdmi))
--		hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH,
--			    HDMI_MC_FLOWCTRL);
--	else
--		hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS,
--			    HDMI_MC_FLOWCTRL);
--}
--
--static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi)
--{
--	hdmi_modb(hdmi, 0, HDMI_MC_CLKDIS_AUDCLK_DISABLE, HDMI_MC_CLKDIS);
--}
--
--/* Workaround to clear the overflow condition */
--static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi)
--{
--	unsigned int count;
--	unsigned int i;
--	u8 val;
--
--	/*
--	 * Under some circumstances the Frame Composer arithmetic unit can miss
--	 * an FC register write due to being busy processing the previous one.
--	 * The issue can be worked around by issuing a TMDS software reset and
--	 * then write one of the FC registers several times.
--	 *
--	 * The number of iterations matters and depends on the HDMI TX revision
--	 * (and possibly on the platform). So far only i.MX6Q (v1.30a) and
--	 * i.MX6DL (v1.31a) have been identified as needing the workaround, with
--	 * 4 and 1 iterations respectively.
--	 */
--
--	switch (hdmi->version) {
--	case 0x130a:
--		count = 4;
--		break;
--	case 0x131a:
--		count = 1;
--		break;
--	default:
--		return;
--	}
--
--	/* TMDS software reset */
--	hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, HDMI_MC_SWRSTZ);
--
--	val = hdmi_readb(hdmi, HDMI_FC_INVIDCONF);
--	for (i = 0; i < count; i++)
--		hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF);
--}
--
--static void hdmi_enable_overflow_interrupts(struct dw_hdmi *hdmi)
--{
--	hdmi_writeb(hdmi, 0, HDMI_FC_MASK2);
--	hdmi_writeb(hdmi, 0, HDMI_IH_MUTE_FC_STAT2);
--}
--
--static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi)
--{
--	hdmi_writeb(hdmi, HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK,
--		    HDMI_IH_MUTE_FC_STAT2);
--}
--
--static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode)
--{
--	int ret;
--
--	hdmi_disable_overflow_interrupts(hdmi);
--
--	hdmi->vic = drm_match_cea_mode(mode);
--
--	if (!hdmi->vic) {
--		dev_dbg(hdmi->dev, "Non-CEA mode used in HDMI\n");
--	} else {
--		dev_dbg(hdmi->dev, "CEA mode used vic=%d\n", hdmi->vic);
--	}
--
--	if ((hdmi->vic == 6) || (hdmi->vic == 7) ||
--	    (hdmi->vic == 21) || (hdmi->vic == 22) ||
--	    (hdmi->vic == 2) || (hdmi->vic == 3) ||
--	    (hdmi->vic == 17) || (hdmi->vic == 18))
--		hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_601;
--	else
--		hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_709;
--
--	hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 0;
--	hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0;
--
--	/* TODO: Get input format from IPU (via FB driver interface) */
--	hdmi->hdmi_data.enc_in_format = RGB;
--
--	hdmi->hdmi_data.enc_out_format = RGB;
--
--	hdmi->hdmi_data.enc_color_depth = 8;
--	hdmi->hdmi_data.pix_repet_factor = 0;
--	hdmi->hdmi_data.hdcp_enable = 0;
--	hdmi->hdmi_data.video_mode.mdataenablepolarity = true;
--
--	/* HDMI Initialization Step B.1 */
--	hdmi_av_composer(hdmi, mode);
--
--	/* HDMI Initializateion Step B.2 */
--	ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data, &hdmi->previous_mode);
--	if (ret)
--		return ret;
--	hdmi->phy.enabled = true;
--
--	/* HDMI Initialization Step B.3 */
--	dw_hdmi_enable_video_path(hdmi);
--
--	if (hdmi->sink_has_audio) {
--		dev_dbg(hdmi->dev, "sink has audio support\n");
--
--		/* HDMI Initialization Step E - Configure audio */
--		hdmi_clk_regenerator_update_pixel_clock(hdmi);
--		hdmi_enable_audio_clk(hdmi);
--	}
--
--	/* not for DVI mode */
--	if (hdmi->sink_is_hdmi) {
--		dev_dbg(hdmi->dev, "%s HDMI mode\n", __func__);
--
--		/* HDMI Initialization Step F - Configure AVI InfoFrame */
--		hdmi_config_AVI(hdmi, mode);
--	} else {
--		dev_dbg(hdmi->dev, "%s DVI mode\n", __func__);
--	}
--
--	hdmi_video_packetize(hdmi);
--	hdmi_video_csc(hdmi);
--	hdmi_video_sample(hdmi);
--	hdmi_tx_hdcp_config(hdmi);
--
--	dw_hdmi_clear_overflow(hdmi);
--	if (hdmi->cable_plugin && hdmi->sink_is_hdmi)
--		hdmi_enable_overflow_interrupts(hdmi);
--
--	return 0;
--}
--
--/* Wait until we are registered to enable interrupts */
--static int dw_hdmi_fb_registered(struct dw_hdmi *hdmi)
--{
--	hdmi_writeb(hdmi, HDMI_PHY_I2CM_INT_ADDR_DONE_POL,
--		    HDMI_PHY_I2CM_INT_ADDR);
--
--	hdmi_writeb(hdmi, HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL |
--		    HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL,
--		    HDMI_PHY_I2CM_CTLINT_ADDR);
--
--	/* enable cable hot plug irq */
--	hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
--
--	/* Clear Hotplug interrupts */
--	hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
--		    HDMI_IH_PHY_STAT0);
--
--	return 0;
--}
--
--static void initialize_hdmi_ih_mutes(struct dw_hdmi *hdmi)
--{
--	u8 ih_mute;
--
--	/*
--	 * Boot up defaults are:
--	 * HDMI_IH_MUTE   = 0x03 (disabled)
--	 * HDMI_IH_MUTE_* = 0x00 (enabled)
--	 *
--	 * Disable top level interrupt bits in HDMI block
--	 */
--	ih_mute = hdmi_readb(hdmi, HDMI_IH_MUTE) |
--		  HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT |
--		  HDMI_IH_MUTE_MUTE_ALL_INTERRUPT;
--
--	hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE);
--
--	/* by default mask all interrupts */
--	hdmi_writeb(hdmi, 0xff, HDMI_VP_MASK);
--	hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK0);
--	hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK1);
--	hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK2);
--	hdmi_writeb(hdmi, 0xff, HDMI_PHY_MASK0);
--	hdmi_writeb(hdmi, 0xff, HDMI_PHY_I2CM_INT_ADDR);
--	hdmi_writeb(hdmi, 0xff, HDMI_PHY_I2CM_CTLINT_ADDR);
--	hdmi_writeb(hdmi, 0xff, HDMI_AUD_INT);
--	hdmi_writeb(hdmi, 0xff, HDMI_AUD_SPDIFINT);
--	hdmi_writeb(hdmi, 0xff, HDMI_AUD_HBR_MASK);
--	hdmi_writeb(hdmi, 0xff, HDMI_GP_MASK);
--	hdmi_writeb(hdmi, 0xff, HDMI_A_APIINTMSK);
--	hdmi_writeb(hdmi, 0xff, HDMI_CEC_MASK);
--	hdmi_writeb(hdmi, 0xff, HDMI_I2CM_INT);
--	hdmi_writeb(hdmi, 0xff, HDMI_I2CM_CTLINT);
--
--	/* Disable interrupts in the IH_MUTE_* registers */
--	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT0);
--	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT1);
--	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT2);
--	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AS_STAT0);
--	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_PHY_STAT0);
--	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CM_STAT0);
--	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_CEC_STAT0);
--	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_VP_STAT0);
--	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CMPHY_STAT0);
--	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AHBDMAAUD_STAT0);
--
--	/* Enable top level interrupt bits in HDMI block */
--	ih_mute &= ~(HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT |
--		    HDMI_IH_MUTE_MUTE_ALL_INTERRUPT);
--	hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE);
--}
--
--static void dw_hdmi_poweron(struct dw_hdmi *hdmi)
--{
--	hdmi->bridge_is_on = true;
--	dw_hdmi_setup(hdmi, &hdmi->previous_mode);
--}
--
--static void dw_hdmi_poweroff(struct dw_hdmi *hdmi)
--{
--	if (hdmi->phy.enabled) {
--		hdmi->phy.ops->disable(hdmi, hdmi->phy.data);
--		hdmi->phy.enabled = false;
--	}
--
--	hdmi->bridge_is_on = false;
--}
--
--static void dw_hdmi_update_power(struct dw_hdmi *hdmi)
--{
--	int force = hdmi->force;
--
--	if (hdmi->disabled) {
--		force = DRM_FORCE_OFF;
--	} else if (force == DRM_FORCE_UNSPECIFIED) {
--		if (hdmi->rxsense)
--			force = DRM_FORCE_ON;
--		else
--			force = DRM_FORCE_OFF;
--	}
--
--	if (force == DRM_FORCE_OFF) {
--		if (hdmi->bridge_is_on)
--			dw_hdmi_poweroff(hdmi);
--	} else {
--		if (!hdmi->bridge_is_on)
--			dw_hdmi_poweron(hdmi);
--	}
--}
--
--/*
-- * Adjust the detection of RXSENSE according to whether we have a forced
-- * connection mode enabled, or whether we have been disabled.  There is
-- * no point processing RXSENSE interrupts if we have a forced connection
-- * state, or DRM has us disabled.
-- *
-- * We also disable rxsense interrupts when we think we're disconnected
-- * to avoid floating TDMS signals giving false rxsense interrupts.
-- *
-- * Note: we still need to listen for HPD interrupts even when DRM has us
-- * disabled so that we can detect a connect event.
-- */
--static void dw_hdmi_update_phy_mask(struct dw_hdmi *hdmi)
--{
--	u8 old_mask = hdmi->phy_mask;
--
--	if (hdmi->force || hdmi->disabled || !hdmi->rxsense)
--		hdmi->phy_mask |= HDMI_PHY_RX_SENSE;
--	else
--		hdmi->phy_mask &= ~HDMI_PHY_RX_SENSE;
--
--	if (old_mask != hdmi->phy_mask)
--		hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
--}
--
--static enum drm_connector_status
--dw_hdmi_connector_detect(struct drm_connector *connector, bool force)
--{
--	struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
--					     connector);
--
--	mutex_lock(&hdmi->mutex);
--	hdmi->force = DRM_FORCE_UNSPECIFIED;
--	dw_hdmi_update_power(hdmi);
--	dw_hdmi_update_phy_mask(hdmi);
--	mutex_unlock(&hdmi->mutex);
--
--	return hdmi->phy.ops->read_hpd(hdmi, hdmi->phy.data);
--}
--
--static int dw_hdmi_connector_get_modes(struct drm_connector *connector)
--{
--	struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
--					     connector);
--	struct edid *edid;
--	int ret = 0;
--
--	if (!hdmi->ddc)
--		return 0;
--
--	edid = drm_get_edid(connector, hdmi->ddc);
--	if (edid) {
--		dev_dbg(hdmi->dev, "got edid: width[%d] x height[%d]\n",
--			edid->width_cm, edid->height_cm);
--
--		hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid);
--		hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
--		drm_mode_connector_update_edid_property(connector, edid);
--		ret = drm_add_edid_modes(connector, edid);
--		/* Store the ELD */
--		drm_edid_to_eld(connector, edid);
--		kfree(edid);
--	} else {
--		dev_dbg(hdmi->dev, "failed to get edid\n");
--	}
--
--	return ret;
--}
--
--static enum drm_mode_status
--dw_hdmi_connector_mode_valid(struct drm_connector *connector,
--			     struct drm_display_mode *mode)
--{
--	struct dw_hdmi *hdmi = container_of(connector,
--					   struct dw_hdmi, connector);
--	enum drm_mode_status mode_status = MODE_OK;
--
--	/* We don't support double-clocked modes */
--	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
--		return MODE_BAD;
--
--	if (hdmi->plat_data->mode_valid)
--		mode_status = hdmi->plat_data->mode_valid(connector, mode);
--
--	return mode_status;
--}
--
--static void dw_hdmi_connector_force(struct drm_connector *connector)
--{
--	struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
--					     connector);
--
--	mutex_lock(&hdmi->mutex);
--	hdmi->force = connector->force;
--	dw_hdmi_update_power(hdmi);
--	dw_hdmi_update_phy_mask(hdmi);
--	mutex_unlock(&hdmi->mutex);
--}
--
--static const struct drm_connector_funcs dw_hdmi_connector_funcs = {
--	.dpms = drm_atomic_helper_connector_dpms,
--	.fill_modes = drm_helper_probe_single_connector_modes,
--	.detect = dw_hdmi_connector_detect,
--	.destroy = drm_connector_cleanup,
--	.force = dw_hdmi_connector_force,
--	.reset = drm_atomic_helper_connector_reset,
--	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
--	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
--};
--
--static const struct drm_connector_helper_funcs dw_hdmi_connector_helper_funcs = {
--	.get_modes = dw_hdmi_connector_get_modes,
--	.mode_valid = dw_hdmi_connector_mode_valid,
--	.best_encoder = drm_atomic_helper_best_encoder,
--};
--
--static int dw_hdmi_bridge_attach(struct drm_bridge *bridge)
--{
--	struct dw_hdmi *hdmi = bridge->driver_private;
--	struct drm_encoder *encoder = bridge->encoder;
--	struct drm_connector *connector = &hdmi->connector;
--
--	connector->interlace_allowed = 1;
--	connector->polled = DRM_CONNECTOR_POLL_HPD;
--
--	drm_connector_helper_add(connector, &dw_hdmi_connector_helper_funcs);
--
--	drm_connector_init(bridge->dev, connector, &dw_hdmi_connector_funcs,
--			   DRM_MODE_CONNECTOR_HDMIA);
--
--	drm_mode_connector_attach_encoder(connector, encoder);
--
--	return 0;
--}
--
--static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge,
--				    struct drm_display_mode *orig_mode,
--				    struct drm_display_mode *mode)
--{
--	struct dw_hdmi *hdmi = bridge->driver_private;
--
--	mutex_lock(&hdmi->mutex);
--
--	/* Store the display mode for plugin/DKMS poweron events */
--	memcpy(&hdmi->previous_mode, mode, sizeof(hdmi->previous_mode));
--
--	mutex_unlock(&hdmi->mutex);
--}
--
--static void dw_hdmi_bridge_disable(struct drm_bridge *bridge)
--{
--	struct dw_hdmi *hdmi = bridge->driver_private;
--
--	mutex_lock(&hdmi->mutex);
--	hdmi->disabled = true;
--	dw_hdmi_update_power(hdmi);
--	dw_hdmi_update_phy_mask(hdmi);
--	mutex_unlock(&hdmi->mutex);
--}
--
--static void dw_hdmi_bridge_enable(struct drm_bridge *bridge)
--{
--	struct dw_hdmi *hdmi = bridge->driver_private;
--
--	mutex_lock(&hdmi->mutex);
--	hdmi->disabled = false;
--	dw_hdmi_update_power(hdmi);
--	dw_hdmi_update_phy_mask(hdmi);
--	mutex_unlock(&hdmi->mutex);
--}
--
--static const struct drm_bridge_funcs dw_hdmi_bridge_funcs = {
--	.attach = dw_hdmi_bridge_attach,
--	.enable = dw_hdmi_bridge_enable,
--	.disable = dw_hdmi_bridge_disable,
--	.mode_set = dw_hdmi_bridge_mode_set,
--};
--
--static irqreturn_t dw_hdmi_i2c_irq(struct dw_hdmi *hdmi)
--{
--	struct dw_hdmi_i2c *i2c = hdmi->i2c;
--	unsigned int stat;
--
--	stat = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
--	if (!stat)
--		return IRQ_NONE;
--
--	hdmi_writeb(hdmi, stat, HDMI_IH_I2CM_STAT0);
--
--	i2c->stat = stat;
--
--	complete(&i2c->cmp);
--
--	return IRQ_HANDLED;
--}
--
--static irqreturn_t dw_hdmi_hardirq(int irq, void *dev_id)
--{
--	struct dw_hdmi *hdmi = dev_id;
--	u8 intr_stat;
--	irqreturn_t ret = IRQ_NONE;
--
--	if (hdmi->i2c)
--		ret = dw_hdmi_i2c_irq(hdmi);
--
--	intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0);
--	if (intr_stat) {
--		hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0);
--		return IRQ_WAKE_THREAD;
--	}
--
--	return ret;
--}
--
--static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
--{
--	struct dw_hdmi *hdmi = dev_id;
--	u8 intr_stat, phy_int_pol, phy_pol_mask, phy_stat;
--
--	intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0);
--	phy_int_pol = hdmi_readb(hdmi, HDMI_PHY_POL0);
--	phy_stat = hdmi_readb(hdmi, HDMI_PHY_STAT0);
--
--	phy_pol_mask = 0;
--	if (intr_stat & HDMI_IH_PHY_STAT0_HPD)
--		phy_pol_mask |= HDMI_PHY_HPD;
--	if (intr_stat & HDMI_IH_PHY_STAT0_RX_SENSE0)
--		phy_pol_mask |= HDMI_PHY_RX_SENSE0;
--	if (intr_stat & HDMI_IH_PHY_STAT0_RX_SENSE1)
--		phy_pol_mask |= HDMI_PHY_RX_SENSE1;
--	if (intr_stat & HDMI_IH_PHY_STAT0_RX_SENSE2)
--		phy_pol_mask |= HDMI_PHY_RX_SENSE2;
--	if (intr_stat & HDMI_IH_PHY_STAT0_RX_SENSE3)
--		phy_pol_mask |= HDMI_PHY_RX_SENSE3;
--
--	if (phy_pol_mask)
--		hdmi_modb(hdmi, ~phy_int_pol, phy_pol_mask, HDMI_PHY_POL0);
--
--	/*
--	 * RX sense tells us whether the TDMS transmitters are detecting
--	 * load - in other words, there's something listening on the
--	 * other end of the link.  Use this to decide whether we should
--	 * power on the phy as HPD may be toggled by the sink to merely
--	 * ask the source to re-read the EDID.
--	 */
--	if (intr_stat &
--	    (HDMI_IH_PHY_STAT0_RX_SENSE | HDMI_IH_PHY_STAT0_HPD)) {
--		mutex_lock(&hdmi->mutex);
--		if (!hdmi->disabled && !hdmi->force) {
--			/*
--			 * If the RX sense status indicates we're disconnected,
--			 * clear the software rxsense status.
--			 */
--			if (!(phy_stat & HDMI_PHY_RX_SENSE))
--				hdmi->rxsense = false;
--
--			/*
--			 * Only set the software rxsense status when both
--			 * rxsense and hpd indicates we're connected.
--			 * This avoids what seems to be bad behaviour in
--			 * at least iMX6S versions of the phy.
--			 */
--			if (phy_stat & HDMI_PHY_HPD)
--				hdmi->rxsense = true;
--
--			dw_hdmi_update_power(hdmi);
--			dw_hdmi_update_phy_mask(hdmi);
--		}
--		mutex_unlock(&hdmi->mutex);
--	}
--
--	if (intr_stat & HDMI_IH_PHY_STAT0_HPD) {
--		dev_dbg(hdmi->dev, "EVENT=%s\n",
--			phy_int_pol & HDMI_PHY_HPD ? "plugin" : "plugout");
--		if (hdmi->bridge.dev)
--			drm_helper_hpd_irq_event(hdmi->bridge.dev);
--	}
--
--	hdmi_writeb(hdmi, intr_stat, HDMI_IH_PHY_STAT0);
--	hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE),
--		    HDMI_IH_MUTE_PHY_STAT0);
--
--	return IRQ_HANDLED;
--}
--
--static const struct dw_hdmi_phy_data dw_hdmi_phys[] = {
--	{
--		.type = DW_HDMI_PHY_DWC_HDMI_TX_PHY,
--		.name = "DWC HDMI TX PHY",
--		.gen = 1,
--	}, {
--		.type = DW_HDMI_PHY_DWC_MHL_PHY_HEAC,
--		.name = "DWC MHL PHY + HEAC PHY",
--		.gen = 2,
--		.has_svsret = true,
--		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
--	}, {
--		.type = DW_HDMI_PHY_DWC_MHL_PHY,
--		.name = "DWC MHL PHY",
--		.gen = 2,
--		.has_svsret = true,
--		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
--	}, {
--		.type = DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY_HEAC,
--		.name = "DWC HDMI 3D TX PHY + HEAC PHY",
--		.gen = 2,
--		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
--	}, {
--		.type = DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY,
--		.name = "DWC HDMI 3D TX PHY",
--		.gen = 2,
--		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
--	}, {
--		.type = DW_HDMI_PHY_DWC_HDMI20_TX_PHY,
--		.name = "DWC HDMI 2.0 TX PHY",
--		.gen = 2,
--		.has_svsret = true,
--	}, {
--		.type = DW_HDMI_PHY_VENDOR_PHY,
--		.name = "Vendor PHY",
--	}
--};
--
--static int dw_hdmi_detect_phy(struct dw_hdmi *hdmi)
--{
--	unsigned int i;
--	u8 phy_type;
--
--	phy_type = hdmi_readb(hdmi, HDMI_CONFIG2_ID);
--
--	if (phy_type == DW_HDMI_PHY_VENDOR_PHY) {
--		/* Vendor PHYs require support from the glue layer. */
--		if (!hdmi->plat_data->phy_ops || !hdmi->plat_data->phy_name) {
--			dev_err(hdmi->dev,
--				"Vendor HDMI PHY not supported by glue layer\n");
--			return -ENODEV;
--		}
--
--		hdmi->phy.ops = hdmi->plat_data->phy_ops;
--		hdmi->phy.data = hdmi->plat_data->phy_data;
--		hdmi->phy.name = hdmi->plat_data->phy_name;
--		return 0;
--	}
--
--	/* Synopsys PHYs are handled internally. */
--	for (i = 0; i < ARRAY_SIZE(dw_hdmi_phys); ++i) {
--		if (dw_hdmi_phys[i].type == phy_type) {
--			hdmi->phy.ops = &dw_hdmi_synopsys_phy_ops;
--			hdmi->phy.name = dw_hdmi_phys[i].name;
--			hdmi->phy.data = (void *)&dw_hdmi_phys[i];
--
--			if (!dw_hdmi_phys[i].configure &&
--			    !hdmi->plat_data->configure_phy) {
--				dev_err(hdmi->dev, "%s requires platform support\n",
--					hdmi->phy.name);
--				return -ENODEV;
--			}
--
--			return 0;
--		}
--	}
--
--	dev_err(hdmi->dev, "Unsupported HDMI PHY type (%02x)\n", phy_type);
--	return -ENODEV;
--}
--
--static const struct regmap_config hdmi_regmap_8bit_config = {
--	.reg_bits	= 32,
--	.val_bits	= 8,
--	.reg_stride	= 1,
--	.max_register	= HDMI_I2CM_FS_SCL_LCNT_0_ADDR,
--};
--
--static const struct regmap_config hdmi_regmap_32bit_config = {
--	.reg_bits	= 32,
--	.val_bits	= 32,
--	.reg_stride	= 4,
--	.max_register	= HDMI_I2CM_FS_SCL_LCNT_0_ADDR << 2,
--};
--
--static struct dw_hdmi *
--__dw_hdmi_probe(struct platform_device *pdev,
--		const struct dw_hdmi_plat_data *plat_data)
--{
--	struct device *dev = &pdev->dev;
--	struct device_node *np = dev->of_node;
--	struct platform_device_info pdevinfo;
--	struct device_node *ddc_node;
--	struct dw_hdmi *hdmi;
--	struct resource *iores = NULL;
--	int irq;
--	int ret;
--	u32 val = 1;
--	u8 prod_id0;
--	u8 prod_id1;
--	u8 config0;
--	u8 config3;
--
--	hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
--	if (!hdmi)
--		return ERR_PTR(-ENOMEM);
--
--	hdmi->plat_data = plat_data;
--	hdmi->dev = dev;
--	hdmi->sample_rate = 48000;
--	hdmi->disabled = true;
--	hdmi->rxsense = true;
--	hdmi->phy_mask = (u8)~(HDMI_PHY_HPD | HDMI_PHY_RX_SENSE);
--
--	mutex_init(&hdmi->mutex);
--	mutex_init(&hdmi->audio_mutex);
--	spin_lock_init(&hdmi->audio_lock);
--
--	ddc_node = of_parse_phandle(np, "ddc-i2c-bus", 0);
--	if (ddc_node) {
--		hdmi->ddc = of_get_i2c_adapter_by_node(ddc_node);
--		of_node_put(ddc_node);
--		if (!hdmi->ddc) {
--			dev_dbg(hdmi->dev, "failed to read ddc node\n");
--			return ERR_PTR(-EPROBE_DEFER);
--		}
--
--	} else {
--		dev_dbg(hdmi->dev, "no ddc property found\n");
--	}
--
--	if (!plat_data->regm) {
--		const struct regmap_config *reg_config;
--
--		of_property_read_u32(np, "reg-io-width", &val);
--		switch (val) {
--		case 4:
--			reg_config = &hdmi_regmap_32bit_config;
--			hdmi->reg_shift = 2;
--			break;
--		case 1:
--			reg_config = &hdmi_regmap_8bit_config;
--			break;
--		default:
--			dev_err(dev, "reg-io-width must be 1 or 4\n");
--			return ERR_PTR(-EINVAL);
--		}
--
--		iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--		hdmi->regs = devm_ioremap_resource(dev, iores);
--		if (IS_ERR(hdmi->regs)) {
--			ret = PTR_ERR(hdmi->regs);
--			goto err_res;
--		}
--
--		hdmi->regm = devm_regmap_init_mmio(dev, hdmi->regs, reg_config);
--		if (IS_ERR(hdmi->regm)) {
--			dev_err(dev, "Failed to configure regmap\n");
--			ret = PTR_ERR(hdmi->regm);
--			goto err_res;
--		}
--	} else {
--		hdmi->regm = plat_data->regm;
--	}
--
--	hdmi->isfr_clk = devm_clk_get(hdmi->dev, "isfr");
--	if (IS_ERR(hdmi->isfr_clk)) {
--		ret = PTR_ERR(hdmi->isfr_clk);
--		dev_err(hdmi->dev, "Unable to get HDMI isfr clk: %d\n", ret);
--		goto err_res;
--	}
--
--	ret = clk_prepare_enable(hdmi->isfr_clk);
--	if (ret) {
--		dev_err(hdmi->dev, "Cannot enable HDMI isfr clock: %d\n", ret);
--		goto err_res;
--	}
--
--	hdmi->iahb_clk = devm_clk_get(hdmi->dev, "iahb");
--	if (IS_ERR(hdmi->iahb_clk)) {
--		ret = PTR_ERR(hdmi->iahb_clk);
--		dev_err(hdmi->dev, "Unable to get HDMI iahb clk: %d\n", ret);
--		goto err_isfr;
--	}
--
--	ret = clk_prepare_enable(hdmi->iahb_clk);
--	if (ret) {
--		dev_err(hdmi->dev, "Cannot enable HDMI iahb clock: %d\n", ret);
--		goto err_isfr;
--	}
--
--	/* Product and revision IDs */
--	hdmi->version = (hdmi_readb(hdmi, HDMI_DESIGN_ID) << 8)
--		      | (hdmi_readb(hdmi, HDMI_REVISION_ID) << 0);
--	prod_id0 = hdmi_readb(hdmi, HDMI_PRODUCT_ID0);
--	prod_id1 = hdmi_readb(hdmi, HDMI_PRODUCT_ID1);
--
--	if (prod_id0 != HDMI_PRODUCT_ID0_HDMI_TX ||
--	    (prod_id1 & ~HDMI_PRODUCT_ID1_HDCP) != HDMI_PRODUCT_ID1_HDMI_TX) {
--		dev_err(dev, "Unsupported HDMI controller (%04x:%02x:%02x)\n",
--			hdmi->version, prod_id0, prod_id1);
--		ret = -ENODEV;
--		goto err_iahb;
--	}
--
--	ret = dw_hdmi_detect_phy(hdmi);
--	if (ret < 0)
--		goto err_iahb;
--
--	dev_info(dev, "Detected HDMI TX controller v%x.%03x %s HDCP (%s)\n",
--		 hdmi->version >> 12, hdmi->version & 0xfff,
--		 prod_id1 & HDMI_PRODUCT_ID1_HDCP ? "with" : "without",
--		 hdmi->phy.name);
--
--	initialize_hdmi_ih_mutes(hdmi);
--
--	irq = platform_get_irq(pdev, 0);
--	if (irq < 0) {
--		ret = irq;
--		goto err_iahb;
--	}
--
--	ret = devm_request_threaded_irq(dev, irq, dw_hdmi_hardirq,
--					dw_hdmi_irq, IRQF_SHARED,
--					dev_name(dev), hdmi);
--	if (ret)
--		goto err_iahb;
--
--	/*
--	 * To prevent overflows in HDMI_IH_FC_STAT2, set the clk regenerator
--	 * N and cts values before enabling phy
--	 */
--	hdmi_init_clk_regenerator(hdmi);
--
--	/* If DDC bus is not specified, try to register HDMI I2C bus */
--	if (!hdmi->ddc) {
--		hdmi->ddc = dw_hdmi_i2c_adapter(hdmi);
--		if (IS_ERR(hdmi->ddc))
--			hdmi->ddc = NULL;
--	}
--
--	/*
--	 * Configure registers related to HDMI interrupt
--	 * generation before registering IRQ.
--	 */
--	hdmi_writeb(hdmi, HDMI_PHY_HPD | HDMI_PHY_RX_SENSE, HDMI_PHY_POL0);
--
--	/* Clear Hotplug interrupts */
--	hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
--		    HDMI_IH_PHY_STAT0);
--
--	hdmi->bridge.driver_private = hdmi;
--	hdmi->bridge.funcs = &dw_hdmi_bridge_funcs;
--#ifdef CONFIG_OF
--	hdmi->bridge.of_node = pdev->dev.of_node;
--#endif
--
--	ret = dw_hdmi_fb_registered(hdmi);
--	if (ret)
--		goto err_iahb;
--
--	/* Unmute interrupts */
--	hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE),
--		    HDMI_IH_MUTE_PHY_STAT0);
--
--	memset(&pdevinfo, 0, sizeof(pdevinfo));
--	pdevinfo.parent = dev;
--	pdevinfo.id = PLATFORM_DEVID_AUTO;
--
--	config0 = hdmi_readb(hdmi, HDMI_CONFIG0_ID);
--	config3 = hdmi_readb(hdmi, HDMI_CONFIG3_ID);
--
--	if (iores && config3 & HDMI_CONFIG3_AHBAUDDMA) {
--		struct dw_hdmi_audio_data audio;
--
--		audio.phys = iores->start;
--		audio.base = hdmi->regs;
--		audio.irq = irq;
--		audio.hdmi = hdmi;
--		audio.eld = hdmi->connector.eld;
--
--		pdevinfo.name = "dw-hdmi-ahb-audio";
--		pdevinfo.data = &audio;
--		pdevinfo.size_data = sizeof(audio);
--		pdevinfo.dma_mask = DMA_BIT_MASK(32);
--		hdmi->audio = platform_device_register_full(&pdevinfo);
--	} else if (config0 & HDMI_CONFIG0_I2S) {
--		struct dw_hdmi_i2s_audio_data audio;
--
--		audio.hdmi	= hdmi;
--		audio.write	= hdmi_writeb;
--		audio.read	= hdmi_readb;
--
--		pdevinfo.name = "dw-hdmi-i2s-audio";
--		pdevinfo.data = &audio;
--		pdevinfo.size_data = sizeof(audio);
--		pdevinfo.dma_mask = DMA_BIT_MASK(32);
--		hdmi->audio = platform_device_register_full(&pdevinfo);
--	}
--
--	/* Reset HDMI DDC I2C master controller and mute I2CM interrupts */
--	if (hdmi->i2c)
--		dw_hdmi_i2c_init(hdmi);
--
--	platform_set_drvdata(pdev, hdmi);
--
--	return hdmi;
--
--err_iahb:
--	if (hdmi->i2c) {
--		i2c_del_adapter(&hdmi->i2c->adap);
--		hdmi->ddc = NULL;
--	}
--
--	clk_disable_unprepare(hdmi->iahb_clk);
--err_isfr:
--	clk_disable_unprepare(hdmi->isfr_clk);
--err_res:
--	i2c_put_adapter(hdmi->ddc);
--
--	return ERR_PTR(ret);
--}
--
--static void __dw_hdmi_remove(struct dw_hdmi *hdmi)
--{
--	if (hdmi->audio && !IS_ERR(hdmi->audio))
--		platform_device_unregister(hdmi->audio);
--
--	/* Disable all interrupts */
--	hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0);
--
--	clk_disable_unprepare(hdmi->iahb_clk);
--	clk_disable_unprepare(hdmi->isfr_clk);
--
--	if (hdmi->i2c)
--		i2c_del_adapter(&hdmi->i2c->adap);
--	else
--		i2c_put_adapter(hdmi->ddc);
--}
--
--/* -----------------------------------------------------------------------------
-- * Probe/remove API, used from platforms based on the DRM bridge API.
-- */
--int dw_hdmi_probe(struct platform_device *pdev,
--		  const struct dw_hdmi_plat_data *plat_data)
--{
--	struct dw_hdmi *hdmi;
--	int ret;
--
--	hdmi = __dw_hdmi_probe(pdev, plat_data);
--	if (IS_ERR(hdmi))
--		return PTR_ERR(hdmi);
--
--	ret = drm_bridge_add(&hdmi->bridge);
--	if (ret < 0) {
--		__dw_hdmi_remove(hdmi);
--		return ret;
--	}
--
--	return 0;
--}
--EXPORT_SYMBOL_GPL(dw_hdmi_probe);
--
--void dw_hdmi_remove(struct platform_device *pdev)
--{
--	struct dw_hdmi *hdmi = platform_get_drvdata(pdev);
--
--	drm_bridge_remove(&hdmi->bridge);
--
--	__dw_hdmi_remove(hdmi);
--}
--EXPORT_SYMBOL_GPL(dw_hdmi_remove);
--
--/* -----------------------------------------------------------------------------
-- * Bind/unbind API, used from platforms based on the component framework.
-- */
--int dw_hdmi_bind(struct platform_device *pdev, struct drm_encoder *encoder,
--		 const struct dw_hdmi_plat_data *plat_data)
--{
--	struct dw_hdmi *hdmi;
--	int ret;
--
--	hdmi = __dw_hdmi_probe(pdev, plat_data);
--	if (IS_ERR(hdmi))
--		return PTR_ERR(hdmi);
--
--	ret = drm_bridge_attach(encoder, &hdmi->bridge, NULL);
--	if (ret) {
--		dw_hdmi_remove(pdev);
--		DRM_ERROR("Failed to initialize bridge with drm\n");
--		return ret;
--	}
--
--	return 0;
--}
--EXPORT_SYMBOL_GPL(dw_hdmi_bind);
--
--void dw_hdmi_unbind(struct device *dev)
--{
--	struct dw_hdmi *hdmi = dev_get_drvdata(dev);
--
--	__dw_hdmi_remove(hdmi);
--}
--EXPORT_SYMBOL_GPL(dw_hdmi_unbind);
--
--MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
--MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
--MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
--MODULE_AUTHOR("Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>");
--MODULE_DESCRIPTION("DW HDMI transmitter driver");
--MODULE_LICENSE("GPL");
--MODULE_ALIAS("platform:dw-hdmi");
---- a/drivers/gpu/drm/bridge/dw-hdmi.h
-+++ /dev/null
-@@ -1,1153 +0,0 @@
--/*
-- * Copyright (C) 2011 Freescale Semiconductor, Inc.
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; either version 2 of the License, or
-- * (at your option) any later version.
-- */
--
--#ifndef __DW_HDMI_H__
--#define __DW_HDMI_H__
--
--/* Identification Registers */
--#define HDMI_DESIGN_ID                          0x0000
--#define HDMI_REVISION_ID                        0x0001
--#define HDMI_PRODUCT_ID0                        0x0002
--#define HDMI_PRODUCT_ID1                        0x0003
--#define HDMI_CONFIG0_ID                         0x0004
--#define HDMI_CONFIG1_ID                         0x0005
--#define HDMI_CONFIG2_ID                         0x0006
--#define HDMI_CONFIG3_ID                         0x0007
--
--/* Interrupt Registers */
--#define HDMI_IH_FC_STAT0                        0x0100
--#define HDMI_IH_FC_STAT1                        0x0101
--#define HDMI_IH_FC_STAT2                        0x0102
--#define HDMI_IH_AS_STAT0                        0x0103
--#define HDMI_IH_PHY_STAT0                       0x0104
--#define HDMI_IH_I2CM_STAT0                      0x0105
--#define HDMI_IH_CEC_STAT0                       0x0106
--#define HDMI_IH_VP_STAT0                        0x0107
--#define HDMI_IH_I2CMPHY_STAT0                   0x0108
--#define HDMI_IH_AHBDMAAUD_STAT0                 0x0109
--
--#define HDMI_IH_MUTE_FC_STAT0                   0x0180
--#define HDMI_IH_MUTE_FC_STAT1                   0x0181
--#define HDMI_IH_MUTE_FC_STAT2                   0x0182
--#define HDMI_IH_MUTE_AS_STAT0                   0x0183
--#define HDMI_IH_MUTE_PHY_STAT0                  0x0184
--#define HDMI_IH_MUTE_I2CM_STAT0                 0x0185
--#define HDMI_IH_MUTE_CEC_STAT0                  0x0186
--#define HDMI_IH_MUTE_VP_STAT0                   0x0187
--#define HDMI_IH_MUTE_I2CMPHY_STAT0              0x0188
--#define HDMI_IH_MUTE_AHBDMAAUD_STAT0            0x0189
--#define HDMI_IH_MUTE                            0x01FF
--
--/* Video Sample Registers */
--#define HDMI_TX_INVID0                          0x0200
--#define HDMI_TX_INSTUFFING                      0x0201
--#define HDMI_TX_GYDATA0                         0x0202
--#define HDMI_TX_GYDATA1                         0x0203
--#define HDMI_TX_RCRDATA0                        0x0204
--#define HDMI_TX_RCRDATA1                        0x0205
--#define HDMI_TX_BCBDATA0                        0x0206
--#define HDMI_TX_BCBDATA1                        0x0207
--
--/* Video Packetizer Registers */
--#define HDMI_VP_STATUS                          0x0800
--#define HDMI_VP_PR_CD                           0x0801
--#define HDMI_VP_STUFF                           0x0802
--#define HDMI_VP_REMAP                           0x0803
--#define HDMI_VP_CONF                            0x0804
--#define HDMI_VP_STAT                            0x0805
--#define HDMI_VP_INT                             0x0806
--#define HDMI_VP_MASK                            0x0807
--#define HDMI_VP_POL                             0x0808
--
--/* Frame Composer Registers */
--#define HDMI_FC_INVIDCONF                       0x1000
--#define HDMI_FC_INHACTV0                        0x1001
--#define HDMI_FC_INHACTV1                        0x1002
--#define HDMI_FC_INHBLANK0                       0x1003
--#define HDMI_FC_INHBLANK1                       0x1004
--#define HDMI_FC_INVACTV0                        0x1005
--#define HDMI_FC_INVACTV1                        0x1006
--#define HDMI_FC_INVBLANK                        0x1007
--#define HDMI_FC_HSYNCINDELAY0                   0x1008
--#define HDMI_FC_HSYNCINDELAY1                   0x1009
--#define HDMI_FC_HSYNCINWIDTH0                   0x100A
--#define HDMI_FC_HSYNCINWIDTH1                   0x100B
--#define HDMI_FC_VSYNCINDELAY                    0x100C
--#define HDMI_FC_VSYNCINWIDTH                    0x100D
--#define HDMI_FC_INFREQ0                         0x100E
--#define HDMI_FC_INFREQ1                         0x100F
--#define HDMI_FC_INFREQ2                         0x1010
--#define HDMI_FC_CTRLDUR                         0x1011
--#define HDMI_FC_EXCTRLDUR                       0x1012
--#define HDMI_FC_EXCTRLSPAC                      0x1013
--#define HDMI_FC_CH0PREAM                        0x1014
--#define HDMI_FC_CH1PREAM                        0x1015
--#define HDMI_FC_CH2PREAM                        0x1016
--#define HDMI_FC_AVICONF3                        0x1017
--#define HDMI_FC_GCP                             0x1018
--#define HDMI_FC_AVICONF0                        0x1019
--#define HDMI_FC_AVICONF1                        0x101A
--#define HDMI_FC_AVICONF2                        0x101B
--#define HDMI_FC_AVIVID                          0x101C
--#define HDMI_FC_AVIETB0                         0x101D
--#define HDMI_FC_AVIETB1                         0x101E
--#define HDMI_FC_AVISBB0                         0x101F
--#define HDMI_FC_AVISBB1                         0x1020
--#define HDMI_FC_AVIELB0                         0x1021
--#define HDMI_FC_AVIELB1                         0x1022
--#define HDMI_FC_AVISRB0                         0x1023
--#define HDMI_FC_AVISRB1                         0x1024
--#define HDMI_FC_AUDICONF0                       0x1025
--#define HDMI_FC_AUDICONF1                       0x1026
--#define HDMI_FC_AUDICONF2                       0x1027
--#define HDMI_FC_AUDICONF3                       0x1028
--#define HDMI_FC_VSDIEEEID0                      0x1029
--#define HDMI_FC_VSDSIZE                         0x102A
--#define HDMI_FC_VSDIEEEID1                      0x1030
--#define HDMI_FC_VSDIEEEID2                      0x1031
--#define HDMI_FC_VSDPAYLOAD0                     0x1032
--#define HDMI_FC_VSDPAYLOAD1                     0x1033
--#define HDMI_FC_VSDPAYLOAD2                     0x1034
--#define HDMI_FC_VSDPAYLOAD3                     0x1035
--#define HDMI_FC_VSDPAYLOAD4                     0x1036
--#define HDMI_FC_VSDPAYLOAD5                     0x1037
--#define HDMI_FC_VSDPAYLOAD6                     0x1038
--#define HDMI_FC_VSDPAYLOAD7                     0x1039
--#define HDMI_FC_VSDPAYLOAD8                     0x103A
--#define HDMI_FC_VSDPAYLOAD9                     0x103B
--#define HDMI_FC_VSDPAYLOAD10                    0x103C
--#define HDMI_FC_VSDPAYLOAD11                    0x103D
--#define HDMI_FC_VSDPAYLOAD12                    0x103E
--#define HDMI_FC_VSDPAYLOAD13                    0x103F
--#define HDMI_FC_VSDPAYLOAD14                    0x1040
--#define HDMI_FC_VSDPAYLOAD15                    0x1041
--#define HDMI_FC_VSDPAYLOAD16                    0x1042
--#define HDMI_FC_VSDPAYLOAD17                    0x1043
--#define HDMI_FC_VSDPAYLOAD18                    0x1044
--#define HDMI_FC_VSDPAYLOAD19                    0x1045
--#define HDMI_FC_VSDPAYLOAD20                    0x1046
--#define HDMI_FC_VSDPAYLOAD21                    0x1047
--#define HDMI_FC_VSDPAYLOAD22                    0x1048
--#define HDMI_FC_VSDPAYLOAD23                    0x1049
--#define HDMI_FC_SPDVENDORNAME0                  0x104A
--#define HDMI_FC_SPDVENDORNAME1                  0x104B
--#define HDMI_FC_SPDVENDORNAME2                  0x104C
--#define HDMI_FC_SPDVENDORNAME3                  0x104D
--#define HDMI_FC_SPDVENDORNAME4                  0x104E
--#define HDMI_FC_SPDVENDORNAME5                  0x104F
--#define HDMI_FC_SPDVENDORNAME6                  0x1050
--#define HDMI_FC_SPDVENDORNAME7                  0x1051
--#define HDMI_FC_SDPPRODUCTNAME0                 0x1052
--#define HDMI_FC_SDPPRODUCTNAME1                 0x1053
--#define HDMI_FC_SDPPRODUCTNAME2                 0x1054
--#define HDMI_FC_SDPPRODUCTNAME3                 0x1055
--#define HDMI_FC_SDPPRODUCTNAME4                 0x1056
--#define HDMI_FC_SDPPRODUCTNAME5                 0x1057
--#define HDMI_FC_SDPPRODUCTNAME6                 0x1058
--#define HDMI_FC_SDPPRODUCTNAME7                 0x1059
--#define HDMI_FC_SDPPRODUCTNAME8                 0x105A
--#define HDMI_FC_SDPPRODUCTNAME9                 0x105B
--#define HDMI_FC_SDPPRODUCTNAME10                0x105C
--#define HDMI_FC_SDPPRODUCTNAME11                0x105D
--#define HDMI_FC_SDPPRODUCTNAME12                0x105E
--#define HDMI_FC_SDPPRODUCTNAME13                0x105F
--#define HDMI_FC_SDPPRODUCTNAME14                0x1060
--#define HDMI_FC_SPDPRODUCTNAME15                0x1061
--#define HDMI_FC_SPDDEVICEINF                    0x1062
--#define HDMI_FC_AUDSCONF                        0x1063
--#define HDMI_FC_AUDSSTAT                        0x1064
--#define HDMI_FC_DATACH0FILL                     0x1070
--#define HDMI_FC_DATACH1FILL                     0x1071
--#define HDMI_FC_DATACH2FILL                     0x1072
--#define HDMI_FC_CTRLQHIGH                       0x1073
--#define HDMI_FC_CTRLQLOW                        0x1074
--#define HDMI_FC_ACP0                            0x1075
--#define HDMI_FC_ACP28                           0x1076
--#define HDMI_FC_ACP27                           0x1077
--#define HDMI_FC_ACP26                           0x1078
--#define HDMI_FC_ACP25                           0x1079
--#define HDMI_FC_ACP24                           0x107A
--#define HDMI_FC_ACP23                           0x107B
--#define HDMI_FC_ACP22                           0x107C
--#define HDMI_FC_ACP21                           0x107D
--#define HDMI_FC_ACP20                           0x107E
--#define HDMI_FC_ACP19                           0x107F
--#define HDMI_FC_ACP18                           0x1080
--#define HDMI_FC_ACP17                           0x1081
--#define HDMI_FC_ACP16                           0x1082
--#define HDMI_FC_ACP15                           0x1083
--#define HDMI_FC_ACP14                           0x1084
--#define HDMI_FC_ACP13                           0x1085
--#define HDMI_FC_ACP12                           0x1086
--#define HDMI_FC_ACP11                           0x1087
--#define HDMI_FC_ACP10                           0x1088
--#define HDMI_FC_ACP9                            0x1089
--#define HDMI_FC_ACP8                            0x108A
--#define HDMI_FC_ACP7                            0x108B
--#define HDMI_FC_ACP6                            0x108C
--#define HDMI_FC_ACP5                            0x108D
--#define HDMI_FC_ACP4                            0x108E
--#define HDMI_FC_ACP3                            0x108F
--#define HDMI_FC_ACP2                            0x1090
--#define HDMI_FC_ACP1                            0x1091
--#define HDMI_FC_ISCR1_0                         0x1092
--#define HDMI_FC_ISCR1_16                        0x1093
--#define HDMI_FC_ISCR1_15                        0x1094
--#define HDMI_FC_ISCR1_14                        0x1095
--#define HDMI_FC_ISCR1_13                        0x1096
--#define HDMI_FC_ISCR1_12                        0x1097
--#define HDMI_FC_ISCR1_11                        0x1098
--#define HDMI_FC_ISCR1_10                        0x1099
--#define HDMI_FC_ISCR1_9                         0x109A
--#define HDMI_FC_ISCR1_8                         0x109B
--#define HDMI_FC_ISCR1_7                         0x109C
--#define HDMI_FC_ISCR1_6                         0x109D
--#define HDMI_FC_ISCR1_5                         0x109E
--#define HDMI_FC_ISCR1_4                         0x109F
--#define HDMI_FC_ISCR1_3                         0x10A0
--#define HDMI_FC_ISCR1_2                         0x10A1
--#define HDMI_FC_ISCR1_1                         0x10A2
--#define HDMI_FC_ISCR2_15                        0x10A3
--#define HDMI_FC_ISCR2_14                        0x10A4
--#define HDMI_FC_ISCR2_13                        0x10A5
--#define HDMI_FC_ISCR2_12                        0x10A6
--#define HDMI_FC_ISCR2_11                        0x10A7
--#define HDMI_FC_ISCR2_10                        0x10A8
--#define HDMI_FC_ISCR2_9                         0x10A9
--#define HDMI_FC_ISCR2_8                         0x10AA
--#define HDMI_FC_ISCR2_7                         0x10AB
--#define HDMI_FC_ISCR2_6                         0x10AC
--#define HDMI_FC_ISCR2_5                         0x10AD
--#define HDMI_FC_ISCR2_4                         0x10AE
--#define HDMI_FC_ISCR2_3                         0x10AF
--#define HDMI_FC_ISCR2_2                         0x10B0
--#define HDMI_FC_ISCR2_1                         0x10B1
--#define HDMI_FC_ISCR2_0                         0x10B2
--#define HDMI_FC_DATAUTO0                        0x10B3
--#define HDMI_FC_DATAUTO1                        0x10B4
--#define HDMI_FC_DATAUTO2                        0x10B5
--#define HDMI_FC_DATMAN                          0x10B6
--#define HDMI_FC_DATAUTO3                        0x10B7
--#define HDMI_FC_RDRB0                           0x10B8
--#define HDMI_FC_RDRB1                           0x10B9
--#define HDMI_FC_RDRB2                           0x10BA
--#define HDMI_FC_RDRB3                           0x10BB
--#define HDMI_FC_RDRB4                           0x10BC
--#define HDMI_FC_RDRB5                           0x10BD
--#define HDMI_FC_RDRB6                           0x10BE
--#define HDMI_FC_RDRB7                           0x10BF
--#define HDMI_FC_STAT0                           0x10D0
--#define HDMI_FC_INT0                            0x10D1
--#define HDMI_FC_MASK0                           0x10D2
--#define HDMI_FC_POL0                            0x10D3
--#define HDMI_FC_STAT1                           0x10D4
--#define HDMI_FC_INT1                            0x10D5
--#define HDMI_FC_MASK1                           0x10D6
--#define HDMI_FC_POL1                            0x10D7
--#define HDMI_FC_STAT2                           0x10D8
--#define HDMI_FC_INT2                            0x10D9
--#define HDMI_FC_MASK2                           0x10DA
--#define HDMI_FC_POL2                            0x10DB
--#define HDMI_FC_PRCONF                          0x10E0
--
--#define HDMI_FC_GMD_STAT                        0x1100
--#define HDMI_FC_GMD_EN                          0x1101
--#define HDMI_FC_GMD_UP                          0x1102
--#define HDMI_FC_GMD_CONF                        0x1103
--#define HDMI_FC_GMD_HB                          0x1104
--#define HDMI_FC_GMD_PB0                         0x1105
--#define HDMI_FC_GMD_PB1                         0x1106
--#define HDMI_FC_GMD_PB2                         0x1107
--#define HDMI_FC_GMD_PB3                         0x1108
--#define HDMI_FC_GMD_PB4                         0x1109
--#define HDMI_FC_GMD_PB5                         0x110A
--#define HDMI_FC_GMD_PB6                         0x110B
--#define HDMI_FC_GMD_PB7                         0x110C
--#define HDMI_FC_GMD_PB8                         0x110D
--#define HDMI_FC_GMD_PB9                         0x110E
--#define HDMI_FC_GMD_PB10                        0x110F
--#define HDMI_FC_GMD_PB11                        0x1110
--#define HDMI_FC_GMD_PB12                        0x1111
--#define HDMI_FC_GMD_PB13                        0x1112
--#define HDMI_FC_GMD_PB14                        0x1113
--#define HDMI_FC_GMD_PB15                        0x1114
--#define HDMI_FC_GMD_PB16                        0x1115
--#define HDMI_FC_GMD_PB17                        0x1116
--#define HDMI_FC_GMD_PB18                        0x1117
--#define HDMI_FC_GMD_PB19                        0x1118
--#define HDMI_FC_GMD_PB20                        0x1119
--#define HDMI_FC_GMD_PB21                        0x111A
--#define HDMI_FC_GMD_PB22                        0x111B
--#define HDMI_FC_GMD_PB23                        0x111C
--#define HDMI_FC_GMD_PB24                        0x111D
--#define HDMI_FC_GMD_PB25                        0x111E
--#define HDMI_FC_GMD_PB26                        0x111F
--#define HDMI_FC_GMD_PB27                        0x1120
--
--#define HDMI_FC_DBGFORCE                        0x1200
--#define HDMI_FC_DBGAUD0CH0                      0x1201
--#define HDMI_FC_DBGAUD1CH0                      0x1202
--#define HDMI_FC_DBGAUD2CH0                      0x1203
--#define HDMI_FC_DBGAUD0CH1                      0x1204
--#define HDMI_FC_DBGAUD1CH1                      0x1205
--#define HDMI_FC_DBGAUD2CH1                      0x1206
--#define HDMI_FC_DBGAUD0CH2                      0x1207
--#define HDMI_FC_DBGAUD1CH2                      0x1208
--#define HDMI_FC_DBGAUD2CH2                      0x1209
--#define HDMI_FC_DBGAUD0CH3                      0x120A
--#define HDMI_FC_DBGAUD1CH3                      0x120B
--#define HDMI_FC_DBGAUD2CH3                      0x120C
--#define HDMI_FC_DBGAUD0CH4                      0x120D
--#define HDMI_FC_DBGAUD1CH4                      0x120E
--#define HDMI_FC_DBGAUD2CH4                      0x120F
--#define HDMI_FC_DBGAUD0CH5                      0x1210
--#define HDMI_FC_DBGAUD1CH5                      0x1211
--#define HDMI_FC_DBGAUD2CH5                      0x1212
--#define HDMI_FC_DBGAUD0CH6                      0x1213
--#define HDMI_FC_DBGAUD1CH6                      0x1214
--#define HDMI_FC_DBGAUD2CH6                      0x1215
--#define HDMI_FC_DBGAUD0CH7                      0x1216
--#define HDMI_FC_DBGAUD1CH7                      0x1217
--#define HDMI_FC_DBGAUD2CH7                      0x1218
--#define HDMI_FC_DBGTMDS0                        0x1219
--#define HDMI_FC_DBGTMDS1                        0x121A
--#define HDMI_FC_DBGTMDS2                        0x121B
--
--/* HDMI Source PHY Registers */
--#define HDMI_PHY_CONF0                          0x3000
--#define HDMI_PHY_TST0                           0x3001
--#define HDMI_PHY_TST1                           0x3002
--#define HDMI_PHY_TST2                           0x3003
--#define HDMI_PHY_STAT0                          0x3004
--#define HDMI_PHY_INT0                           0x3005
--#define HDMI_PHY_MASK0                          0x3006
--#define HDMI_PHY_POL0                           0x3007
--
--/* HDMI Master PHY Registers */
--#define HDMI_PHY_I2CM_SLAVE_ADDR                0x3020
--#define HDMI_PHY_I2CM_ADDRESS_ADDR              0x3021
--#define HDMI_PHY_I2CM_DATAO_1_ADDR              0x3022
--#define HDMI_PHY_I2CM_DATAO_0_ADDR              0x3023
--#define HDMI_PHY_I2CM_DATAI_1_ADDR              0x3024
--#define HDMI_PHY_I2CM_DATAI_0_ADDR              0x3025
--#define HDMI_PHY_I2CM_OPERATION_ADDR            0x3026
--#define HDMI_PHY_I2CM_INT_ADDR                  0x3027
--#define HDMI_PHY_I2CM_CTLINT_ADDR               0x3028
--#define HDMI_PHY_I2CM_DIV_ADDR                  0x3029
--#define HDMI_PHY_I2CM_SOFTRSTZ_ADDR             0x302a
--#define HDMI_PHY_I2CM_SS_SCL_HCNT_1_ADDR        0x302b
--#define HDMI_PHY_I2CM_SS_SCL_HCNT_0_ADDR        0x302c
--#define HDMI_PHY_I2CM_SS_SCL_LCNT_1_ADDR        0x302d
--#define HDMI_PHY_I2CM_SS_SCL_LCNT_0_ADDR        0x302e
--#define HDMI_PHY_I2CM_FS_SCL_HCNT_1_ADDR        0x302f
--#define HDMI_PHY_I2CM_FS_SCL_HCNT_0_ADDR        0x3030
--#define HDMI_PHY_I2CM_FS_SCL_LCNT_1_ADDR        0x3031
--#define HDMI_PHY_I2CM_FS_SCL_LCNT_0_ADDR        0x3032
--
--/* Audio Sampler Registers */
--#define HDMI_AUD_CONF0                          0x3100
--#define HDMI_AUD_CONF1                          0x3101
--#define HDMI_AUD_INT                            0x3102
--#define HDMI_AUD_CONF2                          0x3103
--#define HDMI_AUD_N1                             0x3200
--#define HDMI_AUD_N2                             0x3201
--#define HDMI_AUD_N3                             0x3202
--#define HDMI_AUD_CTS1                           0x3203
--#define HDMI_AUD_CTS2                           0x3204
--#define HDMI_AUD_CTS3                           0x3205
--#define HDMI_AUD_INPUTCLKFS                     0x3206
--#define HDMI_AUD_SPDIFINT			0x3302
--#define HDMI_AUD_CONF0_HBR                      0x3400
--#define HDMI_AUD_HBR_STATUS                     0x3401
--#define HDMI_AUD_HBR_INT                        0x3402
--#define HDMI_AUD_HBR_POL                        0x3403
--#define HDMI_AUD_HBR_MASK                       0x3404
--
--/*
-- * Generic Parallel Audio Interface Registers
-- * Not used as GPAUD interface is not enabled in hw
-- */
--#define HDMI_GP_CONF0                           0x3500
--#define HDMI_GP_CONF1                           0x3501
--#define HDMI_GP_CONF2                           0x3502
--#define HDMI_GP_STAT                            0x3503
--#define HDMI_GP_INT                             0x3504
--#define HDMI_GP_MASK                            0x3505
--#define HDMI_GP_POL                             0x3506
--
--/* Audio DMA Registers */
--#define HDMI_AHB_DMA_CONF0                      0x3600
--#define HDMI_AHB_DMA_START                      0x3601
--#define HDMI_AHB_DMA_STOP                       0x3602
--#define HDMI_AHB_DMA_THRSLD                     0x3603
--#define HDMI_AHB_DMA_STRADDR0                   0x3604
--#define HDMI_AHB_DMA_STRADDR1                   0x3605
--#define HDMI_AHB_DMA_STRADDR2                   0x3606
--#define HDMI_AHB_DMA_STRADDR3                   0x3607
--#define HDMI_AHB_DMA_STPADDR0                   0x3608
--#define HDMI_AHB_DMA_STPADDR1                   0x3609
--#define HDMI_AHB_DMA_STPADDR2                   0x360a
--#define HDMI_AHB_DMA_STPADDR3                   0x360b
--#define HDMI_AHB_DMA_BSTADDR0                   0x360c
--#define HDMI_AHB_DMA_BSTADDR1                   0x360d
--#define HDMI_AHB_DMA_BSTADDR2                   0x360e
--#define HDMI_AHB_DMA_BSTADDR3                   0x360f
--#define HDMI_AHB_DMA_MBLENGTH0                  0x3610
--#define HDMI_AHB_DMA_MBLENGTH1                  0x3611
--#define HDMI_AHB_DMA_STAT                       0x3612
--#define HDMI_AHB_DMA_INT                        0x3613
--#define HDMI_AHB_DMA_MASK                       0x3614
--#define HDMI_AHB_DMA_POL                        0x3615
--#define HDMI_AHB_DMA_CONF1                      0x3616
--#define HDMI_AHB_DMA_BUFFSTAT                   0x3617
--#define HDMI_AHB_DMA_BUFFINT                    0x3618
--#define HDMI_AHB_DMA_BUFFMASK                   0x3619
--#define HDMI_AHB_DMA_BUFFPOL                    0x361a
--
--/* Main Controller Registers */
--#define HDMI_MC_SFRDIV                          0x4000
--#define HDMI_MC_CLKDIS                          0x4001
--#define HDMI_MC_SWRSTZ                          0x4002
--#define HDMI_MC_OPCTRL                          0x4003
--#define HDMI_MC_FLOWCTRL                        0x4004
--#define HDMI_MC_PHYRSTZ                         0x4005
--#define HDMI_MC_LOCKONCLOCK                     0x4006
--#define HDMI_MC_HEACPHY_RST                     0x4007
--
--/* Color Space  Converter Registers */
--#define HDMI_CSC_CFG                            0x4100
--#define HDMI_CSC_SCALE                          0x4101
--#define HDMI_CSC_COEF_A1_MSB                    0x4102
--#define HDMI_CSC_COEF_A1_LSB                    0x4103
--#define HDMI_CSC_COEF_A2_MSB                    0x4104
--#define HDMI_CSC_COEF_A2_LSB                    0x4105
--#define HDMI_CSC_COEF_A3_MSB                    0x4106
--#define HDMI_CSC_COEF_A3_LSB                    0x4107
--#define HDMI_CSC_COEF_A4_MSB                    0x4108
--#define HDMI_CSC_COEF_A4_LSB                    0x4109
--#define HDMI_CSC_COEF_B1_MSB                    0x410A
--#define HDMI_CSC_COEF_B1_LSB                    0x410B
--#define HDMI_CSC_COEF_B2_MSB                    0x410C
--#define HDMI_CSC_COEF_B2_LSB                    0x410D
--#define HDMI_CSC_COEF_B3_MSB                    0x410E
--#define HDMI_CSC_COEF_B3_LSB                    0x410F
--#define HDMI_CSC_COEF_B4_MSB                    0x4110
--#define HDMI_CSC_COEF_B4_LSB                    0x4111
--#define HDMI_CSC_COEF_C1_MSB                    0x4112
--#define HDMI_CSC_COEF_C1_LSB                    0x4113
--#define HDMI_CSC_COEF_C2_MSB                    0x4114
--#define HDMI_CSC_COEF_C2_LSB                    0x4115
--#define HDMI_CSC_COEF_C3_MSB                    0x4116
--#define HDMI_CSC_COEF_C3_LSB                    0x4117
--#define HDMI_CSC_COEF_C4_MSB                    0x4118
--#define HDMI_CSC_COEF_C4_LSB                    0x4119
--
--/* HDCP Encryption Engine Registers */
--#define HDMI_A_HDCPCFG0                         0x5000
--#define HDMI_A_HDCPCFG1                         0x5001
--#define HDMI_A_HDCPOBS0                         0x5002
--#define HDMI_A_HDCPOBS1                         0x5003
--#define HDMI_A_HDCPOBS2                         0x5004
--#define HDMI_A_HDCPOBS3                         0x5005
--#define HDMI_A_APIINTCLR                        0x5006
--#define HDMI_A_APIINTSTAT                       0x5007
--#define HDMI_A_APIINTMSK                        0x5008
--#define HDMI_A_VIDPOLCFG                        0x5009
--#define HDMI_A_OESSWCFG                         0x500A
--#define HDMI_A_TIMER1SETUP0                     0x500B
--#define HDMI_A_TIMER1SETUP1                     0x500C
--#define HDMI_A_TIMER2SETUP0                     0x500D
--#define HDMI_A_TIMER2SETUP1                     0x500E
--#define HDMI_A_100MSCFG                         0x500F
--#define HDMI_A_2SCFG0                           0x5010
--#define HDMI_A_2SCFG1                           0x5011
--#define HDMI_A_5SCFG0                           0x5012
--#define HDMI_A_5SCFG1                           0x5013
--#define HDMI_A_SRMVERLSB                        0x5014
--#define HDMI_A_SRMVERMSB                        0x5015
--#define HDMI_A_SRMCTRL                          0x5016
--#define HDMI_A_SFRSETUP                         0x5017
--#define HDMI_A_I2CHSETUP                        0x5018
--#define HDMI_A_INTSETUP                         0x5019
--#define HDMI_A_PRESETUP                         0x501A
--#define HDMI_A_SRM_BASE                         0x5020
--
--/* CEC Engine Registers */
--#define HDMI_CEC_CTRL                           0x7D00
--#define HDMI_CEC_STAT                           0x7D01
--#define HDMI_CEC_MASK                           0x7D02
--#define HDMI_CEC_POLARITY                       0x7D03
--#define HDMI_CEC_INT                            0x7D04
--#define HDMI_CEC_ADDR_L                         0x7D05
--#define HDMI_CEC_ADDR_H                         0x7D06
--#define HDMI_CEC_TX_CNT                         0x7D07
--#define HDMI_CEC_RX_CNT                         0x7D08
--#define HDMI_CEC_TX_DATA0                       0x7D10
--#define HDMI_CEC_TX_DATA1                       0x7D11
--#define HDMI_CEC_TX_DATA2                       0x7D12
--#define HDMI_CEC_TX_DATA3                       0x7D13
--#define HDMI_CEC_TX_DATA4                       0x7D14
--#define HDMI_CEC_TX_DATA5                       0x7D15
--#define HDMI_CEC_TX_DATA6                       0x7D16
--#define HDMI_CEC_TX_DATA7                       0x7D17
--#define HDMI_CEC_TX_DATA8                       0x7D18
--#define HDMI_CEC_TX_DATA9                       0x7D19
--#define HDMI_CEC_TX_DATA10                      0x7D1a
--#define HDMI_CEC_TX_DATA11                      0x7D1b
--#define HDMI_CEC_TX_DATA12                      0x7D1c
--#define HDMI_CEC_TX_DATA13                      0x7D1d
--#define HDMI_CEC_TX_DATA14                      0x7D1e
--#define HDMI_CEC_TX_DATA15                      0x7D1f
--#define HDMI_CEC_RX_DATA0                       0x7D20
--#define HDMI_CEC_RX_DATA1                       0x7D21
--#define HDMI_CEC_RX_DATA2                       0x7D22
--#define HDMI_CEC_RX_DATA3                       0x7D23
--#define HDMI_CEC_RX_DATA4                       0x7D24
--#define HDMI_CEC_RX_DATA5                       0x7D25
--#define HDMI_CEC_RX_DATA6                       0x7D26
--#define HDMI_CEC_RX_DATA7                       0x7D27
--#define HDMI_CEC_RX_DATA8                       0x7D28
--#define HDMI_CEC_RX_DATA9                       0x7D29
--#define HDMI_CEC_RX_DATA10                      0x7D2a
--#define HDMI_CEC_RX_DATA11                      0x7D2b
--#define HDMI_CEC_RX_DATA12                      0x7D2c
--#define HDMI_CEC_RX_DATA13                      0x7D2d
--#define HDMI_CEC_RX_DATA14                      0x7D2e
--#define HDMI_CEC_RX_DATA15                      0x7D2f
--#define HDMI_CEC_LOCK                           0x7D30
--#define HDMI_CEC_WKUPCTRL                       0x7D31
--
--/* I2C Master Registers (E-DDC) */
--#define HDMI_I2CM_SLAVE                         0x7E00
--#define HDMI_I2CM_ADDRESS                       0x7E01
--#define HDMI_I2CM_DATAO                         0x7E02
--#define HDMI_I2CM_DATAI                         0x7E03
--#define HDMI_I2CM_OPERATION                     0x7E04
--#define HDMI_I2CM_INT                           0x7E05
--#define HDMI_I2CM_CTLINT                        0x7E06
--#define HDMI_I2CM_DIV                           0x7E07
--#define HDMI_I2CM_SEGADDR                       0x7E08
--#define HDMI_I2CM_SOFTRSTZ                      0x7E09
--#define HDMI_I2CM_SEGPTR                        0x7E0A
--#define HDMI_I2CM_SS_SCL_HCNT_1_ADDR            0x7E0B
--#define HDMI_I2CM_SS_SCL_HCNT_0_ADDR            0x7E0C
--#define HDMI_I2CM_SS_SCL_LCNT_1_ADDR            0x7E0D
--#define HDMI_I2CM_SS_SCL_LCNT_0_ADDR            0x7E0E
--#define HDMI_I2CM_FS_SCL_HCNT_1_ADDR            0x7E0F
--#define HDMI_I2CM_FS_SCL_HCNT_0_ADDR            0x7E10
--#define HDMI_I2CM_FS_SCL_LCNT_1_ADDR            0x7E11
--#define HDMI_I2CM_FS_SCL_LCNT_0_ADDR            0x7E12
--
--enum {
--/* PRODUCT_ID0 field values */
--	HDMI_PRODUCT_ID0_HDMI_TX = 0xa0,
--
--/* PRODUCT_ID1 field values */
--	HDMI_PRODUCT_ID1_HDCP = 0xc0,
--	HDMI_PRODUCT_ID1_HDMI_RX = 0x02,
--	HDMI_PRODUCT_ID1_HDMI_TX = 0x01,
--
--/* CONFIG0_ID field values */
--	HDMI_CONFIG0_I2S = 0x10,
--
--/* CONFIG1_ID field values */
--	HDMI_CONFIG1_AHB = 0x01,
--
--/* CONFIG3_ID field values */
--	HDMI_CONFIG3_AHBAUDDMA = 0x02,
--	HDMI_CONFIG3_GPAUD = 0x01,
--
--/* IH_FC_INT2 field values */
--	HDMI_IH_FC_INT2_OVERFLOW_MASK = 0x03,
--	HDMI_IH_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02,
--	HDMI_IH_FC_INT2_HIGH_PRIORITY_OVERFLOW = 0x01,
--
--/* IH_FC_STAT2 field values */
--	HDMI_IH_FC_STAT2_OVERFLOW_MASK = 0x03,
--	HDMI_IH_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,
--	HDMI_IH_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,
--
--/* IH_PHY_STAT0 field values */
--	HDMI_IH_PHY_STAT0_RX_SENSE3 = 0x20,
--	HDMI_IH_PHY_STAT0_RX_SENSE2 = 0x10,
--	HDMI_IH_PHY_STAT0_RX_SENSE1 = 0x8,
--	HDMI_IH_PHY_STAT0_RX_SENSE0 = 0x4,
--	HDMI_IH_PHY_STAT0_TX_PHY_LOCK = 0x2,
--	HDMI_IH_PHY_STAT0_HPD = 0x1,
--
--/* IH_I2CM_STAT0 and IH_MUTE_I2CM_STAT0 field values */
--	HDMI_IH_I2CM_STAT0_DONE = 0x2,
--	HDMI_IH_I2CM_STAT0_ERROR = 0x1,
--
--/* IH_MUTE_I2CMPHY_STAT0 field values */
--	HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYDONE = 0x2,
--	HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYERROR = 0x1,
--
--/* IH_AHBDMAAUD_STAT0 field values */
--	HDMI_IH_AHBDMAAUD_STAT0_ERROR = 0x20,
--	HDMI_IH_AHBDMAAUD_STAT0_LOST = 0x10,
--	HDMI_IH_AHBDMAAUD_STAT0_RETRY = 0x08,
--	HDMI_IH_AHBDMAAUD_STAT0_DONE = 0x04,
--	HDMI_IH_AHBDMAAUD_STAT0_BUFFFULL = 0x02,
--	HDMI_IH_AHBDMAAUD_STAT0_BUFFEMPTY = 0x01,
--
--/* IH_MUTE_FC_STAT2 field values */
--	HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK = 0x03,
--	HDMI_IH_MUTE_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,
--	HDMI_IH_MUTE_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,
--
--/* IH_MUTE_AHBDMAAUD_STAT0 field values */
--	HDMI_IH_MUTE_AHBDMAAUD_STAT0_ERROR = 0x20,
--	HDMI_IH_MUTE_AHBDMAAUD_STAT0_LOST = 0x10,
--	HDMI_IH_MUTE_AHBDMAAUD_STAT0_RETRY = 0x08,
--	HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE = 0x04,
--	HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFFULL = 0x02,
--	HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFEMPTY = 0x01,
--
--/* IH_MUTE field values */
--	HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT = 0x2,
--	HDMI_IH_MUTE_MUTE_ALL_INTERRUPT = 0x1,
--
--/* TX_INVID0 field values */
--	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_MASK = 0x80,
--	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_ENABLE = 0x80,
--	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE = 0x00,
--	HDMI_TX_INVID0_VIDEO_MAPPING_MASK = 0x1F,
--	HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET = 0,
--
--/* TX_INSTUFFING field values */
--	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_MASK = 0x4,
--	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE = 0x4,
--	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_DISABLE = 0x0,
--	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_MASK = 0x2,
--	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE = 0x2,
--	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_DISABLE = 0x0,
--	HDMI_TX_INSTUFFING_GYDATA_STUFFING_MASK = 0x1,
--	HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE = 0x1,
--	HDMI_TX_INSTUFFING_GYDATA_STUFFING_DISABLE = 0x0,
--
--/* VP_PR_CD field values */
--	HDMI_VP_PR_CD_COLOR_DEPTH_MASK = 0xF0,
--	HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET = 4,
--	HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK = 0x0F,
--	HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET = 0,
--
--/* VP_STUFF field values */
--	HDMI_VP_STUFF_IDEFAULT_PHASE_MASK = 0x20,
--	HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET = 5,
--	HDMI_VP_STUFF_IFIX_PP_TO_LAST_MASK = 0x10,
--	HDMI_VP_STUFF_IFIX_PP_TO_LAST_OFFSET = 4,
--	HDMI_VP_STUFF_ICX_GOTO_P0_ST_MASK = 0x8,
--	HDMI_VP_STUFF_ICX_GOTO_P0_ST_OFFSET = 3,
--	HDMI_VP_STUFF_YCC422_STUFFING_MASK = 0x4,
--	HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE = 0x4,
--	HDMI_VP_STUFF_YCC422_STUFFING_DIRECT_MODE = 0x0,
--	HDMI_VP_STUFF_PP_STUFFING_MASK = 0x2,
--	HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE = 0x2,
--	HDMI_VP_STUFF_PP_STUFFING_DIRECT_MODE = 0x0,
--	HDMI_VP_STUFF_PR_STUFFING_MASK = 0x1,
--	HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE = 0x1,
--	HDMI_VP_STUFF_PR_STUFFING_DIRECT_MODE = 0x0,
--
--/* VP_CONF field values */
--	HDMI_VP_CONF_BYPASS_EN_MASK = 0x40,
--	HDMI_VP_CONF_BYPASS_EN_ENABLE = 0x40,
--	HDMI_VP_CONF_BYPASS_EN_DISABLE = 0x00,
--	HDMI_VP_CONF_PP_EN_ENMASK = 0x20,
--	HDMI_VP_CONF_PP_EN_ENABLE = 0x20,
--	HDMI_VP_CONF_PP_EN_DISABLE = 0x00,
--	HDMI_VP_CONF_PR_EN_MASK = 0x10,
--	HDMI_VP_CONF_PR_EN_ENABLE = 0x10,
--	HDMI_VP_CONF_PR_EN_DISABLE = 0x00,
--	HDMI_VP_CONF_YCC422_EN_MASK = 0x8,
--	HDMI_VP_CONF_YCC422_EN_ENABLE = 0x8,
--	HDMI_VP_CONF_YCC422_EN_DISABLE = 0x0,
--	HDMI_VP_CONF_BYPASS_SELECT_MASK = 0x4,
--	HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER = 0x4,
--	HDMI_VP_CONF_BYPASS_SELECT_PIX_REPEATER = 0x0,
--	HDMI_VP_CONF_OUTPUT_SELECTOR_MASK = 0x3,
--	HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS = 0x3,
--	HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422 = 0x1,
--	HDMI_VP_CONF_OUTPUT_SELECTOR_PP = 0x0,
--
--/* VP_REMAP field values */
--	HDMI_VP_REMAP_MASK = 0x3,
--	HDMI_VP_REMAP_YCC422_24bit = 0x2,
--	HDMI_VP_REMAP_YCC422_20bit = 0x1,
--	HDMI_VP_REMAP_YCC422_16bit = 0x0,
--
--/* FC_INVIDCONF field values */
--	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK = 0x80,
--	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE = 0x80,
--	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE = 0x00,
--	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_MASK = 0x40,
--	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH = 0x40,
--	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW = 0x00,
--	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_MASK = 0x20,
--	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH = 0x20,
--	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW = 0x00,
--	HDMI_FC_INVIDCONF_DE_IN_POLARITY_MASK = 0x10,
--	HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH = 0x10,
--	HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW = 0x00,
--	HDMI_FC_INVIDCONF_DVI_MODEZ_MASK = 0x8,
--	HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE = 0x8,
--	HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE = 0x0,
--	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_MASK = 0x2,
--	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH = 0x2,
--	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW = 0x0,
--	HDMI_FC_INVIDCONF_IN_I_P_MASK = 0x1,
--	HDMI_FC_INVIDCONF_IN_I_P_INTERLACED = 0x1,
--	HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE = 0x0,
--
--/* FC_AUDICONF0 field values */
--	HDMI_FC_AUDICONF0_CC_OFFSET = 4,
--	HDMI_FC_AUDICONF0_CC_MASK = 0x70,
--	HDMI_FC_AUDICONF0_CT_OFFSET = 0,
--	HDMI_FC_AUDICONF0_CT_MASK = 0xF,
--
--/* FC_AUDICONF1 field values */
--	HDMI_FC_AUDICONF1_SS_OFFSET = 3,
--	HDMI_FC_AUDICONF1_SS_MASK = 0x18,
--	HDMI_FC_AUDICONF1_SF_OFFSET = 0,
--	HDMI_FC_AUDICONF1_SF_MASK = 0x7,
--
--/* FC_AUDICONF3 field values */
--	HDMI_FC_AUDICONF3_LFEPBL_OFFSET = 5,
--	HDMI_FC_AUDICONF3_LFEPBL_MASK = 0x60,
--	HDMI_FC_AUDICONF3_DM_INH_OFFSET = 4,
--	HDMI_FC_AUDICONF3_DM_INH_MASK = 0x10,
--	HDMI_FC_AUDICONF3_LSV_OFFSET = 0,
--	HDMI_FC_AUDICONF3_LSV_MASK = 0xF,
--
--/* FC_AUDSCHNLS0 field values */
--	HDMI_FC_AUDSCHNLS0_CGMSA_OFFSET = 4,
--	HDMI_FC_AUDSCHNLS0_CGMSA_MASK = 0x30,
--	HDMI_FC_AUDSCHNLS0_COPYRIGHT_OFFSET = 0,
--	HDMI_FC_AUDSCHNLS0_COPYRIGHT_MASK = 0x01,
--
--/* FC_AUDSCHNLS3-6 field values */
--	HDMI_FC_AUDSCHNLS3_OIEC_CH0_OFFSET = 0,
--	HDMI_FC_AUDSCHNLS3_OIEC_CH0_MASK = 0x0f,
--	HDMI_FC_AUDSCHNLS3_OIEC_CH1_OFFSET = 4,
--	HDMI_FC_AUDSCHNLS3_OIEC_CH1_MASK = 0xf0,
--	HDMI_FC_AUDSCHNLS4_OIEC_CH2_OFFSET = 0,
--	HDMI_FC_AUDSCHNLS4_OIEC_CH2_MASK = 0x0f,
--	HDMI_FC_AUDSCHNLS4_OIEC_CH3_OFFSET = 4,
--	HDMI_FC_AUDSCHNLS4_OIEC_CH3_MASK = 0xf0,
--
--	HDMI_FC_AUDSCHNLS5_OIEC_CH0_OFFSET = 0,
--	HDMI_FC_AUDSCHNLS5_OIEC_CH0_MASK = 0x0f,
--	HDMI_FC_AUDSCHNLS5_OIEC_CH1_OFFSET = 4,
--	HDMI_FC_AUDSCHNLS5_OIEC_CH1_MASK = 0xf0,
--	HDMI_FC_AUDSCHNLS6_OIEC_CH2_OFFSET = 0,
--	HDMI_FC_AUDSCHNLS6_OIEC_CH2_MASK = 0x0f,
--	HDMI_FC_AUDSCHNLS6_OIEC_CH3_OFFSET = 4,
--	HDMI_FC_AUDSCHNLS6_OIEC_CH3_MASK = 0xf0,
--
--/* HDMI_FC_AUDSCHNLS7 field values */
--	HDMI_FC_AUDSCHNLS7_ACCURACY_OFFSET = 4,
--	HDMI_FC_AUDSCHNLS7_ACCURACY_MASK = 0x30,
--
--/* HDMI_FC_AUDSCHNLS8 field values */
--	HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_MASK = 0xf0,
--	HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_OFFSET = 4,
--	HDMI_FC_AUDSCHNLS8_WORDLEGNTH_MASK = 0x0f,
--	HDMI_FC_AUDSCHNLS8_WORDLEGNTH_OFFSET = 0,
--
--/* FC_AUDSCONF field values */
--	HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_MASK = 0xF0,
--	HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_OFFSET = 4,
--	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_MASK = 0x1,
--	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_OFFSET = 0,
--	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT1 = 0x1,
--	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT0 = 0x0,
--
--/* FC_STAT2 field values */
--	HDMI_FC_STAT2_OVERFLOW_MASK = 0x03,
--	HDMI_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,
--	HDMI_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,
--
--/* FC_INT2 field values */
--	HDMI_FC_INT2_OVERFLOW_MASK = 0x03,
--	HDMI_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02,
--	HDMI_FC_INT2_HIGH_PRIORITY_OVERFLOW = 0x01,
--
--/* FC_MASK2 field values */
--	HDMI_FC_MASK2_OVERFLOW_MASK = 0x03,
--	HDMI_FC_MASK2_LOW_PRIORITY_OVERFLOW = 0x02,
--	HDMI_FC_MASK2_HIGH_PRIORITY_OVERFLOW = 0x01,
--
--/* FC_PRCONF field values */
--	HDMI_FC_PRCONF_INCOMING_PR_FACTOR_MASK = 0xF0,
--	HDMI_FC_PRCONF_INCOMING_PR_FACTOR_OFFSET = 4,
--	HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_MASK = 0x0F,
--	HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_OFFSET = 0,
--
--/* FC_AVICONF0-FC_AVICONF3 field values */
--	HDMI_FC_AVICONF0_PIX_FMT_MASK = 0x03,
--	HDMI_FC_AVICONF0_PIX_FMT_RGB = 0x00,
--	HDMI_FC_AVICONF0_PIX_FMT_YCBCR422 = 0x01,
--	HDMI_FC_AVICONF0_PIX_FMT_YCBCR444 = 0x02,
--	HDMI_FC_AVICONF0_ACTIVE_FMT_MASK = 0x40,
--	HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT = 0x40,
--	HDMI_FC_AVICONF0_ACTIVE_FMT_NO_INFO = 0x00,
--	HDMI_FC_AVICONF0_BAR_DATA_MASK = 0x0C,
--	HDMI_FC_AVICONF0_BAR_DATA_NO_DATA = 0x00,
--	HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR = 0x04,
--	HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR = 0x08,
--	HDMI_FC_AVICONF0_BAR_DATA_VERT_HORIZ_BAR = 0x0C,
--	HDMI_FC_AVICONF0_SCAN_INFO_MASK = 0x30,
--	HDMI_FC_AVICONF0_SCAN_INFO_OVERSCAN = 0x10,
--	HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN = 0x20,
--	HDMI_FC_AVICONF0_SCAN_INFO_NODATA = 0x00,
--
--	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_MASK = 0x0F,
--	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_USE_CODED = 0x08,
--	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_4_3 = 0x09,
--	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_16_9 = 0x0A,
--	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_14_9 = 0x0B,
--	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_MASK = 0x30,
--	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_NO_DATA = 0x00,
--	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_4_3 = 0x10,
--	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_16_9 = 0x20,
--	HDMI_FC_AVICONF1_COLORIMETRY_MASK = 0xC0,
--	HDMI_FC_AVICONF1_COLORIMETRY_NO_DATA = 0x00,
--	HDMI_FC_AVICONF1_COLORIMETRY_SMPTE = 0x40,
--	HDMI_FC_AVICONF1_COLORIMETRY_ITUR = 0x80,
--	HDMI_FC_AVICONF1_COLORIMETRY_EXTENDED_INFO = 0xC0,
--
--	HDMI_FC_AVICONF2_SCALING_MASK = 0x03,
--	HDMI_FC_AVICONF2_SCALING_NONE = 0x00,
--	HDMI_FC_AVICONF2_SCALING_HORIZ = 0x01,
--	HDMI_FC_AVICONF2_SCALING_VERT = 0x02,
--	HDMI_FC_AVICONF2_SCALING_HORIZ_VERT = 0x03,
--	HDMI_FC_AVICONF2_RGB_QUANT_MASK = 0x0C,
--	HDMI_FC_AVICONF2_RGB_QUANT_DEFAULT = 0x00,
--	HDMI_FC_AVICONF2_RGB_QUANT_LIMITED_RANGE = 0x04,
--	HDMI_FC_AVICONF2_RGB_QUANT_FULL_RANGE = 0x08,
--	HDMI_FC_AVICONF2_EXT_COLORIMETRY_MASK = 0x70,
--	HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC601 = 0x00,
--	HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC709 = 0x10,
--	HDMI_FC_AVICONF2_EXT_COLORIMETRY_SYCC601 = 0x20,
--	HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_YCC601 = 0x30,
--	HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_RGB = 0x40,
--	HDMI_FC_AVICONF2_IT_CONTENT_MASK = 0x80,
--	HDMI_FC_AVICONF2_IT_CONTENT_NO_DATA = 0x00,
--	HDMI_FC_AVICONF2_IT_CONTENT_VALID = 0x80,
--
--	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_MASK = 0x03,
--	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GRAPHICS = 0x00,
--	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_PHOTO = 0x01,
--	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_CINEMA = 0x02,
--	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GAME = 0x03,
--	HDMI_FC_AVICONF3_QUANT_RANGE_MASK = 0x0C,
--	HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED = 0x00,
--	HDMI_FC_AVICONF3_QUANT_RANGE_FULL = 0x04,
--
--/* FC_DBGFORCE field values */
--	HDMI_FC_DBGFORCE_FORCEAUDIO = 0x10,
--	HDMI_FC_DBGFORCE_FORCEVIDEO = 0x1,
--
--/* PHY_CONF0 field values */
--	HDMI_PHY_CONF0_PDZ_MASK = 0x80,
--	HDMI_PHY_CONF0_PDZ_OFFSET = 7,
--	HDMI_PHY_CONF0_ENTMDS_MASK = 0x40,
--	HDMI_PHY_CONF0_ENTMDS_OFFSET = 6,
--	HDMI_PHY_CONF0_SVSRET_MASK = 0x20,
--	HDMI_PHY_CONF0_SVSRET_OFFSET = 5,
--	HDMI_PHY_CONF0_GEN2_PDDQ_MASK = 0x10,
--	HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET = 4,
--	HDMI_PHY_CONF0_GEN2_TXPWRON_MASK = 0x8,
--	HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET = 3,
--	HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_MASK = 0x4,
--	HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_OFFSET = 2,
--	HDMI_PHY_CONF0_SELDATAENPOL_MASK = 0x2,
--	HDMI_PHY_CONF0_SELDATAENPOL_OFFSET = 1,
--	HDMI_PHY_CONF0_SELDIPIF_MASK = 0x1,
--	HDMI_PHY_CONF0_SELDIPIF_OFFSET = 0,
--
--/* PHY_TST0 field values */
--	HDMI_PHY_TST0_TSTCLR_MASK = 0x20,
--	HDMI_PHY_TST0_TSTCLR_OFFSET = 5,
--	HDMI_PHY_TST0_TSTEN_MASK = 0x10,
--	HDMI_PHY_TST0_TSTEN_OFFSET = 4,
--	HDMI_PHY_TST0_TSTCLK_MASK = 0x1,
--	HDMI_PHY_TST0_TSTCLK_OFFSET = 0,
--
--/* PHY_STAT0 field values */
--	HDMI_PHY_RX_SENSE3 = 0x80,
--	HDMI_PHY_RX_SENSE2 = 0x40,
--	HDMI_PHY_RX_SENSE1 = 0x20,
--	HDMI_PHY_RX_SENSE0 = 0x10,
--	HDMI_PHY_HPD = 0x02,
--	HDMI_PHY_TX_PHY_LOCK = 0x01,
--
--/* PHY_I2CM_SLAVE_ADDR field values */
--	HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 = 0x69,
--	HDMI_PHY_I2CM_SLAVE_ADDR_HEAC_PHY = 0x49,
--
--/* PHY_I2CM_OPERATION_ADDR field values */
--	HDMI_PHY_I2CM_OPERATION_ADDR_WRITE = 0x10,
--	HDMI_PHY_I2CM_OPERATION_ADDR_READ = 0x1,
--
--/* HDMI_PHY_I2CM_INT_ADDR */
--	HDMI_PHY_I2CM_INT_ADDR_DONE_POL = 0x08,
--	HDMI_PHY_I2CM_INT_ADDR_DONE_MASK = 0x04,
--
--/* HDMI_PHY_I2CM_CTLINT_ADDR */
--	HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL = 0x80,
--	HDMI_PHY_I2CM_CTLINT_ADDR_NAC_MASK = 0x40,
--	HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08,
--	HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_MASK = 0x04,
--
--/* AUD_CONF0 field values */
--	HDMI_AUD_CONF0_SW_RESET = 0x80,
--	HDMI_AUD_CONF0_I2S_ALL_ENABLE = 0x2F,
--
--/* AUD_CONF1 field values */
--	HDMI_AUD_CONF1_MODE_I2S = 0x00,
--	HDMI_AUD_CONF1_MODE_RIGHT_J = 0x02,
--	HDMI_AUD_CONF1_MODE_LEFT_J = 0x04,
--	HDMI_AUD_CONF1_WIDTH_16 = 0x10,
--	HDMI_AUD_CONF1_WIDTH_24 = 0x18,
--
--/* AUD_CTS3 field values */
--	HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5,
--	HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0,
--	HDMI_AUD_CTS3_N_SHIFT_1 = 0,
--	HDMI_AUD_CTS3_N_SHIFT_16 = 0x20,
--	HDMI_AUD_CTS3_N_SHIFT_32 = 0x40,
--	HDMI_AUD_CTS3_N_SHIFT_64 = 0x60,
--	HDMI_AUD_CTS3_N_SHIFT_128 = 0x80,
--	HDMI_AUD_CTS3_N_SHIFT_256 = 0xa0,
--	/* note that the CTS3 MANUAL bit has been removed
--	   from our part. Can't set it, will read as 0. */
--	HDMI_AUD_CTS3_CTS_MANUAL = 0x10,
--	HDMI_AUD_CTS3_AUDCTS19_16_MASK = 0x0f,
--
--/* HDMI_AUD_INPUTCLKFS field values */
--	HDMI_AUD_INPUTCLKFS_128FS = 0,
--	HDMI_AUD_INPUTCLKFS_256FS = 1,
--	HDMI_AUD_INPUTCLKFS_512FS = 2,
--	HDMI_AUD_INPUTCLKFS_64FS = 4,
--
--/* AHB_DMA_CONF0 field values */
--	HDMI_AHB_DMA_CONF0_SW_FIFO_RST_OFFSET = 7,
--	HDMI_AHB_DMA_CONF0_SW_FIFO_RST_MASK = 0x80,
--	HDMI_AHB_DMA_CONF0_HBR = 0x10,
--	HDMI_AHB_DMA_CONF0_EN_HLOCK_OFFSET = 3,
--	HDMI_AHB_DMA_CONF0_EN_HLOCK_MASK = 0x08,
--	HDMI_AHB_DMA_CONF0_INCR_TYPE_OFFSET = 1,
--	HDMI_AHB_DMA_CONF0_INCR_TYPE_MASK = 0x06,
--	HDMI_AHB_DMA_CONF0_INCR4 = 0x0,
--	HDMI_AHB_DMA_CONF0_INCR8 = 0x2,
--	HDMI_AHB_DMA_CONF0_INCR16 = 0x4,
--	HDMI_AHB_DMA_CONF0_BURST_MODE = 0x1,
--
--/* HDMI_AHB_DMA_START field values */
--	HDMI_AHB_DMA_START_START_OFFSET = 0,
--	HDMI_AHB_DMA_START_START_MASK = 0x01,
--
--/* HDMI_AHB_DMA_STOP field values */
--	HDMI_AHB_DMA_STOP_STOP_OFFSET = 0,
--	HDMI_AHB_DMA_STOP_STOP_MASK = 0x01,
--
--/* AHB_DMA_STAT, AHB_DMA_INT, AHB_DMA_MASK, AHB_DMA_POL field values */
--	HDMI_AHB_DMA_DONE = 0x80,
--	HDMI_AHB_DMA_RETRY_SPLIT = 0x40,
--	HDMI_AHB_DMA_LOSTOWNERSHIP = 0x20,
--	HDMI_AHB_DMA_ERROR = 0x10,
--	HDMI_AHB_DMA_FIFO_THREMPTY = 0x04,
--	HDMI_AHB_DMA_FIFO_FULL = 0x02,
--	HDMI_AHB_DMA_FIFO_EMPTY = 0x01,
--
--/* AHB_DMA_BUFFSTAT, AHB_DMA_BUFFINT,AHB_DMA_BUFFMASK,AHB_DMA_BUFFPOL values */
--	HDMI_AHB_DMA_BUFFSTAT_FULL = 0x02,
--	HDMI_AHB_DMA_BUFFSTAT_EMPTY = 0x01,
--
--/* MC_CLKDIS field values */
--	HDMI_MC_CLKDIS_HDCPCLK_DISABLE = 0x40,
--	HDMI_MC_CLKDIS_CECCLK_DISABLE = 0x20,
--	HDMI_MC_CLKDIS_CSCCLK_DISABLE = 0x10,
--	HDMI_MC_CLKDIS_AUDCLK_DISABLE = 0x8,
--	HDMI_MC_CLKDIS_PREPCLK_DISABLE = 0x4,
--	HDMI_MC_CLKDIS_TMDSCLK_DISABLE = 0x2,
--	HDMI_MC_CLKDIS_PIXELCLK_DISABLE = 0x1,
--
--/* MC_SWRSTZ field values */
--	HDMI_MC_SWRSTZ_TMDSSWRST_REQ = 0x02,
--
--/* MC_FLOWCTRL field values */
--	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_MASK = 0x1,
--	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH = 0x1,
--	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS = 0x0,
--
--/* MC_PHYRSTZ field values */
--	HDMI_MC_PHYRSTZ_PHYRSTZ = 0x01,
--
--/* MC_HEACPHY_RST field values */
--	HDMI_MC_HEACPHY_RST_ASSERT = 0x1,
--	HDMI_MC_HEACPHY_RST_DEASSERT = 0x0,
--
--/* CSC_CFG field values */
--	HDMI_CSC_CFG_INTMODE_MASK = 0x30,
--	HDMI_CSC_CFG_INTMODE_OFFSET = 4,
--	HDMI_CSC_CFG_INTMODE_DISABLE = 0x00,
--	HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1 = 0x10,
--	HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA2 = 0x20,
--	HDMI_CSC_CFG_DECMODE_MASK = 0x3,
--	HDMI_CSC_CFG_DECMODE_OFFSET = 0,
--	HDMI_CSC_CFG_DECMODE_DISABLE = 0x0,
--	HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA1 = 0x1,
--	HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA2 = 0x2,
--	HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3 = 0x3,
--
--/* CSC_SCALE field values */
--	HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK = 0xF0,
--	HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP = 0x00,
--	HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP = 0x50,
--	HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP = 0x60,
--	HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP = 0x70,
--	HDMI_CSC_SCALE_CSCSCALE_MASK = 0x03,
--
--/* A_HDCPCFG0 field values */
--	HDMI_A_HDCPCFG0_ELVENA_MASK = 0x80,
--	HDMI_A_HDCPCFG0_ELVENA_ENABLE = 0x80,
--	HDMI_A_HDCPCFG0_ELVENA_DISABLE = 0x00,
--	HDMI_A_HDCPCFG0_I2CFASTMODE_MASK = 0x40,
--	HDMI_A_HDCPCFG0_I2CFASTMODE_ENABLE = 0x40,
--	HDMI_A_HDCPCFG0_I2CFASTMODE_DISABLE = 0x00,
--	HDMI_A_HDCPCFG0_BYPENCRYPTION_MASK = 0x20,
--	HDMI_A_HDCPCFG0_BYPENCRYPTION_ENABLE = 0x20,
--	HDMI_A_HDCPCFG0_BYPENCRYPTION_DISABLE = 0x00,
--	HDMI_A_HDCPCFG0_SYNCRICHECK_MASK = 0x10,
--	HDMI_A_HDCPCFG0_SYNCRICHECK_ENABLE = 0x10,
--	HDMI_A_HDCPCFG0_SYNCRICHECK_DISABLE = 0x00,
--	HDMI_A_HDCPCFG0_AVMUTE_MASK = 0x8,
--	HDMI_A_HDCPCFG0_AVMUTE_ENABLE = 0x8,
--	HDMI_A_HDCPCFG0_AVMUTE_DISABLE = 0x0,
--	HDMI_A_HDCPCFG0_RXDETECT_MASK = 0x4,
--	HDMI_A_HDCPCFG0_RXDETECT_ENABLE = 0x4,
--	HDMI_A_HDCPCFG0_RXDETECT_DISABLE = 0x0,
--	HDMI_A_HDCPCFG0_EN11FEATURE_MASK = 0x2,
--	HDMI_A_HDCPCFG0_EN11FEATURE_ENABLE = 0x2,
--	HDMI_A_HDCPCFG0_EN11FEATURE_DISABLE = 0x0,
--	HDMI_A_HDCPCFG0_HDMIDVI_MASK = 0x1,
--	HDMI_A_HDCPCFG0_HDMIDVI_HDMI = 0x1,
--	HDMI_A_HDCPCFG0_HDMIDVI_DVI = 0x0,
--
--/* A_HDCPCFG1 field values */
--	HDMI_A_HDCPCFG1_DISSHA1CHECK_MASK = 0x8,
--	HDMI_A_HDCPCFG1_DISSHA1CHECK_DISABLE = 0x8,
--	HDMI_A_HDCPCFG1_DISSHA1CHECK_ENABLE = 0x0,
--	HDMI_A_HDCPCFG1_PH2UPSHFTENC_MASK = 0x4,
--	HDMI_A_HDCPCFG1_PH2UPSHFTENC_ENABLE = 0x4,
--	HDMI_A_HDCPCFG1_PH2UPSHFTENC_DISABLE = 0x0,
--	HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK = 0x2,
--	HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE = 0x2,
--	HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE = 0x0,
--	HDMI_A_HDCPCFG1_SWRESET_MASK = 0x1,
--	HDMI_A_HDCPCFG1_SWRESET_ASSERT = 0x0,
--
--/* A_VIDPOLCFG field values */
--	HDMI_A_VIDPOLCFG_UNENCRYPTCONF_MASK = 0x60,
--	HDMI_A_VIDPOLCFG_UNENCRYPTCONF_OFFSET = 5,
--	HDMI_A_VIDPOLCFG_DATAENPOL_MASK = 0x10,
--	HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH = 0x10,
--	HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_LOW = 0x0,
--	HDMI_A_VIDPOLCFG_VSYNCPOL_MASK = 0x8,
--	HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_HIGH = 0x8,
--	HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_LOW = 0x0,
--	HDMI_A_VIDPOLCFG_HSYNCPOL_MASK = 0x2,
--	HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_HIGH = 0x2,
--	HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0,
--
--/* I2CM_OPERATION field values */
--	HDMI_I2CM_OPERATION_WRITE = 0x10,
--	HDMI_I2CM_OPERATION_READ_EXT = 0x2,
--	HDMI_I2CM_OPERATION_READ = 0x1,
--
--/* I2CM_INT field values */
--	HDMI_I2CM_INT_DONE_POL = 0x8,
--	HDMI_I2CM_INT_DONE_MASK = 0x4,
--
--/* I2CM_CTLINT field values */
--	HDMI_I2CM_CTLINT_NAC_POL = 0x80,
--	HDMI_I2CM_CTLINT_NAC_MASK = 0x40,
--	HDMI_I2CM_CTLINT_ARB_POL = 0x8,
--	HDMI_I2CM_CTLINT_ARB_MASK = 0x4,
--};
--
--/*
-- * HDMI 3D TX PHY registers
-- */
--#define HDMI_3D_TX_PHY_PWRCTRL			0x00
--#define HDMI_3D_TX_PHY_SERDIVCTRL		0x01
--#define HDMI_3D_TX_PHY_SERCKCTRL		0x02
--#define HDMI_3D_TX_PHY_SERCKKILLCTRL		0x03
--#define HDMI_3D_TX_PHY_TXRESCTRL		0x04
--#define HDMI_3D_TX_PHY_CKCALCTRL		0x05
--#define HDMI_3D_TX_PHY_CPCE_CTRL		0x06
--#define HDMI_3D_TX_PHY_TXCLKMEASCTRL		0x07
--#define HDMI_3D_TX_PHY_TXMEASCTRL		0x08
--#define HDMI_3D_TX_PHY_CKSYMTXCTRL		0x09
--#define HDMI_3D_TX_PHY_CMPSEQCTRL		0x0a
--#define HDMI_3D_TX_PHY_CMPPWRCTRL		0x0b
--#define HDMI_3D_TX_PHY_CMPMODECTRL		0x0c
--#define HDMI_3D_TX_PHY_MEASCTRL			0x0d
--#define HDMI_3D_TX_PHY_VLEVCTRL			0x0e
--#define HDMI_3D_TX_PHY_D2ACTRL			0x0f
--#define HDMI_3D_TX_PHY_CURRCTRL			0x10
--#define HDMI_3D_TX_PHY_DRVANACTRL		0x11
--#define HDMI_3D_TX_PHY_PLLMEASCTRL		0x12
--#define HDMI_3D_TX_PHY_PLLPHBYCTRL		0x13
--#define HDMI_3D_TX_PHY_GRP_CTRL			0x14
--#define HDMI_3D_TX_PHY_GMPCTRL			0x15
--#define HDMI_3D_TX_PHY_MPLLMEASCTRL		0x16
--#define HDMI_3D_TX_PHY_MSM_CTRL			0x17
--#define HDMI_3D_TX_PHY_SCRPB_STATUS		0x18
--#define HDMI_3D_TX_PHY_TXTERM			0x19
--#define HDMI_3D_TX_PHY_PTRPT_ENBL		0x1a
--#define HDMI_3D_TX_PHY_PATTERNGEN		0x1b
--#define HDMI_3D_TX_PHY_SDCAP_MODE		0x1c
--#define HDMI_3D_TX_PHY_SCOPEMODE		0x1d
--#define HDMI_3D_TX_PHY_DIGTXMODE		0x1e
--#define HDMI_3D_TX_PHY_STR_STATUS		0x1f
--#define HDMI_3D_TX_PHY_SCOPECNT0		0x20
--#define HDMI_3D_TX_PHY_SCOPECNT1		0x21
--#define HDMI_3D_TX_PHY_SCOPECNT2		0x22
--#define HDMI_3D_TX_PHY_SCOPECNTCLK		0x23
--#define HDMI_3D_TX_PHY_SCOPESAMPLE		0x24
--#define HDMI_3D_TX_PHY_SCOPECNTMSB01		0x25
--#define HDMI_3D_TX_PHY_SCOPECNTMSB2CK		0x26
--
--/* HDMI_3D_TX_PHY_CKCALCTRL values */
--#define HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE		BIT(15)
--
--/* HDMI_3D_TX_PHY_MSM_CTRL values */
--#define HDMI_3D_TX_PHY_MSM_CTRL_MPLL_PH_SEL_CK		BIT(13)
--#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_CLK_REF_MPLL	(0 << 1)
--#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_OFF		(1 << 1)
--#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_PCLK		(2 << 1)
--#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK		(3 << 1)
--#define HDMI_3D_TX_PHY_MSM_CTRL_SCOPE_CK_SEL		BIT(0)
--
--/* HDMI_3D_TX_PHY_PTRPT_ENBL values */
--#define HDMI_3D_TX_PHY_PTRPT_ENBL_OVERRIDE		BIT(15)
--#define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT2		BIT(8)
--#define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT1		BIT(7)
--#define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT0		BIT(6)
--#define HDMI_3D_TX_PHY_PTRPT_ENBL_CK_REF_ENB		BIT(5)
--#define HDMI_3D_TX_PHY_PTRPT_ENBL_RCAL_ENB		BIT(4)
--#define HDMI_3D_TX_PHY_PTRPT_ENBL_TX_CLK_ALIGN_ENB	BIT(3)
--#define HDMI_3D_TX_PHY_PTRPT_ENBL_TX_READY		BIT(2)
--#define HDMI_3D_TX_PHY_PTRPT_ENBL_CKO_WORD_ENB		BIT(1)
--#define HDMI_3D_TX_PHY_PTRPT_ENBL_REFCLK_ENB		BIT(0)
--
--#endif /* __DW_HDMI_H__ */
---- /dev/null
-+++ b/drivers/gpu/drm/bridge/synopsys/Kconfig
-@@ -0,0 +1,23 @@
-+config DRM_DW_HDMI
-+	tristate
-+	select DRM_KMS_HELPER
-+
-+config DRM_DW_HDMI_AHB_AUDIO
-+	tristate "Synopsys Designware AHB Audio interface"
-+	depends on DRM_DW_HDMI && SND
-+	select SND_PCM
-+	select SND_PCM_ELD
-+	select SND_PCM_IEC958
-+	help
-+	  Support the AHB Audio interface which is part of the Synopsys
-+	  Designware HDMI block.  This is used in conjunction with
-+	  the i.MX6 HDMI driver.
-+
-+config DRM_DW_HDMI_I2S_AUDIO
-+	tristate "Synopsys Designware I2S Audio interface"
-+	depends on SND_SOC
-+	depends on DRM_DW_HDMI
-+	select SND_SOC_HDMI_CODEC
-+	help
-+	  Support the I2S Audio interface which is part of the Synopsys
-+	  Designware HDMI block.
---- /dev/null
-+++ b/drivers/gpu/drm/bridge/synopsys/Makefile
-@@ -0,0 +1,5 @@
-+#ccflags-y := -Iinclude/drm
-+
-+obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
-+obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
-+obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
---- /dev/null
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c
-@@ -0,0 +1,652 @@
-+/*
-+ * DesignWare HDMI audio driver
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * Written and tested against the Designware HDMI Tx found in iMX6.
-+ */
-+#include <linux/io.h>
-+#include <linux/interrupt.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <drm/bridge/dw_hdmi.h>
-+#include <drm/drm_edid.h>
-+
-+#include <sound/asoundef.h>
-+#include <sound/core.h>
-+#include <sound/initval.h>
-+#include <sound/pcm.h>
-+#include <sound/pcm_drm_eld.h>
-+#include <sound/pcm_iec958.h>
-+
-+#include "dw-hdmi-audio.h"
-+
-+#define DRIVER_NAME "dw-hdmi-ahb-audio"
-+
-+/* Provide some bits rather than bit offsets */
-+enum {
-+	HDMI_AHB_DMA_CONF0_SW_FIFO_RST = BIT(7),
-+	HDMI_AHB_DMA_CONF0_EN_HLOCK = BIT(3),
-+	HDMI_AHB_DMA_START_START = BIT(0),
-+	HDMI_AHB_DMA_STOP_STOP = BIT(0),
-+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_ERROR = BIT(5),
-+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_LOST = BIT(4),
-+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_RETRY = BIT(3),
-+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE = BIT(2),
-+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFFULL = BIT(1),
-+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFEMPTY = BIT(0),
-+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL =
-+		HDMI_IH_MUTE_AHBDMAAUD_STAT0_ERROR |
-+		HDMI_IH_MUTE_AHBDMAAUD_STAT0_LOST |
-+		HDMI_IH_MUTE_AHBDMAAUD_STAT0_RETRY |
-+		HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE |
-+		HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFFULL |
-+		HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFEMPTY,
-+	HDMI_IH_AHBDMAAUD_STAT0_ERROR = BIT(5),
-+	HDMI_IH_AHBDMAAUD_STAT0_LOST = BIT(4),
-+	HDMI_IH_AHBDMAAUD_STAT0_RETRY = BIT(3),
-+	HDMI_IH_AHBDMAAUD_STAT0_DONE = BIT(2),
-+	HDMI_IH_AHBDMAAUD_STAT0_BUFFFULL = BIT(1),
-+	HDMI_IH_AHBDMAAUD_STAT0_BUFFEMPTY = BIT(0),
-+	HDMI_IH_AHBDMAAUD_STAT0_ALL =
-+		HDMI_IH_AHBDMAAUD_STAT0_ERROR |
-+		HDMI_IH_AHBDMAAUD_STAT0_LOST |
-+		HDMI_IH_AHBDMAAUD_STAT0_RETRY |
-+		HDMI_IH_AHBDMAAUD_STAT0_DONE |
-+		HDMI_IH_AHBDMAAUD_STAT0_BUFFFULL |
-+		HDMI_IH_AHBDMAAUD_STAT0_BUFFEMPTY,
-+	HDMI_AHB_DMA_CONF0_INCR16 = 2 << 1,
-+	HDMI_AHB_DMA_CONF0_INCR8 = 1 << 1,
-+	HDMI_AHB_DMA_CONF0_INCR4 = 0,
-+	HDMI_AHB_DMA_CONF0_BURST_MODE = BIT(0),
-+	HDMI_AHB_DMA_MASK_DONE = BIT(7),
-+
-+	HDMI_REVISION_ID = 0x0001,
-+	HDMI_IH_AHBDMAAUD_STAT0 = 0x0109,
-+	HDMI_IH_MUTE_AHBDMAAUD_STAT0 = 0x0189,
-+	HDMI_FC_AUDICONF2 = 0x1027,
-+	HDMI_FC_AUDSCONF = 0x1063,
-+	HDMI_FC_AUDSCONF_LAYOUT1 = 1 << 0,
-+	HDMI_FC_AUDSCONF_LAYOUT0 = 0 << 0,
-+	HDMI_AHB_DMA_CONF0 = 0x3600,
-+	HDMI_AHB_DMA_START = 0x3601,
-+	HDMI_AHB_DMA_STOP = 0x3602,
-+	HDMI_AHB_DMA_THRSLD = 0x3603,
-+	HDMI_AHB_DMA_STRADDR0 = 0x3604,
-+	HDMI_AHB_DMA_STPADDR0 = 0x3608,
-+	HDMI_AHB_DMA_MASK = 0x3614,
-+	HDMI_AHB_DMA_POL = 0x3615,
-+	HDMI_AHB_DMA_CONF1 = 0x3616,
-+	HDMI_AHB_DMA_BUFFPOL = 0x361a,
-+};
-+
-+struct dw_hdmi_channel_conf {
-+	u8 conf1;
-+	u8 ca;
-+};
-+
-+/*
-+ * The default mapping of ALSA channels to HDMI channels and speaker
-+ * allocation bits.  Note that we can't do channel remapping here -
-+ * channels must be in the same order.
-+ *
-+ * Mappings for alsa-lib pcm/surround*.conf files:
-+ *
-+ *		Front	Sur4.0	Sur4.1	Sur5.0	Sur5.1	Sur7.1
-+ * Channels	2	4	6	6	6	8
-+ *
-+ * Our mapping from ALSA channel to CEA686D speaker name and HDMI channel:
-+ *
-+ *				Number of ALSA channels
-+ * ALSA Channel	2	3	4	5	6	7	8
-+ * 0		FL:0	=	=	=	=	=	=
-+ * 1		FR:1	=	=	=	=	=	=
-+ * 2			FC:3	RL:4	LFE:2	=	=	=
-+ * 3				RR:5	RL:4	FC:3	=	=
-+ * 4					RR:5	RL:4	=	=
-+ * 5						RR:5	=	=
-+ * 6							RC:6	=
-+ * 7							RLC/FRC	RLC/FRC
-+ */
-+static struct dw_hdmi_channel_conf default_hdmi_channel_config[7] = {
-+	{ 0x03, 0x00 },	/* FL,FR */
-+	{ 0x0b, 0x02 },	/* FL,FR,FC */
-+	{ 0x33, 0x08 },	/* FL,FR,RL,RR */
-+	{ 0x37, 0x09 },	/* FL,FR,LFE,RL,RR */
-+	{ 0x3f, 0x0b },	/* FL,FR,LFE,FC,RL,RR */
-+	{ 0x7f, 0x0f },	/* FL,FR,LFE,FC,RL,RR,RC */
-+	{ 0xff, 0x13 },	/* FL,FR,LFE,FC,RL,RR,[FR]RC,[FR]LC */
-+};
-+
-+struct snd_dw_hdmi {
-+	struct snd_card *card;
-+	struct snd_pcm *pcm;
-+	spinlock_t lock;
-+	struct dw_hdmi_audio_data data;
-+	struct snd_pcm_substream *substream;
-+	void (*reformat)(struct snd_dw_hdmi *, size_t, size_t);
-+	void *buf_src;
-+	void *buf_dst;
-+	dma_addr_t buf_addr;
-+	unsigned buf_offset;
-+	unsigned buf_period;
-+	unsigned buf_size;
-+	unsigned channels;
-+	u8 revision;
-+	u8 iec_offset;
-+	u8 cs[192][8];
-+};
-+
-+static void dw_hdmi_writel(u32 val, void __iomem *ptr)
-+{
-+	writeb_relaxed(val, ptr);
-+	writeb_relaxed(val >> 8, ptr + 1);
-+	writeb_relaxed(val >> 16, ptr + 2);
-+	writeb_relaxed(val >> 24, ptr + 3);
-+}
-+
-+/*
-+ * Convert to hardware format: The userspace buffer contains IEC958 samples,
-+ * with the PCUV bits in bits 31..28 and audio samples in bits 27..4.  We
-+ * need these to be in bits 27..24, with the IEC B bit in bit 28, and audio
-+ * samples in 23..0.
-+ *
-+ * Default preamble in bits 3..0: 8 = block start, 4 = even 2 = odd
-+ *
-+ * Ideally, we could do with having the data properly formatted in userspace.
-+ */
-+static void dw_hdmi_reformat_iec958(struct snd_dw_hdmi *dw,
-+	size_t offset, size_t bytes)
-+{
-+	u32 *src = dw->buf_src + offset;
-+	u32 *dst = dw->buf_dst + offset;
-+	u32 *end = dw->buf_src + offset + bytes;
-+
-+	do {
-+		u32 b, sample = *src++;
-+
-+		b = (sample & 8) << (28 - 3);
-+
-+		sample >>= 4;
-+
-+		*dst++ = sample | b;
-+	} while (src < end);
-+}
-+
-+static u32 parity(u32 sample)
-+{
-+	sample ^= sample >> 16;
-+	sample ^= sample >> 8;
-+	sample ^= sample >> 4;
-+	sample ^= sample >> 2;
-+	sample ^= sample >> 1;
-+	return (sample & 1) << 27;
-+}
-+
-+static void dw_hdmi_reformat_s24(struct snd_dw_hdmi *dw,
-+	size_t offset, size_t bytes)
-+{
-+	u32 *src = dw->buf_src + offset;
-+	u32 *dst = dw->buf_dst + offset;
-+	u32 *end = dw->buf_src + offset + bytes;
-+
-+	do {
-+		unsigned i;
-+		u8 *cs;
-+
-+		cs = dw->cs[dw->iec_offset++];
-+		if (dw->iec_offset >= 192)
-+			dw->iec_offset = 0;
-+
-+		i = dw->channels;
-+		do {
-+			u32 sample = *src++;
-+
-+			sample &= ~0xff000000;
-+			sample |= *cs++ << 24;
-+			sample |= parity(sample & ~0xf8000000);
-+
-+			*dst++ = sample;
-+		} while (--i);
-+	} while (src < end);
-+}
-+
-+static void dw_hdmi_create_cs(struct snd_dw_hdmi *dw,
-+	struct snd_pcm_runtime *runtime)
-+{
-+	u8 cs[4];
-+	unsigned ch, i, j;
-+
-+	snd_pcm_create_iec958_consumer(runtime, cs, sizeof(cs));
-+
-+	memset(dw->cs, 0, sizeof(dw->cs));
-+
-+	for (ch = 0; ch < 8; ch++) {
-+		cs[2] &= ~IEC958_AES2_CON_CHANNEL;
-+		cs[2] |= (ch + 1) << 4;
-+
-+		for (i = 0; i < ARRAY_SIZE(cs); i++) {
-+			unsigned c = cs[i];
-+
-+			for (j = 0; j < 8; j++, c >>= 1)
-+				dw->cs[i * 8 + j][ch] = (c & 1) << 2;
-+		}
-+	}
-+	dw->cs[0][0] |= BIT(4);
-+}
-+
-+static void dw_hdmi_start_dma(struct snd_dw_hdmi *dw)
-+{
-+	void __iomem *base = dw->data.base;
-+	unsigned offset = dw->buf_offset;
-+	unsigned period = dw->buf_period;
-+	u32 start, stop;
-+
-+	dw->reformat(dw, offset, period);
-+
-+	/* Clear all irqs before enabling irqs and starting DMA */
-+	writeb_relaxed(HDMI_IH_AHBDMAAUD_STAT0_ALL,
-+		       base + HDMI_IH_AHBDMAAUD_STAT0);
-+
-+	start = dw->buf_addr + offset;
-+	stop = start + period - 1;
-+
-+	/* Setup the hardware start/stop addresses */
-+	dw_hdmi_writel(start, base + HDMI_AHB_DMA_STRADDR0);
-+	dw_hdmi_writel(stop, base + HDMI_AHB_DMA_STPADDR0);
-+
-+	writeb_relaxed((u8)~HDMI_AHB_DMA_MASK_DONE, base + HDMI_AHB_DMA_MASK);
-+	writeb(HDMI_AHB_DMA_START_START, base + HDMI_AHB_DMA_START);
-+
-+	offset += period;
-+	if (offset >= dw->buf_size)
-+		offset = 0;
-+	dw->buf_offset = offset;
-+}
-+
-+static void dw_hdmi_stop_dma(struct snd_dw_hdmi *dw)
-+{
-+	/* Disable interrupts before disabling DMA */
-+	writeb_relaxed(~0, dw->data.base + HDMI_AHB_DMA_MASK);
-+	writeb_relaxed(HDMI_AHB_DMA_STOP_STOP, dw->data.base + HDMI_AHB_DMA_STOP);
-+}
-+
-+static irqreturn_t snd_dw_hdmi_irq(int irq, void *data)
-+{
-+	struct snd_dw_hdmi *dw = data;
-+	struct snd_pcm_substream *substream;
-+	unsigned stat;
-+
-+	stat = readb_relaxed(dw->data.base + HDMI_IH_AHBDMAAUD_STAT0);
-+	if (!stat)
-+		return IRQ_NONE;
-+
-+	writeb_relaxed(stat, dw->data.base + HDMI_IH_AHBDMAAUD_STAT0);
-+
-+	substream = dw->substream;
-+	if (stat & HDMI_IH_AHBDMAAUD_STAT0_DONE && substream) {
-+		snd_pcm_period_elapsed(substream);
-+
-+		spin_lock(&dw->lock);
-+		if (dw->substream)
-+			dw_hdmi_start_dma(dw);
-+		spin_unlock(&dw->lock);
-+	}
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static struct snd_pcm_hardware dw_hdmi_hw = {
-+	.info = SNDRV_PCM_INFO_INTERLEAVED |
-+		SNDRV_PCM_INFO_BLOCK_TRANSFER |
-+		SNDRV_PCM_INFO_MMAP |
-+		SNDRV_PCM_INFO_MMAP_VALID,
-+	.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE |
-+		   SNDRV_PCM_FMTBIT_S24_LE,
-+	.rates = SNDRV_PCM_RATE_32000 |
-+		 SNDRV_PCM_RATE_44100 |
-+		 SNDRV_PCM_RATE_48000 |
-+		 SNDRV_PCM_RATE_88200 |
-+		 SNDRV_PCM_RATE_96000 |
-+		 SNDRV_PCM_RATE_176400 |
-+		 SNDRV_PCM_RATE_192000,
-+	.channels_min = 2,
-+	.channels_max = 8,
-+	.buffer_bytes_max = 1024 * 1024,
-+	.period_bytes_min = 256,
-+	.period_bytes_max = 8192,	/* ERR004323: must limit to 8k */
-+	.periods_min = 2,
-+	.periods_max = 16,
-+	.fifo_size = 0,
-+};
-+
-+static int dw_hdmi_open(struct snd_pcm_substream *substream)
-+{
-+	struct snd_pcm_runtime *runtime = substream->runtime;
-+	struct snd_dw_hdmi *dw = substream->private_data;
-+	void __iomem *base = dw->data.base;
-+	int ret;
-+
-+	runtime->hw = dw_hdmi_hw;
-+
-+	ret = snd_pcm_hw_constraint_eld(runtime, dw->data.eld);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret = snd_pcm_limit_hw_rates(runtime);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret = snd_pcm_hw_constraint_integer(runtime,
-+					    SNDRV_PCM_HW_PARAM_PERIODS);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Limit the buffer size to the size of the preallocated buffer */
-+	ret = snd_pcm_hw_constraint_minmax(runtime,
-+					   SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
-+					   0, substream->dma_buffer.bytes);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Clear FIFO */
-+	writeb_relaxed(HDMI_AHB_DMA_CONF0_SW_FIFO_RST,
-+		       base + HDMI_AHB_DMA_CONF0);
-+
-+	/* Configure interrupt polarities */
-+	writeb_relaxed(~0, base + HDMI_AHB_DMA_POL);
-+	writeb_relaxed(~0, base + HDMI_AHB_DMA_BUFFPOL);
-+
-+	/* Keep interrupts masked, and clear any pending */
-+	writeb_relaxed(~0, base + HDMI_AHB_DMA_MASK);
-+	writeb_relaxed(~0, base + HDMI_IH_AHBDMAAUD_STAT0);
-+
-+	ret = request_irq(dw->data.irq, snd_dw_hdmi_irq, IRQF_SHARED,
-+			  "dw-hdmi-audio", dw);
-+	if (ret)
-+		return ret;
-+
-+	/* Un-mute done interrupt */
-+	writeb_relaxed(HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL &
-+		       ~HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE,
-+		       base + HDMI_IH_MUTE_AHBDMAAUD_STAT0);
-+
-+	return 0;
-+}
-+
-+static int dw_hdmi_close(struct snd_pcm_substream *substream)
-+{
-+	struct snd_dw_hdmi *dw = substream->private_data;
-+
-+	/* Mute all interrupts */
-+	writeb_relaxed(HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL,
-+		       dw->data.base + HDMI_IH_MUTE_AHBDMAAUD_STAT0);
-+
-+	free_irq(dw->data.irq, dw);
-+
-+	return 0;
-+}
-+
-+static int dw_hdmi_hw_free(struct snd_pcm_substream *substream)
-+{
-+	return snd_pcm_lib_free_vmalloc_buffer(substream);
-+}
-+
-+static int dw_hdmi_hw_params(struct snd_pcm_substream *substream,
-+	struct snd_pcm_hw_params *params)
-+{
-+	/* Allocate the PCM runtime buffer, which is exposed to userspace. */
-+	return snd_pcm_lib_alloc_vmalloc_buffer(substream,
-+						params_buffer_bytes(params));
-+}
-+
-+static int dw_hdmi_prepare(struct snd_pcm_substream *substream)
-+{
-+	struct snd_pcm_runtime *runtime = substream->runtime;
-+	struct snd_dw_hdmi *dw = substream->private_data;
-+	u8 threshold, conf0, conf1, layout, ca;
-+
-+	/* Setup as per 3.0.5 FSL 4.1.0 BSP */
-+	switch (dw->revision) {
-+	case 0x0a:
-+		conf0 = HDMI_AHB_DMA_CONF0_BURST_MODE |
-+			HDMI_AHB_DMA_CONF0_INCR4;
-+		if (runtime->channels == 2)
-+			threshold = 126;
-+		else
-+			threshold = 124;
-+		break;
-+	case 0x1a:
-+		conf0 = HDMI_AHB_DMA_CONF0_BURST_MODE |
-+			HDMI_AHB_DMA_CONF0_INCR8;
-+		threshold = 128;
-+		break;
-+	default:
-+		/* NOTREACHED */
-+		return -EINVAL;
-+	}
-+
-+	dw_hdmi_set_sample_rate(dw->data.hdmi, runtime->rate);
-+
-+	/* Minimum number of bytes in the fifo. */
-+	runtime->hw.fifo_size = threshold * 32;
-+
-+	conf0 |= HDMI_AHB_DMA_CONF0_EN_HLOCK;
-+	conf1 = default_hdmi_channel_config[runtime->channels - 2].conf1;
-+	ca = default_hdmi_channel_config[runtime->channels - 2].ca;
-+
-+	/*
-+	 * For >2 channel PCM audio, we need to select layout 1
-+	 * and set an appropriate channel map.
-+	 */
-+	if (runtime->channels > 2)
-+		layout = HDMI_FC_AUDSCONF_LAYOUT1;
-+	else
-+		layout = HDMI_FC_AUDSCONF_LAYOUT0;
-+
-+	writeb_relaxed(threshold, dw->data.base + HDMI_AHB_DMA_THRSLD);
-+	writeb_relaxed(conf0, dw->data.base + HDMI_AHB_DMA_CONF0);
-+	writeb_relaxed(conf1, dw->data.base + HDMI_AHB_DMA_CONF1);
-+	writeb_relaxed(layout, dw->data.base + HDMI_FC_AUDSCONF);
-+	writeb_relaxed(ca, dw->data.base + HDMI_FC_AUDICONF2);
-+
-+	switch (runtime->format) {
-+	case SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE:
-+		dw->reformat = dw_hdmi_reformat_iec958;
-+		break;
-+	case SNDRV_PCM_FORMAT_S24_LE:
-+		dw_hdmi_create_cs(dw, runtime);
-+		dw->reformat = dw_hdmi_reformat_s24;
-+		break;
-+	}
-+	dw->iec_offset = 0;
-+	dw->channels = runtime->channels;
-+	dw->buf_src  = runtime->dma_area;
-+	dw->buf_dst  = substream->dma_buffer.area;
-+	dw->buf_addr = substream->dma_buffer.addr;
-+	dw->buf_period = snd_pcm_lib_period_bytes(substream);
-+	dw->buf_size = snd_pcm_lib_buffer_bytes(substream);
-+
-+	return 0;
-+}
-+
-+static int dw_hdmi_trigger(struct snd_pcm_substream *substream, int cmd)
-+{
-+	struct snd_dw_hdmi *dw = substream->private_data;
-+	unsigned long flags;
-+	int ret = 0;
-+
-+	switch (cmd) {
-+	case SNDRV_PCM_TRIGGER_START:
-+		spin_lock_irqsave(&dw->lock, flags);
-+		dw->buf_offset = 0;
-+		dw->substream = substream;
-+		dw_hdmi_start_dma(dw);
-+		dw_hdmi_audio_enable(dw->data.hdmi);
-+		spin_unlock_irqrestore(&dw->lock, flags);
-+		substream->runtime->delay = substream->runtime->period_size;
-+		break;
-+
-+	case SNDRV_PCM_TRIGGER_STOP:
-+		spin_lock_irqsave(&dw->lock, flags);
-+		dw->substream = NULL;
-+		dw_hdmi_stop_dma(dw);
-+		dw_hdmi_audio_disable(dw->data.hdmi);
-+		spin_unlock_irqrestore(&dw->lock, flags);
-+		break;
-+
-+	default:
-+		ret = -EINVAL;
-+		break;
-+	}
-+
-+	return ret;
-+}
-+
-+static snd_pcm_uframes_t dw_hdmi_pointer(struct snd_pcm_substream *substream)
-+{
-+	struct snd_pcm_runtime *runtime = substream->runtime;
-+	struct snd_dw_hdmi *dw = substream->private_data;
-+
-+	/*
-+	 * We are unable to report the exact hardware position as
-+	 * reading the 32-bit DMA position using 8-bit reads is racy.
-+	 */
-+	return bytes_to_frames(runtime, dw->buf_offset);
-+}
-+
-+static struct snd_pcm_ops snd_dw_hdmi_ops = {
-+	.open = dw_hdmi_open,
-+	.close = dw_hdmi_close,
-+	.ioctl = snd_pcm_lib_ioctl,
-+	.hw_params = dw_hdmi_hw_params,
-+	.hw_free = dw_hdmi_hw_free,
-+	.prepare = dw_hdmi_prepare,
-+	.trigger = dw_hdmi_trigger,
-+	.pointer = dw_hdmi_pointer,
-+	.page = snd_pcm_lib_get_vmalloc_page,
-+};
-+
-+static int snd_dw_hdmi_probe(struct platform_device *pdev)
-+{
-+	const struct dw_hdmi_audio_data *data = pdev->dev.platform_data;
-+	struct device *dev = pdev->dev.parent;
-+	struct snd_dw_hdmi *dw;
-+	struct snd_card *card;
-+	struct snd_pcm *pcm;
-+	unsigned revision;
-+	int ret;
-+
-+	writeb_relaxed(HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL,
-+		       data->base + HDMI_IH_MUTE_AHBDMAAUD_STAT0);
-+	revision = readb_relaxed(data->base + HDMI_REVISION_ID);
-+	if (revision != 0x0a && revision != 0x1a) {
-+		dev_err(dev, "dw-hdmi-audio: unknown revision 0x%02x\n",
-+			revision);
-+		return -ENXIO;
-+	}
-+
-+	ret = snd_card_new(dev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
-+			      THIS_MODULE, sizeof(struct snd_dw_hdmi), &card);
-+	if (ret < 0)
-+		return ret;
-+
-+	strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver));
-+	strlcpy(card->shortname, "DW-HDMI", sizeof(card->shortname));
-+	snprintf(card->longname, sizeof(card->longname),
-+		 "%s rev 0x%02x, irq %d", card->shortname, revision,
-+		 data->irq);
-+
-+	dw = card->private_data;
-+	dw->card = card;
-+	dw->data = *data;
-+	dw->revision = revision;
-+
-+	spin_lock_init(&dw->lock);
-+
-+	ret = snd_pcm_new(card, "DW HDMI", 0, 1, 0, &pcm);
-+	if (ret < 0)
-+		goto err;
-+
-+	dw->pcm = pcm;
-+	pcm->private_data = dw;
-+	strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
-+	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_dw_hdmi_ops);
-+
-+	/*
-+	 * To support 8-channel 96kHz audio reliably, we need 512k
-+	 * to satisfy alsa with our restricted period (ERR004323).
-+	 */
-+	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
-+			dev, 128 * 1024, 1024 * 1024);
-+
-+	ret = snd_card_register(card);
-+	if (ret < 0)
-+		goto err;
-+
-+	platform_set_drvdata(pdev, dw);
-+
-+	return 0;
-+
-+err:
-+	snd_card_free(card);
-+	return ret;
-+}
-+
-+static int snd_dw_hdmi_remove(struct platform_device *pdev)
-+{
-+	struct snd_dw_hdmi *dw = platform_get_drvdata(pdev);
-+
-+	snd_card_free(dw->card);
-+
-+	return 0;
-+}
-+
-+#if defined(CONFIG_PM_SLEEP) && defined(IS_NOT_BROKEN)
-+/*
-+ * This code is fine, but requires implementation in the dw_hdmi_trigger()
-+ * method which is currently missing as I have no way to test this.
-+ */
-+static int snd_dw_hdmi_suspend(struct device *dev)
-+{
-+	struct snd_dw_hdmi *dw = dev_get_drvdata(dev);
-+
-+	snd_power_change_state(dw->card, SNDRV_CTL_POWER_D3cold);
-+	snd_pcm_suspend_all(dw->pcm);
-+
-+	return 0;
-+}
-+
-+static int snd_dw_hdmi_resume(struct device *dev)
-+{
-+	struct snd_dw_hdmi *dw = dev_get_drvdata(dev);
-+
-+	snd_power_change_state(dw->card, SNDRV_CTL_POWER_D0);
-+
-+	return 0;
-+}
-+
-+static SIMPLE_DEV_PM_OPS(snd_dw_hdmi_pm, snd_dw_hdmi_suspend,
-+			 snd_dw_hdmi_resume);
-+#define PM_OPS &snd_dw_hdmi_pm
-+#else
-+#define PM_OPS NULL
-+#endif
-+
-+static struct platform_driver snd_dw_hdmi_driver = {
-+	.probe	= snd_dw_hdmi_probe,
-+	.remove	= snd_dw_hdmi_remove,
-+	.driver	= {
-+		.name = DRIVER_NAME,
-+		.pm = PM_OPS,
-+	},
-+};
-+
-+module_platform_driver(snd_dw_hdmi_driver);
-+
-+MODULE_AUTHOR("Russell King <rmk+kernel@arm.linux.org.uk>");
-+MODULE_DESCRIPTION("Synopsis Designware HDMI AHB ALSA interface");
-+MODULE_LICENSE("GPL v2");
-+MODULE_ALIAS("platform:" DRIVER_NAME);
---- /dev/null
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h
-@@ -0,0 +1,21 @@
-+#ifndef DW_HDMI_AUDIO_H
-+#define DW_HDMI_AUDIO_H
-+
-+struct dw_hdmi;
-+
-+struct dw_hdmi_audio_data {
-+	phys_addr_t phys;
-+	void __iomem *base;
-+	int irq;
-+	struct dw_hdmi *hdmi;
-+	u8 *eld;
-+};
-+
-+struct dw_hdmi_i2s_audio_data {
-+	struct dw_hdmi *hdmi;
-+
-+	void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
-+	u8 (*read)(struct dw_hdmi *hdmi, int offset);
-+};
-+
-+#endif
---- /dev/null
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
-@@ -0,0 +1,141 @@
-+/*
-+ * dw-hdmi-i2s-audio.c
-+ *
-+ * Copyright (c) 2016 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <drm/bridge/dw_hdmi.h>
-+
-+#include <sound/hdmi-codec.h>
-+
-+#include "dw-hdmi.h"
-+#include "dw-hdmi-audio.h"
-+
-+#define DRIVER_NAME "dw-hdmi-i2s-audio"
-+
-+static inline void hdmi_write(struct dw_hdmi_i2s_audio_data *audio,
-+			      u8 val, int offset)
-+{
-+	struct dw_hdmi *hdmi = audio->hdmi;
-+
-+	audio->write(hdmi, val, offset);
-+}
-+
-+static inline u8 hdmi_read(struct dw_hdmi_i2s_audio_data *audio, int offset)
-+{
-+	struct dw_hdmi *hdmi = audio->hdmi;
-+
-+	return audio->read(hdmi, offset);
-+}
-+
-+static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
-+				 struct hdmi_codec_daifmt *fmt,
-+				 struct hdmi_codec_params *hparms)
-+{
-+	struct dw_hdmi_i2s_audio_data *audio = data;
-+	struct dw_hdmi *hdmi = audio->hdmi;
-+	u8 conf0 = 0;
-+	u8 conf1 = 0;
-+	u8 inputclkfs = 0;
-+
-+	/* it cares I2S only */
-+	if ((fmt->fmt != HDMI_I2S) ||
-+	    (fmt->bit_clk_master | fmt->frame_clk_master)) {
-+		dev_err(dev, "unsupported format/settings\n");
-+		return -EINVAL;
-+	}
-+
-+	inputclkfs	= HDMI_AUD_INPUTCLKFS_64FS;
-+	conf0		= HDMI_AUD_CONF0_I2S_ALL_ENABLE;
-+
-+	switch (hparms->sample_width) {
-+	case 16:
-+		conf1 = HDMI_AUD_CONF1_WIDTH_16;
-+		break;
-+	case 24:
-+	case 32:
-+		conf1 = HDMI_AUD_CONF1_WIDTH_24;
-+		break;
-+	}
-+
-+	dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate);
-+
-+	hdmi_write(audio, inputclkfs, HDMI_AUD_INPUTCLKFS);
-+	hdmi_write(audio, conf0, HDMI_AUD_CONF0);
-+	hdmi_write(audio, conf1, HDMI_AUD_CONF1);
-+
-+	dw_hdmi_audio_enable(hdmi);
-+
-+	return 0;
-+}
-+
-+static void dw_hdmi_i2s_audio_shutdown(struct device *dev, void *data)
-+{
-+	struct dw_hdmi_i2s_audio_data *audio = data;
-+	struct dw_hdmi *hdmi = audio->hdmi;
-+
-+	dw_hdmi_audio_disable(hdmi);
-+
-+	hdmi_write(audio, HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0);
-+}
-+
-+static struct hdmi_codec_ops dw_hdmi_i2s_ops = {
-+	.hw_params	= dw_hdmi_i2s_hw_params,
-+	.audio_shutdown	= dw_hdmi_i2s_audio_shutdown,
-+};
-+
-+static int snd_dw_hdmi_probe(struct platform_device *pdev)
-+{
-+	struct dw_hdmi_i2s_audio_data *audio = pdev->dev.platform_data;
-+	struct platform_device_info pdevinfo;
-+	struct hdmi_codec_pdata pdata;
-+	struct platform_device *platform;
-+
-+	pdata.ops		= &dw_hdmi_i2s_ops;
-+	pdata.i2s		= 1;
-+	pdata.max_i2s_channels	= 6;
-+	pdata.data		= audio;
-+
-+	memset(&pdevinfo, 0, sizeof(pdevinfo));
-+	pdevinfo.parent		= pdev->dev.parent;
-+	pdevinfo.id		= PLATFORM_DEVID_AUTO;
-+	pdevinfo.name		= HDMI_CODEC_DRV_NAME;
-+	pdevinfo.data		= &pdata;
-+	pdevinfo.size_data	= sizeof(pdata);
-+	pdevinfo.dma_mask	= DMA_BIT_MASK(32);
-+
-+	platform = platform_device_register_full(&pdevinfo);
-+	if (IS_ERR(platform))
-+		return PTR_ERR(platform);
-+
-+	dev_set_drvdata(&pdev->dev, platform);
-+
-+	return 0;
-+}
-+
-+static int snd_dw_hdmi_remove(struct platform_device *pdev)
-+{
-+	struct platform_device *platform = dev_get_drvdata(&pdev->dev);
-+
-+	platform_device_unregister(platform);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver snd_dw_hdmi_driver = {
-+	.probe	= snd_dw_hdmi_probe,
-+	.remove	= snd_dw_hdmi_remove,
-+	.driver	= {
-+		.name = DRIVER_NAME,
-+		.owner = THIS_MODULE,
-+	},
-+};
-+module_platform_driver(snd_dw_hdmi_driver);
-+
-+MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
-+MODULE_DESCRIPTION("Synopsis Designware HDMI I2S ALSA SoC interface");
-+MODULE_LICENSE("GPL v2");
-+MODULE_ALIAS("platform:" DRIVER_NAME);
---- /dev/null
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-@@ -0,0 +1,2314 @@
-+/*
-+ * DesignWare High-Definition Multimedia Interface (HDMI) driver
-+ *
-+ * Copyright (C) 2013-2015 Mentor Graphics Inc.
-+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
-+ * Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ */
-+#include <linux/module.h>
-+#include <linux/irq.h>
-+#include <linux/delay.h>
-+#include <linux/err.h>
-+#include <linux/clk.h>
-+#include <linux/hdmi.h>
-+#include <linux/mutex.h>
-+#include <linux/of_device.h>
-+#include <linux/regmap.h>
-+#include <linux/spinlock.h>
-+
-+#include <drm/drm_of.h>
-+#include <drm/drmP.h>
-+#include <drm/drm_atomic_helper.h>
-+#include <drm/drm_crtc_helper.h>
-+#include <drm/drm_edid.h>
-+#include <drm/drm_encoder_slave.h>
-+#include <drm/bridge/dw_hdmi.h>
-+
-+#include "dw-hdmi.h"
-+#include "dw-hdmi-audio.h"
-+
-+#define HDMI_EDID_LEN		512
-+
-+#define RGB			0
-+#define YCBCR444		1
-+#define YCBCR422_16BITS		2
-+#define YCBCR422_8BITS		3
-+#define XVYCC444		4
-+
-+enum hdmi_datamap {
-+	RGB444_8B = 0x01,
-+	RGB444_10B = 0x03,
-+	RGB444_12B = 0x05,
-+	RGB444_16B = 0x07,
-+	YCbCr444_8B = 0x09,
-+	YCbCr444_10B = 0x0B,
-+	YCbCr444_12B = 0x0D,
-+	YCbCr444_16B = 0x0F,
-+	YCbCr422_8B = 0x16,
-+	YCbCr422_10B = 0x14,
-+	YCbCr422_12B = 0x12,
-+};
-+
-+static const u16 csc_coeff_default[3][4] = {
-+	{ 0x2000, 0x0000, 0x0000, 0x0000 },
-+	{ 0x0000, 0x2000, 0x0000, 0x0000 },
-+	{ 0x0000, 0x0000, 0x2000, 0x0000 }
-+};
-+
-+static const u16 csc_coeff_rgb_out_eitu601[3][4] = {
-+	{ 0x2000, 0x6926, 0x74fd, 0x010e },
-+	{ 0x2000, 0x2cdd, 0x0000, 0x7e9a },
-+	{ 0x2000, 0x0000, 0x38b4, 0x7e3b }
-+};
-+
-+static const u16 csc_coeff_rgb_out_eitu709[3][4] = {
-+	{ 0x2000, 0x7106, 0x7a02, 0x00a7 },
-+	{ 0x2000, 0x3264, 0x0000, 0x7e6d },
-+	{ 0x2000, 0x0000, 0x3b61, 0x7e25 }
-+};
-+
-+static const u16 csc_coeff_rgb_in_eitu601[3][4] = {
-+	{ 0x2591, 0x1322, 0x074b, 0x0000 },
-+	{ 0x6535, 0x2000, 0x7acc, 0x0200 },
-+	{ 0x6acd, 0x7534, 0x2000, 0x0200 }
-+};
-+
-+static const u16 csc_coeff_rgb_in_eitu709[3][4] = {
-+	{ 0x2dc5, 0x0d9b, 0x049e, 0x0000 },
-+	{ 0x62f0, 0x2000, 0x7d11, 0x0200 },
-+	{ 0x6756, 0x78ab, 0x2000, 0x0200 }
-+};
-+
-+struct hdmi_vmode {
-+	bool mdataenablepolarity;
-+
-+	unsigned int mpixelclock;
-+	unsigned int mpixelrepetitioninput;
-+	unsigned int mpixelrepetitionoutput;
-+};
-+
-+struct hdmi_data_info {
-+	unsigned int enc_in_format;
-+	unsigned int enc_out_format;
-+	unsigned int enc_color_depth;
-+	unsigned int colorimetry;
-+	unsigned int pix_repet_factor;
-+	unsigned int hdcp_enable;
-+	struct hdmi_vmode video_mode;
-+};
-+
-+struct dw_hdmi_i2c {
-+	struct i2c_adapter	adap;
-+
-+	struct mutex		lock;	/* used to serialize data transfers */
-+	struct completion	cmp;
-+	u8			stat;
-+
-+	u8			slave_reg;
-+	bool			is_regaddr;
-+};
-+
-+struct dw_hdmi_phy_data {
-+	enum dw_hdmi_phy_type type;
-+	const char *name;
-+	unsigned int gen;
-+	bool has_svsret;
-+	int (*configure)(struct dw_hdmi *hdmi,
-+			 const struct dw_hdmi_plat_data *pdata,
-+			 unsigned long mpixelclock);
-+};
-+
-+struct dw_hdmi {
-+	struct drm_connector connector;
-+	struct drm_bridge bridge;
-+
-+	unsigned int version;
-+
-+	struct platform_device *audio;
-+	struct device *dev;
-+	struct clk *isfr_clk;
-+	struct clk *iahb_clk;
-+	struct dw_hdmi_i2c *i2c;
-+
-+	struct hdmi_data_info hdmi_data;
-+	const struct dw_hdmi_plat_data *plat_data;
-+
-+	int vic;
-+
-+	u8 edid[HDMI_EDID_LEN];
-+	bool cable_plugin;
-+
-+	struct {
-+		const struct dw_hdmi_phy_ops *ops;
-+		const char *name;
-+		void *data;
-+		bool enabled;
-+	} phy;
-+
-+	struct drm_display_mode previous_mode;
-+
-+	struct i2c_adapter *ddc;
-+	void __iomem *regs;
-+	bool sink_is_hdmi;
-+	bool sink_has_audio;
-+
-+	struct mutex mutex;		/* for state below and previous_mode */
-+	enum drm_connector_force force;	/* mutex-protected force state */
-+	bool disabled;			/* DRM has disabled our bridge */
-+	bool bridge_is_on;		/* indicates the bridge is on */
-+	bool rxsense;			/* rxsense state */
-+	u8 phy_mask;			/* desired phy int mask settings */
-+
-+	spinlock_t audio_lock;
-+	struct mutex audio_mutex;
-+	unsigned int sample_rate;
-+	unsigned int audio_cts;
-+	unsigned int audio_n;
-+	bool audio_enable;
-+
-+	unsigned int reg_shift;
-+	struct regmap *regm;
-+};
-+
-+#define HDMI_IH_PHY_STAT0_RX_SENSE \
-+	(HDMI_IH_PHY_STAT0_RX_SENSE0 | HDMI_IH_PHY_STAT0_RX_SENSE1 | \
-+	 HDMI_IH_PHY_STAT0_RX_SENSE2 | HDMI_IH_PHY_STAT0_RX_SENSE3)
-+
-+#define HDMI_PHY_RX_SENSE \
-+	(HDMI_PHY_RX_SENSE0 | HDMI_PHY_RX_SENSE1 | \
-+	 HDMI_PHY_RX_SENSE2 | HDMI_PHY_RX_SENSE3)
-+
-+static inline void hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset)
-+{
-+	regmap_write(hdmi->regm, offset << hdmi->reg_shift, val);
-+}
-+
-+static inline u8 hdmi_readb(struct dw_hdmi *hdmi, int offset)
-+{
-+	unsigned int val = 0;
-+
-+	regmap_read(hdmi->regm, offset << hdmi->reg_shift, &val);
-+
-+	return val;
-+}
-+
-+static void hdmi_modb(struct dw_hdmi *hdmi, u8 data, u8 mask, unsigned reg)
-+{
-+	regmap_update_bits(hdmi->regm, reg << hdmi->reg_shift, mask, data);
-+}
-+
-+static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg,
-+			     u8 shift, u8 mask)
-+{
-+	hdmi_modb(hdmi, data << shift, mask, reg);
-+}
-+
-+static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi)
-+{
-+	/* Software reset */
-+	hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
-+
-+	/* Set Standard Mode speed (determined to be 100KHz on iMX6) */
-+	hdmi_writeb(hdmi, 0x00, HDMI_I2CM_DIV);
-+
-+	/* Set done, not acknowledged and arbitration interrupt polarities */
-+	hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
-+	hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL | HDMI_I2CM_CTLINT_ARB_POL,
-+		    HDMI_I2CM_CTLINT);
-+
-+	/* Clear DONE and ERROR interrupts */
-+	hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
-+		    HDMI_IH_I2CM_STAT0);
-+
-+	/* Mute DONE and ERROR interrupts */
-+	hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
-+		    HDMI_IH_MUTE_I2CM_STAT0);
-+}
-+
-+static int dw_hdmi_i2c_read(struct dw_hdmi *hdmi,
-+			    unsigned char *buf, unsigned int length)
-+{
-+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
-+	int stat;
-+
-+	if (!i2c->is_regaddr) {
-+		dev_dbg(hdmi->dev, "set read register address to 0\n");
-+		i2c->slave_reg = 0x00;
-+		i2c->is_regaddr = true;
-+	}
-+
-+	while (length--) {
-+		reinit_completion(&i2c->cmp);
-+
-+		hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
-+		hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ,
-+			    HDMI_I2CM_OPERATION);
-+
-+		stat = wait_for_completion_timeout(&i2c->cmp, HZ / 10);
-+		if (!stat)
-+			return -EAGAIN;
-+
-+		/* Check for error condition on the bus */
-+		if (i2c->stat & HDMI_IH_I2CM_STAT0_ERROR)
-+			return -EIO;
-+
-+		*buf++ = hdmi_readb(hdmi, HDMI_I2CM_DATAI);
-+	}
-+
-+	return 0;
-+}
-+
-+static int dw_hdmi_i2c_write(struct dw_hdmi *hdmi,
-+			     unsigned char *buf, unsigned int length)
-+{
-+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
-+	int stat;
-+
-+	if (!i2c->is_regaddr) {
-+		/* Use the first write byte as register address */
-+		i2c->slave_reg = buf[0];
-+		length--;
-+		buf++;
-+		i2c->is_regaddr = true;
-+	}
-+
-+	while (length--) {
-+		reinit_completion(&i2c->cmp);
-+
-+		hdmi_writeb(hdmi, *buf++, HDMI_I2CM_DATAO);
-+		hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
-+		hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_WRITE,
-+			    HDMI_I2CM_OPERATION);
-+
-+		stat = wait_for_completion_timeout(&i2c->cmp, HZ / 10);
-+		if (!stat)
-+			return -EAGAIN;
-+
-+		/* Check for error condition on the bus */
-+		if (i2c->stat & HDMI_IH_I2CM_STAT0_ERROR)
-+			return -EIO;
-+	}
-+
-+	return 0;
-+}
-+
-+static int dw_hdmi_i2c_xfer(struct i2c_adapter *adap,
-+			    struct i2c_msg *msgs, int num)
-+{
-+	struct dw_hdmi *hdmi = i2c_get_adapdata(adap);
-+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
-+	u8 addr = msgs[0].addr;
-+	int i, ret = 0;
-+
-+	dev_dbg(hdmi->dev, "xfer: num: %d, addr: %#x\n", num, addr);
-+
-+	for (i = 0; i < num; i++) {
-+		if (msgs[i].addr != addr) {
-+			dev_warn(hdmi->dev,
-+				 "unsupported transfer, changed slave address\n");
-+			return -EOPNOTSUPP;
-+		}
-+
-+		if (msgs[i].len == 0) {
-+			dev_dbg(hdmi->dev,
-+				"unsupported transfer %d/%d, no data\n",
-+				i + 1, num);
-+			return -EOPNOTSUPP;
-+		}
-+	}
-+
-+	mutex_lock(&i2c->lock);
-+
-+	/* Unmute DONE and ERROR interrupts */
-+	hdmi_writeb(hdmi, 0x00, HDMI_IH_MUTE_I2CM_STAT0);
-+
-+	/* Set slave device address taken from the first I2C message */
-+	hdmi_writeb(hdmi, addr, HDMI_I2CM_SLAVE);
-+
-+	/* Set slave device register address on transfer */
-+	i2c->is_regaddr = false;
-+
-+	for (i = 0; i < num; i++) {
-+		dev_dbg(hdmi->dev, "xfer: num: %d/%d, len: %d, flags: %#x\n",
-+			i + 1, num, msgs[i].len, msgs[i].flags);
-+
-+		if (msgs[i].flags & I2C_M_RD)
-+			ret = dw_hdmi_i2c_read(hdmi, msgs[i].buf, msgs[i].len);
-+		else
-+			ret = dw_hdmi_i2c_write(hdmi, msgs[i].buf, msgs[i].len);
-+
-+		if (ret < 0)
-+			break;
-+	}
-+
-+	if (!ret)
-+		ret = num;
-+
-+	/* Mute DONE and ERROR interrupts */
-+	hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
-+		    HDMI_IH_MUTE_I2CM_STAT0);
-+
-+	mutex_unlock(&i2c->lock);
-+
-+	return ret;
-+}
-+
-+static u32 dw_hdmi_i2c_func(struct i2c_adapter *adapter)
-+{
-+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
-+}
-+
-+static const struct i2c_algorithm dw_hdmi_algorithm = {
-+	.master_xfer	= dw_hdmi_i2c_xfer,
-+	.functionality	= dw_hdmi_i2c_func,
-+};
-+
-+static struct i2c_adapter *dw_hdmi_i2c_adapter(struct dw_hdmi *hdmi)
-+{
-+	struct i2c_adapter *adap;
-+	struct dw_hdmi_i2c *i2c;
-+	int ret;
-+
-+	i2c = devm_kzalloc(hdmi->dev, sizeof(*i2c), GFP_KERNEL);
-+	if (!i2c)
-+		return ERR_PTR(-ENOMEM);
-+
-+	mutex_init(&i2c->lock);
-+	init_completion(&i2c->cmp);
-+
-+	adap = &i2c->adap;
-+	adap->class = I2C_CLASS_DDC;
-+	adap->owner = THIS_MODULE;
-+	adap->dev.parent = hdmi->dev;
-+	adap->algo = &dw_hdmi_algorithm;
-+	strlcpy(adap->name, "DesignWare HDMI", sizeof(adap->name));
-+	i2c_set_adapdata(adap, hdmi);
-+
-+	ret = i2c_add_adapter(adap);
-+	if (ret) {
-+		dev_warn(hdmi->dev, "cannot add %s I2C adapter\n", adap->name);
-+		devm_kfree(hdmi->dev, i2c);
-+		return ERR_PTR(ret);
-+	}
-+
-+	hdmi->i2c = i2c;
-+
-+	dev_info(hdmi->dev, "registered %s I2C bus driver\n", adap->name);
-+
-+	return adap;
-+}
-+
-+static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts,
-+			   unsigned int n)
-+{
-+	/* Must be set/cleared first */
-+	hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
-+
-+	/* nshift factor = 0 */
-+	hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3);
-+
-+	hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) |
-+		    HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
-+	hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2);
-+	hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1);
-+
-+	hdmi_writeb(hdmi, (n >> 16) & 0x0f, HDMI_AUD_N3);
-+	hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2);
-+	hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1);
-+}
-+
-+static unsigned int hdmi_compute_n(unsigned int freq, unsigned long pixel_clk)
-+{
-+	unsigned int n = (128 * freq) / 1000;
-+	unsigned int mult = 1;
-+
-+	while (freq > 48000) {
-+		mult *= 2;
-+		freq /= 2;
-+	}
-+
-+	switch (freq) {
-+	case 32000:
-+		if (pixel_clk == 25175000)
-+			n = 4576;
-+		else if (pixel_clk == 27027000)
-+			n = 4096;
-+		else if (pixel_clk == 74176000 || pixel_clk == 148352000)
-+			n = 11648;
-+		else
-+			n = 4096;
-+		n *= mult;
-+		break;
-+
-+	case 44100:
-+		if (pixel_clk == 25175000)
-+			n = 7007;
-+		else if (pixel_clk == 74176000)
-+			n = 17836;
-+		else if (pixel_clk == 148352000)
-+			n = 8918;
-+		else
-+			n = 6272;
-+		n *= mult;
-+		break;
-+
-+	case 48000:
-+		if (pixel_clk == 25175000)
-+			n = 6864;
-+		else if (pixel_clk == 27027000)
-+			n = 6144;
-+		else if (pixel_clk == 74176000)
-+			n = 11648;
-+		else if (pixel_clk == 148352000)
-+			n = 5824;
-+		else
-+			n = 6144;
-+		n *= mult;
-+		break;
-+
-+	default:
-+		break;
-+	}
-+
-+	return n;
-+}
-+
-+static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi,
-+	unsigned long pixel_clk, unsigned int sample_rate)
-+{
-+	unsigned long ftdms = pixel_clk;
-+	unsigned int n, cts;
-+	u64 tmp;
-+
-+	n = hdmi_compute_n(sample_rate, pixel_clk);
-+
-+	/*
-+	 * Compute the CTS value from the N value.  Note that CTS and N
-+	 * can be up to 20 bits in total, so we need 64-bit math.  Also
-+	 * note that our TDMS clock is not fully accurate; it is accurate
-+	 * to kHz.  This can introduce an unnecessary remainder in the
-+	 * calculation below, so we don't try to warn about that.
-+	 */
-+	tmp = (u64)ftdms * n;
-+	do_div(tmp, 128 * sample_rate);
-+	cts = tmp;
-+
-+	dev_dbg(hdmi->dev, "%s: fs=%uHz ftdms=%lu.%03luMHz N=%d cts=%d\n",
-+		__func__, sample_rate, ftdms / 1000000, (ftdms / 1000) % 1000,
-+		n, cts);
-+
-+	spin_lock_irq(&hdmi->audio_lock);
-+	hdmi->audio_n = n;
-+	hdmi->audio_cts = cts;
-+	hdmi_set_cts_n(hdmi, cts, hdmi->audio_enable ? n : 0);
-+	spin_unlock_irq(&hdmi->audio_lock);
-+}
-+
-+static void hdmi_init_clk_regenerator(struct dw_hdmi *hdmi)
-+{
-+	mutex_lock(&hdmi->audio_mutex);
-+	hdmi_set_clk_regenerator(hdmi, 74250000, hdmi->sample_rate);
-+	mutex_unlock(&hdmi->audio_mutex);
-+}
-+
-+static void hdmi_clk_regenerator_update_pixel_clock(struct dw_hdmi *hdmi)
-+{
-+	mutex_lock(&hdmi->audio_mutex);
-+	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock,
-+				 hdmi->sample_rate);
-+	mutex_unlock(&hdmi->audio_mutex);
-+}
-+
-+void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate)
-+{
-+	mutex_lock(&hdmi->audio_mutex);
-+	hdmi->sample_rate = rate;
-+	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock,
-+				 hdmi->sample_rate);
-+	mutex_unlock(&hdmi->audio_mutex);
-+}
-+EXPORT_SYMBOL_GPL(dw_hdmi_set_sample_rate);
-+
-+void dw_hdmi_audio_enable(struct dw_hdmi *hdmi)
-+{
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&hdmi->audio_lock, flags);
-+	hdmi->audio_enable = true;
-+	hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n);
-+	spin_unlock_irqrestore(&hdmi->audio_lock, flags);
-+}
-+EXPORT_SYMBOL_GPL(dw_hdmi_audio_enable);
-+
-+void dw_hdmi_audio_disable(struct dw_hdmi *hdmi)
-+{
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&hdmi->audio_lock, flags);
-+	hdmi->audio_enable = false;
-+	hdmi_set_cts_n(hdmi, hdmi->audio_cts, 0);
-+	spin_unlock_irqrestore(&hdmi->audio_lock, flags);
-+}
-+EXPORT_SYMBOL_GPL(dw_hdmi_audio_disable);
-+
-+/*
-+ * this submodule is responsible for the video data synchronization.
-+ * for example, for RGB 4:4:4 input, the data map is defined as
-+ *			pin{47~40} <==> R[7:0]
-+ *			pin{31~24} <==> G[7:0]
-+ *			pin{15~8}  <==> B[7:0]
-+ */
-+static void hdmi_video_sample(struct dw_hdmi *hdmi)
-+{
-+	int color_format = 0;
-+	u8 val;
-+
-+	if (hdmi->hdmi_data.enc_in_format == RGB) {
-+		if (hdmi->hdmi_data.enc_color_depth == 8)
-+			color_format = 0x01;
-+		else if (hdmi->hdmi_data.enc_color_depth == 10)
-+			color_format = 0x03;
-+		else if (hdmi->hdmi_data.enc_color_depth == 12)
-+			color_format = 0x05;
-+		else if (hdmi->hdmi_data.enc_color_depth == 16)
-+			color_format = 0x07;
-+		else
-+			return;
-+	} else if (hdmi->hdmi_data.enc_in_format == YCBCR444) {
-+		if (hdmi->hdmi_data.enc_color_depth == 8)
-+			color_format = 0x09;
-+		else if (hdmi->hdmi_data.enc_color_depth == 10)
-+			color_format = 0x0B;
-+		else if (hdmi->hdmi_data.enc_color_depth == 12)
-+			color_format = 0x0D;
-+		else if (hdmi->hdmi_data.enc_color_depth == 16)
-+			color_format = 0x0F;
-+		else
-+			return;
-+	} else if (hdmi->hdmi_data.enc_in_format == YCBCR422_8BITS) {
-+		if (hdmi->hdmi_data.enc_color_depth == 8)
-+			color_format = 0x16;
-+		else if (hdmi->hdmi_data.enc_color_depth == 10)
-+			color_format = 0x14;
-+		else if (hdmi->hdmi_data.enc_color_depth == 12)
-+			color_format = 0x12;
-+		else
-+			return;
-+	}
-+
-+	val = HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE |
-+		((color_format << HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET) &
-+		HDMI_TX_INVID0_VIDEO_MAPPING_MASK);
-+	hdmi_writeb(hdmi, val, HDMI_TX_INVID0);
-+
-+	/* Enable TX stuffing: When DE is inactive, fix the output data to 0 */
-+	val = HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE |
-+		HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE |
-+		HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE;
-+	hdmi_writeb(hdmi, val, HDMI_TX_INSTUFFING);
-+	hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA0);
-+	hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA1);
-+	hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA0);
-+	hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA1);
-+	hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA0);
-+	hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA1);
-+}
-+
-+static int is_color_space_conversion(struct dw_hdmi *hdmi)
-+{
-+	return hdmi->hdmi_data.enc_in_format != hdmi->hdmi_data.enc_out_format;
-+}
-+
-+static int is_color_space_decimation(struct dw_hdmi *hdmi)
-+{
-+	if (hdmi->hdmi_data.enc_out_format != YCBCR422_8BITS)
-+		return 0;
-+	if (hdmi->hdmi_data.enc_in_format == RGB ||
-+	    hdmi->hdmi_data.enc_in_format == YCBCR444)
-+		return 1;
-+	return 0;
-+}
-+
-+static int is_color_space_interpolation(struct dw_hdmi *hdmi)
-+{
-+	if (hdmi->hdmi_data.enc_in_format != YCBCR422_8BITS)
-+		return 0;
-+	if (hdmi->hdmi_data.enc_out_format == RGB ||
-+	    hdmi->hdmi_data.enc_out_format == YCBCR444)
-+		return 1;
-+	return 0;
-+}
-+
-+static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi)
-+{
-+	const u16 (*csc_coeff)[3][4] = &csc_coeff_default;
-+	unsigned i;
-+	u32 csc_scale = 1;
-+
-+	if (is_color_space_conversion(hdmi)) {
-+		if (hdmi->hdmi_data.enc_out_format == RGB) {
-+			if (hdmi->hdmi_data.colorimetry ==
-+					HDMI_COLORIMETRY_ITU_601)
-+				csc_coeff = &csc_coeff_rgb_out_eitu601;
-+			else
-+				csc_coeff = &csc_coeff_rgb_out_eitu709;
-+		} else if (hdmi->hdmi_data.enc_in_format == RGB) {
-+			if (hdmi->hdmi_data.colorimetry ==
-+					HDMI_COLORIMETRY_ITU_601)
-+				csc_coeff = &csc_coeff_rgb_in_eitu601;
-+			else
-+				csc_coeff = &csc_coeff_rgb_in_eitu709;
-+			csc_scale = 0;
-+		}
-+	}
-+
-+	/* The CSC registers are sequential, alternating MSB then LSB */
-+	for (i = 0; i < ARRAY_SIZE(csc_coeff_default[0]); i++) {
-+		u16 coeff_a = (*csc_coeff)[0][i];
-+		u16 coeff_b = (*csc_coeff)[1][i];
-+		u16 coeff_c = (*csc_coeff)[2][i];
-+
-+		hdmi_writeb(hdmi, coeff_a & 0xff, HDMI_CSC_COEF_A1_LSB + i * 2);
-+		hdmi_writeb(hdmi, coeff_a >> 8, HDMI_CSC_COEF_A1_MSB + i * 2);
-+		hdmi_writeb(hdmi, coeff_b & 0xff, HDMI_CSC_COEF_B1_LSB + i * 2);
-+		hdmi_writeb(hdmi, coeff_b >> 8, HDMI_CSC_COEF_B1_MSB + i * 2);
-+		hdmi_writeb(hdmi, coeff_c & 0xff, HDMI_CSC_COEF_C1_LSB + i * 2);
-+		hdmi_writeb(hdmi, coeff_c >> 8, HDMI_CSC_COEF_C1_MSB + i * 2);
-+	}
-+
-+	hdmi_modb(hdmi, csc_scale, HDMI_CSC_SCALE_CSCSCALE_MASK,
-+		  HDMI_CSC_SCALE);
-+}
-+
-+static void hdmi_video_csc(struct dw_hdmi *hdmi)
-+{
-+	int color_depth = 0;
-+	int interpolation = HDMI_CSC_CFG_INTMODE_DISABLE;
-+	int decimation = 0;
-+
-+	/* YCC422 interpolation to 444 mode */
-+	if (is_color_space_interpolation(hdmi))
-+		interpolation = HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1;
-+	else if (is_color_space_decimation(hdmi))
-+		decimation = HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3;
-+
-+	if (hdmi->hdmi_data.enc_color_depth == 8)
-+		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP;
-+	else if (hdmi->hdmi_data.enc_color_depth == 10)
-+		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP;
-+	else if (hdmi->hdmi_data.enc_color_depth == 12)
-+		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP;
-+	else if (hdmi->hdmi_data.enc_color_depth == 16)
-+		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP;
-+	else
-+		return;
-+
-+	/* Configure the CSC registers */
-+	hdmi_writeb(hdmi, interpolation | decimation, HDMI_CSC_CFG);
-+	hdmi_modb(hdmi, color_depth, HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK,
-+		  HDMI_CSC_SCALE);
-+
-+	dw_hdmi_update_csc_coeffs(hdmi);
-+}
-+
-+/*
-+ * HDMI video packetizer is used to packetize the data.
-+ * for example, if input is YCC422 mode or repeater is used,
-+ * data should be repacked this module can be bypassed.
-+ */
-+static void hdmi_video_packetize(struct dw_hdmi *hdmi)
-+{
-+	unsigned int color_depth = 0;
-+	unsigned int remap_size = HDMI_VP_REMAP_YCC422_16bit;
-+	unsigned int output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_PP;
-+	struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data;
-+	u8 val, vp_conf;
-+
-+	if (hdmi_data->enc_out_format == RGB ||
-+	    hdmi_data->enc_out_format == YCBCR444) {
-+		if (!hdmi_data->enc_color_depth) {
-+			output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS;
-+		} else if (hdmi_data->enc_color_depth == 8) {
-+			color_depth = 4;
-+			output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS;
-+		} else if (hdmi_data->enc_color_depth == 10) {
-+			color_depth = 5;
-+		} else if (hdmi_data->enc_color_depth == 12) {
-+			color_depth = 6;
-+		} else if (hdmi_data->enc_color_depth == 16) {
-+			color_depth = 7;
-+		} else {
-+			return;
-+		}
-+	} else if (hdmi_data->enc_out_format == YCBCR422_8BITS) {
-+		if (!hdmi_data->enc_color_depth ||
-+		    hdmi_data->enc_color_depth == 8)
-+			remap_size = HDMI_VP_REMAP_YCC422_16bit;
-+		else if (hdmi_data->enc_color_depth == 10)
-+			remap_size = HDMI_VP_REMAP_YCC422_20bit;
-+		else if (hdmi_data->enc_color_depth == 12)
-+			remap_size = HDMI_VP_REMAP_YCC422_24bit;
-+		else
-+			return;
-+		output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422;
-+	} else {
-+		return;
-+	}
-+
-+	/* set the packetizer registers */
-+	val = ((color_depth << HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET) &
-+		HDMI_VP_PR_CD_COLOR_DEPTH_MASK) |
-+		((hdmi_data->pix_repet_factor <<
-+		HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET) &
-+		HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK);
-+	hdmi_writeb(hdmi, val, HDMI_VP_PR_CD);
-+
-+	hdmi_modb(hdmi, HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE,
-+		  HDMI_VP_STUFF_PR_STUFFING_MASK, HDMI_VP_STUFF);
-+
-+	/* Data from pixel repeater block */
-+	if (hdmi_data->pix_repet_factor > 1) {
-+		vp_conf = HDMI_VP_CONF_PR_EN_ENABLE |
-+			  HDMI_VP_CONF_BYPASS_SELECT_PIX_REPEATER;
-+	} else { /* data from packetizer block */
-+		vp_conf = HDMI_VP_CONF_PR_EN_DISABLE |
-+			  HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER;
-+	}
-+
-+	hdmi_modb(hdmi, vp_conf,
-+		  HDMI_VP_CONF_PR_EN_MASK |
-+		  HDMI_VP_CONF_BYPASS_SELECT_MASK, HDMI_VP_CONF);
-+
-+	hdmi_modb(hdmi, 1 << HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET,
-+		  HDMI_VP_STUFF_IDEFAULT_PHASE_MASK, HDMI_VP_STUFF);
-+
-+	hdmi_writeb(hdmi, remap_size, HDMI_VP_REMAP);
-+
-+	if (output_select == HDMI_VP_CONF_OUTPUT_SELECTOR_PP) {
-+		vp_conf = HDMI_VP_CONF_BYPASS_EN_DISABLE |
-+			  HDMI_VP_CONF_PP_EN_ENABLE |
-+			  HDMI_VP_CONF_YCC422_EN_DISABLE;
-+	} else if (output_select == HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422) {
-+		vp_conf = HDMI_VP_CONF_BYPASS_EN_DISABLE |
-+			  HDMI_VP_CONF_PP_EN_DISABLE |
-+			  HDMI_VP_CONF_YCC422_EN_ENABLE;
-+	} else if (output_select == HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS) {
-+		vp_conf = HDMI_VP_CONF_BYPASS_EN_ENABLE |
-+			  HDMI_VP_CONF_PP_EN_DISABLE |
-+			  HDMI_VP_CONF_YCC422_EN_DISABLE;
-+	} else {
-+		return;
-+	}
-+
-+	hdmi_modb(hdmi, vp_conf,
-+		  HDMI_VP_CONF_BYPASS_EN_MASK | HDMI_VP_CONF_PP_EN_ENMASK |
-+		  HDMI_VP_CONF_YCC422_EN_MASK, HDMI_VP_CONF);
-+
-+	hdmi_modb(hdmi, HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE |
-+			HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE,
-+		  HDMI_VP_STUFF_PP_STUFFING_MASK |
-+		  HDMI_VP_STUFF_YCC422_STUFFING_MASK, HDMI_VP_STUFF);
-+
-+	hdmi_modb(hdmi, output_select, HDMI_VP_CONF_OUTPUT_SELECTOR_MASK,
-+		  HDMI_VP_CONF);
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Synopsys PHY Handling
-+ */
-+
-+static inline void hdmi_phy_test_clear(struct dw_hdmi *hdmi,
-+				       unsigned char bit)
-+{
-+	hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLR_OFFSET,
-+		  HDMI_PHY_TST0_TSTCLR_MASK, HDMI_PHY_TST0);
-+}
-+
-+static bool hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, int msec)
-+{
-+	u32 val;
-+
-+	while ((val = hdmi_readb(hdmi, HDMI_IH_I2CMPHY_STAT0) & 0x3) == 0) {
-+		if (msec-- == 0)
-+			return false;
-+		udelay(1000);
-+	}
-+	hdmi_writeb(hdmi, val, HDMI_IH_I2CMPHY_STAT0);
-+
-+	return true;
-+}
-+
-+void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
-+			   unsigned char addr)
-+{
-+	hdmi_writeb(hdmi, 0xFF, HDMI_IH_I2CMPHY_STAT0);
-+	hdmi_writeb(hdmi, addr, HDMI_PHY_I2CM_ADDRESS_ADDR);
-+	hdmi_writeb(hdmi, (unsigned char)(data >> 8),
-+		    HDMI_PHY_I2CM_DATAO_1_ADDR);
-+	hdmi_writeb(hdmi, (unsigned char)(data >> 0),
-+		    HDMI_PHY_I2CM_DATAO_0_ADDR);
-+	hdmi_writeb(hdmi, HDMI_PHY_I2CM_OPERATION_ADDR_WRITE,
-+		    HDMI_PHY_I2CM_OPERATION_ADDR);
-+	hdmi_phy_wait_i2c_done(hdmi, 1000);
-+}
-+EXPORT_SYMBOL_GPL(dw_hdmi_phy_i2c_write);
-+
-+static void dw_hdmi_phy_enable_powerdown(struct dw_hdmi *hdmi, bool enable)
-+{
-+	hdmi_mask_writeb(hdmi, !enable, HDMI_PHY_CONF0,
-+			 HDMI_PHY_CONF0_PDZ_OFFSET,
-+			 HDMI_PHY_CONF0_PDZ_MASK);
-+}
-+
-+static void dw_hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, u8 enable)
-+{
-+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
-+			 HDMI_PHY_CONF0_ENTMDS_OFFSET,
-+			 HDMI_PHY_CONF0_ENTMDS_MASK);
-+}
-+
-+static void dw_hdmi_phy_enable_svsret(struct dw_hdmi *hdmi, u8 enable)
-+{
-+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
-+			 HDMI_PHY_CONF0_SVSRET_OFFSET,
-+			 HDMI_PHY_CONF0_SVSRET_MASK);
-+}
-+
-+static void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable)
-+{
-+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
-+			 HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET,
-+			 HDMI_PHY_CONF0_GEN2_PDDQ_MASK);
-+}
-+
-+static void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable)
-+{
-+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
-+			 HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET,
-+			 HDMI_PHY_CONF0_GEN2_TXPWRON_MASK);
-+}
-+
-+static void dw_hdmi_phy_sel_data_en_pol(struct dw_hdmi *hdmi, u8 enable)
-+{
-+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
-+			 HDMI_PHY_CONF0_SELDATAENPOL_OFFSET,
-+			 HDMI_PHY_CONF0_SELDATAENPOL_MASK);
-+}
-+
-+static void dw_hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, u8 enable)
-+{
-+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
-+			 HDMI_PHY_CONF0_SELDIPIF_OFFSET,
-+			 HDMI_PHY_CONF0_SELDIPIF_MASK);
-+}
-+
-+static void dw_hdmi_phy_power_off(struct dw_hdmi *hdmi)
-+{
-+	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
-+	unsigned int i;
-+	u16 val;
-+
-+	if (phy->gen == 1) {
-+		dw_hdmi_phy_enable_tmds(hdmi, 0);
-+		dw_hdmi_phy_enable_powerdown(hdmi, true);
-+		return;
-+	}
-+
-+	dw_hdmi_phy_gen2_txpwron(hdmi, 0);
-+
-+	/*
-+	 * Wait for TX_PHY_LOCK to be deasserted to indicate that the PHY went
-+	 * to low power mode.
-+	 */
-+	for (i = 0; i < 5; ++i) {
-+		val = hdmi_readb(hdmi, HDMI_PHY_STAT0);
-+		if (!(val & HDMI_PHY_TX_PHY_LOCK))
-+			break;
-+
-+		usleep_range(1000, 2000);
-+	}
-+
-+	if (val & HDMI_PHY_TX_PHY_LOCK)
-+		dev_warn(hdmi->dev, "PHY failed to power down\n");
-+	else
-+		dev_dbg(hdmi->dev, "PHY powered down in %u iterations\n", i);
-+
-+	dw_hdmi_phy_gen2_pddq(hdmi, 1);
-+}
-+
-+static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi)
-+{
-+	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
-+	unsigned int i;
-+	u8 val;
-+
-+	if (phy->gen == 1) {
-+		dw_hdmi_phy_enable_powerdown(hdmi, false);
-+
-+		/* Toggle TMDS enable. */
-+		dw_hdmi_phy_enable_tmds(hdmi, 0);
-+		dw_hdmi_phy_enable_tmds(hdmi, 1);
-+		return 0;
-+	}
-+
-+	dw_hdmi_phy_gen2_txpwron(hdmi, 1);
-+	dw_hdmi_phy_gen2_pddq(hdmi, 0);
-+
-+	/* Wait for PHY PLL lock */
-+	for (i = 0; i < 5; ++i) {
-+		val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
-+		if (val)
-+			break;
-+
-+		usleep_range(1000, 2000);
-+	}
-+
-+	if (!val) {
-+		dev_err(hdmi->dev, "PHY PLL failed to lock\n");
-+		return -ETIMEDOUT;
-+	}
-+
-+	dev_dbg(hdmi->dev, "PHY PLL locked %u iterations\n", i);
-+	return 0;
-+}
-+
-+/*
-+ * PHY configuration function for the DWC HDMI 3D TX PHY. Based on the available
-+ * information the DWC MHL PHY has the same register layout and is thus also
-+ * supported by this function.
-+ */
-+static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
-+		const struct dw_hdmi_plat_data *pdata,
-+		unsigned long mpixelclock)
-+{
-+	const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
-+	const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
-+	const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
-+
-+	/* PLL/MPLL Cfg - always match on final entry */
-+	for (; mpll_config->mpixelclock != ~0UL; mpll_config++)
-+		if (mpixelclock <= mpll_config->mpixelclock)
-+			break;
-+
-+	for (; curr_ctrl->mpixelclock != ~0UL; curr_ctrl++)
-+		if (mpixelclock <= curr_ctrl->mpixelclock)
-+			break;
-+
-+	for (; phy_config->mpixelclock != ~0UL; phy_config++)
-+		if (mpixelclock <= phy_config->mpixelclock)
-+			break;
-+
-+	if (mpll_config->mpixelclock == ~0UL ||
-+	    curr_ctrl->mpixelclock == ~0UL ||
-+	    phy_config->mpixelclock == ~0UL)
-+		return -EINVAL;
-+
-+	dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce,
-+			      HDMI_3D_TX_PHY_CPCE_CTRL);
-+	dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].gmp,
-+			      HDMI_3D_TX_PHY_GMPCTRL);
-+	dw_hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[0],
-+			      HDMI_3D_TX_PHY_CURRCTRL);
-+
-+	dw_hdmi_phy_i2c_write(hdmi, 0, HDMI_3D_TX_PHY_PLLPHBYCTRL);
-+	dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK,
-+			      HDMI_3D_TX_PHY_MSM_CTRL);
-+
-+	dw_hdmi_phy_i2c_write(hdmi, phy_config->term, HDMI_3D_TX_PHY_TXTERM);
-+	dw_hdmi_phy_i2c_write(hdmi, phy_config->sym_ctr,
-+			      HDMI_3D_TX_PHY_CKSYMTXCTRL);
-+	dw_hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr,
-+			      HDMI_3D_TX_PHY_VLEVCTRL);
-+
-+	/* Override and disable clock termination. */
-+	dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE,
-+			      HDMI_3D_TX_PHY_CKCALCTRL);
-+
-+	return 0;
-+}
-+
-+static int hdmi_phy_configure(struct dw_hdmi *hdmi)
-+{
-+	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
-+	const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
-+	unsigned long mpixelclock = hdmi->hdmi_data.video_mode.mpixelclock;
-+	int ret;
-+
-+	dw_hdmi_phy_power_off(hdmi);
-+
-+	/* Leave low power consumption mode by asserting SVSRET. */
-+	if (phy->has_svsret)
-+		dw_hdmi_phy_enable_svsret(hdmi, 1);
-+
-+	/* PHY reset. The reset signal is active high on Gen2 PHYs. */
-+	hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ);
-+	hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ);
-+
-+	hdmi_writeb(hdmi, HDMI_MC_HEACPHY_RST_ASSERT, HDMI_MC_HEACPHY_RST);
-+
-+	hdmi_phy_test_clear(hdmi, 1);
-+	hdmi_writeb(hdmi, HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2,
-+		    HDMI_PHY_I2CM_SLAVE_ADDR);
-+	hdmi_phy_test_clear(hdmi, 0);
-+
-+	/* Write to the PHY as configured by the platform */
-+	if (pdata->configure_phy)
-+		ret = pdata->configure_phy(hdmi, pdata, mpixelclock);
-+	else
-+		ret = phy->configure(hdmi, pdata, mpixelclock);
-+	if (ret) {
-+		dev_err(hdmi->dev, "PHY configuration failed (clock %lu)\n",
-+			mpixelclock);
-+		return ret;
-+	}
-+
-+	return dw_hdmi_phy_power_on(hdmi);
-+}
-+
-+static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
-+			    struct drm_display_mode *mode)
-+{
-+	int i, ret;
-+
-+	/* HDMI Phy spec says to do the phy initialization sequence twice */
-+	for (i = 0; i < 2; i++) {
-+		dw_hdmi_phy_sel_data_en_pol(hdmi, 1);
-+		dw_hdmi_phy_sel_interface_control(hdmi, 0);
-+
-+		ret = hdmi_phy_configure(hdmi);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	return 0;
-+}
-+
-+static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi, void *data)
-+{
-+	dw_hdmi_phy_power_off(hdmi);
-+}
-+
-+static enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi,
-+						      void *data)
-+{
-+	return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ?
-+		connector_status_connected : connector_status_disconnected;
-+}
-+
-+static const struct dw_hdmi_phy_ops dw_hdmi_synopsys_phy_ops = {
-+	.init = dw_hdmi_phy_init,
-+	.disable = dw_hdmi_phy_disable,
-+	.read_hpd = dw_hdmi_phy_read_hpd,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * HDMI TX Setup
-+ */
-+
-+static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi)
-+{
-+	u8 de;
-+
-+	if (hdmi->hdmi_data.video_mode.mdataenablepolarity)
-+		de = HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH;
-+	else
-+		de = HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_LOW;
-+
-+	/* disable rx detect */
-+	hdmi_modb(hdmi, HDMI_A_HDCPCFG0_RXDETECT_DISABLE,
-+		  HDMI_A_HDCPCFG0_RXDETECT_MASK, HDMI_A_HDCPCFG0);
-+
-+	hdmi_modb(hdmi, de, HDMI_A_VIDPOLCFG_DATAENPOL_MASK, HDMI_A_VIDPOLCFG);
-+
-+	hdmi_modb(hdmi, HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE,
-+		  HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK, HDMI_A_HDCPCFG1);
-+}
-+
-+static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode)
-+{
-+	struct hdmi_avi_infoframe frame;
-+	u8 val;
-+
-+	/* Initialise info frame from DRM mode */
-+	drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
-+
-+	if (hdmi->hdmi_data.enc_out_format == YCBCR444)
-+		frame.colorspace = HDMI_COLORSPACE_YUV444;
-+	else if (hdmi->hdmi_data.enc_out_format == YCBCR422_8BITS)
-+		frame.colorspace = HDMI_COLORSPACE_YUV422;
-+	else
-+		frame.colorspace = HDMI_COLORSPACE_RGB;
-+
-+	/* Set up colorimetry */
-+	if (hdmi->hdmi_data.enc_out_format == XVYCC444) {
-+		frame.colorimetry = HDMI_COLORIMETRY_EXTENDED;
-+		if (hdmi->hdmi_data.colorimetry == HDMI_COLORIMETRY_ITU_601)
-+			frame.extended_colorimetry =
-+				HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
-+		else /*hdmi->hdmi_data.colorimetry == HDMI_COLORIMETRY_ITU_709*/
-+			frame.extended_colorimetry =
-+				HDMI_EXTENDED_COLORIMETRY_XV_YCC_709;
-+	} else if (hdmi->hdmi_data.enc_out_format != RGB) {
-+		frame.colorimetry = hdmi->hdmi_data.colorimetry;
-+		frame.extended_colorimetry = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
-+	} else { /* Carries no data */
-+		frame.colorimetry = HDMI_COLORIMETRY_NONE;
-+		frame.extended_colorimetry = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
-+	}
-+
-+	frame.scan_mode = HDMI_SCAN_MODE_NONE;
-+
-+	/*
-+	 * The Designware IP uses a different byte format from standard
-+	 * AVI info frames, though generally the bits are in the correct
-+	 * bytes.
-+	 */
-+
-+	/*
-+	 * AVI data byte 1 differences: Colorspace in bits 0,1 rather than 5,6,
-+	 * scan info in bits 4,5 rather than 0,1 and active aspect present in
-+	 * bit 6 rather than 4.
-+	 */
-+	val = (frame.scan_mode & 3) << 4 | (frame.colorspace & 3);
-+	if (frame.active_aspect & 15)
-+		val |= HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT;
-+	if (frame.top_bar || frame.bottom_bar)
-+		val |= HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR;
-+	if (frame.left_bar || frame.right_bar)
-+		val |= HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR;
-+	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF0);
-+
-+	/* AVI data byte 2 differences: none */
-+	val = ((frame.colorimetry & 0x3) << 6) |
-+	      ((frame.picture_aspect & 0x3) << 4) |
-+	      (frame.active_aspect & 0xf);
-+	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF1);
-+
-+	/* AVI data byte 3 differences: none */
-+	val = ((frame.extended_colorimetry & 0x7) << 4) |
-+	      ((frame.quantization_range & 0x3) << 2) |
-+	      (frame.nups & 0x3);
-+	if (frame.itc)
-+		val |= HDMI_FC_AVICONF2_IT_CONTENT_VALID;
-+	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF2);
-+
-+	/* AVI data byte 4 differences: none */
-+	val = frame.video_code & 0x7f;
-+	hdmi_writeb(hdmi, val, HDMI_FC_AVIVID);
-+
-+	/* AVI Data Byte 5- set up input and output pixel repetition */
-+	val = (((hdmi->hdmi_data.video_mode.mpixelrepetitioninput + 1) <<
-+		HDMI_FC_PRCONF_INCOMING_PR_FACTOR_OFFSET) &
-+		HDMI_FC_PRCONF_INCOMING_PR_FACTOR_MASK) |
-+		((hdmi->hdmi_data.video_mode.mpixelrepetitionoutput <<
-+		HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_OFFSET) &
-+		HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_MASK);
-+	hdmi_writeb(hdmi, val, HDMI_FC_PRCONF);
-+
-+	/*
-+	 * AVI data byte 5 differences: content type in 0,1 rather than 4,5,
-+	 * ycc range in bits 2,3 rather than 6,7
-+	 */
-+	val = ((frame.ycc_quantization_range & 0x3) << 2) |
-+	      (frame.content_type & 0x3);
-+	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF3);
-+
-+	/* AVI Data Bytes 6-13 */
-+	hdmi_writeb(hdmi, frame.top_bar & 0xff, HDMI_FC_AVIETB0);
-+	hdmi_writeb(hdmi, (frame.top_bar >> 8) & 0xff, HDMI_FC_AVIETB1);
-+	hdmi_writeb(hdmi, frame.bottom_bar & 0xff, HDMI_FC_AVISBB0);
-+	hdmi_writeb(hdmi, (frame.bottom_bar >> 8) & 0xff, HDMI_FC_AVISBB1);
-+	hdmi_writeb(hdmi, frame.left_bar & 0xff, HDMI_FC_AVIELB0);
-+	hdmi_writeb(hdmi, (frame.left_bar >> 8) & 0xff, HDMI_FC_AVIELB1);
-+	hdmi_writeb(hdmi, frame.right_bar & 0xff, HDMI_FC_AVISRB0);
-+	hdmi_writeb(hdmi, (frame.right_bar >> 8) & 0xff, HDMI_FC_AVISRB1);
-+}
-+
-+static void hdmi_av_composer(struct dw_hdmi *hdmi,
-+			     const struct drm_display_mode *mode)
-+{
-+	u8 inv_val;
-+	struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode;
-+	int hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len;
-+	unsigned int vdisplay;
-+
-+	vmode->mpixelclock = mode->clock * 1000;
-+
-+	dev_dbg(hdmi->dev, "final pixclk = %d\n", vmode->mpixelclock);
-+
-+	/* Set up HDMI_FC_INVIDCONF */
-+	inv_val = (hdmi->hdmi_data.hdcp_enable ?
-+		HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE :
-+		HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE);
-+
-+	inv_val |= mode->flags & DRM_MODE_FLAG_PVSYNC ?
-+		HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH :
-+		HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW;
-+
-+	inv_val |= mode->flags & DRM_MODE_FLAG_PHSYNC ?
-+		HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH :
-+		HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW;
-+
-+	inv_val |= (vmode->mdataenablepolarity ?
-+		HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH :
-+		HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW);
-+
-+	if (hdmi->vic == 39)
-+		inv_val |= HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH;
-+	else
-+		inv_val |= mode->flags & DRM_MODE_FLAG_INTERLACE ?
-+			HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH :
-+			HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW;
-+
-+	inv_val |= mode->flags & DRM_MODE_FLAG_INTERLACE ?
-+		HDMI_FC_INVIDCONF_IN_I_P_INTERLACED :
-+		HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE;
-+
-+	inv_val |= hdmi->sink_is_hdmi ?
-+		HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE :
-+		HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE;
-+
-+	hdmi_writeb(hdmi, inv_val, HDMI_FC_INVIDCONF);
-+
-+	vdisplay = mode->vdisplay;
-+	vblank = mode->vtotal - mode->vdisplay;
-+	v_de_vs = mode->vsync_start - mode->vdisplay;
-+	vsync_len = mode->vsync_end - mode->vsync_start;
-+
-+	/*
-+	 * When we're setting an interlaced mode, we need
-+	 * to adjust the vertical timing to suit.
-+	 */
-+	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
-+		vdisplay /= 2;
-+		vblank /= 2;
-+		v_de_vs /= 2;
-+		vsync_len /= 2;
-+	}
-+
-+	/* Set up horizontal active pixel width */
-+	hdmi_writeb(hdmi, mode->hdisplay >> 8, HDMI_FC_INHACTV1);
-+	hdmi_writeb(hdmi, mode->hdisplay, HDMI_FC_INHACTV0);
-+
-+	/* Set up vertical active lines */
-+	hdmi_writeb(hdmi, vdisplay >> 8, HDMI_FC_INVACTV1);
-+	hdmi_writeb(hdmi, vdisplay, HDMI_FC_INVACTV0);
-+
-+	/* Set up horizontal blanking pixel region width */
-+	hblank = mode->htotal - mode->hdisplay;
-+	hdmi_writeb(hdmi, hblank >> 8, HDMI_FC_INHBLANK1);
-+	hdmi_writeb(hdmi, hblank, HDMI_FC_INHBLANK0);
-+
-+	/* Set up vertical blanking pixel region width */
-+	hdmi_writeb(hdmi, vblank, HDMI_FC_INVBLANK);
-+
-+	/* Set up HSYNC active edge delay width (in pixel clks) */
-+	h_de_hs = mode->hsync_start - mode->hdisplay;
-+	hdmi_writeb(hdmi, h_de_hs >> 8, HDMI_FC_HSYNCINDELAY1);
-+	hdmi_writeb(hdmi, h_de_hs, HDMI_FC_HSYNCINDELAY0);
-+
-+	/* Set up VSYNC active edge delay (in lines) */
-+	hdmi_writeb(hdmi, v_de_vs, HDMI_FC_VSYNCINDELAY);
-+
-+	/* Set up HSYNC active pulse width (in pixel clks) */
-+	hsync_len = mode->hsync_end - mode->hsync_start;
-+	hdmi_writeb(hdmi, hsync_len >> 8, HDMI_FC_HSYNCINWIDTH1);
-+	hdmi_writeb(hdmi, hsync_len, HDMI_FC_HSYNCINWIDTH0);
-+
-+	/* Set up VSYNC active edge delay (in lines) */
-+	hdmi_writeb(hdmi, vsync_len, HDMI_FC_VSYNCINWIDTH);
-+}
-+
-+/* HDMI Initialization Step B.4 */
-+static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi)
-+{
-+	u8 clkdis;
-+
-+	/* control period minimum duration */
-+	hdmi_writeb(hdmi, 12, HDMI_FC_CTRLDUR);
-+	hdmi_writeb(hdmi, 32, HDMI_FC_EXCTRLDUR);
-+	hdmi_writeb(hdmi, 1, HDMI_FC_EXCTRLSPAC);
-+
-+	/* Set to fill TMDS data channels */
-+	hdmi_writeb(hdmi, 0x0B, HDMI_FC_CH0PREAM);
-+	hdmi_writeb(hdmi, 0x16, HDMI_FC_CH1PREAM);
-+	hdmi_writeb(hdmi, 0x21, HDMI_FC_CH2PREAM);
-+
-+	/* Enable pixel clock and tmds data path */
-+	clkdis = 0x7F;
-+	clkdis &= ~HDMI_MC_CLKDIS_PIXELCLK_DISABLE;
-+	hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
-+
-+	clkdis &= ~HDMI_MC_CLKDIS_TMDSCLK_DISABLE;
-+	hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
-+
-+	/* Enable csc path */
-+	if (is_color_space_conversion(hdmi)) {
-+		clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE;
-+		hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
-+	}
-+
-+	/* Enable color space conversion if needed */
-+	if (is_color_space_conversion(hdmi))
-+		hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH,
-+			    HDMI_MC_FLOWCTRL);
-+	else
-+		hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS,
-+			    HDMI_MC_FLOWCTRL);
-+}
-+
-+static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi)
-+{
-+	hdmi_modb(hdmi, 0, HDMI_MC_CLKDIS_AUDCLK_DISABLE, HDMI_MC_CLKDIS);
-+}
-+
-+/* Workaround to clear the overflow condition */
-+static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi)
-+{
-+	unsigned int count;
-+	unsigned int i;
-+	u8 val;
-+
-+	/*
-+	 * Under some circumstances the Frame Composer arithmetic unit can miss
-+	 * an FC register write due to being busy processing the previous one.
-+	 * The issue can be worked around by issuing a TMDS software reset and
-+	 * then write one of the FC registers several times.
-+	 *
-+	 * The number of iterations matters and depends on the HDMI TX revision
-+	 * (and possibly on the platform). So far only i.MX6Q (v1.30a) and
-+	 * i.MX6DL (v1.31a) have been identified as needing the workaround, with
-+	 * 4 and 1 iterations respectively.
-+	 */
-+
-+	switch (hdmi->version) {
-+	case 0x130a:
-+		count = 4;
-+		break;
-+	case 0x131a:
-+		count = 1;
-+		break;
-+	default:
-+		return;
-+	}
-+
-+	/* TMDS software reset */
-+	hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, HDMI_MC_SWRSTZ);
-+
-+	val = hdmi_readb(hdmi, HDMI_FC_INVIDCONF);
-+	for (i = 0; i < count; i++)
-+		hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF);
-+}
-+
-+static void hdmi_enable_overflow_interrupts(struct dw_hdmi *hdmi)
-+{
-+	hdmi_writeb(hdmi, 0, HDMI_FC_MASK2);
-+	hdmi_writeb(hdmi, 0, HDMI_IH_MUTE_FC_STAT2);
-+}
-+
-+static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi)
-+{
-+	hdmi_writeb(hdmi, HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK,
-+		    HDMI_IH_MUTE_FC_STAT2);
-+}
-+
-+static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode)
-+{
-+	int ret;
-+
-+	hdmi_disable_overflow_interrupts(hdmi);
-+
-+	hdmi->vic = drm_match_cea_mode(mode);
-+
-+	if (!hdmi->vic) {
-+		dev_dbg(hdmi->dev, "Non-CEA mode used in HDMI\n");
-+	} else {
-+		dev_dbg(hdmi->dev, "CEA mode used vic=%d\n", hdmi->vic);
-+	}
-+
-+	if ((hdmi->vic == 6) || (hdmi->vic == 7) ||
-+	    (hdmi->vic == 21) || (hdmi->vic == 22) ||
-+	    (hdmi->vic == 2) || (hdmi->vic == 3) ||
-+	    (hdmi->vic == 17) || (hdmi->vic == 18))
-+		hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_601;
-+	else
-+		hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_709;
-+
-+	hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 0;
-+	hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0;
-+
-+	/* TODO: Get input format from IPU (via FB driver interface) */
-+	hdmi->hdmi_data.enc_in_format = RGB;
-+
-+	hdmi->hdmi_data.enc_out_format = RGB;
-+
-+	hdmi->hdmi_data.enc_color_depth = 8;
-+	hdmi->hdmi_data.pix_repet_factor = 0;
-+	hdmi->hdmi_data.hdcp_enable = 0;
-+	hdmi->hdmi_data.video_mode.mdataenablepolarity = true;
-+
-+	/* HDMI Initialization Step B.1 */
-+	hdmi_av_composer(hdmi, mode);
-+
-+	/* HDMI Initializateion Step B.2 */
-+	ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data, &hdmi->previous_mode);
-+	if (ret)
-+		return ret;
-+	hdmi->phy.enabled = true;
-+
-+	/* HDMI Initialization Step B.3 */
-+	dw_hdmi_enable_video_path(hdmi);
-+
-+	if (hdmi->sink_has_audio) {
-+		dev_dbg(hdmi->dev, "sink has audio support\n");
-+
-+		/* HDMI Initialization Step E - Configure audio */
-+		hdmi_clk_regenerator_update_pixel_clock(hdmi);
-+		hdmi_enable_audio_clk(hdmi);
-+	}
-+
-+	/* not for DVI mode */
-+	if (hdmi->sink_is_hdmi) {
-+		dev_dbg(hdmi->dev, "%s HDMI mode\n", __func__);
-+
-+		/* HDMI Initialization Step F - Configure AVI InfoFrame */
-+		hdmi_config_AVI(hdmi, mode);
-+	} else {
-+		dev_dbg(hdmi->dev, "%s DVI mode\n", __func__);
-+	}
-+
-+	hdmi_video_packetize(hdmi);
-+	hdmi_video_csc(hdmi);
-+	hdmi_video_sample(hdmi);
-+	hdmi_tx_hdcp_config(hdmi);
-+
-+	dw_hdmi_clear_overflow(hdmi);
-+	if (hdmi->cable_plugin && hdmi->sink_is_hdmi)
-+		hdmi_enable_overflow_interrupts(hdmi);
-+
-+	return 0;
-+}
-+
-+/* Wait until we are registered to enable interrupts */
-+static int dw_hdmi_fb_registered(struct dw_hdmi *hdmi)
-+{
-+	hdmi_writeb(hdmi, HDMI_PHY_I2CM_INT_ADDR_DONE_POL,
-+		    HDMI_PHY_I2CM_INT_ADDR);
-+
-+	hdmi_writeb(hdmi, HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL |
-+		    HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL,
-+		    HDMI_PHY_I2CM_CTLINT_ADDR);
-+
-+	/* enable cable hot plug irq */
-+	hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
-+
-+	/* Clear Hotplug interrupts */
-+	hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
-+		    HDMI_IH_PHY_STAT0);
-+
-+	return 0;
-+}
-+
-+static void initialize_hdmi_ih_mutes(struct dw_hdmi *hdmi)
-+{
-+	u8 ih_mute;
-+
-+	/*
-+	 * Boot up defaults are:
-+	 * HDMI_IH_MUTE   = 0x03 (disabled)
-+	 * HDMI_IH_MUTE_* = 0x00 (enabled)
-+	 *
-+	 * Disable top level interrupt bits in HDMI block
-+	 */
-+	ih_mute = hdmi_readb(hdmi, HDMI_IH_MUTE) |
-+		  HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT |
-+		  HDMI_IH_MUTE_MUTE_ALL_INTERRUPT;
-+
-+	hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE);
-+
-+	/* by default mask all interrupts */
-+	hdmi_writeb(hdmi, 0xff, HDMI_VP_MASK);
-+	hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK0);
-+	hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK1);
-+	hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK2);
-+	hdmi_writeb(hdmi, 0xff, HDMI_PHY_MASK0);
-+	hdmi_writeb(hdmi, 0xff, HDMI_PHY_I2CM_INT_ADDR);
-+	hdmi_writeb(hdmi, 0xff, HDMI_PHY_I2CM_CTLINT_ADDR);
-+	hdmi_writeb(hdmi, 0xff, HDMI_AUD_INT);
-+	hdmi_writeb(hdmi, 0xff, HDMI_AUD_SPDIFINT);
-+	hdmi_writeb(hdmi, 0xff, HDMI_AUD_HBR_MASK);
-+	hdmi_writeb(hdmi, 0xff, HDMI_GP_MASK);
-+	hdmi_writeb(hdmi, 0xff, HDMI_A_APIINTMSK);
-+	hdmi_writeb(hdmi, 0xff, HDMI_CEC_MASK);
-+	hdmi_writeb(hdmi, 0xff, HDMI_I2CM_INT);
-+	hdmi_writeb(hdmi, 0xff, HDMI_I2CM_CTLINT);
-+
-+	/* Disable interrupts in the IH_MUTE_* registers */
-+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT0);
-+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT1);
-+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT2);
-+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AS_STAT0);
-+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_PHY_STAT0);
-+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CM_STAT0);
-+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_CEC_STAT0);
-+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_VP_STAT0);
-+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CMPHY_STAT0);
-+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AHBDMAAUD_STAT0);
-+
-+	/* Enable top level interrupt bits in HDMI block */
-+	ih_mute &= ~(HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT |
-+		    HDMI_IH_MUTE_MUTE_ALL_INTERRUPT);
-+	hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE);
-+}
-+
-+static void dw_hdmi_poweron(struct dw_hdmi *hdmi)
-+{
-+	hdmi->bridge_is_on = true;
-+	dw_hdmi_setup(hdmi, &hdmi->previous_mode);
-+}
-+
-+static void dw_hdmi_poweroff(struct dw_hdmi *hdmi)
-+{
-+	if (hdmi->phy.enabled) {
-+		hdmi->phy.ops->disable(hdmi, hdmi->phy.data);
-+		hdmi->phy.enabled = false;
-+	}
-+
-+	hdmi->bridge_is_on = false;
-+}
-+
-+static void dw_hdmi_update_power(struct dw_hdmi *hdmi)
-+{
-+	int force = hdmi->force;
-+
-+	if (hdmi->disabled) {
-+		force = DRM_FORCE_OFF;
-+	} else if (force == DRM_FORCE_UNSPECIFIED) {
-+		if (hdmi->rxsense)
-+			force = DRM_FORCE_ON;
-+		else
-+			force = DRM_FORCE_OFF;
-+	}
-+
-+	if (force == DRM_FORCE_OFF) {
-+		if (hdmi->bridge_is_on)
-+			dw_hdmi_poweroff(hdmi);
-+	} else {
-+		if (!hdmi->bridge_is_on)
-+			dw_hdmi_poweron(hdmi);
-+	}
-+}
-+
-+/*
-+ * Adjust the detection of RXSENSE according to whether we have a forced
-+ * connection mode enabled, or whether we have been disabled.  There is
-+ * no point processing RXSENSE interrupts if we have a forced connection
-+ * state, or DRM has us disabled.
-+ *
-+ * We also disable rxsense interrupts when we think we're disconnected
-+ * to avoid floating TDMS signals giving false rxsense interrupts.
-+ *
-+ * Note: we still need to listen for HPD interrupts even when DRM has us
-+ * disabled so that we can detect a connect event.
-+ */
-+static void dw_hdmi_update_phy_mask(struct dw_hdmi *hdmi)
-+{
-+	u8 old_mask = hdmi->phy_mask;
-+
-+	if (hdmi->force || hdmi->disabled || !hdmi->rxsense)
-+		hdmi->phy_mask |= HDMI_PHY_RX_SENSE;
-+	else
-+		hdmi->phy_mask &= ~HDMI_PHY_RX_SENSE;
-+
-+	if (old_mask != hdmi->phy_mask)
-+		hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
-+}
-+
-+static enum drm_connector_status
-+dw_hdmi_connector_detect(struct drm_connector *connector, bool force)
-+{
-+	struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
-+					     connector);
-+
-+	mutex_lock(&hdmi->mutex);
-+	hdmi->force = DRM_FORCE_UNSPECIFIED;
-+	dw_hdmi_update_power(hdmi);
-+	dw_hdmi_update_phy_mask(hdmi);
-+	mutex_unlock(&hdmi->mutex);
-+
-+	return hdmi->phy.ops->read_hpd(hdmi, hdmi->phy.data);
-+}
-+
-+static int dw_hdmi_connector_get_modes(struct drm_connector *connector)
-+{
-+	struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
-+					     connector);
-+	struct edid *edid;
-+	int ret = 0;
-+
-+	if (!hdmi->ddc)
-+		return 0;
-+
-+	edid = drm_get_edid(connector, hdmi->ddc);
-+	if (edid) {
-+		dev_dbg(hdmi->dev, "got edid: width[%d] x height[%d]\n",
-+			edid->width_cm, edid->height_cm);
-+
-+		hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid);
-+		hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
-+		drm_mode_connector_update_edid_property(connector, edid);
-+		ret = drm_add_edid_modes(connector, edid);
-+		/* Store the ELD */
-+		drm_edid_to_eld(connector, edid);
-+		kfree(edid);
-+	} else {
-+		dev_dbg(hdmi->dev, "failed to get edid\n");
-+	}
-+
-+	return ret;
-+}
-+
-+static enum drm_mode_status
-+dw_hdmi_connector_mode_valid(struct drm_connector *connector,
-+			     struct drm_display_mode *mode)
-+{
-+	struct dw_hdmi *hdmi = container_of(connector,
-+					   struct dw_hdmi, connector);
-+	enum drm_mode_status mode_status = MODE_OK;
-+
-+	/* We don't support double-clocked modes */
-+	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
-+		return MODE_BAD;
-+
-+	if (hdmi->plat_data->mode_valid)
-+		mode_status = hdmi->plat_data->mode_valid(connector, mode);
-+
-+	return mode_status;
-+}
-+
-+static void dw_hdmi_connector_force(struct drm_connector *connector)
-+{
-+	struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
-+					     connector);
-+
-+	mutex_lock(&hdmi->mutex);
-+	hdmi->force = connector->force;
-+	dw_hdmi_update_power(hdmi);
-+	dw_hdmi_update_phy_mask(hdmi);
-+	mutex_unlock(&hdmi->mutex);
-+}
-+
-+static const struct drm_connector_funcs dw_hdmi_connector_funcs = {
-+	.dpms = drm_atomic_helper_connector_dpms,
-+	.fill_modes = drm_helper_probe_single_connector_modes,
-+	.detect = dw_hdmi_connector_detect,
-+	.destroy = drm_connector_cleanup,
-+	.force = dw_hdmi_connector_force,
-+	.reset = drm_atomic_helper_connector_reset,
-+	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
-+	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
-+};
-+
-+static const struct drm_connector_helper_funcs dw_hdmi_connector_helper_funcs = {
-+	.get_modes = dw_hdmi_connector_get_modes,
-+	.mode_valid = dw_hdmi_connector_mode_valid,
-+	.best_encoder = drm_atomic_helper_best_encoder,
-+};
-+
-+static int dw_hdmi_bridge_attach(struct drm_bridge *bridge)
-+{
-+	struct dw_hdmi *hdmi = bridge->driver_private;
-+	struct drm_encoder *encoder = bridge->encoder;
-+	struct drm_connector *connector = &hdmi->connector;
-+
-+	connector->interlace_allowed = 1;
-+	connector->polled = DRM_CONNECTOR_POLL_HPD;
-+
-+	drm_connector_helper_add(connector, &dw_hdmi_connector_helper_funcs);
-+
-+	drm_connector_init(bridge->dev, connector, &dw_hdmi_connector_funcs,
-+			   DRM_MODE_CONNECTOR_HDMIA);
-+
-+	drm_mode_connector_attach_encoder(connector, encoder);
-+
-+	return 0;
-+}
-+
-+static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge,
-+				    struct drm_display_mode *orig_mode,
-+				    struct drm_display_mode *mode)
-+{
-+	struct dw_hdmi *hdmi = bridge->driver_private;
-+
-+	mutex_lock(&hdmi->mutex);
-+
-+	/* Store the display mode for plugin/DKMS poweron events */
-+	memcpy(&hdmi->previous_mode, mode, sizeof(hdmi->previous_mode));
-+
-+	mutex_unlock(&hdmi->mutex);
-+}
-+
-+static void dw_hdmi_bridge_disable(struct drm_bridge *bridge)
-+{
-+	struct dw_hdmi *hdmi = bridge->driver_private;
-+
-+	mutex_lock(&hdmi->mutex);
-+	hdmi->disabled = true;
-+	dw_hdmi_update_power(hdmi);
-+	dw_hdmi_update_phy_mask(hdmi);
-+	mutex_unlock(&hdmi->mutex);
-+}
-+
-+static void dw_hdmi_bridge_enable(struct drm_bridge *bridge)
-+{
-+	struct dw_hdmi *hdmi = bridge->driver_private;
-+
-+	mutex_lock(&hdmi->mutex);
-+	hdmi->disabled = false;
-+	dw_hdmi_update_power(hdmi);
-+	dw_hdmi_update_phy_mask(hdmi);
-+	mutex_unlock(&hdmi->mutex);
-+}
-+
-+static const struct drm_bridge_funcs dw_hdmi_bridge_funcs = {
-+	.attach = dw_hdmi_bridge_attach,
-+	.enable = dw_hdmi_bridge_enable,
-+	.disable = dw_hdmi_bridge_disable,
-+	.mode_set = dw_hdmi_bridge_mode_set,
-+};
-+
-+static irqreturn_t dw_hdmi_i2c_irq(struct dw_hdmi *hdmi)
-+{
-+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
-+	unsigned int stat;
-+
-+	stat = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
-+	if (!stat)
-+		return IRQ_NONE;
-+
-+	hdmi_writeb(hdmi, stat, HDMI_IH_I2CM_STAT0);
-+
-+	i2c->stat = stat;
-+
-+	complete(&i2c->cmp);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static irqreturn_t dw_hdmi_hardirq(int irq, void *dev_id)
-+{
-+	struct dw_hdmi *hdmi = dev_id;
-+	u8 intr_stat;
-+	irqreturn_t ret = IRQ_NONE;
-+
-+	if (hdmi->i2c)
-+		ret = dw_hdmi_i2c_irq(hdmi);
-+
-+	intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0);
-+	if (intr_stat) {
-+		hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0);
-+		return IRQ_WAKE_THREAD;
-+	}
-+
-+	return ret;
-+}
-+
-+static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
-+{
-+	struct dw_hdmi *hdmi = dev_id;
-+	u8 intr_stat, phy_int_pol, phy_pol_mask, phy_stat;
-+
-+	intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0);
-+	phy_int_pol = hdmi_readb(hdmi, HDMI_PHY_POL0);
-+	phy_stat = hdmi_readb(hdmi, HDMI_PHY_STAT0);
-+
-+	phy_pol_mask = 0;
-+	if (intr_stat & HDMI_IH_PHY_STAT0_HPD)
-+		phy_pol_mask |= HDMI_PHY_HPD;
-+	if (intr_stat & HDMI_IH_PHY_STAT0_RX_SENSE0)
-+		phy_pol_mask |= HDMI_PHY_RX_SENSE0;
-+	if (intr_stat & HDMI_IH_PHY_STAT0_RX_SENSE1)
-+		phy_pol_mask |= HDMI_PHY_RX_SENSE1;
-+	if (intr_stat & HDMI_IH_PHY_STAT0_RX_SENSE2)
-+		phy_pol_mask |= HDMI_PHY_RX_SENSE2;
-+	if (intr_stat & HDMI_IH_PHY_STAT0_RX_SENSE3)
-+		phy_pol_mask |= HDMI_PHY_RX_SENSE3;
-+
-+	if (phy_pol_mask)
-+		hdmi_modb(hdmi, ~phy_int_pol, phy_pol_mask, HDMI_PHY_POL0);
-+
-+	/*
-+	 * RX sense tells us whether the TDMS transmitters are detecting
-+	 * load - in other words, there's something listening on the
-+	 * other end of the link.  Use this to decide whether we should
-+	 * power on the phy as HPD may be toggled by the sink to merely
-+	 * ask the source to re-read the EDID.
-+	 */
-+	if (intr_stat &
-+	    (HDMI_IH_PHY_STAT0_RX_SENSE | HDMI_IH_PHY_STAT0_HPD)) {
-+		mutex_lock(&hdmi->mutex);
-+		if (!hdmi->disabled && !hdmi->force) {
-+			/*
-+			 * If the RX sense status indicates we're disconnected,
-+			 * clear the software rxsense status.
-+			 */
-+			if (!(phy_stat & HDMI_PHY_RX_SENSE))
-+				hdmi->rxsense = false;
-+
-+			/*
-+			 * Only set the software rxsense status when both
-+			 * rxsense and hpd indicates we're connected.
-+			 * This avoids what seems to be bad behaviour in
-+			 * at least iMX6S versions of the phy.
-+			 */
-+			if (phy_stat & HDMI_PHY_HPD)
-+				hdmi->rxsense = true;
-+
-+			dw_hdmi_update_power(hdmi);
-+			dw_hdmi_update_phy_mask(hdmi);
-+		}
-+		mutex_unlock(&hdmi->mutex);
-+	}
-+
-+	if (intr_stat & HDMI_IH_PHY_STAT0_HPD) {
-+		dev_dbg(hdmi->dev, "EVENT=%s\n",
-+			phy_int_pol & HDMI_PHY_HPD ? "plugin" : "plugout");
-+		if (hdmi->bridge.dev)
-+			drm_helper_hpd_irq_event(hdmi->bridge.dev);
-+	}
-+
-+	hdmi_writeb(hdmi, intr_stat, HDMI_IH_PHY_STAT0);
-+	hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE),
-+		    HDMI_IH_MUTE_PHY_STAT0);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static const struct dw_hdmi_phy_data dw_hdmi_phys[] = {
-+	{
-+		.type = DW_HDMI_PHY_DWC_HDMI_TX_PHY,
-+		.name = "DWC HDMI TX PHY",
-+		.gen = 1,
-+	}, {
-+		.type = DW_HDMI_PHY_DWC_MHL_PHY_HEAC,
-+		.name = "DWC MHL PHY + HEAC PHY",
-+		.gen = 2,
-+		.has_svsret = true,
-+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
-+	}, {
-+		.type = DW_HDMI_PHY_DWC_MHL_PHY,
-+		.name = "DWC MHL PHY",
-+		.gen = 2,
-+		.has_svsret = true,
-+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
-+	}, {
-+		.type = DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY_HEAC,
-+		.name = "DWC HDMI 3D TX PHY + HEAC PHY",
-+		.gen = 2,
-+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
-+	}, {
-+		.type = DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY,
-+		.name = "DWC HDMI 3D TX PHY",
-+		.gen = 2,
-+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
-+	}, {
-+		.type = DW_HDMI_PHY_DWC_HDMI20_TX_PHY,
-+		.name = "DWC HDMI 2.0 TX PHY",
-+		.gen = 2,
-+		.has_svsret = true,
-+	}, {
-+		.type = DW_HDMI_PHY_VENDOR_PHY,
-+		.name = "Vendor PHY",
-+	}
-+};
-+
-+static int dw_hdmi_detect_phy(struct dw_hdmi *hdmi)
-+{
-+	unsigned int i;
-+	u8 phy_type;
-+
-+	phy_type = hdmi_readb(hdmi, HDMI_CONFIG2_ID);
-+
-+	if (phy_type == DW_HDMI_PHY_VENDOR_PHY) {
-+		/* Vendor PHYs require support from the glue layer. */
-+		if (!hdmi->plat_data->phy_ops || !hdmi->plat_data->phy_name) {
-+			dev_err(hdmi->dev,
-+				"Vendor HDMI PHY not supported by glue layer\n");
-+			return -ENODEV;
-+		}
-+
-+		hdmi->phy.ops = hdmi->plat_data->phy_ops;
-+		hdmi->phy.data = hdmi->plat_data->phy_data;
-+		hdmi->phy.name = hdmi->plat_data->phy_name;
-+		return 0;
-+	}
-+
-+	/* Synopsys PHYs are handled internally. */
-+	for (i = 0; i < ARRAY_SIZE(dw_hdmi_phys); ++i) {
-+		if (dw_hdmi_phys[i].type == phy_type) {
-+			hdmi->phy.ops = &dw_hdmi_synopsys_phy_ops;
-+			hdmi->phy.name = dw_hdmi_phys[i].name;
-+			hdmi->phy.data = (void *)&dw_hdmi_phys[i];
-+
-+			if (!dw_hdmi_phys[i].configure &&
-+			    !hdmi->plat_data->configure_phy) {
-+				dev_err(hdmi->dev, "%s requires platform support\n",
-+					hdmi->phy.name);
-+				return -ENODEV;
-+			}
-+
-+			return 0;
-+		}
-+	}
-+
-+	dev_err(hdmi->dev, "Unsupported HDMI PHY type (%02x)\n", phy_type);
-+	return -ENODEV;
-+}
-+
-+static const struct regmap_config hdmi_regmap_8bit_config = {
-+	.reg_bits	= 32,
-+	.val_bits	= 8,
-+	.reg_stride	= 1,
-+	.max_register	= HDMI_I2CM_FS_SCL_LCNT_0_ADDR,
-+};
-+
-+static const struct regmap_config hdmi_regmap_32bit_config = {
-+	.reg_bits	= 32,
-+	.val_bits	= 32,
-+	.reg_stride	= 4,
-+	.max_register	= HDMI_I2CM_FS_SCL_LCNT_0_ADDR << 2,
-+};
-+
-+static struct dw_hdmi *
-+__dw_hdmi_probe(struct platform_device *pdev,
-+		const struct dw_hdmi_plat_data *plat_data)
-+{
-+	struct device *dev = &pdev->dev;
-+	struct device_node *np = dev->of_node;
-+	struct platform_device_info pdevinfo;
-+	struct device_node *ddc_node;
-+	struct dw_hdmi *hdmi;
-+	struct resource *iores = NULL;
-+	int irq;
-+	int ret;
-+	u32 val = 1;
-+	u8 prod_id0;
-+	u8 prod_id1;
-+	u8 config0;
-+	u8 config3;
-+
-+	hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
-+	if (!hdmi)
-+		return ERR_PTR(-ENOMEM);
-+
-+	hdmi->plat_data = plat_data;
-+	hdmi->dev = dev;
-+	hdmi->sample_rate = 48000;
-+	hdmi->disabled = true;
-+	hdmi->rxsense = true;
-+	hdmi->phy_mask = (u8)~(HDMI_PHY_HPD | HDMI_PHY_RX_SENSE);
-+
-+	mutex_init(&hdmi->mutex);
-+	mutex_init(&hdmi->audio_mutex);
-+	spin_lock_init(&hdmi->audio_lock);
-+
-+	ddc_node = of_parse_phandle(np, "ddc-i2c-bus", 0);
-+	if (ddc_node) {
-+		hdmi->ddc = of_get_i2c_adapter_by_node(ddc_node);
-+		of_node_put(ddc_node);
-+		if (!hdmi->ddc) {
-+			dev_dbg(hdmi->dev, "failed to read ddc node\n");
-+			return ERR_PTR(-EPROBE_DEFER);
-+		}
-+
-+	} else {
-+		dev_dbg(hdmi->dev, "no ddc property found\n");
-+	}
-+
-+	if (!plat_data->regm) {
-+		const struct regmap_config *reg_config;
-+
-+		of_property_read_u32(np, "reg-io-width", &val);
-+		switch (val) {
-+		case 4:
-+			reg_config = &hdmi_regmap_32bit_config;
-+			hdmi->reg_shift = 2;
-+			break;
-+		case 1:
-+			reg_config = &hdmi_regmap_8bit_config;
-+			break;
-+		default:
-+			dev_err(dev, "reg-io-width must be 1 or 4\n");
-+			return ERR_PTR(-EINVAL);
-+		}
-+
-+		iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+		hdmi->regs = devm_ioremap_resource(dev, iores);
-+		if (IS_ERR(hdmi->regs)) {
-+			ret = PTR_ERR(hdmi->regs);
-+			goto err_res;
-+		}
-+
-+		hdmi->regm = devm_regmap_init_mmio(dev, hdmi->regs, reg_config);
-+		if (IS_ERR(hdmi->regm)) {
-+			dev_err(dev, "Failed to configure regmap\n");
-+			ret = PTR_ERR(hdmi->regm);
-+			goto err_res;
-+		}
-+	} else {
-+		hdmi->regm = plat_data->regm;
-+	}
-+
-+	hdmi->isfr_clk = devm_clk_get(hdmi->dev, "isfr");
-+	if (IS_ERR(hdmi->isfr_clk)) {
-+		ret = PTR_ERR(hdmi->isfr_clk);
-+		dev_err(hdmi->dev, "Unable to get HDMI isfr clk: %d\n", ret);
-+		goto err_res;
-+	}
-+
-+	ret = clk_prepare_enable(hdmi->isfr_clk);
-+	if (ret) {
-+		dev_err(hdmi->dev, "Cannot enable HDMI isfr clock: %d\n", ret);
-+		goto err_res;
-+	}
-+
-+	hdmi->iahb_clk = devm_clk_get(hdmi->dev, "iahb");
-+	if (IS_ERR(hdmi->iahb_clk)) {
-+		ret = PTR_ERR(hdmi->iahb_clk);
-+		dev_err(hdmi->dev, "Unable to get HDMI iahb clk: %d\n", ret);
-+		goto err_isfr;
-+	}
-+
-+	ret = clk_prepare_enable(hdmi->iahb_clk);
-+	if (ret) {
-+		dev_err(hdmi->dev, "Cannot enable HDMI iahb clock: %d\n", ret);
-+		goto err_isfr;
-+	}
-+
-+	/* Product and revision IDs */
-+	hdmi->version = (hdmi_readb(hdmi, HDMI_DESIGN_ID) << 8)
-+		      | (hdmi_readb(hdmi, HDMI_REVISION_ID) << 0);
-+	prod_id0 = hdmi_readb(hdmi, HDMI_PRODUCT_ID0);
-+	prod_id1 = hdmi_readb(hdmi, HDMI_PRODUCT_ID1);
-+
-+	if (prod_id0 != HDMI_PRODUCT_ID0_HDMI_TX ||
-+	    (prod_id1 & ~HDMI_PRODUCT_ID1_HDCP) != HDMI_PRODUCT_ID1_HDMI_TX) {
-+		dev_err(dev, "Unsupported HDMI controller (%04x:%02x:%02x)\n",
-+			hdmi->version, prod_id0, prod_id1);
-+		ret = -ENODEV;
-+		goto err_iahb;
-+	}
-+
-+	ret = dw_hdmi_detect_phy(hdmi);
-+	if (ret < 0)
-+		goto err_iahb;
-+
-+	dev_info(dev, "Detected HDMI TX controller v%x.%03x %s HDCP (%s)\n",
-+		 hdmi->version >> 12, hdmi->version & 0xfff,
-+		 prod_id1 & HDMI_PRODUCT_ID1_HDCP ? "with" : "without",
-+		 hdmi->phy.name);
-+
-+	initialize_hdmi_ih_mutes(hdmi);
-+
-+	irq = platform_get_irq(pdev, 0);
-+	if (irq < 0) {
-+		ret = irq;
-+		goto err_iahb;
-+	}
-+
-+	ret = devm_request_threaded_irq(dev, irq, dw_hdmi_hardirq,
-+					dw_hdmi_irq, IRQF_SHARED,
-+					dev_name(dev), hdmi);
-+	if (ret)
-+		goto err_iahb;
-+
-+	/*
-+	 * To prevent overflows in HDMI_IH_FC_STAT2, set the clk regenerator
-+	 * N and cts values before enabling phy
-+	 */
-+	hdmi_init_clk_regenerator(hdmi);
-+
-+	/* If DDC bus is not specified, try to register HDMI I2C bus */
-+	if (!hdmi->ddc) {
-+		hdmi->ddc = dw_hdmi_i2c_adapter(hdmi);
-+		if (IS_ERR(hdmi->ddc))
-+			hdmi->ddc = NULL;
-+	}
-+
-+	/*
-+	 * Configure registers related to HDMI interrupt
-+	 * generation before registering IRQ.
-+	 */
-+	hdmi_writeb(hdmi, HDMI_PHY_HPD | HDMI_PHY_RX_SENSE, HDMI_PHY_POL0);
-+
-+	/* Clear Hotplug interrupts */
-+	hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
-+		    HDMI_IH_PHY_STAT0);
-+
-+	hdmi->bridge.driver_private = hdmi;
-+	hdmi->bridge.funcs = &dw_hdmi_bridge_funcs;
-+#ifdef CONFIG_OF
-+	hdmi->bridge.of_node = pdev->dev.of_node;
-+#endif
-+
-+	ret = dw_hdmi_fb_registered(hdmi);
-+	if (ret)
-+		goto err_iahb;
-+
-+	/* Unmute interrupts */
-+	hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE),
-+		    HDMI_IH_MUTE_PHY_STAT0);
-+
-+	memset(&pdevinfo, 0, sizeof(pdevinfo));
-+	pdevinfo.parent = dev;
-+	pdevinfo.id = PLATFORM_DEVID_AUTO;
-+
-+	config0 = hdmi_readb(hdmi, HDMI_CONFIG0_ID);
-+	config3 = hdmi_readb(hdmi, HDMI_CONFIG3_ID);
-+
-+	if (iores && config3 & HDMI_CONFIG3_AHBAUDDMA) {
-+		struct dw_hdmi_audio_data audio;
-+
-+		audio.phys = iores->start;
-+		audio.base = hdmi->regs;
-+		audio.irq = irq;
-+		audio.hdmi = hdmi;
-+		audio.eld = hdmi->connector.eld;
-+
-+		pdevinfo.name = "dw-hdmi-ahb-audio";
-+		pdevinfo.data = &audio;
-+		pdevinfo.size_data = sizeof(audio);
-+		pdevinfo.dma_mask = DMA_BIT_MASK(32);
-+		hdmi->audio = platform_device_register_full(&pdevinfo);
-+	} else if (config0 & HDMI_CONFIG0_I2S) {
-+		struct dw_hdmi_i2s_audio_data audio;
-+
-+		audio.hdmi	= hdmi;
-+		audio.write	= hdmi_writeb;
-+		audio.read	= hdmi_readb;
-+
-+		pdevinfo.name = "dw-hdmi-i2s-audio";
-+		pdevinfo.data = &audio;
-+		pdevinfo.size_data = sizeof(audio);
-+		pdevinfo.dma_mask = DMA_BIT_MASK(32);
-+		hdmi->audio = platform_device_register_full(&pdevinfo);
-+	}
-+
-+	/* Reset HDMI DDC I2C master controller and mute I2CM interrupts */
-+	if (hdmi->i2c)
-+		dw_hdmi_i2c_init(hdmi);
-+
-+	platform_set_drvdata(pdev, hdmi);
-+
-+	return hdmi;
-+
-+err_iahb:
-+	if (hdmi->i2c) {
-+		i2c_del_adapter(&hdmi->i2c->adap);
-+		hdmi->ddc = NULL;
-+	}
-+
-+	clk_disable_unprepare(hdmi->iahb_clk);
-+err_isfr:
-+	clk_disable_unprepare(hdmi->isfr_clk);
-+err_res:
-+	i2c_put_adapter(hdmi->ddc);
-+
-+	return ERR_PTR(ret);
-+}
-+
-+static void __dw_hdmi_remove(struct dw_hdmi *hdmi)
-+{
-+	if (hdmi->audio && !IS_ERR(hdmi->audio))
-+		platform_device_unregister(hdmi->audio);
-+
-+	/* Disable all interrupts */
-+	hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0);
-+
-+	clk_disable_unprepare(hdmi->iahb_clk);
-+	clk_disable_unprepare(hdmi->isfr_clk);
-+
-+	if (hdmi->i2c)
-+		i2c_del_adapter(&hdmi->i2c->adap);
-+	else
-+		i2c_put_adapter(hdmi->ddc);
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Probe/remove API, used from platforms based on the DRM bridge API.
-+ */
-+int dw_hdmi_probe(struct platform_device *pdev,
-+		  const struct dw_hdmi_plat_data *plat_data)
-+{
-+	struct dw_hdmi *hdmi;
-+	int ret;
-+
-+	hdmi = __dw_hdmi_probe(pdev, plat_data);
-+	if (IS_ERR(hdmi))
-+		return PTR_ERR(hdmi);
-+
-+	ret = drm_bridge_add(&hdmi->bridge);
-+	if (ret < 0) {
-+		__dw_hdmi_remove(hdmi);
-+		return ret;
-+	}
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL_GPL(dw_hdmi_probe);
-+
-+void dw_hdmi_remove(struct platform_device *pdev)
-+{
-+	struct dw_hdmi *hdmi = platform_get_drvdata(pdev);
-+
-+	drm_bridge_remove(&hdmi->bridge);
-+
-+	__dw_hdmi_remove(hdmi);
-+}
-+EXPORT_SYMBOL_GPL(dw_hdmi_remove);
-+
-+/* -----------------------------------------------------------------------------
-+ * Bind/unbind API, used from platforms based on the component framework.
-+ */
-+int dw_hdmi_bind(struct platform_device *pdev, struct drm_encoder *encoder,
-+		 const struct dw_hdmi_plat_data *plat_data)
-+{
-+	struct dw_hdmi *hdmi;
-+	int ret;
-+
-+	hdmi = __dw_hdmi_probe(pdev, plat_data);
-+	if (IS_ERR(hdmi))
-+		return PTR_ERR(hdmi);
-+
-+	ret = drm_bridge_attach(encoder, &hdmi->bridge, NULL);
-+	if (ret) {
-+		dw_hdmi_remove(pdev);
-+		DRM_ERROR("Failed to initialize bridge with drm\n");
-+		return ret;
-+	}
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL_GPL(dw_hdmi_bind);
-+
-+void dw_hdmi_unbind(struct device *dev)
-+{
-+	struct dw_hdmi *hdmi = dev_get_drvdata(dev);
-+
-+	__dw_hdmi_remove(hdmi);
-+}
-+EXPORT_SYMBOL_GPL(dw_hdmi_unbind);
-+
-+MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
-+MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
-+MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
-+MODULE_AUTHOR("Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>");
-+MODULE_DESCRIPTION("DW HDMI transmitter driver");
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS("platform:dw-hdmi");
---- /dev/null
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h
-@@ -0,0 +1,1153 @@
-+/*
-+ * Copyright (C) 2011 Freescale Semiconductor, Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __DW_HDMI_H__
-+#define __DW_HDMI_H__
-+
-+/* Identification Registers */
-+#define HDMI_DESIGN_ID                          0x0000
-+#define HDMI_REVISION_ID                        0x0001
-+#define HDMI_PRODUCT_ID0                        0x0002
-+#define HDMI_PRODUCT_ID1                        0x0003
-+#define HDMI_CONFIG0_ID                         0x0004
-+#define HDMI_CONFIG1_ID                         0x0005
-+#define HDMI_CONFIG2_ID                         0x0006
-+#define HDMI_CONFIG3_ID                         0x0007
-+
-+/* Interrupt Registers */
-+#define HDMI_IH_FC_STAT0                        0x0100
-+#define HDMI_IH_FC_STAT1                        0x0101
-+#define HDMI_IH_FC_STAT2                        0x0102
-+#define HDMI_IH_AS_STAT0                        0x0103
-+#define HDMI_IH_PHY_STAT0                       0x0104
-+#define HDMI_IH_I2CM_STAT0                      0x0105
-+#define HDMI_IH_CEC_STAT0                       0x0106
-+#define HDMI_IH_VP_STAT0                        0x0107
-+#define HDMI_IH_I2CMPHY_STAT0                   0x0108
-+#define HDMI_IH_AHBDMAAUD_STAT0                 0x0109
-+
-+#define HDMI_IH_MUTE_FC_STAT0                   0x0180
-+#define HDMI_IH_MUTE_FC_STAT1                   0x0181
-+#define HDMI_IH_MUTE_FC_STAT2                   0x0182
-+#define HDMI_IH_MUTE_AS_STAT0                   0x0183
-+#define HDMI_IH_MUTE_PHY_STAT0                  0x0184
-+#define HDMI_IH_MUTE_I2CM_STAT0                 0x0185
-+#define HDMI_IH_MUTE_CEC_STAT0                  0x0186
-+#define HDMI_IH_MUTE_VP_STAT0                   0x0187
-+#define HDMI_IH_MUTE_I2CMPHY_STAT0              0x0188
-+#define HDMI_IH_MUTE_AHBDMAAUD_STAT0            0x0189
-+#define HDMI_IH_MUTE                            0x01FF
-+
-+/* Video Sample Registers */
-+#define HDMI_TX_INVID0                          0x0200
-+#define HDMI_TX_INSTUFFING                      0x0201
-+#define HDMI_TX_GYDATA0                         0x0202
-+#define HDMI_TX_GYDATA1                         0x0203
-+#define HDMI_TX_RCRDATA0                        0x0204
-+#define HDMI_TX_RCRDATA1                        0x0205
-+#define HDMI_TX_BCBDATA0                        0x0206
-+#define HDMI_TX_BCBDATA1                        0x0207
-+
-+/* Video Packetizer Registers */
-+#define HDMI_VP_STATUS                          0x0800
-+#define HDMI_VP_PR_CD                           0x0801
-+#define HDMI_VP_STUFF                           0x0802
-+#define HDMI_VP_REMAP                           0x0803
-+#define HDMI_VP_CONF                            0x0804
-+#define HDMI_VP_STAT                            0x0805
-+#define HDMI_VP_INT                             0x0806
-+#define HDMI_VP_MASK                            0x0807
-+#define HDMI_VP_POL                             0x0808
-+
-+/* Frame Composer Registers */
-+#define HDMI_FC_INVIDCONF                       0x1000
-+#define HDMI_FC_INHACTV0                        0x1001
-+#define HDMI_FC_INHACTV1                        0x1002
-+#define HDMI_FC_INHBLANK0                       0x1003
-+#define HDMI_FC_INHBLANK1                       0x1004
-+#define HDMI_FC_INVACTV0                        0x1005
-+#define HDMI_FC_INVACTV1                        0x1006
-+#define HDMI_FC_INVBLANK                        0x1007
-+#define HDMI_FC_HSYNCINDELAY0                   0x1008
-+#define HDMI_FC_HSYNCINDELAY1                   0x1009
-+#define HDMI_FC_HSYNCINWIDTH0                   0x100A
-+#define HDMI_FC_HSYNCINWIDTH1                   0x100B
-+#define HDMI_FC_VSYNCINDELAY                    0x100C
-+#define HDMI_FC_VSYNCINWIDTH                    0x100D
-+#define HDMI_FC_INFREQ0                         0x100E
-+#define HDMI_FC_INFREQ1                         0x100F
-+#define HDMI_FC_INFREQ2                         0x1010
-+#define HDMI_FC_CTRLDUR                         0x1011
-+#define HDMI_FC_EXCTRLDUR                       0x1012
-+#define HDMI_FC_EXCTRLSPAC                      0x1013
-+#define HDMI_FC_CH0PREAM                        0x1014
-+#define HDMI_FC_CH1PREAM                        0x1015
-+#define HDMI_FC_CH2PREAM                        0x1016
-+#define HDMI_FC_AVICONF3                        0x1017
-+#define HDMI_FC_GCP                             0x1018
-+#define HDMI_FC_AVICONF0                        0x1019
-+#define HDMI_FC_AVICONF1                        0x101A
-+#define HDMI_FC_AVICONF2                        0x101B
-+#define HDMI_FC_AVIVID                          0x101C
-+#define HDMI_FC_AVIETB0                         0x101D
-+#define HDMI_FC_AVIETB1                         0x101E
-+#define HDMI_FC_AVISBB0                         0x101F
-+#define HDMI_FC_AVISBB1                         0x1020
-+#define HDMI_FC_AVIELB0                         0x1021
-+#define HDMI_FC_AVIELB1                         0x1022
-+#define HDMI_FC_AVISRB0                         0x1023
-+#define HDMI_FC_AVISRB1                         0x1024
-+#define HDMI_FC_AUDICONF0                       0x1025
-+#define HDMI_FC_AUDICONF1                       0x1026
-+#define HDMI_FC_AUDICONF2                       0x1027
-+#define HDMI_FC_AUDICONF3                       0x1028
-+#define HDMI_FC_VSDIEEEID0                      0x1029
-+#define HDMI_FC_VSDSIZE                         0x102A
-+#define HDMI_FC_VSDIEEEID1                      0x1030
-+#define HDMI_FC_VSDIEEEID2                      0x1031
-+#define HDMI_FC_VSDPAYLOAD0                     0x1032
-+#define HDMI_FC_VSDPAYLOAD1                     0x1033
-+#define HDMI_FC_VSDPAYLOAD2                     0x1034
-+#define HDMI_FC_VSDPAYLOAD3                     0x1035
-+#define HDMI_FC_VSDPAYLOAD4                     0x1036
-+#define HDMI_FC_VSDPAYLOAD5                     0x1037
-+#define HDMI_FC_VSDPAYLOAD6                     0x1038
-+#define HDMI_FC_VSDPAYLOAD7                     0x1039
-+#define HDMI_FC_VSDPAYLOAD8                     0x103A
-+#define HDMI_FC_VSDPAYLOAD9                     0x103B
-+#define HDMI_FC_VSDPAYLOAD10                    0x103C
-+#define HDMI_FC_VSDPAYLOAD11                    0x103D
-+#define HDMI_FC_VSDPAYLOAD12                    0x103E
-+#define HDMI_FC_VSDPAYLOAD13                    0x103F
-+#define HDMI_FC_VSDPAYLOAD14                    0x1040
-+#define HDMI_FC_VSDPAYLOAD15                    0x1041
-+#define HDMI_FC_VSDPAYLOAD16                    0x1042
-+#define HDMI_FC_VSDPAYLOAD17                    0x1043
-+#define HDMI_FC_VSDPAYLOAD18                    0x1044
-+#define HDMI_FC_VSDPAYLOAD19                    0x1045
-+#define HDMI_FC_VSDPAYLOAD20                    0x1046
-+#define HDMI_FC_VSDPAYLOAD21                    0x1047
-+#define HDMI_FC_VSDPAYLOAD22                    0x1048
-+#define HDMI_FC_VSDPAYLOAD23                    0x1049
-+#define HDMI_FC_SPDVENDORNAME0                  0x104A
-+#define HDMI_FC_SPDVENDORNAME1                  0x104B
-+#define HDMI_FC_SPDVENDORNAME2                  0x104C
-+#define HDMI_FC_SPDVENDORNAME3                  0x104D
-+#define HDMI_FC_SPDVENDORNAME4                  0x104E
-+#define HDMI_FC_SPDVENDORNAME5                  0x104F
-+#define HDMI_FC_SPDVENDORNAME6                  0x1050
-+#define HDMI_FC_SPDVENDORNAME7                  0x1051
-+#define HDMI_FC_SDPPRODUCTNAME0                 0x1052
-+#define HDMI_FC_SDPPRODUCTNAME1                 0x1053
-+#define HDMI_FC_SDPPRODUCTNAME2                 0x1054
-+#define HDMI_FC_SDPPRODUCTNAME3                 0x1055
-+#define HDMI_FC_SDPPRODUCTNAME4                 0x1056
-+#define HDMI_FC_SDPPRODUCTNAME5                 0x1057
-+#define HDMI_FC_SDPPRODUCTNAME6                 0x1058
-+#define HDMI_FC_SDPPRODUCTNAME7                 0x1059
-+#define HDMI_FC_SDPPRODUCTNAME8                 0x105A
-+#define HDMI_FC_SDPPRODUCTNAME9                 0x105B
-+#define HDMI_FC_SDPPRODUCTNAME10                0x105C
-+#define HDMI_FC_SDPPRODUCTNAME11                0x105D
-+#define HDMI_FC_SDPPRODUCTNAME12                0x105E
-+#define HDMI_FC_SDPPRODUCTNAME13                0x105F
-+#define HDMI_FC_SDPPRODUCTNAME14                0x1060
-+#define HDMI_FC_SPDPRODUCTNAME15                0x1061
-+#define HDMI_FC_SPDDEVICEINF                    0x1062
-+#define HDMI_FC_AUDSCONF                        0x1063
-+#define HDMI_FC_AUDSSTAT                        0x1064
-+#define HDMI_FC_DATACH0FILL                     0x1070
-+#define HDMI_FC_DATACH1FILL                     0x1071
-+#define HDMI_FC_DATACH2FILL                     0x1072
-+#define HDMI_FC_CTRLQHIGH                       0x1073
-+#define HDMI_FC_CTRLQLOW                        0x1074
-+#define HDMI_FC_ACP0                            0x1075
-+#define HDMI_FC_ACP28                           0x1076
-+#define HDMI_FC_ACP27                           0x1077
-+#define HDMI_FC_ACP26                           0x1078
-+#define HDMI_FC_ACP25                           0x1079
-+#define HDMI_FC_ACP24                           0x107A
-+#define HDMI_FC_ACP23                           0x107B
-+#define HDMI_FC_ACP22                           0x107C
-+#define HDMI_FC_ACP21                           0x107D
-+#define HDMI_FC_ACP20                           0x107E
-+#define HDMI_FC_ACP19                           0x107F
-+#define HDMI_FC_ACP18                           0x1080
-+#define HDMI_FC_ACP17                           0x1081
-+#define HDMI_FC_ACP16                           0x1082
-+#define HDMI_FC_ACP15                           0x1083
-+#define HDMI_FC_ACP14                           0x1084
-+#define HDMI_FC_ACP13                           0x1085
-+#define HDMI_FC_ACP12                           0x1086
-+#define HDMI_FC_ACP11                           0x1087
-+#define HDMI_FC_ACP10                           0x1088
-+#define HDMI_FC_ACP9                            0x1089
-+#define HDMI_FC_ACP8                            0x108A
-+#define HDMI_FC_ACP7                            0x108B
-+#define HDMI_FC_ACP6                            0x108C
-+#define HDMI_FC_ACP5                            0x108D
-+#define HDMI_FC_ACP4                            0x108E
-+#define HDMI_FC_ACP3                            0x108F
-+#define HDMI_FC_ACP2                            0x1090
-+#define HDMI_FC_ACP1                            0x1091
-+#define HDMI_FC_ISCR1_0                         0x1092
-+#define HDMI_FC_ISCR1_16                        0x1093
-+#define HDMI_FC_ISCR1_15                        0x1094
-+#define HDMI_FC_ISCR1_14                        0x1095
-+#define HDMI_FC_ISCR1_13                        0x1096
-+#define HDMI_FC_ISCR1_12                        0x1097
-+#define HDMI_FC_ISCR1_11                        0x1098
-+#define HDMI_FC_ISCR1_10                        0x1099
-+#define HDMI_FC_ISCR1_9                         0x109A
-+#define HDMI_FC_ISCR1_8                         0x109B
-+#define HDMI_FC_ISCR1_7                         0x109C
-+#define HDMI_FC_ISCR1_6                         0x109D
-+#define HDMI_FC_ISCR1_5                         0x109E
-+#define HDMI_FC_ISCR1_4                         0x109F
-+#define HDMI_FC_ISCR1_3                         0x10A0
-+#define HDMI_FC_ISCR1_2                         0x10A1
-+#define HDMI_FC_ISCR1_1                         0x10A2
-+#define HDMI_FC_ISCR2_15                        0x10A3
-+#define HDMI_FC_ISCR2_14                        0x10A4
-+#define HDMI_FC_ISCR2_13                        0x10A5
-+#define HDMI_FC_ISCR2_12                        0x10A6
-+#define HDMI_FC_ISCR2_11                        0x10A7
-+#define HDMI_FC_ISCR2_10                        0x10A8
-+#define HDMI_FC_ISCR2_9                         0x10A9
-+#define HDMI_FC_ISCR2_8                         0x10AA
-+#define HDMI_FC_ISCR2_7                         0x10AB
-+#define HDMI_FC_ISCR2_6                         0x10AC
-+#define HDMI_FC_ISCR2_5                         0x10AD
-+#define HDMI_FC_ISCR2_4                         0x10AE
-+#define HDMI_FC_ISCR2_3                         0x10AF
-+#define HDMI_FC_ISCR2_2                         0x10B0
-+#define HDMI_FC_ISCR2_1                         0x10B1
-+#define HDMI_FC_ISCR2_0                         0x10B2
-+#define HDMI_FC_DATAUTO0                        0x10B3
-+#define HDMI_FC_DATAUTO1                        0x10B4
-+#define HDMI_FC_DATAUTO2                        0x10B5
-+#define HDMI_FC_DATMAN                          0x10B6
-+#define HDMI_FC_DATAUTO3                        0x10B7
-+#define HDMI_FC_RDRB0                           0x10B8
-+#define HDMI_FC_RDRB1                           0x10B9
-+#define HDMI_FC_RDRB2                           0x10BA
-+#define HDMI_FC_RDRB3                           0x10BB
-+#define HDMI_FC_RDRB4                           0x10BC
-+#define HDMI_FC_RDRB5                           0x10BD
-+#define HDMI_FC_RDRB6                           0x10BE
-+#define HDMI_FC_RDRB7                           0x10BF
-+#define HDMI_FC_STAT0                           0x10D0
-+#define HDMI_FC_INT0                            0x10D1
-+#define HDMI_FC_MASK0                           0x10D2
-+#define HDMI_FC_POL0                            0x10D3
-+#define HDMI_FC_STAT1                           0x10D4
-+#define HDMI_FC_INT1                            0x10D5
-+#define HDMI_FC_MASK1                           0x10D6
-+#define HDMI_FC_POL1                            0x10D7
-+#define HDMI_FC_STAT2                           0x10D8
-+#define HDMI_FC_INT2                            0x10D9
-+#define HDMI_FC_MASK2                           0x10DA
-+#define HDMI_FC_POL2                            0x10DB
-+#define HDMI_FC_PRCONF                          0x10E0
-+
-+#define HDMI_FC_GMD_STAT                        0x1100
-+#define HDMI_FC_GMD_EN                          0x1101
-+#define HDMI_FC_GMD_UP                          0x1102
-+#define HDMI_FC_GMD_CONF                        0x1103
-+#define HDMI_FC_GMD_HB                          0x1104
-+#define HDMI_FC_GMD_PB0                         0x1105
-+#define HDMI_FC_GMD_PB1                         0x1106
-+#define HDMI_FC_GMD_PB2                         0x1107
-+#define HDMI_FC_GMD_PB3                         0x1108
-+#define HDMI_FC_GMD_PB4                         0x1109
-+#define HDMI_FC_GMD_PB5                         0x110A
-+#define HDMI_FC_GMD_PB6                         0x110B
-+#define HDMI_FC_GMD_PB7                         0x110C
-+#define HDMI_FC_GMD_PB8                         0x110D
-+#define HDMI_FC_GMD_PB9                         0x110E
-+#define HDMI_FC_GMD_PB10                        0x110F
-+#define HDMI_FC_GMD_PB11                        0x1110
-+#define HDMI_FC_GMD_PB12                        0x1111
-+#define HDMI_FC_GMD_PB13                        0x1112
-+#define HDMI_FC_GMD_PB14                        0x1113
-+#define HDMI_FC_GMD_PB15                        0x1114
-+#define HDMI_FC_GMD_PB16                        0x1115
-+#define HDMI_FC_GMD_PB17                        0x1116
-+#define HDMI_FC_GMD_PB18                        0x1117
-+#define HDMI_FC_GMD_PB19                        0x1118
-+#define HDMI_FC_GMD_PB20                        0x1119
-+#define HDMI_FC_GMD_PB21                        0x111A
-+#define HDMI_FC_GMD_PB22                        0x111B
-+#define HDMI_FC_GMD_PB23                        0x111C
-+#define HDMI_FC_GMD_PB24                        0x111D
-+#define HDMI_FC_GMD_PB25                        0x111E
-+#define HDMI_FC_GMD_PB26                        0x111F
-+#define HDMI_FC_GMD_PB27                        0x1120
-+
-+#define HDMI_FC_DBGFORCE                        0x1200
-+#define HDMI_FC_DBGAUD0CH0                      0x1201
-+#define HDMI_FC_DBGAUD1CH0                      0x1202
-+#define HDMI_FC_DBGAUD2CH0                      0x1203
-+#define HDMI_FC_DBGAUD0CH1                      0x1204
-+#define HDMI_FC_DBGAUD1CH1                      0x1205
-+#define HDMI_FC_DBGAUD2CH1                      0x1206
-+#define HDMI_FC_DBGAUD0CH2                      0x1207
-+#define HDMI_FC_DBGAUD1CH2                      0x1208
-+#define HDMI_FC_DBGAUD2CH2                      0x1209
-+#define HDMI_FC_DBGAUD0CH3                      0x120A
-+#define HDMI_FC_DBGAUD1CH3                      0x120B
-+#define HDMI_FC_DBGAUD2CH3                      0x120C
-+#define HDMI_FC_DBGAUD0CH4                      0x120D
-+#define HDMI_FC_DBGAUD1CH4                      0x120E
-+#define HDMI_FC_DBGAUD2CH4                      0x120F
-+#define HDMI_FC_DBGAUD0CH5                      0x1210
-+#define HDMI_FC_DBGAUD1CH5                      0x1211
-+#define HDMI_FC_DBGAUD2CH5                      0x1212
-+#define HDMI_FC_DBGAUD0CH6                      0x1213
-+#define HDMI_FC_DBGAUD1CH6                      0x1214
-+#define HDMI_FC_DBGAUD2CH6                      0x1215
-+#define HDMI_FC_DBGAUD0CH7                      0x1216
-+#define HDMI_FC_DBGAUD1CH7                      0x1217
-+#define HDMI_FC_DBGAUD2CH7                      0x1218
-+#define HDMI_FC_DBGTMDS0                        0x1219
-+#define HDMI_FC_DBGTMDS1                        0x121A
-+#define HDMI_FC_DBGTMDS2                        0x121B
-+
-+/* HDMI Source PHY Registers */
-+#define HDMI_PHY_CONF0                          0x3000
-+#define HDMI_PHY_TST0                           0x3001
-+#define HDMI_PHY_TST1                           0x3002
-+#define HDMI_PHY_TST2                           0x3003
-+#define HDMI_PHY_STAT0                          0x3004
-+#define HDMI_PHY_INT0                           0x3005
-+#define HDMI_PHY_MASK0                          0x3006
-+#define HDMI_PHY_POL0                           0x3007
-+
-+/* HDMI Master PHY Registers */
-+#define HDMI_PHY_I2CM_SLAVE_ADDR                0x3020
-+#define HDMI_PHY_I2CM_ADDRESS_ADDR              0x3021
-+#define HDMI_PHY_I2CM_DATAO_1_ADDR              0x3022
-+#define HDMI_PHY_I2CM_DATAO_0_ADDR              0x3023
-+#define HDMI_PHY_I2CM_DATAI_1_ADDR              0x3024
-+#define HDMI_PHY_I2CM_DATAI_0_ADDR              0x3025
-+#define HDMI_PHY_I2CM_OPERATION_ADDR            0x3026
-+#define HDMI_PHY_I2CM_INT_ADDR                  0x3027
-+#define HDMI_PHY_I2CM_CTLINT_ADDR               0x3028
-+#define HDMI_PHY_I2CM_DIV_ADDR                  0x3029
-+#define HDMI_PHY_I2CM_SOFTRSTZ_ADDR             0x302a
-+#define HDMI_PHY_I2CM_SS_SCL_HCNT_1_ADDR        0x302b
-+#define HDMI_PHY_I2CM_SS_SCL_HCNT_0_ADDR        0x302c
-+#define HDMI_PHY_I2CM_SS_SCL_LCNT_1_ADDR        0x302d
-+#define HDMI_PHY_I2CM_SS_SCL_LCNT_0_ADDR        0x302e
-+#define HDMI_PHY_I2CM_FS_SCL_HCNT_1_ADDR        0x302f
-+#define HDMI_PHY_I2CM_FS_SCL_HCNT_0_ADDR        0x3030
-+#define HDMI_PHY_I2CM_FS_SCL_LCNT_1_ADDR        0x3031
-+#define HDMI_PHY_I2CM_FS_SCL_LCNT_0_ADDR        0x3032
-+
-+/* Audio Sampler Registers */
-+#define HDMI_AUD_CONF0                          0x3100
-+#define HDMI_AUD_CONF1                          0x3101
-+#define HDMI_AUD_INT                            0x3102
-+#define HDMI_AUD_CONF2                          0x3103
-+#define HDMI_AUD_N1                             0x3200
-+#define HDMI_AUD_N2                             0x3201
-+#define HDMI_AUD_N3                             0x3202
-+#define HDMI_AUD_CTS1                           0x3203
-+#define HDMI_AUD_CTS2                           0x3204
-+#define HDMI_AUD_CTS3                           0x3205
-+#define HDMI_AUD_INPUTCLKFS                     0x3206
-+#define HDMI_AUD_SPDIFINT			0x3302
-+#define HDMI_AUD_CONF0_HBR                      0x3400
-+#define HDMI_AUD_HBR_STATUS                     0x3401
-+#define HDMI_AUD_HBR_INT                        0x3402
-+#define HDMI_AUD_HBR_POL                        0x3403
-+#define HDMI_AUD_HBR_MASK                       0x3404
-+
-+/*
-+ * Generic Parallel Audio Interface Registers
-+ * Not used as GPAUD interface is not enabled in hw
-+ */
-+#define HDMI_GP_CONF0                           0x3500
-+#define HDMI_GP_CONF1                           0x3501
-+#define HDMI_GP_CONF2                           0x3502
-+#define HDMI_GP_STAT                            0x3503
-+#define HDMI_GP_INT                             0x3504
-+#define HDMI_GP_MASK                            0x3505
-+#define HDMI_GP_POL                             0x3506
-+
-+/* Audio DMA Registers */
-+#define HDMI_AHB_DMA_CONF0                      0x3600
-+#define HDMI_AHB_DMA_START                      0x3601
-+#define HDMI_AHB_DMA_STOP                       0x3602
-+#define HDMI_AHB_DMA_THRSLD                     0x3603
-+#define HDMI_AHB_DMA_STRADDR0                   0x3604
-+#define HDMI_AHB_DMA_STRADDR1                   0x3605
-+#define HDMI_AHB_DMA_STRADDR2                   0x3606
-+#define HDMI_AHB_DMA_STRADDR3                   0x3607
-+#define HDMI_AHB_DMA_STPADDR0                   0x3608
-+#define HDMI_AHB_DMA_STPADDR1                   0x3609
-+#define HDMI_AHB_DMA_STPADDR2                   0x360a
-+#define HDMI_AHB_DMA_STPADDR3                   0x360b
-+#define HDMI_AHB_DMA_BSTADDR0                   0x360c
-+#define HDMI_AHB_DMA_BSTADDR1                   0x360d
-+#define HDMI_AHB_DMA_BSTADDR2                   0x360e
-+#define HDMI_AHB_DMA_BSTADDR3                   0x360f
-+#define HDMI_AHB_DMA_MBLENGTH0                  0x3610
-+#define HDMI_AHB_DMA_MBLENGTH1                  0x3611
-+#define HDMI_AHB_DMA_STAT                       0x3612
-+#define HDMI_AHB_DMA_INT                        0x3613
-+#define HDMI_AHB_DMA_MASK                       0x3614
-+#define HDMI_AHB_DMA_POL                        0x3615
-+#define HDMI_AHB_DMA_CONF1                      0x3616
-+#define HDMI_AHB_DMA_BUFFSTAT                   0x3617
-+#define HDMI_AHB_DMA_BUFFINT                    0x3618
-+#define HDMI_AHB_DMA_BUFFMASK                   0x3619
-+#define HDMI_AHB_DMA_BUFFPOL                    0x361a
-+
-+/* Main Controller Registers */
-+#define HDMI_MC_SFRDIV                          0x4000
-+#define HDMI_MC_CLKDIS                          0x4001
-+#define HDMI_MC_SWRSTZ                          0x4002
-+#define HDMI_MC_OPCTRL                          0x4003
-+#define HDMI_MC_FLOWCTRL                        0x4004
-+#define HDMI_MC_PHYRSTZ                         0x4005
-+#define HDMI_MC_LOCKONCLOCK                     0x4006
-+#define HDMI_MC_HEACPHY_RST                     0x4007
-+
-+/* Color Space  Converter Registers */
-+#define HDMI_CSC_CFG                            0x4100
-+#define HDMI_CSC_SCALE                          0x4101
-+#define HDMI_CSC_COEF_A1_MSB                    0x4102
-+#define HDMI_CSC_COEF_A1_LSB                    0x4103
-+#define HDMI_CSC_COEF_A2_MSB                    0x4104
-+#define HDMI_CSC_COEF_A2_LSB                    0x4105
-+#define HDMI_CSC_COEF_A3_MSB                    0x4106
-+#define HDMI_CSC_COEF_A3_LSB                    0x4107
-+#define HDMI_CSC_COEF_A4_MSB                    0x4108
-+#define HDMI_CSC_COEF_A4_LSB                    0x4109
-+#define HDMI_CSC_COEF_B1_MSB                    0x410A
-+#define HDMI_CSC_COEF_B1_LSB                    0x410B
-+#define HDMI_CSC_COEF_B2_MSB                    0x410C
-+#define HDMI_CSC_COEF_B2_LSB                    0x410D
-+#define HDMI_CSC_COEF_B3_MSB                    0x410E
-+#define HDMI_CSC_COEF_B3_LSB                    0x410F
-+#define HDMI_CSC_COEF_B4_MSB                    0x4110
-+#define HDMI_CSC_COEF_B4_LSB                    0x4111
-+#define HDMI_CSC_COEF_C1_MSB                    0x4112
-+#define HDMI_CSC_COEF_C1_LSB                    0x4113
-+#define HDMI_CSC_COEF_C2_MSB                    0x4114
-+#define HDMI_CSC_COEF_C2_LSB                    0x4115
-+#define HDMI_CSC_COEF_C3_MSB                    0x4116
-+#define HDMI_CSC_COEF_C3_LSB                    0x4117
-+#define HDMI_CSC_COEF_C4_MSB                    0x4118
-+#define HDMI_CSC_COEF_C4_LSB                    0x4119
-+
-+/* HDCP Encryption Engine Registers */
-+#define HDMI_A_HDCPCFG0                         0x5000
-+#define HDMI_A_HDCPCFG1                         0x5001
-+#define HDMI_A_HDCPOBS0                         0x5002
-+#define HDMI_A_HDCPOBS1                         0x5003
-+#define HDMI_A_HDCPOBS2                         0x5004
-+#define HDMI_A_HDCPOBS3                         0x5005
-+#define HDMI_A_APIINTCLR                        0x5006
-+#define HDMI_A_APIINTSTAT                       0x5007
-+#define HDMI_A_APIINTMSK                        0x5008
-+#define HDMI_A_VIDPOLCFG                        0x5009
-+#define HDMI_A_OESSWCFG                         0x500A
-+#define HDMI_A_TIMER1SETUP0                     0x500B
-+#define HDMI_A_TIMER1SETUP1                     0x500C
-+#define HDMI_A_TIMER2SETUP0                     0x500D
-+#define HDMI_A_TIMER2SETUP1                     0x500E
-+#define HDMI_A_100MSCFG                         0x500F
-+#define HDMI_A_2SCFG0                           0x5010
-+#define HDMI_A_2SCFG1                           0x5011
-+#define HDMI_A_5SCFG0                           0x5012
-+#define HDMI_A_5SCFG1                           0x5013
-+#define HDMI_A_SRMVERLSB                        0x5014
-+#define HDMI_A_SRMVERMSB                        0x5015
-+#define HDMI_A_SRMCTRL                          0x5016
-+#define HDMI_A_SFRSETUP                         0x5017
-+#define HDMI_A_I2CHSETUP                        0x5018
-+#define HDMI_A_INTSETUP                         0x5019
-+#define HDMI_A_PRESETUP                         0x501A
-+#define HDMI_A_SRM_BASE                         0x5020
-+
-+/* CEC Engine Registers */
-+#define HDMI_CEC_CTRL                           0x7D00
-+#define HDMI_CEC_STAT                           0x7D01
-+#define HDMI_CEC_MASK                           0x7D02
-+#define HDMI_CEC_POLARITY                       0x7D03
-+#define HDMI_CEC_INT                            0x7D04
-+#define HDMI_CEC_ADDR_L                         0x7D05
-+#define HDMI_CEC_ADDR_H                         0x7D06
-+#define HDMI_CEC_TX_CNT                         0x7D07
-+#define HDMI_CEC_RX_CNT                         0x7D08
-+#define HDMI_CEC_TX_DATA0                       0x7D10
-+#define HDMI_CEC_TX_DATA1                       0x7D11
-+#define HDMI_CEC_TX_DATA2                       0x7D12
-+#define HDMI_CEC_TX_DATA3                       0x7D13
-+#define HDMI_CEC_TX_DATA4                       0x7D14
-+#define HDMI_CEC_TX_DATA5                       0x7D15
-+#define HDMI_CEC_TX_DATA6                       0x7D16
-+#define HDMI_CEC_TX_DATA7                       0x7D17
-+#define HDMI_CEC_TX_DATA8                       0x7D18
-+#define HDMI_CEC_TX_DATA9                       0x7D19
-+#define HDMI_CEC_TX_DATA10                      0x7D1a
-+#define HDMI_CEC_TX_DATA11                      0x7D1b
-+#define HDMI_CEC_TX_DATA12                      0x7D1c
-+#define HDMI_CEC_TX_DATA13                      0x7D1d
-+#define HDMI_CEC_TX_DATA14                      0x7D1e
-+#define HDMI_CEC_TX_DATA15                      0x7D1f
-+#define HDMI_CEC_RX_DATA0                       0x7D20
-+#define HDMI_CEC_RX_DATA1                       0x7D21
-+#define HDMI_CEC_RX_DATA2                       0x7D22
-+#define HDMI_CEC_RX_DATA3                       0x7D23
-+#define HDMI_CEC_RX_DATA4                       0x7D24
-+#define HDMI_CEC_RX_DATA5                       0x7D25
-+#define HDMI_CEC_RX_DATA6                       0x7D26
-+#define HDMI_CEC_RX_DATA7                       0x7D27
-+#define HDMI_CEC_RX_DATA8                       0x7D28
-+#define HDMI_CEC_RX_DATA9                       0x7D29
-+#define HDMI_CEC_RX_DATA10                      0x7D2a
-+#define HDMI_CEC_RX_DATA11                      0x7D2b
-+#define HDMI_CEC_RX_DATA12                      0x7D2c
-+#define HDMI_CEC_RX_DATA13                      0x7D2d
-+#define HDMI_CEC_RX_DATA14                      0x7D2e
-+#define HDMI_CEC_RX_DATA15                      0x7D2f
-+#define HDMI_CEC_LOCK                           0x7D30
-+#define HDMI_CEC_WKUPCTRL                       0x7D31
-+
-+/* I2C Master Registers (E-DDC) */
-+#define HDMI_I2CM_SLAVE                         0x7E00
-+#define HDMI_I2CM_ADDRESS                       0x7E01
-+#define HDMI_I2CM_DATAO                         0x7E02
-+#define HDMI_I2CM_DATAI                         0x7E03
-+#define HDMI_I2CM_OPERATION                     0x7E04
-+#define HDMI_I2CM_INT                           0x7E05
-+#define HDMI_I2CM_CTLINT                        0x7E06
-+#define HDMI_I2CM_DIV                           0x7E07
-+#define HDMI_I2CM_SEGADDR                       0x7E08
-+#define HDMI_I2CM_SOFTRSTZ                      0x7E09
-+#define HDMI_I2CM_SEGPTR                        0x7E0A
-+#define HDMI_I2CM_SS_SCL_HCNT_1_ADDR            0x7E0B
-+#define HDMI_I2CM_SS_SCL_HCNT_0_ADDR            0x7E0C
-+#define HDMI_I2CM_SS_SCL_LCNT_1_ADDR            0x7E0D
-+#define HDMI_I2CM_SS_SCL_LCNT_0_ADDR            0x7E0E
-+#define HDMI_I2CM_FS_SCL_HCNT_1_ADDR            0x7E0F
-+#define HDMI_I2CM_FS_SCL_HCNT_0_ADDR            0x7E10
-+#define HDMI_I2CM_FS_SCL_LCNT_1_ADDR            0x7E11
-+#define HDMI_I2CM_FS_SCL_LCNT_0_ADDR            0x7E12
-+
-+enum {
-+/* PRODUCT_ID0 field values */
-+	HDMI_PRODUCT_ID0_HDMI_TX = 0xa0,
-+
-+/* PRODUCT_ID1 field values */
-+	HDMI_PRODUCT_ID1_HDCP = 0xc0,
-+	HDMI_PRODUCT_ID1_HDMI_RX = 0x02,
-+	HDMI_PRODUCT_ID1_HDMI_TX = 0x01,
-+
-+/* CONFIG0_ID field values */
-+	HDMI_CONFIG0_I2S = 0x10,
-+
-+/* CONFIG1_ID field values */
-+	HDMI_CONFIG1_AHB = 0x01,
-+
-+/* CONFIG3_ID field values */
-+	HDMI_CONFIG3_AHBAUDDMA = 0x02,
-+	HDMI_CONFIG3_GPAUD = 0x01,
-+
-+/* IH_FC_INT2 field values */
-+	HDMI_IH_FC_INT2_OVERFLOW_MASK = 0x03,
-+	HDMI_IH_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02,
-+	HDMI_IH_FC_INT2_HIGH_PRIORITY_OVERFLOW = 0x01,
-+
-+/* IH_FC_STAT2 field values */
-+	HDMI_IH_FC_STAT2_OVERFLOW_MASK = 0x03,
-+	HDMI_IH_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,
-+	HDMI_IH_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,
-+
-+/* IH_PHY_STAT0 field values */
-+	HDMI_IH_PHY_STAT0_RX_SENSE3 = 0x20,
-+	HDMI_IH_PHY_STAT0_RX_SENSE2 = 0x10,
-+	HDMI_IH_PHY_STAT0_RX_SENSE1 = 0x8,
-+	HDMI_IH_PHY_STAT0_RX_SENSE0 = 0x4,
-+	HDMI_IH_PHY_STAT0_TX_PHY_LOCK = 0x2,
-+	HDMI_IH_PHY_STAT0_HPD = 0x1,
-+
-+/* IH_I2CM_STAT0 and IH_MUTE_I2CM_STAT0 field values */
-+	HDMI_IH_I2CM_STAT0_DONE = 0x2,
-+	HDMI_IH_I2CM_STAT0_ERROR = 0x1,
-+
-+/* IH_MUTE_I2CMPHY_STAT0 field values */
-+	HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYDONE = 0x2,
-+	HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYERROR = 0x1,
-+
-+/* IH_AHBDMAAUD_STAT0 field values */
-+	HDMI_IH_AHBDMAAUD_STAT0_ERROR = 0x20,
-+	HDMI_IH_AHBDMAAUD_STAT0_LOST = 0x10,
-+	HDMI_IH_AHBDMAAUD_STAT0_RETRY = 0x08,
-+	HDMI_IH_AHBDMAAUD_STAT0_DONE = 0x04,
-+	HDMI_IH_AHBDMAAUD_STAT0_BUFFFULL = 0x02,
-+	HDMI_IH_AHBDMAAUD_STAT0_BUFFEMPTY = 0x01,
-+
-+/* IH_MUTE_FC_STAT2 field values */
-+	HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK = 0x03,
-+	HDMI_IH_MUTE_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,
-+	HDMI_IH_MUTE_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,
-+
-+/* IH_MUTE_AHBDMAAUD_STAT0 field values */
-+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_ERROR = 0x20,
-+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_LOST = 0x10,
-+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_RETRY = 0x08,
-+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE = 0x04,
-+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFFULL = 0x02,
-+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFEMPTY = 0x01,
-+
-+/* IH_MUTE field values */
-+	HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT = 0x2,
-+	HDMI_IH_MUTE_MUTE_ALL_INTERRUPT = 0x1,
-+
-+/* TX_INVID0 field values */
-+	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_MASK = 0x80,
-+	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_ENABLE = 0x80,
-+	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE = 0x00,
-+	HDMI_TX_INVID0_VIDEO_MAPPING_MASK = 0x1F,
-+	HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET = 0,
-+
-+/* TX_INSTUFFING field values */
-+	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_MASK = 0x4,
-+	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE = 0x4,
-+	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_DISABLE = 0x0,
-+	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_MASK = 0x2,
-+	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE = 0x2,
-+	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_DISABLE = 0x0,
-+	HDMI_TX_INSTUFFING_GYDATA_STUFFING_MASK = 0x1,
-+	HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE = 0x1,
-+	HDMI_TX_INSTUFFING_GYDATA_STUFFING_DISABLE = 0x0,
-+
-+/* VP_PR_CD field values */
-+	HDMI_VP_PR_CD_COLOR_DEPTH_MASK = 0xF0,
-+	HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET = 4,
-+	HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK = 0x0F,
-+	HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET = 0,
-+
-+/* VP_STUFF field values */
-+	HDMI_VP_STUFF_IDEFAULT_PHASE_MASK = 0x20,
-+	HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET = 5,
-+	HDMI_VP_STUFF_IFIX_PP_TO_LAST_MASK = 0x10,
-+	HDMI_VP_STUFF_IFIX_PP_TO_LAST_OFFSET = 4,
-+	HDMI_VP_STUFF_ICX_GOTO_P0_ST_MASK = 0x8,
-+	HDMI_VP_STUFF_ICX_GOTO_P0_ST_OFFSET = 3,
-+	HDMI_VP_STUFF_YCC422_STUFFING_MASK = 0x4,
-+	HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE = 0x4,
-+	HDMI_VP_STUFF_YCC422_STUFFING_DIRECT_MODE = 0x0,
-+	HDMI_VP_STUFF_PP_STUFFING_MASK = 0x2,
-+	HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE = 0x2,
-+	HDMI_VP_STUFF_PP_STUFFING_DIRECT_MODE = 0x0,
-+	HDMI_VP_STUFF_PR_STUFFING_MASK = 0x1,
-+	HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE = 0x1,
-+	HDMI_VP_STUFF_PR_STUFFING_DIRECT_MODE = 0x0,
-+
-+/* VP_CONF field values */
-+	HDMI_VP_CONF_BYPASS_EN_MASK = 0x40,
-+	HDMI_VP_CONF_BYPASS_EN_ENABLE = 0x40,
-+	HDMI_VP_CONF_BYPASS_EN_DISABLE = 0x00,
-+	HDMI_VP_CONF_PP_EN_ENMASK = 0x20,
-+	HDMI_VP_CONF_PP_EN_ENABLE = 0x20,
-+	HDMI_VP_CONF_PP_EN_DISABLE = 0x00,
-+	HDMI_VP_CONF_PR_EN_MASK = 0x10,
-+	HDMI_VP_CONF_PR_EN_ENABLE = 0x10,
-+	HDMI_VP_CONF_PR_EN_DISABLE = 0x00,
-+	HDMI_VP_CONF_YCC422_EN_MASK = 0x8,
-+	HDMI_VP_CONF_YCC422_EN_ENABLE = 0x8,
-+	HDMI_VP_CONF_YCC422_EN_DISABLE = 0x0,
-+	HDMI_VP_CONF_BYPASS_SELECT_MASK = 0x4,
-+	HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER = 0x4,
-+	HDMI_VP_CONF_BYPASS_SELECT_PIX_REPEATER = 0x0,
-+	HDMI_VP_CONF_OUTPUT_SELECTOR_MASK = 0x3,
-+	HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS = 0x3,
-+	HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422 = 0x1,
-+	HDMI_VP_CONF_OUTPUT_SELECTOR_PP = 0x0,
-+
-+/* VP_REMAP field values */
-+	HDMI_VP_REMAP_MASK = 0x3,
-+	HDMI_VP_REMAP_YCC422_24bit = 0x2,
-+	HDMI_VP_REMAP_YCC422_20bit = 0x1,
-+	HDMI_VP_REMAP_YCC422_16bit = 0x0,
-+
-+/* FC_INVIDCONF field values */
-+	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK = 0x80,
-+	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE = 0x80,
-+	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE = 0x00,
-+	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_MASK = 0x40,
-+	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH = 0x40,
-+	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW = 0x00,
-+	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_MASK = 0x20,
-+	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH = 0x20,
-+	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW = 0x00,
-+	HDMI_FC_INVIDCONF_DE_IN_POLARITY_MASK = 0x10,
-+	HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH = 0x10,
-+	HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW = 0x00,
-+	HDMI_FC_INVIDCONF_DVI_MODEZ_MASK = 0x8,
-+	HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE = 0x8,
-+	HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE = 0x0,
-+	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_MASK = 0x2,
-+	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH = 0x2,
-+	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW = 0x0,
-+	HDMI_FC_INVIDCONF_IN_I_P_MASK = 0x1,
-+	HDMI_FC_INVIDCONF_IN_I_P_INTERLACED = 0x1,
-+	HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE = 0x0,
-+
-+/* FC_AUDICONF0 field values */
-+	HDMI_FC_AUDICONF0_CC_OFFSET = 4,
-+	HDMI_FC_AUDICONF0_CC_MASK = 0x70,
-+	HDMI_FC_AUDICONF0_CT_OFFSET = 0,
-+	HDMI_FC_AUDICONF0_CT_MASK = 0xF,
-+
-+/* FC_AUDICONF1 field values */
-+	HDMI_FC_AUDICONF1_SS_OFFSET = 3,
-+	HDMI_FC_AUDICONF1_SS_MASK = 0x18,
-+	HDMI_FC_AUDICONF1_SF_OFFSET = 0,
-+	HDMI_FC_AUDICONF1_SF_MASK = 0x7,
-+
-+/* FC_AUDICONF3 field values */
-+	HDMI_FC_AUDICONF3_LFEPBL_OFFSET = 5,
-+	HDMI_FC_AUDICONF3_LFEPBL_MASK = 0x60,
-+	HDMI_FC_AUDICONF3_DM_INH_OFFSET = 4,
-+	HDMI_FC_AUDICONF3_DM_INH_MASK = 0x10,
-+	HDMI_FC_AUDICONF3_LSV_OFFSET = 0,
-+	HDMI_FC_AUDICONF3_LSV_MASK = 0xF,
-+
-+/* FC_AUDSCHNLS0 field values */
-+	HDMI_FC_AUDSCHNLS0_CGMSA_OFFSET = 4,
-+	HDMI_FC_AUDSCHNLS0_CGMSA_MASK = 0x30,
-+	HDMI_FC_AUDSCHNLS0_COPYRIGHT_OFFSET = 0,
-+	HDMI_FC_AUDSCHNLS0_COPYRIGHT_MASK = 0x01,
-+
-+/* FC_AUDSCHNLS3-6 field values */
-+	HDMI_FC_AUDSCHNLS3_OIEC_CH0_OFFSET = 0,
-+	HDMI_FC_AUDSCHNLS3_OIEC_CH0_MASK = 0x0f,
-+	HDMI_FC_AUDSCHNLS3_OIEC_CH1_OFFSET = 4,
-+	HDMI_FC_AUDSCHNLS3_OIEC_CH1_MASK = 0xf0,
-+	HDMI_FC_AUDSCHNLS4_OIEC_CH2_OFFSET = 0,
-+	HDMI_FC_AUDSCHNLS4_OIEC_CH2_MASK = 0x0f,
-+	HDMI_FC_AUDSCHNLS4_OIEC_CH3_OFFSET = 4,
-+	HDMI_FC_AUDSCHNLS4_OIEC_CH3_MASK = 0xf0,
-+
-+	HDMI_FC_AUDSCHNLS5_OIEC_CH0_OFFSET = 0,
-+	HDMI_FC_AUDSCHNLS5_OIEC_CH0_MASK = 0x0f,
-+	HDMI_FC_AUDSCHNLS5_OIEC_CH1_OFFSET = 4,
-+	HDMI_FC_AUDSCHNLS5_OIEC_CH1_MASK = 0xf0,
-+	HDMI_FC_AUDSCHNLS6_OIEC_CH2_OFFSET = 0,
-+	HDMI_FC_AUDSCHNLS6_OIEC_CH2_MASK = 0x0f,
-+	HDMI_FC_AUDSCHNLS6_OIEC_CH3_OFFSET = 4,
-+	HDMI_FC_AUDSCHNLS6_OIEC_CH3_MASK = 0xf0,
-+
-+/* HDMI_FC_AUDSCHNLS7 field values */
-+	HDMI_FC_AUDSCHNLS7_ACCURACY_OFFSET = 4,
-+	HDMI_FC_AUDSCHNLS7_ACCURACY_MASK = 0x30,
-+
-+/* HDMI_FC_AUDSCHNLS8 field values */
-+	HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_MASK = 0xf0,
-+	HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_OFFSET = 4,
-+	HDMI_FC_AUDSCHNLS8_WORDLEGNTH_MASK = 0x0f,
-+	HDMI_FC_AUDSCHNLS8_WORDLEGNTH_OFFSET = 0,
-+
-+/* FC_AUDSCONF field values */
-+	HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_MASK = 0xF0,
-+	HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_OFFSET = 4,
-+	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_MASK = 0x1,
-+	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_OFFSET = 0,
-+	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT1 = 0x1,
-+	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT0 = 0x0,
-+
-+/* FC_STAT2 field values */
-+	HDMI_FC_STAT2_OVERFLOW_MASK = 0x03,
-+	HDMI_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,
-+	HDMI_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,
-+
-+/* FC_INT2 field values */
-+	HDMI_FC_INT2_OVERFLOW_MASK = 0x03,
-+	HDMI_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02,
-+	HDMI_FC_INT2_HIGH_PRIORITY_OVERFLOW = 0x01,
-+
-+/* FC_MASK2 field values */
-+	HDMI_FC_MASK2_OVERFLOW_MASK = 0x03,
-+	HDMI_FC_MASK2_LOW_PRIORITY_OVERFLOW = 0x02,
-+	HDMI_FC_MASK2_HIGH_PRIORITY_OVERFLOW = 0x01,
-+
-+/* FC_PRCONF field values */
-+	HDMI_FC_PRCONF_INCOMING_PR_FACTOR_MASK = 0xF0,
-+	HDMI_FC_PRCONF_INCOMING_PR_FACTOR_OFFSET = 4,
-+	HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_MASK = 0x0F,
-+	HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_OFFSET = 0,
-+
-+/* FC_AVICONF0-FC_AVICONF3 field values */
-+	HDMI_FC_AVICONF0_PIX_FMT_MASK = 0x03,
-+	HDMI_FC_AVICONF0_PIX_FMT_RGB = 0x00,
-+	HDMI_FC_AVICONF0_PIX_FMT_YCBCR422 = 0x01,
-+	HDMI_FC_AVICONF0_PIX_FMT_YCBCR444 = 0x02,
-+	HDMI_FC_AVICONF0_ACTIVE_FMT_MASK = 0x40,
-+	HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT = 0x40,
-+	HDMI_FC_AVICONF0_ACTIVE_FMT_NO_INFO = 0x00,
-+	HDMI_FC_AVICONF0_BAR_DATA_MASK = 0x0C,
-+	HDMI_FC_AVICONF0_BAR_DATA_NO_DATA = 0x00,
-+	HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR = 0x04,
-+	HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR = 0x08,
-+	HDMI_FC_AVICONF0_BAR_DATA_VERT_HORIZ_BAR = 0x0C,
-+	HDMI_FC_AVICONF0_SCAN_INFO_MASK = 0x30,
-+	HDMI_FC_AVICONF0_SCAN_INFO_OVERSCAN = 0x10,
-+	HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN = 0x20,
-+	HDMI_FC_AVICONF0_SCAN_INFO_NODATA = 0x00,
-+
-+	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_MASK = 0x0F,
-+	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_USE_CODED = 0x08,
-+	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_4_3 = 0x09,
-+	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_16_9 = 0x0A,
-+	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_14_9 = 0x0B,
-+	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_MASK = 0x30,
-+	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_NO_DATA = 0x00,
-+	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_4_3 = 0x10,
-+	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_16_9 = 0x20,
-+	HDMI_FC_AVICONF1_COLORIMETRY_MASK = 0xC0,
-+	HDMI_FC_AVICONF1_COLORIMETRY_NO_DATA = 0x00,
-+	HDMI_FC_AVICONF1_COLORIMETRY_SMPTE = 0x40,
-+	HDMI_FC_AVICONF1_COLORIMETRY_ITUR = 0x80,
-+	HDMI_FC_AVICONF1_COLORIMETRY_EXTENDED_INFO = 0xC0,
-+
-+	HDMI_FC_AVICONF2_SCALING_MASK = 0x03,
-+	HDMI_FC_AVICONF2_SCALING_NONE = 0x00,
-+	HDMI_FC_AVICONF2_SCALING_HORIZ = 0x01,
-+	HDMI_FC_AVICONF2_SCALING_VERT = 0x02,
-+	HDMI_FC_AVICONF2_SCALING_HORIZ_VERT = 0x03,
-+	HDMI_FC_AVICONF2_RGB_QUANT_MASK = 0x0C,
-+	HDMI_FC_AVICONF2_RGB_QUANT_DEFAULT = 0x00,
-+	HDMI_FC_AVICONF2_RGB_QUANT_LIMITED_RANGE = 0x04,
-+	HDMI_FC_AVICONF2_RGB_QUANT_FULL_RANGE = 0x08,
-+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_MASK = 0x70,
-+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC601 = 0x00,
-+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC709 = 0x10,
-+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_SYCC601 = 0x20,
-+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_YCC601 = 0x30,
-+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_RGB = 0x40,
-+	HDMI_FC_AVICONF2_IT_CONTENT_MASK = 0x80,
-+	HDMI_FC_AVICONF2_IT_CONTENT_NO_DATA = 0x00,
-+	HDMI_FC_AVICONF2_IT_CONTENT_VALID = 0x80,
-+
-+	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_MASK = 0x03,
-+	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GRAPHICS = 0x00,
-+	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_PHOTO = 0x01,
-+	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_CINEMA = 0x02,
-+	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GAME = 0x03,
-+	HDMI_FC_AVICONF3_QUANT_RANGE_MASK = 0x0C,
-+	HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED = 0x00,
-+	HDMI_FC_AVICONF3_QUANT_RANGE_FULL = 0x04,
-+
-+/* FC_DBGFORCE field values */
-+	HDMI_FC_DBGFORCE_FORCEAUDIO = 0x10,
-+	HDMI_FC_DBGFORCE_FORCEVIDEO = 0x1,
-+
-+/* PHY_CONF0 field values */
-+	HDMI_PHY_CONF0_PDZ_MASK = 0x80,
-+	HDMI_PHY_CONF0_PDZ_OFFSET = 7,
-+	HDMI_PHY_CONF0_ENTMDS_MASK = 0x40,
-+	HDMI_PHY_CONF0_ENTMDS_OFFSET = 6,
-+	HDMI_PHY_CONF0_SVSRET_MASK = 0x20,
-+	HDMI_PHY_CONF0_SVSRET_OFFSET = 5,
-+	HDMI_PHY_CONF0_GEN2_PDDQ_MASK = 0x10,
-+	HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET = 4,
-+	HDMI_PHY_CONF0_GEN2_TXPWRON_MASK = 0x8,
-+	HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET = 3,
-+	HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_MASK = 0x4,
-+	HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_OFFSET = 2,
-+	HDMI_PHY_CONF0_SELDATAENPOL_MASK = 0x2,
-+	HDMI_PHY_CONF0_SELDATAENPOL_OFFSET = 1,
-+	HDMI_PHY_CONF0_SELDIPIF_MASK = 0x1,
-+	HDMI_PHY_CONF0_SELDIPIF_OFFSET = 0,
-+
-+/* PHY_TST0 field values */
-+	HDMI_PHY_TST0_TSTCLR_MASK = 0x20,
-+	HDMI_PHY_TST0_TSTCLR_OFFSET = 5,
-+	HDMI_PHY_TST0_TSTEN_MASK = 0x10,
-+	HDMI_PHY_TST0_TSTEN_OFFSET = 4,
-+	HDMI_PHY_TST0_TSTCLK_MASK = 0x1,
-+	HDMI_PHY_TST0_TSTCLK_OFFSET = 0,
-+
-+/* PHY_STAT0 field values */
-+	HDMI_PHY_RX_SENSE3 = 0x80,
-+	HDMI_PHY_RX_SENSE2 = 0x40,
-+	HDMI_PHY_RX_SENSE1 = 0x20,
-+	HDMI_PHY_RX_SENSE0 = 0x10,
-+	HDMI_PHY_HPD = 0x02,
-+	HDMI_PHY_TX_PHY_LOCK = 0x01,
-+
-+/* PHY_I2CM_SLAVE_ADDR field values */
-+	HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 = 0x69,
-+	HDMI_PHY_I2CM_SLAVE_ADDR_HEAC_PHY = 0x49,
-+
-+/* PHY_I2CM_OPERATION_ADDR field values */
-+	HDMI_PHY_I2CM_OPERATION_ADDR_WRITE = 0x10,
-+	HDMI_PHY_I2CM_OPERATION_ADDR_READ = 0x1,
-+
-+/* HDMI_PHY_I2CM_INT_ADDR */
-+	HDMI_PHY_I2CM_INT_ADDR_DONE_POL = 0x08,
-+	HDMI_PHY_I2CM_INT_ADDR_DONE_MASK = 0x04,
-+
-+/* HDMI_PHY_I2CM_CTLINT_ADDR */
-+	HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL = 0x80,
-+	HDMI_PHY_I2CM_CTLINT_ADDR_NAC_MASK = 0x40,
-+	HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08,
-+	HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_MASK = 0x04,
-+
-+/* AUD_CONF0 field values */
-+	HDMI_AUD_CONF0_SW_RESET = 0x80,
-+	HDMI_AUD_CONF0_I2S_ALL_ENABLE = 0x2F,
-+
-+/* AUD_CONF1 field values */
-+	HDMI_AUD_CONF1_MODE_I2S = 0x00,
-+	HDMI_AUD_CONF1_MODE_RIGHT_J = 0x02,
-+	HDMI_AUD_CONF1_MODE_LEFT_J = 0x04,
-+	HDMI_AUD_CONF1_WIDTH_16 = 0x10,
-+	HDMI_AUD_CONF1_WIDTH_24 = 0x18,
-+
-+/* AUD_CTS3 field values */
-+	HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5,
-+	HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0,
-+	HDMI_AUD_CTS3_N_SHIFT_1 = 0,
-+	HDMI_AUD_CTS3_N_SHIFT_16 = 0x20,
-+	HDMI_AUD_CTS3_N_SHIFT_32 = 0x40,
-+	HDMI_AUD_CTS3_N_SHIFT_64 = 0x60,
-+	HDMI_AUD_CTS3_N_SHIFT_128 = 0x80,
-+	HDMI_AUD_CTS3_N_SHIFT_256 = 0xa0,
-+	/* note that the CTS3 MANUAL bit has been removed
-+	   from our part. Can't set it, will read as 0. */
-+	HDMI_AUD_CTS3_CTS_MANUAL = 0x10,
-+	HDMI_AUD_CTS3_AUDCTS19_16_MASK = 0x0f,
-+
-+/* HDMI_AUD_INPUTCLKFS field values */
-+	HDMI_AUD_INPUTCLKFS_128FS = 0,
-+	HDMI_AUD_INPUTCLKFS_256FS = 1,
-+	HDMI_AUD_INPUTCLKFS_512FS = 2,
-+	HDMI_AUD_INPUTCLKFS_64FS = 4,
-+
-+/* AHB_DMA_CONF0 field values */
-+	HDMI_AHB_DMA_CONF0_SW_FIFO_RST_OFFSET = 7,
-+	HDMI_AHB_DMA_CONF0_SW_FIFO_RST_MASK = 0x80,
-+	HDMI_AHB_DMA_CONF0_HBR = 0x10,
-+	HDMI_AHB_DMA_CONF0_EN_HLOCK_OFFSET = 3,
-+	HDMI_AHB_DMA_CONF0_EN_HLOCK_MASK = 0x08,
-+	HDMI_AHB_DMA_CONF0_INCR_TYPE_OFFSET = 1,
-+	HDMI_AHB_DMA_CONF0_INCR_TYPE_MASK = 0x06,
-+	HDMI_AHB_DMA_CONF0_INCR4 = 0x0,
-+	HDMI_AHB_DMA_CONF0_INCR8 = 0x2,
-+	HDMI_AHB_DMA_CONF0_INCR16 = 0x4,
-+	HDMI_AHB_DMA_CONF0_BURST_MODE = 0x1,
-+
-+/* HDMI_AHB_DMA_START field values */
-+	HDMI_AHB_DMA_START_START_OFFSET = 0,
-+	HDMI_AHB_DMA_START_START_MASK = 0x01,
-+
-+/* HDMI_AHB_DMA_STOP field values */
-+	HDMI_AHB_DMA_STOP_STOP_OFFSET = 0,
-+	HDMI_AHB_DMA_STOP_STOP_MASK = 0x01,
-+
-+/* AHB_DMA_STAT, AHB_DMA_INT, AHB_DMA_MASK, AHB_DMA_POL field values */
-+	HDMI_AHB_DMA_DONE = 0x80,
-+	HDMI_AHB_DMA_RETRY_SPLIT = 0x40,
-+	HDMI_AHB_DMA_LOSTOWNERSHIP = 0x20,
-+	HDMI_AHB_DMA_ERROR = 0x10,
-+	HDMI_AHB_DMA_FIFO_THREMPTY = 0x04,
-+	HDMI_AHB_DMA_FIFO_FULL = 0x02,
-+	HDMI_AHB_DMA_FIFO_EMPTY = 0x01,
-+
-+/* AHB_DMA_BUFFSTAT, AHB_DMA_BUFFINT,AHB_DMA_BUFFMASK,AHB_DMA_BUFFPOL values */
-+	HDMI_AHB_DMA_BUFFSTAT_FULL = 0x02,
-+	HDMI_AHB_DMA_BUFFSTAT_EMPTY = 0x01,
-+
-+/* MC_CLKDIS field values */
-+	HDMI_MC_CLKDIS_HDCPCLK_DISABLE = 0x40,
-+	HDMI_MC_CLKDIS_CECCLK_DISABLE = 0x20,
-+	HDMI_MC_CLKDIS_CSCCLK_DISABLE = 0x10,
-+	HDMI_MC_CLKDIS_AUDCLK_DISABLE = 0x8,
-+	HDMI_MC_CLKDIS_PREPCLK_DISABLE = 0x4,
-+	HDMI_MC_CLKDIS_TMDSCLK_DISABLE = 0x2,
-+	HDMI_MC_CLKDIS_PIXELCLK_DISABLE = 0x1,
-+
-+/* MC_SWRSTZ field values */
-+	HDMI_MC_SWRSTZ_TMDSSWRST_REQ = 0x02,
-+
-+/* MC_FLOWCTRL field values */
-+	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_MASK = 0x1,
-+	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH = 0x1,
-+	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS = 0x0,
-+
-+/* MC_PHYRSTZ field values */
-+	HDMI_MC_PHYRSTZ_PHYRSTZ = 0x01,
-+
-+/* MC_HEACPHY_RST field values */
-+	HDMI_MC_HEACPHY_RST_ASSERT = 0x1,
-+	HDMI_MC_HEACPHY_RST_DEASSERT = 0x0,
-+
-+/* CSC_CFG field values */
-+	HDMI_CSC_CFG_INTMODE_MASK = 0x30,
-+	HDMI_CSC_CFG_INTMODE_OFFSET = 4,
-+	HDMI_CSC_CFG_INTMODE_DISABLE = 0x00,
-+	HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1 = 0x10,
-+	HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA2 = 0x20,
-+	HDMI_CSC_CFG_DECMODE_MASK = 0x3,
-+	HDMI_CSC_CFG_DECMODE_OFFSET = 0,
-+	HDMI_CSC_CFG_DECMODE_DISABLE = 0x0,
-+	HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA1 = 0x1,
-+	HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA2 = 0x2,
-+	HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3 = 0x3,
-+
-+/* CSC_SCALE field values */
-+	HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK = 0xF0,
-+	HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP = 0x00,
-+	HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP = 0x50,
-+	HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP = 0x60,
-+	HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP = 0x70,
-+	HDMI_CSC_SCALE_CSCSCALE_MASK = 0x03,
-+
-+/* A_HDCPCFG0 field values */
-+	HDMI_A_HDCPCFG0_ELVENA_MASK = 0x80,
-+	HDMI_A_HDCPCFG0_ELVENA_ENABLE = 0x80,
-+	HDMI_A_HDCPCFG0_ELVENA_DISABLE = 0x00,
-+	HDMI_A_HDCPCFG0_I2CFASTMODE_MASK = 0x40,
-+	HDMI_A_HDCPCFG0_I2CFASTMODE_ENABLE = 0x40,
-+	HDMI_A_HDCPCFG0_I2CFASTMODE_DISABLE = 0x00,
-+	HDMI_A_HDCPCFG0_BYPENCRYPTION_MASK = 0x20,
-+	HDMI_A_HDCPCFG0_BYPENCRYPTION_ENABLE = 0x20,
-+	HDMI_A_HDCPCFG0_BYPENCRYPTION_DISABLE = 0x00,
-+	HDMI_A_HDCPCFG0_SYNCRICHECK_MASK = 0x10,
-+	HDMI_A_HDCPCFG0_SYNCRICHECK_ENABLE = 0x10,
-+	HDMI_A_HDCPCFG0_SYNCRICHECK_DISABLE = 0x00,
-+	HDMI_A_HDCPCFG0_AVMUTE_MASK = 0x8,
-+	HDMI_A_HDCPCFG0_AVMUTE_ENABLE = 0x8,
-+	HDMI_A_HDCPCFG0_AVMUTE_DISABLE = 0x0,
-+	HDMI_A_HDCPCFG0_RXDETECT_MASK = 0x4,
-+	HDMI_A_HDCPCFG0_RXDETECT_ENABLE = 0x4,
-+	HDMI_A_HDCPCFG0_RXDETECT_DISABLE = 0x0,
-+	HDMI_A_HDCPCFG0_EN11FEATURE_MASK = 0x2,
-+	HDMI_A_HDCPCFG0_EN11FEATURE_ENABLE = 0x2,
-+	HDMI_A_HDCPCFG0_EN11FEATURE_DISABLE = 0x0,
-+	HDMI_A_HDCPCFG0_HDMIDVI_MASK = 0x1,
-+	HDMI_A_HDCPCFG0_HDMIDVI_HDMI = 0x1,
-+	HDMI_A_HDCPCFG0_HDMIDVI_DVI = 0x0,
-+
-+/* A_HDCPCFG1 field values */
-+	HDMI_A_HDCPCFG1_DISSHA1CHECK_MASK = 0x8,
-+	HDMI_A_HDCPCFG1_DISSHA1CHECK_DISABLE = 0x8,
-+	HDMI_A_HDCPCFG1_DISSHA1CHECK_ENABLE = 0x0,
-+	HDMI_A_HDCPCFG1_PH2UPSHFTENC_MASK = 0x4,
-+	HDMI_A_HDCPCFG1_PH2UPSHFTENC_ENABLE = 0x4,
-+	HDMI_A_HDCPCFG1_PH2UPSHFTENC_DISABLE = 0x0,
-+	HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK = 0x2,
-+	HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE = 0x2,
-+	HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE = 0x0,
-+	HDMI_A_HDCPCFG1_SWRESET_MASK = 0x1,
-+	HDMI_A_HDCPCFG1_SWRESET_ASSERT = 0x0,
-+
-+/* A_VIDPOLCFG field values */
-+	HDMI_A_VIDPOLCFG_UNENCRYPTCONF_MASK = 0x60,
-+	HDMI_A_VIDPOLCFG_UNENCRYPTCONF_OFFSET = 5,
-+	HDMI_A_VIDPOLCFG_DATAENPOL_MASK = 0x10,
-+	HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH = 0x10,
-+	HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_LOW = 0x0,
-+	HDMI_A_VIDPOLCFG_VSYNCPOL_MASK = 0x8,
-+	HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_HIGH = 0x8,
-+	HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_LOW = 0x0,
-+	HDMI_A_VIDPOLCFG_HSYNCPOL_MASK = 0x2,
-+	HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_HIGH = 0x2,
-+	HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0,
-+
-+/* I2CM_OPERATION field values */
-+	HDMI_I2CM_OPERATION_WRITE = 0x10,
-+	HDMI_I2CM_OPERATION_READ_EXT = 0x2,
-+	HDMI_I2CM_OPERATION_READ = 0x1,
-+
-+/* I2CM_INT field values */
-+	HDMI_I2CM_INT_DONE_POL = 0x8,
-+	HDMI_I2CM_INT_DONE_MASK = 0x4,
-+
-+/* I2CM_CTLINT field values */
-+	HDMI_I2CM_CTLINT_NAC_POL = 0x80,
-+	HDMI_I2CM_CTLINT_NAC_MASK = 0x40,
-+	HDMI_I2CM_CTLINT_ARB_POL = 0x8,
-+	HDMI_I2CM_CTLINT_ARB_MASK = 0x4,
-+};
-+
-+/*
-+ * HDMI 3D TX PHY registers
-+ */
-+#define HDMI_3D_TX_PHY_PWRCTRL			0x00
-+#define HDMI_3D_TX_PHY_SERDIVCTRL		0x01
-+#define HDMI_3D_TX_PHY_SERCKCTRL		0x02
-+#define HDMI_3D_TX_PHY_SERCKKILLCTRL		0x03
-+#define HDMI_3D_TX_PHY_TXRESCTRL		0x04
-+#define HDMI_3D_TX_PHY_CKCALCTRL		0x05
-+#define HDMI_3D_TX_PHY_CPCE_CTRL		0x06
-+#define HDMI_3D_TX_PHY_TXCLKMEASCTRL		0x07
-+#define HDMI_3D_TX_PHY_TXMEASCTRL		0x08
-+#define HDMI_3D_TX_PHY_CKSYMTXCTRL		0x09
-+#define HDMI_3D_TX_PHY_CMPSEQCTRL		0x0a
-+#define HDMI_3D_TX_PHY_CMPPWRCTRL		0x0b
-+#define HDMI_3D_TX_PHY_CMPMODECTRL		0x0c
-+#define HDMI_3D_TX_PHY_MEASCTRL			0x0d
-+#define HDMI_3D_TX_PHY_VLEVCTRL			0x0e
-+#define HDMI_3D_TX_PHY_D2ACTRL			0x0f
-+#define HDMI_3D_TX_PHY_CURRCTRL			0x10
-+#define HDMI_3D_TX_PHY_DRVANACTRL		0x11
-+#define HDMI_3D_TX_PHY_PLLMEASCTRL		0x12
-+#define HDMI_3D_TX_PHY_PLLPHBYCTRL		0x13
-+#define HDMI_3D_TX_PHY_GRP_CTRL			0x14
-+#define HDMI_3D_TX_PHY_GMPCTRL			0x15
-+#define HDMI_3D_TX_PHY_MPLLMEASCTRL		0x16
-+#define HDMI_3D_TX_PHY_MSM_CTRL			0x17
-+#define HDMI_3D_TX_PHY_SCRPB_STATUS		0x18
-+#define HDMI_3D_TX_PHY_TXTERM			0x19
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL		0x1a
-+#define HDMI_3D_TX_PHY_PATTERNGEN		0x1b
-+#define HDMI_3D_TX_PHY_SDCAP_MODE		0x1c
-+#define HDMI_3D_TX_PHY_SCOPEMODE		0x1d
-+#define HDMI_3D_TX_PHY_DIGTXMODE		0x1e
-+#define HDMI_3D_TX_PHY_STR_STATUS		0x1f
-+#define HDMI_3D_TX_PHY_SCOPECNT0		0x20
-+#define HDMI_3D_TX_PHY_SCOPECNT1		0x21
-+#define HDMI_3D_TX_PHY_SCOPECNT2		0x22
-+#define HDMI_3D_TX_PHY_SCOPECNTCLK		0x23
-+#define HDMI_3D_TX_PHY_SCOPESAMPLE		0x24
-+#define HDMI_3D_TX_PHY_SCOPECNTMSB01		0x25
-+#define HDMI_3D_TX_PHY_SCOPECNTMSB2CK		0x26
-+
-+/* HDMI_3D_TX_PHY_CKCALCTRL values */
-+#define HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE		BIT(15)
-+
-+/* HDMI_3D_TX_PHY_MSM_CTRL values */
-+#define HDMI_3D_TX_PHY_MSM_CTRL_MPLL_PH_SEL_CK		BIT(13)
-+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_CLK_REF_MPLL	(0 << 1)
-+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_OFF		(1 << 1)
-+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_PCLK		(2 << 1)
-+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK		(3 << 1)
-+#define HDMI_3D_TX_PHY_MSM_CTRL_SCOPE_CK_SEL		BIT(0)
-+
-+/* HDMI_3D_TX_PHY_PTRPT_ENBL values */
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_OVERRIDE		BIT(15)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT2		BIT(8)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT1		BIT(7)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT0		BIT(6)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_CK_REF_ENB		BIT(5)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_RCAL_ENB		BIT(4)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_TX_CLK_ALIGN_ENB	BIT(3)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_TX_READY		BIT(2)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_CKO_WORD_ENB		BIT(1)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_REFCLK_ENB		BIT(0)
-+
-+#endif /* __DW_HDMI_H__ */
diff --git a/patches.renesas/0234-serial-sh-sci-fix-hardware-RX-trigger-level-setting.patch b/patches.renesas/0234-serial-sh-sci-fix-hardware-RX-trigger-level-setting.patch
deleted file mode 100644
index cc35dd4a160dd1..00000000000000
--- a/patches.renesas/0234-serial-sh-sci-fix-hardware-RX-trigger-level-setting.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 5ba3522b63be99e95e6aa4e1dfaae4143db04ea9 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Date: Wed, 8 Feb 2017 18:31:14 +0100
-Subject: [PATCH 234/255] serial: sh-sci: fix hardware RX trigger level setting
-
-1. Do not set the RX trigger level for software timeout devices on reset;
-there is no timeout by default, and data will rot.
-2. Do set the RX trigger level for hardware timeout devices when set
-via sysfs attribute.
-
-Fixes SCIFA-type serial consoles.
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 90afa5255f5c5ae67c869918e4c5f60b8580db70)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c |   11 +++++++++--
- 1 file changed, 9 insertions(+), 2 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -1078,8 +1078,11 @@ static ssize_t rx_trigger_store(struct d
- 
- 	if (kstrtol(buf, 0, &r) == -EINVAL)
- 		return -EINVAL;
-+
- 	sci->rx_trigger = scif_set_rtrg(port, r);
--	scif_set_rtrg(port, 1);
-+	if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
-+		scif_set_rtrg(port, 1);
-+
- 	return count;
- }
- 
-@@ -2194,7 +2197,11 @@ static void sci_reset(struct uart_port *
- 			setup_timer(&s->rx_fifo_timer, rx_fifo_timer_fn,
- 				    (unsigned long)s);
- 		} else {
--			scif_set_rtrg(port, s->rx_trigger);
-+			if (port->type == PORT_SCIFA ||
-+			    port->type == PORT_SCIFB)
-+				scif_set_rtrg(port, 1);
-+			else
-+				scif_set_rtrg(port, s->rx_trigger);
- 		}
- 	}
- }
diff --git a/patches.renesas/0235-ARM-dts-r8a7779-marzen-Configure-pinmuxing-for-the-D.patch b/patches.renesas/0235-ARM-dts-r8a7779-marzen-Configure-pinmuxing-for-the-D.patch
deleted file mode 100644
index 90b9084d09c011..00000000000000
--- a/patches.renesas/0235-ARM-dts-r8a7779-marzen-Configure-pinmuxing-for-the-D.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 6c7e983a3f33767a4b567140b1088c377434d296 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 21 Oct 2016 15:27:43 +0300
-Subject: [PATCH 235/299] ARM: dts: r8a7779: marzen: Configure pinmuxing for
- the DU0 input clock
-
-DU0 uses an externally provided clock, but the corresponding pin isn't
-correctly muxed. Fix it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8698d83dcf1b348eb54bcd1d52b8c636d8d7d494)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779-marzen.dts |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7779-marzen.dts
-+++ b/arch/arm/boot/dts/r8a7779-marzen.dts
-@@ -170,7 +170,7 @@
- 
- 	du_pins: du {
- 		du0 {
--			groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0";
-+			groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0", "du0_clk_in";
- 			function = "du0";
- 		};
- 		du1 {
diff --git a/patches.renesas/0235-drm-bridge-Link-encoder-and-bridge-in-core-code.patch b/patches.renesas/0235-drm-bridge-Link-encoder-and-bridge-in-core-code.patch
deleted file mode 100644
index 0f3efa42c3980f..00000000000000
--- a/patches.renesas/0235-drm-bridge-Link-encoder-and-bridge-in-core-code.patch
+++ /dev/null
@@ -1,577 +0,0 @@
-From 4e2687321ce2c5283fe173d9986a03179dfe9c9c Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 28 Nov 2016 17:59:08 +0200
-Subject: [PATCH 235/255] drm: bridge: Link encoder and bridge in core code
-
-Instead of linking encoders and bridges in every driver (and getting it
-wrong half of the time, as many drivers forget to set the drm_bridge
-encoder pointer), do so in core code. The drm_bridge_attach() function
-needs the encoder and optional previous bridge to perform that task,
-update all the callers.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Stefan Agner <stefan@agner.ch> # For DCU
-Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> # For atmel-hlcdc
-Acked-by: Vincent Abriou <vincent.abriou@st.com> # For STI
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> # For sun4i
-Acked-by: Xinliang Liu <z.liuxinliang@hisilicon.com> # For hisilicon
-Acked-by: Jyri Sarha <jsarha@ti.com> # For tilcdc
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/1481709550-29226-4-git-send-email-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 3bb80f249525c059572d4bc89ac77ac2e511bcbe)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/gpu/drm/tilcdc/tilcdc_external.c
----
- drivers/gpu/drm/arc/arcpgu_hdmi.c                  |    5 --
- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c   |    4 -
- drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |    4 -
- drivers/gpu/drm/bridge/dw-hdmi.c                   |    3 -
- drivers/gpu/drm/drm_bridge.c                       |   48 +++++++++++++++------
- drivers/gpu/drm/drm_simple_kms_helper.c            |    4 -
- drivers/gpu/drm/exynos/exynos_dp.c                 |    5 --
- drivers/gpu/drm/exynos/exynos_drm_dsi.c            |    6 --
- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c          |    5 --
- drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c       |    5 --
- drivers/gpu/drm/imx/imx-ldb.c                      |    6 --
- drivers/gpu/drm/imx/parallel-display.c             |    4 -
- drivers/gpu/drm/mediatek/mtk_dpi.c                 |    8 +--
- drivers/gpu/drm/mediatek/mtk_dsi.c                 |   24 +---------
- drivers/gpu/drm/mediatek/mtk_hdmi.c                |   11 ++--
- drivers/gpu/drm/msm/dsi/dsi_manager.c              |   17 ++++---
- drivers/gpu/drm/msm/edp/edp_bridge.c               |    2 
- drivers/gpu/drm/msm/hdmi/hdmi_bridge.c             |    2 
- drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c          |    5 --
- drivers/gpu/drm/sti/sti_dvo.c                      |    3 -
- drivers/gpu/drm/sti/sti_hda.c                      |    3 -
- drivers/gpu/drm/sti/sti_hdmi.c                     |    3 -
- drivers/gpu/drm/sun4i/sun4i_rgb.c                  |   13 ++---
- include/drm/drm_bridge.h                           |    3 -
- 24 files changed, 85 insertions(+), 108 deletions(-)
-
---- a/drivers/gpu/drm/arc/arcpgu_hdmi.c
-+++ b/drivers/gpu/drm/arc/arcpgu_hdmi.c
-@@ -47,10 +47,7 @@ int arcpgu_drm_hdmi_init(struct drm_devi
- 		return ret;
- 
- 	/* Link drm_bridge to encoder */
--	bridge->encoder = encoder;
--	encoder->bridge = bridge;
--
--	ret = drm_bridge_attach(drm, bridge);
-+	ret = drm_bridge_attach(encoder, bridge, NULL);
- 	if (ret)
- 		drm_encoder_cleanup(encoder);
- 
---- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c
-+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c
-@@ -230,9 +230,7 @@ static int atmel_hlcdc_attach_endpoint(s
- 	of_node_put(np);
- 
- 	if (bridge) {
--		output->encoder.bridge = bridge;
--		bridge->encoder = &output->encoder;
--		ret = drm_bridge_attach(dev, bridge);
-+		ret = drm_bridge_attach(&output->encoder, bridge, NULL);
- 		if (!ret)
- 			return 0;
- 	}
---- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
-+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
-@@ -1227,12 +1227,10 @@ static int analogix_dp_create_bridge(str
- 
- 	dp->bridge = bridge;
- 
--	dp->encoder->bridge = bridge;
- 	bridge->driver_private = dp;
--	bridge->encoder = dp->encoder;
- 	bridge->funcs = &analogix_dp_bridge_funcs;
- 
--	ret = drm_bridge_attach(drm_dev, bridge);
-+	ret = drm_bridge_attach(dp->encoder, bridge, NULL);
- 	if (ret) {
- 		DRM_ERROR("failed to attach drm bridge\n");
- 		return -EINVAL;
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -1841,13 +1841,12 @@ static int dw_hdmi_register(struct drm_d
- 	hdmi->bridge = bridge;
- 	bridge->driver_private = hdmi;
- 	bridge->funcs = &dw_hdmi_bridge_funcs;
--	ret = drm_bridge_attach(drm, bridge);
-+	ret = drm_bridge_attach(encoder, bridge, NULL);
- 	if (ret) {
- 		DRM_ERROR("Failed to initialize bridge with drm\n");
- 		return -EINVAL;
- 	}
- 
--	encoder->bridge = bridge;
- 	hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD;
- 
- 	drm_connector_helper_add(&hdmi->connector,
---- a/drivers/gpu/drm/drm_bridge.c
-+++ b/drivers/gpu/drm/drm_bridge.c
-@@ -26,6 +26,7 @@
- #include <linux/mutex.h>
- 
- #include <drm/drm_bridge.h>
-+#include <drm/drm_encoder.h>
- 
- /**
-  * DOC: overview
-@@ -92,32 +93,53 @@ void drm_bridge_remove(struct drm_bridge
- EXPORT_SYMBOL(drm_bridge_remove);
- 
- /**
-- * drm_bridge_attach - associate given bridge to our DRM device
-+ * drm_bridge_attach - attach the bridge to an encoder's chain
-  *
-- * @dev: DRM device
-- * @bridge: bridge control structure
-- *
-- * Called by a kms driver to link one of our encoder/bridge to the given
-- * bridge.
-+ * @encoder: DRM encoder
-+ * @bridge: bridge to attach
-+ * @previous: previous bridge in the chain (optional)
-+ *
-+ * Called by a kms driver to link the bridge to an encoder's chain. The previous
-+ * argument specifies the previous bridge in the chain. If NULL, the bridge is
-+ * linked directly at the encoder's output. Otherwise it is linked at the
-+ * previous bridge's output.
-  *
-- * Note that setting up links between the bridge and our encoder/bridge
-- * objects needs to be handled by the kms driver itself.
-+ * If non-NULL the previous bridge must be already attached by a call to this
-+ * function.
-  *
-  * RETURNS:
-  * Zero on success, error code on failure
-  */
--int drm_bridge_attach(struct drm_device *dev, struct drm_bridge *bridge)
-+int drm_bridge_attach(struct drm_encoder *encoder, struct drm_bridge *bridge,
-+		      struct drm_bridge *previous)
- {
--	if (!dev || !bridge)
-+	int ret;
-+
-+	if (!encoder || !bridge)
-+		return -EINVAL;
-+
-+	if (previous && (!previous->dev || previous->encoder != encoder))
- 		return -EINVAL;
- 
- 	if (bridge->dev)
- 		return -EBUSY;
- 
--	bridge->dev = dev;
-+	bridge->dev = encoder->dev;
-+	bridge->encoder = encoder;
- 
--	if (bridge->funcs->attach)
--		return bridge->funcs->attach(bridge);
-+	if (bridge->funcs->attach) {
-+		ret = bridge->funcs->attach(bridge);
-+		if (ret < 0) {
-+			bridge->dev = NULL;
-+			bridge->encoder = NULL;
-+			return ret;
-+		}
-+	}
-+
-+	if (previous)
-+		previous->next = bridge;
-+	else
-+		encoder->bridge = bridge;
- 
- 	return 0;
- }
---- a/drivers/gpu/drm/drm_simple_kms_helper.c
-+++ b/drivers/gpu/drm/drm_simple_kms_helper.c
-@@ -182,9 +182,7 @@ static const struct drm_plane_funcs drm_
- int drm_simple_display_pipe_attach_bridge(struct drm_simple_display_pipe *pipe,
- 					  struct drm_bridge *bridge)
- {
--	bridge->encoder = &pipe->encoder;
--	pipe->encoder.bridge = bridge;
--	return drm_bridge_attach(pipe->encoder.dev, bridge);
-+	return drm_bridge_attach(&pipe->encoder, bridge, NULL);
- }
- EXPORT_SYMBOL(drm_simple_display_pipe_attach_bridge);
- 
---- a/drivers/gpu/drm/exynos/exynos_dp.c
-+++ b/drivers/gpu/drm/exynos/exynos_dp.c
-@@ -99,7 +99,6 @@ static int exynos_dp_bridge_attach(struc
- 				   struct drm_connector *connector)
- {
- 	struct exynos_dp_device *dp = to_dp(plat_data);
--	struct drm_encoder *encoder = &dp->encoder;
- 	int ret;
- 
- 	drm_connector_register(connector);
-@@ -107,9 +106,7 @@ static int exynos_dp_bridge_attach(struc
- 
- 	/* Pre-empt DP connector creation if there's a bridge */
- 	if (dp->ptn_bridge) {
--		bridge->next = dp->ptn_bridge;
--		dp->ptn_bridge->encoder = encoder;
--		ret = drm_bridge_attach(encoder->dev, dp->ptn_bridge);
-+		ret = drm_bridge_attach(&dp->encoder, dp->ptn_bridge, bridge);
- 		if (ret) {
- 			DRM_ERROR("Failed to attach bridge to drm\n");
- 			bridge->next = NULL;
---- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
-+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
-@@ -1718,10 +1718,8 @@ static int exynos_dsi_bind(struct device
- 	}
- 
- 	bridge = of_drm_find_bridge(dsi->bridge_node);
--	if (bridge) {
--		encoder->bridge = bridge;
--		drm_bridge_attach(drm_dev, bridge);
--	}
-+	if (bridge)
-+		drm_bridge_attach(encoder, bridge, NULL);
- 
- 	return mipi_dsi_host_register(&dsi->dsi_host);
- }
---- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c
-+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c
-@@ -160,10 +160,7 @@ static int fsl_dcu_attach_endpoint(struc
- 	if (!bridge)
- 		return -ENODEV;
- 
--	fsl_dev->encoder.bridge = bridge;
--	bridge->encoder = &fsl_dev->encoder;
--
--	return drm_bridge_attach(fsl_dev->drm, bridge);
-+	return drm_bridge_attach(&fsl_dev->encoder, bridge, NULL);
- }
- 
- int fsl_dcu_create_outputs(struct fsl_dcu_drm_device *fsl_dev)
---- a/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c
-+++ b/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c
-@@ -709,10 +709,7 @@ static int dsi_bridge_init(struct drm_de
- 	int ret;
- 
- 	/* associate the bridge to dsi encoder */
--	encoder->bridge = bridge;
--	bridge->encoder = encoder;
--
--	ret = drm_bridge_attach(dev, bridge);
-+	ret = drm_bridge_attach(encoder, bridge, NULL);
- 	if (ret) {
- 		DRM_ERROR("failed to attach external bridge\n");
- 		return ret;
---- a/drivers/gpu/drm/imx/imx-ldb.c
-+++ b/drivers/gpu/drm/imx/imx-ldb.c
-@@ -466,10 +466,8 @@ static int imx_ldb_register(struct drm_d
- 			 DRM_MODE_ENCODER_LVDS, NULL);
- 
- 	if (imx_ldb_ch->bridge) {
--		imx_ldb_ch->bridge->encoder = encoder;
--
--		imx_ldb_ch->encoder.bridge = imx_ldb_ch->bridge;
--		ret = drm_bridge_attach(drm, imx_ldb_ch->bridge);
-+		ret = drm_bridge_attach(&imx_ldb_ch->encoder,
-+					imx_ldb_ch->bridge, NULL);
- 		if (ret) {
- 			DRM_ERROR("Failed to initialize bridge with drm\n");
- 			return ret;
---- a/drivers/gpu/drm/imx/parallel-display.c
-+++ b/drivers/gpu/drm/imx/parallel-display.c
-@@ -191,9 +191,7 @@ static int imx_pd_register(struct drm_de
- 		drm_panel_attach(imxpd->panel, &imxpd->connector);
- 
- 	if (imxpd->bridge) {
--		imxpd->bridge->encoder = encoder;
--		encoder->bridge = imxpd->bridge;
--		ret = drm_bridge_attach(drm, imxpd->bridge);
-+		ret = drm_bridge_attach(encoder, imxpd->bridge, NULL);
- 		if (ret < 0) {
- 			dev_err(imxpd->dev, "failed to attach bridge: %d\n",
- 				ret);
---- a/drivers/gpu/drm/mediatek/mtk_dpi.c
-+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
-@@ -63,6 +63,7 @@ enum mtk_dpi_out_color_format {
- struct mtk_dpi {
- 	struct mtk_ddp_comp ddp_comp;
- 	struct drm_encoder encoder;
-+	struct drm_bridge *bridge;
- 	void __iomem *regs;
- 	struct device *dev;
- 	struct clk *engine_clk;
-@@ -620,8 +621,7 @@ static int mtk_dpi_bind(struct device *d
- 	/* Currently DPI0 is fixed to be driven by OVL1 */
- 	dpi->encoder.possible_crtcs = BIT(1);
- 
--	dpi->encoder.bridge->encoder = &dpi->encoder;
--	ret = drm_bridge_attach(dpi->encoder.dev, dpi->encoder.bridge);
-+	ret = drm_bridge_attach(&dpi->encoder, dpi->bridge, NULL);
- 	if (ret) {
- 		dev_err(dev, "Failed to attach bridge: %d\n", ret);
- 		goto err_cleanup;
-@@ -718,9 +718,9 @@ static int mtk_dpi_probe(struct platform
- 
- 	dev_info(dev, "Found bridge node: %s\n", bridge_node->full_name);
- 
--	dpi->encoder.bridge = of_drm_find_bridge(bridge_node);
-+	dpi->bridge = of_drm_find_bridge(bridge_node);
- 	of_node_put(bridge_node);
--	if (!dpi->encoder.bridge)
-+	if (!dpi->bridge)
- 		return -EPROBE_DEFER;
- 
- 	comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DPI);
---- a/drivers/gpu/drm/mediatek/mtk_dsi.c
-+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
-@@ -622,26 +622,6 @@ static const struct drm_connector_helper
- 	.get_modes = mtk_dsi_connector_get_modes,
- };
- 
--static int mtk_drm_attach_bridge(struct drm_bridge *bridge,
--				 struct drm_encoder *encoder)
--{
--	int ret;
--
--	if (!bridge)
--		return -ENOENT;
--
--	encoder->bridge = bridge;
--	bridge->encoder = encoder;
--	ret = drm_bridge_attach(encoder->dev, bridge);
--	if (ret) {
--		DRM_ERROR("Failed to attach bridge to drm\n");
--		encoder->bridge = NULL;
--		bridge->encoder = NULL;
--	}
--
--	return ret;
--}
--
- static int mtk_dsi_create_connector(struct drm_device *drm, struct mtk_dsi *dsi)
- {
- 	int ret;
-@@ -692,8 +672,10 @@ static int mtk_dsi_create_conn_enc(struc
- 	dsi->encoder.possible_crtcs = 1;
- 
- 	/* If there's a bridge, attach to it and let it create the connector */
--	ret = mtk_drm_attach_bridge(dsi->bridge, &dsi->encoder);
-+	ret = drm_bridge_attach(&dsi->encoder, dsi->bridge, NULL);
- 	if (ret) {
-+		DRM_ERROR("Failed to attach bridge to drm\n");
-+
- 		/* Otherwise create our own connector and attach to a panel */
- 		ret = mtk_dsi_create_connector(drm, dsi);
- 		if (ret)
---- a/drivers/gpu/drm/mediatek/mtk_hdmi.c
-+++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c
-@@ -149,6 +149,7 @@ struct hdmi_audio_param {
- 
- struct mtk_hdmi {
- 	struct drm_bridge bridge;
-+	struct drm_bridge *next_bridge;
- 	struct drm_connector conn;
- 	struct device *dev;
- 	struct phy *phy;
-@@ -1314,9 +1315,9 @@ static int mtk_hdmi_bridge_attach(struct
- 		return ret;
- 	}
- 
--	if (bridge->next) {
--		bridge->next->encoder = bridge->encoder;
--		ret = drm_bridge_attach(bridge->encoder->dev, bridge->next);
-+	if (hdmi->next_bridge) {
-+		ret = drm_bridge_attach(bridge->encoder, hdmi->next_bridge,
-+					bridge);
- 		if (ret) {
- 			dev_err(hdmi->dev,
- 				"Failed to attach external bridge: %d\n", ret);
-@@ -1510,8 +1511,8 @@ static int mtk_hdmi_dt_parse_pdata(struc
- 	of_node_put(ep);
- 
- 	if (!of_device_is_compatible(remote, "hdmi-connector")) {
--		hdmi->bridge.next = of_drm_find_bridge(remote);
--		if (!hdmi->bridge.next) {
-+		hdmi->next_bridge = of_drm_find_bridge(remote);
-+		if (!hdmi->next_bridge) {
- 			dev_err(dev, "Waiting for external bridge\n");
- 			of_node_put(remote);
- 			return -EPROBE_DEFER;
---- a/drivers/gpu/drm/msm/dsi/dsi_manager.c
-+++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c
-@@ -579,6 +579,7 @@ struct drm_bridge *msm_dsi_manager_bridg
- 	struct msm_dsi *msm_dsi = dsi_mgr_get_dsi(id);
- 	struct drm_bridge *bridge = NULL;
- 	struct dsi_bridge *dsi_bridge;
-+	struct drm_encoder *encoder;
- 	int ret;
- 
- 	dsi_bridge = devm_kzalloc(msm_dsi->dev->dev,
-@@ -590,10 +591,18 @@ struct drm_bridge *msm_dsi_manager_bridg
- 
- 	dsi_bridge->id = id;
- 
-+	/*
-+	 * HACK: we may not know the external DSI bridge device's mode
-+	 * flags here. We'll get to know them only when the device
-+	 * attaches to the dsi host. For now, assume the bridge supports
-+	 * DSI video mode
-+	 */
-+	encoder = msm_dsi->encoders[MSM_DSI_VIDEO_ENCODER_ID];
-+
- 	bridge = &dsi_bridge->base;
- 	bridge->funcs = &dsi_mgr_bridge_funcs;
- 
--	ret = drm_bridge_attach(msm_dsi->dev, bridge);
-+	ret = drm_bridge_attach(encoder, bridge, NULL);
- 	if (ret)
- 		goto fail;
- 
-@@ -628,11 +637,7 @@ struct drm_connector *msm_dsi_manager_ex
- 	encoder = msm_dsi->encoders[MSM_DSI_VIDEO_ENCODER_ID];
- 
- 	/* link the internal dsi bridge to the external bridge */
--	int_bridge->next = ext_bridge;
--	/* set the external bridge's encoder as dsi's encoder */
--	ext_bridge->encoder = encoder;
--
--	drm_bridge_attach(dev, ext_bridge);
-+	drm_bridge_attach(encoder, ext_bridge, int_bridge);
- 
- 	/*
- 	 * we need the drm_connector created by the external bridge
---- a/drivers/gpu/drm/msm/edp/edp_bridge.c
-+++ b/drivers/gpu/drm/msm/edp/edp_bridge.c
-@@ -106,7 +106,7 @@ struct drm_bridge *msm_edp_bridge_init(s
- 	bridge = &edp_bridge->base;
- 	bridge->funcs = &edp_bridge_funcs;
- 
--	ret = drm_bridge_attach(edp->dev, bridge);
-+	ret = drm_bridge_attach(edp->encoder, bridge, NULL);
- 	if (ret)
- 		goto fail;
- 
---- a/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
-+++ b/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
-@@ -227,7 +227,7 @@ struct drm_bridge *msm_hdmi_bridge_init(
- 	bridge = &hdmi_bridge->base;
- 	bridge->funcs = &msm_hdmi_bridge_funcs;
- 
--	ret = drm_bridge_attach(hdmi->dev, bridge);
-+	ret = drm_bridge_attach(hdmi->encoder, bridge, NULL);
- 	if (ret)
- 		goto fail;
- 
---- a/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
-@@ -124,10 +124,7 @@ int rcar_du_hdmienc_init(struct rcar_du_
- 	hdmienc->renc = renc;
- 
- 	/* Link the bridge to the encoder. */
--	bridge->encoder = encoder;
--	encoder->bridge = bridge;
--
--	ret = drm_bridge_attach(rcdu->ddev, bridge);
-+	ret = drm_bridge_attach(encoder, bridge, NULL);
- 	if (ret) {
- 		drm_encoder_cleanup(encoder);
- 		return ret;
---- a/drivers/gpu/drm/sti/sti_dvo.c
-+++ b/drivers/gpu/drm/sti/sti_dvo.c
-@@ -478,14 +478,13 @@ static int sti_dvo_bind(struct device *d
- 		return err;
- 	}
- 
--	err = drm_bridge_attach(drm_dev, bridge);
-+	err = drm_bridge_attach(encoder, bridge, NULL);
- 	if (err) {
- 		DRM_ERROR("Failed to attach bridge\n");
- 		return err;
- 	}
- 
- 	dvo->bridge = bridge;
--	encoder->bridge = bridge;
- 	connector->encoder = encoder;
- 	dvo->encoder = encoder;
- 
---- a/drivers/gpu/drm/sti/sti_hda.c
-+++ b/drivers/gpu/drm/sti/sti_hda.c
-@@ -707,9 +707,8 @@ static int sti_hda_bind(struct device *d
- 
- 	bridge->driver_private = hda;
- 	bridge->funcs = &sti_hda_bridge_funcs;
--	drm_bridge_attach(drm_dev, bridge);
-+	drm_bridge_attach(encoder, bridge, NULL);
- 
--	encoder->bridge = bridge;
- 	connector->encoder = encoder;
- 
- 	drm_connector = (struct drm_connector *)connector;
---- a/drivers/gpu/drm/sti/sti_hdmi.c
-+++ b/drivers/gpu/drm/sti/sti_hdmi.c
-@@ -1308,9 +1308,8 @@ static int sti_hdmi_bind(struct device *
- 
- 	bridge->driver_private = hdmi;
- 	bridge->funcs = &sti_hdmi_bridge_funcs;
--	drm_bridge_attach(drm_dev, bridge);
-+	drm_bridge_attach(encoder, bridge, NULL);
- 
--	encoder->bridge = bridge;
- 	connector->encoder = encoder;
- 
- 	drm_connector = (struct drm_connector *)connector;
---- a/drivers/gpu/drm/sun4i/sun4i_rgb.c
-+++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c
-@@ -208,6 +208,7 @@ int sun4i_rgb_init(struct drm_device *dr
- 	struct sun4i_drv *drv = drm->dev_private;
- 	struct sun4i_tcon *tcon = drv->tcon;
- 	struct drm_encoder *encoder;
-+	struct drm_bridge *bridge;
- 	struct sun4i_rgb *rgb;
- 	int ret;
- 
-@@ -218,8 +219,8 @@ int sun4i_rgb_init(struct drm_device *dr
- 	encoder = &rgb->encoder;
- 
- 	tcon->panel = sun4i_tcon_find_panel(tcon->dev->of_node);
--	encoder->bridge = sun4i_tcon_find_bridge(tcon->dev->of_node);
--	if (IS_ERR(tcon->panel) && IS_ERR(encoder->bridge)) {
-+	bridge = sun4i_tcon_find_bridge(tcon->dev->of_node);
-+	if (IS_ERR(tcon->panel) && IS_ERR(bridge)) {
- 		dev_info(drm->dev, "No panel or bridge found... RGB output disabled\n");
- 		return 0;
- 	}
-@@ -260,16 +261,12 @@ int sun4i_rgb_init(struct drm_device *dr
- 		}
- 	}
- 
--	if (!IS_ERR(encoder->bridge)) {
--		encoder->bridge->encoder = &rgb->encoder;
--
--		ret = drm_bridge_attach(drm, encoder->bridge);
-+	if (!IS_ERR(bridge)) {
-+		ret = drm_bridge_attach(encoder, bridge, NULL);
- 		if (ret) {
- 			dev_err(drm->dev, "Couldn't attach our bridge\n");
- 			goto err_cleanup_connector;
- 		}
--	} else {
--		encoder->bridge = NULL;
- 	}
- 
- 	return 0;
---- a/include/drm/drm_bridge.h
-+++ b/include/drm/drm_bridge.h
-@@ -201,7 +201,8 @@ struct drm_bridge {
- int drm_bridge_add(struct drm_bridge *bridge);
- void drm_bridge_remove(struct drm_bridge *bridge);
- struct drm_bridge *of_drm_find_bridge(struct device_node *np);
--int drm_bridge_attach(struct drm_device *dev, struct drm_bridge *bridge);
-+int drm_bridge_attach(struct drm_encoder *encoder, struct drm_bridge *bridge,
-+		      struct drm_bridge *previous);
- void drm_bridge_detach(struct drm_bridge *bridge);
- 
- bool drm_bridge_mode_fixup(struct drm_bridge *bridge,
diff --git a/patches.renesas/0235-drm-bridge-dw_hdmi-support-i2c-extended-read-mode.patch b/patches.renesas/0235-drm-bridge-dw_hdmi-support-i2c-extended-read-mode.patch
deleted file mode 100644
index cc42c2ffe23460..00000000000000
--- a/patches.renesas/0235-drm-bridge-dw_hdmi-support-i2c-extended-read-mode.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From be9059ee366d592ad512e717c6126e63f355b4cc Mon Sep 17 00:00:00 2001
-From: Nickey Yang <nickey.yang@rock-chips.com>
-Date: Mon, 20 Mar 2017 10:57:31 +0800
-Subject: [PATCH 235/286] drm/bridge: dw_hdmi: support i2c extended read mode
-
-"I2C Master Interface Extended Read Mode" implements a segment
-pointer-based read operation using the Special Register configuration.
-
-This patch fix https://patchwork.kernel.org/patch/7098101/ mentioned
-"The current implementation does not support "I2C Master Interface
-Extended Read Mode" to read data addressed by non-zero segment
-pointer, this means that if EDID has more than 1 extension blocks,
-EDID reading operation won't succeed"
-
-With this patch, dw-hdmi can read EDID data with 1/2/4 blocks.
-
-Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
-Reviewed-by: Douglas Anderson <dianders@chromium.org>
-Acked-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/1489978651-16647-1-git-send-email-nickey.yang@rock-chips.com
-(cherry picked from commit 94bb4dc132ed2e3a4d16649b0096c49d13670fe8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/synopsys/dw-hdmi.c |   38 ++++++++++++++++++------------
- 1 file changed, 24 insertions(+), 14 deletions(-)
-
---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-@@ -33,6 +33,7 @@
- #include "dw-hdmi.h"
- #include "dw-hdmi-audio.h"
- 
-+#define DDC_SEGMENT_ADDR	0x30
- #define HDMI_EDID_LEN		512
- 
- #define RGB			0
-@@ -112,6 +113,7 @@ struct dw_hdmi_i2c {
- 
- 	u8			slave_reg;
- 	bool			is_regaddr;
-+	bool			is_segment;
- };
- 
- struct dw_hdmi_phy_data {
-@@ -247,8 +249,12 @@ static int dw_hdmi_i2c_read(struct dw_hd
- 		reinit_completion(&i2c->cmp);
- 
- 		hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
--		hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ,
--			    HDMI_I2CM_OPERATION);
-+		if (i2c->is_segment)
-+			hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ_EXT,
-+				    HDMI_I2CM_OPERATION);
-+		else
-+			hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ,
-+				    HDMI_I2CM_OPERATION);
- 
- 		stat = wait_for_completion_timeout(&i2c->cmp, HZ / 10);
- 		if (!stat)
-@@ -260,6 +266,7 @@ static int dw_hdmi_i2c_read(struct dw_hd
- 
- 		*buf++ = hdmi_readb(hdmi, HDMI_I2CM_DATAI);
- 	}
-+	i2c->is_segment = false;
- 
- 	return 0;
- }
-@@ -309,12 +316,6 @@ static int dw_hdmi_i2c_xfer(struct i2c_a
- 	dev_dbg(hdmi->dev, "xfer: num: %d, addr: %#x\n", num, addr);
- 
- 	for (i = 0; i < num; i++) {
--		if (msgs[i].addr != addr) {
--			dev_warn(hdmi->dev,
--				 "unsupported transfer, changed slave address\n");
--			return -EOPNOTSUPP;
--		}
--
- 		if (msgs[i].len == 0) {
- 			dev_dbg(hdmi->dev,
- 				"unsupported transfer %d/%d, no data\n",
-@@ -334,15 +335,24 @@ static int dw_hdmi_i2c_xfer(struct i2c_a
- 	/* Set slave device register address on transfer */
- 	i2c->is_regaddr = false;
- 
-+	/* Set segment pointer for I2C extended read mode operation */
-+	i2c->is_segment = false;
-+
- 	for (i = 0; i < num; i++) {
- 		dev_dbg(hdmi->dev, "xfer: num: %d/%d, len: %d, flags: %#x\n",
- 			i + 1, num, msgs[i].len, msgs[i].flags);
--
--		if (msgs[i].flags & I2C_M_RD)
--			ret = dw_hdmi_i2c_read(hdmi, msgs[i].buf, msgs[i].len);
--		else
--			ret = dw_hdmi_i2c_write(hdmi, msgs[i].buf, msgs[i].len);
--
-+		if (msgs[i].addr == DDC_SEGMENT_ADDR && msgs[i].len == 1) {
-+			i2c->is_segment = true;
-+			hdmi_writeb(hdmi, DDC_SEGMENT_ADDR, HDMI_I2CM_SEGADDR);
-+			hdmi_writeb(hdmi, *msgs[i].buf, HDMI_I2CM_SEGPTR);
-+		} else {
-+			if (msgs[i].flags & I2C_M_RD)
-+				ret = dw_hdmi_i2c_read(hdmi, msgs[i].buf,
-+						       msgs[i].len);
-+			else
-+				ret = dw_hdmi_i2c_write(hdmi, msgs[i].buf,
-+							msgs[i].len);
-+		}
- 		if (ret < 0)
- 			break;
- 	}
diff --git a/patches.renesas/0236-ARM-shmobile-r8a7745-basic-SoC-support.patch b/patches.renesas/0236-ARM-shmobile-r8a7745-basic-SoC-support.patch
deleted file mode 100644
index dbda11753ea92f..00000000000000
--- a/patches.renesas/0236-ARM-shmobile-r8a7745-basic-SoC-support.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 35ca57209a3101afff85bc3890fabd9b13ac62b2 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sat, 5 Nov 2016 00:49:55 +0300
-Subject: [PATCH 236/299] ARM: shmobile: r8a7745: basic SoC support
-
-Add minimal support for the RZ/G1E (R8A7745) SoC.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 47802fd7c7c4735ddaf004e0f61371dcaa86f4ad)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/arm/shmobile.txt |    2 ++
- arch/arm/mach-shmobile/Kconfig                     |    4 ++++
- arch/arm/mach-shmobile/setup-rcar-gen2.c           |    1 +
- 3 files changed, 7 insertions(+)
-
---- a/Documentation/devicetree/bindings/arm/shmobile.txt
-+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
-@@ -15,6 +15,8 @@ SoCs:
-     compatible = "renesas,r8a7740"
-   - RZ/G1M (R8A77430)
-     compatible = "renesas,r8a7743"
-+  - RZ/G1E (R8A77450)
-+    compatible = "renesas,r8a7745"
-   - R-Car M1A (R8A77781)
-     compatible = "renesas,r8a7778"
-   - R-Car H1 (R8A77790)
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -74,6 +74,10 @@ config ARCH_R8A7743
- 	select ARCH_RCAR_GEN2
- 	select ARM_ERRATA_798181 if SMP
- 
-+config ARCH_R8A7745
-+	bool "RZ/G1E (R8A77450)"
-+	select ARCH_RCAR_GEN2
-+
- config ARCH_R8A7778
- 	bool "R-Car M1A (R8A77781)"
- 	select ARCH_RCAR_GEN1
---- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
-+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
-@@ -225,6 +225,7 @@ MACHINE_END
- 
- static const char * const rz_g1_boards_compat_dt[] __initconst = {
- 	"renesas,r8a7743",
-+	"renesas,r8a7745",
- 	NULL,
- };
- 
diff --git a/patches.renesas/0236-drm-bridge-dw-hdmi-Merge-__hdmi_phy_i2c_write-and-hd.patch b/patches.renesas/0236-drm-bridge-dw-hdmi-Merge-__hdmi_phy_i2c_write-and-hd.patch
deleted file mode 100644
index 76787d088ec507..00000000000000
--- a/patches.renesas/0236-drm-bridge-dw-hdmi-Merge-__hdmi_phy_i2c_write-and-hd.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 751759a33255eba913de232c981a99802dca7b67 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:28:51 +0200
-Subject: [PATCH 236/255] drm: bridge: dw-hdmi: Merge __hdmi_phy_i2c_write and
- hdmi_phy_i2c_write
-
-The latter is just an int wrapper around the former void function that
-unconditionally returns 0. As the return value is never checked, merge
-the two functions into one.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-2-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit cc7e96232763ff33418b088b436a564441347b15)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |    9 +--------
- 1 file changed, 1 insertion(+), 8 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -868,7 +868,7 @@ static bool hdmi_phy_wait_i2c_done(struc
- 	return true;
- }
- 
--static void __hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
-+static void hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
- 				 unsigned char addr)
- {
- 	hdmi_writeb(hdmi, 0xFF, HDMI_IH_I2CMPHY_STAT0);
-@@ -882,13 +882,6 @@ static void __hdmi_phy_i2c_write(struct
- 	hdmi_phy_wait_i2c_done(hdmi, 1000);
- }
- 
--static int hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
--			      unsigned char addr)
--{
--	__hdmi_phy_i2c_write(hdmi, data, addr);
--	return 0;
--}
--
- static void dw_hdmi_phy_enable_powerdown(struct dw_hdmi *hdmi, bool enable)
- {
- 	hdmi_mask_writeb(hdmi, !enable, HDMI_PHY_CONF0,
diff --git a/patches.renesas/0236-drm-bridge-dw-hdmi-add-HDMI-vendor-specific-infofram.patch b/patches.renesas/0236-drm-bridge-dw-hdmi-add-HDMI-vendor-specific-infofram.patch
deleted file mode 100644
index e2c84db5a6eb65..00000000000000
--- a/patches.renesas/0236-drm-bridge-dw-hdmi-add-HDMI-vendor-specific-infofram.patch
+++ /dev/null
@@ -1,102 +0,0 @@
-From 638db3396ad9b503b213a372dd640394167c7828 Mon Sep 17 00:00:00 2001
-From: Nickey Yang <nickey.yang@rock-chips.com>
-Date: Tue, 21 Mar 2017 15:36:17 +0800
-Subject: [PATCH 236/286] drm: bridge: dw-hdmi: add HDMI vendor specific
- infoframe config
-
-Vendor specific infoframe is mandatory for 4K2K resolution.
-Without this, the HDMI protocol compliance fails.
-
-Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/1490081777-2232-1-git-send-email-nickey.yang@rock-chips.com
-(cherry picked from commit 9aa1eca095579b8a8ea84d9bbd1fbdeff49cebd4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/synopsys/dw-hdmi.c |   53 ++++++++++++++++++++++++++++++
- drivers/gpu/drm/bridge/synopsys/dw-hdmi.h |    4 ++
- 2 files changed, 57 insertions(+)
-
---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-@@ -1240,6 +1240,58 @@ static void hdmi_config_AVI(struct dw_hd
- 	hdmi_writeb(hdmi, (frame.right_bar >> 8) & 0xff, HDMI_FC_AVISRB1);
- }
- 
-+static void hdmi_config_vendor_specific_infoframe(struct dw_hdmi *hdmi,
-+						 struct drm_display_mode *mode)
-+{
-+	struct hdmi_vendor_infoframe frame;
-+	u8 buffer[10];
-+	ssize_t err;
-+
-+	err = drm_hdmi_vendor_infoframe_from_display_mode(&frame, mode);
-+	if (err < 0)
-+		/*
-+		 * Going into that statement does not means vendor infoframe
-+		 * fails. It just informed us that vendor infoframe is not
-+		 * needed for the selected mode. Only 4k or stereoscopic 3D
-+		 * mode requires vendor infoframe. So just simply return.
-+		 */
-+		return;
-+
-+	err = hdmi_vendor_infoframe_pack(&frame, buffer, sizeof(buffer));
-+	if (err < 0) {
-+		dev_err(hdmi->dev, "Failed to pack vendor infoframe: %zd\n",
-+			err);
-+		return;
-+	}
-+	hdmi_mask_writeb(hdmi, 0, HDMI_FC_DATAUTO0, HDMI_FC_DATAUTO0_VSD_OFFSET,
-+			HDMI_FC_DATAUTO0_VSD_MASK);
-+
-+	/* Set the length of HDMI vendor specific InfoFrame payload */
-+	hdmi_writeb(hdmi, buffer[2], HDMI_FC_VSDSIZE);
-+
-+	/* Set 24bit IEEE Registration Identifier */
-+	hdmi_writeb(hdmi, buffer[4], HDMI_FC_VSDIEEEID0);
-+	hdmi_writeb(hdmi, buffer[5], HDMI_FC_VSDIEEEID1);
-+	hdmi_writeb(hdmi, buffer[6], HDMI_FC_VSDIEEEID2);
-+
-+	/* Set HDMI_Video_Format and HDMI_VIC/3D_Structure */
-+	hdmi_writeb(hdmi, buffer[7], HDMI_FC_VSDPAYLOAD0);
-+	hdmi_writeb(hdmi, buffer[8], HDMI_FC_VSDPAYLOAD1);
-+
-+	if (frame.s3d_struct >= HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF)
-+		hdmi_writeb(hdmi, buffer[9], HDMI_FC_VSDPAYLOAD2);
-+
-+	/* Packet frame interpolation */
-+	hdmi_writeb(hdmi, 1, HDMI_FC_DATAUTO1);
-+
-+	/* Auto packets per frame and line spacing */
-+	hdmi_writeb(hdmi, 0x11, HDMI_FC_DATAUTO2);
-+
-+	/* Configures the Frame Composer On RDRB mode */
-+	hdmi_mask_writeb(hdmi, 1, HDMI_FC_DATAUTO0, HDMI_FC_DATAUTO0_VSD_OFFSET,
-+			HDMI_FC_DATAUTO0_VSD_MASK);
-+}
-+
- static void hdmi_av_composer(struct dw_hdmi *hdmi,
- 			     const struct drm_display_mode *mode)
- {
-@@ -1489,6 +1541,7 @@ static int dw_hdmi_setup(struct dw_hdmi
- 
- 		/* HDMI Initialization Step F - Configure AVI InfoFrame */
- 		hdmi_config_AVI(hdmi, mode);
-+		hdmi_config_vendor_specific_infoframe(hdmi, mode);
- 	} else {
- 		dev_dbg(hdmi->dev, "%s DVI mode\n", __func__);
- 	}
---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h
-@@ -854,6 +854,10 @@ enum {
- 	HDMI_FC_DBGFORCE_FORCEAUDIO = 0x10,
- 	HDMI_FC_DBGFORCE_FORCEVIDEO = 0x1,
- 
-+/* FC_DATAUTO0 field values */
-+	HDMI_FC_DATAUTO0_VSD_MASK = 0x08,
-+	HDMI_FC_DATAUTO0_VSD_OFFSET = 3,
-+
- /* PHY_CONF0 field values */
- 	HDMI_PHY_CONF0_PDZ_MASK = 0x80,
- 	HDMI_PHY_CONF0_PDZ_OFFSET = 7,
diff --git a/patches.renesas/0237-ARM-shmobile-document-SK-RZG1E-board.patch b/patches.renesas/0237-ARM-shmobile-document-SK-RZG1E-board.patch
deleted file mode 100644
index f20d4baba6d0ff..00000000000000
--- a/patches.renesas/0237-ARM-shmobile-document-SK-RZG1E-board.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 6fa3ae29f972294ff82415fba3777a67e54a814e Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 4 Nov 2016 10:44:38 +0100
-Subject: [PATCH 237/299] ARM: shmobile: document SK-RZG1E board
-
-Document the SK-RZG1E device tree bindings, listing it as a supported board.
-
-This allows to use checkpatch.pl to validate .dts files referring to the
-SK-RZG1E board.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4af239175d00c1866cc6b41f3eabcf93c45dcc40)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/arm/shmobile.txt |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/Documentation/devicetree/bindings/arm/shmobile.txt
-+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
-@@ -79,6 +79,8 @@ Boards:
-     compatible = "renesas,salvator-x", "renesas,r8a7796";
-   - SILK (RTP0RC7794LCB00011S)
-     compatible = "renesas,silk", "renesas,r8a7794"
-+  - SK-RZG1E (YR8A77450S000BE)
-+    compatible = "renesas,sk-rzg1e", "renesas,r8a7745"
-   - SK-RZG1M (YR8A77430S000BE)
-     compatible = "renesas,sk-rzg1m", "renesas,r8a7743"
-   - Wheat
diff --git a/patches.renesas/0237-drm-bridge-dw-hdmi-Remove-unneeded-arguments-to-bind.patch b/patches.renesas/0237-drm-bridge-dw-hdmi-Remove-unneeded-arguments-to-bind.patch
deleted file mode 100644
index c80b18fd660f8e..00000000000000
--- a/patches.renesas/0237-drm-bridge-dw-hdmi-Remove-unneeded-arguments-to-bind.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From a4b757e2e4b85c208eb723d63df4afa04c2f44e3 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:28:52 +0200
-Subject: [PATCH 237/255] drm: bridge: dw-hdmi: Remove unneeded arguments to
- bind/unbind functions
-
-The master argument isn't used. The data argument, a void pointer, is
-used by the bind function only where it's cast to a drm_device pointer,
-which can easily be obtained from the encoder argument instead. Remove
-them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-3-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit ecaa98f1e6f7ed3f79def1861f21ff2eac82b8e9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c            |    8 +++-----
- drivers/gpu/drm/imx/dw_hdmi-imx.c           |    4 ++--
- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c |    4 ++--
- include/drm/bridge/dw_hdmi.h                |    5 ++---
- 4 files changed, 9 insertions(+), 12 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -1854,12 +1854,10 @@ static int dw_hdmi_register(struct drm_d
- 	return 0;
- }
- 
--int dw_hdmi_bind(struct device *dev, struct device *master,
--		 void *data, struct drm_encoder *encoder,
-+int dw_hdmi_bind(struct device *dev, struct drm_encoder *encoder,
- 		 struct resource *iores, int irq,
- 		 const struct dw_hdmi_plat_data *plat_data)
- {
--	struct drm_device *drm = data;
- 	struct device_node *np = dev->of_node;
- 	struct platform_device_info pdevinfo;
- 	struct device_node *ddc_node;
-@@ -1992,7 +1990,7 @@ int dw_hdmi_bind(struct device *dev, str
- 	if (ret)
- 		goto err_iahb;
- 
--	ret = dw_hdmi_register(drm, hdmi);
-+	ret = dw_hdmi_register(encoder->dev, hdmi);
- 	if (ret)
- 		goto err_iahb;
- 
-@@ -2059,7 +2057,7 @@ err_res:
- }
- EXPORT_SYMBOL_GPL(dw_hdmi_bind);
- 
--void dw_hdmi_unbind(struct device *dev, struct device *master, void *data)
-+void dw_hdmi_unbind(struct device *dev)
- {
- 	struct dw_hdmi *hdmi = dev_get_drvdata(dev);
- 
---- a/drivers/gpu/drm/imx/dw_hdmi-imx.c
-+++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c
-@@ -249,7 +249,7 @@ static int dw_hdmi_imx_bind(struct devic
- 	drm_encoder_init(drm, encoder, &dw_hdmi_imx_encoder_funcs,
- 			 DRM_MODE_ENCODER_TMDS, NULL);
- 
--	ret = dw_hdmi_bind(dev, master, data, encoder, iores, irq, plat_data);
-+	ret = dw_hdmi_bind(dev, encoder, iores, irq, plat_data);
- 
- 	/*
- 	 * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(),
-@@ -264,7 +264,7 @@ static int dw_hdmi_imx_bind(struct devic
- static void dw_hdmi_imx_unbind(struct device *dev, struct device *master,
- 			       void *data)
- {
--	return dw_hdmi_unbind(dev, master, data);
-+	return dw_hdmi_unbind(dev);
- }
- 
- static const struct component_ops dw_hdmi_imx_ops = {
---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-@@ -301,7 +301,7 @@ static int dw_hdmi_rockchip_bind(struct
- 	drm_encoder_init(drm, encoder, &dw_hdmi_rockchip_encoder_funcs,
- 			 DRM_MODE_ENCODER_TMDS, NULL);
- 
--	ret = dw_hdmi_bind(dev, master, data, encoder, iores, irq, plat_data);
-+	ret = dw_hdmi_bind(dev, encoder, iores, irq, plat_data);
- 
- 	/*
- 	 * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(),
-@@ -316,7 +316,7 @@ static int dw_hdmi_rockchip_bind(struct
- static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
- 				    void *data)
- {
--	return dw_hdmi_unbind(dev, master, data);
-+	return dw_hdmi_unbind(dev);
- }
- 
- static const struct component_ops dw_hdmi_rockchip_ops = {
---- a/include/drm/bridge/dw_hdmi.h
-+++ b/include/drm/bridge/dw_hdmi.h
-@@ -56,9 +56,8 @@ struct dw_hdmi_plat_data {
- 					   struct drm_display_mode *mode);
- };
- 
--void dw_hdmi_unbind(struct device *dev, struct device *master, void *data);
--int dw_hdmi_bind(struct device *dev, struct device *master,
--		 void *data, struct drm_encoder *encoder,
-+void dw_hdmi_unbind(struct device *dev);
-+int dw_hdmi_bind(struct device *dev, struct drm_encoder *encoder,
- 		 struct resource *iores, int irq,
- 		 const struct dw_hdmi_plat_data *plat_data);
- 
diff --git a/patches.renesas/0237-drm-dw_hdmi-Don-t-rely-on-the-status-of-the-bridge-f.patch b/patches.renesas/0237-drm-dw_hdmi-Don-t-rely-on-the-status-of-the-bridge-f.patch
deleted file mode 100644
index 1c55b49d1bdc09..00000000000000
--- a/patches.renesas/0237-drm-dw_hdmi-Don-t-rely-on-the-status-of-the-bridge-f.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 13f1a5bf4e8a7f29e3cb46f88362bf62ef77aaab Mon Sep 17 00:00:00 2001
-From: Romain Perier <romain.perier@collabora.com>
-Date: Mon, 27 Mar 2017 11:45:07 +0530
-Subject: [PATCH 237/286] drm: dw_hdmi: Don't rely on the status of the bridge
- for updating HPD
-
-Currently, the irq handler that monitors changes for HPD and RX_SENSE
-relies on the status of the bridge for updating the status of the HPD.
-The update is done only when the bridge is enabled.
-
-However, on Rockchip platforms we have found use cases where it could be
-a problem. When HDMI is being used, turning off/on the screen or
-unplugging/re-plugging the cable, the following simplified code path
-will happen:
-
-- dw_hdmi_irq() will be triggered by an HPD event, as the bridge is on
-hdmi->disabled is false, then the handler will update the rxsense flag
-accordingly.
-- dw_hdmi_update_power() will be invoked with the mode
-DRM_FORCE_UNSPECIFIED and rxsense == 1, so dw_hdmi_poweroff() will be
-called and the PHY will be desactivated (its pixel clocks and TMDS)
-
-[...]
-
-- dw_hdmi_bridge_disable() will be invoked, the bridge will be marked as
-disabled.
-
-- dw_hdmi_irq() will be triggered by an HPD event, as the bridge is
-currently disabled the HPD status won't be updated, so hdmi->rxsense
-won't be changed. Even if the data part of the PHY is disabled, this
-information coming from the HDMI Transmitter is correct and should be
-saved.
-
-[...]
-
-- dw_hdmi_bridge_enable() will be invoked, the bridge will be marked as
-enabled.
-- dw_hdmi_update_power() will be called. When hdmi->force is equal to
-DRM_FORCE_UNSPECIFIED the function will rely on hdmi->rxsense. If this
-field has not been updated by the irq handler, it will be false and
-DRM_FORCE_ON won't be put to hdmi->force.
-
-Consequently, most of the time dw_hdmi_poweron() won't be called in this
-use case, TMDS won't be re-enabled the PHY won't be re-initialized,
-resulting in a "Signal not found".
-
-This commit fixes the issue by removing the check for "!hdmi->disabled".
-As already explained, even if the PHY is partially disabled, information
-coming from HDMI Transmitter about HPD should be saved for a later use.
-
-Signed-off-by: Romain Perier <romain.perier@collabora.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: https://patchwork.freedesktop.org/patch/143602/
-(cherry picked from commit 187697a4544c20d4b77193275a7e10f85506d14d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/synopsys/dw-hdmi.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-@@ -1916,7 +1916,7 @@ static irqreturn_t dw_hdmi_irq(int irq,
- 	if (intr_stat &
- 	    (HDMI_IH_PHY_STAT0_RX_SENSE | HDMI_IH_PHY_STAT0_HPD)) {
- 		mutex_lock(&hdmi->mutex);
--		if (!hdmi->disabled && !hdmi->force) {
-+		if (!hdmi->force) {
- 			/*
- 			 * If the RX sense status indicates we're disconnected,
- 			 * clear the software rxsense status.
diff --git a/patches.renesas/0238-ARM-dts-alt-Fix-PFC-names-for-DU.patch b/patches.renesas/0238-ARM-dts-alt-Fix-PFC-names-for-DU.patch
deleted file mode 100644
index 0ab21841184bd1..00000000000000
--- a/patches.renesas/0238-ARM-dts-alt-Fix-PFC-names-for-DU.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 0a05d4b0e5bf81e1513a177a95051f6d2c0ce5c0 Mon Sep 17 00:00:00 2001
-From: Jacopo Mondi <jacopo@jmondi.org>
-Date: Thu, 3 Nov 2016 20:34:46 +0100
-Subject: [PATCH 238/299] ARM: dts: alt: Fix PFC names for DU
-
-Update the PFC pin groups and function names of DU interface for
-r8a7794 ALT board.
-
-The currently specified pin groups and function names prevented PFC and
-DU interfaces from being correctly configured:
-
-sh-pfc e6060000.pin-controller: function 'du' not supported
-sh-pfc e6060000.pin-controller: invalid function du in map table
-sh-pfc e6060000.pin-controller: function 'du' not supported
-sh-pfc e6060000.pin-controller: invalid function du in map table
-sh-pfc e6060000.pin-controller: function 'du' not supported
-sh-pfc e6060000.pin-controller: invalid function du in map table
-sh-pfc e6060000.pin-controller: function 'du' not supported
-sh-pfc e6060000.pin-controller: invalid function du in map table
-rcar-du: probe of feb00000.display failed with error -22
-
-Signed-off-by: Jacopo Mondi <jacopo@jmondi.org>
-Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5591aa4249436615b12ed980a457840f886656f9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794-alt.dts |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7794-alt.dts
-+++ b/arch/arm/boot/dts/r8a7794-alt.dts
-@@ -165,8 +165,8 @@
- 	pinctrl-names = "default";
- 
- 	du_pins: du {
--		groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_dotclkout0";
--		function = "du";
-+		groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
-+		function = "du1";
- 	};
- 
- 	scif2_pins: scif2 {
diff --git a/patches.renesas/0238-drm-bridge-dw-hdmi-Remove-unused-function-parameter.patch b/patches.renesas/0238-drm-bridge-dw-hdmi-Remove-unused-function-parameter.patch
deleted file mode 100644
index 2883f248f0e639..00000000000000
--- a/patches.renesas/0238-drm-bridge-dw-hdmi-Remove-unused-function-parameter.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 5289ea4234e0a47ef04a44cef8ea71a7b656cfdc Mon Sep 17 00:00:00 2001
-From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:28:53 +0200
-Subject: [PATCH 238/255] drm: bridge: dw-hdmi: Remove unused function
- parameter
-
-The 'prep' parameter passed to hdmi_phy_configure() is useless. It is
-hardcoded as 0, and if set, simply prevents the configure function from
-executing.
-
-Remove it.
-
-Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-4-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit dfa73065d61b6ce57aed90bb0d745c4b6f5b71e7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |    7 ++-----
- 1 file changed, 2 insertions(+), 5 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -931,7 +931,7 @@ static void dw_hdmi_phy_sel_interface_co
- 			 HDMI_PHY_CONF0_SELDIPIF_MASK);
- }
- 
--static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep,
-+static int hdmi_phy_configure(struct dw_hdmi *hdmi,
- 			      unsigned char res, int cscon)
- {
- 	unsigned res_idx;
-@@ -941,9 +941,6 @@ static int hdmi_phy_configure(struct dw_
- 	const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
- 	const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
- 
--	if (prep)
--		return -EINVAL;
--
- 	switch (res) {
- 	case 0:	/* color resolution 0 is 8 bit colour depth */
- 	case 8:
-@@ -1072,7 +1069,7 @@ static int dw_hdmi_phy_init(struct dw_hd
- 		dw_hdmi_phy_enable_powerdown(hdmi, true);
- 
- 		/* Enable CSC */
--		ret = hdmi_phy_configure(hdmi, 0, 8, cscon);
-+		ret = hdmi_phy_configure(hdmi, 8, cscon);
- 		if (ret)
- 			return ret;
- 	}
diff --git a/patches.renesas/0238-dt-bindings-display-renesas-Add-R-Car-Gen3-HDMI-TX-D.patch b/patches.renesas/0238-dt-bindings-display-renesas-Add-R-Car-Gen3-HDMI-TX-D.patch
deleted file mode 100644
index 8513ed318d97b3..00000000000000
--- a/patches.renesas/0238-dt-bindings-display-renesas-Add-R-Car-Gen3-HDMI-TX-D.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From d3caa31fb90676e50b6b51163dced0d885c6552f Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 2 Dec 2016 01:02:53 +0200
-Subject: [PATCH 238/286] dt-bindings: display: renesas: Add R-Car Gen3 HDMI TX
- DT bindings
-
-The Renesas R-Car Gen3 SoCs use a Synopsys DWC HDMI TX encoder IP. Add
-corresponding device tree bindings based on the DWC HDMI TX bindings
-model.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Rob Herring <robh@kernel.org>
-(cherry picked from commit 907c1bbd513db7e9aee63b31627c325e39e7d9ba)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt |   75 ++++++++++
- MAINTAINERS                                                          |    1 
- 2 files changed, 76 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
-@@ -0,0 +1,75 @@
-+Renesas Gen3 DWC HDMI TX Encoder
-+================================
-+
-+The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
-+with a companion PHY IP.
-+
-+These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
-+Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
-+following device-specific properties.
-+
-+
-+Required properties:
-+
-+- compatible : Shall contain one or more of
-+  - "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
-+  - "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 compatible HDMI TX
-+
-+    When compatible with generic versions, nodes must list the SoC-specific
-+    version corresponding to the platform first, followed by the
-+    family-specific version.
-+
-+- reg: See dw_hdmi.txt.
-+- interrupts: HDMI interrupt number
-+- clocks: See dw_hdmi.txt.
-+- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
-+- ports: See dw_hdmi.txt. The DWC HDMI shall have one port numbered 0
-+  corresponding to the video input of the controller and one port numbered 1
-+  corresponding to its HDMI output. Each port shall have a single endpoint.
-+
-+Optional properties:
-+
-+- power-domains: Shall reference the power domain that contains the DWC HDMI,
-+  if any.
-+
-+
-+Example:
-+
-+	hdmi0: hdmi0@fead0000 {
-+		compatible = "renesas,r8a7795-dw-hdmi";
-+		reg = <0 0xfead0000 0 0x10000>;
-+		interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>;
-+		clock-names = "iahb", "isfr";
-+		power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+		status = "disabled";
-+
-+		ports {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			port@0 {
-+				reg = <0>;
-+				dw_hdmi0_in: endpoint {
-+					remote-endpoint = <&du_out_hdmi0>;
-+				};
-+			};
-+			port@1 {
-+				reg = <1>;
-+				rcar_dw_hdmi0_out: endpoint {
-+					remote-endpoint = <&hdmi0_con>;
-+				};
-+			};
-+		};
-+	};
-+
-+	hdmi0-out {
-+		compatible = "hdmi-connector";
-+		label = "HDMI0 OUT";
-+		type = "a";
-+
-+		port {
-+			hdmi0_con: endpoint {
-+				remote-endpoint = <&rcar_dw_hdmi0_out>;
-+			};
-+		};
-+	};
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -4207,6 +4207,7 @@ S:	Supported
- F:	drivers/gpu/drm/rcar-du/
- F:	drivers/gpu/drm/shmobile/
- F:	include/linux/platform_data/shmob_drm.h
-+F:	Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
- F:	Documentation/devicetree/bindings/display/renesas,du.txt
- 
- DRM DRIVER FOR QXL VIRTUAL GPU
diff --git a/patches.renesas/0239-ARM-dts-lager-rename-and-reindex-i2cexio.patch b/patches.renesas/0239-ARM-dts-lager-rename-and-reindex-i2cexio.patch
deleted file mode 100644
index 1f1e8d354c0c0e..00000000000000
--- a/patches.renesas/0239-ARM-dts-lager-rename-and-reindex-i2cexio.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 3410933290557eceeb1c1d93e4d677cea1be77ab Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Sun, 6 Nov 2016 21:20:19 +0100
-Subject: [PATCH 239/299] ARM: dts: lager: rename and reindex i2cexio
-
-The rename from i2cexio to i2cexio0 is in preparation for adding
-i2cexio1 which will use the demuxer for IIC1/I2C1.
-
-The reindexing from i2c8 to i2c10 is to allow space for grouping of
-additional GPIO buses to be added by follow-up patches to support demuxing
-of other i2c buses.
-
-Also note that fallback to GPIO is not provided by the hardware for IIC0/I2C0.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-[wsa: rebased, fixed alias and removed typo in commit message]
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-
-(cherry picked from commit 1e26fcf31c5c70557689184185913881e4557bc0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790-lager.dts |   12 +++++++-----
- 1 file changed, 7 insertions(+), 5 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7790-lager.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager.dts
-@@ -50,7 +50,7 @@
- 	aliases {
- 		serial0 = &scif0;
- 		serial1 = &scifa1;
--		i2c8 = "i2cexio";
-+		i2c10 = &i2cexio0;
- 	};
- 
- 	chosen {
-@@ -273,11 +273,13 @@
- 	 * bus with IIC3 on pins 110 (SCL) + 112 (SDA), select I2C0 at runtime, and
- 	 * instantiate the slave device at runtime according to the documentation.
- 	 * You can then communicate with the slave via IIC3.
-+	 *
-+	 * IIC0/I2C0 does not appear to support fallback to GPIO.
- 	 */
--	i2cexio: i2c-8 {
-+	i2cexio0: i2c-10 {
- 		compatible = "i2c-demux-pinctrl";
- 		i2c-parent = <&iic0>, <&i2c0>;
--		i2c-bus-name = "i2c-exio";
-+		i2c-bus-name = "i2c-exio0";
- 		#address-cells = <1>;
- 		#size-cells = <0>;
- 	};
-@@ -596,12 +598,12 @@
- 
- &i2c0	{
- 	pinctrl-0 = <&i2c0_pins>;
--	pinctrl-names = "i2c-exio";
-+	pinctrl-names = "i2c-exio0";
- };
- 
- &iic0	{
- 	pinctrl-0 = <&iic0_pins>;
--	pinctrl-names = "i2c-exio";
-+	pinctrl-names = "i2c-exio0";
- };
- 
- &iic1	{
diff --git a/patches.renesas/0239-drm-bridge-dw-hdmi-Embed-drm_bridge-in-struct-dw_hdm.patch b/patches.renesas/0239-drm-bridge-dw-hdmi-Embed-drm_bridge-in-struct-dw_hdm.patch
deleted file mode 100644
index c066ca5896c65e..00000000000000
--- a/patches.renesas/0239-drm-bridge-dw-hdmi-Embed-drm_bridge-in-struct-dw_hdm.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 1067cf87533833fe297ee3c4f3aca74d76f9be58 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:28:54 +0200
-Subject: [PATCH 239/255] drm: bridge: dw-hdmi: Embed drm_bridge in struct
- dw_hdmi
-
-The drm_bridge instance is always needed, there's no point in allocating
-it separately.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-5-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 70c963ec4f15a13197524611875168f23acc4a97)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |   13 +++----------
- 1 file changed, 3 insertions(+), 10 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -116,7 +116,7 @@ struct dw_hdmi_i2c {
- struct dw_hdmi {
- 	struct drm_connector connector;
- 	struct drm_encoder *encoder;
--	struct drm_bridge *bridge;
-+	struct drm_bridge bridge;
- 
- 	struct platform_device *audio;
- 	enum dw_hdmi_devtype dev_type;
-@@ -1806,7 +1806,7 @@ static irqreturn_t dw_hdmi_irq(int irq,
- 	if (intr_stat & HDMI_IH_PHY_STAT0_HPD) {
- 		dev_dbg(hdmi->dev, "EVENT=%s\n",
- 			phy_int_pol & HDMI_PHY_HPD ? "plugin" : "plugout");
--		drm_helper_hpd_irq_event(hdmi->bridge->dev);
-+		drm_helper_hpd_irq_event(hdmi->bridge.dev);
- 	}
- 
- 	hdmi_writeb(hdmi, intr_stat, HDMI_IH_PHY_STAT0);
-@@ -1819,16 +1819,9 @@ static irqreturn_t dw_hdmi_irq(int irq,
- static int dw_hdmi_register(struct drm_device *drm, struct dw_hdmi *hdmi)
- {
- 	struct drm_encoder *encoder = hdmi->encoder;
--	struct drm_bridge *bridge;
-+	struct drm_bridge *bridge = &hdmi->bridge;
- 	int ret;
- 
--	bridge = devm_kzalloc(drm->dev, sizeof(*bridge), GFP_KERNEL);
--	if (!bridge) {
--		DRM_ERROR("Failed to allocate drm bridge\n");
--		return -ENOMEM;
--	}
--
--	hdmi->bridge = bridge;
- 	bridge->driver_private = hdmi;
- 	bridge->funcs = &dw_hdmi_bridge_funcs;
- 	ret = drm_bridge_attach(encoder, bridge, NULL);
diff --git a/patches.renesas/0239-drm-bridge-dw-hdmi-Extract-PHY-interrupt-setup-to-a-.patch b/patches.renesas/0239-drm-bridge-dw-hdmi-Extract-PHY-interrupt-setup-to-a-.patch
deleted file mode 100644
index d44b99da6ff2ac..00000000000000
--- a/patches.renesas/0239-drm-bridge-dw-hdmi-Extract-PHY-interrupt-setup-to-a-.patch
+++ /dev/null
@@ -1,109 +0,0 @@
-From 72d9cb9a6144567d362e748c753cbee6adc20255 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 4 Apr 2017 14:31:56 +0200
-Subject: [PATCH 239/286] drm: bridge: dw-hdmi: Extract PHY interrupt setup to
- a function
-
-In preparation for adding PHY operations to handle RX SENSE and HPD,
-group all the PHY interrupt setup code in a single location and extract
-it to a separate function.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-[narmstrong: renamed dw_hdmi_fb_registered to dw_hdmi_setup_i2c]
-Reviewed-by: Archit Taneja <architt@codeaurora.org>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
-
-(cherry picked from commit a23d6265f033501529932db2d6b3f4bc138552ab)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/synopsys/dw-hdmi.c |   51 +++++++++++++-----------------
- 1 file changed, 23 insertions(+), 28 deletions(-)
-
---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-@@ -1558,8 +1558,7 @@ static int dw_hdmi_setup(struct dw_hdmi
- 	return 0;
- }
- 
--/* Wait until we are registered to enable interrupts */
--static int dw_hdmi_fb_registered(struct dw_hdmi *hdmi)
-+static void dw_hdmi_setup_i2c(struct dw_hdmi *hdmi)
- {
- 	hdmi_writeb(hdmi, HDMI_PHY_I2CM_INT_ADDR_DONE_POL,
- 		    HDMI_PHY_I2CM_INT_ADDR);
-@@ -1567,15 +1566,6 @@ static int dw_hdmi_fb_registered(struct
- 	hdmi_writeb(hdmi, HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL |
- 		    HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL,
- 		    HDMI_PHY_I2CM_CTLINT_ADDR);
--
--	/* enable cable hot plug irq */
--	hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
--
--	/* Clear Hotplug interrupts */
--	hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
--		    HDMI_IH_PHY_STAT0);
--
--	return 0;
- }
- 
- static void initialize_hdmi_ih_mutes(struct dw_hdmi *hdmi)
-@@ -1693,6 +1683,26 @@ static void dw_hdmi_update_phy_mask(stru
- 		hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
- }
- 
-+static void dw_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi)
-+{
-+	/*
-+	 * Configure the PHY RX SENSE and HPD interrupts polarities and clear
-+	 * any pending interrupt.
-+	 */
-+	hdmi_writeb(hdmi, HDMI_PHY_HPD | HDMI_PHY_RX_SENSE, HDMI_PHY_POL0);
-+	hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
-+		    HDMI_IH_PHY_STAT0);
-+
-+	/* Enable cable hot plug irq. */
-+	hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
-+
-+	/* Clear and unmute interrupts. */
-+	hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
-+		    HDMI_IH_PHY_STAT0);
-+	hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE),
-+		    HDMI_IH_MUTE_PHY_STAT0);
-+}
-+
- static enum drm_connector_status
- dw_hdmi_connector_detect(struct drm_connector *connector, bool force)
- {
-@@ -2204,29 +2214,14 @@ __dw_hdmi_probe(struct platform_device *
- 			hdmi->ddc = NULL;
- 	}
- 
--	/*
--	 * Configure registers related to HDMI interrupt
--	 * generation before registering IRQ.
--	 */
--	hdmi_writeb(hdmi, HDMI_PHY_HPD | HDMI_PHY_RX_SENSE, HDMI_PHY_POL0);
--
--	/* Clear Hotplug interrupts */
--	hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
--		    HDMI_IH_PHY_STAT0);
--
- 	hdmi->bridge.driver_private = hdmi;
- 	hdmi->bridge.funcs = &dw_hdmi_bridge_funcs;
- #ifdef CONFIG_OF
- 	hdmi->bridge.of_node = pdev->dev.of_node;
- #endif
- 
--	ret = dw_hdmi_fb_registered(hdmi);
--	if (ret)
--		goto err_iahb;
--
--	/* Unmute interrupts */
--	hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE),
--		    HDMI_IH_MUTE_PHY_STAT0);
-+	dw_hdmi_setup_i2c(hdmi);
-+	dw_hdmi_phy_setup_hpd(hdmi);
- 
- 	memset(&pdevinfo, 0, sizeof(pdevinfo));
- 	pdevinfo.parent = dev;
diff --git a/patches.renesas/0240-ARM-dts-lager-use-demuxer-for-IIC1-I2C1.patch b/patches.renesas/0240-ARM-dts-lager-use-demuxer-for-IIC1-I2C1.patch
deleted file mode 100644
index 62fd555f1de5a9..00000000000000
--- a/patches.renesas/0240-ARM-dts-lager-use-demuxer-for-IIC1-I2C1.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From 90cf504d9732cf2271852f6a2adafc1b5876dd7b Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Sun, 6 Nov 2016 21:20:20 +0100
-Subject: [PATCH 240/299] ARM: dts: lager: use demuxer for IIC1/I2C1
-
-Make it possible to select which I2C1 IP core you want to run on the
-EXIO-A connector.
-
-This is based on reference work for the I2C0 core of the lager board
-by Wolfram Sang.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-[wsa: rebased and fixed aliases]
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-
-(cherry picked from commit b2f15ca697a11c8df64ac6c8086ababc5c9e6060)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790-lager.dts |   39 ++++++++++++++++++++++++++++++++++--
- 1 file changed, 37 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7790-lager.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager.dts
-@@ -50,7 +50,9 @@
- 	aliases {
- 		serial0 = &scif0;
- 		serial1 = &scifa1;
-+		i2c8 = &gpioi2c1;
- 		i2c10 = &i2cexio0;
-+		i2c11 = &i2cexio1;
- 	};
- 
- 	chosen {
-@@ -265,6 +267,17 @@
- 		clock-frequency = <148500000>;
- 	};
- 
-+	gpioi2c1: i2c-8 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "i2c-gpio";
-+		status = "disabled";
-+		gpios = <&gpio1 17 GPIO_ACTIVE_HIGH /* sda */
-+			 &gpio1 16 GPIO_ACTIVE_HIGH /* scl */
-+			>;
-+		i2c-gpio,delay-us = <5>;
-+	};
-+
- 	/*
- 	 * IIC0/I2C0 is routed to EXIO connector A, pins 114 (SCL) + 116 (SDA) only.
- 	 * We use the I2C demuxer, so the desired IP core can be selected at runtime
-@@ -283,6 +296,19 @@
- 		#address-cells = <1>;
- 		#size-cells = <0>;
- 	};
-+
-+	/*
-+	 * IIC1/I2C1 is routed to EXIO connector A, pins 78 (SCL) + 80 (SDA).
-+	 * This is similar to the arangement described for i2cexio0 (above)
-+	 * with a fallback to GPIO also provided.
-+	 */
-+	i2cexio1: i2c-11 {
-+		compatible = "i2c-demux-pinctrl";
-+		i2c-parent = <&iic1>, <&i2c1>, <&gpioi2c1>;
-+		i2c-bus-name = "i2c-exio1";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+	};
- };
- 
- &du {
-@@ -405,6 +431,11 @@
- 		function = "iic0";
- 	};
- 
-+	i2c1_pins: i2c1 {
-+		groups = "i2c1";
-+		function = "i2c1";
-+	};
-+
- 	iic1_pins: iic1 {
- 		groups = "iic1";
- 		function = "iic1";
-@@ -606,10 +637,14 @@
- 	pinctrl-names = "i2c-exio0";
- };
- 
-+&i2c1	{
-+	pinctrl-0 = <&i2c1_pins>;
-+	pinctrl-names = "i2c-exio1";
-+};
-+
- &iic1	{
--	status = "okay";
- 	pinctrl-0 = <&iic1_pins>;
--	pinctrl-names = "default";
-+	pinctrl-names = "i2c-exio1";
- };
- 
- &iic2	{
diff --git a/patches.renesas/0240-drm-bridge-dw-hdmi-Remove-encoder-field-from-struct-.patch b/patches.renesas/0240-drm-bridge-dw-hdmi-Remove-encoder-field-from-struct-.patch
deleted file mode 100644
index f24c39c355dbbf..00000000000000
--- a/patches.renesas/0240-drm-bridge-dw-hdmi-Remove-encoder-field-from-struct-.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From ef242ace1b51401f14217abd837cce456b22cf4d Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:28:55 +0200
-Subject: [PATCH 240/255] drm: bridge: dw-hdmi: Remove encoder field from
- struct dw_hdmi
-
-The field isn't needed, remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-6-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 527b863f6ad4f4f1707cbc2237df9d83d0c848c1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |    9 +++------
- 1 file changed, 3 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -115,7 +115,6 @@ struct dw_hdmi_i2c {
- 
- struct dw_hdmi {
- 	struct drm_connector connector;
--	struct drm_encoder *encoder;
- 	struct drm_bridge bridge;
- 
- 	struct platform_device *audio;
-@@ -1816,9 +1815,8 @@ static irqreturn_t dw_hdmi_irq(int irq,
- 	return IRQ_HANDLED;
- }
- 
--static int dw_hdmi_register(struct drm_device *drm, struct dw_hdmi *hdmi)
-+static int dw_hdmi_register(struct drm_encoder *encoder, struct dw_hdmi *hdmi)
- {
--	struct drm_encoder *encoder = hdmi->encoder;
- 	struct drm_bridge *bridge = &hdmi->bridge;
- 	int ret;
- 
-@@ -1835,7 +1833,7 @@ static int dw_hdmi_register(struct drm_d
- 	drm_connector_helper_add(&hdmi->connector,
- 				 &dw_hdmi_connector_helper_funcs);
- 
--	drm_connector_init(drm, &hdmi->connector,
-+	drm_connector_init(encoder->dev, &hdmi->connector,
- 			   &dw_hdmi_connector_funcs,
- 			   DRM_MODE_CONNECTOR_HDMIA);
- 
-@@ -1867,7 +1865,6 @@ int dw_hdmi_bind(struct device *dev, str
- 	hdmi->dev = dev;
- 	hdmi->dev_type = plat_data->dev_type;
- 	hdmi->sample_rate = 48000;
--	hdmi->encoder = encoder;
- 	hdmi->disabled = true;
- 	hdmi->rxsense = true;
- 	hdmi->phy_mask = (u8)~(HDMI_PHY_HPD | HDMI_PHY_RX_SENSE);
-@@ -1980,7 +1977,7 @@ int dw_hdmi_bind(struct device *dev, str
- 	if (ret)
- 		goto err_iahb;
- 
--	ret = dw_hdmi_register(encoder->dev, hdmi);
-+	ret = dw_hdmi_register(encoder, hdmi);
- 	if (ret)
- 		goto err_iahb;
- 
diff --git a/patches.renesas/0240-media-uapi-Add-RGB-and-YUV-bus-formats-for-Synopsys-.patch b/patches.renesas/0240-media-uapi-Add-RGB-and-YUV-bus-formats-for-Synopsys-.patch
deleted file mode 100644
index c4225cf62a56da..00000000000000
--- a/patches.renesas/0240-media-uapi-Add-RGB-and-YUV-bus-formats-for-Synopsys-.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 099e1369fcad6649a427919801b5a2de6ea20581 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Mon, 3 Apr 2017 16:42:34 +0200
-Subject: [PATCH 240/286] media: uapi: Add RGB and YUV bus formats for Synopsys
- HDMI TX Controller
-
-In order to describe the RGB and YUV bus formats used to feed the
-Synopsys DesignWare HDMI TX Controller, add missing formats to the
-list of Bus Formats.
-
-Documentation for these formats is added in a separate patch.
-
-Reviewed-by: Archit Taneja <architt@codeaurora.org>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-Acked-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
-Signed-off-by: Sean Paul <seanpaul@chromium.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/1491230558-10804-3-git-send-email-narmstrong@baylibre.com
-(cherry picked from commit d0353118fd589c127875290017c7fdd266937bee)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/uapi/linux/media-bus-format.h |   13 +++++++++++--
- 1 file changed, 11 insertions(+), 2 deletions(-)
-
---- a/include/uapi/linux/media-bus-format.h
-+++ b/include/uapi/linux/media-bus-format.h
-@@ -33,7 +33,7 @@
- 
- #define MEDIA_BUS_FMT_FIXED			0x0001
- 
--/* RGB - next is	0x1018 */
-+/* RGB - next is	0x101b */
- #define MEDIA_BUS_FMT_RGB444_1X12		0x1016
- #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE	0x1001
- #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE	0x1002
-@@ -57,8 +57,11 @@
- #define MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA	0x1012
- #define MEDIA_BUS_FMT_ARGB8888_1X32		0x100d
- #define MEDIA_BUS_FMT_RGB888_1X32_PADHI		0x100f
-+#define MEDIA_BUS_FMT_RGB101010_1X30		0x1018
-+#define MEDIA_BUS_FMT_RGB121212_1X36		0x1019
-+#define MEDIA_BUS_FMT_RGB161616_1X48		0x101a
- 
--/* YUV (including grey) - next is	0x2026 */
-+/* YUV (including grey) - next is	0x202c */
- #define MEDIA_BUS_FMT_Y8_1X8			0x2001
- #define MEDIA_BUS_FMT_UV8_1X8			0x2015
- #define MEDIA_BUS_FMT_UYVY8_1_5X8		0x2002
-@@ -90,12 +93,18 @@
- #define MEDIA_BUS_FMT_YVYU10_1X20		0x200e
- #define MEDIA_BUS_FMT_VUY8_1X24			0x2024
- #define MEDIA_BUS_FMT_YUV8_1X24			0x2025
-+#define MEDIA_BUS_FMT_UYYVYY8_0_5X24		0x2026
- #define MEDIA_BUS_FMT_UYVY12_1X24		0x2020
- #define MEDIA_BUS_FMT_VYUY12_1X24		0x2021
- #define MEDIA_BUS_FMT_YUYV12_1X24		0x2022
- #define MEDIA_BUS_FMT_YVYU12_1X24		0x2023
- #define MEDIA_BUS_FMT_YUV10_1X30		0x2016
-+#define MEDIA_BUS_FMT_UYYVYY10_0_5X30		0x2027
- #define MEDIA_BUS_FMT_AYUV8_1X32		0x2017
-+#define MEDIA_BUS_FMT_UYYVYY12_0_5X36		0x2028
-+#define MEDIA_BUS_FMT_YUV12_1X36		0x2029
-+#define MEDIA_BUS_FMT_YUV16_1X48		0x202a
-+#define MEDIA_BUS_FMT_UYYVYY16_0_5X48		0x202b
- 
- /* Bayer - next is	0x3021 */
- #define MEDIA_BUS_FMT_SBGGR8_1X8		0x3001
diff --git a/patches.renesas/0241-ARM-dts-koelsch-use-demuxer-for-I2C1.patch b/patches.renesas/0241-ARM-dts-koelsch-use-demuxer-for-I2C1.patch
deleted file mode 100644
index 59911fbcafa88b..00000000000000
--- a/patches.renesas/0241-ARM-dts-koelsch-use-demuxer-for-I2C1.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From 289342396270e4b8130f8a43ee72c6586ad4246d Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Sun, 6 Nov 2016 21:20:23 +0100
-Subject: [PATCH 241/299] ARM: dts: koelsch: use demuxer for I2C1
-
-Make it possible to fallback to GPIO for I2C1 on the EXIO-C connector.
-
-This is based on reference work for the I2C0 core of the lager/r8a7790
-by Wolfram Sang.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-[wsa: rebased and fixed aliases]
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-
-(cherry picked from commit 6723438b3b98ba8434655fa13fc6d5153f70ee98)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791-koelsch.dts |   35 ++++++++++++++++++++++++++++++++++
- 1 file changed, 35 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7791-koelsch.dts
-+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
-@@ -50,6 +50,8 @@
- 	aliases {
- 		serial0 = &scif0;
- 		serial1 = &scif1;
-+		i2c9 = &gpioi2c1;
-+		i2c12 = &i2cexio1;
- 	};
- 
- 	chosen {
-@@ -298,6 +300,29 @@
- 		#clock-cells = <0>;
- 		clock-frequency = <148500000>;
- 	};
-+
-+	gpioi2c1: i2c-9 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "i2c-gpio";
-+		status = "disabled";
-+		gpios = <&gpio7 16 GPIO_ACTIVE_HIGH /* sda */
-+			 &gpio7 15 GPIO_ACTIVE_HIGH /* scl */
-+			>;
-+		i2c-gpio,delay-us = <5>;
-+	};
-+
-+	/*
-+	 * I2C1 is routed to EXIO connector B, pins 64 (SCL) + 66 (SDA).
-+	 * A fallback to GPIO is provided.
-+	 */
-+	i2cexio1: i2c-12 {
-+		compatible = "i2c-demux-pinctrl";
-+		i2c-parent = <&i2c1>, <&gpioi2c1>;
-+		i2c-bus-name = "i2c-exio1";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+	};
- };
- 
- &du {
-@@ -333,6 +358,11 @@
- 	pinctrl-0 = <&scif_clk_pins>;
- 	pinctrl-names = "default";
- 
-+	i2c1_pins: i2c1 {
-+		groups = "i2c1";
-+		function = "i2c1";
-+	};
-+
- 	i2c2_pins: i2c2 {
- 		groups = "i2c2";
- 		function = "i2c2";
-@@ -581,6 +611,11 @@
- 	};
- };
- 
-+&i2c1 {
-+	pinctrl-0 = <&i2c1_pins>;
-+	pinctrl-names = "i2c-exio1";
-+};
-+
- &i2c2 {
- 	pinctrl-0 = <&i2c2_pins>;
- 	pinctrl-names = "default";
diff --git a/patches.renesas/0241-drm-bridge-dw-hdmi-Don-t-forward-HPD-events-to-DRM-c.patch b/patches.renesas/0241-drm-bridge-dw-hdmi-Don-t-forward-HPD-events-to-DRM-c.patch
deleted file mode 100644
index a821d9874863e5..00000000000000
--- a/patches.renesas/0241-drm-bridge-dw-hdmi-Don-t-forward-HPD-events-to-DRM-c.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From a731f1a3dc018610df31aa41670687745724df24 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:28:56 +0200
-Subject: [PATCH 241/255] drm: bridge: dw-hdmi: Don't forward HPD events to DRM
- core before attach
-
-Hotplug events should only be forwarded to the DRM core by the interrupt
-handler when the bridge has been attached, otherwise the DRM device
-pointer will be NULL, resulting in a crash.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-7-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit ba5d7e6160b7aed4df92d1764aa90790db0e7996)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -1805,7 +1805,8 @@ static irqreturn_t dw_hdmi_irq(int irq,
- 	if (intr_stat & HDMI_IH_PHY_STAT0_HPD) {
- 		dev_dbg(hdmi->dev, "EVENT=%s\n",
- 			phy_int_pol & HDMI_PHY_HPD ? "plugin" : "plugout");
--		drm_helper_hpd_irq_event(hdmi->bridge.dev);
-+		if (hdmi->bridge.dev)
-+			drm_helper_hpd_irq_event(hdmi->bridge.dev);
- 	}
- 
- 	hdmi_writeb(hdmi, intr_stat, HDMI_IH_PHY_STAT0);
diff --git a/patches.renesas/0241-drm-bridge-dw-hdmi-Switch-to-V4L-bus-format-and-enco.patch b/patches.renesas/0241-drm-bridge-dw-hdmi-Switch-to-V4L-bus-format-and-enco.patch
deleted file mode 100644
index 1e1e777b77db6c..00000000000000
--- a/patches.renesas/0241-drm-bridge-dw-hdmi-Switch-to-V4L-bus-format-and-enco.patch
+++ /dev/null
@@ -1,552 +0,0 @@
-From 9c43da13c21d0ba72bbaad864062d72b7d4dbef1 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Tue, 4 Apr 2017 14:31:57 +0200
-Subject: [PATCH 241/286] drm: bridge: dw-hdmi: Switch to V4L bus format and
- encodings
-
-Switch code to use the newly introduced V4L bus formats IDs instead of custom
-defines. Also use the V4L encoding defines.
-
-Some display pipelines can only provide non-RBG input pixels to the HDMI TX
-Controller, this patch takes the pixel format from the plat_data if provided.
-
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Reviewed-by: Archit Taneja <architt@codeaurora.org>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
-(cherry picked from commit def23aa7e9821a3dfe3fb7b139dd0229a89fdeb0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/synopsys/dw-hdmi.c |  326 +++++++++++++++++++++---------
- include/drm/bridge/dw_hdmi.h              |   63 +++++
- 2 files changed, 294 insertions(+), 95 deletions(-)
-
---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-@@ -30,18 +30,15 @@
- #include <drm/drm_encoder_slave.h>
- #include <drm/bridge/dw_hdmi.h>
- 
-+#include <uapi/linux/media-bus-format.h>
-+#include <uapi/linux/videodev2.h>
-+
- #include "dw-hdmi.h"
- #include "dw-hdmi-audio.h"
- 
- #define DDC_SEGMENT_ADDR	0x30
- #define HDMI_EDID_LEN		512
- 
--#define RGB			0
--#define YCBCR444		1
--#define YCBCR422_16BITS		2
--#define YCBCR422_8BITS		3
--#define XVYCC444		4
--
- enum hdmi_datamap {
- 	RGB444_8B = 0x01,
- 	RGB444_10B = 0x03,
-@@ -95,10 +92,10 @@ struct hdmi_vmode {
- };
- 
- struct hdmi_data_info {
--	unsigned int enc_in_format;
--	unsigned int enc_out_format;
--	unsigned int enc_color_depth;
--	unsigned int colorimetry;
-+	unsigned int enc_in_bus_format;
-+	unsigned int enc_out_bus_format;
-+	unsigned int enc_in_encoding;
-+	unsigned int enc_out_encoding;
- 	unsigned int pix_repet_factor;
- 	unsigned int hdcp_enable;
- 	struct hdmi_vmode video_mode;
-@@ -567,6 +564,92 @@ void dw_hdmi_audio_disable(struct dw_hdm
- }
- EXPORT_SYMBOL_GPL(dw_hdmi_audio_disable);
- 
-+static bool hdmi_bus_fmt_is_rgb(unsigned int bus_format)
-+{
-+	switch (bus_format) {
-+	case MEDIA_BUS_FMT_RGB888_1X24:
-+	case MEDIA_BUS_FMT_RGB101010_1X30:
-+	case MEDIA_BUS_FMT_RGB121212_1X36:
-+	case MEDIA_BUS_FMT_RGB161616_1X48:
-+		return true;
-+
-+	default:
-+		return false;
-+	}
-+}
-+
-+static bool hdmi_bus_fmt_is_yuv444(unsigned int bus_format)
-+{
-+	switch (bus_format) {
-+	case MEDIA_BUS_FMT_YUV8_1X24:
-+	case MEDIA_BUS_FMT_YUV10_1X30:
-+	case MEDIA_BUS_FMT_YUV12_1X36:
-+	case MEDIA_BUS_FMT_YUV16_1X48:
-+		return true;
-+
-+	default:
-+		return false;
-+	}
-+}
-+
-+static bool hdmi_bus_fmt_is_yuv422(unsigned int bus_format)
-+{
-+	switch (bus_format) {
-+	case MEDIA_BUS_FMT_UYVY8_1X16:
-+	case MEDIA_BUS_FMT_UYVY10_1X20:
-+	case MEDIA_BUS_FMT_UYVY12_1X24:
-+		return true;
-+
-+	default:
-+		return false;
-+	}
-+}
-+
-+static bool hdmi_bus_fmt_is_yuv420(unsigned int bus_format)
-+{
-+	switch (bus_format) {
-+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
-+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
-+	case MEDIA_BUS_FMT_UYYVYY12_0_5X36:
-+	case MEDIA_BUS_FMT_UYYVYY16_0_5X48:
-+		return true;
-+
-+	default:
-+		return false;
-+	}
-+}
-+
-+static int hdmi_bus_fmt_color_depth(unsigned int bus_format)
-+{
-+	switch (bus_format) {
-+	case MEDIA_BUS_FMT_RGB888_1X24:
-+	case MEDIA_BUS_FMT_YUV8_1X24:
-+	case MEDIA_BUS_FMT_UYVY8_1X16:
-+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
-+		return 8;
-+
-+	case MEDIA_BUS_FMT_RGB101010_1X30:
-+	case MEDIA_BUS_FMT_YUV10_1X30:
-+	case MEDIA_BUS_FMT_UYVY10_1X20:
-+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
-+		return 10;
-+
-+	case MEDIA_BUS_FMT_RGB121212_1X36:
-+	case MEDIA_BUS_FMT_YUV12_1X36:
-+	case MEDIA_BUS_FMT_UYVY12_1X24:
-+	case MEDIA_BUS_FMT_UYYVYY12_0_5X36:
-+		return 12;
-+
-+	case MEDIA_BUS_FMT_RGB161616_1X48:
-+	case MEDIA_BUS_FMT_YUV16_1X48:
-+	case MEDIA_BUS_FMT_UYYVYY16_0_5X48:
-+		return 16;
-+
-+	default:
-+		return 0;
-+	}
-+}
-+
- /*
-  * this submodule is responsible for the video data synchronization.
-  * for example, for RGB 4:4:4 input, the data map is defined as
-@@ -579,37 +662,49 @@ static void hdmi_video_sample(struct dw_
- 	int color_format = 0;
- 	u8 val;
- 
--	if (hdmi->hdmi_data.enc_in_format == RGB) {
--		if (hdmi->hdmi_data.enc_color_depth == 8)
--			color_format = 0x01;
--		else if (hdmi->hdmi_data.enc_color_depth == 10)
--			color_format = 0x03;
--		else if (hdmi->hdmi_data.enc_color_depth == 12)
--			color_format = 0x05;
--		else if (hdmi->hdmi_data.enc_color_depth == 16)
--			color_format = 0x07;
--		else
--			return;
--	} else if (hdmi->hdmi_data.enc_in_format == YCBCR444) {
--		if (hdmi->hdmi_data.enc_color_depth == 8)
--			color_format = 0x09;
--		else if (hdmi->hdmi_data.enc_color_depth == 10)
--			color_format = 0x0B;
--		else if (hdmi->hdmi_data.enc_color_depth == 12)
--			color_format = 0x0D;
--		else if (hdmi->hdmi_data.enc_color_depth == 16)
--			color_format = 0x0F;
--		else
--			return;
--	} else if (hdmi->hdmi_data.enc_in_format == YCBCR422_8BITS) {
--		if (hdmi->hdmi_data.enc_color_depth == 8)
--			color_format = 0x16;
--		else if (hdmi->hdmi_data.enc_color_depth == 10)
--			color_format = 0x14;
--		else if (hdmi->hdmi_data.enc_color_depth == 12)
--			color_format = 0x12;
--		else
--			return;
-+	switch (hdmi->hdmi_data.enc_in_bus_format) {
-+	case MEDIA_BUS_FMT_RGB888_1X24:
-+		color_format = 0x01;
-+		break;
-+	case MEDIA_BUS_FMT_RGB101010_1X30:
-+		color_format = 0x03;
-+		break;
-+	case MEDIA_BUS_FMT_RGB121212_1X36:
-+		color_format = 0x05;
-+		break;
-+	case MEDIA_BUS_FMT_RGB161616_1X48:
-+		color_format = 0x07;
-+		break;
-+
-+	case MEDIA_BUS_FMT_YUV8_1X24:
-+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
-+		color_format = 0x09;
-+		break;
-+	case MEDIA_BUS_FMT_YUV10_1X30:
-+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
-+		color_format = 0x0B;
-+		break;
-+	case MEDIA_BUS_FMT_YUV12_1X36:
-+	case MEDIA_BUS_FMT_UYYVYY12_0_5X36:
-+		color_format = 0x0D;
-+		break;
-+	case MEDIA_BUS_FMT_YUV16_1X48:
-+	case MEDIA_BUS_FMT_UYYVYY16_0_5X48:
-+		color_format = 0x0F;
-+		break;
-+
-+	case MEDIA_BUS_FMT_UYVY8_1X16:
-+		color_format = 0x16;
-+		break;
-+	case MEDIA_BUS_FMT_UYVY10_1X20:
-+		color_format = 0x14;
-+		break;
-+	case MEDIA_BUS_FMT_UYVY12_1X24:
-+		color_format = 0x12;
-+		break;
-+
-+	default:
-+		return;
- 	}
- 
- 	val = HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE |
-@@ -632,26 +727,30 @@ static void hdmi_video_sample(struct dw_
- 
- static int is_color_space_conversion(struct dw_hdmi *hdmi)
- {
--	return hdmi->hdmi_data.enc_in_format != hdmi->hdmi_data.enc_out_format;
-+	return hdmi->hdmi_data.enc_in_bus_format != hdmi->hdmi_data.enc_out_bus_format;
- }
- 
- static int is_color_space_decimation(struct dw_hdmi *hdmi)
- {
--	if (hdmi->hdmi_data.enc_out_format != YCBCR422_8BITS)
-+	if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
- 		return 0;
--	if (hdmi->hdmi_data.enc_in_format == RGB ||
--	    hdmi->hdmi_data.enc_in_format == YCBCR444)
-+
-+	if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) ||
-+	    hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_in_bus_format))
- 		return 1;
-+
- 	return 0;
- }
- 
- static int is_color_space_interpolation(struct dw_hdmi *hdmi)
- {
--	if (hdmi->hdmi_data.enc_in_format != YCBCR422_8BITS)
-+	if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_in_bus_format))
- 		return 0;
--	if (hdmi->hdmi_data.enc_out_format == RGB ||
--	    hdmi->hdmi_data.enc_out_format == YCBCR444)
-+
-+	if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) ||
-+	    hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format))
- 		return 1;
-+
- 	return 0;
- }
- 
-@@ -662,15 +761,16 @@ static void dw_hdmi_update_csc_coeffs(st
- 	u32 csc_scale = 1;
- 
- 	if (is_color_space_conversion(hdmi)) {
--		if (hdmi->hdmi_data.enc_out_format == RGB) {
--			if (hdmi->hdmi_data.colorimetry ==
--					HDMI_COLORIMETRY_ITU_601)
-+		if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) {
-+			if (hdmi->hdmi_data.enc_out_encoding ==
-+						V4L2_YCBCR_ENC_601)
- 				csc_coeff = &csc_coeff_rgb_out_eitu601;
- 			else
- 				csc_coeff = &csc_coeff_rgb_out_eitu709;
--		} else if (hdmi->hdmi_data.enc_in_format == RGB) {
--			if (hdmi->hdmi_data.colorimetry ==
--					HDMI_COLORIMETRY_ITU_601)
-+		} else if (hdmi_bus_fmt_is_rgb(
-+					hdmi->hdmi_data.enc_in_bus_format)) {
-+			if (hdmi->hdmi_data.enc_out_encoding ==
-+						V4L2_YCBCR_ENC_601)
- 				csc_coeff = &csc_coeff_rgb_in_eitu601;
- 			else
- 				csc_coeff = &csc_coeff_rgb_in_eitu709;
-@@ -708,16 +808,23 @@ static void hdmi_video_csc(struct dw_hdm
- 	else if (is_color_space_decimation(hdmi))
- 		decimation = HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3;
- 
--	if (hdmi->hdmi_data.enc_color_depth == 8)
-+	switch (hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format)) {
-+	case 8:
- 		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP;
--	else if (hdmi->hdmi_data.enc_color_depth == 10)
-+		break;
-+	case 10:
- 		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP;
--	else if (hdmi->hdmi_data.enc_color_depth == 12)
-+		break;
-+	case 12:
- 		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP;
--	else if (hdmi->hdmi_data.enc_color_depth == 16)
-+		break;
-+	case 16:
- 		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP;
--	else
-+		break;
-+
-+	default:
- 		return;
-+	}
- 
- 	/* Configure the CSC registers */
- 	hdmi_writeb(hdmi, interpolation | decimation, HDMI_CSC_CFG);
-@@ -740,32 +847,43 @@ static void hdmi_video_packetize(struct
- 	struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data;
- 	u8 val, vp_conf;
- 
--	if (hdmi_data->enc_out_format == RGB ||
--	    hdmi_data->enc_out_format == YCBCR444) {
--		if (!hdmi_data->enc_color_depth) {
--			output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS;
--		} else if (hdmi_data->enc_color_depth == 8) {
-+	if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) ||
-+	    hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format)) {
-+		switch (hdmi_bus_fmt_color_depth(
-+					hdmi->hdmi_data.enc_out_bus_format)) {
-+		case 8:
- 			color_depth = 4;
- 			output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS;
--		} else if (hdmi_data->enc_color_depth == 10) {
-+			break;
-+		case 10:
- 			color_depth = 5;
--		} else if (hdmi_data->enc_color_depth == 12) {
-+			break;
-+		case 12:
- 			color_depth = 6;
--		} else if (hdmi_data->enc_color_depth == 16) {
-+			break;
-+		case 16:
- 			color_depth = 7;
--		} else {
--			return;
-+			break;
-+		default:
-+			output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS;
- 		}
--	} else if (hdmi_data->enc_out_format == YCBCR422_8BITS) {
--		if (!hdmi_data->enc_color_depth ||
--		    hdmi_data->enc_color_depth == 8)
-+	} else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) {
-+		switch (hdmi_bus_fmt_color_depth(
-+					hdmi->hdmi_data.enc_out_bus_format)) {
-+		case 0:
-+		case 8:
- 			remap_size = HDMI_VP_REMAP_YCC422_16bit;
--		else if (hdmi_data->enc_color_depth == 10)
-+			break;
-+		case 10:
- 			remap_size = HDMI_VP_REMAP_YCC422_20bit;
--		else if (hdmi_data->enc_color_depth == 12)
-+			break;
-+		case 12:
- 			remap_size = HDMI_VP_REMAP_YCC422_24bit;
--		else
-+			break;
-+
-+		default:
- 			return;
-+		}
- 		output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422;
- 	} else {
- 		return;
-@@ -1148,28 +1266,35 @@ static void hdmi_config_AVI(struct dw_hd
- 	/* Initialise info frame from DRM mode */
- 	drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
- 
--	if (hdmi->hdmi_data.enc_out_format == YCBCR444)
-+	if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format))
- 		frame.colorspace = HDMI_COLORSPACE_YUV444;
--	else if (hdmi->hdmi_data.enc_out_format == YCBCR422_8BITS)
-+	else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
- 		frame.colorspace = HDMI_COLORSPACE_YUV422;
- 	else
- 		frame.colorspace = HDMI_COLORSPACE_RGB;
- 
- 	/* Set up colorimetry */
--	if (hdmi->hdmi_data.enc_out_format == XVYCC444) {
--		frame.colorimetry = HDMI_COLORIMETRY_EXTENDED;
--		if (hdmi->hdmi_data.colorimetry == HDMI_COLORIMETRY_ITU_601)
--			frame.extended_colorimetry =
-+	switch (hdmi->hdmi_data.enc_out_encoding) {
-+	case V4L2_YCBCR_ENC_601:
-+		if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV601)
-+			frame.colorimetry = HDMI_COLORIMETRY_EXTENDED;
-+		else
-+			frame.colorimetry = HDMI_COLORIMETRY_ITU_601;
-+		frame.extended_colorimetry =
- 				HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
--		else /*hdmi->hdmi_data.colorimetry == HDMI_COLORIMETRY_ITU_709*/
--			frame.extended_colorimetry =
-+	case V4L2_YCBCR_ENC_709:
-+		if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV709)
-+			frame.colorimetry = HDMI_COLORIMETRY_EXTENDED;
-+		else
-+			frame.colorimetry = HDMI_COLORIMETRY_ITU_709;
-+		frame.extended_colorimetry =
- 				HDMI_EXTENDED_COLORIMETRY_XV_YCC_709;
--	} else if (hdmi->hdmi_data.enc_out_format != RGB) {
--		frame.colorimetry = hdmi->hdmi_data.colorimetry;
--		frame.extended_colorimetry = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
--	} else { /* Carries no data */
--		frame.colorimetry = HDMI_COLORIMETRY_NONE;
--		frame.extended_colorimetry = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
-+		break;
-+	default: /* Carries no data */
-+		frame.colorimetry = HDMI_COLORIMETRY_ITU_601;
-+		frame.extended_colorimetry =
-+				HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
-+		break;
- 	}
- 
- 	frame.scan_mode = HDMI_SCAN_MODE_NONE;
-@@ -1498,19 +1623,30 @@ static int dw_hdmi_setup(struct dw_hdmi
- 	    (hdmi->vic == 21) || (hdmi->vic == 22) ||
- 	    (hdmi->vic == 2) || (hdmi->vic == 3) ||
- 	    (hdmi->vic == 17) || (hdmi->vic == 18))
--		hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_601;
-+		hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_601;
- 	else
--		hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_709;
-+		hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_709;
- 
- 	hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 0;
- 	hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0;
- 
--	/* TODO: Get input format from IPU (via FB driver interface) */
--	hdmi->hdmi_data.enc_in_format = RGB;
-+	/* TOFIX: Get input format from plat data or fallback to RGB888 */
-+	if (hdmi->plat_data->input_bus_format >= 0)
-+		hdmi->hdmi_data.enc_in_bus_format =
-+			hdmi->plat_data->input_bus_format;
-+	else
-+		hdmi->hdmi_data.enc_in_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
-+
-+	/* TOFIX: Get input encoding from plat data or fallback to none */
-+	if (hdmi->plat_data->input_bus_encoding >= 0)
-+		hdmi->hdmi_data.enc_in_encoding =
-+			hdmi->plat_data->input_bus_encoding;
-+	else
-+		hdmi->hdmi_data.enc_in_encoding = V4L2_YCBCR_ENC_DEFAULT;
- 
--	hdmi->hdmi_data.enc_out_format = RGB;
-+	/* TOFIX: Default to RGB888 output format */
-+	hdmi->hdmi_data.enc_out_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
- 
--	hdmi->hdmi_data.enc_color_depth = 8;
- 	hdmi->hdmi_data.pix_repet_factor = 0;
- 	hdmi->hdmi_data.hdcp_enable = 0;
- 	hdmi->hdmi_data.video_mode.mdataenablepolarity = true;
---- a/include/drm/bridge/dw_hdmi.h
-+++ b/include/drm/bridge/dw_hdmi.h
-@@ -14,6 +14,67 @@
- 
- struct dw_hdmi;
- 
-+/**
-+ * DOC: Supported input formats and encodings
-+ *
-+ * Depending on the Hardware configuration of the Controller IP, it supports
-+ * a subset of the following input formats and encodings on its internal
-+ * 48bit bus.
-+ *
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + Format Name          + Format Code                      + Encodings                    +
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + RGB 4:4:4 8bit       + ``MEDIA_BUS_FMT_RGB888_1X24``    + ``V4L2_YCBCR_ENC_DEFAULT``   +
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + RGB 4:4:4 10bits     + ``MEDIA_BUS_FMT_RGB101010_1X30`` + ``V4L2_YCBCR_ENC_DEFAULT``   +
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + RGB 4:4:4 12bits     + ``MEDIA_BUS_FMT_RGB121212_1X36`` + ``V4L2_YCBCR_ENC_DEFAULT``   +
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + RGB 4:4:4 16bits     + ``MEDIA_BUS_FMT_RGB161616_1X48`` + ``V4L2_YCBCR_ENC_DEFAULT``   +
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + YCbCr 4:4:4 8bit     + ``MEDIA_BUS_FMT_YUV8_1X24``      + ``V4L2_YCBCR_ENC_601``       +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV601``  +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV709``  +
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + YCbCr 4:4:4 10bits   + ``MEDIA_BUS_FMT_YUV10_1X30``     + ``V4L2_YCBCR_ENC_601``       +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV601``  +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV709``  +
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + YCbCr 4:4:4 12bits   + ``MEDIA_BUS_FMT_YUV12_1X36``     + ``V4L2_YCBCR_ENC_601``       +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV601``  +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV709``  +
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + YCbCr 4:4:4 16bits   + ``MEDIA_BUS_FMT_YUV16_1X48``     + ``V4L2_YCBCR_ENC_601``       +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV601``  +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV709``  +
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + YCbCr 4:2:2 8bit     + ``MEDIA_BUS_FMT_UYVY8_1X16``     + ``V4L2_YCBCR_ENC_601``       +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + YCbCr 4:2:2 10bits   + ``MEDIA_BUS_FMT_UYVY10_1X20``    + ``V4L2_YCBCR_ENC_601``       +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + YCbCr 4:2:2 12bits   + ``MEDIA_BUS_FMT_UYVY12_1X24``    + ``V4L2_YCBCR_ENC_601``       +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + YCbCr 4:2:0 8bit     + ``MEDIA_BUS_FMT_UYYVYY8_0_5X24`` + ``V4L2_YCBCR_ENC_601``       +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + YCbCr 4:2:0 10bits   + ``MEDIA_BUS_FMT_UYYVYY10_0_5X30``+ ``V4L2_YCBCR_ENC_601``       +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + YCbCr 4:2:0 12bits   + ``MEDIA_BUS_FMT_UYYVYY12_0_5X36``+ ``V4L2_YCBCR_ENC_601``       +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
-+ * +----------------------+----------------------------------+------------------------------+
-+ * + YCbCr 4:2:0 16bits   + ``MEDIA_BUS_FMT_UYYVYY16_0_5X48``+ ``V4L2_YCBCR_ENC_601``       +
-+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
-+ * +----------------------+----------------------------------+------------------------------+
-+ */
-+
- enum {
- 	DW_HDMI_RES_8,
- 	DW_HDMI_RES_10,
-@@ -62,6 +123,8 @@ struct dw_hdmi_plat_data {
- 	struct regmap *regm;
- 	enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
- 					   struct drm_display_mode *mode);
-+	unsigned long input_bus_format;
-+	unsigned long input_bus_encoding;
- 
- 	/* Vendor PHY support */
- 	const struct dw_hdmi_phy_ops *phy_ops;
diff --git a/patches.renesas/0242-ARM-dts-alt-use-demuxer-for-I2C4.patch b/patches.renesas/0242-ARM-dts-alt-use-demuxer-for-I2C4.patch
deleted file mode 100644
index a65f66e1d12307..00000000000000
--- a/patches.renesas/0242-ARM-dts-alt-use-demuxer-for-I2C4.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From dab26e7f63c8b10bdb954818849e488c8ace4665 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Sun, 6 Nov 2016 21:20:30 +0100
-Subject: [PATCH 242/299] ARM: dts: alt: use demuxer for I2C4
-
-Make it possible to fallback to GPIO for I2C4 on the EXIO-B connector.
-
-This is based on reference work for the I2C0 core of the lager/r8a7790
-by Wolfram Sang.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-[wsa: rebased and fixed aliases]
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-
-(cherry picked from commit e60a19f03cdb5a16fdad72d0776a1ede10fd2a57)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794-alt.dts |   35 +++++++++++++++++++++++++++++++++++
- 1 file changed, 35 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7794-alt.dts
-+++ b/arch/arm/boot/dts/r8a7794-alt.dts
-@@ -18,6 +18,8 @@
- 
- 	aliases {
- 		serial0 = &scif2;
-+		i2c10 = &gpioi2c4;
-+		i2c12 = &i2cexio4;
- 	};
- 
- 	chosen {
-@@ -135,6 +137,29 @@
- 		#clock-cells = <0>;
- 		clock-frequency = <148500000>;
- 	};
-+
-+	gpioi2c4: i2c-10 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "i2c-gpio";
-+		status = "disabled";
-+		gpios = <&gpio4 9 GPIO_ACTIVE_HIGH /* sda */
-+			 &gpio4 8 GPIO_ACTIVE_HIGH /* scl */
-+			>;
-+		i2c-gpio,delay-us = <5>;
-+	};
-+
-+	/*
-+	 * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
-+	 * A fallback to GPIO is provided.
-+	 */
-+	i2cexio4: i2c-14 {
-+		compatible = "i2c-demux-pinctrl";
-+		i2c-parent = <&i2c4>, <&gpioi2c4>;
-+		i2c-bus-name = "i2c-exio4";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+	};
- };
- 
- &du {
-@@ -194,6 +219,11 @@
- 		function = "i2c1";
- 	};
- 
-+	i2c4_pins: i2c4 {
-+		groups = "i2c4";
-+		function = "i2c4";
-+	};
-+
- 	vin0_pins: vin0 {
- 		groups = "vin0_data8", "vin0_clk";
- 		function = "vin0";
-@@ -314,6 +344,11 @@
- 	};
- };
- 
-+&i2c4 {
-+	pinctrl-0 = <&i2c4_pins>;
-+	pinctrl-names = "i2c-exio4";
-+};
-+
- &vin0 {
- 	status = "okay";
- 	pinctrl-0 = <&vin0_pins>;
diff --git a/patches.renesas/0242-drm-bridge-dw-hdmi-Move-HPD-handling-to-PHY-operatio.patch b/patches.renesas/0242-drm-bridge-dw-hdmi-Move-HPD-handling-to-PHY-operatio.patch
deleted file mode 100644
index b405d2bd9a4bad..00000000000000
--- a/patches.renesas/0242-drm-bridge-dw-hdmi-Move-HPD-handling-to-PHY-operatio.patch
+++ /dev/null
@@ -1,224 +0,0 @@
-From 5dbc8b8c1806051cdf79dc75c6bb44f53c3076f0 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Tue, 4 Apr 2017 14:31:59 +0200
-Subject: [PATCH 242/286] drm: bridge: dw-hdmi: Move HPD handling to PHY
- operations
-
-The HDMI TX controller support HPD and RXSENSE signaling from the PHY
-via it's STAT0 PHY interface, but some vendor PHYs can manage these
-signals independently from the controller, thus these STAT0 handling
-should be moved to PHY specific operations and become optional.
-
-The existing STAT0 HPD and RXSENSE handling code is refactored into
-a supplementaty set of default PHY operations that are used automatically
-when the platform glue doesn't provide its own operations.
-
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Reviewed-by: Archit Taneja <architt@codeaurora.org>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
-Link: http://patchwork.freedesktop.org/patch/msgid/1491309119-24220-2-git-send-email-narmstrong@baylibre.com
-(cherry picked from commit 386d3299ef7298a3bc57e2ff3498ce41ac7f6184)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/synopsys/dw-hdmi.c |  135 ++++++++++++++++++------------
- include/drm/bridge/dw_hdmi.h              |    5 +
- 2 files changed, 86 insertions(+), 54 deletions(-)
-
---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-@@ -1229,10 +1229,46 @@ static enum drm_connector_status dw_hdmi
- 		connector_status_connected : connector_status_disconnected;
- }
- 
-+static void dw_hdmi_phy_update_hpd(struct dw_hdmi *hdmi, void *data,
-+				   bool force, bool disabled, bool rxsense)
-+{
-+	u8 old_mask = hdmi->phy_mask;
-+
-+	if (force || disabled || !rxsense)
-+		hdmi->phy_mask |= HDMI_PHY_RX_SENSE;
-+	else
-+		hdmi->phy_mask &= ~HDMI_PHY_RX_SENSE;
-+
-+	if (old_mask != hdmi->phy_mask)
-+		hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
-+}
-+
-+static void dw_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data)
-+{
-+	/*
-+	 * Configure the PHY RX SENSE and HPD interrupts polarities and clear
-+	 * any pending interrupt.
-+	 */
-+	hdmi_writeb(hdmi, HDMI_PHY_HPD | HDMI_PHY_RX_SENSE, HDMI_PHY_POL0);
-+	hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
-+		    HDMI_IH_PHY_STAT0);
-+
-+	/* Enable cable hot plug irq. */
-+	hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
-+
-+	/* Clear and unmute interrupts. */
-+	hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
-+		    HDMI_IH_PHY_STAT0);
-+	hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE),
-+		    HDMI_IH_MUTE_PHY_STAT0);
-+}
-+
- static const struct dw_hdmi_phy_ops dw_hdmi_synopsys_phy_ops = {
- 	.init = dw_hdmi_phy_init,
- 	.disable = dw_hdmi_phy_disable,
- 	.read_hpd = dw_hdmi_phy_read_hpd,
-+	.update_hpd = dw_hdmi_phy_update_hpd,
-+	.setup_hpd = dw_hdmi_phy_setup_hpd,
- };
- 
- /* -----------------------------------------------------------------------------
-@@ -1808,35 +1844,10 @@ static void dw_hdmi_update_power(struct
-  */
- static void dw_hdmi_update_phy_mask(struct dw_hdmi *hdmi)
- {
--	u8 old_mask = hdmi->phy_mask;
--
--	if (hdmi->force || hdmi->disabled || !hdmi->rxsense)
--		hdmi->phy_mask |= HDMI_PHY_RX_SENSE;
--	else
--		hdmi->phy_mask &= ~HDMI_PHY_RX_SENSE;
--
--	if (old_mask != hdmi->phy_mask)
--		hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
--}
--
--static void dw_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi)
--{
--	/*
--	 * Configure the PHY RX SENSE and HPD interrupts polarities and clear
--	 * any pending interrupt.
--	 */
--	hdmi_writeb(hdmi, HDMI_PHY_HPD | HDMI_PHY_RX_SENSE, HDMI_PHY_POL0);
--	hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
--		    HDMI_IH_PHY_STAT0);
--
--	/* Enable cable hot plug irq. */
--	hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
--
--	/* Clear and unmute interrupts. */
--	hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
--		    HDMI_IH_PHY_STAT0);
--	hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE),
--		    HDMI_IH_MUTE_PHY_STAT0);
-+	if (hdmi->phy.ops->update_hpd)
-+		hdmi->phy.ops->update_hpd(hdmi, hdmi->phy.data,
-+					  hdmi->force, hdmi->disabled,
-+					  hdmi->rxsense);
- }
- 
- static enum drm_connector_status
-@@ -2028,6 +2039,41 @@ static irqreturn_t dw_hdmi_hardirq(int i
- 	return ret;
- }
- 
-+void __dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense)
-+{
-+	mutex_lock(&hdmi->mutex);
-+
-+	if (!hdmi->force) {
-+		/*
-+		 * If the RX sense status indicates we're disconnected,
-+		 * clear the software rxsense status.
-+		 */
-+		if (!rx_sense)
-+			hdmi->rxsense = false;
-+
-+		/*
-+		 * Only set the software rxsense status when both
-+		 * rxsense and hpd indicates we're connected.
-+		 * This avoids what seems to be bad behaviour in
-+		 * at least iMX6S versions of the phy.
-+		 */
-+		if (hpd)
-+			hdmi->rxsense = true;
-+
-+		dw_hdmi_update_power(hdmi);
-+		dw_hdmi_update_phy_mask(hdmi);
-+	}
-+	mutex_unlock(&hdmi->mutex);
-+}
-+
-+void dw_hdmi_setup_rx_sense(struct device *dev, bool hpd, bool rx_sense)
-+{
-+	struct dw_hdmi *hdmi = dev_get_drvdata(dev);
-+
-+	__dw_hdmi_setup_rx_sense(hdmi, hpd, rx_sense);
-+}
-+EXPORT_SYMBOL_GPL(dw_hdmi_setup_rx_sense);
-+
- static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
- {
- 	struct dw_hdmi *hdmi = dev_id;
-@@ -2060,30 +2106,10 @@ static irqreturn_t dw_hdmi_irq(int irq,
- 	 * ask the source to re-read the EDID.
- 	 */
- 	if (intr_stat &
--	    (HDMI_IH_PHY_STAT0_RX_SENSE | HDMI_IH_PHY_STAT0_HPD)) {
--		mutex_lock(&hdmi->mutex);
--		if (!hdmi->force) {
--			/*
--			 * If the RX sense status indicates we're disconnected,
--			 * clear the software rxsense status.
--			 */
--			if (!(phy_stat & HDMI_PHY_RX_SENSE))
--				hdmi->rxsense = false;
--
--			/*
--			 * Only set the software rxsense status when both
--			 * rxsense and hpd indicates we're connected.
--			 * This avoids what seems to be bad behaviour in
--			 * at least iMX6S versions of the phy.
--			 */
--			if (phy_stat & HDMI_PHY_HPD)
--				hdmi->rxsense = true;
--
--			dw_hdmi_update_power(hdmi);
--			dw_hdmi_update_phy_mask(hdmi);
--		}
--		mutex_unlock(&hdmi->mutex);
--	}
-+	    (HDMI_IH_PHY_STAT0_RX_SENSE | HDMI_IH_PHY_STAT0_HPD))
-+		__dw_hdmi_setup_rx_sense(hdmi,
-+					 phy_stat & HDMI_PHY_HPD,
-+					 phy_stat & HDMI_PHY_RX_SENSE);
- 
- 	if (intr_stat & HDMI_IH_PHY_STAT0_HPD) {
- 		dev_dbg(hdmi->dev, "EVENT=%s\n",
-@@ -2357,7 +2383,8 @@ __dw_hdmi_probe(struct platform_device *
- #endif
- 
- 	dw_hdmi_setup_i2c(hdmi);
--	dw_hdmi_phy_setup_hpd(hdmi);
-+	if (hdmi->phy.ops->setup_hpd)
-+		hdmi->phy.ops->setup_hpd(hdmi, hdmi->phy.data);
- 
- 	memset(&pdevinfo, 0, sizeof(pdevinfo));
- 	pdevinfo.parent = dev;
---- a/include/drm/bridge/dw_hdmi.h
-+++ b/include/drm/bridge/dw_hdmi.h
-@@ -117,6 +117,9 @@ struct dw_hdmi_phy_ops {
- 		    struct drm_display_mode *mode);
- 	void (*disable)(struct dw_hdmi *hdmi, void *data);
- 	enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi, void *data);
-+	void (*update_hpd)(struct dw_hdmi *hdmi, void *data,
-+			   bool force, bool disabled, bool rxsense);
-+	void (*setup_hpd)(struct dw_hdmi *hdmi, void *data);
- };
- 
- struct dw_hdmi_plat_data {
-@@ -147,6 +150,8 @@ void dw_hdmi_unbind(struct device *dev);
- int dw_hdmi_bind(struct platform_device *pdev, struct drm_encoder *encoder,
- 		 const struct dw_hdmi_plat_data *plat_data);
- 
-+void dw_hdmi_setup_rx_sense(struct device *dev, bool hpd, bool rx_sense);
-+
- void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate);
- void dw_hdmi_audio_enable(struct dw_hdmi *hdmi);
- void dw_hdmi_audio_disable(struct dw_hdmi *hdmi);
diff --git a/patches.renesas/0242-drm-bridge-dw-hdmi-Move-IRQ-and-IO-resource-allocati.patch b/patches.renesas/0242-drm-bridge-dw-hdmi-Move-IRQ-and-IO-resource-allocati.patch
deleted file mode 100644
index 288467401ed0de..00000000000000
--- a/patches.renesas/0242-drm-bridge-dw-hdmi-Move-IRQ-and-IO-resource-allocati.patch
+++ /dev/null
@@ -1,158 +0,0 @@
-From c46f98a980f5aad6b8f99c4e7ab4e3e24ead1939 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:28:57 +0200
-Subject: [PATCH 242/255] drm: bridge: dw-hdmi: Move IRQ and IO resource
- allocation to common code
-
-There's no need to duplicate identical code in multiple drivers (two at
-the moment, one more to come soon). Move it to the dw-hdmi core where it
-can be shared. If resource allocation ever becomes device-specific later
-we'll always have the option of splitting it out again.
-
-While it at pass the platform device to the bind function to avoid
-having to cast struct device to struct platform_device.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-8-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit c608119dfdde9710e4bd068d632beb68bb3517db)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c            |   13 ++++++++++---
- drivers/gpu/drm/imx/dw_hdmi-imx.c           |   12 +-----------
- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c |   12 +-----------
- include/drm/bridge/dw_hdmi.h                |    3 +--
- 4 files changed, 13 insertions(+), 27 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -1843,14 +1843,16 @@ static int dw_hdmi_register(struct drm_e
- 	return 0;
- }
- 
--int dw_hdmi_bind(struct device *dev, struct drm_encoder *encoder,
--		 struct resource *iores, int irq,
-+int dw_hdmi_bind(struct platform_device *pdev, struct drm_encoder *encoder,
- 		 const struct dw_hdmi_plat_data *plat_data)
- {
-+	struct device *dev = &pdev->dev;
- 	struct device_node *np = dev->of_node;
- 	struct platform_device_info pdevinfo;
- 	struct device_node *ddc_node;
- 	struct dw_hdmi *hdmi;
-+	struct resource *iores;
-+	int irq;
- 	int ret;
- 	u32 val = 1;
- 	u8 config0;
-@@ -1903,6 +1905,7 @@ int dw_hdmi_bind(struct device *dev, str
- 		dev_dbg(hdmi->dev, "no ddc property found\n");
- 	}
- 
-+	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	hdmi->regs = devm_ioremap_resource(dev, iores);
- 	if (IS_ERR(hdmi->regs)) {
- 		ret = PTR_ERR(hdmi->regs);
-@@ -1945,6 +1948,10 @@ int dw_hdmi_bind(struct device *dev, str
- 
- 	initialize_hdmi_ih_mutes(hdmi);
- 
-+	irq = platform_get_irq(pdev, 0);
-+	if (irq < 0)
-+		goto err_iahb;
-+
- 	ret = devm_request_threaded_irq(dev, irq, dw_hdmi_hardirq,
- 					dw_hdmi_irq, IRQF_SHARED,
- 					dev_name(dev), hdmi);
-@@ -2025,7 +2032,7 @@ int dw_hdmi_bind(struct device *dev, str
- 	if (hdmi->i2c)
- 		dw_hdmi_i2c_init(hdmi);
- 
--	dev_set_drvdata(dev, hdmi);
-+	platform_set_drvdata(pdev, hdmi);
- 
- 	return 0;
- 
---- a/drivers/gpu/drm/imx/dw_hdmi-imx.c
-+++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c
-@@ -207,8 +207,6 @@ static int dw_hdmi_imx_bind(struct devic
- 	struct drm_device *drm = data;
- 	struct drm_encoder *encoder;
- 	struct imx_hdmi *hdmi;
--	struct resource *iores;
--	int irq;
- 	int ret;
- 
- 	if (!pdev->dev.of_node)
-@@ -223,14 +221,6 @@ static int dw_hdmi_imx_bind(struct devic
- 	hdmi->dev = &pdev->dev;
- 	encoder = &hdmi->encoder;
- 
--	irq = platform_get_irq(pdev, 0);
--	if (irq < 0)
--		return irq;
--
--	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!iores)
--		return -ENXIO;
--
- 	encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
- 	/*
- 	 * If we failed to find the CRTC(s) which this encoder is
-@@ -249,7 +239,7 @@ static int dw_hdmi_imx_bind(struct devic
- 	drm_encoder_init(drm, encoder, &dw_hdmi_imx_encoder_funcs,
- 			 DRM_MODE_ENCODER_TMDS, NULL);
- 
--	ret = dw_hdmi_bind(dev, encoder, iores, irq, plat_data);
-+	ret = dw_hdmi_bind(pdev, encoder, plat_data);
- 
- 	/*
- 	 * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(),
---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-@@ -257,8 +257,6 @@ static int dw_hdmi_rockchip_bind(struct
- 	struct drm_device *drm = data;
- 	struct drm_encoder *encoder;
- 	struct rockchip_hdmi *hdmi;
--	struct resource *iores;
--	int irq;
- 	int ret;
- 
- 	if (!pdev->dev.of_node)
-@@ -273,14 +271,6 @@ static int dw_hdmi_rockchip_bind(struct
- 	hdmi->dev = &pdev->dev;
- 	encoder = &hdmi->encoder;
- 
--	irq = platform_get_irq(pdev, 0);
--	if (irq < 0)
--		return irq;
--
--	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!iores)
--		return -ENXIO;
--
- 	encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
- 	/*
- 	 * If we failed to find the CRTC(s) which this encoder is
-@@ -301,7 +291,7 @@ static int dw_hdmi_rockchip_bind(struct
- 	drm_encoder_init(drm, encoder, &dw_hdmi_rockchip_encoder_funcs,
- 			 DRM_MODE_ENCODER_TMDS, NULL);
- 
--	ret = dw_hdmi_bind(dev, encoder, iores, irq, plat_data);
-+	ret = dw_hdmi_bind(pdev, encoder, plat_data);
- 
- 	/*
- 	 * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(),
---- a/include/drm/bridge/dw_hdmi.h
-+++ b/include/drm/bridge/dw_hdmi.h
-@@ -57,8 +57,7 @@ struct dw_hdmi_plat_data {
- };
- 
- void dw_hdmi_unbind(struct device *dev);
--int dw_hdmi_bind(struct device *dev, struct drm_encoder *encoder,
--		 struct resource *iores, int irq,
-+int dw_hdmi_bind(struct platform_device *pdev, struct drm_encoder *encoder,
- 		 const struct dw_hdmi_plat_data *plat_data);
- 
- void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate);
diff --git a/patches.renesas/0243-ARM-dts-lager-Enable-UHS-I-SDR-104.patch b/patches.renesas/0243-ARM-dts-lager-Enable-UHS-I-SDR-104.patch
deleted file mode 100644
index 5a15a7d8608f81..00000000000000
--- a/patches.renesas/0243-ARM-dts-lager-Enable-UHS-I-SDR-104.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 5fdbb9ea523b5e9c5849ae67739bee59013271e5 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 3 Nov 2016 16:07:23 +0100
-Subject: [PATCH 243/299] ARM: dts: lager: Enable UHS-I SDR-104
-
-Add the sd-uhs-sdr104 property to SDHI0.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-(cherry picked from commit dcc2fe783d5338125214335b7168623a4b81adbb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790-lager.dts |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/boot/dts/r8a7790-lager.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager.dts
-@@ -608,6 +608,7 @@
- 	vqmmc-supply = <&vccq_sdhi0>;
- 	cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
- 	sd-uhs-sdr50;
-+	sd-uhs-sdr104;
- 	status = "okay";
- };
- 
diff --git a/patches.renesas/0243-drm-bridge-dw-hdmi-Reorder-functions-to-prepare-for-.patch b/patches.renesas/0243-drm-bridge-dw-hdmi-Reorder-functions-to-prepare-for-.patch
deleted file mode 100644
index e029830fbf2d64..00000000000000
--- a/patches.renesas/0243-drm-bridge-dw-hdmi-Reorder-functions-to-prepare-for-.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 8ec211dda8911fe23ee4c7e4f6e86e5021819d76 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:28:58 +0200
-Subject: [PATCH 243/255] drm: bridge: dw-hdmi: Reorder functions to prepare
- for next commit
-
-The next commit will reference structures and functions in a way that
-currently requires forward declarations. Reorder the functions to avoid
-that. No functional change to the code is performed.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-9-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit fd30b38c27c305fcb522bfa7911de241ee1799b5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |   72 +++++++++++++++++++--------------------
- 1 file changed, 36 insertions(+), 36 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -1575,42 +1575,6 @@ static void dw_hdmi_update_phy_mask(stru
- 		hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
- }
- 
--static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge,
--				    struct drm_display_mode *orig_mode,
--				    struct drm_display_mode *mode)
--{
--	struct dw_hdmi *hdmi = bridge->driver_private;
--
--	mutex_lock(&hdmi->mutex);
--
--	/* Store the display mode for plugin/DKMS poweron events */
--	memcpy(&hdmi->previous_mode, mode, sizeof(hdmi->previous_mode));
--
--	mutex_unlock(&hdmi->mutex);
--}
--
--static void dw_hdmi_bridge_disable(struct drm_bridge *bridge)
--{
--	struct dw_hdmi *hdmi = bridge->driver_private;
--
--	mutex_lock(&hdmi->mutex);
--	hdmi->disabled = true;
--	dw_hdmi_update_power(hdmi);
--	dw_hdmi_update_phy_mask(hdmi);
--	mutex_unlock(&hdmi->mutex);
--}
--
--static void dw_hdmi_bridge_enable(struct drm_bridge *bridge)
--{
--	struct dw_hdmi *hdmi = bridge->driver_private;
--
--	mutex_lock(&hdmi->mutex);
--	hdmi->disabled = false;
--	dw_hdmi_update_power(hdmi);
--	dw_hdmi_update_phy_mask(hdmi);
--	mutex_unlock(&hdmi->mutex);
--}
--
- static enum drm_connector_status
- dw_hdmi_connector_detect(struct drm_connector *connector, bool force)
- {
-@@ -1703,6 +1667,42 @@ static const struct drm_connector_helper
- 	.best_encoder = drm_atomic_helper_best_encoder,
- };
- 
-+static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge,
-+				    struct drm_display_mode *orig_mode,
-+				    struct drm_display_mode *mode)
-+{
-+	struct dw_hdmi *hdmi = bridge->driver_private;
-+
-+	mutex_lock(&hdmi->mutex);
-+
-+	/* Store the display mode for plugin/DKMS poweron events */
-+	memcpy(&hdmi->previous_mode, mode, sizeof(hdmi->previous_mode));
-+
-+	mutex_unlock(&hdmi->mutex);
-+}
-+
-+static void dw_hdmi_bridge_disable(struct drm_bridge *bridge)
-+{
-+	struct dw_hdmi *hdmi = bridge->driver_private;
-+
-+	mutex_lock(&hdmi->mutex);
-+	hdmi->disabled = true;
-+	dw_hdmi_update_power(hdmi);
-+	dw_hdmi_update_phy_mask(hdmi);
-+	mutex_unlock(&hdmi->mutex);
-+}
-+
-+static void dw_hdmi_bridge_enable(struct drm_bridge *bridge)
-+{
-+	struct dw_hdmi *hdmi = bridge->driver_private;
-+
-+	mutex_lock(&hdmi->mutex);
-+	hdmi->disabled = false;
-+	dw_hdmi_update_power(hdmi);
-+	dw_hdmi_update_phy_mask(hdmi);
-+	mutex_unlock(&hdmi->mutex);
-+}
-+
- static const struct drm_bridge_funcs dw_hdmi_bridge_funcs = {
- 	.enable = dw_hdmi_bridge_enable,
- 	.disable = dw_hdmi_bridge_disable,
diff --git a/patches.renesas/0243-drm-bridge-dw-hdmi-remove-unused-hdmi_bus_fmt_is_yuv.patch b/patches.renesas/0243-drm-bridge-dw-hdmi-remove-unused-hdmi_bus_fmt_is_yuv.patch
deleted file mode 100644
index 4db30a78b13126..00000000000000
--- a/patches.renesas/0243-drm-bridge-dw-hdmi-remove-unused-hdmi_bus_fmt_is_yuv.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 49a6631e96fc1cb1c6b9f4f35d3a66cba2778977 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Wed, 5 Apr 2017 09:32:59 +0200
-Subject: [PATCH 243/286] drm: bridge: dw-hdmi: remove unused
- hdmi_bus_fmt_is_yuv420
-
-Remove usused yet hdmi_bus_fmt_is_yuv420 function.
-
-Fixes: def23aa7e982 ("drm: bridge: dw-hdmi: Switch to V4L bus format and encodings")
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Link: http://patchwork.freedesktop.org/patch/msgid/1491377579-9353-1-git-send-email-narmstrong@baylibre.com
-(cherry picked from commit 4c67b20c98a1a711cc010bff4927129d82a851c7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/synopsys/dw-hdmi.c |   14 --------------
- 1 file changed, 14 deletions(-)
-
---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-@@ -605,20 +605,6 @@ static bool hdmi_bus_fmt_is_yuv422(unsig
- 	}
- }
- 
--static bool hdmi_bus_fmt_is_yuv420(unsigned int bus_format)
--{
--	switch (bus_format) {
--	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
--	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
--	case MEDIA_BUS_FMT_UYYVYY12_0_5X36:
--	case MEDIA_BUS_FMT_UYYVYY16_0_5X48:
--		return true;
--
--	default:
--		return false;
--	}
--}
--
- static int hdmi_bus_fmt_color_depth(unsigned int bus_format)
- {
- 	switch (bus_format) {
diff --git a/patches.renesas/0244-ARM-dts-koelsch-Enable-UHS-I-SDR-104.patch b/patches.renesas/0244-ARM-dts-koelsch-Enable-UHS-I-SDR-104.patch
deleted file mode 100644
index 2b4cf397d2ceb6..00000000000000
--- a/patches.renesas/0244-ARM-dts-koelsch-Enable-UHS-I-SDR-104.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 6d015cd004f7240f0448874b1b2ccd6f6f202c72 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 3 Nov 2016 16:07:24 +0100
-Subject: [PATCH 244/299] ARM: dts: koelsch: Enable UHS-I SDR-104
-
-And the sd-uhs-sdr104 property to SDHI0.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-(cherry picked from commit 0726729a4c6882086fe0db150a4dd0493f15dea3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791-koelsch.dts |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/boot/dts/r8a7791-koelsch.dts
-+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
-@@ -529,6 +529,7 @@
- 	cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
- 	wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
- 	sd-uhs-sdr50;
-+	sd-uhs-sdr104;
- 	status = "okay";
- };
- 
diff --git a/patches.renesas/0244-drm-bridge-dw-hdmi-Add-a-missing-break-statement.patch b/patches.renesas/0244-drm-bridge-dw-hdmi-Add-a-missing-break-statement.patch
deleted file mode 100644
index aa7a6339729850..00000000000000
--- a/patches.renesas/0244-drm-bridge-dw-hdmi-Add-a-missing-break-statement.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 41f6cd91433fe935741c343b04223b6b6723f62e Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Thu, 6 Apr 2017 08:21:32 +0300
-Subject: [PATCH 244/286] drm: bridge: dw-hdmi: Add a missing break statement
-
-There was supposed to be a break before the next case statement.
-
-Fixes: def23aa7e982 ("drm: bridge: dw-hdmi: Switch to V4L bus format and encodings")
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Acked-by: Neil Armstrong <narmstrong@baylibre.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170406052132.GA26605@mwanda
-(cherry picked from commit f40d6560eba65b2a2b84805d2927fed96978669a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/synopsys/dw-hdmi.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-@@ -1304,6 +1304,7 @@ static void hdmi_config_AVI(struct dw_hd
- 			frame.colorimetry = HDMI_COLORIMETRY_ITU_601;
- 		frame.extended_colorimetry =
- 				HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
-+		break;
- 	case V4L2_YCBCR_ENC_709:
- 		if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV709)
- 			frame.colorimetry = HDMI_COLORIMETRY_EXTENDED;
diff --git a/patches.renesas/0244-drm-bridge-dw-hdmi-Create-connector-in-the-bridge-at.patch b/patches.renesas/0244-drm-bridge-dw-hdmi-Create-connector-in-the-bridge-at.patch
deleted file mode 100644
index 38fadfa52495d7..00000000000000
--- a/patches.renesas/0244-drm-bridge-dw-hdmi-Create-connector-in-the-bridge-at.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From 8ffa1674cc6aace38d9b2df1cdc46e5850454a68 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:28:59 +0200
-Subject: [PATCH 244/255] drm: bridge: dw-hdmi: Create connector in the bridge
- attach operation
-
-The DRM device is not guaranteed by the bridge API to be available
-before the attach callback. The driver performs properly at the moment
-as it doesn't use the drm_bridge_add() registration method. As this will
-be changed later, move connector creation to attach time to ensure
-compatibility with the API.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-10-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit d2ae94ae840bd0b347e417e88b1637df95d499ac)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |   33 ++++++++++++++++++++-------------
- 1 file changed, 20 insertions(+), 13 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -1667,6 +1667,25 @@ static const struct drm_connector_helper
- 	.best_encoder = drm_atomic_helper_best_encoder,
- };
- 
-+static int dw_hdmi_bridge_attach(struct drm_bridge *bridge)
-+{
-+	struct dw_hdmi *hdmi = bridge->driver_private;
-+	struct drm_encoder *encoder = bridge->encoder;
-+	struct drm_connector *connector = &hdmi->connector;
-+
-+	connector->interlace_allowed = 1;
-+	connector->polled = DRM_CONNECTOR_POLL_HPD;
-+
-+	drm_connector_helper_add(connector, &dw_hdmi_connector_helper_funcs);
-+
-+	drm_connector_init(bridge->dev, connector, &dw_hdmi_connector_funcs,
-+			   DRM_MODE_CONNECTOR_HDMIA);
-+
-+	drm_mode_connector_attach_encoder(connector, encoder);
-+
-+	return 0;
-+}
-+
- static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge,
- 				    struct drm_display_mode *orig_mode,
- 				    struct drm_display_mode *mode)
-@@ -1704,6 +1723,7 @@ static void dw_hdmi_bridge_enable(struct
- }
- 
- static const struct drm_bridge_funcs dw_hdmi_bridge_funcs = {
-+	.attach = dw_hdmi_bridge_attach,
- 	.enable = dw_hdmi_bridge_enable,
- 	.disable = dw_hdmi_bridge_disable,
- 	.mode_set = dw_hdmi_bridge_mode_set,
-@@ -1829,17 +1849,6 @@ static int dw_hdmi_register(struct drm_e
- 		return -EINVAL;
- 	}
- 
--	hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD;
--
--	drm_connector_helper_add(&hdmi->connector,
--				 &dw_hdmi_connector_helper_funcs);
--
--	drm_connector_init(encoder->dev, &hdmi->connector,
--			   &dw_hdmi_connector_funcs,
--			   DRM_MODE_CONNECTOR_HDMIA);
--
--	drm_mode_connector_attach_encoder(&hdmi->connector, encoder);
--
- 	return 0;
- }
- 
-@@ -1862,8 +1871,6 @@ int dw_hdmi_bind(struct platform_device
- 	if (!hdmi)
- 		return -ENOMEM;
- 
--	hdmi->connector.interlace_allowed = 1;
--
- 	hdmi->plat_data = plat_data;
- 	hdmi->dev = dev;
- 	hdmi->dev_type = plat_data->dev_type;
diff --git a/patches.renesas/0245-ARM-dts-alt-Enable-UHS-I-SDR-104.patch b/patches.renesas/0245-ARM-dts-alt-Enable-UHS-I-SDR-104.patch
deleted file mode 100644
index fc9cfad4d3500a..00000000000000
--- a/patches.renesas/0245-ARM-dts-alt-Enable-UHS-I-SDR-104.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 86e7f1e9ceee4011e9044e72b076b42463fa2573 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 3 Nov 2016 16:07:25 +0100
-Subject: [PATCH 245/299] ARM: dts: alt: Enable UHS-I SDR-104
-
-And the sd-uhs-sdr104 property to SDHI0.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-(cherry picked from commit f9f2fc0b8d659158cafa95df4ca1d38b1c081d94)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794-alt.dts |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/boot/dts/r8a7794-alt.dts
-+++ b/arch/arm/boot/dts/r8a7794-alt.dts
-@@ -307,6 +307,7 @@
- 	cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
- 	wp-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>;
- 	sd-uhs-sdr50;
-+	sd-uhs-sdr104;
- 	status = "okay";
- };
- 
diff --git a/patches.renesas/0245-drm-bridge-dw-hdmi-Implement-DRM-bridge-registration.patch b/patches.renesas/0245-drm-bridge-dw-hdmi-Implement-DRM-bridge-registration.patch
deleted file mode 100644
index cb5d592f4bdc3f..00000000000000
--- a/patches.renesas/0245-drm-bridge-dw-hdmi-Implement-DRM-bridge-registration.patch
+++ /dev/null
@@ -1,216 +0,0 @@
-From befd34e3c24cd92f7f8bec303a9fda088f692b9a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:29:00 +0200
-Subject: [PATCH 245/255] drm: bridge: dw-hdmi: Implement DRM bridge
- registration
-
-As an option for drivers not based on the component framework, register
-the bridge with the DRM core with the DRM bridge API. Existing drivers
-based on dw_hdmi_bind() and dw_hdmi_unbind() are not affected as those
-functions are preserved with their current behaviour.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-11-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 69497eb9234eb34994b9a0d2f2c17c4c09f2e969)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |  112 +++++++++++++++++++++++++++------------
- include/drm/bridge/dw_hdmi.h     |    3 +
- 2 files changed, 83 insertions(+), 32 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -1836,24 +1836,9 @@ static irqreturn_t dw_hdmi_irq(int irq,
- 	return IRQ_HANDLED;
- }
- 
--static int dw_hdmi_register(struct drm_encoder *encoder, struct dw_hdmi *hdmi)
--{
--	struct drm_bridge *bridge = &hdmi->bridge;
--	int ret;
--
--	bridge->driver_private = hdmi;
--	bridge->funcs = &dw_hdmi_bridge_funcs;
--	ret = drm_bridge_attach(encoder, bridge, NULL);
--	if (ret) {
--		DRM_ERROR("Failed to initialize bridge with drm\n");
--		return -EINVAL;
--	}
--
--	return 0;
--}
--
--int dw_hdmi_bind(struct platform_device *pdev, struct drm_encoder *encoder,
--		 const struct dw_hdmi_plat_data *plat_data)
-+static struct dw_hdmi *
-+__dw_hdmi_probe(struct platform_device *pdev,
-+		const struct dw_hdmi_plat_data *plat_data)
- {
- 	struct device *dev = &pdev->dev;
- 	struct device_node *np = dev->of_node;
-@@ -1869,7 +1854,7 @@ int dw_hdmi_bind(struct platform_device
- 
- 	hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
- 	if (!hdmi)
--		return -ENOMEM;
-+		return ERR_PTR(-ENOMEM);
- 
- 	hdmi->plat_data = plat_data;
- 	hdmi->dev = dev;
-@@ -1896,7 +1881,7 @@ int dw_hdmi_bind(struct platform_device
- 		break;
- 	default:
- 		dev_err(dev, "reg-io-width must be 1 or 4\n");
--		return -EINVAL;
-+		return ERR_PTR(-EINVAL);
- 	}
- 
- 	ddc_node = of_parse_phandle(np, "ddc-i2c-bus", 0);
-@@ -1905,7 +1890,7 @@ int dw_hdmi_bind(struct platform_device
- 		of_node_put(ddc_node);
- 		if (!hdmi->ddc) {
- 			dev_dbg(hdmi->dev, "failed to read ddc node\n");
--			return -EPROBE_DEFER;
-+			return ERR_PTR(-EPROBE_DEFER);
- 		}
- 
- 	} else {
-@@ -1956,8 +1941,10 @@ int dw_hdmi_bind(struct platform_device
- 	initialize_hdmi_ih_mutes(hdmi);
- 
- 	irq = platform_get_irq(pdev, 0);
--	if (irq < 0)
-+	if (irq < 0) {
-+		ret = irq;
- 		goto err_iahb;
-+	}
- 
- 	ret = devm_request_threaded_irq(dev, irq, dw_hdmi_hardirq,
- 					dw_hdmi_irq, IRQF_SHARED,
-@@ -1988,11 +1975,11 @@ int dw_hdmi_bind(struct platform_device
- 	hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
- 		    HDMI_IH_PHY_STAT0);
- 
--	ret = dw_hdmi_fb_registered(hdmi);
--	if (ret)
--		goto err_iahb;
-+	hdmi->bridge.driver_private = hdmi;
-+	hdmi->bridge.funcs = &dw_hdmi_bridge_funcs;
-+	hdmi->bridge.of_node = pdev->dev.of_node;
- 
--	ret = dw_hdmi_register(encoder, hdmi);
-+	ret = dw_hdmi_fb_registered(hdmi);
- 	if (ret)
- 		goto err_iahb;
- 
-@@ -2041,7 +2028,7 @@ int dw_hdmi_bind(struct platform_device
- 
- 	platform_set_drvdata(pdev, hdmi);
- 
--	return 0;
-+	return hdmi;
- 
- err_iahb:
- 	if (hdmi->i2c) {
-@@ -2055,14 +2042,11 @@ err_isfr:
- err_res:
- 	i2c_put_adapter(hdmi->ddc);
- 
--	return ret;
-+	return ERR_PTR(ret);
- }
--EXPORT_SYMBOL_GPL(dw_hdmi_bind);
- 
--void dw_hdmi_unbind(struct device *dev)
-+static void __dw_hdmi_remove(struct dw_hdmi *hdmi)
- {
--	struct dw_hdmi *hdmi = dev_get_drvdata(dev);
--
- 	if (hdmi->audio && !IS_ERR(hdmi->audio))
- 		platform_device_unregister(hdmi->audio);
- 
-@@ -2077,6 +2061,70 @@ void dw_hdmi_unbind(struct device *dev)
- 	else
- 		i2c_put_adapter(hdmi->ddc);
- }
-+
-+/* -----------------------------------------------------------------------------
-+ * Probe/remove API, used from platforms based on the DRM bridge API.
-+ */
-+int dw_hdmi_probe(struct platform_device *pdev,
-+		  const struct dw_hdmi_plat_data *plat_data)
-+{
-+	struct dw_hdmi *hdmi;
-+	int ret;
-+
-+	hdmi = __dw_hdmi_probe(pdev, plat_data);
-+	if (IS_ERR(hdmi))
-+		return PTR_ERR(hdmi);
-+
-+	ret = drm_bridge_add(&hdmi->bridge);
-+	if (ret < 0) {
-+		__dw_hdmi_remove(hdmi);
-+		return ret;
-+	}
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL_GPL(dw_hdmi_probe);
-+
-+void dw_hdmi_remove(struct platform_device *pdev)
-+{
-+	struct dw_hdmi *hdmi = platform_get_drvdata(pdev);
-+
-+	drm_bridge_remove(&hdmi->bridge);
-+
-+	__dw_hdmi_remove(hdmi);
-+}
-+EXPORT_SYMBOL_GPL(dw_hdmi_remove);
-+
-+/* -----------------------------------------------------------------------------
-+ * Bind/unbind API, used from platforms based on the component framework.
-+ */
-+int dw_hdmi_bind(struct platform_device *pdev, struct drm_encoder *encoder,
-+		 const struct dw_hdmi_plat_data *plat_data)
-+{
-+	struct dw_hdmi *hdmi;
-+	int ret;
-+
-+	hdmi = __dw_hdmi_probe(pdev, plat_data);
-+	if (IS_ERR(hdmi))
-+		return PTR_ERR(hdmi);
-+
-+	ret = drm_bridge_attach(encoder, &hdmi->bridge, NULL);
-+	if (ret) {
-+		dw_hdmi_remove(pdev);
-+		DRM_ERROR("Failed to initialize bridge with drm\n");
-+		return ret;
-+	}
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL_GPL(dw_hdmi_bind);
-+
-+void dw_hdmi_unbind(struct device *dev)
-+{
-+	struct dw_hdmi *hdmi = dev_get_drvdata(dev);
-+
-+	__dw_hdmi_remove(hdmi);
-+}
- EXPORT_SYMBOL_GPL(dw_hdmi_unbind);
- 
- MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
---- a/include/drm/bridge/dw_hdmi.h
-+++ b/include/drm/bridge/dw_hdmi.h
-@@ -56,6 +56,9 @@ struct dw_hdmi_plat_data {
- 					   struct drm_display_mode *mode);
- };
- 
-+int dw_hdmi_probe(struct platform_device *pdev,
-+		  const struct dw_hdmi_plat_data *plat_data);
-+void dw_hdmi_remove(struct platform_device *pdev);
- void dw_hdmi_unbind(struct device *dev);
- int dw_hdmi_bind(struct platform_device *pdev, struct drm_encoder *encoder,
- 		 const struct dw_hdmi_plat_data *plat_data);
diff --git a/patches.renesas/0245-drm-bridge-dw-hdmi-fix-input-format-encoding-from-pl.patch b/patches.renesas/0245-drm-bridge-dw-hdmi-fix-input-format-encoding-from-pl.patch
deleted file mode 100644
index b50ca021260531..00000000000000
--- a/patches.renesas/0245-drm-bridge-dw-hdmi-fix-input-format-encoding-from-pl.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From e2d8455e5c53f4d97284693650b87b2942a5b312 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Thu, 6 Apr 2017 11:34:04 +0200
-Subject: [PATCH 245/286] drm: bridge: dw-hdmi: fix input format/encoding from
- plat_data
-
-The plat_data->input_bus_format and plat_data->input_bus_encoding
-are unsigned long and are always >=0, but the value 0 was still
-considered as RGB888 for input_bus_format and default color space
-for input_bus_encoding in the reworked code.
-
-This patch changes the if statement check for a non-zero value to
-either use the default input bus_format and/or bus_encoding for a zero
-value and the provided bus_format and/or bus_encoding for a
-non zero value.
-
-Thanks to Dan Carpenter for his bug report at [1].
-
-Tested on Amlogic P230 (with CSC enabled for YUV444 to RGB) and Rockchip
-RK3288 ACT8846 EVB Board (no CSC involved, direct RGB passthrough).
-
-[1] http://lkml.kernel.org/r/20170406052120.GA26578@mwanda
-
-Cc: Dan Carpenter <dan.carpenter@oracle.com>
-Fixes: def23aa7e982 ("drm: bridge: dw-hdmi: Switch to V4L bus format and encodings")
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
-Reviewed-by: Archit Taneja <architt@codeaurora.org>
-[narmstrong@baylibre.com: reworded commit message and added Fixes tag]
-Link: http://patchwork.freedesktop.org/patch/msgid/1491471244-24989-1-git-send-email-narmstrong@baylibre.com
-
-(cherry picked from commit e20c29aa722a90f3b8092b340362eabe488dbfc4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/synopsys/dw-hdmi.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-@@ -1654,14 +1654,14 @@ static int dw_hdmi_setup(struct dw_hdmi
- 	hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0;
- 
- 	/* TOFIX: Get input format from plat data or fallback to RGB888 */
--	if (hdmi->plat_data->input_bus_format >= 0)
-+	if (hdmi->plat_data->input_bus_format)
- 		hdmi->hdmi_data.enc_in_bus_format =
- 			hdmi->plat_data->input_bus_format;
- 	else
- 		hdmi->hdmi_data.enc_in_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
- 
- 	/* TOFIX: Get input encoding from plat data or fallback to none */
--	if (hdmi->plat_data->input_bus_encoding >= 0)
-+	if (hdmi->plat_data->input_bus_encoding)
- 		hdmi->hdmi_data.enc_in_encoding =
- 			hdmi->plat_data->input_bus_encoding;
- 	else
diff --git a/patches.renesas/0246-ARM-dts-r8a7743-initial-SoC-device-tree.patch b/patches.renesas/0246-ARM-dts-r8a7743-initial-SoC-device-tree.patch
deleted file mode 100644
index c2173853069f14..00000000000000
--- a/patches.renesas/0246-ARM-dts-r8a7743-initial-SoC-device-tree.patch
+++ /dev/null
@@ -1,144 +0,0 @@
-From fc280e62e97c8ce79e9410d4379ae300eac4e0d6 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Mon, 31 Oct 2016 22:54:01 +0300
-Subject: [PATCH 246/299] ARM: dts: r8a7743: initial SoC device tree
-
-The  initial R8A7743 SoC device tree including CPU0, GIC, timer, SYSC, RST,
-CPG, and the required clock descriptions.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 34e8d993a68ae459ad98c27afc07647e439deacc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7743.dtsi |  120 +++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 120 insertions(+)
- create mode 100644 arch/arm/boot/dts/r8a7743.dtsi
-
---- /dev/null
-+++ b/arch/arm/boot/dts/r8a7743.dtsi
-@@ -0,0 +1,120 @@
-+/*
-+ * Device Tree Source for the r8a7743 SoC
-+ *
-+ * Copyright (C) 2016 Cogent Embedded Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2. This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include <dt-bindings/interrupt-controller/irq.h>
-+#include <dt-bindings/interrupt-controller/arm-gic.h>
-+#include <dt-bindings/clock/r8a7743-cpg-mssr.h>
-+#include <dt-bindings/power/r8a7743-sysc.h>
-+
-+/ {
-+	compatible = "renesas,r8a7743";
-+	#address-cells = <2>;
-+	#size-cells = <2>;
-+
-+	cpus {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		cpu0: cpu@0 {
-+			device_type = "cpu";
-+			compatible = "arm,cortex-a15";
-+			reg = <0>;
-+			clock-frequency = <1500000000>;
-+			clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
-+			power-domains = <&sysc R8A7743_PD_CA15_CPU0>;
-+			next-level-cache = <&L2_CA15>;
-+		};
-+
-+		L2_CA15: cache-controller@0 {
-+			compatible = "cache";
-+			reg = <0>;
-+			cache-unified;
-+			cache-level = <2>;
-+			power-domains = <&sysc R8A7743_PD_CA15_SCU>;
-+		};
-+	};
-+
-+	soc {
-+		compatible = "simple-bus";
-+		interrupt-parent = <&gic>;
-+
-+		#address-cells = <2>;
-+		#size-cells = <2>;
-+		ranges;
-+
-+		gic: interrupt-controller@f1001000 {
-+			compatible = "arm,gic-400";
-+			#interrupt-cells = <3>;
-+			#address-cells = <0>;
-+			interrupt-controller;
-+			reg = <0 0xf1001000 0 0x1000>,
-+			      <0 0xf1002000 0 0x1000>,
-+			      <0 0xf1004000 0 0x2000>,
-+			      <0 0xf1006000 0 0x2000>;
-+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
-+						 IRQ_TYPE_LEVEL_HIGH)>;
-+		};
-+
-+		timer {
-+			compatible = "arm,armv7-timer";
-+			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
-+						  IRQ_TYPE_LEVEL_LOW)>,
-+				     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
-+						  IRQ_TYPE_LEVEL_LOW)>,
-+				     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
-+						  IRQ_TYPE_LEVEL_LOW)>,
-+				     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
-+						  IRQ_TYPE_LEVEL_LOW)>;
-+		};
-+
-+		cpg: clock-controller@e6150000 {
-+			compatible = "renesas,r8a7743-cpg-mssr";
-+			reg = <0 0xe6150000 0 0x1000>;
-+			clocks = <&extal_clk>, <&usb_extal_clk>;
-+			clock-names = "extal", "usb_extal";
-+			#clock-cells = <2>;
-+			#power-domain-cells = <0>;
-+		};
-+
-+		sysc: system-controller@e6180000 {
-+			compatible = "renesas,r8a7743-sysc";
-+			reg = <0 0xe6180000 0 0x200>;
-+			#power-domain-cells = <1>;
-+		};
-+
-+		rst: reset-controller@e6160000 {
-+			compatible = "renesas,r8a7743-rst";
-+			reg = <0 0xe6160000 0 0x100>;
-+		};
-+	};
-+
-+	/* External root clock */
-+	extal_clk: extal {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		/* This value must be overridden by the board. */
-+		clock-frequency = <0>;
-+	};
-+
-+	/* External USB clock - can be overridden by the board */
-+	usb_extal_clk: usb_extal {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		clock-frequency = <48000000>;
-+	};
-+
-+	/* External SCIF clock */
-+	scif_clk: scif {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		/* This value must be overridden by the board. */
-+		clock-frequency = <0>;
-+	};
-+};
diff --git a/patches.renesas/0246-drm-bridge-dw-hdmi-Remove-PHY-configuration-resoluti.patch b/patches.renesas/0246-drm-bridge-dw-hdmi-Remove-PHY-configuration-resoluti.patch
deleted file mode 100644
index 173ef600e8cfc2..00000000000000
--- a/patches.renesas/0246-drm-bridge-dw-hdmi-Remove-PHY-configuration-resoluti.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From d8a536dbc82a0b0075abe2b986a617d57cc3eaa2 Mon Sep 17 00:00:00 2001
-From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:29:01 +0200
-Subject: [PATCH 246/255] drm: bridge: dw-hdmi: Remove PHY configuration
- resolution parameter
-
-The current code hard codes the call of hdmi_phy_configure() to be 8bpp
-and provides extraneous error checking to verify that this hardcoded
-value is correct. Simplify the implementation by removing the argument.
-
-Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-12-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 1acc6bdeee1ef2ecac3ba070a403827ab8f16be5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |   27 +++++----------------------
- 1 file changed, 5 insertions(+), 22 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -930,31 +930,14 @@ static void dw_hdmi_phy_sel_interface_co
- 			 HDMI_PHY_CONF0_SELDIPIF_MASK);
- }
- 
--static int hdmi_phy_configure(struct dw_hdmi *hdmi,
--			      unsigned char res, int cscon)
-+static int hdmi_phy_configure(struct dw_hdmi *hdmi, int cscon)
- {
--	unsigned res_idx;
- 	u8 val, msec;
- 	const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
- 	const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
- 	const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
- 	const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
- 
--	switch (res) {
--	case 0:	/* color resolution 0 is 8 bit colour depth */
--	case 8:
--		res_idx = DW_HDMI_RES_8;
--		break;
--	case 10:
--		res_idx = DW_HDMI_RES_10;
--		break;
--	case 12:
--		res_idx = DW_HDMI_RES_12;
--		break;
--	default:
--		return -EINVAL;
--	}
--
- 	/* PLL/MPLL Cfg - always match on final entry */
- 	for (; mpll_config->mpixelclock != ~0UL; mpll_config++)
- 		if (hdmi->hdmi_data.video_mode.mpixelclock <=
-@@ -1004,11 +987,11 @@ static int hdmi_phy_configure(struct dw_
- 		    HDMI_PHY_I2CM_SLAVE_ADDR);
- 	hdmi_phy_test_clear(hdmi, 0);
- 
--	hdmi_phy_i2c_write(hdmi, mpll_config->res[res_idx].cpce, 0x06);
--	hdmi_phy_i2c_write(hdmi, mpll_config->res[res_idx].gmp, 0x15);
-+	hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce, 0x06);
-+	hdmi_phy_i2c_write(hdmi, mpll_config->res[0].gmp, 0x15);
- 
- 	/* CURRCTRL */
--	hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[res_idx], 0x10);
-+	hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[0], 0x10);
- 
- 	hdmi_phy_i2c_write(hdmi, 0x0000, 0x13);  /* PLLPHBYCTRL */
- 	hdmi_phy_i2c_write(hdmi, 0x0006, 0x17);
-@@ -1068,7 +1051,7 @@ static int dw_hdmi_phy_init(struct dw_hd
- 		dw_hdmi_phy_enable_powerdown(hdmi, true);
- 
- 		/* Enable CSC */
--		ret = hdmi_phy_configure(hdmi, 8, cscon);
-+		ret = hdmi_phy_configure(hdmi, cscon);
- 		if (ret)
- 			return ret;
- 	}
diff --git a/patches.renesas/0246-drm-dw-hdmi-Implement-the-mode_fixup-drm-helper.patch b/patches.renesas/0246-drm-dw-hdmi-Implement-the-mode_fixup-drm-helper.patch
deleted file mode 100644
index f0f89ba27db9e8..00000000000000
--- a/patches.renesas/0246-drm-dw-hdmi-Implement-the-mode_fixup-drm-helper.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 29af91364af8b7e44f5fa589a4790e8175b58c30 Mon Sep 17 00:00:00 2001
-From: Romain Perier <romain.perier@collabora.com>
-Date: Fri, 7 Apr 2017 14:17:43 +0200
-Subject: [PATCH 246/286] drm: dw-hdmi: Implement the mode_fixup drm helper
-
-This helper is supposed to validate or reject the modeline before it
-applied by the mode setting. Currently this function has been dropped,
-it was previously set to a dummy function that always returned true. For
-both cases, this means that userspace can ask for a bad modeline that
-will be always accepted.
-
-On some platforms, like Rockchip, the drm dw_hdmi-rockchip variant driver
-already implements the atomic_check drm helper, so mode_fixup cannot be
-handled and implemented there (as drm_atomic_helper relies on either
-atomic_check or mode_fixup).
-
-This commit implements this helper. It only checks that this mode is
-correct from the connector point of view.
-
-Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Romain Perier <romain.perier@collabora.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170407121743.4142-1-romain.perier@collabora.com
-(cherry picked from commit 6ce2ca580f10d8d76cc3661a0b6b88d419725c9c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/synopsys/dw-hdmi.c |   15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-@@ -1947,6 +1947,20 @@ static int dw_hdmi_bridge_attach(struct
- 	return 0;
- }
- 
-+static bool dw_hdmi_bridge_mode_fixup(struct drm_bridge *bridge,
-+				      const struct drm_display_mode *orig_mode,
-+				      struct drm_display_mode *mode)
-+{
-+	struct dw_hdmi *hdmi = bridge->driver_private;
-+	struct drm_connector *connector = &hdmi->connector;
-+	enum drm_mode_status status;
-+
-+	status = dw_hdmi_connector_mode_valid(connector, mode);
-+	if (status != MODE_OK)
-+		return false;
-+	return true;
-+}
-+
- static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge,
- 				    struct drm_display_mode *orig_mode,
- 				    struct drm_display_mode *mode)
-@@ -1988,6 +2002,7 @@ static const struct drm_bridge_funcs dw_
- 	.enable = dw_hdmi_bridge_enable,
- 	.disable = dw_hdmi_bridge_disable,
- 	.mode_set = dw_hdmi_bridge_mode_set,
-+	.mode_fixup = dw_hdmi_bridge_mode_fixup,
- };
- 
- static irqreturn_t dw_hdmi_i2c_irq(struct dw_hdmi *hdmi)
diff --git a/patches.renesas/0247-ARM-dts-r8a7743-add-SYS-DMAC-support.patch b/patches.renesas/0247-ARM-dts-r8a7743-add-SYS-DMAC-support.patch
deleted file mode 100644
index 3a52743b3e701f..00000000000000
--- a/patches.renesas/0247-ARM-dts-r8a7743-add-SYS-DMAC-support.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From f0c3c1e42582f88b5830c23a0bb65ebbc9094697 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Mon, 31 Oct 2016 22:54:50 +0300
-Subject: [PATCH 247/299] ARM: dts: r8a7743: add SYS-DMAC support
-
-Describe SYS-DMAC0/1 in the R8A7743 device tree.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6ed5ed500a5c67eed7b76e5353f7bca3b3daae92)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7743.dtsi |   64 +++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 64 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7743.dtsi
-+++ b/arch/arm/boot/dts/r8a7743.dtsi
-@@ -93,6 +93,70 @@
- 			compatible = "renesas,r8a7743-rst";
- 			reg = <0 0xe6160000 0 0x100>;
- 		};
-+
-+		dmac0: dma-controller@e6700000 {
-+			compatible = "renesas,dmac-r8a7743",
-+				     "renesas,rcar-dmac";
-+			reg = <0 0xe6700000 0 0x20000>;
-+			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-names = "error",
-+					"ch0", "ch1", "ch2", "ch3",
-+					"ch4", "ch5", "ch6", "ch7",
-+					"ch8", "ch9", "ch10", "ch11",
-+					"ch12", "ch13", "ch14";
-+			clocks = <&cpg CPG_MOD 219>;
-+			clock-names = "fck";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			#dma-cells = <1>;
-+			dma-channels = <15>;
-+		};
-+
-+		dmac1: dma-controller@e6720000 {
-+			compatible = "renesas,dmac-r8a7743",
-+				     "renesas,rcar-dmac";
-+			reg = <0 0xe6720000 0 0x20000>;
-+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-names = "error",
-+					"ch0", "ch1", "ch2", "ch3",
-+					"ch4", "ch5", "ch6", "ch7",
-+					"ch8", "ch9", "ch10", "ch11",
-+					"ch12", "ch13", "ch14";
-+			clocks = <&cpg CPG_MOD 218>;
-+			clock-names = "fck";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			#dma-cells = <1>;
-+			dma-channels = <15>;
-+		};
- 	};
- 
- 	/* External root clock */
diff --git a/patches.renesas/0247-drm-bridge-dw-hdmi-Rename-CONF0-SPARECTRL-bit-to-SVS.patch b/patches.renesas/0247-drm-bridge-dw-hdmi-Rename-CONF0-SPARECTRL-bit-to-SVS.patch
deleted file mode 100644
index f5dfca7bfc5bfa..00000000000000
--- a/patches.renesas/0247-drm-bridge-dw-hdmi-Rename-CONF0-SPARECTRL-bit-to-SVS.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From ad95bf8f67c92bf2c77f4928444bc5985f28ac54 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:29:02 +0200
-Subject: [PATCH 247/255] drm: bridge: dw-hdmi: Rename CONF0 SPARECTRL bit to
- SVSRET
-
-The bit is documented in a Rockchip BSP as
-
- #define m_SVSRET_SIG		(1 << 5) /* depend on PHY_MHL_COMB0=1 */
-
-This is confirmed by a Renesas platform, which uses a 2.0 DWC HDMI TX as
-the RK3288. Rename the bit accordingly.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-13-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit f4104e8fe12c173fbba5e7e30b846e09eeb5bfbd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |    8 ++++----
- drivers/gpu/drm/bridge/dw-hdmi.h |    4 ++--
- 2 files changed, 6 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -895,11 +895,11 @@ static void dw_hdmi_phy_enable_tmds(stru
- 			 HDMI_PHY_CONF0_ENTMDS_MASK);
- }
- 
--static void dw_hdmi_phy_enable_spare(struct dw_hdmi *hdmi, u8 enable)
-+static void dw_hdmi_phy_enable_svsret(struct dw_hdmi *hdmi, u8 enable)
- {
- 	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
--			 HDMI_PHY_CONF0_SPARECTRL_OFFSET,
--			 HDMI_PHY_CONF0_SPARECTRL_MASK);
-+			 HDMI_PHY_CONF0_SVSRET_OFFSET,
-+			 HDMI_PHY_CONF0_SVSRET_MASK);
- }
- 
- static void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable)
-@@ -1014,7 +1014,7 @@ static int hdmi_phy_configure(struct dw_
- 	dw_hdmi_phy_gen2_pddq(hdmi, 0);
- 
- 	if (hdmi->dev_type == RK3288_HDMI)
--		dw_hdmi_phy_enable_spare(hdmi, 1);
-+		dw_hdmi_phy_enable_svsret(hdmi, 1);
- 
- 	/*Wait for PHY PLL lock */
- 	msec = 5;
---- a/drivers/gpu/drm/bridge/dw-hdmi.h
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.h
-@@ -847,8 +847,8 @@ enum {
- 	HDMI_PHY_CONF0_PDZ_OFFSET = 7,
- 	HDMI_PHY_CONF0_ENTMDS_MASK = 0x40,
- 	HDMI_PHY_CONF0_ENTMDS_OFFSET = 6,
--	HDMI_PHY_CONF0_SPARECTRL_MASK = 0x20,
--	HDMI_PHY_CONF0_SPARECTRL_OFFSET = 5,
-+	HDMI_PHY_CONF0_SVSRET_MASK = 0x20,
-+	HDMI_PHY_CONF0_SVSRET_OFFSET = 5,
- 	HDMI_PHY_CONF0_GEN2_PDDQ_MASK = 0x10,
- 	HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET = 4,
- 	HDMI_PHY_CONF0_GEN2_TXPWRON_MASK = 0x8,
diff --git a/patches.renesas/0247-drm-rcar-du-Switch-to-encoder-.atomic_mode_set-helpe.patch b/patches.renesas/0247-drm-rcar-du-Switch-to-encoder-.atomic_mode_set-helpe.patch
deleted file mode 100644
index f1320d4b7318e8..00000000000000
--- a/patches.renesas/0247-drm-rcar-du-Switch-to-encoder-.atomic_mode_set-helpe.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 645efae95ea245f7342a4e9e0a40e39739ebc3b8 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 18 Nov 2016 15:37:37 +0200
-Subject: [PATCH 247/286] drm: rcar-du: Switch to encoder .atomic_mode_set()
- helper function
-
-The native encoder mode set helper function for atomic drivers is
-.atomic_mode_set(). Replace the legacy .mode_set() implementation.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit e79a7dfafa3adedb7653f6d14fea3376db5285e2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_encoder.c |    8 ++++----
- drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c |    8 ++++----
- 2 files changed, 8 insertions(+), 8 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-@@ -83,16 +83,16 @@ static int rcar_du_encoder_atomic_check(
- }
- 
- static void rcar_du_encoder_mode_set(struct drm_encoder *encoder,
--				     struct drm_display_mode *mode,
--				     struct drm_display_mode *adjusted_mode)
-+				     struct drm_crtc_state *crtc_state,
-+				     struct drm_connector_state *conn_state)
- {
- 	struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
- 
--	rcar_du_crtc_route_output(encoder->crtc, renc->output);
-+	rcar_du_crtc_route_output(crtc_state->crtc, renc->output);
- }
- 
- static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
--	.mode_set = rcar_du_encoder_mode_set,
-+	.atomic_mode_set = rcar_du_encoder_mode_set,
- 	.disable = rcar_du_encoder_disable,
- 	.enable = rcar_du_encoder_enable,
- 	.atomic_check = rcar_du_encoder_atomic_check,
---- a/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
-@@ -67,16 +67,16 @@ static int rcar_du_hdmienc_atomic_check(
- 
- 
- static void rcar_du_hdmienc_mode_set(struct drm_encoder *encoder,
--				     struct drm_display_mode *mode,
--				     struct drm_display_mode *adjusted_mode)
-+				     struct drm_crtc_state *crtc_state,
-+				     struct drm_connector_state *conn_state)
- {
- 	struct rcar_du_hdmienc *hdmienc = to_rcar_hdmienc(encoder);
- 
--	rcar_du_crtc_route_output(encoder->crtc, hdmienc->renc->output);
-+	rcar_du_crtc_route_output(crtc_state->crtc, hdmienc->renc->output);
- }
- 
- static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
--	.mode_set = rcar_du_hdmienc_mode_set,
-+	.atomic_mode_set = rcar_du_hdmienc_mode_set,
- 	.disable = rcar_du_hdmienc_disable,
- 	.enable = rcar_du_hdmienc_enable,
- 	.atomic_check = rcar_du_hdmienc_atomic_check,
diff --git a/patches.renesas/0248-ARM-dts-r8a7743-add-H-SCIF-A-B-support.patch b/patches.renesas/0248-ARM-dts-r8a7743-add-H-SCIF-A-B-support.patch
deleted file mode 100644
index 8970b762ee790a..00000000000000
--- a/patches.renesas/0248-ARM-dts-r8a7743-add-H-SCIF-A-B-support.patch
+++ /dev/null
@@ -1,291 +0,0 @@
-From c6c63ab9a9706604bc340727264aea654670fb74 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Mon, 31 Oct 2016 22:55:39 +0300
-Subject: [PATCH 248/299] ARM: dts: r8a7743: add [H]SCIF{A|B} support
-
-Describe [H]SCIF{|A|B} ports in the R8A7743 device tree.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-[simon: consistently use tabs for indentation]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 809c01342691469456489bbe87d2d79ed9638631)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7743.dtsi |  261 +++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 261 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7743.dtsi
-+++ b/arch/arm/boot/dts/r8a7743.dtsi
-@@ -157,6 +157,267 @@
- 			#dma-cells = <1>;
- 			dma-channels = <15>;
- 		};
-+
-+		scifa0: serial@e6c40000 {
-+			compatible = "renesas,scifa-r8a7743",
-+				     "renesas,rcar-gen2-scifa", "renesas,scifa";
-+			reg = <0 0xe6c40000 0 0x40>;
-+			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 204>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x21>, <&dmac0 0x22>,
-+			       <&dmac1 0x21>, <&dmac1 0x22>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifa1: serial@e6c50000 {
-+			compatible = "renesas,scifa-r8a7743",
-+				     "renesas,rcar-gen2-scifa", "renesas,scifa";
-+			reg = <0 0xe6c50000 0 0x40>;
-+			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 203>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x25>, <&dmac0 0x26>,
-+			       <&dmac1 0x25>, <&dmac1 0x26>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifa2: serial@e6c60000 {
-+			compatible = "renesas,scifa-r8a7743",
-+				     "renesas,rcar-gen2-scifa", "renesas,scifa";
-+			reg = <0 0xe6c60000 0 0x40>;
-+			interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 202>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x27>, <&dmac0 0x28>,
-+			       <&dmac1 0x27>, <&dmac1 0x28>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifa3: serial@e6c70000 {
-+			compatible = "renesas,scifa-r8a7743",
-+				     "renesas,rcar-gen2-scifa", "renesas,scifa";
-+			reg = <0 0xe6c70000 0 0x40>;
-+			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 1106>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
-+			       <&dmac1 0x1b>, <&dmac1 0x1c>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifa4: serial@e6c78000 {
-+			compatible = "renesas,scifa-r8a7743",
-+				     "renesas,rcar-gen2-scifa", "renesas,scifa";
-+			reg = <0 0xe6c78000 0 0x40>;
-+			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 1107>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
-+			       <&dmac1 0x1f>, <&dmac1 0x20>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifa5: serial@e6c80000 {
-+			compatible = "renesas,scifa-r8a7743",
-+				     "renesas,rcar-gen2-scifa", "renesas,scifa";
-+			reg = <0 0xe6c80000 0 0x40>;
-+			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 1108>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x23>, <&dmac0 0x24>,
-+			       <&dmac1 0x23>, <&dmac1 0x24>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifb0: serial@e6c20000 {
-+			compatible = "renesas,scifb-r8a7743",
-+				     "renesas,rcar-gen2-scifb", "renesas,scifb";
-+			reg = <0 0xe6c20000 0 0x100>;
-+			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 206>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
-+		       <&dmac1 0x3d>, <&dmac1 0x3e>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifb1: serial@e6c30000 {
-+			compatible = "renesas,scifb-r8a7743",
-+				     "renesas,rcar-gen2-scifb", "renesas,scifb";
-+			reg = <0 0xe6c30000 0 0x100>;
-+			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 207>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
-+			       <&dmac1 0x19>, <&dmac1 0x1a>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifb2: serial@e6ce0000 {
-+			compatible = "renesas,scifb-r8a7743",
-+				     "renesas,rcar-gen2-scifb", "renesas,scifb";
-+			reg = <0 0xe6ce0000 0 0x100>;
-+			interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 216>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
-+			       <&dmac1 0x1d>, <&dmac1 0x1e>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif0: serial@e6e60000 {
-+			compatible = "renesas,scif-r8a7743",
-+				     "renesas,rcar-gen2-scif", "renesas,scif";
-+			reg = <0 0xe6e60000 0 0x40>;
-+			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 721>,
-+				 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
-+			       <&dmac1 0x29>, <&dmac1 0x2a>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif1: serial@e6e68000 {
-+			compatible = "renesas,scif-r8a7743",
-+				     "renesas,rcar-gen2-scif", "renesas,scif";
-+			reg = <0 0xe6e68000 0 0x40>;
-+			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 720>,
-+				 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
-+			       <&dmac1 0x2d>, <&dmac1 0x2e>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif2: serial@e6e58000 {
-+			compatible = "renesas,scif-r8a7743",
-+				     "renesas,rcar-gen2-scif", "renesas,scif";
-+			reg = <0 0xe6e58000 0 0x40>;
-+			interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 719>,
-+				 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
-+			       <&dmac1 0x2b>, <&dmac1 0x2c>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif3: serial@e6ea8000 {
-+			compatible = "renesas,scif-r8a7743",
-+				     "renesas,rcar-gen2-scif", "renesas,scif";
-+			reg = <0 0xe6ea8000 0 0x40>;
-+			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 718>,
-+				 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
-+			       <&dmac1 0x2f>, <&dmac1 0x30>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif4: serial@e6ee0000 {
-+			compatible = "renesas,scif-r8a7743",
-+				     "renesas,rcar-gen2-scif", "renesas,scif";
-+			reg = <0 0xe6ee0000 0 0x40>;
-+			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 715>,
-+				 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
-+			       <&dmac1 0xfb>, <&dmac1 0xfc>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif5: serial@e6ee8000 {
-+			compatible = "renesas,scif-r8a7743",
-+				     "renesas,rcar-gen2-scif", "renesas,scif";
-+			reg = <0 0xe6ee8000 0 0x40>;
-+			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 714>,
-+				 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
-+			       <&dmac1 0xfd>, <&dmac1 0xfe>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		hscif0: serial@e62c0000 {
-+			compatible = "renesas,hscif-r8a7743",
-+				     "renesas,rcar-gen2-hscif", "renesas,hscif";
-+			reg = <0 0xe62c0000 0 0x60>;
-+			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 717>,
-+				 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
-+			       <&dmac1 0x39>, <&dmac1 0x3a>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		hscif1: serial@e62c8000 {
-+			compatible = "renesas,hscif-r8a7743",
-+				     "renesas,rcar-gen2-hscif", "renesas,hscif";
-+			reg = <0 0xe62c8000 0 0x60>;
-+			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 716>,
-+				 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
-+			       <&dmac1 0x4d>, <&dmac1 0x4e>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		hscif2: serial@e62d0000 {
-+			compatible = "renesas,hscif-r8a7743",
-+				     "renesas,rcar-gen2-hscif", "renesas,hscif";
-+			reg = <0 0xe62d0000 0 0x60>;
-+			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 713>,
-+				 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
-+			       <&dmac1 0x3b>, <&dmac1 0x3c>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
- 	};
- 
- 	/* External root clock */
diff --git a/patches.renesas/0248-drm-bridge-dw-hdmi-Reject-invalid-product-IDs.patch b/patches.renesas/0248-drm-bridge-dw-hdmi-Reject-invalid-product-IDs.patch
deleted file mode 100644
index 77b3a6c8ccaa7d..00000000000000
--- a/patches.renesas/0248-drm-bridge-dw-hdmi-Reject-invalid-product-IDs.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 859a288601a5dd6322c0153da7d2baf1dba64922 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:29:03 +0200
-Subject: [PATCH 248/255] drm: bridge: dw-hdmi: Reject invalid product IDs
-
-The DWC HDMI TX can be recognized by the two product identification
-registers. If the registers don't read as expect the IP will be very
-different than what the driver has been designed for, or will be
-misconfigured in a way that makes it non-operational (invalid memory
-address, incorrect clocks, ...). We should reject this situation with an
-error.
-
-While this isn't critical for proper operation with supported IPs at the
-moment, the driver will soon gain automatic device-specific handling
-based on runtime device identification. This change makes it easier to
-implement that without having to default to a random guess in case the
-device can't be identified.
-
-While at it print a readable version number in the device identification
-message instead of raw register values.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-14-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 0527e12e8264ae96b1fcc550b4a9e5940f4ffc30)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |   25 +++++++++++++++++++------
- drivers/gpu/drm/bridge/dw-hdmi.h |    8 ++++++++
- 2 files changed, 27 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -1832,6 +1832,9 @@ __dw_hdmi_probe(struct platform_device *
- 	int irq;
- 	int ret;
- 	u32 val = 1;
-+	u16 version;
-+	u8 prod_id0;
-+	u8 prod_id1;
- 	u8 config0;
- 	u8 config1;
- 
-@@ -1914,12 +1917,22 @@ __dw_hdmi_probe(struct platform_device *
- 	}
- 
- 	/* Product and revision IDs */
--	dev_info(dev,
--		 "Detected HDMI controller 0x%x:0x%x:0x%x:0x%x\n",
--		 hdmi_readb(hdmi, HDMI_DESIGN_ID),
--		 hdmi_readb(hdmi, HDMI_REVISION_ID),
--		 hdmi_readb(hdmi, HDMI_PRODUCT_ID0),
--		 hdmi_readb(hdmi, HDMI_PRODUCT_ID1));
-+	version = (hdmi_readb(hdmi, HDMI_DESIGN_ID) << 8)
-+		| (hdmi_readb(hdmi, HDMI_REVISION_ID) << 0);
-+	prod_id0 = hdmi_readb(hdmi, HDMI_PRODUCT_ID0);
-+	prod_id1 = hdmi_readb(hdmi, HDMI_PRODUCT_ID1);
-+
-+	if (prod_id0 != HDMI_PRODUCT_ID0_HDMI_TX ||
-+	    (prod_id1 & ~HDMI_PRODUCT_ID1_HDCP) != HDMI_PRODUCT_ID1_HDMI_TX) {
-+		dev_err(dev, "Unsupported HDMI controller (%04x:%02x:%02x)\n",
-+			version, prod_id0, prod_id1);
-+		ret = -ENODEV;
-+		goto err_iahb;
-+	}
-+
-+	dev_info(dev, "Detected HDMI TX controller v%x.%03x %s HDCP\n",
-+		 version >> 12, version & 0xfff,
-+		 prod_id1 & HDMI_PRODUCT_ID1_HDCP ? "with" : "without");
- 
- 	initialize_hdmi_ih_mutes(hdmi);
- 
---- a/drivers/gpu/drm/bridge/dw-hdmi.h
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.h
-@@ -545,6 +545,14 @@
- #define HDMI_I2CM_FS_SCL_LCNT_0_ADDR            0x7E12
- 
- enum {
-+/* PRODUCT_ID0 field values */
-+	HDMI_PRODUCT_ID0_HDMI_TX = 0xa0,
-+
-+/* PRODUCT_ID1 field values */
-+	HDMI_PRODUCT_ID1_HDCP = 0xc0,
-+	HDMI_PRODUCT_ID1_HDMI_RX = 0x02,
-+	HDMI_PRODUCT_ID1_HDMI_TX = 0x01,
-+
- /* CONFIG0_ID field values */
- 	HDMI_CONFIG0_I2S = 0x10,
- 
diff --git a/patches.renesas/0248-drm-rcar-du-Don-t-open-code-of_device_get_match_data.patch b/patches.renesas/0248-drm-rcar-du-Don-t-open-code-of_device_get_match_data.patch
deleted file mode 100644
index 42e28004cc7f1c..00000000000000
--- a/patches.renesas/0248-drm-rcar-du-Don-t-open-code-of_device_get_match_data.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 543e75777fe98170b6b15f8da7aae0a4fcfe411d Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Date: Sun, 16 Oct 2016 10:01:47 +0200
-Subject: [PATCH 248/286] drm: rcar-du: Don't open code
- of_device_get_match_data()
-
-This change will also make Coverity happy by avoiding a theoretical NULL
-pointer dereference; yet another reason is to use the above helper function
-to tighten the code and make it more readable.
-
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-(cherry picked from commit 9e7d80e648793d5bf263a3ec9cfb1cf29b86a6e0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -351,7 +351,7 @@ static int rcar_du_probe(struct platform
- 	init_waitqueue_head(&rcdu->commit.wait);
- 
- 	rcdu->dev = &pdev->dev;
--	rcdu->info = of_match_device(rcar_du_of_table, rcdu->dev)->data;
-+	rcdu->info = of_device_get_match_data(rcdu->dev);
- 
- 	platform_set_drvdata(pdev, rcdu);
- 
diff --git a/patches.renesas/0249-ARM-dts-r8a7743-add-Ether-support.patch b/patches.renesas/0249-ARM-dts-r8a7743-add-Ether-support.patch
deleted file mode 100644
index 35140c84ad8982..00000000000000
--- a/patches.renesas/0249-ARM-dts-r8a7743-add-Ether-support.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From cf1372b7b2d0679d30ead98cd9cf37e9d834cbd9 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Mon, 31 Oct 2016 22:56:36 +0300
-Subject: [PATCH 249/299] ARM: dts: r8a7743: add Ether support
-
-Define the generic R8A7743 part of the Ether device node.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 75f97fb45e6297e3fbaf837fc30850cf724c8f83)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7743.dtsi |   12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7743.dtsi
-+++ b/arch/arm/boot/dts/r8a7743.dtsi
-@@ -418,6 +418,18 @@
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
-+
-+		ether: ethernet@ee700000 {
-+			compatible = "renesas,ether-r8a7743";
-+			reg = <0 0xee700000 0 0x400>;
-+			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 813>;
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			phy-mode = "rmii";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			status = "disabled";
-+		};
- 	};
- 
- 	/* External root clock */
diff --git a/patches.renesas/0249-drm-bridge-dw-hdmi-Detect-AHB-audio-DMA-using-correc.patch b/patches.renesas/0249-drm-bridge-dw-hdmi-Detect-AHB-audio-DMA-using-correc.patch
deleted file mode 100644
index 17b11a58ec10a2..00000000000000
--- a/patches.renesas/0249-drm-bridge-dw-hdmi-Detect-AHB-audio-DMA-using-correc.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 4931bfb681595c73c026b8e195dfd4c32f2e155d Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:29:04 +0200
-Subject: [PATCH 249/255] drm: bridge: dw-hdmi: Detect AHB audio DMA using
- correct register
-
-Bit 0 in CONFIG1_ID tells whether the IP core uses an AHB slave
-interface for control. The correct way to identify AHB audio DMA support
-is through bit 1 in CONFIG3_ID.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-15-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 0c674948b7f4e4ffc19ba5af65a274e945c0c689)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |    6 +++---
- drivers/gpu/drm/bridge/dw-hdmi.h |    4 ++++
- 2 files changed, 7 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -1836,7 +1836,7 @@ __dw_hdmi_probe(struct platform_device *
- 	u8 prod_id0;
- 	u8 prod_id1;
- 	u8 config0;
--	u8 config1;
-+	u8 config3;
- 
- 	hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
- 	if (!hdmi)
-@@ -1988,9 +1988,9 @@ __dw_hdmi_probe(struct platform_device *
- 	pdevinfo.id = PLATFORM_DEVID_AUTO;
- 
- 	config0 = hdmi_readb(hdmi, HDMI_CONFIG0_ID);
--	config1 = hdmi_readb(hdmi, HDMI_CONFIG1_ID);
-+	config3 = hdmi_readb(hdmi, HDMI_CONFIG3_ID);
- 
--	if (config1 & HDMI_CONFIG1_AHB) {
-+	if (config3 & HDMI_CONFIG3_AHBAUDDMA) {
- 		struct dw_hdmi_audio_data audio;
- 
- 		audio.phys = iores->start;
---- a/drivers/gpu/drm/bridge/dw-hdmi.h
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.h
-@@ -559,6 +559,10 @@ enum {
- /* CONFIG1_ID field values */
- 	HDMI_CONFIG1_AHB = 0x01,
- 
-+/* CONFIG3_ID field values */
-+	HDMI_CONFIG3_AHBAUDDMA = 0x02,
-+	HDMI_CONFIG3_GPAUD = 0x01,
-+
- /* IH_FC_INT2 field values */
- 	HDMI_IH_FC_INT2_OVERFLOW_MASK = 0x03,
- 	HDMI_IH_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02,
diff --git a/patches.renesas/0249-drm-rcar-du-Handle-event-when-disabling-CRTCs.patch b/patches.renesas/0249-drm-rcar-du-Handle-event-when-disabling-CRTCs.patch
deleted file mode 100644
index a17ebcff0c32f4..00000000000000
--- a/patches.renesas/0249-drm-rcar-du-Handle-event-when-disabling-CRTCs.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 116104b12295ade36a1cd34fa1a7ef6930044aca Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 10 Feb 2017 13:30:35 +0200
-Subject: [PATCH 249/286] drm: rcar-du: Handle event when disabling CRTCs
-
-The driver currently handles vblank events only when updating planes on
-a CRTC. The atomic update API however allows requesting an event when
-disabling a CRTC. This currently leads to event objects being leaked in
-the kernel and to events not being sent out. Fix it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 6dd47cfd03a058d08b8caffb06194aa0eb109cf1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_crtc.c |    7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-@@ -519,6 +519,13 @@ static void rcar_du_crtc_disable(struct
- 	}
- 	spin_unlock_irq(&crtc->dev->event_lock);
- 
-+	spin_lock_irq(&crtc->dev->event_lock);
-+	if (crtc->state->event) {
-+		drm_crtc_send_vblank_event(crtc, crtc->state->event);
-+		crtc->state->event = NULL;
-+	}
-+	spin_unlock_irq(&crtc->dev->event_lock);
-+
- 	rcrtc->outputs = 0;
- }
- 
diff --git a/patches.renesas/0250-ARM-dts-r8a7743-add-IRQC-support.patch b/patches.renesas/0250-ARM-dts-r8a7743-add-IRQC-support.patch
deleted file mode 100644
index 2bd52781985b63..00000000000000
--- a/patches.renesas/0250-ARM-dts-r8a7743-add-IRQC-support.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 7cec0ddf3f0bc26608622302e02635d07a77ee81 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Mon, 31 Oct 2016 22:58:12 +0300
-Subject: [PATCH 250/299] ARM: dts: r8a7743: add IRQC support
-
-Describe the IRQC interrupt controller in the R8A7743 device tree.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ef0ca50774495c4ca4d1211252c8ee5af5136187)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7743.dtsi |   19 +++++++++++++++++++
- 1 file changed, 19 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7743.dtsi
-+++ b/arch/arm/boot/dts/r8a7743.dtsi
-@@ -62,6 +62,25 @@
- 						 IRQ_TYPE_LEVEL_HIGH)>;
- 		};
- 
-+		irqc: interrupt-controller@e61c0000 {
-+			compatible = "renesas,irqc-r8a7743", "renesas,irqc";
-+			#interrupt-cells = <2>;
-+			interrupt-controller;
-+			reg = <0 0xe61c0000 0 0x200>;
-+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 407>;
-+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+		};
-+
- 		timer {
- 			compatible = "arm,armv7-timer";
- 			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
diff --git a/patches.renesas/0250-drm-bridge-dw-hdmi-Handle-overflow-workaround-based-.patch b/patches.renesas/0250-drm-bridge-dw-hdmi-Handle-overflow-workaround-based-.patch
deleted file mode 100644
index cb3f3dff8a09a4..00000000000000
--- a/patches.renesas/0250-drm-bridge-dw-hdmi-Handle-overflow-workaround-based-.patch
+++ /dev/null
@@ -1,120 +0,0 @@
-From 087f2fefee2f4fa50b6e16e2b7359cae63002fbe Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:29:05 +0200
-Subject: [PATCH 250/255] drm: bridge: dw-hdmi: Handle overflow workaround
- based on device version
-
-Use the device version queried at runtime instead of the device type
-provided through platform data to handle the overflow workaround. This
-will make support of other SoCs integrating the same HDMI TX controller
-version easier.
-
-Among the supported platforms only i.MX6DL and i.MX6Q have been
-identified as needing the workaround. Disabling it on Rockchip RK3288
-(which integrates a v2.00a controller) didn't produce any error or
-artifact.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-16-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit be41fc55f1aa3c9ae0eb9e0b384db5150eca055f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |   46 +++++++++++++++++++++++++++------------
- 1 file changed, 33 insertions(+), 13 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -117,8 +117,10 @@ struct dw_hdmi {
- 	struct drm_connector connector;
- 	struct drm_bridge bridge;
- 
--	struct platform_device *audio;
- 	enum dw_hdmi_devtype dev_type;
-+	unsigned int version;
-+
-+	struct platform_device *audio;
- 	struct device *dev;
- 	struct clk *isfr_clk;
- 	struct clk *iahb_clk;
-@@ -1323,19 +1325,38 @@ static void hdmi_enable_audio_clk(struct
- /* Workaround to clear the overflow condition */
- static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi)
- {
--	int count;
-+	unsigned int count;
-+	unsigned int i;
- 	u8 val;
- 
--	/* TMDS software reset */
--	hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, HDMI_MC_SWRSTZ);
-+	/*
-+	 * Under some circumstances the Frame Composer arithmetic unit can miss
-+	 * an FC register write due to being busy processing the previous one.
-+	 * The issue can be worked around by issuing a TMDS software reset and
-+	 * then write one of the FC registers several times.
-+	 *
-+	 * The number of iterations matters and depends on the HDMI TX revision
-+	 * (and possibly on the platform). So far only i.MX6Q (v1.30a) and
-+	 * i.MX6DL (v1.31a) have been identified as needing the workaround, with
-+	 * 4 and 1 iterations respectively.
-+	 */
- 
--	val = hdmi_readb(hdmi, HDMI_FC_INVIDCONF);
--	if (hdmi->dev_type == IMX6DL_HDMI) {
--		hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF);
-+	switch (hdmi->version) {
-+	case 0x130a:
-+		count = 4;
-+		break;
-+	case 0x131a:
-+		count = 1;
-+		break;
-+	default:
- 		return;
- 	}
- 
--	for (count = 0; count < 4; count++)
-+	/* TMDS software reset */
-+	hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, HDMI_MC_SWRSTZ);
-+
-+	val = hdmi_readb(hdmi, HDMI_FC_INVIDCONF);
-+	for (i = 0; i < count; i++)
- 		hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF);
- }
- 
-@@ -1832,7 +1853,6 @@ __dw_hdmi_probe(struct platform_device *
- 	int irq;
- 	int ret;
- 	u32 val = 1;
--	u16 version;
- 	u8 prod_id0;
- 	u8 prod_id1;
- 	u8 config0;
-@@ -1917,21 +1937,21 @@ __dw_hdmi_probe(struct platform_device *
- 	}
- 
- 	/* Product and revision IDs */
--	version = (hdmi_readb(hdmi, HDMI_DESIGN_ID) << 8)
--		| (hdmi_readb(hdmi, HDMI_REVISION_ID) << 0);
-+	hdmi->version = (hdmi_readb(hdmi, HDMI_DESIGN_ID) << 8)
-+		      | (hdmi_readb(hdmi, HDMI_REVISION_ID) << 0);
- 	prod_id0 = hdmi_readb(hdmi, HDMI_PRODUCT_ID0);
- 	prod_id1 = hdmi_readb(hdmi, HDMI_PRODUCT_ID1);
- 
- 	if (prod_id0 != HDMI_PRODUCT_ID0_HDMI_TX ||
- 	    (prod_id1 & ~HDMI_PRODUCT_ID1_HDCP) != HDMI_PRODUCT_ID1_HDMI_TX) {
- 		dev_err(dev, "Unsupported HDMI controller (%04x:%02x:%02x)\n",
--			version, prod_id0, prod_id1);
-+			hdmi->version, prod_id0, prod_id1);
- 		ret = -ENODEV;
- 		goto err_iahb;
- 	}
- 
- 	dev_info(dev, "Detected HDMI TX controller v%x.%03x %s HDCP\n",
--		 version >> 12, version & 0xfff,
-+		 hdmi->version >> 12, hdmi->version & 0xfff,
- 		 prod_id1 & HDMI_PRODUCT_ID1_HDCP ? "with" : "without");
- 
- 	initialize_hdmi_ih_mutes(hdmi);
diff --git a/patches.renesas/0250-drm-rcar-du-Clear-handled-event-pointer-in-CRTC-stat.patch b/patches.renesas/0250-drm-rcar-du-Clear-handled-event-pointer-in-CRTC-stat.patch
deleted file mode 100644
index 6446c46efbece9..00000000000000
--- a/patches.renesas/0250-drm-rcar-du-Clear-handled-event-pointer-in-CRTC-stat.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 499973b260751d5bc38f7b0d89f6b8b07373d525 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 12 Feb 2017 02:45:11 +0200
-Subject: [PATCH 250/286] drm: rcar-du: Clear handled event pointer in CRTC
- state
-
-The atomic commit helper requires drivers to clear the event pointer
-stored in the CRTC state when the event is handled. In preparation to
-using the helper, fix the driver.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 15b181a309e9c9bff8d0bc57d7da2d5f87c14186)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_crtc.c |    6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-@@ -532,16 +532,16 @@ static void rcar_du_crtc_disable(struct
- static void rcar_du_crtc_atomic_begin(struct drm_crtc *crtc,
- 				      struct drm_crtc_state *old_crtc_state)
- {
--	struct drm_pending_vblank_event *event = crtc->state->event;
- 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
- 	struct drm_device *dev = rcrtc->crtc.dev;
- 	unsigned long flags;
- 
--	if (event) {
-+	if (crtc->state->event) {
- 		WARN_ON(drm_crtc_vblank_get(crtc) != 0);
- 
- 		spin_lock_irqsave(&dev->event_lock, flags);
--		rcrtc->event = event;
-+		rcrtc->event = crtc->state->event;
-+		crtc->state->event = NULL;
- 		spin_unlock_irqrestore(&dev->event_lock, flags);
- 	}
- 
diff --git a/patches.renesas/0251-ARM-dts-sk-rzg1m-initial-device-tree.patch b/patches.renesas/0251-ARM-dts-sk-rzg1m-initial-device-tree.patch
deleted file mode 100644
index 22356a76509361..00000000000000
--- a/patches.renesas/0251-ARM-dts-sk-rzg1m-initial-device-tree.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 11f4974d19f259c9f03ca5683c8eb08c6c9c4fbb Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Mon, 31 Oct 2016 22:59:03 +0300
-Subject: [PATCH 251/299] ARM: dts: sk-rzg1m: initial device tree
-
-Add the initial device  tree for the R8A7743 SoC based SK-RZG1M board.
-The board has one debug serial port (SCIF0); include support for it, so
-that  the serial  console  can work.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 22e69c4bfce712ab945ce6cd57951e3ba15a8e70)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile             |    1 
- arch/arm/boot/dts/r8a7743-sk-rzg1m.dts |   44 +++++++++++++++++++++++++++++++++
- 2 files changed, 45 insertions(+)
- create mode 100644 arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -678,6 +678,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
- 	r7s72100-rskrza1.dtb \
- 	r8a73a4-ape6evm.dtb \
- 	r8a7740-armadillo800eva.dtb \
-+	r8a7743-sk-rzg1m.dtb \
- 	r8a7778-bockw.dtb \
- 	r8a7779-marzen.dtb \
- 	r8a7790-lager.dtb \
---- /dev/null
-+++ b/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
-@@ -0,0 +1,44 @@
-+/*
-+ * Device Tree Source for the SK-RZG1M board
-+ *
-+ * Copyright (C) 2016 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2. This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+#include "r8a7743.dtsi"
-+
-+/ {
-+	model = "SK-RZG1M";
-+	compatible = "renesas,sk-rzg1m", "renesas,r8a7743";
-+
-+	aliases {
-+		serial0 = &scif0;
-+	};
-+
-+	chosen {
-+		bootargs = "ignore_loglevel";
-+		stdout-path = "serial0:115200n8";
-+	};
-+
-+	memory@40000000 {
-+		device_type = "memory";
-+		reg = <0 0x40000000 0 0x40000000>;
-+	};
-+
-+	memory@200000000 {
-+		device_type = "memory";
-+		reg = <2 0x00000000 0 0x40000000>;
-+	};
-+};
-+
-+&extal_clk {
-+	clock-frequency = <20000000>;
-+};
-+
-+&scif0 {
-+	status = "okay";
-+};
diff --git a/patches.renesas/0251-drm-bridge-dw-hdmi-Detect-PHY-type-at-runtime.patch b/patches.renesas/0251-drm-bridge-dw-hdmi-Detect-PHY-type-at-runtime.patch
deleted file mode 100644
index b7040674944191..00000000000000
--- a/patches.renesas/0251-drm-bridge-dw-hdmi-Detect-PHY-type-at-runtime.patch
+++ /dev/null
@@ -1,144 +0,0 @@
-From 40aac568e42ffb308a0d9aaf6a2694d9b60ccb0b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:29:06 +0200
-Subject: [PATCH 251/255] drm: bridge: dw-hdmi: Detect PHY type at runtime
-
-Detect the PHY type and use it to handle the PHY type-specific SVSRET
-signal.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-17-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit faba6c3cff177689aec132291b1cf537831d9a2e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |   68 +++++++++++++++++++++++++++++++++++++--
- include/drm/bridge/dw_hdmi.h     |   10 +++++
- 2 files changed, 75 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -113,6 +113,12 @@ struct dw_hdmi_i2c {
- 	bool			is_regaddr;
- };
- 
-+struct dw_hdmi_phy_data {
-+	enum dw_hdmi_phy_type type;
-+	const char *name;
-+	bool has_svsret;
-+};
-+
- struct dw_hdmi {
- 	struct drm_connector connector;
- 	struct drm_bridge bridge;
-@@ -134,7 +140,9 @@ struct dw_hdmi {
- 	u8 edid[HDMI_EDID_LEN];
- 	bool cable_plugin;
- 
-+	const struct dw_hdmi_phy_data *phy;
- 	bool phy_enabled;
-+
- 	struct drm_display_mode previous_mode;
- 
- 	struct i2c_adapter *ddc;
-@@ -1015,7 +1023,8 @@ static int hdmi_phy_configure(struct dw_
- 	dw_hdmi_phy_gen2_txpwron(hdmi, 1);
- 	dw_hdmi_phy_gen2_pddq(hdmi, 0);
- 
--	if (hdmi->dev_type == RK3288_HDMI)
-+	/* The DWC MHL and HDMI 2.0 PHYs need the SVSRET signal to be set. */
-+	if (hdmi->phy->has_svsret)
- 		dw_hdmi_phy_enable_svsret(hdmi, 1);
- 
- 	/*Wait for PHY PLL lock */
-@@ -1840,6 +1849,54 @@ static irqreturn_t dw_hdmi_irq(int irq,
- 	return IRQ_HANDLED;
- }
- 
-+static const struct dw_hdmi_phy_data dw_hdmi_phys[] = {
-+	{
-+		.type = DW_HDMI_PHY_DWC_HDMI_TX_PHY,
-+		.name = "DWC HDMI TX PHY",
-+	}, {
-+		.type = DW_HDMI_PHY_DWC_MHL_PHY_HEAC,
-+		.name = "DWC MHL PHY + HEAC PHY",
-+		.has_svsret = true,
-+	}, {
-+		.type = DW_HDMI_PHY_DWC_MHL_PHY,
-+		.name = "DWC MHL PHY",
-+		.has_svsret = true,
-+	}, {
-+		.type = DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY_HEAC,
-+		.name = "DWC HDMI 3D TX PHY + HEAC PHY",
-+	}, {
-+		.type = DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY,
-+		.name = "DWC HDMI 3D TX PHY",
-+	}, {
-+		.type = DW_HDMI_PHY_DWC_HDMI20_TX_PHY,
-+		.name = "DWC HDMI 2.0 TX PHY",
-+		.has_svsret = true,
-+	}
-+};
-+
-+static int dw_hdmi_detect_phy(struct dw_hdmi *hdmi)
-+{
-+	unsigned int i;
-+	u8 phy_type;
-+
-+	phy_type = hdmi_readb(hdmi, HDMI_CONFIG2_ID);
-+
-+	for (i = 0; i < ARRAY_SIZE(dw_hdmi_phys); ++i) {
-+		if (dw_hdmi_phys[i].type == phy_type) {
-+			hdmi->phy = &dw_hdmi_phys[i];
-+			return 0;
-+		}
-+	}
-+
-+	if (phy_type == DW_HDMI_PHY_VENDOR_PHY)
-+		dev_err(hdmi->dev, "Unsupported vendor HDMI PHY\n");
-+	else
-+		dev_err(hdmi->dev, "Unsupported HDMI PHY type (%02x)\n",
-+			phy_type);
-+
-+	return -ENODEV;
-+}
-+
- static struct dw_hdmi *
- __dw_hdmi_probe(struct platform_device *pdev,
- 		const struct dw_hdmi_plat_data *plat_data)
-@@ -1950,9 +2007,14 @@ __dw_hdmi_probe(struct platform_device *
- 		goto err_iahb;
- 	}
- 
--	dev_info(dev, "Detected HDMI TX controller v%x.%03x %s HDCP\n",
-+	ret = dw_hdmi_detect_phy(hdmi);
-+	if (ret < 0)
-+		goto err_iahb;
-+
-+	dev_info(dev, "Detected HDMI TX controller v%x.%03x %s HDCP (%s)\n",
- 		 hdmi->version >> 12, hdmi->version & 0xfff,
--		 prod_id1 & HDMI_PRODUCT_ID1_HDCP ? "with" : "without");
-+		 prod_id1 & HDMI_PRODUCT_ID1_HDCP ? "with" : "without",
-+		 hdmi->phy->name);
- 
- 	initialize_hdmi_ih_mutes(hdmi);
- 
---- a/include/drm/bridge/dw_hdmi.h
-+++ b/include/drm/bridge/dw_hdmi.h
-@@ -27,6 +27,16 @@ enum dw_hdmi_devtype {
- 	RK3288_HDMI,
- };
- 
-+enum dw_hdmi_phy_type {
-+	DW_HDMI_PHY_DWC_HDMI_TX_PHY = 0x00,
-+	DW_HDMI_PHY_DWC_MHL_PHY_HEAC = 0xb2,
-+	DW_HDMI_PHY_DWC_MHL_PHY = 0xc2,
-+	DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY_HEAC = 0xe2,
-+	DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY = 0xf2,
-+	DW_HDMI_PHY_DWC_HDMI20_TX_PHY = 0xf3,
-+	DW_HDMI_PHY_VENDOR_PHY = 0xfe,
-+};
-+
- struct dw_hdmi_mpll_config {
- 	unsigned long mpixelclock;
- 	struct {
diff --git a/patches.renesas/0251-drm-rcar-du-Use-DRM-core-s-atomic-commit-helper.patch b/patches.renesas/0251-drm-rcar-du-Use-DRM-core-s-atomic-commit-helper.patch
deleted file mode 100644
index f7d953974b9848..00000000000000
--- a/patches.renesas/0251-drm-rcar-du-Use-DRM-core-s-atomic-commit-helper.patch
+++ /dev/null
@@ -1,151 +0,0 @@
-From 086923dadd36a1aa92c5b82442fd0c0e4e3676c3 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 10 Feb 2017 13:30:35 +0200
-Subject: [PATCH 251/286] drm: rcar-du: Use DRM core's atomic commit helper
-
-The DRM core atomic helper now supports asynchronous commits natively.
-The custom rcar-du implementation isn't needed anymore, remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit a8fd12233e2348568893f1d0e251d8a4630a50af)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_kms.c |   99 +++-------------------------------
- 1 file changed, 9 insertions(+), 90 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -249,18 +249,9 @@ static int rcar_du_atomic_check(struct d
- 	return rcar_du_atomic_check_planes(dev, state);
- }
- 
--struct rcar_du_commit {
--	struct work_struct work;
--	struct drm_device *dev;
--	struct drm_atomic_state *state;
--	u32 crtcs;
--};
--
--static void rcar_du_atomic_complete(struct rcar_du_commit *commit)
-+static void rcar_du_atomic_commit_tail(struct drm_atomic_state *old_state)
- {
--	struct drm_device *dev = commit->dev;
--	struct rcar_du_device *rcdu = dev->dev_private;
--	struct drm_atomic_state *old_state = commit->state;
-+	struct drm_device *dev = old_state->dev;
- 
- 	/* Apply the atomic update. */
- 	drm_atomic_helper_commit_modeset_disables(dev, old_state);
-@@ -268,98 +259,25 @@ static void rcar_du_atomic_complete(stru
- 	drm_atomic_helper_commit_planes(dev, old_state,
- 					DRM_PLANE_COMMIT_ACTIVE_ONLY);
- 
-+	drm_atomic_helper_commit_hw_done(old_state);
- 	drm_atomic_helper_wait_for_vblanks(dev, old_state);
- 
- 	drm_atomic_helper_cleanup_planes(dev, old_state);
--
--	drm_atomic_state_put(old_state);
--
--	/* Complete the commit, wake up any waiter. */
--	spin_lock(&rcdu->commit.wait.lock);
--	rcdu->commit.pending &= ~commit->crtcs;
--	wake_up_all_locked(&rcdu->commit.wait);
--	spin_unlock(&rcdu->commit.wait.lock);
--
--	kfree(commit);
--}
--
--static void rcar_du_atomic_work(struct work_struct *work)
--{
--	struct rcar_du_commit *commit =
--		container_of(work, struct rcar_du_commit, work);
--
--	rcar_du_atomic_complete(commit);
--}
--
--static int rcar_du_atomic_commit(struct drm_device *dev,
--				 struct drm_atomic_state *state,
--				 bool nonblock)
--{
--	struct rcar_du_device *rcdu = dev->dev_private;
--	struct rcar_du_commit *commit;
--	struct drm_crtc *crtc;
--	struct drm_crtc_state *crtc_state;
--	unsigned int i;
--	int ret;
--
--	ret = drm_atomic_helper_prepare_planes(dev, state);
--	if (ret)
--		return ret;
--
--	/* Allocate the commit object. */
--	commit = kzalloc(sizeof(*commit), GFP_KERNEL);
--	if (commit == NULL) {
--		ret = -ENOMEM;
--		goto error;
--	}
--
--	INIT_WORK(&commit->work, rcar_du_atomic_work);
--	commit->dev = dev;
--	commit->state = state;
--
--	/* Wait until all affected CRTCs have completed previous commits and
--	 * mark them as pending.
--	 */
--	for_each_crtc_in_state(state, crtc, crtc_state, i)
--		commit->crtcs |= drm_crtc_mask(crtc);
--
--	spin_lock(&rcdu->commit.wait.lock);
--	ret = wait_event_interruptible_locked(rcdu->commit.wait,
--			!(rcdu->commit.pending & commit->crtcs));
--	if (ret == 0)
--		rcdu->commit.pending |= commit->crtcs;
--	spin_unlock(&rcdu->commit.wait.lock);
--
--	if (ret) {
--		kfree(commit);
--		goto error;
--	}
--
--	/* Swap the state, this is the point of no return. */
--	drm_atomic_helper_swap_state(state, true);
--
--	drm_atomic_state_get(state);
--	if (nonblock)
--		schedule_work(&commit->work);
--	else
--		rcar_du_atomic_complete(commit);
--
--	return 0;
--
--error:
--	drm_atomic_helper_cleanup_planes(dev, state);
--	return ret;
- }
- 
- /* -----------------------------------------------------------------------------
-  * Initialization
-  */
- 
-+static const struct drm_mode_config_helper_funcs rcar_du_mode_config_helper = {
-+	.atomic_commit_tail = rcar_du_atomic_commit_tail,
-+};
-+
- static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
- 	.fb_create = rcar_du_fb_create,
- 	.output_poll_changed = rcar_du_output_poll_changed,
- 	.atomic_check = rcar_du_atomic_check,
--	.atomic_commit = rcar_du_atomic_commit,
-+	.atomic_commit = drm_atomic_helper_commit,
- };
- 
- static int rcar_du_encoders_init_one(struct rcar_du_device *rcdu,
-@@ -561,6 +479,7 @@ int rcar_du_modeset_init(struct rcar_du_
- 	dev->mode_config.max_width = 4095;
- 	dev->mode_config.max_height = 2047;
- 	dev->mode_config.funcs = &rcar_du_mode_config_funcs;
-+	dev->mode_config.helper_private = &rcar_du_mode_config_helper;
- 
- 	rcdu->num_crtcs = rcdu->info->num_crtcs;
- 
diff --git a/patches.renesas/0252-ARM-dts-sk-rzg1m-add-Ether-support.patch b/patches.renesas/0252-ARM-dts-sk-rzg1m-add-Ether-support.patch
deleted file mode 100644
index 871f1c1f7ebdbb..00000000000000
--- a/patches.renesas/0252-ARM-dts-sk-rzg1m-add-Ether-support.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From ed8b22b99ce5d243a2208009b62dfa4cb81e4561 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Mon, 31 Oct 2016 23:00:03 +0300
-Subject: [PATCH 252/299] ARM: dts: sk-rzg1m: add Ether support
-
-Define the SK-RZG1M board dependent part of the Ether device node.
-Enable DHCP and NFS root  for the kernel booting.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d05ab65b1d0b7fdd0f25439a3bf234324a419d94)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7743-sk-rzg1m.dts |   15 ++++++++++++++-
- 1 file changed, 14 insertions(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
-+++ b/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
-@@ -20,7 +20,7 @@
- 	};
- 
- 	chosen {
--		bootargs = "ignore_loglevel";
-+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
- 		stdout-path = "serial0:115200n8";
- 	};
- 
-@@ -42,3 +42,16 @@
- &scif0 {
- 	status = "okay";
- };
-+
-+&ether {
-+	phy-handle = <&phy1>;
-+	renesas,ether-link-active-low;
-+	status = "okay";
-+
-+	phy1: ethernet-phy@1 {
-+		reg = <1>;
-+		interrupt-parent = <&irqc>;
-+		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-+		micrel,led-mode = <1>;
-+	};
-+};
diff --git a/patches.renesas/0252-drm-bridge-dw-hdmi-Define-and-use-macros-for-PHY-reg.patch b/patches.renesas/0252-drm-bridge-dw-hdmi-Define-and-use-macros-for-PHY-reg.patch
deleted file mode 100644
index 68c7563fe239b0..00000000000000
--- a/patches.renesas/0252-drm-bridge-dw-hdmi-Define-and-use-macros-for-PHY-reg.patch
+++ /dev/null
@@ -1,140 +0,0 @@
-From bcb9c654a4ef1faa21f7db2fad8f77a4f6b83913 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:29:07 +0200
-Subject: [PATCH 252/255] drm: bridge: dw-hdmi: Define and use macros for PHY
- register addresses
-
-Replace the hardcoded register address numerical values with macros to
-clarify the code.
-
-This change has been tested by comparing the assembly code before and
-after the change.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-18-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit f0e7f2f3b6333a02dd7cb89822e6330631c9a3e3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |   35 +++++++++++---------
- drivers/gpu/drm/bridge/dw-hdmi.h |   66 +++++++++++++++++++++++++++++++++++++++
- 2 files changed, 86 insertions(+), 15 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -997,21 +997,26 @@ static int hdmi_phy_configure(struct dw_
- 		    HDMI_PHY_I2CM_SLAVE_ADDR);
- 	hdmi_phy_test_clear(hdmi, 0);
- 
--	hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce, 0x06);
--	hdmi_phy_i2c_write(hdmi, mpll_config->res[0].gmp, 0x15);
--
--	/* CURRCTRL */
--	hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[0], 0x10);
--
--	hdmi_phy_i2c_write(hdmi, 0x0000, 0x13);  /* PLLPHBYCTRL */
--	hdmi_phy_i2c_write(hdmi, 0x0006, 0x17);
--
--	hdmi_phy_i2c_write(hdmi, phy_config->term, 0x19);  /* TXTERM */
--	hdmi_phy_i2c_write(hdmi, phy_config->sym_ctr, 0x09); /* CKSYMTXCTRL */
--	hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr, 0x0E); /* VLEVCTRL */
--
--	/* REMOVE CLK TERM */
--	hdmi_phy_i2c_write(hdmi, 0x8000, 0x05);  /* CKCALCTRL */
-+	hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce,
-+			   HDMI_3D_TX_PHY_CPCE_CTRL);
-+	hdmi_phy_i2c_write(hdmi, mpll_config->res[0].gmp,
-+			   HDMI_3D_TX_PHY_GMPCTRL);
-+	hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[0],
-+			   HDMI_3D_TX_PHY_CURRCTRL);
-+
-+	hdmi_phy_i2c_write(hdmi, 0, HDMI_3D_TX_PHY_PLLPHBYCTRL);
-+	hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK,
-+			   HDMI_3D_TX_PHY_MSM_CTRL);
-+
-+	hdmi_phy_i2c_write(hdmi, phy_config->term, HDMI_3D_TX_PHY_TXTERM);
-+	hdmi_phy_i2c_write(hdmi, phy_config->sym_ctr,
-+			   HDMI_3D_TX_PHY_CKSYMTXCTRL);
-+	hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr,
-+			   HDMI_3D_TX_PHY_VLEVCTRL);
-+
-+	/* Override and disable clock termination. */
-+	hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE,
-+			   HDMI_3D_TX_PHY_CKCALCTRL);
- 
- 	dw_hdmi_phy_enable_powerdown(hdmi, false);
- 
---- a/drivers/gpu/drm/bridge/dw-hdmi.h
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.h
-@@ -1085,4 +1085,70 @@ enum {
- 	HDMI_I2CM_CTLINT_ARB_MASK = 0x4,
- };
- 
-+/*
-+ * HDMI 3D TX PHY registers
-+ */
-+#define HDMI_3D_TX_PHY_PWRCTRL			0x00
-+#define HDMI_3D_TX_PHY_SERDIVCTRL		0x01
-+#define HDMI_3D_TX_PHY_SERCKCTRL		0x02
-+#define HDMI_3D_TX_PHY_SERCKKILLCTRL		0x03
-+#define HDMI_3D_TX_PHY_TXRESCTRL		0x04
-+#define HDMI_3D_TX_PHY_CKCALCTRL		0x05
-+#define HDMI_3D_TX_PHY_CPCE_CTRL		0x06
-+#define HDMI_3D_TX_PHY_TXCLKMEASCTRL		0x07
-+#define HDMI_3D_TX_PHY_TXMEASCTRL		0x08
-+#define HDMI_3D_TX_PHY_CKSYMTXCTRL		0x09
-+#define HDMI_3D_TX_PHY_CMPSEQCTRL		0x0a
-+#define HDMI_3D_TX_PHY_CMPPWRCTRL		0x0b
-+#define HDMI_3D_TX_PHY_CMPMODECTRL		0x0c
-+#define HDMI_3D_TX_PHY_MEASCTRL			0x0d
-+#define HDMI_3D_TX_PHY_VLEVCTRL			0x0e
-+#define HDMI_3D_TX_PHY_D2ACTRL			0x0f
-+#define HDMI_3D_TX_PHY_CURRCTRL			0x10
-+#define HDMI_3D_TX_PHY_DRVANACTRL		0x11
-+#define HDMI_3D_TX_PHY_PLLMEASCTRL		0x12
-+#define HDMI_3D_TX_PHY_PLLPHBYCTRL		0x13
-+#define HDMI_3D_TX_PHY_GRP_CTRL			0x14
-+#define HDMI_3D_TX_PHY_GMPCTRL			0x15
-+#define HDMI_3D_TX_PHY_MPLLMEASCTRL		0x16
-+#define HDMI_3D_TX_PHY_MSM_CTRL			0x17
-+#define HDMI_3D_TX_PHY_SCRPB_STATUS		0x18
-+#define HDMI_3D_TX_PHY_TXTERM			0x19
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL		0x1a
-+#define HDMI_3D_TX_PHY_PATTERNGEN		0x1b
-+#define HDMI_3D_TX_PHY_SDCAP_MODE		0x1c
-+#define HDMI_3D_TX_PHY_SCOPEMODE		0x1d
-+#define HDMI_3D_TX_PHY_DIGTXMODE		0x1e
-+#define HDMI_3D_TX_PHY_STR_STATUS		0x1f
-+#define HDMI_3D_TX_PHY_SCOPECNT0		0x20
-+#define HDMI_3D_TX_PHY_SCOPECNT1		0x21
-+#define HDMI_3D_TX_PHY_SCOPECNT2		0x22
-+#define HDMI_3D_TX_PHY_SCOPECNTCLK		0x23
-+#define HDMI_3D_TX_PHY_SCOPESAMPLE		0x24
-+#define HDMI_3D_TX_PHY_SCOPECNTMSB01		0x25
-+#define HDMI_3D_TX_PHY_SCOPECNTMSB2CK		0x26
-+
-+/* HDMI_3D_TX_PHY_CKCALCTRL values */
-+#define HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE		BIT(15)
-+
-+/* HDMI_3D_TX_PHY_MSM_CTRL values */
-+#define HDMI_3D_TX_PHY_MSM_CTRL_MPLL_PH_SEL_CK		BIT(13)
-+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_CLK_REF_MPLL	(0 << 1)
-+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_OFF		(1 << 1)
-+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_PCLK		(2 << 1)
-+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK		(3 << 1)
-+#define HDMI_3D_TX_PHY_MSM_CTRL_SCOPE_CK_SEL		BIT(0)
-+
-+/* HDMI_3D_TX_PHY_PTRPT_ENBL values */
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_OVERRIDE		BIT(15)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT2		BIT(8)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT1		BIT(7)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT0		BIT(6)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_CK_REF_ENB		BIT(5)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_RCAL_ENB		BIT(4)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_TX_CLK_ALIGN_ENB	BIT(3)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_TX_READY		BIT(2)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_CKO_WORD_ENB		BIT(1)
-+#define HDMI_3D_TX_PHY_PTRPT_ENBL_REFCLK_ENB		BIT(0)
-+
- #endif /* __DW_HDMI_H__ */
diff --git a/patches.renesas/0252-drm-rcar-du-Make-sure-the-VSP-is-initialized-on-plat.patch b/patches.renesas/0252-drm-rcar-du-Make-sure-the-VSP-is-initialized-on-plat.patch
deleted file mode 100644
index 8341fed0702cac..00000000000000
--- a/patches.renesas/0252-drm-rcar-du-Make-sure-the-VSP-is-initialized-on-plat.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From d62aa80e6b7324dd2458fc3d4023a311ba894898 Mon Sep 17 00:00:00 2001
-From: Jacopo Mondi <jacopo+renesas@jmondi.org>
-Date: Fri, 3 Mar 2017 13:58:56 +0100
-Subject: [PATCH 252/286] drm: rcar-du: Make sure the VSP is initialized on
- platforms that need it
-
-On Gen3 platforms planes are managed by the external VSP compositor on
-behalf of DRM/KMS. If VSP compositor support is not enabled in the DU
-driver, the VSP initialization stub routine is called. Return an error
-from that stub to fail explicitly, otherwise the device won't be usable
-and the driver will crash.
-
-Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
-Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-[Clarified commit message]
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
-(cherry picked from commit 3115345577d8e8c912562a1dd555787f11fcaf06)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_vsp.h |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
-@@ -68,7 +68,7 @@ void rcar_du_vsp_disable(struct rcar_du_
- void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc);
- void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc);
- #else
--static inline int rcar_du_vsp_init(struct rcar_du_vsp *vsp) { return 0; };
-+static inline int rcar_du_vsp_init(struct rcar_du_vsp *vsp) { return -ENXIO; };
- static inline void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) { };
- static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { };
- static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { };
diff --git a/patches.renesas/0253-ARM-dts-r8a7745-initial-SoC-device-tree.patch b/patches.renesas/0253-ARM-dts-r8a7745-initial-SoC-device-tree.patch
deleted file mode 100644
index 71668c068b5167..00000000000000
--- a/patches.renesas/0253-ARM-dts-r8a7745-initial-SoC-device-tree.patch
+++ /dev/null
@@ -1,144 +0,0 @@
-From 9d3e10885b5fdc66063e5a7eb1af624e78ad1ca6 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sat, 5 Nov 2016 00:53:38 +0300
-Subject: [PATCH 253/299] ARM: dts: r8a7745: initial SoC device tree
-
-The  initial R8A7745 SoC device tree including CPU0, GIC, timer, SYSC, RST,
-CPG, and the required clock descriptions.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c95360247bdd67d39b55f7e743153efa64e4efe3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7745.dtsi |  120 +++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 120 insertions(+)
- create mode 100644 arch/arm/boot/dts/r8a7745.dtsi
-
---- /dev/null
-+++ b/arch/arm/boot/dts/r8a7745.dtsi
-@@ -0,0 +1,120 @@
-+/*
-+ * Device Tree Source for the r8a7745 SoC
-+ *
-+ * Copyright (C) 2016 Cogent Embedded Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2. This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include <dt-bindings/interrupt-controller/irq.h>
-+#include <dt-bindings/interrupt-controller/arm-gic.h>
-+#include <dt-bindings/clock/r8a7745-cpg-mssr.h>
-+#include <dt-bindings/power/r8a7745-sysc.h>
-+
-+/ {
-+	compatible = "renesas,r8a7745";
-+	#address-cells = <2>;
-+	#size-cells = <2>;
-+
-+	cpus {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		cpu0: cpu@0 {
-+			device_type = "cpu";
-+			compatible = "arm,cortex-a7";
-+			reg = <0>;
-+			clock-frequency = <1000000000>;
-+			clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
-+			power-domains = <&sysc R8A7745_PD_CA7_CPU0>;
-+			next-level-cache = <&L2_CA7>;
-+		};
-+
-+		L2_CA7: cache-controller@0 {
-+			compatible = "cache";
-+			reg = <0>;
-+			cache-unified;
-+			cache-level = <2>;
-+			power-domains = <&sysc R8A7745_PD_CA7_SCU>;
-+		};
-+	};
-+
-+	soc {
-+		compatible = "simple-bus";
-+		interrupt-parent = <&gic>;
-+
-+		#address-cells = <2>;
-+		#size-cells = <2>;
-+		ranges;
-+
-+		gic: interrupt-controller@f1001000 {
-+			compatible = "arm,gic-400";
-+			#interrupt-cells = <3>;
-+			#address-cells = <0>;
-+			interrupt-controller;
-+			reg = <0 0xf1001000 0 0x1000>,
-+			      <0 0xf1002000 0 0x1000>,
-+			      <0 0xf1004000 0 0x2000>,
-+			      <0 0xf1006000 0 0x2000>;
-+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
-+						 IRQ_TYPE_LEVEL_HIGH)>;
-+		};
-+
-+		timer {
-+			compatible = "arm,armv7-timer";
-+			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
-+						  IRQ_TYPE_LEVEL_LOW)>,
-+				     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
-+						  IRQ_TYPE_LEVEL_LOW)>,
-+				     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
-+						  IRQ_TYPE_LEVEL_LOW)>,
-+				     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
-+						  IRQ_TYPE_LEVEL_LOW)>;
-+		};
-+
-+		cpg: clock-controller@e6150000 {
-+			compatible = "renesas,r8a7745-cpg-mssr";
-+			reg = <0 0xe6150000 0 0x1000>;
-+			clocks = <&extal_clk>, <&usb_extal_clk>;
-+			clock-names = "extal", "usb_extal";
-+			#clock-cells = <2>;
-+			#power-domain-cells = <0>;
-+		};
-+
-+		sysc: system-controller@e6180000 {
-+			compatible = "renesas,r8a7745-sysc";
-+			reg = <0 0xe6180000 0 0x200>;
-+			#power-domain-cells = <1>;
-+		};
-+
-+		rst: reset-controller@e6160000 {
-+			compatible = "renesas,r8a7745-rst";
-+			reg = <0 0xe6160000 0 0x100>;
-+		};
-+	};
-+
-+	/* External root clock */
-+	extal_clk: extal {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		/* This value must be overridden by the board. */
-+		clock-frequency = <0>;
-+	};
-+
-+	/* External USB clock - can be overridden by the board */
-+	usb_extal_clk: usb_extal {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		clock-frequency = <48000000>;
-+	};
-+
-+	/* External SCIF clock */
-+	scif_clk: scif {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		/* This value must be overridden by the board. */
-+		clock-frequency = <0>;
-+	};
-+};
diff --git a/patches.renesas/0253-drm-bridge-dw-hdmi-Fix-the-name-of-the-PHY-reset-mac.patch b/patches.renesas/0253-drm-bridge-dw-hdmi-Fix-the-name-of-the-PHY-reset-mac.patch
deleted file mode 100644
index 1ed468fb8eecaa..00000000000000
--- a/patches.renesas/0253-drm-bridge-dw-hdmi-Fix-the-name-of-the-PHY-reset-mac.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From f198c768f1e44c6e644ab6be3a6d8e88b7846868 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:29:08 +0200
-Subject: [PATCH 253/255] drm: bridge: dw-hdmi: Fix the name of the PHY reset
- macros
-
-The PHY reset signal is controlled by bit PHYRSTZ in the MC_PHYRSTZ
-register. The signal is active low on Gen1 PHYs and active high on Gen2
-PHYs. The driver toggles the signal high then low, which is correct for
-all currently supported platforms, but the register values macros are
-incorrectly named. Replace them with a single macro named after the bit,
-and add a comment to the source code to explain the behaviour.
-
-The driver's behaviour isn't changed by this rename, the code will still
-need to be fixed to support Gen1 PHYs.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-19-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 54d72737b098f3597c57693e1aa96699a21b11fe)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |    6 +++---
- drivers/gpu/drm/bridge/dw-hdmi.h |    3 +--
- 2 files changed, 4 insertions(+), 5 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -986,9 +986,9 @@ static int hdmi_phy_configure(struct dw_
- 	/* gen2 pddq */
- 	dw_hdmi_phy_gen2_pddq(hdmi, 1);
- 
--	/* PHY reset */
--	hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_DEASSERT, HDMI_MC_PHYRSTZ);
--	hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_ASSERT, HDMI_MC_PHYRSTZ);
-+	/* PHY reset. The reset signal is active high on Gen2 PHYs. */
-+	hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ);
-+	hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ);
- 
- 	hdmi_writeb(hdmi, HDMI_MC_HEACPHY_RST_ASSERT, HDMI_MC_HEACPHY_RST);
- 
---- a/drivers/gpu/drm/bridge/dw-hdmi.h
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.h
-@@ -989,8 +989,7 @@ enum {
- 	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS = 0x0,
- 
- /* MC_PHYRSTZ field values */
--	HDMI_MC_PHYRSTZ_ASSERT = 0x0,
--	HDMI_MC_PHYRSTZ_DEASSERT = 0x1,
-+	HDMI_MC_PHYRSTZ_PHYRSTZ = 0x01,
- 
- /* MC_HEACPHY_RST field values */
- 	HDMI_MC_HEACPHY_RST_ASSERT = 0x1,
diff --git a/patches.renesas/0253-drm-rcar-du-Remove-wait-field-from-rcar_du_device-st.patch b/patches.renesas/0253-drm-rcar-du-Remove-wait-field-from-rcar_du_device-st.patch
deleted file mode 100644
index f57ac9e634a2a3..00000000000000
--- a/patches.renesas/0253-drm-rcar-du-Remove-wait-field-from-rcar_du_device-st.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From c76ef4565cc68f106335c39ea83ddd76172052f7 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 4 Mar 2017 23:49:27 +0200
-Subject: [PATCH 253/286] drm: rcar-du: Remove wait field from rcar_du_device
- structure
-
-The field is a left-over from the switch to the atomic commit helper.
-It's unused, remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit eff7fd6ba5e5764318e4c2bb85a11b9d3159137d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.c |    2 --
- drivers/gpu/drm/rcar-du/rcar_du_drv.h |    5 -----
- 2 files changed, 7 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -348,8 +348,6 @@ static int rcar_du_probe(struct platform
- 	if (rcdu == NULL)
- 		return -ENOMEM;
- 
--	init_waitqueue_head(&rcdu->commit.wait);
--
- 	rcdu->dev = &pdev->dev;
- 	rcdu->info = of_device_get_match_data(rcdu->dev);
- 
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-@@ -98,11 +98,6 @@ struct rcar_du_device {
- 	unsigned int vspd1_sink;
- 
- 	struct rcar_du_lvdsenc *lvds[RCAR_DU_MAX_LVDS];
--
--	struct {
--		wait_queue_head_t wait;
--		u32 pending;
--	} commit;
- };
- 
- static inline bool rcar_du_has(struct rcar_du_device *rcdu,
diff --git a/patches.renesas/0254-ARM-dts-r8a7745-add-SYS-DMAC-support.patch b/patches.renesas/0254-ARM-dts-r8a7745-add-SYS-DMAC-support.patch
deleted file mode 100644
index 280a6b034a9903..00000000000000
--- a/patches.renesas/0254-ARM-dts-r8a7745-add-SYS-DMAC-support.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From fa2b137c858ad5a3994621db8e02c8f46ce79bce Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sat, 5 Nov 2016 00:54:51 +0300
-Subject: [PATCH 254/299] ARM: dts: r8a7745: add SYS-DMAC support
-
-Describe SYS-DMAC0/1 in the R8A7745 device tree.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 06a80bad04291b6e305ef521550581d62b4656a3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7745.dtsi |   64 +++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 64 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7745.dtsi
-+++ b/arch/arm/boot/dts/r8a7745.dtsi
-@@ -93,6 +93,70 @@
- 			compatible = "renesas,r8a7745-rst";
- 			reg = <0 0xe6160000 0 0x100>;
- 		};
-+
-+		dmac0: dma-controller@e6700000 {
-+			compatible = "renesas,dmac-r8a7745",
-+				     "renesas,rcar-dmac";
-+			reg = <0 0xe6700000 0 0x20000>;
-+			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-names = "error",
-+					"ch0", "ch1", "ch2", "ch3",
-+					"ch4", "ch5", "ch6", "ch7",
-+					"ch8", "ch9", "ch10", "ch11",
-+					"ch12", "ch13", "ch14";
-+			clocks = <&cpg CPG_MOD 219>;
-+			clock-names = "fck";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			#dma-cells = <1>;
-+			dma-channels = <15>;
-+		};
-+
-+		dmac1: dma-controller@e6720000 {
-+			compatible = "renesas,dmac-r8a7745",
-+				     "renesas,rcar-dmac";
-+			reg = <0 0xe6720000 0 0x20000>;
-+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
-+				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-names = "error",
-+					"ch0", "ch1", "ch2", "ch3",
-+					"ch4", "ch5", "ch6", "ch7",
-+					"ch8", "ch9", "ch10", "ch11",
-+					"ch12", "ch13", "ch14";
-+			clocks = <&cpg CPG_MOD 218>;
-+			clock-names = "fck";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			#dma-cells = <1>;
-+			dma-channels = <15>;
-+		};
- 	};
- 
- 	/* External root clock */
diff --git a/patches.renesas/0254-drm-bridge-dw-hdmi-Assert-SVSRET-before-resetting-th.patch b/patches.renesas/0254-drm-bridge-dw-hdmi-Assert-SVSRET-before-resetting-th.patch
deleted file mode 100644
index 0698ffbeceaa2e..00000000000000
--- a/patches.renesas/0254-drm-bridge-dw-hdmi-Assert-SVSRET-before-resetting-th.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From ab642a05e52a7fca9c4eb62ddc5a61c1a7af3cb7 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 17 Jan 2017 10:29:09 +0200
-Subject: [PATCH 254/255] drm: bridge: dw-hdmi: Assert SVSRET before resetting
- the PHY
-
-According to the PHY IP core vendor, the SVSRET signal must be asserted
-before resetting the PHY. Tests on RK3288 and R-Car Gen3 showed no
-regression, the change should thus be safe.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Jose Abreu <joabreu@synopsys.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-20-laurent.pinchart+renesas@ideasonboard.com
-(cherry picked from commit 2668db37888ff63282147b00dcf54fa491831df3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |   10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -986,6 +986,10 @@ static int hdmi_phy_configure(struct dw_
- 	/* gen2 pddq */
- 	dw_hdmi_phy_gen2_pddq(hdmi, 1);
- 
-+	/* Leave low power consumption mode by asserting SVSRET. */
-+	if (hdmi->phy->has_svsret)
-+		dw_hdmi_phy_enable_svsret(hdmi, 1);
-+
- 	/* PHY reset. The reset signal is active high on Gen2 PHYs. */
- 	hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ);
- 	hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ);
-@@ -1028,11 +1032,7 @@ static int hdmi_phy_configure(struct dw_
- 	dw_hdmi_phy_gen2_txpwron(hdmi, 1);
- 	dw_hdmi_phy_gen2_pddq(hdmi, 0);
- 
--	/* The DWC MHL and HDMI 2.0 PHYs need the SVSRET signal to be set. */
--	if (hdmi->phy->has_svsret)
--		dw_hdmi_phy_enable_svsret(hdmi, 1);
--
--	/*Wait for PHY PLL lock */
-+	/* Wait for PHY PLL lock */
- 	msec = 5;
- 	do {
- 		val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
diff --git a/patches.renesas/0254-drm-rcar-du-Document-the-vsps-property-in-the-DT-bin.patch b/patches.renesas/0254-drm-rcar-du-Document-the-vsps-property-in-the-DT-bin.patch
deleted file mode 100644
index 126788b1703617..00000000000000
--- a/patches.renesas/0254-drm-rcar-du-Document-the-vsps-property-in-the-DT-bin.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 9ab1ce0cf42a0a195275c932ddab3c0d59c89957 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 27 Mar 2017 12:51:04 +0300
-Subject: [PATCH 254/286] drm: rcar-du: Document the vsps property in the DT
- bindings
-
-The property is used by the driver but is missing from the DT bindings.
-Document it.
-
-Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 06711e6385a4ab4c8f4225f6cb9382eed58625a7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/display/renesas,du.txt |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/Documentation/devicetree/bindings/display/renesas,du.txt
-+++ b/Documentation/devicetree/bindings/display/renesas,du.txt
-@@ -36,6 +36,9 @@ Required Properties:
-       When supplied they must be named "dclkin.x" with "x" being the input
-       clock numerical index.
- 
-+  - vsps: A list of phandles to the VSP nodes that handle the memory
-+    interfaces for the DU channels.
-+
- Required nodes:
- 
- The connections to the DU output video ports are modeled using the OF graph
diff --git a/patches.renesas/0255-ARM-dts-r8a7745-add-H-SCIF-A-B-support.patch b/patches.renesas/0255-ARM-dts-r8a7745-add-H-SCIF-A-B-support.patch
deleted file mode 100644
index ef33ac73f1b0ba..00000000000000
--- a/patches.renesas/0255-ARM-dts-r8a7745-add-H-SCIF-A-B-support.patch
+++ /dev/null
@@ -1,291 +0,0 @@
-From 05741c85b60f8261f0ed7f8a0d2466e96a90b01b Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sat, 5 Nov 2016 00:55:52 +0300
-Subject: [PATCH 255/299] ARM: dts: r8a7745: add [H]SCIF{|A|B} support
-
-Describe [H]SCIF{|A|B} ports in the R8A7745 device tree.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-[simon: consistently use tabs for indentation]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit e0d2da54c4d01ba27a4f50c9da94f7a011c6056b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7745.dtsi |  261 +++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 261 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7745.dtsi
-+++ b/arch/arm/boot/dts/r8a7745.dtsi
-@@ -157,6 +157,267 @@
- 			#dma-cells = <1>;
- 			dma-channels = <15>;
- 		};
-+
-+		scifa0: serial@e6c40000 {
-+			compatible = "renesas,scifa-r8a7745",
-+				     "renesas,rcar-gen2-scifa", "renesas,scifa";
-+			reg = <0 0xe6c40000 0 0x40>;
-+			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 204>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x21>, <&dmac0 0x22>,
-+			       <&dmac1 0x21>, <&dmac1 0x22>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifa1: serial@e6c50000 {
-+			compatible = "renesas,scifa-r8a7745",
-+				     "renesas,rcar-gen2-scifa", "renesas,scifa";
-+			reg = <0 0xe6c50000 0 0x40>;
-+			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 203>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x25>, <&dmac0 0x26>,
-+			       <&dmac1 0x25>, <&dmac1 0x26>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifa2: serial@e6c60000 {
-+			compatible = "renesas,scifa-r8a7745",
-+				     "renesas,rcar-gen2-scifa", "renesas,scifa";
-+			reg = <0 0xe6c60000 0 0x40>;
-+			interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 202>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x27>, <&dmac0 0x28>,
-+			       <&dmac1 0x27>, <&dmac1 0x28>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifa3: serial@e6c70000 {
-+			compatible = "renesas,scifa-r8a7745",
-+				     "renesas,rcar-gen2-scifa", "renesas,scifa";
-+			reg = <0 0xe6c70000 0 0x40>;
-+			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 1106>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
-+			       <&dmac1 0x1b>, <&dmac1 0x1c>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifa4: serial@e6c78000 {
-+			compatible = "renesas,scifa-r8a7745",
-+				     "renesas,rcar-gen2-scifa", "renesas,scifa";
-+			reg = <0 0xe6c78000 0 0x40>;
-+			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 1107>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
-+			       <&dmac1 0x1f>, <&dmac1 0x20>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifa5: serial@e6c80000 {
-+			compatible = "renesas,scifa-r8a7745",
-+				     "renesas,rcar-gen2-scifa", "renesas,scifa";
-+			reg = <0 0xe6c80000 0 0x40>;
-+			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 1108>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x23>, <&dmac0 0x24>,
-+			       <&dmac1 0x23>, <&dmac1 0x24>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifb0: serial@e6c20000 {
-+			compatible = "renesas,scifb-r8a7745",
-+				     "renesas,rcar-gen2-scifb", "renesas,scifb";
-+			reg = <0 0xe6c20000 0 0x100>;
-+			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 206>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
-+		       <&dmac1 0x3d>, <&dmac1 0x3e>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifb1: serial@e6c30000 {
-+			compatible = "renesas,scifb-r8a7745",
-+				     "renesas,rcar-gen2-scifb", "renesas,scifb";
-+			reg = <0 0xe6c30000 0 0x100>;
-+			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 207>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
-+			       <&dmac1 0x19>, <&dmac1 0x1a>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scifb2: serial@e6ce0000 {
-+			compatible = "renesas,scifb-r8a7745",
-+				     "renesas,rcar-gen2-scifb", "renesas,scifb";
-+			reg = <0 0xe6ce0000 0 0x100>;
-+			interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 216>;
-+			clock-names = "fck";
-+			dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
-+			       <&dmac1 0x1d>, <&dmac1 0x1e>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif0: serial@e6e60000 {
-+			compatible = "renesas,scif-r8a7745",
-+				     "renesas,rcar-gen2-scif", "renesas,scif";
-+			reg = <0 0xe6e60000 0 0x40>;
-+			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 721>,
-+				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
-+			       <&dmac1 0x29>, <&dmac1 0x2a>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif1: serial@e6e68000 {
-+			compatible = "renesas,scif-r8a7745",
-+				     "renesas,rcar-gen2-scif", "renesas,scif";
-+			reg = <0 0xe6e68000 0 0x40>;
-+			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 720>,
-+				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
-+			       <&dmac1 0x2d>, <&dmac1 0x2e>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif2: serial@e6e58000 {
-+			compatible = "renesas,scif-r8a7745",
-+				     "renesas,rcar-gen2-scif", "renesas,scif";
-+			reg = <0 0xe6e58000 0 0x40>;
-+			interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 719>,
-+				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
-+			       <&dmac1 0x2b>, <&dmac1 0x2c>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif3: serial@e6ea8000 {
-+			compatible = "renesas,scif-r8a7745",
-+				     "renesas,rcar-gen2-scif", "renesas,scif";
-+			reg = <0 0xe6ea8000 0 0x40>;
-+			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 718>,
-+				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
-+			       <&dmac1 0x2f>, <&dmac1 0x30>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif4: serial@e6ee0000 {
-+			compatible = "renesas,scif-r8a7745",
-+				     "renesas,rcar-gen2-scif", "renesas,scif";
-+			reg = <0 0xe6ee0000 0 0x40>;
-+			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 715>,
-+				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
-+			       <&dmac1 0xfb>, <&dmac1 0xfc>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		scif5: serial@e6ee8000 {
-+			compatible = "renesas,scif-r8a7745",
-+				     "renesas,rcar-gen2-scif", "renesas,scif";
-+			reg = <0 0xe6ee8000 0 0x40>;
-+			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 714>,
-+				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
-+			       <&dmac1 0xfd>, <&dmac1 0xfe>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		hscif0: serial@e62c0000 {
-+			compatible = "renesas,hscif-r8a7745",
-+				     "renesas,rcar-gen2-hscif", "renesas,hscif";
-+			reg = <0 0xe62c0000 0 0x60>;
-+			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 717>,
-+				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
-+			       <&dmac1 0x39>, <&dmac1 0x3a>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		hscif1: serial@e62c8000 {
-+			compatible = "renesas,hscif-r8a7745",
-+				     "renesas,rcar-gen2-hscif", "renesas,hscif";
-+			reg = <0 0xe62c8000 0 0x60>;
-+			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 716>,
-+				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
-+			       <&dmac1 0x4d>, <&dmac1 0x4e>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
-+
-+		hscif2: serial@e62d0000 {
-+			compatible = "renesas,hscif-r8a7745",
-+				     "renesas,rcar-gen2-hscif", "renesas,hscif";
-+			reg = <0 0xe62d0000 0 0x60>;
-+			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 713>,
-+				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
-+			clock-names = "fck", "brg_int", "scif_clk";
-+			dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
-+			       <&dmac1 0x3b>, <&dmac1 0x3c>;
-+			dma-names = "tx", "rx", "tx", "rx";
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			status = "disabled";
-+		};
- 	};
- 
- 	/* External root clock */
diff --git a/patches.renesas/0255-drm-bridge-dw-hdmi-fix-building-without-CONFIG_OF.patch b/patches.renesas/0255-drm-bridge-dw-hdmi-fix-building-without-CONFIG_OF.patch
deleted file mode 100644
index 91abafd081ec2c..00000000000000
--- a/patches.renesas/0255-drm-bridge-dw-hdmi-fix-building-without-CONFIG_OF.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 338ec844533e7bb1120f88f83a3fcc1d9618eef7 Mon Sep 17 00:00:00 2001
-From: Arnd Bergmann <arnd@arndb.de>
-Date: Mon, 23 Jan 2017 13:20:38 +0100
-Subject: [PATCH 255/255] drm: bridge: dw-hdmi: fix building without CONFIG_OF
-
-The of_node member in struct drm_bridge is hidden when CONFIG_OF
-is disabled, causing a build error:
-
-drivers/gpu/drm/bridge/dw-hdmi.c: In function '__dw_hdmi_probe':
-drivers/gpu/drm/bridge/dw-hdmi.c:2063:14: error: 'struct drm_bridge' has no member named 'of_node'
-
-We could fix this either using a Kconfig dependency on CONFIG_OF
-or making the one line conditional. The latter gives us better
-compile test coverage, so this is what I'm doing here.
-
-Fixes: 69497eb9234e ("drm: bridge: dw-hdmi: Implement DRM bridge registration")
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/20170123122312.3290934-1-arnd@arndb.de
-(cherry picked from commit d5ad78436a8829c9951d82b1b0bdec761dbabfa9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -2060,7 +2060,9 @@ __dw_hdmi_probe(struct platform_device *
- 
- 	hdmi->bridge.driver_private = hdmi;
- 	hdmi->bridge.funcs = &dw_hdmi_bridge_funcs;
-+#ifdef CONFIG_OF
- 	hdmi->bridge.of_node = pdev->dev.of_node;
-+#endif
- 
- 	ret = dw_hdmi_fb_registered(hdmi);
- 	if (ret)
diff --git a/patches.renesas/0255-drm-panel-Constify-device-node-argument-to-of_drm_fi.patch b/patches.renesas/0255-drm-panel-Constify-device-node-argument-to-of_drm_fi.patch
deleted file mode 100644
index 05022ad25ff43f..00000000000000
--- a/patches.renesas/0255-drm-panel-Constify-device-node-argument-to-of_drm_fi.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 0c56f4ba6b6cfb645ee9ca44bc3b172aa1c307bb Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 19 Nov 2016 05:28:05 +0200
-Subject: [PATCH 255/286] drm/panel: Constify device node argument to
- of_drm_find_panel()
-
-The argument is never modified by the function, make it const.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Thierry Reding <treding@nvidia.com>
-(cherry picked from commit 327bc443416d5aeb37e27704b2d91d2f86b8c621)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/drm_panel.c |    2 +-
- include/drm/drm_panel.h     |    4 ++--
- 2 files changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/drm_panel.c
-+++ b/drivers/gpu/drm/drm_panel.c
-@@ -137,7 +137,7 @@ EXPORT_SYMBOL(drm_panel_detach);
-  * Return: A pointer to the panel registered for the specified device tree
-  * node or NULL if no panel matching the device tree node can be found.
-  */
--struct drm_panel *of_drm_find_panel(struct device_node *np)
-+struct drm_panel *of_drm_find_panel(const struct device_node *np)
- {
- 	struct drm_panel *panel;
- 
---- a/include/drm/drm_panel.h
-+++ b/include/drm/drm_panel.h
-@@ -193,9 +193,9 @@ int drm_panel_attach(struct drm_panel *p
- int drm_panel_detach(struct drm_panel *panel);
- 
- #ifdef CONFIG_OF
--struct drm_panel *of_drm_find_panel(struct device_node *np);
-+struct drm_panel *of_drm_find_panel(const struct device_node *np);
- #else
--static inline struct drm_panel *of_drm_find_panel(struct device_node *np)
-+static inline struct drm_panel *of_drm_find_panel(const struct device_node *np)
- {
- 	return NULL;
- }
diff --git a/patches.renesas/0256-ARM-dts-r8a7745-add-Ether-support.patch b/patches.renesas/0256-ARM-dts-r8a7745-add-Ether-support.patch
deleted file mode 100644
index 6c79e7f4725abe..00000000000000
--- a/patches.renesas/0256-ARM-dts-r8a7745-add-Ether-support.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 59d0aac9d98b3cd6c6f949a6cd9c71741d852bff Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 4 Nov 2016 14:57:01 -0700
-Subject: [PATCH 256/299] ARM: dts: r8a7745: add Ether support
-
-Define the generic R8A7745 part of the Ether device node.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bed98a59b62d3e121da2d8372425fd4e424b0aa6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7745.dtsi |   12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7745.dtsi
-+++ b/arch/arm/boot/dts/r8a7745.dtsi
-@@ -418,6 +418,18 @@
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
- 			status = "disabled";
- 		};
-+
-+		ether: ethernet@ee700000 {
-+			compatible = "renesas,ether-r8a7745";
-+			reg = <0 0xee700000 0 0x400>;
-+			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 813>;
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			phy-mode = "rmii";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			status = "disabled";
-+		};
- 	};
- 
- 	/* External root clock */
diff --git a/patches.renesas/0256-drm-rcar-du-Use-the-DRM-panel-API.patch b/patches.renesas/0256-drm-rcar-du-Use-the-DRM-panel-API.patch
deleted file mode 100644
index 809feaeefebefb..00000000000000
--- a/patches.renesas/0256-drm-rcar-du-Use-the-DRM-panel-API.patch
+++ /dev/null
@@ -1,223 +0,0 @@
-From 574fd5f0558417ba105093380203d1777399bcb3 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 18 Nov 2016 03:22:37 +0200
-Subject: [PATCH 256/286] drm: rcar-du: Use the DRM panel API
-
-Instead of parsing the panel device tree node manually, use the panel
-API to delegate panel handling to a panel driver.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit bf7149f34241dcd6c95ea76b2b5ab4ff33f1c9b9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/Kconfig           |    1 
- drivers/gpu/drm/rcar-du/rcar_du_encoder.c |   22 +++++++++
- drivers/gpu/drm/rcar-du/rcar_du_encoder.h |    3 +
- drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c |   68 ++++++++++--------------------
- 4 files changed, 50 insertions(+), 44 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/Kconfig
-+++ b/drivers/gpu/drm/rcar-du/Kconfig
-@@ -20,6 +20,7 @@ config DRM_RCAR_HDMI
- config DRM_RCAR_LVDS
- 	bool "R-Car DU LVDS Encoder Support"
- 	depends on DRM_RCAR_DU
-+	select DRM_PANEL
- 	help
- 	  Enable support for the R-Car Display Unit embedded LVDS encoders.
- 
---- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-@@ -16,6 +16,7 @@
- #include <drm/drmP.h>
- #include <drm/drm_crtc.h>
- #include <drm/drm_crtc_helper.h>
-+#include <drm/drm_panel.h>
- 
- #include "rcar_du_drv.h"
- #include "rcar_du_encoder.h"
-@@ -33,6 +34,11 @@ static void rcar_du_encoder_disable(stru
- {
- 	struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
- 
-+	if (renc->connector && renc->connector->panel) {
-+		drm_panel_disable(renc->connector->panel);
-+		drm_panel_unprepare(renc->connector->panel);
-+	}
-+
- 	if (renc->lvds)
- 		rcar_du_lvdsenc_enable(renc->lvds, encoder->crtc, false);
- }
-@@ -43,6 +49,11 @@ static void rcar_du_encoder_enable(struc
- 
- 	if (renc->lvds)
- 		rcar_du_lvdsenc_enable(renc->lvds, encoder->crtc, true);
-+
-+	if (renc->connector && renc->connector->panel) {
-+		drm_panel_prepare(renc->connector->panel);
-+		drm_panel_enable(renc->connector->panel);
-+	}
- }
- 
- static int rcar_du_encoder_atomic_check(struct drm_encoder *encoder,
-@@ -89,6 +100,17 @@ static void rcar_du_encoder_mode_set(str
- 	struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
- 
- 	rcar_du_crtc_route_output(crtc_state->crtc, renc->output);
-+
-+	if (!renc->lvds) {
-+		/*
-+		 * The DU driver creates connectors only for the outputs of the
-+		 * internal LVDS encoders.
-+		 */
-+		renc->connector = NULL;
-+		return;
-+	}
-+
-+	renc->connector = to_rcar_connector(conn_state->connector);
- }
- 
- static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
---- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-@@ -16,6 +16,7 @@
- 
- #include <drm/drm_crtc.h>
- 
-+struct drm_panel;
- struct rcar_du_device;
- struct rcar_du_hdmienc;
- struct rcar_du_lvdsenc;
-@@ -31,6 +32,7 @@ enum rcar_du_encoder_type {
- struct rcar_du_encoder {
- 	struct drm_encoder base;
- 	enum rcar_du_output output;
-+	struct rcar_du_connector *connector;
- 	struct rcar_du_hdmienc *hdmi;
- 	struct rcar_du_lvdsenc *lvds;
- };
-@@ -43,6 +45,7 @@ struct rcar_du_encoder {
- struct rcar_du_connector {
- 	struct drm_connector connector;
- 	struct rcar_du_encoder *encoder;
-+	struct drm_panel *panel;
- };
- 
- #define to_rcar_connector(c) \
---- a/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
-@@ -15,6 +15,7 @@
- #include <drm/drm_atomic_helper.h>
- #include <drm/drm_crtc.h>
- #include <drm/drm_crtc_helper.h>
-+#include <drm/drm_panel.h>
- 
- #include <video/display_timing.h>
- #include <video/of_display_timing.h>
-@@ -25,47 +26,30 @@
- #include "rcar_du_kms.h"
- #include "rcar_du_lvdscon.h"
- 
--struct rcar_du_lvds_connector {
--	struct rcar_du_connector connector;
--
--	struct {
--		unsigned int width_mm;		/* Panel width in mm */
--		unsigned int height_mm;		/* Panel height in mm */
--		struct videomode mode;
--	} panel;
--};
--
--#define to_rcar_lvds_connector(c) \
--	container_of(c, struct rcar_du_lvds_connector, connector.connector)
--
- static int rcar_du_lvds_connector_get_modes(struct drm_connector *connector)
- {
--	struct rcar_du_lvds_connector *lvdscon =
--		to_rcar_lvds_connector(connector);
--	struct drm_display_mode *mode;
--
--	mode = drm_mode_create(connector->dev);
--	if (mode == NULL)
--		return 0;
-+	struct rcar_du_connector *rcon = to_rcar_connector(connector);
- 
--	mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
--
--	drm_display_mode_from_videomode(&lvdscon->panel.mode, mode);
--
--	drm_mode_probed_add(connector, mode);
--
--	return 1;
-+	return drm_panel_get_modes(rcon->panel);
- }
- 
- static const struct drm_connector_helper_funcs connector_helper_funcs = {
- 	.get_modes = rcar_du_lvds_connector_get_modes,
- };
- 
-+static void rcar_du_lvds_connector_destroy(struct drm_connector *connector)
-+{
-+	struct rcar_du_connector *rcon = to_rcar_connector(connector);
-+
-+	drm_panel_detach(rcon->panel);
-+	drm_connector_cleanup(connector);
-+}
-+
- static const struct drm_connector_funcs connector_funcs = {
- 	.dpms = drm_atomic_helper_connector_dpms,
- 	.reset = drm_atomic_helper_connector_reset,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
--	.destroy = drm_connector_cleanup,
-+	.destroy = rcar_du_lvds_connector_destroy,
- 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
- 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
- };
-@@ -75,27 +59,19 @@ int rcar_du_lvds_connector_init(struct r
- 				const struct device_node *np)
- {
- 	struct drm_encoder *encoder = rcar_encoder_to_drm_encoder(renc);
--	struct rcar_du_lvds_connector *lvdscon;
-+	struct rcar_du_connector *rcon;
- 	struct drm_connector *connector;
--	struct display_timing timing;
- 	int ret;
- 
--	lvdscon = devm_kzalloc(rcdu->dev, sizeof(*lvdscon), GFP_KERNEL);
--	if (lvdscon == NULL)
-+	rcon = devm_kzalloc(rcdu->dev, sizeof(*rcon), GFP_KERNEL);
-+	if (rcon == NULL)
- 		return -ENOMEM;
- 
--	ret = of_get_display_timing(np, "panel-timing", &timing);
--	if (ret < 0)
--		return ret;
--
--	videomode_from_timing(&timing, &lvdscon->panel.mode);
-+	connector = &rcon->connector;
- 
--	of_property_read_u32(np, "width-mm", &lvdscon->panel.width_mm);
--	of_property_read_u32(np, "height-mm", &lvdscon->panel.height_mm);
--
--	connector = &lvdscon->connector.connector;
--	connector->display_info.width_mm = lvdscon->panel.width_mm;
--	connector->display_info.height_mm = lvdscon->panel.height_mm;
-+	rcon->panel = of_drm_find_panel(np);
-+	if (!rcon->panel)
-+		return -EPROBE_DEFER;
- 
- 	ret = drm_connector_init(rcdu->ddev, connector, &connector_funcs,
- 				 DRM_MODE_CONNECTOR_LVDS);
-@@ -112,7 +88,11 @@ int rcar_du_lvds_connector_init(struct r
- 	if (ret < 0)
- 		return ret;
- 
--	lvdscon->connector.encoder = renc;
-+	ret = drm_panel_attach(rcon->panel, connector);
-+	if (ret < 0)
-+		return ret;
-+
-+	rcon->encoder = renc;
- 
- 	return 0;
- }
diff --git a/patches.renesas/0257-ARM-dts-r8a7745-add-IRQC-support.patch b/patches.renesas/0257-ARM-dts-r8a7745-add-IRQC-support.patch
deleted file mode 100644
index 06fdb1a3e78b0f..00000000000000
--- a/patches.renesas/0257-ARM-dts-r8a7745-add-IRQC-support.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From e9820b57258070c818d42906e2ef8344113d4aac Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sat, 5 Nov 2016 00:59:37 +0300
-Subject: [PATCH 257/299] ARM: dts: r8a7745: add IRQC support
-
-Describe the IRQC interrupt controller in the R8A7745 device tree.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 28c43fbb3ca0a9a8f547aece94dac8d791358444)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7745.dtsi |   19 +++++++++++++++++++
- 1 file changed, 19 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7745.dtsi
-+++ b/arch/arm/boot/dts/r8a7745.dtsi
-@@ -62,6 +62,25 @@
- 						 IRQ_TYPE_LEVEL_HIGH)>;
- 		};
- 
-+		irqc: interrupt-controller@e61c0000 {
-+			compatible = "renesas,irqc-r8a7745", "renesas,irqc";
-+			#interrupt-cells = <2>;
-+			interrupt-controller;
-+			reg = <0 0xe61c0000 0 0x200>;
-+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&cpg CPG_MOD 407>;
-+			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+		};
-+
- 		timer {
- 			compatible = "arm,armv7-timer";
- 			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
diff --git a/patches.renesas/0257-drm-Add-data-transmission-order-bus-flag.patch b/patches.renesas/0257-drm-Add-data-transmission-order-bus-flag.patch
deleted file mode 100644
index 8b584a7b730e3c..00000000000000
--- a/patches.renesas/0257-drm-Add-data-transmission-order-bus-flag.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 4418c9f47b583d0511cce3a844268a9bcce80fe2 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 18 Nov 2016 16:55:48 +0200
-Subject: [PATCH 257/286] drm: Add data transmission order bus flag
-
-The flags indicate whether data is transmitted LSB to MSB or MSB to LSB
-on the bus.
-
-The exact meaning is bus-type dependent. For instance, for LVDS buses
-the flags indicate whether the seven data bits transmitted in a clock
-pulse are sent in normal order (MSB to LSB, slots 0 to 6) or reverse
-order (LSB to MSB, slots 6 to 0).
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Thierry Reding <treding@nvidia.com>
-(cherry picked from commit 5ec1a96010aa7aff19adba92a8163ef8f8c5c1ad)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/drm/drm_connector.h |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/include/drm/drm_connector.h
-+++ b/include/drm/drm_connector.h
-@@ -159,6 +159,10 @@ struct drm_display_info {
- #define DRM_BUS_FLAG_PIXDATA_POSEDGE	(1<<2)
- /* drive data on neg. edge */
- #define DRM_BUS_FLAG_PIXDATA_NEGEDGE	(1<<3)
-+/* data is transmitted MSB to LSB on the bus */
-+#define DRM_BUS_FLAG_DATA_MSB_TO_LSB	(1<<4)
-+/* data is transmitted LSB to MSB on the bus */
-+#define DRM_BUS_FLAG_DATA_LSB_TO_MSB	(1<<5)
- 
- 	/**
- 	 * @bus_flags: Additional information (like pixel signal polarity) for
diff --git a/patches.renesas/0258-ARM-dts-sk-rzg1e-initial-device-tree.patch b/patches.renesas/0258-ARM-dts-sk-rzg1e-initial-device-tree.patch
deleted file mode 100644
index 1be1c371452c41..00000000000000
--- a/patches.renesas/0258-ARM-dts-sk-rzg1e-initial-device-tree.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From 8fad1644964cb472a5a0def9880db095b5d8629c Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sat, 5 Nov 2016 01:04:32 +0300
-Subject: [PATCH 258/299] ARM: dts: sk-rzg1e: initial device tree
-
-Add the initial  device tree for the R8A7745 SoC based SK-RZG1E board.
-The board has 1  debug  serial  port (SCIF2); include support for it,
-so that the serial console can  work.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e9189e66dbdcd9705697c8b283b5b142b87da9aa)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile             |    1 
- arch/arm/boot/dts/r8a7745-sk-rzg1e.dts |   39 +++++++++++++++++++++++++++++++++
- 2 files changed, 40 insertions(+)
- create mode 100644 arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -679,6 +679,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
- 	r8a73a4-ape6evm.dtb \
- 	r8a7740-armadillo800eva.dtb \
- 	r8a7743-sk-rzg1m.dtb \
-+	r8a7745-sk-rzg1e.dtb \
- 	r8a7778-bockw.dtb \
- 	r8a7779-marzen.dtb \
- 	r8a7790-lager.dtb \
---- /dev/null
-+++ b/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
-@@ -0,0 +1,39 @@
-+/*
-+ * Device Tree Source for the SK-RZG1E board
-+ *
-+ * Copyright (C) 2016 Cogent Embedded, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2. This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+#include "r8a7745.dtsi"
-+
-+/ {
-+	model = "SK-RZG1E";
-+	compatible = "renesas,sk-rzg1e", "renesas,r8a7745";
-+
-+	aliases {
-+		serial0 = &scif2;
-+	};
-+
-+	chosen {
-+		bootargs = "ignore_loglevel";
-+		stdout-path = "serial0:115200n8";
-+	};
-+
-+	memory@40000000 {
-+		device_type = "memory";
-+		reg = <0 0x40000000 0 0x40000000>;
-+	};
-+};
-+
-+&extal_clk {
-+	clock-frequency = <20000000>;
-+};
-+
-+&scif2 {
-+	status = "okay";
-+};
diff --git a/patches.renesas/0258-drm-rcar-du-Add-support-for-LVDS-mode-selection.patch b/patches.renesas/0258-drm-rcar-du-Add-support-for-LVDS-mode-selection.patch
deleted file mode 100644
index 12dfff433e4476..00000000000000
--- a/patches.renesas/0258-drm-rcar-du-Add-support-for-LVDS-mode-selection.patch
+++ /dev/null
@@ -1,134 +0,0 @@
-From d6b1448ad501ad50c1d7762761a2d7c193422a51 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 3 Oct 2016 13:07:02 +0300
-Subject: [PATCH 258/286] drm: rcar-du: Add support for LVDS mode selection
-
-Retrieve the LVDS mode from the panel and configure the LVDS encoder
-accordingly. LVDS mode selection is static as LVDS panels can't be
-hot-plugged on any of the device supported by the driver. Support for
-dynamic mode selection can be implemented in the future when needed.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit e947eccbeba45268bf3b5f4e30185d9bb87a293d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_encoder.c |   27 +++++++++++++++++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c |   11 +++++++++--
- drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.h |   13 +++++++++++++
- 3 files changed, 49 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-@@ -98,6 +98,8 @@ static void rcar_du_encoder_mode_set(str
- 				     struct drm_connector_state *conn_state)
- {
- 	struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
-+	struct drm_display_info *info = &conn_state->connector->display_info;
-+	enum rcar_lvds_mode mode;
- 
- 	rcar_du_crtc_route_output(crtc_state->crtc, renc->output);
- 
-@@ -111,6 +113,31 @@ static void rcar_du_encoder_mode_set(str
- 	}
- 
- 	renc->connector = to_rcar_connector(conn_state->connector);
-+
-+	if (!info->num_bus_formats || !info->bus_formats) {
-+		dev_err(encoder->dev->dev, "no LVDS bus format reported\n");
-+		return;
-+	}
-+
-+	switch (info->bus_formats[0]) {
-+	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
-+	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
-+		mode = RCAR_LVDS_MODE_JEIDA;
-+		break;
-+	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
-+		mode = RCAR_LVDS_MODE_VESA;
-+		break;
-+	default:
-+		dev_err(encoder->dev->dev,
-+			"unsupported LVDS bus format 0x%04x\n",
-+			info->bus_formats[0]);
-+		return;
-+	}
-+
-+	if (info->bus_flags & DRM_BUS_FLAG_DATA_LSB_TO_MSB)
-+		mode |= RCAR_LVDS_MODE_MIRROR;
-+
-+	rcar_du_lvdsenc_set_mode(renc->lvds, mode);
- }
- 
- static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
---- a/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c
-@@ -31,6 +31,7 @@ struct rcar_du_lvdsenc {
- 	bool enabled;
- 
- 	enum rcar_lvds_input input;
-+	enum rcar_lvds_mode mode;
- };
- 
- static void rcar_lvds_write(struct rcar_du_lvdsenc *lvds, u32 reg, u32 data)
-@@ -61,7 +62,7 @@ static void rcar_du_lvdsenc_start_gen2(s
- 	/* Select the input, hardcode mode 0, enable LVDS operation and turn
- 	 * bias circuitry on.
- 	 */
--	lvdcr0 = LVDCR0_BEN | LVDCR0_LVEN;
-+	lvdcr0 = (lvds->mode << LVDCR0_LVMD_SHIFT) | LVDCR0_BEN | LVDCR0_LVEN;
- 	if (rcrtc->index == 2)
- 		lvdcr0 |= LVDCR0_DUSEL;
- 	rcar_lvds_write(lvds, LVDCR0, lvdcr0);
-@@ -114,7 +115,7 @@ static void rcar_du_lvdsenc_start_gen3(s
- 	 * Turn the PLL on, set it to LVDS normal mode, wait for the startup
- 	 * delay and turn the output on.
- 	 */
--	lvdcr0 = LVDCR0_PLLON;
-+	lvdcr0 = (lvds->mode << LVDCR0_LVMD_SHIFT) | LVDCR0_PLLON;
- 	rcar_lvds_write(lvds, LVDCR0, lvdcr0);
- 
- 	lvdcr0 |= LVDCR0_PWD;
-@@ -211,6 +212,12 @@ void rcar_du_lvdsenc_atomic_check(struct
- 		mode->clock = clamp(mode->clock, 25175, 148500);
- }
- 
-+void rcar_du_lvdsenc_set_mode(struct rcar_du_lvdsenc *lvds,
-+			      enum rcar_lvds_mode mode)
-+{
-+	lvds->mode = mode;
-+}
-+
- static int rcar_du_lvdsenc_get_resources(struct rcar_du_lvdsenc *lvds,
- 					 struct platform_device *pdev)
- {
---- a/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.h
-@@ -26,8 +26,17 @@ enum rcar_lvds_input {
- 	RCAR_LVDS_INPUT_DU2,
- };
- 
-+/* Keep in sync with the LVDCR0.LVMD hardware register values. */
-+enum rcar_lvds_mode {
-+	RCAR_LVDS_MODE_JEIDA = 0,
-+	RCAR_LVDS_MODE_MIRROR = 1,
-+	RCAR_LVDS_MODE_VESA = 4,
-+};
-+
- #if IS_ENABLED(CONFIG_DRM_RCAR_LVDS)
- int rcar_du_lvdsenc_init(struct rcar_du_device *rcdu);
-+void rcar_du_lvdsenc_set_mode(struct rcar_du_lvdsenc *lvds,
-+			      enum rcar_lvds_mode mode);
- int rcar_du_lvdsenc_enable(struct rcar_du_lvdsenc *lvds,
- 			   struct drm_crtc *crtc, bool enable);
- void rcar_du_lvdsenc_atomic_check(struct rcar_du_lvdsenc *lvds,
-@@ -37,6 +46,10 @@ static inline int rcar_du_lvdsenc_init(s
- {
- 	return 0;
- }
-+static inline void rcar_du_lvdsenc_set_mode(struct rcar_du_lvdsenc *lvds,
-+					    enum rcar_lvds_mode mode)
-+{
-+}
- static inline int rcar_du_lvdsenc_enable(struct rcar_du_lvdsenc *lvds,
- 					 struct drm_crtc *crtc, bool enable)
- {
diff --git a/patches.renesas/0259-ARM-dts-sk-rzg1e-add-Ether-support.patch b/patches.renesas/0259-ARM-dts-sk-rzg1e-add-Ether-support.patch
deleted file mode 100644
index ff2bc67e950ae5..00000000000000
--- a/patches.renesas/0259-ARM-dts-sk-rzg1e-add-Ether-support.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 19255ec8084ada6370dfec9cdcb9a0ce13183949 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sat, 5 Nov 2016 01:05:28 +0300
-Subject: [PATCH 259/299] ARM: dts: sk-rzg1e: add Ether support
-
-Define the SK-RZG1E board dependent part of the Ether device node.
-Enable DHCP and NFS root  for the kernel booting.
-
-Based on the original (and large) patch by Dmitry Shifrin
-<dmitry.shifrin@cogentembedded.com>.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6b334366e63678c777367002eb87c297a10d2751)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7745-sk-rzg1e.dts |   15 ++++++++++++++-
- 1 file changed, 14 insertions(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
-+++ b/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
-@@ -20,7 +20,7 @@
- 	};
- 
- 	chosen {
--		bootargs = "ignore_loglevel";
-+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
- 		stdout-path = "serial0:115200n8";
- 	};
- 
-@@ -37,3 +37,16 @@
- &scif2 {
- 	status = "okay";
- };
-+
-+&ether {
-+	phy-handle = <&phy1>;
-+	renesas,ether-link-active-low;
-+	status = "okay";
-+
-+	phy1: ethernet-phy@1 {
-+		reg = <1>;
-+		interrupt-parent = <&irqc>;
-+		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
-+		micrel,led-mode = <1>;
-+	};
-+};
diff --git a/patches.renesas/0259-drm-rcar-du-Replace-manual-bridge-implementation-wit.patch b/patches.renesas/0259-drm-rcar-du-Replace-manual-bridge-implementation-wit.patch
deleted file mode 100644
index b535e31a7c17dd..00000000000000
--- a/patches.renesas/0259-drm-rcar-du-Replace-manual-bridge-implementation-wit.patch
+++ /dev/null
@@ -1,516 +0,0 @@
-From 5d62be51d3bb98b76f711928ab7b309ee00776be Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 7 Oct 2016 16:01:41 +0300
-Subject: [PATCH 259/286] drm: rcar-du: Replace manual bridge implementation
- with DRM bridge
-
-The rcar-du driver contains a manual implementation of HDMI and VGA
-bridges. Use DRM bridges to replace it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 5c602531feb3db3926cdd76dda89314f0634c9e7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/Kconfig           |    6 -
- drivers/gpu/drm/rcar-du/Makefile          |    5 -
- drivers/gpu/drm/rcar-du/rcar_du_encoder.c |  108 +++++++++++++-----------
- drivers/gpu/drm/rcar-du/rcar_du_encoder.h |    2 
- drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c |  134 ------------------------------
- drivers/gpu/drm/rcar-du/rcar_du_hdmienc.h |   35 -------
- drivers/gpu/drm/rcar-du/rcar_du_vgacon.c  |   82 ------------------
- drivers/gpu/drm/rcar-du/rcar_du_vgacon.h  |   23 -----
- 8 files changed, 62 insertions(+), 333 deletions(-)
- delete mode 100644 drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
- delete mode 100644 drivers/gpu/drm/rcar-du/rcar_du_hdmienc.h
- delete mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vgacon.c
- delete mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vgacon.h
-
---- a/drivers/gpu/drm/rcar-du/Kconfig
-+++ b/drivers/gpu/drm/rcar-du/Kconfig
-@@ -11,12 +11,6 @@ config DRM_RCAR_DU
- 	  Choose this option if you have an R-Car chipset.
- 	  If M is selected the module will be called rcar-du-drm.
- 
--config DRM_RCAR_HDMI
--	bool "R-Car DU HDMI Encoder Support"
--	depends on DRM_RCAR_DU
--	help
--	  Enable support for external HDMI encoders.
--
- config DRM_RCAR_LVDS
- 	bool "R-Car DU LVDS Encoder Support"
- 	depends on DRM_RCAR_DU
---- a/drivers/gpu/drm/rcar-du/Makefile
-+++ b/drivers/gpu/drm/rcar-du/Makefile
-@@ -4,10 +4,7 @@ rcar-du-drm-y := rcar_du_crtc.o \
- 		 rcar_du_group.o \
- 		 rcar_du_kms.o \
- 		 rcar_du_lvdscon.o \
--		 rcar_du_plane.o \
--		 rcar_du_vgacon.o
--
--rcar-du-drm-$(CONFIG_DRM_RCAR_HDMI)	+= rcar_du_hdmienc.o
-+		 rcar_du_plane.o
- 
- rcar-du-drm-$(CONFIG_DRM_RCAR_LVDS)	+= rcar_du_lvdsenc.o
- 
---- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-@@ -20,11 +20,9 @@
- 
- #include "rcar_du_drv.h"
- #include "rcar_du_encoder.h"
--#include "rcar_du_hdmienc.h"
- #include "rcar_du_kms.h"
- #include "rcar_du_lvdscon.h"
- #include "rcar_du_lvdsenc.h"
--#include "rcar_du_vgacon.h"
- 
- /* -----------------------------------------------------------------------------
-  * Encoder
-@@ -63,30 +61,36 @@ static int rcar_du_encoder_atomic_check(
- 	struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
- 	struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
- 	const struct drm_display_mode *mode = &crtc_state->mode;
--	const struct drm_display_mode *panel_mode;
- 	struct drm_connector *connector = conn_state->connector;
- 	struct drm_device *dev = encoder->dev;
- 
--	/* DAC encoders have currently no restriction on the mode. */
--	if (encoder->encoder_type == DRM_MODE_ENCODER_DAC)
--		return 0;
-+	/*
-+	 * Only panel-related encoder types require validation here, everything
-+	 * else is handled by the bridge drivers.
-+	 */
-+	if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS) {
-+		const struct drm_display_mode *panel_mode;
-+
-+		if (list_empty(&connector->modes)) {
-+			dev_dbg(dev->dev, "encoder: empty modes list\n");
-+			return -EINVAL;
-+		}
-+
-+		panel_mode = list_first_entry(&connector->modes,
-+					      struct drm_display_mode, head);
-+
-+		/* We're not allowed to modify the resolution. */
-+		if (mode->hdisplay != panel_mode->hdisplay ||
-+		    mode->vdisplay != panel_mode->vdisplay)
-+			return -EINVAL;
- 
--	if (list_empty(&connector->modes)) {
--		dev_dbg(dev->dev, "encoder: empty modes list\n");
--		return -EINVAL;
-+		/*
-+		 * The flat panel mode is fixed, just copy it to the adjusted
-+		 * mode.
-+		 */
-+		drm_mode_copy(adjusted_mode, panel_mode);
- 	}
- 
--	panel_mode = list_first_entry(&connector->modes,
--				      struct drm_display_mode, head);
--
--	/* We're not allowed to modify the resolution. */
--	if (mode->hdisplay != panel_mode->hdisplay ||
--	    mode->vdisplay != panel_mode->vdisplay)
--		return -EINVAL;
--
--	/* The flat panel mode is fixed, just copy it to the adjusted mode. */
--	drm_mode_copy(adjusted_mode, panel_mode);
--
- 	if (renc->lvds)
- 		rcar_du_lvdsenc_atomic_check(renc->lvds, adjusted_mode);
- 
-@@ -159,6 +163,7 @@ int rcar_du_encoder_init(struct rcar_du_
- {
- 	struct rcar_du_encoder *renc;
- 	struct drm_encoder *encoder;
-+	struct drm_bridge *bridge = NULL;
- 	unsigned int encoder_type;
- 	int ret;
- 
-@@ -182,6 +187,15 @@ int rcar_du_encoder_init(struct rcar_du_
- 		break;
- 	}
- 
-+	if (enc_node) {
-+		/* Locate the DRM bridge from the encoder DT node. */
-+		bridge = of_drm_find_bridge(enc_node);
-+		if (!bridge) {
-+			ret = -EPROBE_DEFER;
-+			goto done;
-+		}
-+	}
-+
- 	switch (type) {
- 	case RCAR_DU_ENCODER_VGA:
- 		encoder_type = DRM_MODE_ENCODER_DAC;
-@@ -199,35 +213,35 @@ int rcar_du_encoder_init(struct rcar_du_
- 		break;
- 	}
- 
--	if (type == RCAR_DU_ENCODER_HDMI) {
--		ret = rcar_du_hdmienc_init(rcdu, renc, enc_node);
--		if (ret < 0)
--			goto done;
--	} else {
--		ret = drm_encoder_init(rcdu->ddev, encoder, &encoder_funcs,
--				       encoder_type, NULL);
--		if (ret < 0)
--			goto done;
-+	ret = drm_encoder_init(rcdu->ddev, encoder, &encoder_funcs,
-+			       encoder_type, NULL);
-+	if (ret < 0)
-+		goto done;
- 
--		drm_encoder_helper_add(encoder, &encoder_helper_funcs);
--	}
-+	drm_encoder_helper_add(encoder, &encoder_helper_funcs);
- 
--	switch (encoder_type) {
--	case DRM_MODE_ENCODER_LVDS:
--		ret = rcar_du_lvds_connector_init(rcdu, renc, con_node);
--		break;
--
--	case DRM_MODE_ENCODER_DAC:
--		ret = rcar_du_vga_connector_init(rcdu, renc);
--		break;
--
--	case DRM_MODE_ENCODER_TMDS:
--		/* connector managed by the bridge driver */
--		break;
--
--	default:
--		ret = -EINVAL;
--		break;
-+	if (bridge) {
-+		/*
-+		 * Attach the bridge to the encoder. The bridge will create the
-+		 * connector.
-+		 */
-+		ret = drm_bridge_attach(encoder, bridge, NULL);
-+		if (ret) {
-+			drm_encoder_cleanup(encoder);
-+			return ret;
-+		}
-+	} else {
-+		/* There's no bridge, create the connector manually. */
-+		switch (output) {
-+		case RCAR_DU_OUTPUT_LVDS0:
-+		case RCAR_DU_OUTPUT_LVDS1:
-+			ret = rcar_du_lvds_connector_init(rcdu, renc, con_node);
-+			break;
-+
-+		default:
-+			ret = -EINVAL;
-+			break;
-+		}
- 	}
- 
- done:
---- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-@@ -18,7 +18,6 @@
- 
- struct drm_panel;
- struct rcar_du_device;
--struct rcar_du_hdmienc;
- struct rcar_du_lvdsenc;
- 
- enum rcar_du_encoder_type {
-@@ -33,7 +32,6 @@ struct rcar_du_encoder {
- 	struct drm_encoder base;
- 	enum rcar_du_output output;
- 	struct rcar_du_connector *connector;
--	struct rcar_du_hdmienc *hdmi;
- 	struct rcar_du_lvdsenc *lvds;
- };
- 
---- a/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
-+++ /dev/null
-@@ -1,134 +0,0 @@
--/*
-- * R-Car Display Unit HDMI Encoder
-- *
-- * Copyright (C) 2014 Renesas Electronics Corporation
-- *
-- * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; either version 2 of the License, or
-- * (at your option) any later version.
-- */
--
--#include <linux/slab.h>
--
--#include <drm/drmP.h>
--#include <drm/drm_crtc.h>
--#include <drm/drm_crtc_helper.h>
--
--#include "rcar_du_drv.h"
--#include "rcar_du_encoder.h"
--#include "rcar_du_hdmienc.h"
--#include "rcar_du_lvdsenc.h"
--
--struct rcar_du_hdmienc {
--	struct rcar_du_encoder *renc;
--	bool enabled;
--};
--
--#define to_rcar_hdmienc(e)	(to_rcar_encoder(e)->hdmi)
--
--static void rcar_du_hdmienc_disable(struct drm_encoder *encoder)
--{
--	struct rcar_du_hdmienc *hdmienc = to_rcar_hdmienc(encoder);
--
--	if (hdmienc->renc->lvds)
--		rcar_du_lvdsenc_enable(hdmienc->renc->lvds, encoder->crtc,
--				       false);
--
--	hdmienc->enabled = false;
--}
--
--static void rcar_du_hdmienc_enable(struct drm_encoder *encoder)
--{
--	struct rcar_du_hdmienc *hdmienc = to_rcar_hdmienc(encoder);
--
--	if (hdmienc->renc->lvds)
--		rcar_du_lvdsenc_enable(hdmienc->renc->lvds, encoder->crtc,
--				       true);
--
--	hdmienc->enabled = true;
--}
--
--static int rcar_du_hdmienc_atomic_check(struct drm_encoder *encoder,
--					struct drm_crtc_state *crtc_state,
--					struct drm_connector_state *conn_state)
--{
--	struct rcar_du_hdmienc *hdmienc = to_rcar_hdmienc(encoder);
--	struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
--
--	if (hdmienc->renc->lvds)
--		rcar_du_lvdsenc_atomic_check(hdmienc->renc->lvds,
--					     adjusted_mode);
--
--	return 0;
--}
--
--
--static void rcar_du_hdmienc_mode_set(struct drm_encoder *encoder,
--				     struct drm_crtc_state *crtc_state,
--				     struct drm_connector_state *conn_state)
--{
--	struct rcar_du_hdmienc *hdmienc = to_rcar_hdmienc(encoder);
--
--	rcar_du_crtc_route_output(crtc_state->crtc, hdmienc->renc->output);
--}
--
--static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
--	.atomic_mode_set = rcar_du_hdmienc_mode_set,
--	.disable = rcar_du_hdmienc_disable,
--	.enable = rcar_du_hdmienc_enable,
--	.atomic_check = rcar_du_hdmienc_atomic_check,
--};
--
--static void rcar_du_hdmienc_cleanup(struct drm_encoder *encoder)
--{
--	struct rcar_du_hdmienc *hdmienc = to_rcar_hdmienc(encoder);
--
--	if (hdmienc->enabled)
--		rcar_du_hdmienc_disable(encoder);
--
--	drm_encoder_cleanup(encoder);
--}
--
--static const struct drm_encoder_funcs encoder_funcs = {
--	.destroy = rcar_du_hdmienc_cleanup,
--};
--
--int rcar_du_hdmienc_init(struct rcar_du_device *rcdu,
--			 struct rcar_du_encoder *renc, struct device_node *np)
--{
--	struct drm_encoder *encoder = rcar_encoder_to_drm_encoder(renc);
--	struct drm_bridge *bridge;
--	struct rcar_du_hdmienc *hdmienc;
--	int ret;
--
--	hdmienc = devm_kzalloc(rcdu->dev, sizeof(*hdmienc), GFP_KERNEL);
--	if (hdmienc == NULL)
--		return -ENOMEM;
--
--	/* Locate the DRM bridge from the HDMI encoder DT node. */
--	bridge = of_drm_find_bridge(np);
--	if (!bridge)
--		return -EPROBE_DEFER;
--
--	ret = drm_encoder_init(rcdu->ddev, encoder, &encoder_funcs,
--			       DRM_MODE_ENCODER_TMDS, NULL);
--	if (ret < 0)
--		return ret;
--
--	drm_encoder_helper_add(encoder, &encoder_helper_funcs);
--
--	renc->hdmi = hdmienc;
--	hdmienc->renc = renc;
--
--	/* Link the bridge to the encoder. */
--	ret = drm_bridge_attach(encoder, bridge, NULL);
--	if (ret) {
--		drm_encoder_cleanup(encoder);
--		return ret;
--	}
--
--	return 0;
--}
---- a/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.h
-+++ /dev/null
-@@ -1,35 +0,0 @@
--/*
-- * R-Car Display Unit HDMI Encoder
-- *
-- * Copyright (C) 2014 Renesas Electronics Corporation
-- *
-- * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; either version 2 of the License, or
-- * (at your option) any later version.
-- */
--
--#ifndef __RCAR_DU_HDMIENC_H__
--#define __RCAR_DU_HDMIENC_H__
--
--#include <linux/module.h>
--
--struct device_node;
--struct rcar_du_device;
--struct rcar_du_encoder;
--
--#if IS_ENABLED(CONFIG_DRM_RCAR_HDMI)
--int rcar_du_hdmienc_init(struct rcar_du_device *rcdu,
--			 struct rcar_du_encoder *renc, struct device_node *np);
--#else
--static inline int rcar_du_hdmienc_init(struct rcar_du_device *rcdu,
--				       struct rcar_du_encoder *renc,
--				       struct device_node *np)
--{
--	return -ENOSYS;
--}
--#endif
--
--#endif /* __RCAR_DU_HDMIENC_H__ */
---- a/drivers/gpu/drm/rcar-du/rcar_du_vgacon.c
-+++ /dev/null
-@@ -1,82 +0,0 @@
--/*
-- * rcar_du_vgacon.c  --  R-Car Display Unit VGA Connector
-- *
-- * Copyright (C) 2013-2014 Renesas Electronics Corporation
-- *
-- * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; either version 2 of the License, or
-- * (at your option) any later version.
-- */
--
--#include <drm/drmP.h>
--#include <drm/drm_atomic_helper.h>
--#include <drm/drm_crtc.h>
--#include <drm/drm_crtc_helper.h>
--
--#include "rcar_du_drv.h"
--#include "rcar_du_encoder.h"
--#include "rcar_du_kms.h"
--#include "rcar_du_vgacon.h"
--
--static int rcar_du_vga_connector_get_modes(struct drm_connector *connector)
--{
--	return 0;
--}
--
--static const struct drm_connector_helper_funcs connector_helper_funcs = {
--	.get_modes = rcar_du_vga_connector_get_modes,
--};
--
--static enum drm_connector_status
--rcar_du_vga_connector_detect(struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
--static const struct drm_connector_funcs connector_funcs = {
--	.dpms = drm_atomic_helper_connector_dpms,
--	.reset = drm_atomic_helper_connector_reset,
--	.detect = rcar_du_vga_connector_detect,
--	.fill_modes = drm_helper_probe_single_connector_modes,
--	.destroy = drm_connector_cleanup,
--	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
--	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
--};
--
--int rcar_du_vga_connector_init(struct rcar_du_device *rcdu,
--			       struct rcar_du_encoder *renc)
--{
--	struct drm_encoder *encoder = rcar_encoder_to_drm_encoder(renc);
--	struct rcar_du_connector *rcon;
--	struct drm_connector *connector;
--	int ret;
--
--	rcon = devm_kzalloc(rcdu->dev, sizeof(*rcon), GFP_KERNEL);
--	if (rcon == NULL)
--		return -ENOMEM;
--
--	connector = &rcon->connector;
--	connector->display_info.width_mm = 0;
--	connector->display_info.height_mm = 0;
--	connector->interlace_allowed = true;
--
--	ret = drm_connector_init(rcdu->ddev, connector, &connector_funcs,
--				 DRM_MODE_CONNECTOR_VGA);
--	if (ret < 0)
--		return ret;
--
--	drm_connector_helper_add(connector, &connector_helper_funcs);
--
--	connector->dpms = DRM_MODE_DPMS_OFF;
--	drm_object_property_set_value(&connector->base,
--		rcdu->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF);
--
--	ret = drm_mode_connector_attach_encoder(connector, encoder);
--	if (ret < 0)
--		return ret;
--
--	return 0;
--}
---- a/drivers/gpu/drm/rcar-du/rcar_du_vgacon.h
-+++ /dev/null
-@@ -1,23 +0,0 @@
--/*
-- * rcar_du_vgacon.h  --  R-Car Display Unit VGA Connector
-- *
-- * Copyright (C) 2013-2014 Renesas Electronics Corporation
-- *
-- * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; either version 2 of the License, or
-- * (at your option) any later version.
-- */
--
--#ifndef __RCAR_DU_VGACON_H__
--#define __RCAR_DU_VGACON_H__
--
--struct rcar_du_device;
--struct rcar_du_encoder;
--
--int rcar_du_vga_connector_init(struct rcar_du_device *rcdu,
--			       struct rcar_du_encoder *renc);
--
--#endif /* __RCAR_DU_VGACON_H__ */
diff --git a/patches.renesas/0260-ARM-dts-r8a73a4-Add-device-node-for-PRR.patch b/patches.renesas/0260-ARM-dts-r8a73a4-Add-device-node-for-PRR.patch
deleted file mode 100644
index 269edafec4a156..00000000000000
--- a/patches.renesas/0260-ARM-dts-r8a73a4-Add-device-node-for-PRR.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 074854a84ebb83ff66294384c8ab0f02df419901 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 14 Nov 2016 19:37:09 +0100
-Subject: [PATCH 260/299] ARM: dts: r8a73a4: Add device node for PRR
-
-Add a device node for the Product Register, which provides SoC product
-and revision information.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f02703320698bf60c81c8b74aeed1e64442f29c5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -751,6 +751,11 @@
- 		};
- 	};
- 
-+	prr: chipid@ff000044 {
-+		compatible = "renesas,prr";
-+		reg = <0 0xff000044 0 4>;
-+	};
-+
- 	sysc: system-controller@e6180000 {
- 		compatible = "renesas,sysc-r8a73a4", "renesas,sysc-rmobile";
- 		reg = <0 0xe6180000 0 0x8000>, <0 0xe6188000 0 0x8000>;
diff --git a/patches.renesas/0260-drm-rcar-du-Hardcode-encoders-types-to-DRM_MODE_ENCO.patch b/patches.renesas/0260-drm-rcar-du-Hardcode-encoders-types-to-DRM_MODE_ENCO.patch
deleted file mode 100644
index 584b58a86bd516..00000000000000
--- a/patches.renesas/0260-drm-rcar-du-Hardcode-encoders-types-to-DRM_MODE_ENCO.patch
+++ /dev/null
@@ -1,293 +0,0 @@
-From 39f2c083a3ceed24c8efcc277978dc66e3c71d08 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 7 Oct 2016 17:39:21 +0300
-Subject: [PATCH 260/286] drm: rcar-du: Hardcode encoders types to
- DRM_MODE_ENCODER_NONE
-
-Unlike the connector type, the encoder type is unused by userspace. As
-it is equally unused in the driver, except in a single location where
-the connector type can be used instead, hardcode it to
-DRM_MODE_ENCODER_NONE. This allow removing all code that tries to
-determine (unsuccessfully in case a bridge is used) the encoder type.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 381ddfe478871588af95548aaecb6698009c3d6b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.c     |   15 ------------
- drivers/gpu/drm/rcar-du/rcar_du_drv.h     |    2 -
- drivers/gpu/drm/rcar-du/rcar_du_encoder.c |   30 +++++++-----------------
- drivers/gpu/drm/rcar-du/rcar_du_encoder.h |    9 -------
- drivers/gpu/drm/rcar-du/rcar_du_kms.c     |   37 +-----------------------------
- 5 files changed, 11 insertions(+), 82 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -45,12 +45,10 @@ static const struct rcar_du_device_info
- 		 */
- 		[RCAR_DU_OUTPUT_DPAD0] = {
- 			.possible_crtcs = BIT(0),
--			.encoder_type = DRM_MODE_ENCODER_NONE,
- 			.port = 0,
- 		},
- 		[RCAR_DU_OUTPUT_DPAD1] = {
- 			.possible_crtcs = BIT(1) | BIT(0),
--			.encoder_type = DRM_MODE_ENCODER_NONE,
- 			.port = 1,
- 		},
- 	},
-@@ -69,17 +67,14 @@ static const struct rcar_du_device_info
- 		 */
- 		[RCAR_DU_OUTPUT_DPAD0] = {
- 			.possible_crtcs = BIT(2) | BIT(1) | BIT(0),
--			.encoder_type = DRM_MODE_ENCODER_NONE,
- 			.port = 0,
- 		},
- 		[RCAR_DU_OUTPUT_LVDS0] = {
- 			.possible_crtcs = BIT(0),
--			.encoder_type = DRM_MODE_ENCODER_LVDS,
- 			.port = 1,
- 		},
- 		[RCAR_DU_OUTPUT_LVDS1] = {
- 			.possible_crtcs = BIT(2) | BIT(1),
--			.encoder_type = DRM_MODE_ENCODER_LVDS,
- 			.port = 2,
- 		},
- 	},
-@@ -98,12 +93,10 @@ static const struct rcar_du_device_info
- 		 */
- 		[RCAR_DU_OUTPUT_DPAD0] = {
- 			.possible_crtcs = BIT(1) | BIT(0),
--			.encoder_type = DRM_MODE_ENCODER_NONE,
- 			.port = 0,
- 		},
- 		[RCAR_DU_OUTPUT_LVDS0] = {
- 			.possible_crtcs = BIT(0),
--			.encoder_type = DRM_MODE_ENCODER_LVDS,
- 			.port = 1,
- 		},
- 	},
-@@ -119,12 +112,10 @@ static const struct rcar_du_device_info
- 		/* R8A7792 has two RGB outputs. */
- 		[RCAR_DU_OUTPUT_DPAD0] = {
- 			.possible_crtcs = BIT(0),
--			.encoder_type = DRM_MODE_ENCODER_NONE,
- 			.port = 0,
- 		},
- 		[RCAR_DU_OUTPUT_DPAD1] = {
- 			.possible_crtcs = BIT(1),
--			.encoder_type = DRM_MODE_ENCODER_NONE,
- 			.port = 1,
- 		},
- 	},
-@@ -142,12 +133,10 @@ static const struct rcar_du_device_info
- 		 */
- 		[RCAR_DU_OUTPUT_DPAD0] = {
- 			.possible_crtcs = BIT(0),
--			.encoder_type = DRM_MODE_ENCODER_NONE,
- 			.port = 0,
- 		},
- 		[RCAR_DU_OUTPUT_DPAD1] = {
- 			.possible_crtcs = BIT(1),
--			.encoder_type = DRM_MODE_ENCODER_NONE,
- 			.port = 1,
- 		},
- 	},
-@@ -166,12 +155,10 @@ static const struct rcar_du_device_info
- 		 */
- 		[RCAR_DU_OUTPUT_DPAD0] = {
- 			.possible_crtcs = BIT(3),
--			.encoder_type = DRM_MODE_ENCODER_NONE,
- 			.port = 0,
- 		},
- 		[RCAR_DU_OUTPUT_LVDS0] = {
- 			.possible_crtcs = BIT(0),
--			.encoder_type = DRM_MODE_ENCODER_LVDS,
- 			.port = 3,
- 		},
- 	},
-@@ -190,12 +177,10 @@ static const struct rcar_du_device_info
- 		 */
- 		[RCAR_DU_OUTPUT_DPAD0] = {
- 			.possible_crtcs = BIT(2),
--			.encoder_type = DRM_MODE_ENCODER_NONE,
- 			.port = 0,
- 		},
- 		[RCAR_DU_OUTPUT_LVDS0] = {
- 			.possible_crtcs = BIT(0),
--			.encoder_type = DRM_MODE_ENCODER_LVDS,
- 			.port = 2,
- 		},
- 	},
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-@@ -38,7 +38,6 @@ struct rcar_du_lvdsenc;
- /*
-  * struct rcar_du_output_routing - Output routing specification
-  * @possible_crtcs: bitmask of possible CRTCs for the output
-- * @encoder_type: DRM type of the internal encoder associated with the output
-  * @port: device tree port number corresponding to this output route
-  *
-  * The DU has 5 possible outputs (DPAD0/1, LVDS0/1, TCON). Output routing data
-@@ -47,7 +46,6 @@ struct rcar_du_lvdsenc;
-  */
- struct rcar_du_output_routing {
- 	unsigned int possible_crtcs;
--	unsigned int encoder_type;
- 	unsigned int port;
- };
- 
---- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-@@ -68,7 +68,7 @@ static int rcar_du_encoder_atomic_check(
- 	 * Only panel-related encoder types require validation here, everything
- 	 * else is handled by the bridge drivers.
- 	 */
--	if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS) {
-+	if (connector->connector_type == DRM_MODE_CONNECTOR_LVDS) {
- 		const struct drm_display_mode *panel_mode;
- 
- 		if (list_empty(&connector->modes)) {
-@@ -156,7 +156,6 @@ static const struct drm_encoder_funcs en
- };
- 
- int rcar_du_encoder_init(struct rcar_du_device *rcdu,
--			 enum rcar_du_encoder_type type,
- 			 enum rcar_du_output output,
- 			 struct device_node *enc_node,
- 			 struct device_node *con_node)
-@@ -164,7 +163,6 @@ int rcar_du_encoder_init(struct rcar_du_
- 	struct rcar_du_encoder *renc;
- 	struct drm_encoder *encoder;
- 	struct drm_bridge *bridge = NULL;
--	unsigned int encoder_type;
- 	int ret;
- 
- 	renc = devm_kzalloc(rcdu->dev, sizeof(*renc), GFP_KERNEL);
-@@ -188,33 +186,23 @@ int rcar_du_encoder_init(struct rcar_du_
- 	}
- 
- 	if (enc_node) {
-+		dev_dbg(rcdu->dev, "initializing encoder %s for output %u\n",
-+			of_node_full_name(enc_node), output);
-+
- 		/* Locate the DRM bridge from the encoder DT node. */
- 		bridge = of_drm_find_bridge(enc_node);
- 		if (!bridge) {
- 			ret = -EPROBE_DEFER;
- 			goto done;
- 		}
--	}
--
--	switch (type) {
--	case RCAR_DU_ENCODER_VGA:
--		encoder_type = DRM_MODE_ENCODER_DAC;
--		break;
--	case RCAR_DU_ENCODER_LVDS:
--		encoder_type = DRM_MODE_ENCODER_LVDS;
--		break;
--	case RCAR_DU_ENCODER_HDMI:
--		encoder_type = DRM_MODE_ENCODER_TMDS;
--		break;
--	case RCAR_DU_ENCODER_NONE:
--	default:
--		/* No external encoder, use the internal encoder type. */
--		encoder_type = rcdu->info->routes[output].encoder_type;
--		break;
-+	} else {
-+		dev_dbg(rcdu->dev,
-+			"initializing internal encoder for output %u\n",
-+			output);
- 	}
- 
- 	ret = drm_encoder_init(rcdu->ddev, encoder, &encoder_funcs,
--			       encoder_type, NULL);
-+			       DRM_MODE_ENCODER_NONE, NULL);
- 	if (ret < 0)
- 		goto done;
- 
---- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-@@ -20,14 +20,6 @@ struct drm_panel;
- struct rcar_du_device;
- struct rcar_du_lvdsenc;
- 
--enum rcar_du_encoder_type {
--	RCAR_DU_ENCODER_UNUSED = 0,
--	RCAR_DU_ENCODER_NONE,
--	RCAR_DU_ENCODER_VGA,
--	RCAR_DU_ENCODER_LVDS,
--	RCAR_DU_ENCODER_HDMI,
--};
--
- struct rcar_du_encoder {
- 	struct drm_encoder base;
- 	enum rcar_du_output output;
-@@ -50,7 +42,6 @@ struct rcar_du_connector {
- 	container_of(c, struct rcar_du_connector, connector)
- 
- int rcar_du_encoder_init(struct rcar_du_device *rcdu,
--			 enum rcar_du_encoder_type type,
- 			 enum rcar_du_output output,
- 			 struct device_node *enc_node,
- 			 struct device_node *con_node);
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -284,16 +284,6 @@ static int rcar_du_encoders_init_one(str
- 				     enum rcar_du_output output,
- 				     struct of_endpoint *ep)
- {
--	static const struct {
--		const char *compatible;
--		enum rcar_du_encoder_type type;
--	} encoders[] = {
--		{ "adi,adv7123", RCAR_DU_ENCODER_VGA },
--		{ "adi,adv7511w", RCAR_DU_ENCODER_HDMI },
--		{ "thine,thc63lvdm83d", RCAR_DU_ENCODER_LVDS },
--	};
--
--	enum rcar_du_encoder_type enc_type = RCAR_DU_ENCODER_NONE;
- 	struct device_node *connector = NULL;
- 	struct device_node *encoder = NULL;
- 	struct device_node *ep_node = NULL;
-@@ -340,30 +330,7 @@ static int rcar_du_encoders_init_one(str
- 
- 	of_node_put(entity_ep_node);
- 
--	if (encoder) {
--		/*
--		 * If an encoder has been found, get its type based on its
--		 * compatible string.
--		 */
--		unsigned int i;
--
--		for (i = 0; i < ARRAY_SIZE(encoders); ++i) {
--			if (of_device_is_compatible(encoder,
--						    encoders[i].compatible)) {
--				enc_type = encoders[i].type;
--				break;
--			}
--		}
--
--		if (i == ARRAY_SIZE(encoders)) {
--			dev_warn(rcdu->dev,
--				 "unknown encoder type for %s, skipping\n",
--				 encoder->full_name);
--			of_node_put(encoder);
--			of_node_put(connector);
--			return -EINVAL;
--		}
--	} else {
-+	if (!encoder) {
- 		/*
- 		 * If no encoder has been found the entity must be the
- 		 * connector.
-@@ -371,7 +338,7 @@ static int rcar_du_encoders_init_one(str
- 		connector = entity;
- 	}
- 
--	ret = rcar_du_encoder_init(rcdu, enc_type, output, encoder, connector);
-+	ret = rcar_du_encoder_init(rcdu, output, encoder, connector);
- 	if (ret && ret != -EPROBE_DEFER)
- 		dev_warn(rcdu->dev,
- 			 "failed to initialize encoder %s on output %u (%d), skipping\n",
diff --git a/patches.renesas/0261-ARM-dts-r8a7779-Add-device-node-for-PRR.patch b/patches.renesas/0261-ARM-dts-r8a7779-Add-device-node-for-PRR.patch
deleted file mode 100644
index 88600bdccb7f7a..00000000000000
--- a/patches.renesas/0261-ARM-dts-r8a7779-Add-device-node-for-PRR.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From eaf46b2fcf713f2d72e23085183b46ef71c76e79 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 14 Nov 2016 19:37:10 +0100
-Subject: [PATCH 261/299] ARM: dts: r8a7779: Add device node for PRR
-
-Add a device node for the Product Register, which provides SoC product
-and revision information.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9ba368e2226e949e42596cc6027854656f6216a2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -590,6 +590,11 @@
- 		};
- 	};
- 
-+	prr: chipid@ff000044 {
-+		compatible = "renesas,prr";
-+		reg = <0xff000044 4>;
-+	};
-+
- 	rst: reset-controller@ffcc0000 {
- 		compatible = "renesas,r8a7779-reset-wdt";
- 		reg = <0xffcc0000 0x48>;
diff --git a/patches.renesas/0261-drm-rcar-du-Add-Gen3-HDMI-encoder-support.patch b/patches.renesas/0261-drm-rcar-du-Add-Gen3-HDMI-encoder-support.patch
deleted file mode 100644
index f65eceba6926b1..00000000000000
--- a/patches.renesas/0261-drm-rcar-du-Add-Gen3-HDMI-encoder-support.patch
+++ /dev/null
@@ -1,151 +0,0 @@
-From ad4201553433ad224811fef40b7a0e966f4551bd Mon Sep 17 00:00:00 2001
-From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
-Date: Fri, 11 Nov 2016 18:07:40 +0100
-Subject: [PATCH 261/286] drm: rcar-du: Add Gen3 HDMI encoder support
-
-The R-Car Gen3 SoCs include on-chip DesignWare HDMI encoders. Support
-them with a platform driver to provide platform glue data to the dw-hdmi
-driver.
-
-The driver is a complete rewrite of code coming from the Renesas BSP,
-save for the values in the PHY parameters table.
-
-Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-(cherry picked from commit 40d0fa7095d06c73c33da4fa7e381350141682f5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/Kconfig        |    7 ++
- drivers/gpu/drm/rcar-du/Makefile       |    1 
- drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c |  100 +++++++++++++++++++++++++++++++++
- 3 files changed, 108 insertions(+)
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c
-
---- a/drivers/gpu/drm/rcar-du/Kconfig
-+++ b/drivers/gpu/drm/rcar-du/Kconfig
-@@ -11,6 +11,13 @@ config DRM_RCAR_DU
- 	  Choose this option if you have an R-Car chipset.
- 	  If M is selected the module will be called rcar-du-drm.
- 
-+config DRM_RCAR_DW_HDMI
-+	tristate "R-Car DU Gen3 HDMI Encoder Support"
-+	depends on DRM && OF
-+	select DRM_DW_HDMI
-+	help
-+	  Enable support for R-Car Gen3 internal HDMI encoder.
-+
- config DRM_RCAR_LVDS
- 	bool "R-Car DU LVDS Encoder Support"
- 	depends on DRM_RCAR_DU
---- a/drivers/gpu/drm/rcar-du/Makefile
-+++ b/drivers/gpu/drm/rcar-du/Makefile
-@@ -11,3 +11,4 @@ rcar-du-drm-$(CONFIG_DRM_RCAR_LVDS)	+= r
- rcar-du-drm-$(CONFIG_DRM_RCAR_VSP)	+= rcar_du_vsp.o
- 
- obj-$(CONFIG_DRM_RCAR_DU)		+= rcar-du-drm.o
-+obj-$(CONFIG_DRM_RCAR_DW_HDMI)		+= rcar_dw_hdmi.o
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c
-@@ -0,0 +1,100 @@
-+/*
-+ * R-Car Gen3 HDMI PHY
-+ *
-+ * Copyright (C) 2016 Renesas Electronics Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <drm/bridge/dw_hdmi.h>
-+
-+#define RCAR_HDMI_PHY_OPMODE_PLLCFG	0x06	/* Mode of operation and PLL dividers */
-+#define RCAR_HDMI_PHY_PLLCURRGMPCTRL	0x10	/* PLL current and Gmp (conductance) */
-+#define RCAR_HDMI_PHY_PLLDIVCTRL	0x11	/* PLL dividers */
-+
-+struct rcar_hdmi_phy_params {
-+	unsigned long mpixelclock;
-+	u16 opmode_div;	/* Mode of operation and PLL dividers */
-+	u16 curr_gmp;	/* PLL current and Gmp (conductance) */
-+	u16 div;	/* PLL dividers */
-+};
-+
-+static const struct rcar_hdmi_phy_params rcar_hdmi_phy_params[] = {
-+	{ 35500000,  0x0003, 0x0344, 0x0328 },
-+	{ 44900000,  0x0003, 0x0285, 0x0128 },
-+	{ 71000000,  0x0002, 0x1184, 0x0314 },
-+	{ 90000000,  0x0002, 0x1144, 0x0114 },
-+	{ 140250000, 0x0001, 0x20c4, 0x030a },
-+	{ 182750000, 0x0001, 0x2084, 0x010a },
-+	{ 281250000, 0x0000, 0x0084, 0x0305 },
-+	{ 297000000, 0x0000, 0x0084, 0x0105 },
-+	{ ~0UL,      0x0000, 0x0000, 0x0000 },
-+};
-+
-+static int rcar_hdmi_phy_configure(struct dw_hdmi *hdmi,
-+				   const struct dw_hdmi_plat_data *pdata,
-+				   unsigned long mpixelclock)
-+{
-+	const struct rcar_hdmi_phy_params *params = rcar_hdmi_phy_params;
-+
-+	for (; params && params->mpixelclock != ~0UL; ++params) {
-+		if (mpixelclock <= params->mpixelclock)
-+			break;
-+	}
-+
-+	if (params->mpixelclock == ~0UL)
-+		return -EINVAL;
-+
-+	dw_hdmi_phy_i2c_write(hdmi, params->opmode_div,
-+			      RCAR_HDMI_PHY_OPMODE_PLLCFG);
-+	dw_hdmi_phy_i2c_write(hdmi, params->curr_gmp,
-+			      RCAR_HDMI_PHY_PLLCURRGMPCTRL);
-+	dw_hdmi_phy_i2c_write(hdmi, params->div, RCAR_HDMI_PHY_PLLDIVCTRL);
-+
-+	return 0;
-+}
-+
-+static const struct dw_hdmi_plat_data rcar_dw_hdmi_plat_data = {
-+	.configure_phy	= rcar_hdmi_phy_configure,
-+};
-+
-+static int rcar_dw_hdmi_probe(struct platform_device *pdev)
-+{
-+	return dw_hdmi_probe(pdev, &rcar_dw_hdmi_plat_data);
-+}
-+
-+static int rcar_dw_hdmi_remove(struct platform_device *pdev)
-+{
-+	dw_hdmi_remove(pdev);
-+
-+	return 0;
-+}
-+
-+static const struct of_device_id rcar_dw_hdmi_of_table[] = {
-+	{ .compatible = "renesas,rcar-gen3-hdmi" },
-+	{ /* Sentinel */ },
-+};
-+MODULE_DEVICE_TABLE(of, rcar_dw_hdmi_of_table);
-+
-+static struct platform_driver rcar_dw_hdmi_platform_driver = {
-+	.probe		= rcar_dw_hdmi_probe,
-+	.remove		= rcar_dw_hdmi_remove,
-+	.driver		= {
-+		.name	= "rcar-dw-hdmi",
-+		.of_match_table = rcar_dw_hdmi_of_table,
-+	},
-+};
-+
-+module_platform_driver(rcar_dw_hdmi_platform_driver);
-+
-+MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
-+MODULE_DESCRIPTION("Renesas R-Car Gen3 HDMI Encoder Driver");
-+MODULE_LICENSE("GPL");
diff --git a/patches.renesas/0262-ARM-dts-r8a7790-Add-device-node-for-PRR.patch b/patches.renesas/0262-ARM-dts-r8a7790-Add-device-node-for-PRR.patch
deleted file mode 100644
index 936ceee376e393..00000000000000
--- a/patches.renesas/0262-ARM-dts-r8a7790-Add-device-node-for-PRR.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From fdf527ea3202ceb0c972aed9f2017c9ff06afa88 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 14 Nov 2016 19:37:11 +0100
-Subject: [PATCH 262/299] ARM: dts: r8a7790: Add device node for PRR
-
-Add a device node for the Product Register, which provides SoC product
-and revision information.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 328f39b84d4312f3bbc390524f6c6e8be5852500)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -1474,6 +1474,11 @@
- 		};
- 	};
- 
-+	prr: chipid@ff000044 {
-+		compatible = "renesas,prr";
-+		reg = <0 0xff000044 0 4>;
-+	};
-+
- 	rst: reset-controller@e6160000 {
- 		compatible = "renesas,r8a7790-rst";
- 		reg = <0 0xe6160000 0 0x0100>;
diff --git a/patches.renesas/0262-drm-rcar-du-Skip-disabled-outputs.patch b/patches.renesas/0262-drm-rcar-du-Skip-disabled-outputs.patch
deleted file mode 100644
index ddd74df98569ca..00000000000000
--- a/patches.renesas/0262-drm-rcar-du-Skip-disabled-outputs.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 5b922f83b4e16ec2263289520d8a862a8b0c7af3 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 1 Dec 2016 13:07:49 +0200
-Subject: [PATCH 262/286] drm: rcar-du: Skip disabled outputs
-
-When a DT node connected to a DU output is disabled no bridge will ever
-be instantiated for it. Skip the output in that case.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 4739a0d40b668ed4d60e048ee8ff03cd863e0987)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_kms.c |    7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -302,6 +302,13 @@ static int rcar_du_encoders_init_one(str
- 		return -ENODEV;
- 	}
- 
-+	if (!of_device_is_available(entity)) {
-+		dev_dbg(rcdu->dev,
-+			"connected entity %s is disabled, skipping\n",
-+			entity->full_name);
-+		return -ENODEV;
-+	}
-+
- 	entity_ep_node = of_parse_phandle(ep->local_node, "remote-endpoint", 0);
- 
- 	for_each_endpoint_of_node(entity, ep_node) {
diff --git a/patches.renesas/0263-ARM-dts-r8a7791-Add-device-node-for-PRR.patch b/patches.renesas/0263-ARM-dts-r8a7791-Add-device-node-for-PRR.patch
deleted file mode 100644
index 4c8084cb3c60b6..00000000000000
--- a/patches.renesas/0263-ARM-dts-r8a7791-Add-device-node-for-PRR.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 9f9ab1e37c9f69e51da5e272da260c3b1e9a468b Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 14 Nov 2016 19:37:12 +0100
-Subject: [PATCH 263/299] ARM: dts: r8a7791: Add device node for PRR
-
-Add a device node for the Product Register, which provides SoC product
-and revision information.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 366cd112025838fbbb1be73b7efd7f70bed33b65)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -1487,6 +1487,11 @@
- 		};
- 	};
- 
-+	prr: chipid@ff000044 {
-+		compatible = "renesas,prr";
-+		reg = <0 0xff000044 0 4>;
-+	};
-+
- 	rst: reset-controller@e6160000 {
- 		compatible = "renesas,r8a7791-rst";
- 		reg = <0 0xe6160000 0 0x0100>;
diff --git a/patches.renesas/0263-drm-rcar-du-Add-DPLL-support.patch b/patches.renesas/0263-drm-rcar-du-Add-DPLL-support.patch
deleted file mode 100644
index 515a60e4e97d38..00000000000000
--- a/patches.renesas/0263-drm-rcar-du-Add-DPLL-support.patch
+++ /dev/null
@@ -1,186 +0,0 @@
-From ffa694b7ce4a92c980e8325357901963fd3026e3 Mon Sep 17 00:00:00 2001
-From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
-Date: Fri, 11 Nov 2016 18:07:41 +0100
-Subject: [PATCH 263/286] drm: rcar-du: Add DPLL support
-
-The implementation hardcodes a workaround for the H3 ES1.x SoC
-regardless of the SoC revision, as the workaround can be safely applied
-on all devices in the Gen3 family without any side effect.
-
-Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
-Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit dc4aedbf7c152c092c19e980a9fa1e89d6bc215f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_crtc.c |   81 ++++++++++++++++++++++++++++++++-
- drivers/gpu/drm/rcar-du/rcar_du_drv.c  |    1 
- drivers/gpu/drm/rcar-du/rcar_du_drv.h  |    1 
- drivers/gpu/drm/rcar-du/rcar_du_regs.h |   23 +++++++++
- 4 files changed, 105 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-@@ -106,9 +106,62 @@ static void rcar_du_crtc_put(struct rcar
-  * Hardware Setup
-  */
- 
-+struct dpll_info {
-+	unsigned int output;
-+	unsigned int fdpll;
-+	unsigned int n;
-+	unsigned int m;
-+};
-+
-+static void rcar_du_dpll_divider(struct rcar_du_crtc *rcrtc,
-+				 struct dpll_info *dpll,
-+				 unsigned long input,
-+				 unsigned long target)
-+{
-+	unsigned long best_diff = (unsigned long)-1;
-+	unsigned long diff;
-+	unsigned int fdpll;
-+	unsigned int m;
-+	unsigned int n;
-+
-+	for (n = 39; n < 120; n++) {
-+		for (m = 0; m < 4; m++) {
-+			for (fdpll = 1; fdpll < 32; fdpll++) {
-+				unsigned long output;
-+
-+				/* 1/2 (FRQSEL=1) for duty rate 50% */
-+				output = input * (n + 1) / (m + 1)
-+				       / (fdpll + 1) / 2;
-+
-+				if (output >= 400000000)
-+					continue;
-+
-+				diff = abs((long)output - (long)target);
-+				if (best_diff > diff) {
-+					best_diff = diff;
-+					dpll->n = n;
-+					dpll->m = m;
-+					dpll->fdpll = fdpll;
-+					dpll->output = output;
-+				}
-+
-+				if (diff == 0)
-+					goto done;
-+			}
-+		}
-+	}
-+
-+done:
-+	dev_dbg(rcrtc->group->dev->dev,
-+		"output:%u, fdpll:%u, n:%u, m:%u, diff:%lu\n",
-+		 dpll->output, dpll->fdpll, dpll->n, dpll->m,
-+		 best_diff);
-+}
-+
- static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
- {
- 	const struct drm_display_mode *mode = &rcrtc->crtc.state->adjusted_mode;
-+	struct rcar_du_device *rcdu = rcrtc->group->dev;
- 	unsigned long mode_clock = mode->clock * 1000;
- 	unsigned long clk;
- 	u32 value;
-@@ -124,12 +177,18 @@ static void rcar_du_crtc_set_display_tim
- 	escr = div | ESCR_DCLKSEL_CLKS;
- 
- 	if (rcrtc->extclock) {
-+		struct dpll_info dpll = { 0 };
- 		unsigned long extclk;
- 		unsigned long extrate;
- 		unsigned long rate;
- 		u32 extdiv;
- 
- 		extclk = clk_get_rate(rcrtc->extclock);
-+		if (rcdu->info->dpll_ch & (1 << rcrtc->index)) {
-+			rcar_du_dpll_divider(rcrtc, &dpll, extclk, mode_clock);
-+			extclk = dpll.output;
-+		}
-+
- 		extdiv = DIV_ROUND_CLOSEST(extclk, mode_clock);
- 		extdiv = clamp(extdiv, 1U, 64U) - 1;
- 
-@@ -140,7 +199,27 @@ static void rcar_du_crtc_set_display_tim
- 		    abs((long)rate - (long)mode_clock)) {
- 			dev_dbg(rcrtc->group->dev->dev,
- 				"crtc%u: using external clock\n", rcrtc->index);
--			escr = extdiv | ESCR_DCLKSEL_DCLKIN;
-+
-+			if (rcdu->info->dpll_ch & (1 << rcrtc->index)) {
-+				u32 dpllcr = DPLLCR_CODE | DPLLCR_CLKE
-+					   | DPLLCR_FDPLL(dpll.fdpll)
-+					   | DPLLCR_N(dpll.n) | DPLLCR_M(dpll.m)
-+					   | DPLLCR_STBY;
-+
-+				if (rcrtc->index == 1)
-+					dpllcr |= DPLLCR_PLCS1
-+					       |  DPLLCR_INCS_DOTCLKIN1;
-+				else
-+					dpllcr |= DPLLCR_PLCS0
-+					       |  DPLLCR_INCS_DOTCLKIN0;
-+
-+				rcar_du_group_write(rcrtc->group, DPLLCR,
-+						    dpllcr);
-+
-+				escr = ESCR_DCLKSEL_DCLKIN | 1;
-+			} else {
-+				escr = ESCR_DCLKSEL_DCLKIN | extdiv;
-+			}
- 		}
- 	}
- 
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -163,6 +163,7 @@ static const struct rcar_du_device_info
- 		},
- 	},
- 	.num_lvds = 1,
-+	.dpll_ch =  BIT(1) | BIT(2),
- };
- 
- static const struct rcar_du_device_info rcar_du_r8a7796_info = {
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-@@ -65,6 +65,7 @@ struct rcar_du_device_info {
- 	unsigned int num_crtcs;
- 	struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX];
- 	unsigned int num_lvds;
-+	unsigned int dpll_ch;
- };
- 
- #define RCAR_DU_MAX_CRTCS		4
---- a/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-@@ -277,6 +277,29 @@
- #define DEFR10_TSEL_H3_TCON1	(0 << 1) /* DEFR102 register only (DU2/DU3) */
- #define DEFR10_DEFE10		(1 << 0)
- 
-+#define DPLLCR			0x20044
-+#define DPLLCR_CODE		(0x95 << 24)
-+#define DPLLCR_PLCS1		(1 << 23)
-+/*
-+ * PLCS0 is bit 21, but H3 ES1.x requires bit 20 to be set as well. As bit 20
-+ * isn't implemented by other SoC in the Gen3 family it can safely be set
-+ * unconditionally.
-+ */
-+#define DPLLCR_PLCS0		(3 << 20)
-+#define DPLLCR_CLKE		(1 << 18)
-+#define DPLLCR_FDPLL(n)		((n) << 12)
-+#define DPLLCR_N(n)		((n) << 5)
-+#define DPLLCR_M(n)		((n) << 3)
-+#define DPLLCR_STBY		(1 << 2)
-+#define DPLLCR_INCS_DOTCLKIN0	(0 << 0)
-+#define DPLLCR_INCS_DOTCLKIN1	(1 << 1)
-+
-+#define DPLLC2R			0x20048
-+#define DPLLC2R_CODE		(0x95 << 24)
-+#define DPLLC2R_SELC		(1 << 12)
-+#define DPLLC2R_M(n)		((n) << 8)
-+#define DPLLC2R_FDPLL(n)	((n) << 0)
-+
- /* -----------------------------------------------------------------------------
-  * Display Timing Generation Registers
-  */
diff --git a/patches.renesas/0264-ARM-dts-r8a7792-Add-device-node-for-PRR.patch b/patches.renesas/0264-ARM-dts-r8a7792-Add-device-node-for-PRR.patch
deleted file mode 100644
index 10e0589e8133dc..00000000000000
--- a/patches.renesas/0264-ARM-dts-r8a7792-Add-device-node-for-PRR.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From f585f46cfa9ed563e3de33b3de6716550fa6c530 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 14 Nov 2016 19:37:13 +0100
-Subject: [PATCH 264/299] ARM: dts: r8a7792: Add device node for PRR
-
-Add a device node for the Product Register, which provides SoC product
-and revision information.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7cbae74e641761ed117a5a8d903b97a9892a2426)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7792.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7792.dtsi
-+++ b/arch/arm/boot/dts/r8a7792.dtsi
-@@ -124,6 +124,11 @@
- 			reg = <0 0xe6160000 0 0x0100>;
- 		};
- 
-+		prr: chipid@ff000044 {
-+			compatible = "renesas,prr";
-+			reg = <0 0xff000044 0 4>;
-+		};
-+
- 		sysc: system-controller@e6180000 {
- 			compatible = "renesas,r8a7792-sysc";
- 			reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0264-drm-rcar-du-Add-HDMI-outputs-to-R8A7795-device-descr.patch b/patches.renesas/0264-drm-rcar-du-Add-HDMI-outputs-to-R8A7795-device-descr.patch
deleted file mode 100644
index 80d032adc7b7bf..00000000000000
--- a/patches.renesas/0264-drm-rcar-du-Add-HDMI-outputs-to-R8A7795-device-descr.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 23f501fe5138974473d0d042758d268c9f627fe1 Mon Sep 17 00:00:00 2001
-From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
-Date: Fri, 11 Nov 2016 18:07:39 +0100
-Subject: [PATCH 264/286] drm: rcar-du: Add HDMI outputs to R8A7795 device
- description
-
-Update the device description with the two available HDMI outputs.
-
-Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 0dda563e571093f309d597cafaf7dd535496ecfb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_crtc.h |    4 +++-
- drivers/gpu/drm/rcar-du/rcar_du_drv.c  |   12 ++++++++++--
- 2 files changed, 13 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-@@ -1,7 +1,7 @@
- /*
-  * rcar_du_crtc.h  --  R-Car Display Unit CRTCs
-  *
-- * Copyright (C) 2013-2014 Renesas Electronics Corporation
-+ * Copyright (C) 2013-2015 Renesas Electronics Corporation
-  *
-  * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-  *
-@@ -69,6 +69,8 @@ enum rcar_du_output {
- 	RCAR_DU_OUTPUT_DPAD1,
- 	RCAR_DU_OUTPUT_LVDS0,
- 	RCAR_DU_OUTPUT_LVDS1,
-+	RCAR_DU_OUTPUT_HDMI0,
-+	RCAR_DU_OUTPUT_HDMI1,
- 	RCAR_DU_OUTPUT_TCON,
- 	RCAR_DU_OUTPUT_MAX,
- };
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -150,13 +150,21 @@ static const struct rcar_du_device_info
- 		  | RCAR_DU_FEATURE_VSP1_SOURCE,
- 	.num_crtcs = 4,
- 	.routes = {
--		/* R8A7795 has one RGB output, one LVDS output and two
--		 * (currently unsupported) HDMI outputs.
-+		/* R8A7795 has one RGB output, two HDMI outputs and one
-+		 * LVDS output.
- 		 */
- 		[RCAR_DU_OUTPUT_DPAD0] = {
- 			.possible_crtcs = BIT(3),
- 			.port = 0,
- 		},
-+		[RCAR_DU_OUTPUT_HDMI0] = {
-+			.possible_crtcs = BIT(1),
-+			.port = 1,
-+		},
-+		[RCAR_DU_OUTPUT_HDMI1] = {
-+			.possible_crtcs = BIT(2),
-+			.port = 2,
-+		},
- 		[RCAR_DU_OUTPUT_LVDS0] = {
- 			.possible_crtcs = BIT(0),
- 			.port = 3,
diff --git a/patches.renesas/0265-ARM-dts-r8a7743-Add-reset-control-properties.patch b/patches.renesas/0265-ARM-dts-r8a7743-Add-reset-control-properties.patch
deleted file mode 100644
index f6605ba35cdcd6..00000000000000
--- a/patches.renesas/0265-ARM-dts-r8a7743-Add-reset-control-properties.patch
+++ /dev/null
@@ -1,215 +0,0 @@
-From 9b05820772244194495115b82ca92722a816f0e1 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Thu, 16 Mar 2017 15:07:25 +0100
-Subject: [PATCH 265/286] ARM: dts: r8a7743: Add reset control properties
-
-Add properties to describe the reset topology for on-SoC devices:
-  - Add the "#reset-cells" property to the CPG/MSSR device node,
-  - Add resets and reset-names properties to the various device nodes.
-
-This allows to reset SoC devices using the Reset Controller API.
-
-Note that all resets added match the corresponding module clocks.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d20747b7df51178db5f5c7a03cbf17a91bdb6f0e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7743.dtsi |   24 ++++++++++++++++++++++++
- 1 file changed, 24 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7743.dtsi
-+++ b/arch/arm/boot/dts/r8a7743.dtsi
-@@ -62,6 +62,7 @@
- 			clocks = <&cpg CPG_MOD 408>;
- 			clock-names = "clk";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 408>;
- 		};
- 
- 		irqc: interrupt-controller@e61c0000 {
-@@ -81,6 +82,7 @@
- 				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 407>;
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 407>;
- 		};
- 
- 		timer {
-@@ -102,6 +104,7 @@
- 			clock-names = "extal", "usb_extal";
- 			#clock-cells = <2>;
- 			#power-domain-cells = <0>;
-+			#reset-cells = <1>;
- 		};
- 
- 		prr: chipid@ff000044 {
-@@ -148,6 +151,7 @@
- 			clocks = <&cpg CPG_MOD 219>;
- 			clock-names = "fck";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 219>;
- 			#dma-cells = <1>;
- 			dma-channels = <15>;
- 		};
-@@ -180,6 +184,7 @@
- 			clocks = <&cpg CPG_MOD 218>;
- 			clock-names = "fck";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 218>;
- 			#dma-cells = <1>;
- 			dma-channels = <15>;
- 		};
-@@ -195,6 +200,7 @@
- 			       <&dmac1 0x21>, <&dmac1 0x22>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 204>;
- 			status = "disabled";
- 		};
- 
-@@ -209,6 +215,7 @@
- 			       <&dmac1 0x25>, <&dmac1 0x26>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 203>;
- 			status = "disabled";
- 		};
- 
-@@ -223,6 +230,7 @@
- 			       <&dmac1 0x27>, <&dmac1 0x28>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 202>;
- 			status = "disabled";
- 		};
- 
-@@ -237,6 +245,7 @@
- 			       <&dmac1 0x1b>, <&dmac1 0x1c>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 1106>;
- 			status = "disabled";
- 		};
- 
-@@ -251,6 +260,7 @@
- 			       <&dmac1 0x1f>, <&dmac1 0x20>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 1107>;
- 			status = "disabled";
- 		};
- 
-@@ -265,6 +275,7 @@
- 			       <&dmac1 0x23>, <&dmac1 0x24>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 1108>;
- 			status = "disabled";
- 		};
- 
-@@ -279,6 +290,7 @@
- 			       <&dmac1 0x3d>, <&dmac1 0x3e>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 206>;
- 			status = "disabled";
- 		};
- 
-@@ -293,6 +305,7 @@
- 			       <&dmac1 0x19>, <&dmac1 0x1a>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 207>;
- 			status = "disabled";
- 		};
- 
-@@ -307,6 +320,7 @@
- 			       <&dmac1 0x1d>, <&dmac1 0x1e>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 216>;
- 			status = "disabled";
- 		};
- 
-@@ -322,6 +336,7 @@
- 			       <&dmac1 0x29>, <&dmac1 0x2a>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 721>;
- 			status = "disabled";
- 		};
- 
-@@ -337,6 +352,7 @@
- 			       <&dmac1 0x2d>, <&dmac1 0x2e>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 720>;
- 			status = "disabled";
- 		};
- 
-@@ -352,6 +368,7 @@
- 			       <&dmac1 0x2b>, <&dmac1 0x2c>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 719>;
- 			status = "disabled";
- 		};
- 
-@@ -367,6 +384,7 @@
- 			       <&dmac1 0x2f>, <&dmac1 0x30>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 718>;
- 			status = "disabled";
- 		};
- 
-@@ -382,6 +400,7 @@
- 			       <&dmac1 0xfb>, <&dmac1 0xfc>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 715>;
- 			status = "disabled";
- 		};
- 
-@@ -397,6 +416,7 @@
- 			       <&dmac1 0xfd>, <&dmac1 0xfe>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 714>;
- 			status = "disabled";
- 		};
- 
-@@ -412,6 +432,7 @@
- 			       <&dmac1 0x39>, <&dmac1 0x3a>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 717>;
- 			status = "disabled";
- 		};
- 
-@@ -427,6 +448,7 @@
- 			       <&dmac1 0x4d>, <&dmac1 0x4e>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 716>;
- 			status = "disabled";
- 		};
- 
-@@ -442,6 +464,7 @@
- 			       <&dmac1 0x3b>, <&dmac1 0x3c>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 713>;
- 			status = "disabled";
- 		};
- 
-@@ -451,6 +474,7 @@
- 			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 813>;
- 			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
-+			resets = <&cpg 813>;
- 			phy-mode = "rmii";
- 			#address-cells = <1>;
- 			#size-cells = <0>;
diff --git a/patches.renesas/0265-ARM-dts-r8a7793-Add-device-node-for-PRR.patch b/patches.renesas/0265-ARM-dts-r8a7793-Add-device-node-for-PRR.patch
deleted file mode 100644
index dc82d428919f3c..00000000000000
--- a/patches.renesas/0265-ARM-dts-r8a7793-Add-device-node-for-PRR.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From ec4a78b7d7be410222cb39c8757a84e53d20847c Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 14 Nov 2016 19:37:14 +0100
-Subject: [PATCH 265/299] ARM: dts: r8a7793: Add device node for PRR
-
-Add a device node for the Product Register, which provides SoC product
-and revision information.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c832999d3af2a9229c1c518997963def42fbaf4b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7793.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7793.dtsi
-+++ b/arch/arm/boot/dts/r8a7793.dtsi
-@@ -1313,6 +1313,11 @@
- 		reg = <0 0xe6160000 0 0x0100>;
- 	};
- 
-+	prr: chipid@ff000044 {
-+		compatible = "renesas,prr";
-+		reg = <0 0xff000044 0 4>;
-+	};
-+
- 	sysc: system-controller@e6180000 {
- 		compatible = "renesas,r8a7793-sysc";
- 		reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0266-ARM-dts-r8a7745-Add-reset-control-properties.patch b/patches.renesas/0266-ARM-dts-r8a7745-Add-reset-control-properties.patch
deleted file mode 100644
index e639e556f35375..00000000000000
--- a/patches.renesas/0266-ARM-dts-r8a7745-Add-reset-control-properties.patch
+++ /dev/null
@@ -1,215 +0,0 @@
-From f34147de7465b11d041aa2456aac9c2c0ebfb7fa Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Thu, 16 Mar 2017 15:07:26 +0100
-Subject: [PATCH 266/286] ARM: dts: r8a7745: Add reset control properties
-
-Add properties to describe the reset topology for on-SoC devices:
-  - Add the "#reset-cells" property to the CPG/MSSR device node,
-  - Add resets and reset-names properties to the various device nodes.
-
-This allows to reset SoC devices using the Reset Controller API.
-
-Note that all resets added match the corresponding module clocks.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1efab6e91e8e789f98a11d6618f0fd66f1c51f98)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7745.dtsi |   24 ++++++++++++++++++++++++
- 1 file changed, 24 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7745.dtsi
-+++ b/arch/arm/boot/dts/r8a7745.dtsi
-@@ -62,6 +62,7 @@
- 			clocks = <&cpg CPG_MOD 408>;
- 			clock-names = "clk";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 408>;
- 		};
- 
- 		irqc: interrupt-controller@e61c0000 {
-@@ -81,6 +82,7 @@
- 				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 407>;
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 407>;
- 		};
- 
- 		timer {
-@@ -102,6 +104,7 @@
- 			clock-names = "extal", "usb_extal";
- 			#clock-cells = <2>;
- 			#power-domain-cells = <0>;
-+			#reset-cells = <1>;
- 		};
- 
- 		prr: chipid@ff000044 {
-@@ -148,6 +151,7 @@
- 			clocks = <&cpg CPG_MOD 219>;
- 			clock-names = "fck";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 219>;
- 			#dma-cells = <1>;
- 			dma-channels = <15>;
- 		};
-@@ -180,6 +184,7 @@
- 			clocks = <&cpg CPG_MOD 218>;
- 			clock-names = "fck";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 218>;
- 			#dma-cells = <1>;
- 			dma-channels = <15>;
- 		};
-@@ -195,6 +200,7 @@
- 			       <&dmac1 0x21>, <&dmac1 0x22>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 204>;
- 			status = "disabled";
- 		};
- 
-@@ -209,6 +215,7 @@
- 			       <&dmac1 0x25>, <&dmac1 0x26>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 203>;
- 			status = "disabled";
- 		};
- 
-@@ -223,6 +230,7 @@
- 			       <&dmac1 0x27>, <&dmac1 0x28>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 202>;
- 			status = "disabled";
- 		};
- 
-@@ -237,6 +245,7 @@
- 			       <&dmac1 0x1b>, <&dmac1 0x1c>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 1106>;
- 			status = "disabled";
- 		};
- 
-@@ -251,6 +260,7 @@
- 			       <&dmac1 0x1f>, <&dmac1 0x20>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 1107>;
- 			status = "disabled";
- 		};
- 
-@@ -265,6 +275,7 @@
- 			       <&dmac1 0x23>, <&dmac1 0x24>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 1108>;
- 			status = "disabled";
- 		};
- 
-@@ -279,6 +290,7 @@
- 			       <&dmac1 0x3d>, <&dmac1 0x3e>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 206>;
- 			status = "disabled";
- 		};
- 
-@@ -293,6 +305,7 @@
- 			       <&dmac1 0x19>, <&dmac1 0x1a>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 207>;
- 			status = "disabled";
- 		};
- 
-@@ -307,6 +320,7 @@
- 			       <&dmac1 0x1d>, <&dmac1 0x1e>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 216>;
- 			status = "disabled";
- 		};
- 
-@@ -322,6 +336,7 @@
- 			       <&dmac1 0x29>, <&dmac1 0x2a>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 721>;
- 			status = "disabled";
- 		};
- 
-@@ -337,6 +352,7 @@
- 			       <&dmac1 0x2d>, <&dmac1 0x2e>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 720>;
- 			status = "disabled";
- 		};
- 
-@@ -352,6 +368,7 @@
- 			       <&dmac1 0x2b>, <&dmac1 0x2c>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 719>;
- 			status = "disabled";
- 		};
- 
-@@ -367,6 +384,7 @@
- 			       <&dmac1 0x2f>, <&dmac1 0x30>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 718>;
- 			status = "disabled";
- 		};
- 
-@@ -382,6 +400,7 @@
- 			       <&dmac1 0xfb>, <&dmac1 0xfc>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 715>;
- 			status = "disabled";
- 		};
- 
-@@ -397,6 +416,7 @@
- 			       <&dmac1 0xfd>, <&dmac1 0xfe>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 714>;
- 			status = "disabled";
- 		};
- 
-@@ -412,6 +432,7 @@
- 			       <&dmac1 0x39>, <&dmac1 0x3a>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 717>;
- 			status = "disabled";
- 		};
- 
-@@ -427,6 +448,7 @@
- 			       <&dmac1 0x4d>, <&dmac1 0x4e>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 716>;
- 			status = "disabled";
- 		};
- 
-@@ -442,6 +464,7 @@
- 			       <&dmac1 0x3b>, <&dmac1 0x3c>;
- 			dma-names = "tx", "rx", "tx", "rx";
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 713>;
- 			status = "disabled";
- 		};
- 
-@@ -451,6 +474,7 @@
- 			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&cpg CPG_MOD 813>;
- 			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
-+			resets = <&cpg 813>;
- 			phy-mode = "rmii";
- 			#address-cells = <1>;
- 			#size-cells = <0>;
diff --git a/patches.renesas/0266-ARM-dts-r8a7794-Add-device-node-for-PRR.patch b/patches.renesas/0266-ARM-dts-r8a7794-Add-device-node-for-PRR.patch
deleted file mode 100644
index 5047621e1f13ce..00000000000000
--- a/patches.renesas/0266-ARM-dts-r8a7794-Add-device-node-for-PRR.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From e3abfa99a16595fbe63f7b3d7765159697ab602d Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 14 Nov 2016 19:37:15 +0100
-Subject: [PATCH 266/299] ARM: dts: r8a7794: Add device node for PRR
-
-Add a device node for the Product Register, which provides SoC product
-and revision information.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2357adb625f15e7f2b05a1464076c79876563636)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7794.dtsi
-+++ b/arch/arm/boot/dts/r8a7794.dtsi
-@@ -1383,6 +1383,11 @@
- 		reg = <0 0xe6160000 0 0x0100>;
- 	};
- 
-+	prr: chipid@ff000044 {
-+		compatible = "renesas,prr";
-+		reg = <0 0xff000044 0 4>;
-+	};
-+
- 	sysc: system-controller@e6180000 {
- 		compatible = "renesas,r8a7794-sysc";
- 		reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0267-ARM-dts-r7s72100-add-power-domains-to-sdhi.patch b/patches.renesas/0267-ARM-dts-r7s72100-add-power-domains-to-sdhi.patch
deleted file mode 100644
index 138430a209e06c..00000000000000
--- a/patches.renesas/0267-ARM-dts-r7s72100-add-power-domains-to-sdhi.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From ccdbd481ea32162ad45febe055b36498b0380200 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Thu, 9 Feb 2017 08:38:03 -0500
-Subject: [PATCH 267/286] ARM: dts: r7s72100: add power-domains to sdhi
-
-Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Fixes: 66474697923c ("ARM: dts: r7s72100: add sdhi to device tree")
-Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3932197c01e4ca7d743d07728656d938f1ae93d5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100.dtsi |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100.dtsi
-+++ b/arch/arm/boot/dts/r7s72100.dtsi
-@@ -501,6 +501,7 @@
- 		clocks = <&mstp12_clks R7S72100_CLK_SDHI00>,
- 			 <&mstp12_clks R7S72100_CLK_SDHI01>;
- 		clock-names = "core", "cd";
-+		power-domains = <&cpg_clocks>;
- 		cap-sd-highspeed;
- 		cap-sdio-irq;
- 		status = "disabled";
-@@ -516,6 +517,7 @@
- 		clocks = <&mstp12_clks R7S72100_CLK_SDHI10>,
- 			 <&mstp12_clks R7S72100_CLK_SDHI11>;
- 		clock-names = "core", "cd";
-+		power-domains = <&cpg_clocks>;
- 		cap-sd-highspeed;
- 		cap-sdio-irq;
- 		status = "disabled";
diff --git a/patches.renesas/0267-media-v4l-ctrls-Add-deinterlacing-mode-control.patch b/patches.renesas/0267-media-v4l-ctrls-Add-deinterlacing-mode-control.patch
deleted file mode 100644
index 207f2f6081cc17..00000000000000
--- a/patches.renesas/0267-media-v4l-ctrls-Add-deinterlacing-mode-control.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From 7dcbc52ee91271e807daf73208caaf859a3e7a41 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 4 Aug 2016 13:14:02 -0300
-Subject: [PATCH 267/299] [media] v4l: ctrls: Add deinterlacing mode control
-
-The menu control selects the operation mode of a video deinterlacer. The
-menu entries are driver specific.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Kieran Bingham <kieran@bingham.xyz>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 446e412597217e937d33296e77eeba7379ab3008)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/media/uapi/v4l/extended-controls.rst |    4 ++++
- Documentation/media/v4l-drivers/index.rst          |    2 ++
- drivers/media/v4l2-core/v4l2-ctrls.c               |    2 ++
- include/uapi/linux/v4l2-controls.h                 |    1 +
- 4 files changed, 9 insertions(+)
-
---- a/Documentation/media/uapi/v4l/extended-controls.rst
-+++ b/Documentation/media/uapi/v4l/extended-controls.rst
-@@ -3017,6 +3017,10 @@ Image Process Control IDs
-     test pattern images. These hardware specific test patterns can be
-     used to test if a device is working properly.
- 
-+``V4L2_CID_DEINTERLACING_MODE (menu)``
-+    The video deinterlacing mode (such as Bob, Weave, ...). The menu items are
-+    driver specific and are documented in :ref:`v4l-drivers`.
-+
- 
- .. _dv-controls:
- 
---- a/Documentation/media/v4l-drivers/index.rst
-+++ b/Documentation/media/v4l-drivers/index.rst
-@@ -2,6 +2,8 @@
- 
- .. include:: <isonum.txt>
- 
-+.. _v4l-drivers:
-+
- ################################################
- Video4Linux (V4L)  driver-specific documentation
- ################################################
---- a/drivers/media/v4l2-core/v4l2-ctrls.c
-+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
-@@ -885,6 +885,7 @@ const char *v4l2_ctrl_get_name(u32 id)
- 	case V4L2_CID_LINK_FREQ:		return "Link Frequency";
- 	case V4L2_CID_PIXEL_RATE:		return "Pixel Rate";
- 	case V4L2_CID_TEST_PATTERN:		return "Test Pattern";
-+	case V4L2_CID_DEINTERLACING_MODE:	return "Deinterlacing Mode";
- 
- 	/* DV controls */
- 	/* Keep the order of the 'case's the same as in v4l2-controls.h! */
-@@ -1058,6 +1059,7 @@ void v4l2_ctrl_fill(u32 id, const char *
- 	case V4L2_CID_DV_RX_RGB_RANGE:
- 	case V4L2_CID_DV_RX_IT_CONTENT_TYPE:
- 	case V4L2_CID_TEST_PATTERN:
-+	case V4L2_CID_DEINTERLACING_MODE:
- 	case V4L2_CID_TUNE_DEEMPHASIS:
- 	case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
- 	case V4L2_CID_DETECT_MD_MODE:
---- a/include/uapi/linux/v4l2-controls.h
-+++ b/include/uapi/linux/v4l2-controls.h
-@@ -892,6 +892,7 @@ enum v4l2_jpeg_chroma_subsampling {
- #define V4L2_CID_LINK_FREQ			(V4L2_CID_IMAGE_PROC_CLASS_BASE + 1)
- #define V4L2_CID_PIXEL_RATE			(V4L2_CID_IMAGE_PROC_CLASS_BASE + 2)
- #define V4L2_CID_TEST_PATTERN			(V4L2_CID_IMAGE_PROC_CLASS_BASE + 3)
-+#define V4L2_CID_DEINTERLACING_MODE		(V4L2_CID_IMAGE_PROC_CLASS_BASE + 4)
- 
- 
- /*  DV-class control IDs defined by V4L2 */
diff --git a/patches.renesas/0268-media-dt-bindings-Add-Renesas-R-Car-FDP1-bindings.patch b/patches.renesas/0268-media-dt-bindings-Add-Renesas-R-Car-FDP1-bindings.patch
deleted file mode 100644
index 7904667a37efac..00000000000000
--- a/patches.renesas/0268-media-dt-bindings-Add-Renesas-R-Car-FDP1-bindings.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 7e37b15a658319eb90d692ed31a2f6f4d9b72d50 Mon Sep 17 00:00:00 2001
-From: Kieran Bingham <kieran+renesas@bingham.xyz>
-Date: Thu, 30 Jun 2016 13:50:30 -0300
-Subject: [PATCH 268/299] [media] dt-bindings: Add Renesas R-Car FDP1 bindings
-
-The FDP1 is a de-interlacing module which converts interlaced video to
-progressive video. It is also capable of performing pixel format conversion
-between YCbCr/YUV formats and RGB formats.
-
-Signed-off-by: Kieran Bingham <kieran+renesas@bingham.xyz>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 3547d32be04506ad23346eca6ce8b745ef146fab)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/media/renesas,fdp1.txt |   37 +++++++++++++++
- 1 file changed, 37 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/media/renesas,fdp1.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/media/renesas,fdp1.txt
-@@ -0,0 +1,37 @@
-+Renesas R-Car Fine Display Processor (FDP1)
-+-------------------------------------------
-+
-+The FDP1 is a de-interlacing module which converts interlaced video to
-+progressive video. It is capable of performing pixel format conversion between
-+YCbCr/YUV formats and RGB formats. Only YCbCr/YUV formats are supported as
-+an input to the module.
-+
-+Required properties:
-+
-+ - compatible: must be "renesas,fdp1"
-+ - reg: the register base and size for the device registers
-+ - interrupts : interrupt specifier for the FDP1 instance
-+ - clocks: reference to the functional clock
-+
-+Optional properties:
-+
-+ - power-domains: reference to the power domain that the FDP1 belongs to, if
-+                  any.
-+ - renesas,fcp: a phandle referencing the FCP that handles memory accesses
-+                for the FDP1. Not needed on Gen2, mandatory on Gen3.
-+
-+Please refer to the binding documentation for the clock and/or power domain
-+providers for more details.
-+
-+
-+Device node example
-+-------------------
-+
-+	fdp1@fe940000 {
-+		compatible = "renesas,fdp1";
-+		reg = <0 0xfe940000 0 0x2400>;
-+		interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&cpg CPG_MOD 119>;
-+		power-domains = <&sysc R8A7795_PD_A3VP>;
-+		renesas,fcp = <&fcpf0>;
-+	};
diff --git a/patches.renesas/0269-media-v4l-Add-Renesas-R-Car-FDP1-Driver.patch b/patches.renesas/0269-media-v4l-Add-Renesas-R-Car-FDP1-Driver.patch
deleted file mode 100644
index bd7be1a4ed3f57..00000000000000
--- a/patches.renesas/0269-media-v4l-Add-Renesas-R-Car-FDP1-Driver.patch
+++ /dev/null
@@ -1,2574 +0,0 @@
-From 9db00c541882ee2e105badf30148265bd9ae6142 Mon Sep 17 00:00:00 2001
-From: Kieran Bingham <kieran+renesas@bingham.xyz>
-Date: Thu, 30 Jun 2016 10:41:23 -0300
-Subject: [PATCH 269/299] [media] v4l: Add Renesas R-Car FDP1 Driver
-
-The FDP1 driver performs advanced de-interlacing on a memory 2 memory
-based video stream, and supports conversion from YCbCr/YUV
-to RGB pixel formats
-
-Signed-off-by: Kieran Bingham <kieran+renesas@bingham.xyz>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit 4710b752e029f3f82dd4a84d9dc61fe72c97bf82)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/media/v4l-drivers/index.rst     |    1 
- Documentation/media/v4l-drivers/rcar-fdp1.rst |   37 
- MAINTAINERS                                   |    9 
- drivers/media/platform/Kconfig                |   13 
- drivers/media/platform/Makefile               |    1 
- drivers/media/platform/rcar_fdp1.c            | 2445 ++++++++++++++++++++++++++
- 6 files changed, 2506 insertions(+)
- create mode 100644 Documentation/media/v4l-drivers/rcar-fdp1.rst
- create mode 100644 drivers/media/platform/rcar_fdp1.c
-
---- a/Documentation/media/v4l-drivers/index.rst
-+++ b/Documentation/media/v4l-drivers/index.rst
-@@ -48,6 +48,7 @@ For more details see the file COPYING in
- 	pvrusb2
- 	pxa_camera
- 	radiotrack
-+	rcar-fdp1
- 	saa7134
- 	sh_mobile_ceu_camera
- 	si470x
---- /dev/null
-+++ b/Documentation/media/v4l-drivers/rcar-fdp1.rst
-@@ -0,0 +1,37 @@
-+Renesas R-Car Fine Display Processor (FDP1) Driver
-+==================================================
-+
-+The R-Car FDP1 driver implements driver-specific controls as follows.
-+
-+``V4L2_CID_DEINTERLACING_MODE (menu)``
-+    The video deinterlacing mode (such as Bob, Weave, ...). The R-Car FDP1
-+    driver implements the following modes.
-+
-+.. flat-table::
-+    :header-rows:  0
-+    :stub-columns: 0
-+    :widths:       1 4
-+
-+    * - ``"Progressive" (0)``
-+      - The input image video stream is progressive (not interlaced). No
-+        deinterlacing is performed. Apart from (optional) format and encoding
-+        conversion output frames are identical to the input frames.
-+    * - ``"Adaptive 2D/3D" (1)``
-+      - Motion adaptive version of 2D and 3D deinterlacing. Use 3D deinterlacing
-+        in the presence of fast motion and 2D deinterlacing with diagonal
-+        interpolation otherwise.
-+    * - ``"Fixed 2D" (2)``
-+      - The current field is scaled vertically by averaging adjacent lines to
-+        recover missing lines. This method is also known as blending or Line
-+        Averaging (LAV).
-+    * - ``"Fixed 3D" (3)``
-+      - The previous and next fields are averaged to recover lines missing from
-+        the current field. This method is also known as Field Averaging (FAV).
-+    * - ``"Previous field" (4)``
-+      - The current field is weaved with the previous field, i.e. the previous
-+        field is used to fill missing lines from the current field. This method
-+        is also known as weave deinterlacing.
-+    * - ``"Next field" (5)``
-+      - The current field is weaved with the next field, i.e. the next field is
-+        used to fill missing lines from the current field. This method is also
-+        known as weave deinterlacing.
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -7734,6 +7734,15 @@ F:	Documentation/devicetree/bindings/med
- F:	drivers/media/platform/rcar-fcp.c
- F:	include/media/rcar-fcp.h
- 
-+MEDIA DRIVERS FOR RENESAS - FDP1
-+M:	Kieran Bingham <kieran@bingham.xyz>
-+L:	linux-media@vger.kernel.org
-+L:	linux-renesas-soc@vger.kernel.org
-+T:	git git://linuxtv.org/media_tree.git
-+S:	Supported
-+F:	Documentation/devicetree/bindings/media/renesas,fdp1.txt
-+F:	drivers/media/platform/rcar_fdp1.c
-+
- MEDIA DRIVERS FOR RENESAS - VIN
- M:	Niklas Söderlund <niklas.soderlund@ragnatech.se>
- L:	linux-media@vger.kernel.org
---- a/drivers/media/platform/Kconfig
-+++ b/drivers/media/platform/Kconfig
-@@ -290,6 +290,19 @@ config VIDEO_SH_VEU
- 	    Support for the Video Engine Unit (VEU) on SuperH and
- 	    SH-Mobile SoCs.
- 
-+config VIDEO_RENESAS_FDP1
-+	tristate "Renesas Fine Display Processor"
-+	depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA
-+	depends on ARCH_SHMOBILE || COMPILE_TEST
-+	select VIDEOBUF2_DMA_CONTIG
-+	select V4L2_MEM2MEM_DEV
-+	---help---
-+	  This is a V4L2 driver for the Renesas Fine Display Processor
-+	  providing colour space conversion, and de-interlacing features.
-+
-+	  To compile this driver as a module, choose M here: the module
-+	  will be called rcar_fdp1.
-+
- config VIDEO_RENESAS_JPU
- 	tristate "Renesas JPEG Processing Unit"
- 	depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA
---- a/drivers/media/platform/Makefile
-+++ b/drivers/media/platform/Makefile
-@@ -48,6 +48,7 @@ obj-$(CONFIG_VIDEO_SH_VOU)		+= sh_vou.o
- obj-$(CONFIG_SOC_CAMERA)		+= soc_camera/
- 
- obj-$(CONFIG_VIDEO_RENESAS_FCP) 	+= rcar-fcp.o
-+obj-$(CONFIG_VIDEO_RENESAS_FDP1)	+= rcar_fdp1.o
- obj-$(CONFIG_VIDEO_RENESAS_JPU) 	+= rcar_jpu.o
- obj-$(CONFIG_VIDEO_RENESAS_VSP1)	+= vsp1/
- 
---- /dev/null
-+++ b/drivers/media/platform/rcar_fdp1.c
-@@ -0,0 +1,2445 @@
-+/*
-+ * Renesas RCar Fine Display Processor
-+ *
-+ * Video format converter and frame deinterlacer device.
-+ *
-+ * Author: Kieran Bingham, <kieran@bingham.xyz>
-+ * Copyright (c) 2016 Renesas Electronics Corporation.
-+ *
-+ * This code is developed and inspired from the vim2m, rcar_jpu,
-+ * m2m-deinterlace, and vsp1 drivers.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by the
-+ * Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/fs.h>
-+#include <linux/interrupt.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/of_device.h>
-+#include <linux/platform_device.h>
-+#include <linux/pm_runtime.h>
-+#include <linux/sched.h>
-+#include <linux/slab.h>
-+#include <linux/timer.h>
-+#include <media/rcar-fcp.h>
-+#include <media/v4l2-ctrls.h>
-+#include <media/v4l2-device.h>
-+#include <media/v4l2-event.h>
-+#include <media/v4l2-ioctl.h>
-+#include <media/v4l2-mem2mem.h>
-+#include <media/videobuf2-dma-contig.h>
-+
-+static unsigned int debug;
-+module_param(debug, uint, 0644);
-+MODULE_PARM_DESC(debug, "activate debug info");
-+
-+/* Minimum and maximum frame width/height */
-+#define FDP1_MIN_W		80U
-+#define FDP1_MIN_H		80U
-+
-+#define FDP1_MAX_W		3840U
-+#define FDP1_MAX_H		2160U
-+
-+#define FDP1_MAX_PLANES		3U
-+#define FDP1_MAX_STRIDE		8190U
-+
-+/* Flags that indicate a format can be used for capture/output */
-+#define FDP1_CAPTURE		BIT(0)
-+#define FDP1_OUTPUT		BIT(1)
-+
-+#define DRIVER_NAME		"rcar_fdp1"
-+
-+/* Number of Job's to have available on the processing queue */
-+#define FDP1_NUMBER_JOBS 8
-+
-+#define dprintk(fdp1, fmt, arg...) \
-+	v4l2_dbg(1, debug, &fdp1->v4l2_dev, "%s: " fmt, __func__, ## arg)
-+
-+/*
-+ * FDP1 registers and bits
-+ */
-+
-+/* FDP1 start register - Imm */
-+#define FD1_CTL_CMD			0x0000
-+#define FD1_CTL_CMD_STRCMD		BIT(0)
-+
-+/* Sync generator register - Imm */
-+#define FD1_CTL_SGCMD			0x0004
-+#define FD1_CTL_SGCMD_SGEN		BIT(0)
-+
-+/* Register set end register - Imm */
-+#define FD1_CTL_REGEND			0x0008
-+#define FD1_CTL_REGEND_REGEND		BIT(0)
-+
-+/* Channel activation register - Vupdt */
-+#define FD1_CTL_CHACT			0x000c
-+#define FD1_CTL_CHACT_SMW		BIT(9)
-+#define FD1_CTL_CHACT_WR		BIT(8)
-+#define FD1_CTL_CHACT_SMR		BIT(3)
-+#define FD1_CTL_CHACT_RD2		BIT(2)
-+#define FD1_CTL_CHACT_RD1		BIT(1)
-+#define FD1_CTL_CHACT_RD0		BIT(0)
-+
-+/* Operation Mode Register - Vupdt */
-+#define FD1_CTL_OPMODE			0x0010
-+#define FD1_CTL_OPMODE_PRG		BIT(4)
-+#define FD1_CTL_OPMODE_VIMD_INTERRUPT	(0 << 0)
-+#define FD1_CTL_OPMODE_VIMD_BESTEFFORT	(1 << 0)
-+#define FD1_CTL_OPMODE_VIMD_NOINTERRUPT	(2 << 0)
-+
-+#define FD1_CTL_VPERIOD			0x0014
-+#define FD1_CTL_CLKCTRL			0x0018
-+#define FD1_CTL_CLKCTRL_CSTP_N		BIT(0)
-+
-+/* Software reset register */
-+#define FD1_CTL_SRESET			0x001c
-+#define FD1_CTL_SRESET_SRST		BIT(0)
-+
-+/* Control status register (V-update-status) */
-+#define FD1_CTL_STATUS			0x0024
-+#define FD1_CTL_STATUS_VINT_CNT_MASK	GENMASK(31, 16)
-+#define FD1_CTL_STATUS_VINT_CNT_SHIFT	16
-+#define FD1_CTL_STATUS_SGREGSET		BIT(10)
-+#define FD1_CTL_STATUS_SGVERR		BIT(9)
-+#define FD1_CTL_STATUS_SGFREND		BIT(8)
-+#define FD1_CTL_STATUS_BSY		BIT(0)
-+
-+#define FD1_CTL_VCYCLE_STAT		0x0028
-+
-+/* Interrupt enable register */
-+#define FD1_CTL_IRQENB			0x0038
-+/* Interrupt status register */
-+#define FD1_CTL_IRQSTA			0x003c
-+/* Interrupt control register */
-+#define FD1_CTL_IRQFSET			0x0040
-+
-+/* Common IRQ Bit settings */
-+#define FD1_CTL_IRQ_VERE		BIT(16)
-+#define FD1_CTL_IRQ_VINTE		BIT(4)
-+#define FD1_CTL_IRQ_FREE		BIT(0)
-+#define FD1_CTL_IRQ_MASK		(FD1_CTL_IRQ_VERE | \
-+					 FD1_CTL_IRQ_VINTE | \
-+					 FD1_CTL_IRQ_FREE)
-+
-+/* RPF */
-+#define FD1_RPF_SIZE			0x0060
-+#define FD1_RPF_SIZE_MASK		GENMASK(12, 0)
-+#define FD1_RPF_SIZE_H_SHIFT		16
-+#define FD1_RPF_SIZE_V_SHIFT		0
-+
-+#define FD1_RPF_FORMAT			0x0064
-+#define FD1_RPF_FORMAT_CIPM		BIT(16)
-+#define FD1_RPF_FORMAT_RSPYCS		BIT(13)
-+#define FD1_RPF_FORMAT_RSPUVS		BIT(12)
-+#define FD1_RPF_FORMAT_CF		BIT(8)
-+
-+#define FD1_RPF_PSTRIDE			0x0068
-+#define FD1_RPF_PSTRIDE_Y_SHIFT		16
-+#define FD1_RPF_PSTRIDE_C_SHIFT		0
-+
-+/* RPF0 Source Component Y Address register */
-+#define FD1_RPF0_ADDR_Y			0x006c
-+
-+/* RPF1 Current Picture Registers */
-+#define FD1_RPF1_ADDR_Y			0x0078
-+#define FD1_RPF1_ADDR_C0		0x007c
-+#define FD1_RPF1_ADDR_C1		0x0080
-+
-+/* RPF2 next picture register */
-+#define FD1_RPF2_ADDR_Y			0x0084
-+
-+#define FD1_RPF_SMSK_ADDR		0x0090
-+#define FD1_RPF_SWAP			0x0094
-+
-+/* WPF */
-+#define FD1_WPF_FORMAT			0x00c0
-+#define FD1_WPF_FORMAT_PDV_SHIFT	24
-+#define FD1_WPF_FORMAT_FCNL		BIT(20)
-+#define FD1_WPF_FORMAT_WSPYCS		BIT(15)
-+#define FD1_WPF_FORMAT_WSPUVS		BIT(14)
-+#define FD1_WPF_FORMAT_WRTM_601_16	(0 << 9)
-+#define FD1_WPF_FORMAT_WRTM_601_0	(1 << 9)
-+#define FD1_WPF_FORMAT_WRTM_709_16	(2 << 9)
-+#define FD1_WPF_FORMAT_CSC		BIT(8)
-+
-+#define FD1_WPF_RNDCTL			0x00c4
-+#define FD1_WPF_RNDCTL_CBRM		BIT(28)
-+#define FD1_WPF_RNDCTL_CLMD_NOCLIP	(0 << 12)
-+#define FD1_WPF_RNDCTL_CLMD_CLIP_16_235	(1 << 12)
-+#define FD1_WPF_RNDCTL_CLMD_CLIP_1_254	(2 << 12)
-+
-+#define FD1_WPF_PSTRIDE			0x00c8
-+#define FD1_WPF_PSTRIDE_Y_SHIFT		16
-+#define FD1_WPF_PSTRIDE_C_SHIFT		0
-+
-+/* WPF Destination picture */
-+#define FD1_WPF_ADDR_Y			0x00cc
-+#define FD1_WPF_ADDR_C0			0x00d0
-+#define FD1_WPF_ADDR_C1			0x00d4
-+#define FD1_WPF_SWAP			0x00d8
-+#define FD1_WPF_SWAP_OSWAP_SHIFT	0
-+#define FD1_WPF_SWAP_SSWAP_SHIFT	4
-+
-+/* WPF/RPF Common */
-+#define FD1_RWPF_SWAP_BYTE		BIT(0)
-+#define FD1_RWPF_SWAP_WORD		BIT(1)
-+#define FD1_RWPF_SWAP_LWRD		BIT(2)
-+#define FD1_RWPF_SWAP_LLWD		BIT(3)
-+
-+/* IPC */
-+#define FD1_IPC_MODE			0x0100
-+#define FD1_IPC_MODE_DLI		BIT(8)
-+#define FD1_IPC_MODE_DIM_ADAPT2D3D	(0 << 0)
-+#define FD1_IPC_MODE_DIM_FIXED2D	(1 << 0)
-+#define FD1_IPC_MODE_DIM_FIXED3D	(2 << 0)
-+#define FD1_IPC_MODE_DIM_PREVFIELD	(3 << 0)
-+#define FD1_IPC_MODE_DIM_NEXTFIELD	(4 << 0)
-+
-+#define FD1_IPC_SMSK_THRESH		0x0104
-+#define FD1_IPC_SMSK_THRESH_CONST	0x00010002
-+
-+#define FD1_IPC_COMB_DET		0x0108
-+#define FD1_IPC_COMB_DET_CONST		0x00200040
-+
-+#define FD1_IPC_MOTDEC			0x010c
-+#define FD1_IPC_MOTDEC_CONST		0x00008020
-+
-+/* DLI registers */
-+#define FD1_IPC_DLI_BLEND		0x0120
-+#define FD1_IPC_DLI_BLEND_CONST		0x0080ff02
-+
-+#define FD1_IPC_DLI_HGAIN		0x0124
-+#define FD1_IPC_DLI_HGAIN_CONST		0x001000ff
-+
-+#define FD1_IPC_DLI_SPRS		0x0128
-+#define FD1_IPC_DLI_SPRS_CONST		0x009004ff
-+
-+#define FD1_IPC_DLI_ANGLE		0x012c
-+#define FD1_IPC_DLI_ANGLE_CONST		0x0004080c
-+
-+#define FD1_IPC_DLI_ISOPIX0		0x0130
-+#define FD1_IPC_DLI_ISOPIX0_CONST	0xff10ff10
-+
-+#define FD1_IPC_DLI_ISOPIX1		0x0134
-+#define FD1_IPC_DLI_ISOPIX1_CONST	0x0000ff10
-+
-+/* Sensor registers */
-+#define FD1_IPC_SENSOR_TH0		0x0140
-+#define FD1_IPC_SENSOR_TH0_CONST	0x20208080
-+
-+#define FD1_IPC_SENSOR_TH1		0x0144
-+#define FD1_IPC_SENSOR_TH1_CONST	0
-+
-+#define FD1_IPC_SENSOR_CTL0		0x0170
-+#define FD1_IPC_SENSOR_CTL0_CONST	0x00002201
-+
-+#define FD1_IPC_SENSOR_CTL1		0x0174
-+#define FD1_IPC_SENSOR_CTL1_CONST	0
-+
-+#define FD1_IPC_SENSOR_CTL2		0x0178
-+#define FD1_IPC_SENSOR_CTL2_X_SHIFT	16
-+#define FD1_IPC_SENSOR_CTL2_Y_SHIFT	0
-+
-+#define FD1_IPC_SENSOR_CTL3		0x017c
-+#define FD1_IPC_SENSOR_CTL3_0_SHIFT	16
-+#define FD1_IPC_SENSOR_CTL3_1_SHIFT	0
-+
-+/* Line memory pixel number register */
-+#define FD1_IPC_LMEM			0x01e0
-+#define FD1_IPC_LMEM_LINEAR		1024
-+#define FD1_IPC_LMEM_TILE		960
-+
-+/* Internal Data (HW Version) */
-+#define FD1_IP_INTDATA			0x0800
-+#define FD1_IP_H3			0x02010101
-+#define FD1_IP_M3W			0x02010202
-+
-+/* LUTs */
-+#define FD1_LUT_DIF_ADJ			0x1000
-+#define FD1_LUT_SAD_ADJ			0x1400
-+#define FD1_LUT_BLD_GAIN		0x1800
-+#define FD1_LUT_DIF_GAIN		0x1c00
-+#define FD1_LUT_MDET			0x2000
-+
-+/**
-+ * struct fdp1_fmt - The FDP1 internal format data
-+ * @fourcc: the fourcc code, to match the V4L2 API
-+ * @bpp: bits per pixel per plane
-+ * @num_planes: number of planes
-+ * @hsub: horizontal subsampling factor
-+ * @vsub: vertical subsampling factor
-+ * @fmt: 7-bit format code for the fdp1 hardware
-+ * @swap_yc: the Y and C components are swapped (Y comes before C)
-+ * @swap_uv: the U and V components are swapped (V comes before U)
-+ * @swap: swap register control
-+ * @types: types of queue this format is applicable to
-+ */
-+struct fdp1_fmt {
-+	u32	fourcc;
-+	u8	bpp[3];
-+	u8	num_planes;
-+	u8	hsub;
-+	u8	vsub;
-+	u8	fmt;
-+	bool	swap_yc;
-+	bool	swap_uv;
-+	u8	swap;
-+	u8	types;
-+};
-+
-+static const struct fdp1_fmt fdp1_formats[] = {
-+	/* RGB formats are only supported by the Write Pixel Formatter */
-+
-+	{ V4L2_PIX_FMT_RGB332, { 8, 0, 0 }, 1, 1, 1, 0x00, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE },
-+	{ V4L2_PIX_FMT_XRGB444, { 16, 0, 0 }, 1, 1, 1, 0x01, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD,
-+	  FDP1_CAPTURE },
-+	{ V4L2_PIX_FMT_XRGB555, { 16, 0, 0 }, 1, 1, 1, 0x04, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD,
-+	  FDP1_CAPTURE },
-+	{ V4L2_PIX_FMT_RGB565, { 16, 0, 0 }, 1, 1, 1, 0x06, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD,
-+	  FDP1_CAPTURE },
-+	{ V4L2_PIX_FMT_ABGR32, { 32, 0, 0 }, 1, 1, 1, 0x13, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD,
-+	  FDP1_CAPTURE },
-+	{ V4L2_PIX_FMT_XBGR32, { 32, 0, 0 }, 1, 1, 1, 0x13, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD,
-+	  FDP1_CAPTURE },
-+	{ V4L2_PIX_FMT_ARGB32, { 32, 0, 0 }, 1, 1, 1, 0x13, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE },
-+	{ V4L2_PIX_FMT_XRGB32, { 32, 0, 0 }, 1, 1, 1, 0x13, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE },
-+	{ V4L2_PIX_FMT_RGB24, { 24, 0, 0 }, 1, 1, 1, 0x15, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE },
-+	{ V4L2_PIX_FMT_BGR24, { 24, 0, 0 }, 1, 1, 1, 0x18, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE },
-+	{ V4L2_PIX_FMT_ARGB444, { 16, 0, 0 }, 1, 1, 1, 0x19, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD,
-+	  FDP1_CAPTURE },
-+	{ V4L2_PIX_FMT_ARGB555, { 16, 0, 0 }, 1, 1, 1, 0x1b, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD,
-+	  FDP1_CAPTURE },
-+
-+	/* YUV Formats are supported by Read and Write Pixel Formatters */
-+
-+	{ V4L2_PIX_FMT_NV16M, { 8, 16, 0 }, 2, 2, 1, 0x41, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE | FDP1_OUTPUT },
-+	{ V4L2_PIX_FMT_NV61M, { 8, 16, 0 }, 2, 2, 1, 0x41, false, true,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE | FDP1_OUTPUT },
-+	{ V4L2_PIX_FMT_NV12M, { 8, 16, 0 }, 2, 2, 2, 0x42, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE | FDP1_OUTPUT },
-+	{ V4L2_PIX_FMT_NV21M, { 8, 16, 0 }, 2, 2, 2, 0x42, false, true,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE | FDP1_OUTPUT },
-+	{ V4L2_PIX_FMT_UYVY, { 16, 0, 0 }, 1, 2, 1, 0x47, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE | FDP1_OUTPUT },
-+	{ V4L2_PIX_FMT_VYUY, { 16, 0, 0 }, 1, 2, 1, 0x47, false, true,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE | FDP1_OUTPUT },
-+	{ V4L2_PIX_FMT_YUYV, { 16, 0, 0 }, 1, 2, 1, 0x47, true, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE | FDP1_OUTPUT },
-+	{ V4L2_PIX_FMT_YVYU, { 16, 0, 0 }, 1, 2, 1, 0x47, true, true,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE | FDP1_OUTPUT },
-+	{ V4L2_PIX_FMT_YUV444M, { 8, 8, 8 }, 3, 1, 1, 0x4a, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE | FDP1_OUTPUT },
-+	{ V4L2_PIX_FMT_YVU444M, { 8, 8, 8 }, 3, 1, 1, 0x4a, false, true,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE | FDP1_OUTPUT },
-+	{ V4L2_PIX_FMT_YUV422M, { 8, 8, 8 }, 3, 2, 1, 0x4b, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE | FDP1_OUTPUT },
-+	{ V4L2_PIX_FMT_YVU422M, { 8, 8, 8 }, 3, 2, 1, 0x4b, false, true,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE | FDP1_OUTPUT },
-+	{ V4L2_PIX_FMT_YUV420M, { 8, 8, 8 }, 3, 2, 2, 0x4c, false, false,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE | FDP1_OUTPUT },
-+	{ V4L2_PIX_FMT_YVU420M, { 8, 8, 8 }, 3, 2, 2, 0x4c, false, true,
-+	  FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
-+	  FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
-+	  FDP1_CAPTURE | FDP1_OUTPUT },
-+};
-+
-+static int fdp1_fmt_is_rgb(const struct fdp1_fmt *fmt)
-+{
-+	return fmt->fmt <= 0x1b; /* Last RGB code */
-+}
-+
-+/*
-+ * FDP1 Lookup tables range from 0...255 only
-+ *
-+ * Each table must be less than 256 entries, and all tables
-+ * are padded out to 256 entries by duplicating the last value.
-+ */
-+static const u8 fdp1_diff_adj[] = {
-+	0x00, 0x24, 0x43, 0x5e, 0x76, 0x8c, 0x9e, 0xaf,
-+	0xbd, 0xc9, 0xd4, 0xdd, 0xe4, 0xea, 0xef, 0xf3,
-+	0xf6, 0xf9, 0xfb, 0xfc, 0xfd, 0xfe, 0xfe, 0xff,
-+};
-+
-+static const u8 fdp1_sad_adj[] = {
-+	0x00, 0x24, 0x43, 0x5e, 0x76, 0x8c, 0x9e, 0xaf,
-+	0xbd, 0xc9, 0xd4, 0xdd, 0xe4, 0xea, 0xef, 0xf3,
-+	0xf6, 0xf9, 0xfb, 0xfc, 0xfd, 0xfe, 0xfe, 0xff,
-+};
-+
-+static const u8 fdp1_bld_gain[] = {
-+	0x80,
-+};
-+
-+static const u8 fdp1_dif_gain[] = {
-+	0x80,
-+};
-+
-+static const u8 fdp1_mdet[] = {
-+	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-+	0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-+	0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-+	0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
-+	0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-+	0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
-+	0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
-+	0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-+	0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
-+	0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
-+	0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
-+	0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
-+	0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
-+	0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
-+	0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
-+	0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
-+	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
-+	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
-+	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
-+	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
-+	0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
-+	0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
-+	0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
-+	0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
-+	0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
-+	0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
-+	0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
-+	0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
-+	0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
-+	0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
-+	0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
-+	0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff
-+};
-+
-+/* Per-queue, driver-specific private data */
-+struct fdp1_q_data {
-+	const struct fdp1_fmt		*fmt;
-+	struct v4l2_pix_format_mplane	format;
-+
-+	unsigned int			vsize;
-+	unsigned int			stride_y;
-+	unsigned int			stride_c;
-+};
-+
-+static const struct fdp1_fmt *fdp1_find_format(u32 pixelformat)
-+{
-+	const struct fdp1_fmt *fmt;
-+	unsigned int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(fdp1_formats); i++) {
-+		fmt = &fdp1_formats[i];
-+		if (fmt->fourcc == pixelformat)
-+			return fmt;
-+	}
-+
-+	return NULL;
-+}
-+
-+enum fdp1_deint_mode {
-+	FDP1_PROGRESSIVE = 0, /* Must be zero when !deinterlacing */
-+	FDP1_ADAPT2D3D,
-+	FDP1_FIXED2D,
-+	FDP1_FIXED3D,
-+	FDP1_PREVFIELD,
-+	FDP1_NEXTFIELD,
-+};
-+
-+#define FDP1_DEINT_MODE_USES_NEXT(mode) \
-+	(mode == FDP1_ADAPT2D3D || \
-+	 mode == FDP1_FIXED3D   || \
-+	 mode == FDP1_NEXTFIELD)
-+
-+#define FDP1_DEINT_MODE_USES_PREV(mode) \
-+	(mode == FDP1_ADAPT2D3D || \
-+	 mode == FDP1_FIXED3D   || \
-+	 mode == FDP1_PREVFIELD)
-+
-+/*
-+ * FDP1 operates on potentially 3 fields, which are tracked
-+ * from the VB buffers using this context structure.
-+ * Will always be a field or a full frame, never two fields.
-+ */
-+struct fdp1_field_buffer {
-+	struct vb2_v4l2_buffer		*vb;
-+	dma_addr_t			addrs[3];
-+
-+	/* Should be NONE:TOP:BOTTOM only */
-+	enum v4l2_field			field;
-+
-+	/* Flag to indicate this is the last field in the vb */
-+	bool				last_field;
-+
-+	/* Buffer queue lists */
-+	struct list_head		list;
-+};
-+
-+struct fdp1_buffer {
-+	struct v4l2_m2m_buffer		m2m_buf;
-+	struct fdp1_field_buffer	fields[2];
-+	unsigned int			num_fields;
-+};
-+
-+static inline struct fdp1_buffer *to_fdp1_buffer(struct vb2_v4l2_buffer *vb)
-+{
-+	return container_of(vb, struct fdp1_buffer, m2m_buf.vb);
-+}
-+
-+struct fdp1_job {
-+	struct fdp1_field_buffer	*previous;
-+	struct fdp1_field_buffer	*active;
-+	struct fdp1_field_buffer	*next;
-+	struct fdp1_field_buffer	*dst;
-+
-+	/* A job can only be on one list at a time */
-+	struct list_head		list;
-+};
-+
-+struct fdp1_dev {
-+	struct v4l2_device		v4l2_dev;
-+	struct video_device		vfd;
-+
-+	struct mutex			dev_mutex;
-+	spinlock_t			irqlock;
-+	spinlock_t			device_process_lock;
-+
-+	void __iomem			*regs;
-+	unsigned int			irq;
-+	struct device			*dev;
-+
-+	/* Job Queues */
-+	struct fdp1_job			jobs[FDP1_NUMBER_JOBS];
-+	struct list_head		free_job_list;
-+	struct list_head		queued_job_list;
-+	struct list_head		hw_job_list;
-+
-+	unsigned int			clk_rate;
-+
-+	struct rcar_fcp_device		*fcp;
-+	struct v4l2_m2m_dev		*m2m_dev;
-+};
-+
-+struct fdp1_ctx {
-+	struct v4l2_fh			fh;
-+	struct fdp1_dev			*fdp1;
-+
-+	struct v4l2_ctrl_handler	hdl;
-+	unsigned int			sequence;
-+
-+	/* Processed buffers in this transaction */
-+	u8				num_processed;
-+
-+	/* Transaction length (i.e. how many buffers per transaction) */
-+	u32				translen;
-+
-+	/* Abort requested by m2m */
-+	int				aborting;
-+
-+	/* Deinterlace processing mode */
-+	enum fdp1_deint_mode		deint_mode;
-+
-+	/*
-+	 * Adaptive 2D/3D mode uses a shared mask
-+	 * This is allocated at streamon, if the ADAPT2D3D mode
-+	 * is requested
-+	 */
-+	unsigned int			smsk_size;
-+	dma_addr_t			smsk_addr[2];
-+	void				*smsk_cpu;
-+
-+	/* Capture pipeline, can specify an alpha value
-+	 * for supported formats. 0-255 only
-+	 */
-+	unsigned char			alpha;
-+
-+	/* Source and destination queue data */
-+	struct fdp1_q_data		out_q; /* HW Source */
-+	struct fdp1_q_data		cap_q; /* HW Destination */
-+
-+	/*
-+	 * Field Queues
-+	 * Interlaced fields are used on 3 occasions, and tracked in this list.
-+	 *
-+	 * V4L2 Buffers are tracked inside the fdp1_buffer
-+	 * and released when the last 'field' completes
-+	 */
-+	struct list_head		fields_queue;
-+	unsigned int			buffers_queued;
-+
-+	/*
-+	 * For de-interlacing we need to track our previous buffer
-+	 * while preparing our job lists.
-+	 */
-+	struct fdp1_field_buffer	*previous;
-+};
-+
-+static inline struct fdp1_ctx *fh_to_ctx(struct v4l2_fh *fh)
-+{
-+	return container_of(fh, struct fdp1_ctx, fh);
-+}
-+
-+static struct fdp1_q_data *get_q_data(struct fdp1_ctx *ctx,
-+					 enum v4l2_buf_type type)
-+{
-+	if (V4L2_TYPE_IS_OUTPUT(type))
-+		return &ctx->out_q;
-+	else
-+		return &ctx->cap_q;
-+}
-+
-+/*
-+ * list_remove_job: Take the first item off the specified job list
-+ *
-+ * Returns: pointer to a job, or NULL if the list is empty.
-+ */
-+static struct fdp1_job *list_remove_job(struct fdp1_dev *fdp1,
-+					 struct list_head *list)
-+{
-+	struct fdp1_job *job;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&fdp1->irqlock, flags);
-+	job = list_first_entry_or_null(list, struct fdp1_job, list);
-+	if (job)
-+		list_del(&job->list);
-+	spin_unlock_irqrestore(&fdp1->irqlock, flags);
-+
-+	return job;
-+}
-+
-+/*
-+ * list_add_job: Add a job to the specified job list
-+ *
-+ * Returns: void - always succeeds
-+ */
-+static void list_add_job(struct fdp1_dev *fdp1,
-+			 struct list_head *list,
-+			 struct fdp1_job *job)
-+{
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&fdp1->irqlock, flags);
-+	list_add_tail(&job->list, list);
-+	spin_unlock_irqrestore(&fdp1->irqlock, flags);
-+}
-+
-+static struct fdp1_job *fdp1_job_alloc(struct fdp1_dev *fdp1)
-+{
-+	return list_remove_job(fdp1, &fdp1->free_job_list);
-+}
-+
-+static void fdp1_job_free(struct fdp1_dev *fdp1, struct fdp1_job *job)
-+{
-+	/* Ensure that all residue from previous jobs is gone */
-+	memset(job, 0, sizeof(struct fdp1_job));
-+
-+	list_add_job(fdp1, &fdp1->free_job_list, job);
-+}
-+
-+static void queue_job(struct fdp1_dev *fdp1, struct fdp1_job *job)
-+{
-+	list_add_job(fdp1, &fdp1->queued_job_list, job);
-+}
-+
-+static struct fdp1_job *get_queued_job(struct fdp1_dev *fdp1)
-+{
-+	return list_remove_job(fdp1, &fdp1->queued_job_list);
-+}
-+
-+static void queue_hw_job(struct fdp1_dev *fdp1, struct fdp1_job *job)
-+{
-+	list_add_job(fdp1, &fdp1->hw_job_list, job);
-+}
-+
-+static struct fdp1_job *get_hw_queued_job(struct fdp1_dev *fdp1)
-+{
-+	return list_remove_job(fdp1, &fdp1->hw_job_list);
-+}
-+
-+/*
-+ * Buffer lists handling
-+ */
-+static void fdp1_field_complete(struct fdp1_ctx *ctx,
-+				struct fdp1_field_buffer *fbuf)
-+{
-+	/* job->previous may be on the first field */
-+	if (!fbuf)
-+		return;
-+
-+	if (fbuf->last_field)
-+		v4l2_m2m_buf_done(fbuf->vb, VB2_BUF_STATE_DONE);
-+}
-+
-+static void fdp1_queue_field(struct fdp1_ctx *ctx,
-+			     struct fdp1_field_buffer *fbuf)
-+{
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&ctx->fdp1->irqlock, flags);
-+	list_add_tail(&fbuf->list, &ctx->fields_queue);
-+	spin_unlock_irqrestore(&ctx->fdp1->irqlock, flags);
-+
-+	ctx->buffers_queued++;
-+}
-+
-+static struct fdp1_field_buffer *fdp1_dequeue_field(struct fdp1_ctx *ctx)
-+{
-+	struct fdp1_field_buffer *fbuf;
-+	unsigned long flags;
-+
-+	ctx->buffers_queued--;
-+
-+	spin_lock_irqsave(&ctx->fdp1->irqlock, flags);
-+	fbuf = list_first_entry_or_null(&ctx->fields_queue,
-+					struct fdp1_field_buffer, list);
-+	if (fbuf)
-+		list_del(&fbuf->list);
-+	spin_unlock_irqrestore(&ctx->fdp1->irqlock, flags);
-+
-+	return fbuf;
-+}
-+
-+/*
-+ * Return the next field in the queue - or NULL,
-+ * without removing the item from the list
-+ */
-+static struct fdp1_field_buffer *fdp1_peek_queued_field(struct fdp1_ctx *ctx)
-+{
-+	struct fdp1_field_buffer *fbuf;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&ctx->fdp1->irqlock, flags);
-+	fbuf = list_first_entry_or_null(&ctx->fields_queue,
-+					struct fdp1_field_buffer, list);
-+	spin_unlock_irqrestore(&ctx->fdp1->irqlock, flags);
-+
-+	return fbuf;
-+}
-+
-+static u32 fdp1_read(struct fdp1_dev *fdp1, unsigned int reg)
-+{
-+	u32 value = ioread32(fdp1->regs + reg);
-+
-+	if (debug >= 2)
-+		dprintk(fdp1, "Read 0x%08x from 0x%04x\n", value, reg);
-+
-+	return value;
-+}
-+
-+static void fdp1_write(struct fdp1_dev *fdp1, u32 val, unsigned int reg)
-+{
-+	if (debug >= 2)
-+		dprintk(fdp1, "Write 0x%08x to 0x%04x\n", val, reg);
-+
-+	iowrite32(val, fdp1->regs + reg);
-+}
-+
-+/* IPC registers are to be programmed with constant values */
-+static void fdp1_set_ipc_dli(struct fdp1_ctx *ctx)
-+{
-+	struct fdp1_dev *fdp1 = ctx->fdp1;
-+
-+	fdp1_write(fdp1, FD1_IPC_SMSK_THRESH_CONST,	FD1_IPC_SMSK_THRESH);
-+	fdp1_write(fdp1, FD1_IPC_COMB_DET_CONST,	FD1_IPC_COMB_DET);
-+	fdp1_write(fdp1, FD1_IPC_MOTDEC_CONST,	FD1_IPC_MOTDEC);
-+
-+	fdp1_write(fdp1, FD1_IPC_DLI_BLEND_CONST,	FD1_IPC_DLI_BLEND);
-+	fdp1_write(fdp1, FD1_IPC_DLI_HGAIN_CONST,	FD1_IPC_DLI_HGAIN);
-+	fdp1_write(fdp1, FD1_IPC_DLI_SPRS_CONST,	FD1_IPC_DLI_SPRS);
-+	fdp1_write(fdp1, FD1_IPC_DLI_ANGLE_CONST,	FD1_IPC_DLI_ANGLE);
-+	fdp1_write(fdp1, FD1_IPC_DLI_ISOPIX0_CONST,	FD1_IPC_DLI_ISOPIX0);
-+	fdp1_write(fdp1, FD1_IPC_DLI_ISOPIX1_CONST,	FD1_IPC_DLI_ISOPIX1);
-+}
-+
-+
-+static void fdp1_set_ipc_sensor(struct fdp1_ctx *ctx)
-+{
-+	struct fdp1_dev *fdp1 = ctx->fdp1;
-+	struct fdp1_q_data *src_q_data = &ctx->out_q;
-+	unsigned int x0, x1;
-+	unsigned int hsize = src_q_data->format.width;
-+	unsigned int vsize = src_q_data->format.height;
-+
-+	x0 = hsize / 3;
-+	x1 = 2 * hsize / 3;
-+
-+	fdp1_write(fdp1, FD1_IPC_SENSOR_TH0_CONST, FD1_IPC_SENSOR_TH0);
-+	fdp1_write(fdp1, FD1_IPC_SENSOR_TH1_CONST, FD1_IPC_SENSOR_TH1);
-+	fdp1_write(fdp1, FD1_IPC_SENSOR_CTL0_CONST, FD1_IPC_SENSOR_CTL0);
-+	fdp1_write(fdp1, FD1_IPC_SENSOR_CTL1_CONST, FD1_IPC_SENSOR_CTL1);
-+
-+	fdp1_write(fdp1, ((hsize - 1) << FD1_IPC_SENSOR_CTL2_X_SHIFT) |
-+			 ((vsize - 1) << FD1_IPC_SENSOR_CTL2_Y_SHIFT),
-+			 FD1_IPC_SENSOR_CTL2);
-+
-+	fdp1_write(fdp1, (x0 << FD1_IPC_SENSOR_CTL3_0_SHIFT) |
-+			 (x1 << FD1_IPC_SENSOR_CTL3_1_SHIFT),
-+			 FD1_IPC_SENSOR_CTL3);
-+}
-+
-+/*
-+ * fdp1_write_lut: Write a padded LUT to the hw
-+ *
-+ * FDP1 uses constant data for de-interlacing processing,
-+ * with large tables. These hardware tables are all 256 bytes
-+ * long, however they often contain repeated data at the end.
-+ *
-+ * The last byte of the table is written to all remaining entries.
-+ */
-+static void fdp1_write_lut(struct fdp1_dev *fdp1, const u8 *lut,
-+			   unsigned int len, unsigned int base)
-+{
-+	unsigned int i;
-+	u8 pad;
-+
-+	/* Tables larger than the hw are clipped */
-+	len = min(len, 256u);
-+
-+	for (i = 0; i < len; i++)
-+		fdp1_write(fdp1, lut[i], base + (i*4));
-+
-+	/* Tables are padded with the last entry */
-+	pad = lut[i-1];
-+
-+	for (; i < 256; i++)
-+		fdp1_write(fdp1, pad, base + (i*4));
-+}
-+
-+static void fdp1_set_lut(struct fdp1_dev *fdp1)
-+{
-+	fdp1_write_lut(fdp1, fdp1_diff_adj, ARRAY_SIZE(fdp1_diff_adj),
-+			FD1_LUT_DIF_ADJ);
-+	fdp1_write_lut(fdp1, fdp1_sad_adj,  ARRAY_SIZE(fdp1_sad_adj),
-+			FD1_LUT_SAD_ADJ);
-+	fdp1_write_lut(fdp1, fdp1_bld_gain, ARRAY_SIZE(fdp1_bld_gain),
-+			FD1_LUT_BLD_GAIN);
-+	fdp1_write_lut(fdp1, fdp1_dif_gain, ARRAY_SIZE(fdp1_dif_gain),
-+			FD1_LUT_DIF_GAIN);
-+	fdp1_write_lut(fdp1, fdp1_mdet, ARRAY_SIZE(fdp1_mdet),
-+			FD1_LUT_MDET);
-+}
-+
-+static void fdp1_configure_rpf(struct fdp1_ctx *ctx,
-+			       struct fdp1_job *job)
-+{
-+	struct fdp1_dev *fdp1 = ctx->fdp1;
-+	u32 picture_size;
-+	u32 pstride;
-+	u32 format;
-+	u32 smsk_addr;
-+
-+	struct fdp1_q_data *q_data = &ctx->out_q;
-+
-+	/* Picture size is common to Source and Destination frames */
-+	picture_size = (q_data->format.width << FD1_RPF_SIZE_H_SHIFT)
-+		     | (q_data->vsize << FD1_RPF_SIZE_V_SHIFT);
-+
-+	/* Strides */
-+	pstride = q_data->stride_y << FD1_RPF_PSTRIDE_Y_SHIFT;
-+	if (q_data->format.num_planes > 1)
-+		pstride |= q_data->stride_c << FD1_RPF_PSTRIDE_C_SHIFT;
-+
-+	/* Format control */
-+	format = q_data->fmt->fmt;
-+	if (q_data->fmt->swap_yc)
-+		format |= FD1_RPF_FORMAT_RSPYCS;
-+
-+	if (q_data->fmt->swap_uv)
-+		format |= FD1_RPF_FORMAT_RSPUVS;
-+
-+	if (job->active->field == V4L2_FIELD_BOTTOM) {
-+		format |= FD1_RPF_FORMAT_CF; /* Set for Bottom field */
-+		smsk_addr = ctx->smsk_addr[0];
-+	} else {
-+		smsk_addr = ctx->smsk_addr[1];
-+	}
-+
-+	/* Deint mode is non-zero when deinterlacing */
-+	if (ctx->deint_mode)
-+		format |= FD1_RPF_FORMAT_CIPM;
-+
-+	fdp1_write(fdp1, format, FD1_RPF_FORMAT);
-+	fdp1_write(fdp1, q_data->fmt->swap, FD1_RPF_SWAP);
-+	fdp1_write(fdp1, picture_size, FD1_RPF_SIZE);
-+	fdp1_write(fdp1, pstride, FD1_RPF_PSTRIDE);
-+	fdp1_write(fdp1, smsk_addr, FD1_RPF_SMSK_ADDR);
-+
-+	/* Previous Field Channel (CH0) */
-+	if (job->previous)
-+		fdp1_write(fdp1, job->previous->addrs[0], FD1_RPF0_ADDR_Y);
-+
-+	/* Current Field Channel (CH1) */
-+	fdp1_write(fdp1, job->active->addrs[0], FD1_RPF1_ADDR_Y);
-+	fdp1_write(fdp1, job->active->addrs[1], FD1_RPF1_ADDR_C0);
-+	fdp1_write(fdp1, job->active->addrs[2], FD1_RPF1_ADDR_C1);
-+
-+	/* Next Field  Channel (CH2) */
-+	if (job->next)
-+		fdp1_write(fdp1, job->next->addrs[0], FD1_RPF2_ADDR_Y);
-+}
-+
-+static void fdp1_configure_wpf(struct fdp1_ctx *ctx,
-+			       struct fdp1_job *job)
-+{
-+	struct fdp1_dev *fdp1 = ctx->fdp1;
-+	struct fdp1_q_data *src_q_data = &ctx->out_q;
-+	struct fdp1_q_data *q_data = &ctx->cap_q;
-+	u32 pstride;
-+	u32 format;
-+	u32 swap;
-+	u32 rndctl;
-+
-+	pstride = q_data->format.plane_fmt[0].bytesperline
-+			<< FD1_WPF_PSTRIDE_Y_SHIFT;
-+
-+	if (q_data->format.num_planes > 1)
-+		pstride |= q_data->format.plane_fmt[1].bytesperline
-+			<< FD1_WPF_PSTRIDE_C_SHIFT;
-+
-+	format = q_data->fmt->fmt; /* Output Format Code */
-+
-+	if (q_data->fmt->swap_yc)
-+		format |= FD1_WPF_FORMAT_WSPYCS;
-+
-+	if (q_data->fmt->swap_uv)
-+		format |= FD1_WPF_FORMAT_WSPUVS;
-+
-+	if (fdp1_fmt_is_rgb(q_data->fmt)) {
-+		/* Enable Colour Space conversion */
-+		format |= FD1_WPF_FORMAT_CSC;
-+
-+		/* Set WRTM */
-+		if (src_q_data->format.ycbcr_enc == V4L2_YCBCR_ENC_709)
-+			format |= FD1_WPF_FORMAT_WRTM_709_16;
-+		else if (src_q_data->format.quantization ==
-+				V4L2_QUANTIZATION_FULL_RANGE)
-+			format |= FD1_WPF_FORMAT_WRTM_601_0;
-+		else
-+			format |= FD1_WPF_FORMAT_WRTM_601_16;
-+	}
-+
-+	/* Set an alpha value into the Pad Value */
-+	format |= ctx->alpha << FD1_WPF_FORMAT_PDV_SHIFT;
-+
-+	/* Determine picture rounding and clipping */
-+	rndctl = FD1_WPF_RNDCTL_CBRM; /* Rounding Off */
-+	rndctl |= FD1_WPF_RNDCTL_CLMD_NOCLIP;
-+
-+	/* WPF Swap needs both ISWAP and OSWAP setting */
-+	swap = q_data->fmt->swap << FD1_WPF_SWAP_OSWAP_SHIFT;
-+	swap |= src_q_data->fmt->swap << FD1_WPF_SWAP_SSWAP_SHIFT;
-+
-+	fdp1_write(fdp1, format, FD1_WPF_FORMAT);
-+	fdp1_write(fdp1, rndctl, FD1_WPF_RNDCTL);
-+	fdp1_write(fdp1, swap, FD1_WPF_SWAP);
-+	fdp1_write(fdp1, pstride, FD1_WPF_PSTRIDE);
-+
-+	fdp1_write(fdp1, job->dst->addrs[0], FD1_WPF_ADDR_Y);
-+	fdp1_write(fdp1, job->dst->addrs[1], FD1_WPF_ADDR_C0);
-+	fdp1_write(fdp1, job->dst->addrs[2], FD1_WPF_ADDR_C1);
-+}
-+
-+static void fdp1_configure_deint_mode(struct fdp1_ctx *ctx,
-+				      struct fdp1_job *job)
-+{
-+	struct fdp1_dev *fdp1 = ctx->fdp1;
-+	u32 opmode = FD1_CTL_OPMODE_VIMD_NOINTERRUPT;
-+	u32 ipcmode = FD1_IPC_MODE_DLI; /* Always set */
-+	u32 channels = FD1_CTL_CHACT_WR | FD1_CTL_CHACT_RD1; /* Always on */
-+
-+	/* De-interlacing Mode */
-+	switch (ctx->deint_mode) {
-+	default:
-+	case FDP1_PROGRESSIVE:
-+		dprintk(fdp1, "Progressive Mode\n");
-+		opmode |= FD1_CTL_OPMODE_PRG;
-+		ipcmode |= FD1_IPC_MODE_DIM_FIXED2D;
-+		break;
-+	case FDP1_ADAPT2D3D:
-+		dprintk(fdp1, "Adapt2D3D Mode\n");
-+		if (ctx->sequence == 0 || ctx->aborting)
-+			ipcmode |= FD1_IPC_MODE_DIM_FIXED2D;
-+		else
-+			ipcmode |= FD1_IPC_MODE_DIM_ADAPT2D3D;
-+
-+		if (ctx->sequence > 1) {
-+			channels |= FD1_CTL_CHACT_SMW;
-+			channels |= FD1_CTL_CHACT_RD0 | FD1_CTL_CHACT_RD2;
-+		}
-+
-+		if (ctx->sequence > 2)
-+			channels |= FD1_CTL_CHACT_SMR;
-+
-+		break;
-+	case FDP1_FIXED3D:
-+		dprintk(fdp1, "Fixed 3D Mode\n");
-+		ipcmode |= FD1_IPC_MODE_DIM_FIXED3D;
-+		/* Except for first and last frame, enable all channels */
-+		if (!(ctx->sequence == 0 || ctx->aborting))
-+			channels |= FD1_CTL_CHACT_RD0 | FD1_CTL_CHACT_RD2;
-+		break;
-+	case FDP1_FIXED2D:
-+		dprintk(fdp1, "Fixed 2D Mode\n");
-+		ipcmode |= FD1_IPC_MODE_DIM_FIXED2D;
-+		/* No extra channels enabled */
-+		break;
-+	case FDP1_PREVFIELD:
-+		dprintk(fdp1, "Previous Field Mode\n");
-+		ipcmode |= FD1_IPC_MODE_DIM_PREVFIELD;
-+		channels |= FD1_CTL_CHACT_RD0; /* Previous */
-+		break;
-+	case FDP1_NEXTFIELD:
-+		dprintk(fdp1, "Next Field Mode\n");
-+		ipcmode |= FD1_IPC_MODE_DIM_NEXTFIELD;
-+		channels |= FD1_CTL_CHACT_RD2; /* Next */
-+		break;
-+	}
-+
-+	fdp1_write(fdp1, channels,	FD1_CTL_CHACT);
-+	fdp1_write(fdp1, opmode,	FD1_CTL_OPMODE);
-+	fdp1_write(fdp1, ipcmode,	FD1_IPC_MODE);
-+}
-+
-+/*
-+ * fdp1_device_process() - Run the hardware
-+ *
-+ * Configure and start the hardware to generate a single frame
-+ * of output given our input parameters.
-+ */
-+static int fdp1_device_process(struct fdp1_ctx *ctx)
-+
-+{
-+	struct fdp1_dev *fdp1 = ctx->fdp1;
-+	struct fdp1_job *job;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&fdp1->device_process_lock, flags);
-+
-+	/* Get a job to process */
-+	job = get_queued_job(fdp1);
-+	if (!job) {
-+		/*
-+		 * VINT can call us to see if we can queue another job.
-+		 * If we have no work to do, we simply return.
-+		 */
-+		spin_unlock_irqrestore(&fdp1->device_process_lock, flags);
-+		return 0;
-+	}
-+
-+	/* First Frame only? ... */
-+	fdp1_write(fdp1, FD1_CTL_CLKCTRL_CSTP_N, FD1_CTL_CLKCTRL);
-+
-+	/* Set the mode, and configuration */
-+	fdp1_configure_deint_mode(ctx, job);
-+
-+	/* DLI Static Configuration */
-+	fdp1_set_ipc_dli(ctx);
-+
-+	/* Sensor Configuration */
-+	fdp1_set_ipc_sensor(ctx);
-+
-+	/* Setup the source picture */
-+	fdp1_configure_rpf(ctx, job);
-+
-+	/* Setup the destination picture */
-+	fdp1_configure_wpf(ctx, job);
-+
-+	/* Line Memory Pixel Number Register for linear access */
-+	fdp1_write(fdp1, FD1_IPC_LMEM_LINEAR, FD1_IPC_LMEM);
-+
-+	/* Enable Interrupts */
-+	fdp1_write(fdp1, FD1_CTL_IRQ_MASK, FD1_CTL_IRQENB);
-+
-+	/* Finally, the Immediate Registers */
-+
-+	/* This job is now in the HW queue */
-+	queue_hw_job(fdp1, job);
-+
-+	/* Start the command */
-+	fdp1_write(fdp1, FD1_CTL_CMD_STRCMD, FD1_CTL_CMD);
-+
-+	/* Registers will update to HW at next VINT */
-+	fdp1_write(fdp1, FD1_CTL_REGEND_REGEND, FD1_CTL_REGEND);
-+
-+	/* Enable VINT Generator */
-+	fdp1_write(fdp1, FD1_CTL_SGCMD_SGEN, FD1_CTL_SGCMD);
-+
-+	spin_unlock_irqrestore(&fdp1->device_process_lock, flags);
-+
-+	return 0;
-+}
-+
-+/*
-+ * mem2mem callbacks
-+ */
-+
-+/**
-+ * job_ready() - check whether an instance is ready to be scheduled to run
-+ */
-+static int fdp1_m2m_job_ready(void *priv)
-+{
-+	struct fdp1_ctx *ctx = priv;
-+	struct fdp1_q_data *src_q_data = &ctx->out_q;
-+	int srcbufs = 1;
-+	int dstbufs = 1;
-+
-+	dprintk(ctx->fdp1, "+ Src: %d : Dst: %d\n",
-+			v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx),
-+			v4l2_m2m_num_dst_bufs_ready(ctx->fh.m2m_ctx));
-+
-+	/* One output buffer is required for each field */
-+	if (V4L2_FIELD_HAS_BOTH(src_q_data->format.field))
-+		dstbufs = 2;
-+
-+	if (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) < srcbufs
-+	    || v4l2_m2m_num_dst_bufs_ready(ctx->fh.m2m_ctx) < dstbufs) {
-+		dprintk(ctx->fdp1, "Not enough buffers available\n");
-+		return 0;
-+	}
-+
-+	return 1;
-+}
-+
-+static void fdp1_m2m_job_abort(void *priv)
-+{
-+	struct fdp1_ctx *ctx = priv;
-+
-+	dprintk(ctx->fdp1, "+\n");
-+
-+	/* Will cancel the transaction in the next interrupt handler */
-+	ctx->aborting = 1;
-+
-+	/* Immediate abort sequence */
-+	fdp1_write(ctx->fdp1, 0, FD1_CTL_SGCMD);
-+	fdp1_write(ctx->fdp1, FD1_CTL_SRESET_SRST, FD1_CTL_SRESET);
-+}
-+
-+/*
-+ * fdp1_prepare_job: Prepare and queue a new job for a single action of work
-+ *
-+ * Prepare the next field, (or frame in progressive) and an output
-+ * buffer for the hardware to perform a single operation.
-+ */
-+static struct fdp1_job *fdp1_prepare_job(struct fdp1_ctx *ctx)
-+{
-+	struct vb2_v4l2_buffer *vbuf;
-+	struct fdp1_buffer *fbuf;
-+	struct fdp1_dev *fdp1 = ctx->fdp1;
-+	struct fdp1_job *job;
-+	unsigned int buffers_required = 1;
-+
-+	dprintk(fdp1, "+\n");
-+
-+	if (FDP1_DEINT_MODE_USES_NEXT(ctx->deint_mode))
-+		buffers_required = 2;
-+
-+	if (ctx->buffers_queued < buffers_required)
-+		return NULL;
-+
-+	job = fdp1_job_alloc(fdp1);
-+	if (!job) {
-+		dprintk(fdp1, "No free jobs currently available\n");
-+		return NULL;
-+	}
-+
-+	job->active = fdp1_dequeue_field(ctx);
-+	if (!job->active) {
-+		/* Buffer check should prevent this ever happening */
-+		dprintk(fdp1, "No input buffers currently available\n");
-+
-+		fdp1_job_free(fdp1, job);
-+		return NULL;
-+	}
-+
-+	dprintk(fdp1, "+ Buffer en-route...\n");
-+
-+	/* Source buffers have been prepared on our buffer_queue
-+	 * Prepare our Output buffer
-+	 */
-+	vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
-+	fbuf = to_fdp1_buffer(vbuf);
-+	job->dst = &fbuf->fields[0];
-+
-+	job->active->vb->sequence = ctx->sequence;
-+	job->dst->vb->sequence = ctx->sequence;
-+	ctx->sequence++;
-+
-+	if (FDP1_DEINT_MODE_USES_PREV(ctx->deint_mode)) {
-+		job->previous = ctx->previous;
-+
-+		/* Active buffer becomes the next job's previous buffer */
-+		ctx->previous = job->active;
-+	}
-+
-+	if (FDP1_DEINT_MODE_USES_NEXT(ctx->deint_mode)) {
-+		/* Must be called after 'active' is dequeued */
-+		job->next = fdp1_peek_queued_field(ctx);
-+	}
-+
-+	/* Transfer timestamps and flags from src->dst */
-+
-+	job->dst->vb->vb2_buf.timestamp = job->active->vb->vb2_buf.timestamp;
-+
-+	job->dst->vb->flags = job->active->vb->flags &
-+				V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
-+
-+	/* Ideally, the frame-end function will just 'check' to see
-+	 * if there are more jobs instead
-+	 */
-+	ctx->translen++;
-+
-+	/* Finally, Put this job on the processing queue */
-+	queue_job(fdp1, job);
-+
-+	dprintk(fdp1, "Job Queued translen = %d\n", ctx->translen);
-+
-+	return job;
-+}
-+
-+/* fdp1_m2m_device_run() - prepares and starts the device for an M2M task
-+ *
-+ * A single input buffer is taken and serialised into our fdp1_buffer
-+ * queue. The queue is then processed to create as many jobs as possible
-+ * from our available input.
-+ */
-+static void fdp1_m2m_device_run(void *priv)
-+{
-+	struct fdp1_ctx *ctx = priv;
-+	struct fdp1_dev *fdp1 = ctx->fdp1;
-+	struct vb2_v4l2_buffer *src_vb;
-+	struct fdp1_buffer *buf;
-+	unsigned int i;
-+
-+	dprintk(fdp1, "+\n");
-+
-+	ctx->translen = 0;
-+
-+	/* Get our incoming buffer of either one or two fields, or one frame */
-+	src_vb = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
-+	buf = to_fdp1_buffer(src_vb);
-+
-+	for (i = 0; i < buf->num_fields; i++) {
-+		struct fdp1_field_buffer *fbuf = &buf->fields[i];
-+
-+		fdp1_queue_field(ctx, fbuf);
-+		dprintk(fdp1, "Queued Buffer [%d] last_field:%d\n",
-+				i, fbuf->last_field);
-+	}
-+
-+	/* Queue as many jobs as our data provides for */
-+	while (fdp1_prepare_job(ctx))
-+		;
-+
-+	if (ctx->translen == 0) {
-+		dprintk(fdp1, "No jobs were processed. M2M action complete\n");
-+		v4l2_m2m_job_finish(fdp1->m2m_dev, ctx->fh.m2m_ctx);
-+		return;
-+	}
-+
-+	/* Kick the job processing action */
-+	fdp1_device_process(ctx);
-+}
-+
-+/*
-+ * device_frame_end:
-+ *
-+ * Handles the M2M level after a buffer completion event.
-+ */
-+static void device_frame_end(struct fdp1_dev *fdp1,
-+			     enum vb2_buffer_state state)
-+{
-+	struct fdp1_ctx *ctx;
-+	unsigned long flags;
-+	struct fdp1_job *job = get_hw_queued_job(fdp1);
-+
-+	dprintk(fdp1, "+\n");
-+
-+	ctx = v4l2_m2m_get_curr_priv(fdp1->m2m_dev);
-+
-+	if (ctx == NULL) {
-+		v4l2_err(&fdp1->v4l2_dev,
-+			"Instance released before the end of transaction\n");
-+		return;
-+	}
-+
-+	ctx->num_processed++;
-+
-+	/*
-+	 * fdp1_field_complete will call buf_done only when the last vb2_buffer
-+	 * reference is complete
-+	 */
-+	if (FDP1_DEINT_MODE_USES_PREV(ctx->deint_mode))
-+		fdp1_field_complete(ctx, job->previous);
-+	else
-+		fdp1_field_complete(ctx, job->active);
-+
-+	spin_lock_irqsave(&fdp1->irqlock, flags);
-+	v4l2_m2m_buf_done(job->dst->vb, state);
-+	job->dst = NULL;
-+	spin_unlock_irqrestore(&fdp1->irqlock, flags);
-+
-+	/* Move this job back to the free job list */
-+	fdp1_job_free(fdp1, job);
-+
-+	dprintk(fdp1, "curr_ctx->num_processed %d curr_ctx->translen %d\n",
-+			ctx->num_processed, ctx->translen);
-+
-+	if (ctx->num_processed == ctx->translen ||
-+			ctx->aborting) {
-+		dprintk(ctx->fdp1, "Finishing transaction\n");
-+		ctx->num_processed = 0;
-+		v4l2_m2m_job_finish(fdp1->m2m_dev, ctx->fh.m2m_ctx);
-+	} else {
-+		/*
-+		 * For pipelined performance support, this would
-+		 * be called from a VINT handler
-+		 */
-+		fdp1_device_process(ctx);
-+	}
-+}
-+
-+/*
-+ * video ioctls
-+ */
-+static int fdp1_vidioc_querycap(struct file *file, void *priv,
-+			   struct v4l2_capability *cap)
-+{
-+	strlcpy(cap->driver, DRIVER_NAME, sizeof(cap->driver));
-+	strlcpy(cap->card, DRIVER_NAME, sizeof(cap->card));
-+	snprintf(cap->bus_info, sizeof(cap->bus_info),
-+			"platform:%s", DRIVER_NAME);
-+	return 0;
-+}
-+
-+static int fdp1_enum_fmt(struct v4l2_fmtdesc *f, u32 type)
-+{
-+	unsigned int i, num;
-+
-+	num = 0;
-+
-+	for (i = 0; i < ARRAY_SIZE(fdp1_formats); ++i) {
-+		if (fdp1_formats[i].types & type) {
-+			if (num == f->index)
-+				break;
-+			++num;
-+		}
-+	}
-+
-+	/* Format not found */
-+	if (i >= ARRAY_SIZE(fdp1_formats))
-+		return -EINVAL;
-+
-+	/* Format found */
-+	f->pixelformat = fdp1_formats[i].fourcc;
-+
-+	return 0;
-+}
-+
-+static int fdp1_enum_fmt_vid_cap(struct file *file, void *priv,
-+				 struct v4l2_fmtdesc *f)
-+{
-+	return fdp1_enum_fmt(f, FDP1_CAPTURE);
-+}
-+
-+static int fdp1_enum_fmt_vid_out(struct file *file, void *priv,
-+				   struct v4l2_fmtdesc *f)
-+{
-+	return fdp1_enum_fmt(f, FDP1_OUTPUT);
-+}
-+
-+static int fdp1_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
-+{
-+	struct fdp1_q_data *q_data;
-+	struct fdp1_ctx *ctx = fh_to_ctx(priv);
-+
-+	if (!v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type))
-+		return -EINVAL;
-+
-+	q_data = get_q_data(ctx, f->type);
-+	f->fmt.pix_mp = q_data->format;
-+
-+	return 0;
-+}
-+
-+static void fdp1_compute_stride(struct v4l2_pix_format_mplane *pix,
-+				const struct fdp1_fmt *fmt)
-+{
-+	unsigned int i;
-+
-+	/* Compute and clamp the stride and image size. */
-+	for (i = 0; i < min_t(unsigned int, fmt->num_planes, 2U); ++i) {
-+		unsigned int hsub = i > 0 ? fmt->hsub : 1;
-+		unsigned int vsub = i > 0 ? fmt->vsub : 1;
-+		 /* From VSP : TODO: Confirm alignment limits for FDP1 */
-+		unsigned int align = 128;
-+		unsigned int bpl;
-+
-+		bpl = clamp_t(unsigned int, pix->plane_fmt[i].bytesperline,
-+			      pix->width / hsub * fmt->bpp[i] / 8,
-+			      round_down(FDP1_MAX_STRIDE, align));
-+
-+		pix->plane_fmt[i].bytesperline = round_up(bpl, align);
-+		pix->plane_fmt[i].sizeimage = pix->plane_fmt[i].bytesperline
-+					    * pix->height / vsub;
-+
-+		memset(pix->plane_fmt[i].reserved, 0,
-+		       sizeof(pix->plane_fmt[i].reserved));
-+	}
-+
-+	if (fmt->num_planes == 3) {
-+		/* The two chroma planes must have the same stride. */
-+		pix->plane_fmt[2].bytesperline = pix->plane_fmt[1].bytesperline;
-+		pix->plane_fmt[2].sizeimage = pix->plane_fmt[1].sizeimage;
-+
-+		memset(pix->plane_fmt[2].reserved, 0,
-+		       sizeof(pix->plane_fmt[2].reserved));
-+	}
-+}
-+
-+static void fdp1_try_fmt_output(struct fdp1_ctx *ctx,
-+				const struct fdp1_fmt **fmtinfo,
-+				struct v4l2_pix_format_mplane *pix)
-+{
-+	const struct fdp1_fmt *fmt;
-+	unsigned int width;
-+	unsigned int height;
-+
-+	/* Validate the pixel format to ensure the output queue supports it. */
-+	fmt = fdp1_find_format(pix->pixelformat);
-+	if (!fmt || !(fmt->types & FDP1_OUTPUT))
-+		fmt = fdp1_find_format(V4L2_PIX_FMT_YUYV);
-+
-+	if (fmtinfo)
-+		*fmtinfo = fmt;
-+
-+	pix->pixelformat = fmt->fourcc;
-+	pix->num_planes = fmt->num_planes;
-+
-+	/*
-+	 * Progressive video and all interlaced field orders are acceptable.
-+	 * Default to V4L2_FIELD_INTERLACED.
-+	 */
-+	if (pix->field != V4L2_FIELD_NONE &&
-+	    pix->field != V4L2_FIELD_ALTERNATE &&
-+	    !V4L2_FIELD_HAS_BOTH(pix->field))
-+		pix->field = V4L2_FIELD_INTERLACED;
-+
-+	/*
-+	 * The deinterlacer doesn't care about the colorspace, accept all values
-+	 * and default to V4L2_COLORSPACE_SMPTE170M. The YUV to RGB conversion
-+	 * at the output of the deinterlacer supports a subset of encodings and
-+	 * quantization methods and will only be available when the colorspace
-+	 * allows it.
-+	 */
-+	if (pix->colorspace == V4L2_COLORSPACE_DEFAULT)
-+		pix->colorspace = V4L2_COLORSPACE_SMPTE170M;
-+
-+	/*
-+	 * Align the width and height for YUV 4:2:2 and 4:2:0 formats and clamp
-+	 * them to the supported frame size range. The height boundary are
-+	 * related to the full frame, divide them by two when the format passes
-+	 * fields in separate buffers.
-+	 */
-+	width = round_down(pix->width, fmt->hsub);
-+	pix->width = clamp(width, FDP1_MIN_W, FDP1_MAX_W);
-+
-+	height = round_down(pix->height, fmt->vsub);
-+	if (pix->field == V4L2_FIELD_ALTERNATE)
-+		pix->height = clamp(height, FDP1_MIN_H / 2, FDP1_MAX_H / 2);
-+	else
-+		pix->height = clamp(height, FDP1_MIN_H, FDP1_MAX_H);
-+
-+	fdp1_compute_stride(pix, fmt);
-+}
-+
-+static void fdp1_try_fmt_capture(struct fdp1_ctx *ctx,
-+				 const struct fdp1_fmt **fmtinfo,
-+				 struct v4l2_pix_format_mplane *pix)
-+{
-+	struct fdp1_q_data *src_data = &ctx->out_q;
-+	enum v4l2_colorspace colorspace;
-+	enum v4l2_ycbcr_encoding ycbcr_enc;
-+	enum v4l2_quantization quantization;
-+	const struct fdp1_fmt *fmt;
-+	bool allow_rgb;
-+
-+	/*
-+	 * Validate the pixel format. We can only accept RGB output formats if
-+	 * the input encoding and quantization are compatible with the format
-+	 * conversions supported by the hardware. The supported combinations are
-+	 *
-+	 * V4L2_YCBCR_ENC_601 + V4L2_QUANTIZATION_LIM_RANGE
-+	 * V4L2_YCBCR_ENC_601 + V4L2_QUANTIZATION_FULL_RANGE
-+	 * V4L2_YCBCR_ENC_709 + V4L2_QUANTIZATION_LIM_RANGE
-+	 */
-+	colorspace = src_data->format.colorspace;
-+
-+	ycbcr_enc = src_data->format.ycbcr_enc;
-+	if (ycbcr_enc == V4L2_YCBCR_ENC_DEFAULT)
-+		ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(colorspace);
-+
-+	quantization = src_data->format.quantization;
-+	if (quantization == V4L2_QUANTIZATION_DEFAULT)
-+		quantization = V4L2_MAP_QUANTIZATION_DEFAULT(false, colorspace,
-+							     ycbcr_enc);
-+
-+	allow_rgb = ycbcr_enc == V4L2_YCBCR_ENC_601 ||
-+		    (ycbcr_enc == V4L2_YCBCR_ENC_709 &&
-+		     quantization == V4L2_QUANTIZATION_LIM_RANGE);
-+
-+	fmt = fdp1_find_format(pix->pixelformat);
-+	if (!fmt || (!allow_rgb && fdp1_fmt_is_rgb(fmt)))
-+		fmt = fdp1_find_format(V4L2_PIX_FMT_YUYV);
-+
-+	if (fmtinfo)
-+		*fmtinfo = fmt;
-+
-+	pix->pixelformat = fmt->fourcc;
-+	pix->num_planes = fmt->num_planes;
-+	pix->field = V4L2_FIELD_NONE;
-+
-+	/*
-+	 * The colorspace on the capture queue is copied from the output queue
-+	 * as the hardware can't change the colorspace. It can convert YCbCr to
-+	 * RGB though, in which case the encoding and quantization are set to
-+	 * default values as anything else wouldn't make sense.
-+	 */
-+	pix->colorspace = src_data->format.colorspace;
-+	pix->xfer_func = src_data->format.xfer_func;
-+
-+	if (fdp1_fmt_is_rgb(fmt)) {
-+		pix->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
-+		pix->quantization = V4L2_QUANTIZATION_DEFAULT;
-+	} else {
-+		pix->ycbcr_enc = src_data->format.ycbcr_enc;
-+		pix->quantization = src_data->format.quantization;
-+	}
-+
-+	/*
-+	 * The frame width is identical to the output queue, and the height is
-+	 * either doubled or identical depending on whether the output queue
-+	 * field order contains one or two fields per frame.
-+	 */
-+	pix->width = src_data->format.width;
-+	if (src_data->format.field == V4L2_FIELD_ALTERNATE)
-+		pix->height = 2 * src_data->format.height;
-+	else
-+		pix->height = src_data->format.height;
-+
-+	fdp1_compute_stride(pix, fmt);
-+}
-+
-+static int fdp1_try_fmt(struct file *file, void *priv, struct v4l2_format *f)
-+{
-+	struct fdp1_ctx *ctx = fh_to_ctx(priv);
-+
-+	if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
-+		fdp1_try_fmt_output(ctx, NULL, &f->fmt.pix_mp);
-+	else
-+		fdp1_try_fmt_capture(ctx, NULL, &f->fmt.pix_mp);
-+
-+	dprintk(ctx->fdp1, "Try %s format: %4s (0x%08x) %ux%u field %u\n",
-+		V4L2_TYPE_IS_OUTPUT(f->type) ? "output" : "capture",
-+		(char *)&f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.pixelformat,
-+		f->fmt.pix_mp.width, f->fmt.pix_mp.height, f->fmt.pix_mp.field);
-+
-+	return 0;
-+}
-+
-+static void fdp1_set_format(struct fdp1_ctx *ctx,
-+			    struct v4l2_pix_format_mplane *pix,
-+			    enum v4l2_buf_type type)
-+{
-+	struct fdp1_q_data *q_data = get_q_data(ctx, type);
-+	const struct fdp1_fmt *fmtinfo;
-+
-+	if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
-+		fdp1_try_fmt_output(ctx, &fmtinfo, pix);
-+	else
-+		fdp1_try_fmt_capture(ctx, &fmtinfo, pix);
-+
-+	q_data->fmt = fmtinfo;
-+	q_data->format = *pix;
-+
-+	q_data->vsize = pix->height;
-+	if (pix->field != V4L2_FIELD_NONE)
-+		q_data->vsize /= 2;
-+
-+	q_data->stride_y = pix->plane_fmt[0].bytesperline;
-+	q_data->stride_c = pix->plane_fmt[1].bytesperline;
-+
-+	/* Adjust strides for interleaved buffers */
-+	if (pix->field == V4L2_FIELD_INTERLACED ||
-+	    pix->field == V4L2_FIELD_INTERLACED_TB ||
-+	    pix->field == V4L2_FIELD_INTERLACED_BT) {
-+		q_data->stride_y *= 2;
-+		q_data->stride_c *= 2;
-+	}
-+
-+	/* Propagate the format from the output node to the capture node. */
-+	if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
-+		struct fdp1_q_data *dst_data = &ctx->cap_q;
-+
-+		/*
-+		 * Copy the format, clear the per-plane bytes per line and image
-+		 * size, override the field and double the height if needed.
-+		 */
-+		dst_data->format = q_data->format;
-+		memset(dst_data->format.plane_fmt, 0,
-+		       sizeof(dst_data->format.plane_fmt));
-+
-+		dst_data->format.field = V4L2_FIELD_NONE;
-+		if (pix->field == V4L2_FIELD_ALTERNATE)
-+			dst_data->format.height *= 2;
-+
-+		fdp1_try_fmt_capture(ctx, &dst_data->fmt, &dst_data->format);
-+
-+		dst_data->vsize = dst_data->format.height;
-+		dst_data->stride_y = dst_data->format.plane_fmt[0].bytesperline;
-+		dst_data->stride_c = dst_data->format.plane_fmt[1].bytesperline;
-+	}
-+}
-+
-+static int fdp1_s_fmt(struct file *file, void *priv, struct v4l2_format *f)
-+{
-+	struct fdp1_ctx *ctx = fh_to_ctx(priv);
-+	struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx;
-+	struct vb2_queue *vq = v4l2_m2m_get_vq(m2m_ctx, f->type);
-+
-+	if (vb2_is_busy(vq)) {
-+		v4l2_err(&ctx->fdp1->v4l2_dev, "%s queue busy\n", __func__);
-+		return -EBUSY;
-+	}
-+
-+	fdp1_set_format(ctx, &f->fmt.pix_mp, f->type);
-+
-+	dprintk(ctx->fdp1, "Set %s format: %4s (0x%08x) %ux%u field %u\n",
-+		V4L2_TYPE_IS_OUTPUT(f->type) ? "output" : "capture",
-+		(char *)&f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.pixelformat,
-+		f->fmt.pix_mp.width, f->fmt.pix_mp.height, f->fmt.pix_mp.field);
-+
-+	return 0;
-+}
-+
-+static int fdp1_g_ctrl(struct v4l2_ctrl *ctrl)
-+{
-+	struct fdp1_ctx *ctx =
-+		container_of(ctrl->handler, struct fdp1_ctx, hdl);
-+	struct fdp1_q_data *src_q_data = &ctx->out_q;
-+
-+	switch (ctrl->id) {
-+	case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE:
-+		if (V4L2_FIELD_HAS_BOTH(src_q_data->format.field))
-+			ctrl->val = 2;
-+		else
-+			ctrl->val = 1;
-+		return 0;
-+	}
-+
-+	return 1;
-+}
-+
-+static int fdp1_s_ctrl(struct v4l2_ctrl *ctrl)
-+{
-+	struct fdp1_ctx *ctx =
-+		container_of(ctrl->handler, struct fdp1_ctx, hdl);
-+
-+	switch (ctrl->id) {
-+	case V4L2_CID_ALPHA_COMPONENT:
-+		ctx->alpha = ctrl->val;
-+		break;
-+
-+	case V4L2_CID_DEINTERLACING_MODE:
-+		ctx->deint_mode = ctrl->val;
-+		break;
-+	}
-+
-+	return 0;
-+}
-+
-+static const struct v4l2_ctrl_ops fdp1_ctrl_ops = {
-+	.s_ctrl = fdp1_s_ctrl,
-+	.g_volatile_ctrl = fdp1_g_ctrl,
-+};
-+
-+static const char * const fdp1_ctrl_deint_menu[] = {
-+	"Progressive",
-+	"Adaptive 2D/3D",
-+	"Fixed 2D",
-+	"Fixed 3D",
-+	"Previous field",
-+	"Next field",
-+	NULL
-+};
-+
-+static const struct v4l2_ioctl_ops fdp1_ioctl_ops = {
-+	.vidioc_querycap	= fdp1_vidioc_querycap,
-+
-+	.vidioc_enum_fmt_vid_cap_mplane = fdp1_enum_fmt_vid_cap,
-+	.vidioc_enum_fmt_vid_out_mplane = fdp1_enum_fmt_vid_out,
-+	.vidioc_g_fmt_vid_cap_mplane	= fdp1_g_fmt,
-+	.vidioc_g_fmt_vid_out_mplane	= fdp1_g_fmt,
-+	.vidioc_try_fmt_vid_cap_mplane	= fdp1_try_fmt,
-+	.vidioc_try_fmt_vid_out_mplane	= fdp1_try_fmt,
-+	.vidioc_s_fmt_vid_cap_mplane	= fdp1_s_fmt,
-+	.vidioc_s_fmt_vid_out_mplane	= fdp1_s_fmt,
-+
-+	.vidioc_reqbufs		= v4l2_m2m_ioctl_reqbufs,
-+	.vidioc_querybuf	= v4l2_m2m_ioctl_querybuf,
-+	.vidioc_qbuf		= v4l2_m2m_ioctl_qbuf,
-+	.vidioc_dqbuf		= v4l2_m2m_ioctl_dqbuf,
-+	.vidioc_prepare_buf	= v4l2_m2m_ioctl_prepare_buf,
-+	.vidioc_create_bufs	= v4l2_m2m_ioctl_create_bufs,
-+	.vidioc_expbuf		= v4l2_m2m_ioctl_expbuf,
-+
-+	.vidioc_streamon	= v4l2_m2m_ioctl_streamon,
-+	.vidioc_streamoff	= v4l2_m2m_ioctl_streamoff,
-+
-+	.vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
-+	.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
-+};
-+
-+/*
-+ * Queue operations
-+ */
-+
-+static int fdp1_queue_setup(struct vb2_queue *vq,
-+				unsigned int *nbuffers, unsigned int *nplanes,
-+				unsigned int sizes[],
-+				struct device *alloc_ctxs[])
-+{
-+	struct fdp1_ctx *ctx = vb2_get_drv_priv(vq);
-+	struct fdp1_q_data *q_data;
-+	unsigned int i;
-+
-+	q_data = get_q_data(ctx, vq->type);
-+
-+	if (*nplanes) {
-+		if (*nplanes > FDP1_MAX_PLANES)
-+			return -EINVAL;
-+
-+		return 0;
-+	}
-+
-+	*nplanes = q_data->format.num_planes;
-+
-+	for (i = 0; i < *nplanes; i++)
-+		sizes[i] = q_data->format.plane_fmt[i].sizeimage;
-+
-+	return 0;
-+}
-+
-+static void fdp1_buf_prepare_field(struct fdp1_q_data *q_data,
-+				   struct vb2_v4l2_buffer *vbuf,
-+				   unsigned int field_num)
-+{
-+	struct fdp1_buffer *buf = to_fdp1_buffer(vbuf);
-+	struct fdp1_field_buffer *fbuf = &buf->fields[field_num];
-+	unsigned int num_fields;
-+	unsigned int i;
-+
-+	num_fields = V4L2_FIELD_HAS_BOTH(vbuf->field) ? 2 : 1;
-+
-+	fbuf->vb = vbuf;
-+	fbuf->last_field = (field_num + 1) == num_fields;
-+
-+	for (i = 0; i < vbuf->vb2_buf.num_planes; ++i)
-+		fbuf->addrs[i] = vb2_dma_contig_plane_dma_addr(&vbuf->vb2_buf, i);
-+
-+	switch (vbuf->field) {
-+	case V4L2_FIELD_INTERLACED:
-+		/*
-+		 * Interlaced means bottom-top for 60Hz TV standards (NTSC) and
-+		 * top-bottom for 50Hz. As TV standards are not applicable to
-+		 * the mem-to-mem API, use the height as a heuristic.
-+		 */
-+		fbuf->field = (q_data->format.height < 576) == field_num
-+			    ? V4L2_FIELD_TOP : V4L2_FIELD_BOTTOM;
-+		break;
-+	case V4L2_FIELD_INTERLACED_TB:
-+	case V4L2_FIELD_SEQ_TB:
-+		fbuf->field = field_num ? V4L2_FIELD_BOTTOM : V4L2_FIELD_TOP;
-+		break;
-+	case V4L2_FIELD_INTERLACED_BT:
-+	case V4L2_FIELD_SEQ_BT:
-+		fbuf->field = field_num ? V4L2_FIELD_TOP : V4L2_FIELD_BOTTOM;
-+		break;
-+	default:
-+		fbuf->field = vbuf->field;
-+		break;
-+	}
-+
-+	/* Buffer is completed */
-+	if (!field_num)
-+		return;
-+
-+	/* Adjust buffer addresses for second field */
-+	switch (vbuf->field) {
-+	case V4L2_FIELD_INTERLACED:
-+	case V4L2_FIELD_INTERLACED_TB:
-+	case V4L2_FIELD_INTERLACED_BT:
-+		for (i = 0; i < vbuf->vb2_buf.num_planes; i++)
-+			fbuf->addrs[i] +=
-+				(i == 0 ? q_data->stride_y : q_data->stride_c);
-+		break;
-+	case V4L2_FIELD_SEQ_TB:
-+	case V4L2_FIELD_SEQ_BT:
-+		for (i = 0; i < vbuf->vb2_buf.num_planes; i++)
-+			fbuf->addrs[i] += q_data->vsize *
-+				(i == 0 ? q_data->stride_y : q_data->stride_c);
-+		break;
-+	}
-+}
-+
-+static int fdp1_buf_prepare(struct vb2_buffer *vb)
-+{
-+	struct fdp1_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
-+	struct fdp1_q_data *q_data = get_q_data(ctx, vb->vb2_queue->type);
-+	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
-+	struct fdp1_buffer *buf = to_fdp1_buffer(vbuf);
-+	unsigned int i;
-+
-+	if (V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type)) {
-+		bool field_valid = true;
-+
-+		/* Validate the buffer field. */
-+		switch (q_data->format.field) {
-+		case V4L2_FIELD_NONE:
-+			if (vbuf->field != V4L2_FIELD_NONE)
-+				field_valid = false;
-+			break;
-+
-+		case V4L2_FIELD_ALTERNATE:
-+			if (vbuf->field != V4L2_FIELD_TOP &&
-+			    vbuf->field != V4L2_FIELD_BOTTOM)
-+				field_valid = false;
-+			break;
-+
-+		case V4L2_FIELD_INTERLACED:
-+		case V4L2_FIELD_SEQ_TB:
-+		case V4L2_FIELD_SEQ_BT:
-+		case V4L2_FIELD_INTERLACED_TB:
-+		case V4L2_FIELD_INTERLACED_BT:
-+			if (vbuf->field != q_data->format.field)
-+				field_valid = false;
-+			break;
-+		}
-+
-+		if (!field_valid) {
-+			dprintk(ctx->fdp1,
-+				"buffer field %u invalid for format field %u\n",
-+				vbuf->field, q_data->format.field);
-+			return -EINVAL;
-+		}
-+	} else {
-+		vbuf->field = V4L2_FIELD_NONE;
-+	}
-+
-+	/* Validate the planes sizes. */
-+	for (i = 0; i < q_data->format.num_planes; i++) {
-+		unsigned long size = q_data->format.plane_fmt[i].sizeimage;
-+
-+		if (vb2_plane_size(vb, i) < size) {
-+			dprintk(ctx->fdp1,
-+				"data will not fit into plane [%u/%u] (%lu < %lu)\n",
-+				i, q_data->format.num_planes,
-+				vb2_plane_size(vb, i), size);
-+			return -EINVAL;
-+		}
-+
-+		/* We have known size formats all around */
-+		vb2_set_plane_payload(vb, i, size);
-+	}
-+
-+	buf->num_fields = V4L2_FIELD_HAS_BOTH(vbuf->field) ? 2 : 1;
-+	for (i = 0; i < buf->num_fields; ++i)
-+		fdp1_buf_prepare_field(q_data, vbuf, i);
-+
-+	return 0;
-+}
-+
-+static void fdp1_buf_queue(struct vb2_buffer *vb)
-+{
-+	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
-+	struct fdp1_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
-+
-+	v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf);
-+}
-+
-+static int fdp1_start_streaming(struct vb2_queue *q, unsigned int count)
-+{
-+	struct fdp1_ctx *ctx = vb2_get_drv_priv(q);
-+	struct fdp1_q_data *q_data = get_q_data(ctx, q->type);
-+
-+	if (V4L2_TYPE_IS_OUTPUT(q->type)) {
-+		/*
-+		 * Force our deint_mode when we are progressive,
-+		 * ignoring any setting on the device from the user,
-+		 * Otherwise, lock in the requested de-interlace mode.
-+		 */
-+		if (q_data->format.field == V4L2_FIELD_NONE)
-+			ctx->deint_mode = FDP1_PROGRESSIVE;
-+
-+		if (ctx->deint_mode == FDP1_ADAPT2D3D) {
-+			u32 stride;
-+			dma_addr_t smsk_base;
-+			const u32 bpp = 2; /* bytes per pixel */
-+
-+			stride = round_up(q_data->format.width, 8);
-+
-+			ctx->smsk_size = bpp * stride * q_data->vsize;
-+
-+			ctx->smsk_cpu = dma_alloc_coherent(ctx->fdp1->dev,
-+				ctx->smsk_size, &smsk_base, GFP_KERNEL);
-+
-+			if (ctx->smsk_cpu == NULL) {
-+				dprintk(ctx->fdp1, "Failed to alloc smsk\n");
-+				return -ENOMEM;
-+			}
-+
-+			ctx->smsk_addr[0] = smsk_base;
-+			ctx->smsk_addr[1] = smsk_base + (ctx->smsk_size/2);
-+		}
-+	}
-+
-+	return 0;
-+}
-+
-+static void fdp1_stop_streaming(struct vb2_queue *q)
-+{
-+	struct fdp1_ctx *ctx = vb2_get_drv_priv(q);
-+	struct vb2_v4l2_buffer *vbuf;
-+	unsigned long flags;
-+
-+	while (1) {
-+		if (V4L2_TYPE_IS_OUTPUT(q->type))
-+			vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
-+		else
-+			vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
-+		if (vbuf == NULL)
-+			break;
-+		spin_lock_irqsave(&ctx->fdp1->irqlock, flags);
-+		v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_ERROR);
-+		spin_unlock_irqrestore(&ctx->fdp1->irqlock, flags);
-+	}
-+
-+	/* Empty Output queues */
-+	if (V4L2_TYPE_IS_OUTPUT(q->type)) {
-+		/* Empty our internal queues */
-+		struct fdp1_field_buffer *fbuf;
-+
-+		/* Free any queued buffers */
-+		fbuf = fdp1_dequeue_field(ctx);
-+		while (fbuf != NULL) {
-+			fdp1_field_complete(ctx, fbuf);
-+			fbuf = fdp1_dequeue_field(ctx);
-+		}
-+
-+		/* Free smsk_data */
-+		if (ctx->smsk_cpu) {
-+			dma_free_coherent(ctx->fdp1->dev, ctx->smsk_size,
-+					ctx->smsk_cpu, ctx->smsk_addr[0]);
-+			ctx->smsk_addr[0] = ctx->smsk_addr[1] = 0;
-+			ctx->smsk_cpu = NULL;
-+		}
-+
-+		WARN(!list_empty(&ctx->fields_queue),
-+				"Buffer queue not empty");
-+	} else {
-+		/* Empty Capture queues (Jobs) */
-+		struct fdp1_job *job;
-+
-+		job = get_queued_job(ctx->fdp1);
-+		while (job) {
-+			if (FDP1_DEINT_MODE_USES_PREV(ctx->deint_mode))
-+				fdp1_field_complete(ctx, job->previous);
-+			else
-+				fdp1_field_complete(ctx, job->active);
-+
-+			v4l2_m2m_buf_done(job->dst->vb, VB2_BUF_STATE_ERROR);
-+			job->dst = NULL;
-+
-+			job = get_queued_job(ctx->fdp1);
-+		}
-+
-+		/* Free any held buffer in the ctx */
-+		fdp1_field_complete(ctx, ctx->previous);
-+
-+		WARN(!list_empty(&ctx->fdp1->queued_job_list),
-+				"Queued Job List not empty");
-+
-+		WARN(!list_empty(&ctx->fdp1->hw_job_list),
-+				"HW Job list not empty");
-+	}
-+}
-+
-+static struct vb2_ops fdp1_qops = {
-+	.queue_setup	 = fdp1_queue_setup,
-+	.buf_prepare	 = fdp1_buf_prepare,
-+	.buf_queue	 = fdp1_buf_queue,
-+	.start_streaming = fdp1_start_streaming,
-+	.stop_streaming  = fdp1_stop_streaming,
-+	.wait_prepare	 = vb2_ops_wait_prepare,
-+	.wait_finish	 = vb2_ops_wait_finish,
-+};
-+
-+static int queue_init(void *priv, struct vb2_queue *src_vq,
-+		      struct vb2_queue *dst_vq)
-+{
-+	struct fdp1_ctx *ctx = priv;
-+	int ret;
-+
-+	src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
-+	src_vq->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
-+	src_vq->drv_priv = ctx;
-+	src_vq->buf_struct_size = sizeof(struct fdp1_buffer);
-+	src_vq->ops = &fdp1_qops;
-+	src_vq->mem_ops = &vb2_dma_contig_memops;
-+	src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
-+	src_vq->lock = &ctx->fdp1->dev_mutex;
-+	src_vq->dev = ctx->fdp1->dev;
-+
-+	ret = vb2_queue_init(src_vq);
-+	if (ret)
-+		return ret;
-+
-+	dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
-+	dst_vq->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
-+	dst_vq->drv_priv = ctx;
-+	dst_vq->buf_struct_size = sizeof(struct fdp1_buffer);
-+	dst_vq->ops = &fdp1_qops;
-+	dst_vq->mem_ops = &vb2_dma_contig_memops;
-+	dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
-+	dst_vq->lock = &ctx->fdp1->dev_mutex;
-+	dst_vq->dev = ctx->fdp1->dev;
-+
-+	return vb2_queue_init(dst_vq);
-+}
-+
-+/*
-+ * File operations
-+ */
-+static int fdp1_open(struct file *file)
-+{
-+	struct fdp1_dev *fdp1 = video_drvdata(file);
-+	struct v4l2_pix_format_mplane format;
-+	struct fdp1_ctx *ctx = NULL;
-+	struct v4l2_ctrl *ctrl;
-+	int ret = 0;
-+
-+	if (mutex_lock_interruptible(&fdp1->dev_mutex))
-+		return -ERESTARTSYS;
-+
-+	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
-+	if (!ctx) {
-+		ret = -ENOMEM;
-+		goto done;
-+	}
-+
-+	v4l2_fh_init(&ctx->fh, video_devdata(file));
-+	file->private_data = &ctx->fh;
-+	ctx->fdp1 = fdp1;
-+
-+	/* Initialise Queues */
-+	INIT_LIST_HEAD(&ctx->fields_queue);
-+
-+	ctx->translen = 1;
-+	ctx->sequence = 0;
-+
-+	/* Initialise controls */
-+
-+	v4l2_ctrl_handler_init(&ctx->hdl, 3);
-+	v4l2_ctrl_new_std_menu_items(&ctx->hdl, &fdp1_ctrl_ops,
-+				     V4L2_CID_DEINTERLACING_MODE,
-+				     FDP1_NEXTFIELD, BIT(0), FDP1_FIXED3D,
-+				     fdp1_ctrl_deint_menu);
-+
-+	ctrl = v4l2_ctrl_new_std(&ctx->hdl, &fdp1_ctrl_ops,
-+			V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, 1, 2, 1, 1);
-+	if (ctrl)
-+		ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE;
-+
-+	v4l2_ctrl_new_std(&ctx->hdl, &fdp1_ctrl_ops,
-+			  V4L2_CID_ALPHA_COMPONENT, 0, 255, 1, 255);
-+
-+	if (ctx->hdl.error) {
-+		ret = ctx->hdl.error;
-+		v4l2_ctrl_handler_free(&ctx->hdl);
-+		goto done;
-+	}
-+
-+	ctx->fh.ctrl_handler = &ctx->hdl;
-+	v4l2_ctrl_handler_setup(&ctx->hdl);
-+
-+	/* Configure default parameters. */
-+	memset(&format, 0, sizeof(format));
-+	fdp1_set_format(ctx, &format, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE);
-+
-+	ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(fdp1->m2m_dev, ctx, &queue_init);
-+
-+	if (IS_ERR(ctx->fh.m2m_ctx)) {
-+		ret = PTR_ERR(ctx->fh.m2m_ctx);
-+
-+		v4l2_ctrl_handler_free(&ctx->hdl);
-+		kfree(ctx);
-+		goto done;
-+	}
-+
-+	/* Perform any power management required */
-+	pm_runtime_get_sync(fdp1->dev);
-+
-+	v4l2_fh_add(&ctx->fh);
-+
-+	dprintk(fdp1, "Created instance: %p, m2m_ctx: %p\n",
-+		ctx, ctx->fh.m2m_ctx);
-+
-+done:
-+	mutex_unlock(&fdp1->dev_mutex);
-+	return ret;
-+}
-+
-+static int fdp1_release(struct file *file)
-+{
-+	struct fdp1_dev *fdp1 = video_drvdata(file);
-+	struct fdp1_ctx *ctx = fh_to_ctx(file->private_data);
-+
-+	dprintk(fdp1, "Releasing instance %p\n", ctx);
-+
-+	v4l2_fh_del(&ctx->fh);
-+	v4l2_fh_exit(&ctx->fh);
-+	v4l2_ctrl_handler_free(&ctx->hdl);
-+	mutex_lock(&fdp1->dev_mutex);
-+	v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
-+	mutex_unlock(&fdp1->dev_mutex);
-+	kfree(ctx);
-+
-+	pm_runtime_put(fdp1->dev);
-+
-+	return 0;
-+}
-+
-+static const struct v4l2_file_operations fdp1_fops = {
-+	.owner		= THIS_MODULE,
-+	.open		= fdp1_open,
-+	.release	= fdp1_release,
-+	.poll		= v4l2_m2m_fop_poll,
-+	.unlocked_ioctl	= video_ioctl2,
-+	.mmap		= v4l2_m2m_fop_mmap,
-+};
-+
-+static const struct video_device fdp1_videodev = {
-+	.name		= DRIVER_NAME,
-+	.vfl_dir	= VFL_DIR_M2M,
-+	.fops		= &fdp1_fops,
-+	.device_caps	= V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING,
-+	.ioctl_ops	= &fdp1_ioctl_ops,
-+	.minor		= -1,
-+	.release	= video_device_release_empty,
-+};
-+
-+static const struct v4l2_m2m_ops m2m_ops = {
-+	.device_run	= fdp1_m2m_device_run,
-+	.job_ready	= fdp1_m2m_job_ready,
-+	.job_abort	= fdp1_m2m_job_abort,
-+};
-+
-+static irqreturn_t fdp1_irq_handler(int irq, void *dev_id)
-+{
-+	struct fdp1_dev *fdp1 = dev_id;
-+	u32 int_status;
-+	u32 ctl_status;
-+	u32 vint_cnt;
-+	u32 cycles;
-+
-+	int_status = fdp1_read(fdp1, FD1_CTL_IRQSTA);
-+	cycles = fdp1_read(fdp1, FD1_CTL_VCYCLE_STAT);
-+	ctl_status = fdp1_read(fdp1, FD1_CTL_STATUS);
-+	vint_cnt = (ctl_status & FD1_CTL_STATUS_VINT_CNT_MASK) >>
-+			FD1_CTL_STATUS_VINT_CNT_SHIFT;
-+
-+	/* Clear interrupts */
-+	fdp1_write(fdp1, ~(int_status) & FD1_CTL_IRQ_MASK, FD1_CTL_IRQSTA);
-+
-+	if (debug >= 2) {
-+		dprintk(fdp1, "IRQ: 0x%x %s%s%s\n", int_status,
-+			int_status & FD1_CTL_IRQ_VERE ? "[Error]" : "[!E]",
-+			int_status & FD1_CTL_IRQ_VINTE ? "[VSync]" : "[!V]",
-+			int_status & FD1_CTL_IRQ_FREE ? "[FrameEnd]" : "[!F]");
-+
-+		dprintk(fdp1, "CycleStatus = %d (%dms)\n",
-+			cycles, cycles/(fdp1->clk_rate/1000));
-+
-+		dprintk(fdp1,
-+			"Control Status = 0x%08x : VINT_CNT = %d %s:%s:%s:%s\n",
-+			ctl_status, vint_cnt,
-+			ctl_status & FD1_CTL_STATUS_SGREGSET ? "RegSet" : "",
-+			ctl_status & FD1_CTL_STATUS_SGVERR ? "Vsync Error" : "",
-+			ctl_status & FD1_CTL_STATUS_SGFREND ? "FrameEnd" : "",
-+			ctl_status & FD1_CTL_STATUS_BSY ? "Busy" : "");
-+		dprintk(fdp1, "***********************************\n");
-+	}
-+
-+	/* Spurious interrupt */
-+	if (!(FD1_CTL_IRQ_MASK & int_status))
-+		return IRQ_NONE;
-+
-+	/* Work completed, release the frame */
-+	if (FD1_CTL_IRQ_VERE & int_status)
-+		device_frame_end(fdp1, VB2_BUF_STATE_ERROR);
-+	else if (FD1_CTL_IRQ_FREE & int_status)
-+		device_frame_end(fdp1, VB2_BUF_STATE_DONE);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static int fdp1_probe(struct platform_device *pdev)
-+{
-+	struct fdp1_dev *fdp1;
-+	struct video_device *vfd;
-+	struct device_node *fcp_node;
-+	struct resource *res;
-+	struct clk *clk;
-+	unsigned int i;
-+
-+	int ret;
-+	int hw_version;
-+
-+	fdp1 = devm_kzalloc(&pdev->dev, sizeof(*fdp1), GFP_KERNEL);
-+	if (!fdp1)
-+		return -ENOMEM;
-+
-+	INIT_LIST_HEAD(&fdp1->free_job_list);
-+	INIT_LIST_HEAD(&fdp1->queued_job_list);
-+	INIT_LIST_HEAD(&fdp1->hw_job_list);
-+
-+	/* Initialise the jobs on the free list */
-+	for (i = 0; i < ARRAY_SIZE(fdp1->jobs); i++)
-+		list_add(&fdp1->jobs[i].list, &fdp1->free_job_list);
-+
-+	mutex_init(&fdp1->dev_mutex);
-+
-+	spin_lock_init(&fdp1->irqlock);
-+	spin_lock_init(&fdp1->device_process_lock);
-+	fdp1->dev = &pdev->dev;
-+	platform_set_drvdata(pdev, fdp1);
-+
-+	/* Memory-mapped registers */
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	fdp1->regs = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(fdp1->regs))
-+		return PTR_ERR(fdp1->regs);
-+
-+	/* Interrupt service routine registration */
-+	fdp1->irq = ret = platform_get_irq(pdev, 0);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "cannot find IRQ\n");
-+		return ret;
-+	}
-+
-+	ret = devm_request_irq(&pdev->dev, fdp1->irq, fdp1_irq_handler, 0,
-+			       dev_name(&pdev->dev), fdp1);
-+	if (ret) {
-+		dev_err(&pdev->dev, "cannot claim IRQ %d\n", fdp1->irq);
-+		return ret;
-+	}
-+
-+	/* FCP */
-+	fcp_node = of_parse_phandle(pdev->dev.of_node, "renesas,fcp", 0);
-+	if (fcp_node) {
-+		fdp1->fcp = rcar_fcp_get(fcp_node);
-+		of_node_put(fcp_node);
-+		if (IS_ERR(fdp1->fcp)) {
-+			dev_err(&pdev->dev, "FCP not found (%ld)\n",
-+				PTR_ERR(fdp1->fcp));
-+			return PTR_ERR(fdp1->fcp);
-+		}
-+	}
-+
-+	/* Determine our clock rate */
-+	clk = clk_get(&pdev->dev, NULL);
-+	if (IS_ERR(clk))
-+		return PTR_ERR(clk);
-+
-+	fdp1->clk_rate = clk_get_rate(clk);
-+	clk_put(clk);
-+
-+	/* V4L2 device registration */
-+	ret = v4l2_device_register(&pdev->dev, &fdp1->v4l2_dev);
-+	if (ret) {
-+		v4l2_err(&fdp1->v4l2_dev, "Failed to register video device\n");
-+		return ret;
-+	}
-+
-+	/* M2M registration */
-+	fdp1->m2m_dev = v4l2_m2m_init(&m2m_ops);
-+	if (IS_ERR(fdp1->m2m_dev)) {
-+		v4l2_err(&fdp1->v4l2_dev, "Failed to init mem2mem device\n");
-+		ret = PTR_ERR(fdp1->m2m_dev);
-+		goto unreg_dev;
-+	}
-+
-+	/* Video registration */
-+	fdp1->vfd = fdp1_videodev;
-+	vfd = &fdp1->vfd;
-+	vfd->lock = &fdp1->dev_mutex;
-+	vfd->v4l2_dev = &fdp1->v4l2_dev;
-+	video_set_drvdata(vfd, fdp1);
-+	strlcpy(vfd->name, fdp1_videodev.name, sizeof(vfd->name));
-+
-+	ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0);
-+	if (ret) {
-+		v4l2_err(&fdp1->v4l2_dev, "Failed to register video device\n");
-+		goto release_m2m;
-+	}
-+
-+	v4l2_info(&fdp1->v4l2_dev,
-+			"Device registered as /dev/video%d\n", vfd->num);
-+
-+	/* Power up the cells to read HW */
-+	pm_runtime_enable(&pdev->dev);
-+	pm_runtime_get_sync(fdp1->dev);
-+
-+	hw_version = fdp1_read(fdp1, FD1_IP_INTDATA);
-+	switch (hw_version) {
-+	case FD1_IP_H3:
-+		dprintk(fdp1, "FDP1 Version R-Car H3\n");
-+		break;
-+	case FD1_IP_M3W:
-+		dprintk(fdp1, "FDP1 Version R-Car M3-W\n");
-+		break;
-+	default:
-+		dev_err(fdp1->dev, "FDP1 Unidentifiable (0x%08x)\n",
-+				hw_version);
-+	}
-+
-+	/* Allow the hw to sleep until an open call puts it to use */
-+	pm_runtime_put(fdp1->dev);
-+
-+	return 0;
-+
-+release_m2m:
-+	v4l2_m2m_release(fdp1->m2m_dev);
-+
-+unreg_dev:
-+	v4l2_device_unregister(&fdp1->v4l2_dev);
-+
-+	return ret;
-+}
-+
-+static int fdp1_remove(struct platform_device *pdev)
-+{
-+	struct fdp1_dev *fdp1 = platform_get_drvdata(pdev);
-+
-+	v4l2_m2m_release(fdp1->m2m_dev);
-+	video_unregister_device(&fdp1->vfd);
-+	v4l2_device_unregister(&fdp1->v4l2_dev);
-+	pm_runtime_disable(&pdev->dev);
-+
-+	return 0;
-+}
-+
-+static int fdp1_pm_runtime_suspend(struct device *dev)
-+{
-+	struct fdp1_dev *fdp1 = dev_get_drvdata(dev);
-+
-+	rcar_fcp_disable(fdp1->fcp);
-+
-+	return 0;
-+}
-+
-+static int fdp1_pm_runtime_resume(struct device *dev)
-+{
-+	struct fdp1_dev *fdp1 = dev_get_drvdata(dev);
-+
-+	/* Program in the static LUTs */
-+	fdp1_set_lut(fdp1);
-+
-+	return rcar_fcp_enable(fdp1->fcp);
-+}
-+
-+static const struct dev_pm_ops fdp1_pm_ops = {
-+	SET_RUNTIME_PM_OPS(fdp1_pm_runtime_suspend,
-+			   fdp1_pm_runtime_resume,
-+			   NULL)
-+};
-+
-+static const struct of_device_id fdp1_dt_ids[] = {
-+	{ .compatible = "renesas,fdp1" },
-+	{ },
-+};
-+MODULE_DEVICE_TABLE(of, fdp1_dt_ids);
-+
-+static struct platform_driver fdp1_pdrv = {
-+	.probe		= fdp1_probe,
-+	.remove		= fdp1_remove,
-+	.driver		= {
-+		.name	= DRIVER_NAME,
-+		.of_match_table = fdp1_dt_ids,
-+		.pm	= &fdp1_pm_ops,
-+	},
-+};
-+
-+module_platform_driver(fdp1_pdrv);
-+
-+MODULE_DESCRIPTION("Renesas R-Car Fine Display Processor Driver");
-+MODULE_AUTHOR("Kieran Bingham <kieran@bingham.xyz>");
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS("platform:" DRIVER_NAME);
diff --git a/patches.renesas/0270-ARM-dts-alt-Correct-clock-of-DU1.patch b/patches.renesas/0270-ARM-dts-alt-Correct-clock-of-DU1.patch
deleted file mode 100644
index cd7f1271920577..00000000000000
--- a/patches.renesas/0270-ARM-dts-alt-Correct-clock-of-DU1.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 10beaead64875c8ab8ff7e91c6f08a5a7cc654c7 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Tue, 28 Mar 2017 12:45:32 +0200
-Subject: [PATCH 270/286] ARM: dts: alt: Correct clock of DU1
-
-The second channel of the display unit uses a different module clock
-than the first channel.
-
-Fixes: 876e7fb9f418fd86 ("ARM: shmobile: r8a7794: alt: Enable VGA port")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7f698bf60e3a13c991577f5360f371e2a41cf40e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794-alt.dts |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7794-alt.dts
-+++ b/arch/arm/boot/dts/r8a7794-alt.dts
-@@ -168,7 +168,7 @@
- 	status = "okay";
- 
- 	clocks = <&mstp7_clks R8A7794_CLK_DU0>,
--		 <&mstp7_clks R8A7794_CLK_DU0>,
-+		 <&mstp7_clks R8A7794_CLK_DU1>,
- 		 <&x13_clk>, <&x2_clk>;
- 	clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
- 
diff --git a/patches.renesas/0270-media-v4l-rcar_fdp1-mark-PM-functions-as-__maybe_unu.patch b/patches.renesas/0270-media-v4l-rcar_fdp1-mark-PM-functions-as-__maybe_unu.patch
deleted file mode 100644
index ae230f135149e7..00000000000000
--- a/patches.renesas/0270-media-v4l-rcar_fdp1-mark-PM-functions-as-__maybe_unu.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From d7c7b9cb449c8853c9aa68bb80cd0a5c5e860f77 Mon Sep 17 00:00:00 2001
-From: Arnd Bergmann <arnd@arndb.de>
-Date: Fri, 18 Nov 2016 14:16:04 -0200
-Subject: [PATCH 270/299] [media] v4l: rcar_fdp1: mark PM functions as
- __maybe_unused
-
-The new driver produces a warning when CONFIG_PM is disabled:
-
-platform/rcar_fdp1.c:2408:12: error: 'fdp1_pm_runtime_resume' defined but not used [-Werror=unused-function]
-platform/rcar_fdp1.c:2399:12: error: 'fdp1_pm_runtime_suspend' defined but not used [-Werror=unused-function]
-
-This marks the two functions as __maybe_unused.
-
-Fixes: 4710b752e029 ("[media] v4l: Add Renesas R-Car FDP1 Driver")
-
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-(cherry picked from commit fa4a2fd17dc5d2d1fbad7ace78d39d7fea20d78e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/rcar_fdp1.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/media/platform/rcar_fdp1.c
-+++ b/drivers/media/platform/rcar_fdp1.c
-@@ -2396,7 +2396,7 @@ static int fdp1_remove(struct platform_d
- 	return 0;
- }
- 
--static int fdp1_pm_runtime_suspend(struct device *dev)
-+static int __maybe_unused fdp1_pm_runtime_suspend(struct device *dev)
- {
- 	struct fdp1_dev *fdp1 = dev_get_drvdata(dev);
- 
-@@ -2405,7 +2405,7 @@ static int fdp1_pm_runtime_suspend(struc
- 	return 0;
- }
- 
--static int fdp1_pm_runtime_resume(struct device *dev)
-+static int __maybe_unused fdp1_pm_runtime_resume(struct device *dev)
- {
- 	struct fdp1_dev *fdp1 = dev_get_drvdata(dev);
- 
diff --git a/patches.renesas/0271-usb-add-helper-to-extract-bits-12-11-of-wMaxPacketSi.patch b/patches.renesas/0271-usb-add-helper-to-extract-bits-12-11-of-wMaxPacketSi.patch
deleted file mode 100644
index 59fe285f8fb388..00000000000000
--- a/patches.renesas/0271-usb-add-helper-to-extract-bits-12-11-of-wMaxPacketSi.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 881a8863ea168c60e037ef687cadb87e3bbe9c4b Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Mon, 26 Sep 2016 10:51:18 +0300
-Subject: [PATCH 271/299] usb: add helper to extract bits 12:11 of
- wMaxPacketSize
-
-According to USB Specification 2.0 table 9-4,
-wMaxPacketSize is a bitfield. Endpoint's maxpacket
-is laid out in bits 10:0. For high-speed,
-high-bandwidth isochronous endpoints, bits 12:11
-contain a multiplier to tell us how many
-transactions we want to try per uframe.
-
-This means that if we want an isochronous endpoint
-to issue 3 transfers of 1024 bytes per uframe,
-wMaxPacketSize should contain the value:
-
-	1024 | (2 << 11)
-
-or 5120 (0x1400). In order to make Host and
-Peripheral controller drivers' life easier, we're
-adding a helper which returns bits 12:11. Note that
-no care is made WRT to checking endpoint type and
-gadget's speed. That's left for drivers to handle.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-(cherry picked from commit 541b6fe63023f3059cf85d47ff2767a3e42a8e44)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/uapi/linux/usb/ch9.h |   19 +++++++++++++++++++
- 1 file changed, 19 insertions(+)
-
---- a/include/uapi/linux/usb/ch9.h
-+++ b/include/uapi/linux/usb/ch9.h
-@@ -428,6 +428,11 @@ struct usb_endpoint_descriptor {
- #define USB_EP_MAXP_MULT(m) \
- 	(((m) & USB_EP_MAXP_MULT_MASK) >> USB_EP_MAXP_MULT_SHIFT)
- 
-+#define USB_EP_MAXP_MULT_SHIFT	11
-+#define USB_EP_MAXP_MULT_MASK	(3 << USB_EP_MAXP_MULT_SHIFT)
-+#define USB_EP_MAXP_MULT(m) \
-+	(((m) & USB_EP_MAXP_MULT_MASK) >> USB_EP_MAXP_MULT_SHIFT)
-+
- /* The USB 3.0 spec redefines bits 5:4 of bmAttributes as interrupt ep type. */
- #define USB_ENDPOINT_INTRTYPE		0x30
- #define USB_ENDPOINT_INTR_PERIODIC	(0 << 4)
-@@ -636,6 +641,20 @@ static inline int usb_endpoint_maxp(cons
- }
- 
- /**
-+ * usb_endpoint_maxp_mult - get endpoint's transactional opportunities
-+ * @epd: endpoint to be checked
-+ *
-+ * Return @epd's wMaxPacketSize[12:11] + 1
-+ */
-+static inline int
-+usb_endpoint_maxp_mult(const struct usb_endpoint_descriptor *epd)
-+{
-+	int maxp = __le16_to_cpu(epd->wMaxPacketSize);
-+
-+	return USB_EP_MAXP_MULT(maxp) + 1;
-+}
-+
-+/**
-  * usb_endpoint_maxp_mult - get endpoint's transactional opportunities
-  * @epd: endpoint to be checked
-  *
diff --git a/patches.renesas/0272-usb-host-xhci-make-use-of-new-usb_endpoint_maxp_mult.patch b/patches.renesas/0272-usb-host-xhci-make-use-of-new-usb_endpoint_maxp_mult.patch
deleted file mode 100644
index 199064cabc4d79..00000000000000
--- a/patches.renesas/0272-usb-host-xhci-make-use-of-new-usb_endpoint_maxp_mult.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 64be689600684985c8c2569f2486fc6a65fe49db Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Wed, 28 Sep 2016 13:39:22 +0300
-Subject: [PATCH 272/299] usb: host: xhci: make use of new
- usb_endpoint_maxp_mult()
-
-We have introduced a helper to calculate multiplier
-value from wMaxPacketSize. Start using it.
-
-Cc: Mathias Nyman <mathias.nyman@intel.com>
-Cc: <linux-usb@vger.kernel.org>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-(cherry picked from commit dcf5228c1c78c217eedade8455e20af32d359e00)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-mem.c |    6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -1421,7 +1421,7 @@ static u32 xhci_get_endpoint_max_burst(s
- 	if (udev->speed == USB_SPEED_HIGH &&
- 	    (usb_endpoint_xfer_isoc(&ep->desc) ||
- 	     usb_endpoint_xfer_int(&ep->desc)))
--		return (usb_endpoint_maxp(&ep->desc) & 0x1800) >> 11;
-+		return usb_endpoint_maxp_mult(&ep->desc) - 1;
- 
- 	return 0;
- }
-@@ -1467,9 +1467,9 @@ static u32 xhci_get_max_esit_payload(str
- 		return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval);
- 
- 	max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc));
--	max_burst = (usb_endpoint_maxp(&ep->desc) & 0x1800) >> 11;
-+	max_burst = usb_endpoint_maxp_mult(&ep->desc);
- 	/* A 0 in max burst means 1 transfer per ESIT */
--	return max_packet * (max_burst + 1);
-+	return max_packet * max_burst;
- }
- 
- /* Set up an endpoint with one ring segment.  Do not allocate stream rings.
diff --git a/patches.renesas/0273-usb-host-xhci-purge-GET_MAX_PACKET.patch b/patches.renesas/0273-usb-host-xhci-purge-GET_MAX_PACKET.patch
deleted file mode 100644
index b9fcdf360a6182..00000000000000
--- a/patches.renesas/0273-usb-host-xhci-purge-GET_MAX_PACKET.patch
+++ /dev/null
@@ -1,114 +0,0 @@
-From f858de149c1845ca7c0b81e9172febfa6b09e81a Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Wed, 28 Sep 2016 13:46:37 +0300
-Subject: [PATCH 273/299] usb: host: xhci: purge GET_MAX_PACKET()
-
-usb_endpoint_maxp() is now returning maxpacket
-correctly - iow only bits 10:0. We can finaly remove
-XHCI's private GET_MAX_PACKET macro.
-
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-(cherry picked from commit 734d3ddd81902d839e5bba50601b011f6ae40d05)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-mem.c     |    4 ++--
- drivers/usb/host/xhci-mtk-sch.c |    4 ++--
- drivers/usb/host/xhci-ring.c    |    6 +++---
- drivers/usb/host/xhci.c         |    2 +-
- drivers/usb/host/xhci.h         |    5 -----
- 5 files changed, 8 insertions(+), 13 deletions(-)
-
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -1466,7 +1466,7 @@ static u32 xhci_get_max_esit_payload(str
- 	else if (udev->speed >= USB_SPEED_SUPER)
- 		return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval);
- 
--	max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc));
-+	max_packet = usb_endpoint_maxp(&ep->desc);
- 	max_burst = usb_endpoint_maxp_mult(&ep->desc);
- 	/* A 0 in max burst means 1 transfer per ESIT */
- 	return max_packet * max_burst;
-@@ -1523,7 +1523,7 @@ int xhci_endpoint_init(struct xhci_hcd *
- 	}
- 
- 	mult = xhci_get_endpoint_mult(udev, ep);
--	max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc));
-+	max_packet = usb_endpoint_maxp(&ep->desc);
- 	max_burst = xhci_get_endpoint_max_burst(udev, ep);
- 	avg_trb_len = max_esit_payload;
- 
---- a/drivers/usb/host/xhci-mtk-sch.c
-+++ b/drivers/usb/host/xhci-mtk-sch.c
-@@ -337,7 +337,7 @@ int xhci_mtk_add_ep_quirk(struct usb_hcd
- 
- 	xhci_dbg(xhci, "%s() type:%d, speed:%d, mpkt:%d, dir:%d, ep:%p\n",
- 		__func__, usb_endpoint_type(&ep->desc), udev->speed,
--		GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc)),
-+		usb_endpoint_maxp(&ep->desc),
- 		usb_endpoint_dir_in(&ep->desc), ep);
- 
- 	if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT)) {
-@@ -403,7 +403,7 @@ void xhci_mtk_drop_ep_quirk(struct usb_h
- 
- 	xhci_dbg(xhci, "%s() type:%d, speed:%d, mpks:%d, dir:%d, ep:%p\n",
- 		__func__, usb_endpoint_type(&ep->desc), udev->speed,
--		GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc)),
-+		usb_endpoint_maxp(&ep->desc),
- 		usb_endpoint_dir_in(&ep->desc), ep);
- 
- 	if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT))
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -3145,7 +3145,7 @@ static u32 xhci_td_remainder(struct xhci
- 	if ((xhci->quirks & XHCI_MTK_HOST) && (xhci->hci_version < 0x100))
- 		trb_buff_len = 0;
- 
--	maxp = GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc));
-+	maxp = usb_endpoint_maxp(&urb->ep->desc);
- 	total_packet_count = DIV_ROUND_UP(td_total_len, maxp);
- 
- 	/* Queueing functions don't count the current TRB into transferred */
-@@ -3161,7 +3161,7 @@ static int xhci_align_td(struct xhci_hcd
- 	unsigned int max_pkt;
- 	u32 new_buff_len;
- 
--	max_pkt = GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc));
-+	max_pkt = usb_endpoint_maxp(&urb->ep->desc);
- 	unalign = (enqd_len + *trb_buff_len) % max_pkt;
- 
- 	/* we got lucky, last normal TRB data on segment is packet aligned */
-@@ -3675,7 +3675,7 @@ static int xhci_queue_isoc_tx(struct xhc
- 		addr = start_addr + urb->iso_frame_desc[i].offset;
- 		td_len = urb->iso_frame_desc[i].length;
- 		td_remain_len = td_len;
--		max_pkt = GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc));
-+		max_pkt = usb_endpoint_maxp(&urb->ep->desc);
- 		total_pkt_count = DIV_ROUND_UP(td_len, max_pkt);
- 
- 		/* A zero-length transfer still involves at least one packet. */
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -3241,7 +3241,7 @@ int xhci_alloc_streams(struct usb_hcd *h
- 
- 	for (i = 0; i < num_eps; i++) {
- 		ep_index = xhci_get_endpoint_index(&eps[i]->desc);
--		max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&eps[i]->desc));
-+		max_packet = usb_endpoint_maxp(&eps[i]->desc);
- 		vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
- 				num_stream_ctxs,
- 				num_streams,
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -751,11 +751,6 @@ struct xhci_ep_ctx {
- #define MAX_PACKET_MASK		(0xffff << 16)
- #define MAX_PACKET_DECODED(p)	(((p) >> 16) & 0xffff)
- 
--/* Get max packet size from ep desc. Bit 10..0 specify the max packet size.
-- * USB2.0 spec 9.6.6.
-- */
--#define GET_MAX_PACKET(p)	((p) & 0x7ff)
--
- /* tx_info bitmasks */
- #define EP_AVG_TRB_LENGTH(p)		((p) & 0xffff)
- #define EP_MAX_ESIT_PAYLOAD_LO(p)	(((p) & 0xffff) << 16)
diff --git a/patches.renesas/0274-xhci-remove-unnecessary-xhci_quiesce-call-before-xhc.patch b/patches.renesas/0274-xhci-remove-unnecessary-xhci_quiesce-call-before-xhc.patch
deleted file mode 100644
index e39f414e4ec8ed..00000000000000
--- a/patches.renesas/0274-xhci-remove-unnecessary-xhci_quiesce-call-before-xhc.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From bfe973d01f2cd833198a3ccd034e7e77a597c77a Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:10 +0200
-Subject: [PATCH 274/299] xhci: remove unnecessary xhci_quiesce call before
- xhci_halt
-
-Fist function called in xhci_halt is xhci_quiesce, so no point
-in calling it twice
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit cf5d344e13655df2fcb049ae212fe59c617349a7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -353,7 +353,6 @@ static int xhci_abort_cmd_ring(struct xh
- 			xhci_err(xhci, "Stopped the command ring failed, "
- 				 "maybe the host is dead\n");
- 			xhci->xhc_state |= XHCI_STATE_DYING;
--			xhci_quiesce(xhci);
- 			xhci_halt(xhci);
- 			return -ESHUTDOWN;
- 		}
diff --git a/patches.renesas/0275-xhci-cleanup-error-message-if-halting-the-host-faile.patch b/patches.renesas/0275-xhci-cleanup-error-message-if-halting-the-host-faile.patch
deleted file mode 100644
index c86b6b973f6878..00000000000000
--- a/patches.renesas/0275-xhci-cleanup-error-message-if-halting-the-host-faile.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 195c24ab81243af67b47c005f057f768952ab37a Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:11 +0200
-Subject: [PATCH 275/299] xhci: cleanup error message if halting the host
- failed.
-
-The old error message always stated that host was not halted
-even after trying a certain time.
-
-Host may fail the halt immediately as well with -ENODEV if device
-is removed and returns 0xffffffff.
-
-Use a more generic error message and show return value to know if we
-failed with -ETIMEDOUT or -ENODEV
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 99154fd3aa9ce49f0fb842f2b07f174ae7345b64)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci.c |   12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -113,12 +113,12 @@ int xhci_halt(struct xhci_hcd *xhci)
- 
- 	ret = xhci_handshake(&xhci->op_regs->status,
- 			STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
--	if (!ret) {
--		xhci->xhc_state |= XHCI_STATE_HALTED;
--		xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
--	} else
--		xhci_warn(xhci, "Host not halted after %u microseconds.\n",
--				XHCI_MAX_HALT_USEC);
-+	if (ret) {
-+		xhci_warn(xhci, "Host halt failed, %d\n", ret);
-+		return ret;
-+	}
-+	xhci->xhc_state |= XHCI_STATE_HALTED;
-+	xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
- 	return ret;
- }
- 
diff --git a/patches.renesas/0276-ARM-dts-r8a7792-Correct-Z-clock.patch b/patches.renesas/0276-ARM-dts-r8a7792-Correct-Z-clock.patch
deleted file mode 100644
index d04817066e9b91..00000000000000
--- a/patches.renesas/0276-ARM-dts-r8a7792-Correct-Z-clock.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 6d4370067dc6d7c5887910505576db138cd53aea Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 3 Apr 2017 11:53:08 +0200
-Subject: [PATCH 276/286] ARM: dts: r8a7792: Correct Z clock
-
-Unlike other R-Car Gen2 SoCs with Cortex-A15 CPU cores, R-Car V2H does
-not have a programmable Z clock (Cortex-A15 CPU core clock), but uses a
-fixed divider.
-This is similar to the Z2 clock (Cortex-A7 CPU core clock) on R-Car E2.
-
-Hence:
-  - Remove the Z clock output from the cpg_clocks node, as this implied
-    a programmable clock,
-  - Add the Z clock as a fixed factor clock,
-  - Let the first CPU node point to the new Z clock,
-  - Remove the Z clock index from the bindings (this definition was used
-    by r8a7792.dtsi only, and was not a contract between DT and driver).
-
-Fixes: 7c4163aae3d8e5b9 ("ARM: dts: r8a7792: initial SoC device tree")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7b39e985cfc18bba43646240b10a830046382abf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7792.dtsi            |   11 +++++++++--
- include/dt-bindings/clock/r8a7792-clock.h |    1 -
- 2 files changed, 9 insertions(+), 3 deletions(-)
-
---- a/arch/arm/boot/dts/r8a7792.dtsi
-+++ b/arch/arm/boot/dts/r8a7792.dtsi
-@@ -46,7 +46,7 @@
- 			compatible = "arm,cortex-a15";
- 			reg = <0>;
- 			clock-frequency = <1000000000>;
--			clocks = <&cpg_clocks R8A7792_CLK_Z>;
-+			clocks = <&z_clk>;
- 			power-domains = <&sysc R8A7792_PD_CA15_CPU0>;
- 			next-level-cache = <&L2_CA15>;
- 		};
-@@ -766,7 +766,7 @@
- 			clocks = <&extal_clk>;
- 			#clock-cells = <1>;
- 			clock-output-names = "main", "pll0", "pll1", "pll3",
--					     "lb", "qspi", "z";
-+					     "lb", "qspi";
- 			#power-domain-cells = <0>;
- 		};
- 
-@@ -778,6 +778,13 @@
- 			clock-div = <2>;
- 			clock-mult = <1>;
- 		};
-+		z_clk: z {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7792_CLK_PLL0>;
-+			#clock-cells = <0>;
-+			clock-div = <1>;
-+			clock-mult = <1>;
-+		};
- 		zx_clk: zx {
- 			compatible = "fixed-factor-clock";
- 			clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
---- a/include/dt-bindings/clock/r8a7792-clock.h
-+++ b/include/dt-bindings/clock/r8a7792-clock.h
-@@ -17,7 +17,6 @@
- #define R8A7792_CLK_PLL3		3
- #define R8A7792_CLK_LB			4
- #define R8A7792_CLK_QSPI		5
--#define R8A7792_CLK_Z			6
- 
- /* MSTP0 */
- #define R8A7792_CLK_MSIOF0		0
diff --git a/patches.renesas/0276-xhci-don-t-try-to-reset-the-host-if-it-is-unaccessib.patch b/patches.renesas/0276-xhci-don-t-try-to-reset-the-host-if-it-is-unaccessib.patch
deleted file mode 100644
index 8410b24df489f8..00000000000000
--- a/patches.renesas/0276-xhci-don-t-try-to-reset-the-host-if-it-is-unaccessib.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 3de4e7dbb9279d8e161873ad0c2f7394656d3d2a Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:12 +0200
-Subject: [PATCH 276/299] xhci: don't try to reset the host if it is
- unaccessible
-
-There is no point in trying to reset the host controller by writing
-to its registers if host is removed and registers just return 0xffffffff
-
-bail out and return -ENODEV instead
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit c11ae038d62bf07231be7b813435e5067c978ddc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci.c |    7 ++++++-
- 1 file changed, 6 insertions(+), 1 deletion(-)
-
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -167,6 +167,12 @@ int xhci_reset(struct xhci_hcd *xhci)
- 	int ret, i;
- 
- 	state = readl(&xhci->op_regs->status);
-+
-+	if (state == ~(u32)0) {
-+		xhci_warn(xhci, "Host not accessible, reset failed.\n");
-+		return -ENODEV;
-+	}
-+
- 	if ((state & STS_HALT) == 0) {
- 		xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
- 		return 0;
-@@ -693,7 +699,6 @@ void xhci_stop(struct usb_hcd *hcd)
- 		xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
- 		xhci_halt(xhci);
- 		xhci_reset(xhci);
--
- 		spin_unlock_irq(&xhci->lock);
- 	}
- 
diff --git a/patches.renesas/0277-ARM-dts-r8a7794-Add-Z2-clock.patch b/patches.renesas/0277-ARM-dts-r8a7794-Add-Z2-clock.patch
deleted file mode 100644
index 2723d15bd6b468..00000000000000
--- a/patches.renesas/0277-ARM-dts-r8a7794-Add-Z2-clock.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From f2ba1c8d15823721be61d3d8001805c3dd78059d Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 3 Apr 2017 11:54:14 +0200
-Subject: [PATCH 277/286] ARM: dts: r8a7794: Add Z2 clock
-
-Add the Z2 clock (Cortex-A7 CPU core clock), which uses a fixed divider,
-and link the first CPU node to it.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 57ff9d736e05bede56fdb47599fdddb3408d4651)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7794.dtsi |    8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/arch/arm/boot/dts/r8a7794.dtsi
-+++ b/arch/arm/boot/dts/r8a7794.dtsi
-@@ -43,6 +43,7 @@
- 			compatible = "arm,cortex-a7";
- 			reg = <0>;
- 			clock-frequency = <1000000000>;
-+			clocks = <&z2_clk>;
- 			power-domains = <&sysc R8A7794_PD_CA7_CPU0>;
- 			next-level-cache = <&L2_CA7>;
- 		};
-@@ -1064,6 +1065,13 @@
- 			clock-div = <2>;
- 			clock-mult = <1>;
- 		};
-+		z2_clk: z2 {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7794_CLK_PLL0>;
-+			#clock-cells = <0>;
-+			clock-div = <1>;
-+			clock-mult = <1>;
-+		};
- 		zg_clk: zg {
- 			compatible = "fixed-factor-clock";
- 			clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
diff --git a/patches.renesas/0277-xhci-use-trb-helper-functions-when-possible.patch b/patches.renesas/0277-xhci-use-trb-helper-functions-when-possible.patch
deleted file mode 100644
index 681f71cd0240cb..00000000000000
--- a/patches.renesas/0277-xhci-use-trb-helper-functions-when-possible.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 411d7545e4cd57406461fad928dbf4fb266da044 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:13 +0200
-Subject: [PATCH 277/299] xhci: use trb helper functions when possible
-
-Use the trb_is_link() and link_trb_toggles_cycle() helpers to
-make the code more readable
-
-No functional changes
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 3495e451d1375f74bd6f9ee851c740e2c96118ae)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   11 +++++------
- 1 file changed, 5 insertions(+), 6 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -539,9 +539,8 @@ void xhci_find_new_dequeue_state(struct
- 		if (new_deq == cur_td->last_trb)
- 			td_last_trb_found = true;
- 
--		if (cycle_found &&
--		    TRB_TYPE_LINK_LE32(new_deq->generic.field[3]) &&
--		    new_deq->generic.field[3] & cpu_to_le32(LINK_TOGGLE))
-+		if (cycle_found && trb_is_link(new_deq) &&
-+		    link_trb_toggles_cycle(new_deq))
- 			state->new_cycle_state ^= 0x1;
- 
- 		next_trb(xhci, ep_ring, &new_seg, &new_deq);
-@@ -585,7 +584,7 @@ static void td_to_noop(struct xhci_hcd *
- 	for (cur_seg = cur_td->start_seg, cur_trb = cur_td->first_trb;
- 			true;
- 			next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
--		if (TRB_TYPE_LINK_LE32(cur_trb->generic.field[3])) {
-+		if (trb_is_link(cur_trb)) {
- 			/* Unchain any chained Link TRBs, but
- 			 * leave the pointers intact.
- 			 */
-@@ -2139,7 +2138,7 @@ static int process_isoc_td(struct xhci_h
- 		     cur_seg = ep_ring->deq_seg; cur_trb != event_trb;
- 		     next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
- 			if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
--			    !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3]))
-+			    !trb_is_link(cur_trb))
- 				len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
- 		}
- 		len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
-@@ -2285,7 +2284,7 @@ static int process_bulk_intr_td(struct x
- 				cur_trb != event_trb;
- 				next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
- 			if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
--			    !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3]))
-+			    !trb_is_link(cur_trb))
- 				td->urb->actual_length +=
- 					TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
- 		}
diff --git a/patches.renesas/0278-ARM-dts-koelsch-Correct-clock-frequency-of-X2-DU-clo.patch b/patches.renesas/0278-ARM-dts-koelsch-Correct-clock-frequency-of-X2-DU-clo.patch
deleted file mode 100644
index 6e71d393f436c3..00000000000000
--- a/patches.renesas/0278-ARM-dts-koelsch-Correct-clock-frequency-of-X2-DU-clo.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 67c64333cb984de13d6dc7f1175a47eb1690a332 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 3 Apr 2017 11:55:19 +0200
-Subject: [PATCH 278/286] ARM: dts: koelsch: Correct clock frequency of X2 DU
- clock input
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The X2 crystal oscillator on the Koelsch development board provides a
-74.25 MHz clock, not a 148.5 MHz clock.
-
-Fixes: cd21cb46e14aae3a ("ARM: shmobile: koelsch: Add DU external pixel clocks to DT")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ebf06af55c7594ed1fc18469a5cddf911c40e687)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791-koelsch.dts |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7791-koelsch.dts
-+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
-@@ -298,7 +298,7 @@
- 	x13_clk: x13-clock {
- 		compatible = "fixed-clock";
- 		#clock-cells = <0>;
--		clock-frequency = <148500000>;
-+		clock-frequency = <74250000>;
- 	};
- 
- 	gpioi2c1: i2c-9 {
diff --git a/patches.renesas/0278-xhci-add-trb_is_noop-helper-function.patch b/patches.renesas/0278-xhci-add-trb_is_noop-helper-function.patch
deleted file mode 100644
index 15c2a2fb4adc43..00000000000000
--- a/patches.renesas/0278-xhci-add-trb_is_noop-helper-function.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 8f079ac2ec06abd4fe55df20038bf1e4a997d4a5 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:14 +0200
-Subject: [PATCH 278/299] xhci: add trb_is_noop() helper function
-
-replace the complex check for noop with a simple helper
-Improve code readability
-
-No functional changes
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 0ce5749959c627442b062809e91f0320d92517b2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   16 +++++++++-------
- 1 file changed, 9 insertions(+), 7 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -89,6 +89,11 @@ dma_addr_t xhci_trb_virt_to_dma(struct x
- 	return seg->dma + (segment_offset * sizeof(*trb));
- }
- 
-+static bool trb_is_noop(union xhci_trb *trb)
-+{
-+	return TRB_TYPE_NOOP_LE32(trb->generic.field[3]);
-+}
-+
- static bool trb_is_link(union xhci_trb *trb)
- {
- 	return TRB_TYPE_LINK_LE32(trb->link.control);
-@@ -2137,8 +2142,7 @@ static int process_isoc_td(struct xhci_h
- 		for (cur_trb = ep_ring->dequeue,
- 		     cur_seg = ep_ring->deq_seg; cur_trb != event_trb;
- 		     next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
--			if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
--			    !trb_is_link(cur_trb))
-+			if (!trb_is_noop(cur_trb) && !trb_is_link(cur_trb))
- 				len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
- 		}
- 		len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
-@@ -2283,8 +2287,7 @@ static int process_bulk_intr_td(struct x
- 		for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg;
- 				cur_trb != event_trb;
- 				next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
--			if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
--			    !trb_is_link(cur_trb))
-+			if (!trb_is_noop(cur_trb) && !trb_is_link(cur_trb))
- 				td->urb->actual_length +=
- 					TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
- 		}
-@@ -2584,9 +2587,8 @@ static int handle_tx_event(struct xhci_h
- 		 * corresponding TD has been cancelled. Just ignore
- 		 * the TD.
- 		 */
--		if (TRB_TYPE_NOOP_LE32(event_trb->generic.field[3])) {
--			xhci_dbg(xhci,
--				 "event_trb is a no-op TRB. Skip it\n");
-+		if (trb_is_noop(event_trb)) {
-+			xhci_dbg(xhci, "event_trb is a no-op TRB. Skip it\n");
- 			goto cleanup;
- 		}
- 
diff --git a/patches.renesas/0279-ARM-dts-r7s72100-add-rtc-clock-to-device-tree.patch b/patches.renesas/0279-ARM-dts-r7s72100-add-rtc-clock-to-device-tree.patch
deleted file mode 100644
index 88bd513077c7c3..00000000000000
--- a/patches.renesas/0279-ARM-dts-r7s72100-add-rtc-clock-to-device-tree.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From fc8281a2c0406283e2e7a510aed6b4626ce2a848 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Wed, 29 Mar 2017 10:30:31 -0700
-Subject: [PATCH 279/286] ARM: dts: r7s72100: add rtc clock to device tree
-
-Add the realtime clock functional clock source.
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 929ded3dd7ce91d9ef4143d673b4ace2eb9ab355)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100.dtsi            |    9 +++++++++
- include/dt-bindings/clock/r7s72100-clock.h |    3 +++
- 2 files changed, 12 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100.dtsi
-+++ b/arch/arm/boot/dts/r7s72100.dtsi
-@@ -117,6 +117,15 @@
- 			clock-output-names = "ostm0", "ostm1";
- 		};
- 
-+		mstp6_clks: mstp6_clks@fcfe042c {
-+			#clock-cells = <1>;
-+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0xfcfe042c 4>;
-+			clocks = <&p0_clk>;
-+			clock-indices = <R7S72100_CLK_RTC>;
-+			clock-output-names = "rtc";
-+		};
-+
- 		mstp7_clks: mstp7_clks@fcfe0430 {
- 			#clock-cells = <1>;
- 			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
---- a/include/dt-bindings/clock/r7s72100-clock.h
-+++ b/include/dt-bindings/clock/r7s72100-clock.h
-@@ -29,6 +29,9 @@
- #define R7S72100_CLK_OSTM0	1
- #define R7S72100_CLK_OSTM1	0
- 
-+/* MSTP6 */
-+#define R7S72100_CLK_RTC	0
-+
- /* MSTP7 */
- #define R7S72100_CLK_ETHER	4
- 
diff --git a/patches.renesas/0279-xhci-remove-extra-URB_SHORT_NOT_OK-checks-in-xhci-co.patch b/patches.renesas/0279-xhci-remove-extra-URB_SHORT_NOT_OK-checks-in-xhci-co.patch
deleted file mode 100644
index 1a0c1926cc4e97..00000000000000
--- a/patches.renesas/0279-xhci-remove-extra-URB_SHORT_NOT_OK-checks-in-xhci-co.patch
+++ /dev/null
@@ -1,123 +0,0 @@
-From 39c396a88f7e74af27f0379390bd86a9abce7c52 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:15 +0200
-Subject: [PATCH 279/299] xhci: remove extra URB_SHORT_NOT_OK checks in xhci,
- core handles most cases
-
-We only check for the URB_SHORT_NOT_OK urb flag to set the urb status
-to -EREMOTEIO for transfers that didn't transfer all data.
-
-This will be done in __usb_hcd_giveback() for other than isoc tranfers,
-so remove the redundant check from xhci.
-
-Also fix a couple split lines in debug messages to make them greppable.
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 52ab86852f74c21a8f7fc5f2eb7f70b81d99eb99)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   54 +++++--------------------------------------
- 1 file changed, 7 insertions(+), 47 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1921,9 +1921,6 @@ td_cleanup:
- 			urb->transfer_buffer_length,
- 			urb->actual_length);
- 		urb->actual_length = 0;
--		if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
--			*status = -EREMOTEIO;
--		else
- 			*status = 0;
- 	}
- 	list_del_init(&td->td_list);
-@@ -1983,9 +1980,6 @@ static int process_ctrl_td(struct xhci_h
- 		}
- 		break;
- 	case COMP_SHORT_TX:
--		if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
--			*status = -EREMOTEIO;
--		else
- 			*status = 0;
- 		break;
- 	case COMP_STOP_SHORT:
-@@ -2032,16 +2026,7 @@ static int process_ctrl_td(struct xhci_h
- 	if (event_trb != ep_ring->dequeue) {
- 		/* The event was for the status stage */
- 		if (event_trb == td->last_trb) {
--			if (td->urb_length_set) {
--				/* Don't overwrite a previously set error code
--				 */
--				if ((*status == -EINPROGRESS || *status == 0) &&
--						(td->urb->transfer_flags
--						 & URB_SHORT_NOT_OK))
--					/* Did we already see a short data
--					 * stage? */
--					*status = -EREMOTEIO;
--			} else {
-+			if (!td->urb_length_set) {
- 				td->urb->actual_length =
- 					td->urb->transfer_buffer_length;
- 			}
-@@ -2205,24 +2190,15 @@ static int process_bulk_intr_td(struct x
- 		/* Double check that the HW transferred everything. */
- 		if (event_trb != td->last_trb ||
- 		    EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
--			xhci_warn(xhci, "WARN Successful completion "
--					"on short TX\n");
--			if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
--				*status = -EREMOTEIO;
--			else
--				*status = 0;
-+			xhci_warn(xhci, "WARN Successful completion on short TX\n");
- 			if ((xhci->quirks & XHCI_TRUST_TX_LENGTH))
- 				trb_comp_code = COMP_SHORT_TX;
--		} else {
--			*status = 0;
- 		}
-+		*status = 0;
- 		break;
- 	case COMP_STOP_SHORT:
- 	case COMP_SHORT_TX:
--		if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
--			*status = -EREMOTEIO;
--		else
--			*status = 0;
-+		*status = 0;
- 		break;
- 	default:
- 		/* Others already handled above */
-@@ -2254,29 +2230,13 @@ static int process_bulk_intr_td(struct x
- 				EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
- 			if (td->urb->transfer_buffer_length <
- 					td->urb->actual_length) {
--				xhci_warn(xhci, "HC gave bad length "
--						"of %d bytes left\n",
-+				xhci_warn(xhci, "HC gave bad length of %d bytes left\n",
- 					  EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
- 				td->urb->actual_length = 0;
--				if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
--					*status = -EREMOTEIO;
--				else
--					*status = 0;
-+				*status = 0;
- 			}
- 			/* Don't overwrite a previously set error code */
--			if (*status == -EINPROGRESS) {
--				if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
--					*status = -EREMOTEIO;
--				else
--					*status = 0;
--			}
--		} else {
--			td->urb->actual_length =
--				td->urb->transfer_buffer_length;
--			/* Ignore a short packet completion if the
--			 * untransferred length was zero.
--			 */
--			if (*status == -EREMOTEIO)
-+			if (*status == -EINPROGRESS)
- 				*status = 0;
- 		}
- 	} else {
diff --git a/patches.renesas/0280-ARM-dts-r7s72100-add-RTC_X-clock-inputs-to-device-tr.patch b/patches.renesas/0280-ARM-dts-r7s72100-add-RTC_X-clock-inputs-to-device-tr.patch
deleted file mode 100644
index 9e2c15ba91d310..00000000000000
--- a/patches.renesas/0280-ARM-dts-r7s72100-add-RTC_X-clock-inputs-to-device-tr.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From cda0660d0b6a96d3cac8d2aa0980f50edde8b73e Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Wed, 29 Mar 2017 10:30:32 -0700
-Subject: [PATCH 280/286] ARM: dts: r7s72100: add RTC_X clock inputs to device
- tree
-
-Add the RTC clocks to device tree. The frequencies must be fixed values
-according to the hardware manual.
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit deddcb891d0d2b4f437dea9bdea4752982c4b133)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100.dtsi |   14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100.dtsi
-+++ b/arch/arm/boot/dts/r7s72100.dtsi
-@@ -51,6 +51,20 @@
- 			clock-frequency = <0>;
- 		};
- 
-+		rtc_x1_clk: rtc_x1 {
-+			#clock-cells = <0>;
-+			compatible = "fixed-clock";
-+			/* If clk present, value must be set by board to 32678 */
-+			clock-frequency = <0>;
-+		};
-+
-+		rtc_x3_clk: rtc_x3 {
-+			#clock-cells = <0>;
-+			compatible = "fixed-clock";
-+			/* If clk present, value must be set by board to 4000000 */
-+			clock-frequency = <0>;
-+		};
-+
- 		/* Fixed factor clocks */
- 		b_clk: b {
- 			#clock-cells = <0>;
diff --git a/patches.renesas/0280-xhci-cleanup-and-refactor-process_ctrl_td.patch b/patches.renesas/0280-xhci-cleanup-and-refactor-process_ctrl_td.patch
deleted file mode 100644
index 12acd5314788bd..00000000000000
--- a/patches.renesas/0280-xhci-cleanup-and-refactor-process_ctrl_td.patch
+++ /dev/null
@@ -1,160 +0,0 @@
-From 74689c2344e6b0b5232b7cf167aebd2e0a4ecbf7 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:16 +0200
-Subject: [PATCH 280/299] xhci: cleanup and refactor process_ctrl_td()
-
-Refactor pricess_ctrl_tx() to make it more readable
-No functional changes
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 0b6c324c8b6097b482decff8183f67c9a8a6e2a3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |  103 ++++++++++++++++++-------------------------
- 1 file changed, 45 insertions(+), 58 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1957,6 +1957,8 @@ static int process_ctrl_td(struct xhci_h
- 	int ep_index;
- 	struct xhci_ep_ctx *ep_ctx;
- 	u32 trb_comp_code;
-+	u32 remaining, requested;
-+	bool on_data_stage;
- 
- 	slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
- 	xdev = xhci->devs[slot_id];
-@@ -1964,89 +1966,74 @@ static int process_ctrl_td(struct xhci_h
- 	ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
- 	ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
- 	trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
-+	requested = td->urb->transfer_buffer_length;
-+	remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
-+
-+	/* not setup (dequeue), or status stage means we are at data stage */
-+	on_data_stage = (event_trb != ep_ring->dequeue &&
-+			 event_trb != td->last_trb);
- 
- 	switch (trb_comp_code) {
- 	case COMP_SUCCESS:
--		if (event_trb == ep_ring->dequeue) {
--			xhci_warn(xhci, "WARN: Success on ctrl setup TRB "
--					"without IOC set??\n");
--			*status = -ESHUTDOWN;
--		} else if (event_trb != td->last_trb) {
--			xhci_warn(xhci, "WARN: Success on ctrl data TRB "
--					"without IOC set??\n");
-+		if (event_trb != td->last_trb) {
-+			xhci_warn(xhci, "WARN: Success on ctrl %s TRB without IOC set?\n",
-+				  on_data_stage ? "data" : "setup");
- 			*status = -ESHUTDOWN;
--		} else {
--			*status = 0;
-+			break;
- 		}
-+		*status = 0;
- 		break;
- 	case COMP_SHORT_TX:
--			*status = 0;
-+		*status = 0;
- 		break;
- 	case COMP_STOP_SHORT:
--		if (event_trb == ep_ring->dequeue || event_trb == td->last_trb)
--			xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n");
-+		if (on_data_stage)
-+			td->urb->actual_length = remaining;
- 		else
--			td->urb->actual_length =
--				EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
--
--		return finish_td(xhci, td, event_trb, event, ep, status, false);
-+			xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n");
-+		goto finish_td;
- 	case COMP_STOP:
--		/* Did we stop at data stage? */
--		if (event_trb != ep_ring->dequeue && event_trb != td->last_trb)
--			td->urb->actual_length =
--				td->urb->transfer_buffer_length -
--				EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
--		/* fall through */
-+		if (on_data_stage)
-+			td->urb->actual_length = requested - remaining;
-+		goto finish_td;
- 	case COMP_STOP_INVAL:
--		return finish_td(xhci, td, event_trb, event, ep, status, false);
-+		goto finish_td;
- 	default:
- 		if (!xhci_requires_manual_halt_cleanup(xhci,
--					ep_ctx, trb_comp_code))
-+						       ep_ctx, trb_comp_code))
- 			break;
--		xhci_dbg(xhci, "TRB error code %u, "
--				"halted endpoint index = %u\n",
--				trb_comp_code, ep_index);
-+		xhci_dbg(xhci, "TRB error %u, halted endpoint index = %u\n",
-+			 trb_comp_code, ep_index);
- 		/* else fall through */
- 	case COMP_STALL:
- 		/* Did we transfer part of the data (middle) phase? */
--		if (event_trb != ep_ring->dequeue &&
--				event_trb != td->last_trb)
--			td->urb->actual_length =
--				td->urb->transfer_buffer_length -
--				EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
-+		if (on_data_stage)
-+			td->urb->actual_length = requested - remaining;
- 		else if (!td->urb_length_set)
- 			td->urb->actual_length = 0;
--
--		return finish_td(xhci, td, event_trb, event, ep, status, false);
-+		goto finish_td;
- 	}
-+
-+	/* stopped at setup stage, no data transferred */
-+	if (event_trb == ep_ring->dequeue)
-+		goto finish_td;
-+
- 	/*
--	 * Did we transfer any data, despite the errors that might have
--	 * happened?  I.e. did we get past the setup stage?
-+	 * if on data stage then update the actual_length of the URB and flag it
-+	 * as set, so it won't be overwritten in the event for the last TRB.
- 	 */
--	if (event_trb != ep_ring->dequeue) {
--		/* The event was for the status stage */
--		if (event_trb == td->last_trb) {
--			if (!td->urb_length_set) {
--				td->urb->actual_length =
--					td->urb->transfer_buffer_length;
--			}
--		} else {
--			/*
--			 * Maybe the event was for the data stage? If so, update
--			 * already the actual_length of the URB and flag it as
--			 * set, so that it is not overwritten in the event for
--			 * the last TRB.
--			 */
--			td->urb_length_set = true;
--			td->urb->actual_length =
--				td->urb->transfer_buffer_length -
--				EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
--			xhci_dbg(xhci, "Waiting for status "
--					"stage event\n");
--			return 0;
--		}
-+	if (on_data_stage) {
-+		td->urb_length_set = true;
-+		td->urb->actual_length = requested - remaining;
-+		xhci_dbg(xhci, "Waiting for status stage event\n");
-+		return 0;
- 	}
- 
-+	/* at status stage */
-+	if (!td->urb_length_set)
-+		td->urb->actual_length = requested;
-+
-+finish_td:
- 	return finish_td(xhci, td, event_trb, event, ep, status, false);
- }
- 
diff --git a/patches.renesas/0281-ARM-dts-r7s72100-add-rtc-to-device-tree.patch b/patches.renesas/0281-ARM-dts-r7s72100-add-rtc-to-device-tree.patch
deleted file mode 100644
index b3c7a2f6ac5da8..00000000000000
--- a/patches.renesas/0281-ARM-dts-r7s72100-add-rtc-to-device-tree.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 5a1356592873f9ce9780f4f869038df93ebd71a9 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Wed, 29 Mar 2017 10:30:33 -0700
-Subject: [PATCH 281/286] ARM: dts: r7s72100: add rtc to device tree
-
-Add the realtime clock device node.
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3b5e3f0455442f376f91c69147526535a0389ac3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100.dtsi |   14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100.dtsi
-+++ b/arch/arm/boot/dts/r7s72100.dtsi
-@@ -563,4 +563,18 @@
- 		power-domains = <&cpg_clocks>;
- 		status = "disabled";
- 	};
-+
-+	rtc: rtc@fcff1000 {
-+		compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc";
-+		reg = <0xfcff1000 0x2e>;
-+		interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING
-+			      GIC_SPI 277 IRQ_TYPE_EDGE_RISING
-+			      GIC_SPI 278 IRQ_TYPE_EDGE_RISING>;
-+		interrupt-names = "alarm", "period", "carry";
-+		clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>,
-+			 <&rtc_x3_clk>, <&extal_clk>;
-+		clock-names = "fck", "rtc_x1", "rtc_x3", "extal";
-+		power-domains = <&cpg_clocks>;
-+		status = "disabled";
-+	};
- };
diff --git a/patches.renesas/0281-xhci-cleanup-and-refactor-process_bulk_intr_td.patch b/patches.renesas/0281-xhci-cleanup-and-refactor-process_bulk_intr_td.patch
deleted file mode 100644
index 27a0d0fa9f3889..00000000000000
--- a/patches.renesas/0281-xhci-cleanup-and-refactor-process_bulk_intr_td.patch
+++ /dev/null
@@ -1,162 +0,0 @@
-From d6882162971f3b10808477b84bd2207802bf6ec6 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:17 +0200
-Subject: [PATCH 281/299] xhci: cleanup and refactor process_bulk_intr_td()
-
-mostly refactoring, but does also change error message if
-we get a bad length in the event trb.
-
-Adds a helper function to sum trb lengths of partial TDs
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 30a65b45bfb1a978f5576eeb8280d332c0aada74)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |  108 ++++++++++++++++++-------------------------
- 1 file changed, 46 insertions(+), 62 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1944,6 +1944,21 @@ td_cleanup:
- 	return ret;
- }
- 
-+/* sum trb lengths from ring dequeue up to stop_trb, _excluding_ stop_trb */
-+static int sum_trb_lengths(struct xhci_hcd *xhci, struct xhci_ring *ring,
-+			   union xhci_trb *stop_trb)
-+{
-+	u32 sum;
-+	union xhci_trb *trb = ring->dequeue;
-+	struct xhci_segment *seg = ring->deq_seg;
-+
-+	for (sum = 0; trb != stop_trb; next_trb(xhci, ring, &seg, &trb)) {
-+		if (!trb_is_noop(trb) && !trb_is_link(trb))
-+			sum += TRB_LEN(le32_to_cpu(trb->generic.field[2]));
-+	}
-+	return sum;
-+}
-+
- /*
-  * Process control tds, update urb status and actual_length.
-  */
-@@ -2165,88 +2180,57 @@ static int process_bulk_intr_td(struct x
- 	struct xhci_virt_ep *ep, int *status)
- {
- 	struct xhci_ring *ep_ring;
--	union xhci_trb *cur_trb;
--	struct xhci_segment *cur_seg;
- 	u32 trb_comp_code;
-+	u32 remaining, requested, event_trb_len;
- 
- 	ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
- 	trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
-+	remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
-+	event_trb_len =	TRB_LEN(le32_to_cpu(event_trb->generic.field[2]));
-+	requested = td->urb->transfer_buffer_length;
- 
- 	switch (trb_comp_code) {
- 	case COMP_SUCCESS:
--		/* Double check that the HW transferred everything. */
--		if (event_trb != td->last_trb ||
--		    EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
-+		/* handle success with untransferred data as short packet */
-+		if (event_trb != td->last_trb || remaining) {
- 			xhci_warn(xhci, "WARN Successful completion on short TX\n");
--			if ((xhci->quirks & XHCI_TRUST_TX_LENGTH))
--				trb_comp_code = COMP_SHORT_TX;
-+			xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
-+				 td->urb->ep->desc.bEndpointAddress,
-+				 requested, remaining);
- 		}
- 		*status = 0;
- 		break;
--	case COMP_STOP_SHORT:
- 	case COMP_SHORT_TX:
-+		xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
-+			 td->urb->ep->desc.bEndpointAddress,
-+			 requested, remaining);
- 		*status = 0;
- 		break;
-+	case COMP_STOP_SHORT:
-+		td->urb->actual_length = remaining;
-+		goto finish_td;
-+	case COMP_STOP_INVAL:
-+		/* stopped on ep trb with invalid length, exclude it */
-+		event_trb_len	= 0;
-+		remaining	= 0;
-+		break;
- 	default:
--		/* Others already handled above */
-+		/* do nothing */
- 		break;
- 	}
--	if (trb_comp_code == COMP_SHORT_TX)
--		xhci_dbg(xhci, "ep %#x - asked for %d bytes, "
--				"%d bytes untransferred\n",
--				td->urb->ep->desc.bEndpointAddress,
--				td->urb->transfer_buffer_length,
--				EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
--	/* Stopped - short packet completion */
--	if (trb_comp_code == COMP_STOP_SHORT) {
--		td->urb->actual_length =
--			EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
- 
--		if (td->urb->transfer_buffer_length <
--				td->urb->actual_length) {
--			xhci_warn(xhci, "HC gave bad length of %d bytes txed\n",
--				EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
--			td->urb->actual_length = 0;
--			 /* status will be set by usb core for canceled urbs */
--		}
--	/* Fast path - was this the last TRB in the TD for this URB? */
--	} else if (event_trb == td->last_trb) {
--		if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
--			td->urb->actual_length =
--				td->urb->transfer_buffer_length -
--				EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
--			if (td->urb->transfer_buffer_length <
--					td->urb->actual_length) {
--				xhci_warn(xhci, "HC gave bad length of %d bytes left\n",
--					  EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
--				td->urb->actual_length = 0;
--				*status = 0;
--			}
--			/* Don't overwrite a previously set error code */
--			if (*status == -EINPROGRESS)
--				*status = 0;
--		}
--	} else {
--		/* Slow path - walk the list, starting from the dequeue
--		 * pointer, to get the actual length transferred.
--		 */
-+	if (event_trb == td->last_trb)
-+		td->urb->actual_length = requested - remaining;
-+	else
-+		td->urb->actual_length =
-+			sum_trb_lengths(xhci, ep_ring, event_trb) +
-+			event_trb_len - remaining;
-+finish_td:
-+	if (remaining > requested) {
-+		xhci_warn(xhci, "bad transfer trb length %d in event trb\n",
-+			  remaining);
- 		td->urb->actual_length = 0;
--		for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg;
--				cur_trb != event_trb;
--				next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
--			if (!trb_is_noop(cur_trb) && !trb_is_link(cur_trb))
--				td->urb->actual_length +=
--					TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
--		}
--		/* If the ring didn't stop on a Link or No-op TRB, add
--		 * in the actual bytes transferred from the Normal TRB
--		 */
--		if (trb_comp_code != COMP_STOP_INVAL)
--			td->urb->actual_length +=
--				TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
--				EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
- 	}
--
- 	return finish_td(xhci, td, event_trb, event, ep, status, false);
- }
- 
diff --git a/patches.renesas/0282-ARM-dts-rskrza1-set-rtc_x1-clock-value.patch b/patches.renesas/0282-ARM-dts-rskrza1-set-rtc_x1-clock-value.patch
deleted file mode 100644
index c5fcac6c426b56..00000000000000
--- a/patches.renesas/0282-ARM-dts-rskrza1-set-rtc_x1-clock-value.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From e83c05de11bb23d05862dfb54807174a4f242766 Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Wed, 29 Mar 2017 10:30:34 -0700
-Subject: [PATCH 282/286] ARM: dts: rskrza1: set rtc_x1 clock value
-
-Enable the 32.768 kHz RTC_X1 clock by setting the frequency value to
-non-zero.
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f90c36448aacde1fd41332659a12cbc9558b1137)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100-rskrza1.dts |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100-rskrza1.dts
-+++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
-@@ -43,6 +43,10 @@
- 	clock-frequency = <48000000>;
- };
- 
-+&rtc_x1_clk {
-+	clock-frequency = <32768>;
-+};
-+
- &mtu2 {
- 	status = "okay";
- };
diff --git a/patches.renesas/0282-xhci-rename-endpoint-related-trb-variables.patch b/patches.renesas/0282-xhci-rename-endpoint-related-trb-variables.patch
deleted file mode 100644
index c80d93924ed154..00000000000000
--- a/patches.renesas/0282-xhci-rename-endpoint-related-trb-variables.patch
+++ /dev/null
@@ -1,290 +0,0 @@
-From bab340dadee90112f8d1930e59534d3107a44fcf Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:18 +0200
-Subject: [PATCH 282/299] xhci: rename endpoint related trb variables
-
-Renaming variables, no functional changes
-
-Event trbs on the event ring cointain a pointer to the transfer trb
-on a endpoint ring that caused the event.
-
-The naming has been very confusing as the event trb was called "event"
-and the endpoint transfer trb was called "event_trb".
-
-rename all variables that are realated to the endpoint transfer trb
-from event_* to ep_*
-
-No functional changes
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit f97c08ae329bcf0016379235e3f0bd6b8b2adbf9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   77 +++++++++++++++++++++----------------------
- 1 file changed, 38 insertions(+), 39 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1787,7 +1787,7 @@ struct xhci_segment *trb_in_td(struct xh
- static void xhci_cleanup_halted_endpoint(struct xhci_hcd *xhci,
- 		unsigned int slot_id, unsigned int ep_index,
- 		unsigned int stream_id,
--		struct xhci_td *td, union xhci_trb *event_trb)
-+		struct xhci_td *td, union xhci_trb *ep_trb)
- {
- 	struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
- 	struct xhci_command *command;
-@@ -1852,7 +1852,7 @@ int xhci_is_vendor_info_code(struct xhci
-  * Return 1 if the urb can be given back.
-  */
- static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
--	union xhci_trb *event_trb, struct xhci_transfer_event *event,
-+	union xhci_trb *ep_trb, struct xhci_transfer_event *event,
- 	struct xhci_virt_ep *ep, int *status, bool skip)
- {
- 	struct xhci_virt_device *xdev;
-@@ -1894,7 +1894,7 @@ static int finish_td(struct xhci_hcd *xh
- 		 * The class driver clears the device side halt later.
- 		 */
- 		xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index,
--					ep_ring->stream_id, td, event_trb);
-+					ep_ring->stream_id, td, ep_trb);
- 	} else {
- 		/* Update ring dequeue pointer */
- 		while (ep_ring->dequeue != td->last_trb)
-@@ -1963,7 +1963,7 @@ static int sum_trb_lengths(struct xhci_h
-  * Process control tds, update urb status and actual_length.
-  */
- static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
--	union xhci_trb *event_trb, struct xhci_transfer_event *event,
-+	union xhci_trb *ep_trb, struct xhci_transfer_event *event,
- 	struct xhci_virt_ep *ep, int *status)
- {
- 	struct xhci_virt_device *xdev;
-@@ -1985,12 +1985,11 @@ static int process_ctrl_td(struct xhci_h
- 	remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
- 
- 	/* not setup (dequeue), or status stage means we are at data stage */
--	on_data_stage = (event_trb != ep_ring->dequeue &&
--			 event_trb != td->last_trb);
-+	on_data_stage = (ep_trb != ep_ring->dequeue && ep_trb != td->last_trb);
- 
- 	switch (trb_comp_code) {
- 	case COMP_SUCCESS:
--		if (event_trb != td->last_trb) {
-+		if (ep_trb != td->last_trb) {
- 			xhci_warn(xhci, "WARN: Success on ctrl %s TRB without IOC set?\n",
- 				  on_data_stage ? "data" : "setup");
- 			*status = -ESHUTDOWN;
-@@ -2030,7 +2029,7 @@ static int process_ctrl_td(struct xhci_h
- 	}
- 
- 	/* stopped at setup stage, no data transferred */
--	if (event_trb == ep_ring->dequeue)
-+	if (ep_trb == ep_ring->dequeue)
- 		goto finish_td;
- 
- 	/*
-@@ -2049,14 +2048,14 @@ static int process_ctrl_td(struct xhci_h
- 		td->urb->actual_length = requested;
- 
- finish_td:
--	return finish_td(xhci, td, event_trb, event, ep, status, false);
-+	return finish_td(xhci, td, ep_trb, event, ep, status, false);
- }
- 
- /*
-  * Process isochronous tds, update urb packet status and actual_length.
-  */
- static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
--	union xhci_trb *event_trb, struct xhci_transfer_event *event,
-+	union xhci_trb *ep_trb, struct xhci_transfer_event *event,
- 	struct xhci_virt_ep *ep, int *status)
- {
- 	struct xhci_ring *ep_ring;
-@@ -2106,7 +2105,7 @@ static int process_isoc_td(struct xhci_h
- 		break;
- 	case COMP_TX_ERR:
- 		frame->status = -EPROTO;
--		if (event_trb != td->last_trb)
-+		if (ep_trb != td->last_trb)
- 			return 0;
- 		skip_td = true;
- 		break;
-@@ -2127,7 +2126,7 @@ static int process_isoc_td(struct xhci_h
- 		td->urb->actual_length += frame->actual_length;
- 	} else {
- 		for (cur_trb = ep_ring->dequeue,
--		     cur_seg = ep_ring->deq_seg; cur_trb != event_trb;
-+		     cur_seg = ep_ring->deq_seg; cur_trb != ep_trb;
- 		     next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
- 			if (!trb_is_noop(cur_trb) && !trb_is_link(cur_trb))
- 				len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
-@@ -2141,7 +2140,7 @@ static int process_isoc_td(struct xhci_h
- 		}
- 	}
- 
--	return finish_td(xhci, td, event_trb, event, ep, status, false);
-+	return finish_td(xhci, td, ep_trb, event, ep, status, false);
- }
- 
- static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
-@@ -2176,23 +2175,23 @@ static int skip_isoc_td(struct xhci_hcd
-  * Process bulk and interrupt tds, update urb status and actual_length.
-  */
- static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
--	union xhci_trb *event_trb, struct xhci_transfer_event *event,
-+	union xhci_trb *ep_trb, struct xhci_transfer_event *event,
- 	struct xhci_virt_ep *ep, int *status)
- {
- 	struct xhci_ring *ep_ring;
- 	u32 trb_comp_code;
--	u32 remaining, requested, event_trb_len;
-+	u32 remaining, requested, ep_trb_len;
- 
- 	ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
- 	trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
- 	remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
--	event_trb_len =	TRB_LEN(le32_to_cpu(event_trb->generic.field[2]));
-+	ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2]));
- 	requested = td->urb->transfer_buffer_length;
- 
- 	switch (trb_comp_code) {
- 	case COMP_SUCCESS:
- 		/* handle success with untransferred data as short packet */
--		if (event_trb != td->last_trb || remaining) {
-+		if (ep_trb != td->last_trb || remaining) {
- 			xhci_warn(xhci, "WARN Successful completion on short TX\n");
- 			xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
- 				 td->urb->ep->desc.bEndpointAddress,
-@@ -2211,7 +2210,7 @@ static int process_bulk_intr_td(struct x
- 		goto finish_td;
- 	case COMP_STOP_INVAL:
- 		/* stopped on ep trb with invalid length, exclude it */
--		event_trb_len	= 0;
-+		ep_trb_len	= 0;
- 		remaining	= 0;
- 		break;
- 	default:
-@@ -2219,19 +2218,19 @@ static int process_bulk_intr_td(struct x
- 		break;
- 	}
- 
--	if (event_trb == td->last_trb)
-+	if (ep_trb == td->last_trb)
- 		td->urb->actual_length = requested - remaining;
- 	else
- 		td->urb->actual_length =
--			sum_trb_lengths(xhci, ep_ring, event_trb) +
--			event_trb_len - remaining;
-+			sum_trb_lengths(xhci, ep_ring, ep_trb) +
-+			ep_trb_len - remaining;
- finish_td:
- 	if (remaining > requested) {
- 		xhci_warn(xhci, "bad transfer trb length %d in event trb\n",
- 			  remaining);
- 		td->urb->actual_length = 0;
- 	}
--	return finish_td(xhci, td, event_trb, event, ep, status, false);
-+	return finish_td(xhci, td, ep_trb, event, ep, status, false);
- }
- 
- /*
-@@ -2250,9 +2249,9 @@ static int handle_tx_event(struct xhci_h
- 	unsigned int slot_id;
- 	int ep_index;
- 	struct xhci_td *td = NULL;
--	dma_addr_t event_dma;
--	struct xhci_segment *event_seg;
--	union xhci_trb *event_trb;
-+	dma_addr_t ep_trb_dma;
-+	struct xhci_segment *ep_seg;
-+	union xhci_trb *ep_trb;
- 	struct urb *urb = NULL;
- 	int status = -EINPROGRESS;
- 	struct urb_priv *urb_priv;
-@@ -2309,7 +2308,7 @@ static int handle_tx_event(struct xhci_h
- 			td_num++;
- 	}
- 
--	event_dma = le64_to_cpu(event->buffer);
-+	ep_trb_dma = le64_to_cpu(event->buffer);
- 	trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
- 	/* Look for common error cases */
- 	switch (trb_comp_code) {
-@@ -2455,8 +2454,8 @@ static int handle_tx_event(struct xhci_h
- 			td_num--;
- 
- 		/* Is this a TRB in the currently executing TD? */
--		event_seg = trb_in_td(xhci, ep_ring->deq_seg, ep_ring->dequeue,
--				td->last_trb, event_dma, false);
-+		ep_seg = trb_in_td(xhci, ep_ring->deq_seg, ep_ring->dequeue,
-+				td->last_trb, ep_trb_dma, false);
- 
- 		/*
- 		 * Skip the Force Stopped Event. The event_trb(event_dma) of FSE
-@@ -2466,13 +2465,13 @@ static int handle_tx_event(struct xhci_h
- 		 * last TRB of the previous TD. The command completion handle
- 		 * will take care the rest.
- 		 */
--		if (!event_seg && (trb_comp_code == COMP_STOP ||
-+		if (!ep_seg && (trb_comp_code == COMP_STOP ||
- 				   trb_comp_code == COMP_STOP_INVAL)) {
- 			ret = 0;
- 			goto cleanup;
- 		}
- 
--		if (!event_seg) {
-+		if (!ep_seg) {
- 			if (!ep->skip ||
- 			    !usb_endpoint_xfer_isoc(&td->urb->ep->desc)) {
- 				/* Some host controllers give a spurious
-@@ -2493,7 +2492,7 @@ static int handle_tx_event(struct xhci_h
- 					trb_comp_code);
- 				trb_in_td(xhci, ep_ring->deq_seg,
- 					  ep_ring->dequeue, td->last_trb,
--					  event_dma, true);
-+					  ep_trb_dma, true);
- 				return -ESHUTDOWN;
- 			}
- 
-@@ -2510,16 +2509,16 @@ static int handle_tx_event(struct xhci_h
- 			ep->skip = false;
- 		}
- 
--		event_trb = &event_seg->trbs[(event_dma - event_seg->dma) /
--						sizeof(*event_trb)];
-+		ep_trb = &ep_seg->trbs[(ep_trb_dma - ep_seg->dma) /
-+						sizeof(*ep_trb)];
- 		/*
- 		 * No-op TRB should not trigger interrupts.
--		 * If event_trb is a no-op TRB, it means the
-+		 * If ep_trb is a no-op TRB, it means the
- 		 * corresponding TD has been cancelled. Just ignore
- 		 * the TD.
- 		 */
--		if (trb_is_noop(event_trb)) {
--			xhci_dbg(xhci, "event_trb is a no-op TRB. Skip it\n");
-+		if (trb_is_noop(ep_trb)) {
-+			xhci_dbg(xhci, "ep_trb is a no-op TRB. Skip it\n");
- 			goto cleanup;
- 		}
- 
-@@ -2527,13 +2526,13 @@ static int handle_tx_event(struct xhci_h
- 		 * the core
- 		 */
- 		if (usb_endpoint_xfer_control(&td->urb->ep->desc))
--			ret = process_ctrl_td(xhci, td, event_trb, event, ep,
-+			ret = process_ctrl_td(xhci, td, ep_trb, event, ep,
- 						 &status);
- 		else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc))
--			ret = process_isoc_td(xhci, td, event_trb, event, ep,
-+			ret = process_isoc_td(xhci, td, ep_trb, event, ep,
- 						 &status);
- 		else
--			ret = process_bulk_intr_td(xhci, td, event_trb, event,
-+			ret = process_bulk_intr_td(xhci, td, ep_trb, event,
- 						 ep, &status);
- 
- cleanup:
diff --git a/patches.renesas/0283-ARM-dts-rskrza1-add-rtc-DT-support.patch b/patches.renesas/0283-ARM-dts-rskrza1-add-rtc-DT-support.patch
deleted file mode 100644
index 0f181d161e247c..00000000000000
--- a/patches.renesas/0283-ARM-dts-rskrza1-add-rtc-DT-support.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 3d7c97d282bc217c0352421a8b64bd849cd5d19d Mon Sep 17 00:00:00 2001
-From: Chris Brandt <chris.brandt@renesas.com>
-Date: Wed, 29 Mar 2017 10:30:35 -0700
-Subject: [PATCH 283/286] ARM: dts: rskrza1: add rtc DT support
-
-Enable the realtime clock.
-
-Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 931f3dc3f0d14cc7758aa2d48fc2d713f8c6ebff)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100-rskrza1.dts |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100-rskrza1.dts
-+++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
-@@ -73,6 +73,10 @@
- 	status = "okay";
- };
- 
-+&rtc {
-+	status = "okay";
-+};
-+
- &scif2 {
- 	status = "okay";
- };
diff --git a/patches.renesas/0283-xhci-refactor-and-cleanup-process_isoc_td.patch b/patches.renesas/0283-xhci-refactor-and-cleanup-process_isoc_td.patch
deleted file mode 100644
index 2c3cefc48c4137..00000000000000
--- a/patches.renesas/0283-xhci-refactor-and-cleanup-process_isoc_td.patch
+++ /dev/null
@@ -1,134 +0,0 @@
-From 764f0cb7bf5ec97d64bb8914a423673e2ddbe6cb Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:19 +0200
-Subject: [PATCH 283/299] xhci: refactor and cleanup process_isoc_td()
-
-No functional changes
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 36da3a1dd8d96644ac548358dbd524440a5ba153)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   69 +++++++++++++++++++------------------------
- 1 file changed, 32 insertions(+), 37 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -2061,84 +2061,79 @@ static int process_isoc_td(struct xhci_h
- 	struct xhci_ring *ep_ring;
- 	struct urb_priv *urb_priv;
- 	int idx;
--	int len = 0;
--	union xhci_trb *cur_trb;
--	struct xhci_segment *cur_seg;
- 	struct usb_iso_packet_descriptor *frame;
- 	u32 trb_comp_code;
--	bool skip_td = false;
-+	bool sum_trbs_for_length = false;
-+	u32 remaining, requested, ep_trb_len;
-+	int short_framestatus;
- 
- 	ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
- 	trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
- 	urb_priv = td->urb->hcpriv;
- 	idx = urb_priv->td_cnt;
- 	frame = &td->urb->iso_frame_desc[idx];
-+	requested = frame->length;
-+	remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
-+	ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2]));
-+	short_framestatus = td->urb->transfer_flags & URB_SHORT_NOT_OK ?
-+		-EREMOTEIO : 0;
- 
- 	/* handle completion code */
- 	switch (trb_comp_code) {
- 	case COMP_SUCCESS:
--		if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0) {
--			frame->status = 0;
-+		if (remaining) {
-+			frame->status = short_framestatus;
-+			if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
-+				sum_trbs_for_length = true;
- 			break;
- 		}
--		if ((xhci->quirks & XHCI_TRUST_TX_LENGTH))
--			trb_comp_code = COMP_SHORT_TX;
--	/* fallthrough */
--	case COMP_STOP_SHORT:
-+		frame->status = 0;
-+		break;
- 	case COMP_SHORT_TX:
--		frame->status = td->urb->transfer_flags & URB_SHORT_NOT_OK ?
--				-EREMOTEIO : 0;
-+		frame->status = short_framestatus;
-+		sum_trbs_for_length = true;
- 		break;
- 	case COMP_BW_OVER:
- 		frame->status = -ECOMM;
--		skip_td = true;
- 		break;
- 	case COMP_BUFF_OVER:
- 	case COMP_BABBLE:
- 		frame->status = -EOVERFLOW;
--		skip_td = true;
- 		break;
- 	case COMP_DEV_ERR:
- 	case COMP_STALL:
- 		frame->status = -EPROTO;
--		skip_td = true;
- 		break;
- 	case COMP_TX_ERR:
- 		frame->status = -EPROTO;
- 		if (ep_trb != td->last_trb)
- 			return 0;
--		skip_td = true;
- 		break;
- 	case COMP_STOP:
-+		sum_trbs_for_length = true;
-+		break;
-+	case COMP_STOP_SHORT:
-+		/* field normally containing residue now contains tranferred */
-+		frame->status = short_framestatus;
-+		requested = remaining;
-+		break;
- 	case COMP_STOP_INVAL:
-+		requested = 0;
-+		remaining = 0;
- 		break;
- 	default:
-+		sum_trbs_for_length = true;
- 		frame->status = -1;
- 		break;
- 	}
- 
--	if (trb_comp_code == COMP_SUCCESS || skip_td) {
--		frame->actual_length = frame->length;
--		td->urb->actual_length += frame->length;
--	} else if (trb_comp_code == COMP_STOP_SHORT) {
--		frame->actual_length =
--			EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
--		td->urb->actual_length += frame->actual_length;
--	} else {
--		for (cur_trb = ep_ring->dequeue,
--		     cur_seg = ep_ring->deq_seg; cur_trb != ep_trb;
--		     next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
--			if (!trb_is_noop(cur_trb) && !trb_is_link(cur_trb))
--				len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
--		}
--		len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
--			EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
-+	if (sum_trbs_for_length)
-+		frame->actual_length = sum_trb_lengths(xhci, ep_ring, ep_trb) +
-+			ep_trb_len - remaining;
-+	else
-+		frame->actual_length = requested;
- 
--		if (trb_comp_code != COMP_STOP_INVAL) {
--			frame->actual_length = len;
--			td->urb->actual_length += len;
--		}
--	}
-+	td->urb->actual_length += frame->actual_length;
- 
- 	return finish_td(xhci, td, ep_trb, event, ep, status, false);
- }
diff --git a/patches.renesas/0284-ARM-dts-genmai-Enable-rtc-and-rtc_x1-clock.patch b/patches.renesas/0284-ARM-dts-genmai-Enable-rtc-and-rtc_x1-clock.patch
deleted file mode 100644
index 93d5a9bf08d619..00000000000000
--- a/patches.renesas/0284-ARM-dts-genmai-Enable-rtc-and-rtc_x1-clock.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From bc7687abec15b47fc5378930962ed6d76a2c2afe Mon Sep 17 00:00:00 2001
-From: Jacopo Mondi <jacopo+renesas@jmondi.org>
-Date: Mon, 3 Apr 2017 18:03:18 +0200
-Subject: [PATCH 284/286] ARM: dts: genmai: Enable rtc and rtc_x1 clock
-
-Enable the 32.768 kHz RTC_X1 clock by setting the frequency value to
-non-zero and enable the realtime clock.
-
-Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e533a459f07c2b7bcc60121032b3b24d0c58133a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100-genmai.dts |    8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/arch/arm/boot/dts/r7s72100-genmai.dts
-+++ b/arch/arm/boot/dts/r7s72100-genmai.dts
-@@ -44,6 +44,10 @@
- 	clock-frequency = <48000000>;
- };
- 
-+&rtc_x1_clk {
-+	clock-frequency = <32768>;
-+};
-+
- &mtu2 {
- 	status = "okay";
- };
-@@ -59,6 +63,10 @@
- 	};
- };
- 
-+&rtc {
-+	status = "okay";
-+};
-+
- &scif2 {
- 	status = "okay";
- };
diff --git a/patches.renesas/0284-xhci-cleanup-and-refactor-td_to_noop.patch b/patches.renesas/0284-xhci-cleanup-and-refactor-td_to_noop.patch
deleted file mode 100644
index eff2cce49e72af..00000000000000
--- a/patches.renesas/0284-xhci-cleanup-and-refactor-td_to_noop.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From 36636c72248ed09c0c2aaa524f6150f58ff22a71 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:20 +0200
-Subject: [PATCH 284/299] xhci: cleanup and refactor td_to_noop()
-
-No functional changes but a few debugging outputs removed
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 0d58a1a047fb897d963faea0112089378285def5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   60 +++++++++++++------------------------------
- 1 file changed, 19 insertions(+), 41 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -581,54 +581,32 @@ void xhci_find_new_dequeue_state(struct
-  * of this TD.)  This is used to remove partially enqueued isoc TDs from a ring.
-  */
- static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
--		struct xhci_td *cur_td, bool flip_cycle)
-+		       struct xhci_td *td, bool flip_cycle)
- {
--	struct xhci_segment *cur_seg;
--	union xhci_trb *cur_trb;
-+	struct xhci_segment *seg	= td->start_seg;
-+	union xhci_trb *trb		= td->first_trb;
- 
--	for (cur_seg = cur_td->start_seg, cur_trb = cur_td->first_trb;
--			true;
--			next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
--		if (trb_is_link(cur_trb)) {
--			/* Unchain any chained Link TRBs, but
--			 * leave the pointers intact.
--			 */
--			cur_trb->generic.field[3] &= cpu_to_le32(~TRB_CHAIN);
--			/* Flip the cycle bit (link TRBs can't be the first
--			 * or last TRB).
--			 */
--			if (flip_cycle)
--				cur_trb->generic.field[3] ^=
--					cpu_to_le32(TRB_CYCLE);
--			xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
--					"Cancel (unchain) link TRB");
--			xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
--					"Address = %p (0x%llx dma); "
--					"in seg %p (0x%llx dma)",
--					cur_trb,
--					(unsigned long long)xhci_trb_virt_to_dma(cur_seg, cur_trb),
--					cur_seg,
--					(unsigned long long)cur_seg->dma);
-+	while (1) {
-+		if (trb_is_link(trb)) {
-+			/* unchain chained link TRBs */
-+			trb->link.control &= cpu_to_le32(~TRB_CHAIN);
- 		} else {
--			cur_trb->generic.field[0] = 0;
--			cur_trb->generic.field[1] = 0;
--			cur_trb->generic.field[2] = 0;
-+			trb->generic.field[0] = 0;
-+			trb->generic.field[1] = 0;
-+			trb->generic.field[2] = 0;
- 			/* Preserve only the cycle bit of this TRB */
--			cur_trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
--			/* Flip the cycle bit except on the first or last TRB */
--			if (flip_cycle && cur_trb != cur_td->first_trb &&
--					cur_trb != cur_td->last_trb)
--				cur_trb->generic.field[3] ^=
--					cpu_to_le32(TRB_CYCLE);
--			cur_trb->generic.field[3] |= cpu_to_le32(
-+			trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
-+			trb->generic.field[3] |= cpu_to_le32(
- 				TRB_TYPE(TRB_TR_NOOP));
--			xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
--					"TRB to noop at offset 0x%llx",
--					(unsigned long long)
--					xhci_trb_virt_to_dma(cur_seg, cur_trb));
- 		}
--		if (cur_trb == cur_td->last_trb)
-+		/* flip cycle if asked to */
-+		if (flip_cycle && trb != td->first_trb && trb != td->last_trb)
-+			trb->generic.field[3] ^= cpu_to_le32(TRB_CYCLE);
-+
-+		if (trb == td->last_trb)
- 			break;
-+
-+		next_trb(xhci, ep_ring, &seg, &trb);
- 	}
- }
- 
diff --git a/patches.renesas/0285-ARM-dts-r8a7790-Drop-_clk-suffix-from-external-CAN-c.patch b/patches.renesas/0285-ARM-dts-r8a7790-Drop-_clk-suffix-from-external-CAN-c.patch
deleted file mode 100644
index 88115fb92fa2c0..00000000000000
--- a/patches.renesas/0285-ARM-dts-r8a7790-Drop-_clk-suffix-from-external-CAN-c.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 76e9e6cdc5519a1b16a8a03b8c36daa2b06ab1d6 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 3 Apr 2017 12:08:07 +0200
-Subject: [PATCH 285/286] ARM: dts: r8a7790: Drop _clk suffix from external CAN
- clock node name
-
-The current practice is to not add _clk suffixes to clock node names in
-DT, as these names are used as the actual clock names.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Stephen Boyd <sboyd@codeaurora.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5b476a9610910a6ac5222bee4ae83a8d41800dbd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -1101,7 +1101,7 @@
- 		};
- 
- 		/* External CAN clock */
--		can_clk: can_clk {
-+		can_clk: can {
- 			compatible = "fixed-clock";
- 			#clock-cells = <0>;
- 			/* This value must be overridden by the board. */
diff --git a/patches.renesas/0285-xhci-fix-non-static-symbol-warning.patch b/patches.renesas/0285-xhci-fix-non-static-symbol-warning.patch
deleted file mode 100644
index e967cdcf527c3a..00000000000000
--- a/patches.renesas/0285-xhci-fix-non-static-symbol-warning.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 064174f9a631fae05598d530ac80898a3fde5443 Mon Sep 17 00:00:00 2001
-From: Wei Yongjun <weiyj.lk@gmail.com>
-Date: Fri, 11 Nov 2016 15:13:21 +0200
-Subject: [PATCH 285/299] xhci: fix non static symbol warning
-
-Fixes the following sparse warning:
-
-drivers/usb/host/xhci-ring.c:608:6: warning:
- symbol 'xhci_unmap_td_bounce_buffer' was not declared.
- Should it be static?
-
-Signed-off-by: Wei Yongjun <weiyj.lk@gmail.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 2d6d5769f82dc266e86a06f70eaae23265f757d6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -653,8 +653,8 @@ static void xhci_giveback_urb_in_irq(str
- 	}
- }
- 
--void xhci_unmap_td_bounce_buffer(struct xhci_hcd *xhci, struct xhci_ring *ring,
--				 struct xhci_td *td)
-+static void xhci_unmap_td_bounce_buffer(struct xhci_hcd *xhci,
-+		struct xhci_ring *ring, struct xhci_td *td)
- {
- 	struct device *dev = xhci_to_hcd(xhci)->self.controller;
- 	struct xhci_segment *seg = td->bounce_seg;
diff --git a/patches.renesas/0286-ARM-dts-r8a7791-Drop-_clk-suffix-from-external-CAN-c.patch b/patches.renesas/0286-ARM-dts-r8a7791-Drop-_clk-suffix-from-external-CAN-c.patch
deleted file mode 100644
index 1854fbb79953ac..00000000000000
--- a/patches.renesas/0286-ARM-dts-r8a7791-Drop-_clk-suffix-from-external-CAN-c.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From d2fa736133ef028cd05a34cbf7d6de8a063b5ab0 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Mon, 3 Apr 2017 12:08:08 +0200
-Subject: [PATCH 286/286] ARM: dts: r8a7791: Drop _clk suffix from external CAN
- clock node name
-
-The current practice is to not add _clk suffixes to clock node names in
-DT, as these names are used as the actual clock names.
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Acked-by: Stephen Boyd <sboyd@codeaurora.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit eb77d7260c4c25206e2a455be0dbe6443e0856b5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -1126,7 +1126,7 @@
- 		};
- 
- 		/* External CAN clock */
--		can_clk: can_clk {
-+		can_clk: can {
- 			compatible = "fixed-clock";
- 			#clock-cells = <0>;
- 			/* This value must be overridden by the board. */
diff --git a/patches.renesas/0286-xhci-refactor-handle_tx_event-urb-giveback.patch b/patches.renesas/0286-xhci-refactor-handle_tx_event-urb-giveback.patch
deleted file mode 100644
index c6952ca802034e..00000000000000
--- a/patches.renesas/0286-xhci-refactor-handle_tx_event-urb-giveback.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From bce395855b37503c7118a6915adef77a8b7f15da Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:22 +0200
-Subject: [PATCH 286/299] xhci: refactor handle_tx_event() urb giveback
-
-Move giving back the urb to a separate function
-No functional changes
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 446b31419cb122f12900fe2004fb59e413008a8e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   61 ++++++++++++++++++++++---------------------
- 1 file changed, 32 insertions(+), 29 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -622,6 +622,7 @@ static void xhci_stop_watchdog_timer_in_
- 		ep->stop_cmds_pending--;
- }
- 
-+
- /* Must be called with xhci->lock held in interrupt context */
- static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
- 		struct xhci_td *cur_td, int status)
-@@ -653,6 +654,35 @@ static void xhci_giveback_urb_in_irq(str
- 	}
- }
- 
-+/*
-+ * giveback urb, must be called with xhci->lock held.
-+ * releases and re-aquires xhci->lock
-+ */
-+static void xhci_giveback_urb_locked(struct xhci_hcd *xhci, struct xhci_td *td,
-+				     int status)
-+{
-+	struct urb *urb	= td->urb;
-+	struct urb_priv	*urb_priv = urb->hcpriv;
-+
-+	xhci_urb_free_priv(urb_priv);
-+
-+	usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
-+	if ((urb->actual_length != urb->transfer_buffer_length &&
-+	     (urb->transfer_flags & URB_SHORT_NOT_OK)) ||
-+	    (status != 0 && !usb_endpoint_xfer_isoc(&urb->ep->desc)))
-+		xhci_dbg(xhci, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
-+			 urb, urb->actual_length,
-+			 urb->transfer_buffer_length, status);
-+	spin_unlock(&xhci->lock);
-+	/* EHCI, UHCI, and OHCI always unconditionally set the
-+	 * urb->status of an isochronous endpoint to 0.
-+	 */
-+	if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
-+		status = 0;
-+	usb_hcd_giveback_urb(bus_to_hcd(urb->dev->bus), urb, status);
-+	spin_lock(&xhci->lock);
-+}
-+
- static void xhci_unmap_td_bounce_buffer(struct xhci_hcd *xhci,
- 		struct xhci_ring *ring, struct xhci_td *td)
- {
-@@ -2225,9 +2255,7 @@ static int handle_tx_event(struct xhci_h
- 	dma_addr_t ep_trb_dma;
- 	struct xhci_segment *ep_seg;
- 	union xhci_trb *ep_trb;
--	struct urb *urb = NULL;
- 	int status = -EINPROGRESS;
--	struct urb_priv *urb_priv;
- 	struct xhci_ep_ctx *ep_ctx;
- 	struct list_head *tmp;
- 	u32 trb_comp_code;
-@@ -2522,33 +2550,8 @@ cleanup:
- 		if (!handling_skipped_tds)
- 			inc_deq(xhci, xhci->event_ring);
- 
--		if (ret) {
--			urb = td->urb;
--			urb_priv = urb->hcpriv;
--
--			xhci_urb_free_priv(urb_priv);
--
--			usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
--			if ((urb->actual_length != urb->transfer_buffer_length &&
--						(urb->transfer_flags &
--						 URB_SHORT_NOT_OK)) ||
--					(status != 0 &&
--					 !usb_endpoint_xfer_isoc(&urb->ep->desc)))
--				xhci_dbg(xhci, "Giveback URB %p, len = %d, "
--						"expected = %d, status = %d\n",
--						urb, urb->actual_length,
--						urb->transfer_buffer_length,
--						status);
--			spin_unlock(&xhci->lock);
--			/* EHCI, UHCI, and OHCI always unconditionally set the
--			 * urb->status of an isochronous endpoint to 0.
--			 */
--			if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
--				status = 0;
--			usb_hcd_giveback_urb(bus_to_hcd(urb->dev->bus), urb, status);
--			spin_lock(&xhci->lock);
--		}
--
-+		if (ret)
-+			xhci_giveback_urb_locked(xhci, td, status);
- 	/*
- 	 * If ep->skip is set, it means there are missed tds on the
- 	 * endpoint ring need to take care of.
diff --git a/patches.renesas/0287-xhci-Giveback-urb-in-finish_td-directly.patch b/patches.renesas/0287-xhci-Giveback-urb-in-finish_td-directly.patch
deleted file mode 100644
index e6cca5f46fe79e..00000000000000
--- a/patches.renesas/0287-xhci-Giveback-urb-in-finish_td-directly.patch
+++ /dev/null
@@ -1,144 +0,0 @@
-From 808d84c901a67a719ae7ca3cba5ef598cbefb3e6 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:23 +0200
-Subject: [PATCH 287/299] xhci: Giveback urb in finish_td directly
-
-mostly refactoring and code cleanup.
-
-while handling transfer events we used to check the return value of
-various functions to see if we can give back the URB.
-Turns out the only case when those return values are set are when
-finish_td() notices we are completing the last td in the URB.
-
-give back the urb directly in finish_td() instead.
-
-Only functional change is that we now increase the event ring dequeue
-pointer in sowtware after giving back the URB. This should not matter
-as we are in hardware interrupt context and the time when writing the
-new event ring dequeue to hardware remains the same.
-Hardware is the only one that can put event TRBs on the event ring.
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 0c03d89d0c71722dfc0c4a2a300bff37324541dc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   31 ++++++++-----------------------
- 1 file changed, 8 insertions(+), 23 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1869,7 +1869,6 @@ static int finish_td(struct xhci_hcd *xh
- 	int ep_index;
- 	struct urb *urb = NULL;
- 	struct xhci_ep_ctx *ep_ctx;
--	int ret = 0;
- 	struct urb_priv	*urb_priv;
- 	u32 trb_comp_code;
- 
-@@ -1939,7 +1938,6 @@ td_cleanup:
- 	urb_priv->td_cnt++;
- 	/* Giveback the urb when all the tds are completed */
- 	if (urb_priv->td_cnt == urb_priv->length) {
--		ret = 1;
- 		if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
- 			xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
- 			if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
-@@ -1947,9 +1945,10 @@ td_cleanup:
- 					usb_amd_quirk_pll_enable();
- 			}
- 		}
-+		xhci_giveback_urb_locked(xhci, td, *status);
- 	}
- 
--	return ret;
-+	return 0;
- }
- 
- /* sum trb lengths from ring dequeue up to stop_trb, _excluding_ stop_trb */
-@@ -2259,7 +2258,6 @@ static int handle_tx_event(struct xhci_h
- 	struct xhci_ep_ctx *ep_ctx;
- 	struct list_head *tmp;
- 	u32 trb_comp_code;
--	int ret = 0;
- 	int td_num = 0;
- 	bool handling_skipped_tds = false;
- 
-@@ -2437,7 +2435,6 @@ static int handle_tx_event(struct xhci_h
- 				xhci_dbg(xhci, "td_list is empty while skip "
- 						"flag set. Clear skip flag.\n");
- 			}
--			ret = 0;
- 			goto cleanup;
- 		}
- 
-@@ -2446,7 +2443,6 @@ static int handle_tx_event(struct xhci_h
- 			ep->skip = false;
- 			xhci_dbg(xhci, "All tds on the ep_ring skipped. "
- 						"Clear skip flag.\n");
--			ret = 0;
- 			goto cleanup;
- 		}
- 
-@@ -2468,7 +2464,6 @@ static int handle_tx_event(struct xhci_h
- 		 */
- 		if (!ep_seg && (trb_comp_code == COMP_STOP ||
- 				   trb_comp_code == COMP_STOP_INVAL)) {
--			ret = 0;
- 			goto cleanup;
- 		}
- 
-@@ -2482,7 +2477,6 @@ static int handle_tx_event(struct xhci_h
- 				if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) &&
- 						ep_ring->last_td_was_short) {
- 					ep_ring->last_td_was_short = false;
--					ret = 0;
- 					goto cleanup;
- 				}
- 				/* HC is busted, give up! */
-@@ -2497,7 +2491,7 @@ static int handle_tx_event(struct xhci_h
- 				return -ESHUTDOWN;
- 			}
- 
--			ret = skip_isoc_td(xhci, td, event, ep, &status);
-+			skip_isoc_td(xhci, td, event, ep, &status);
- 			goto cleanup;
- 		}
- 		if (trb_comp_code == COMP_SHORT_TX)
-@@ -2523,22 +2517,15 @@ static int handle_tx_event(struct xhci_h
- 			goto cleanup;
- 		}
- 
--		/* Now update the urb's actual_length and give back to
--		 * the core
--		 */
-+		/* update the urb's actual_length and give back to the core */
- 		if (usb_endpoint_xfer_control(&td->urb->ep->desc))
--			ret = process_ctrl_td(xhci, td, ep_trb, event, ep,
--						 &status);
-+			process_ctrl_td(xhci, td, ep_trb, event, ep, &status);
- 		else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc))
--			ret = process_isoc_td(xhci, td, ep_trb, event, ep,
--						 &status);
-+			process_isoc_td(xhci, td, ep_trb, event, ep, &status);
- 		else
--			ret = process_bulk_intr_td(xhci, td, ep_trb, event,
--						 ep, &status);
--
-+			process_bulk_intr_td(xhci, td, ep_trb, event, ep,
-+					     &status);
- cleanup:
--
--
- 		handling_skipped_tds = ep->skip &&
- 			trb_comp_code != COMP_MISSED_INT &&
- 			trb_comp_code != COMP_PING_ERR;
-@@ -2550,8 +2537,6 @@ cleanup:
- 		if (!handling_skipped_tds)
- 			inc_deq(xhci, xhci->event_ring);
- 
--		if (ret)
--			xhci_giveback_urb_locked(xhci, td, status);
- 	/*
- 	 * If ep->skip is set, it means there are missed tds on the
- 	 * endpoint ring need to take care of.
diff --git a/patches.renesas/0288-xhci-Remove-duplicate-xhci-urb-giveback-functions.patch b/patches.renesas/0288-xhci-Remove-duplicate-xhci-urb-giveback-functions.patch
deleted file mode 100644
index 06aed1917b7565..00000000000000
--- a/patches.renesas/0288-xhci-Remove-duplicate-xhci-urb-giveback-functions.patch
+++ /dev/null
@@ -1,205 +0,0 @@
-From 6699005f41eeec6e3bcb831bb3f7c72299d59c63 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:24 +0200
-Subject: [PATCH 288/299] xhci: Remove duplicate xhci urb giveback functions
-
-We want one function that gives back urb in interrupt that can
-be used in both normal cases and when killing off urbs.
-
-Add small helpers that check if td is last_td_in_urb() and
-that increase the td count of a urb inc_td_cnt()
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 2a72126de1bb08594246a96347f7527bbef7e2df)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |  127 +++++++++++++++++++------------------------
- 1 file changed, 57 insertions(+), 70 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -115,6 +115,20 @@ static bool link_trb_toggles_cycle(union
- 	return le32_to_cpu(trb->link.control) & LINK_TOGGLE;
- }
- 
-+static bool last_td_in_urb(struct xhci_td *td)
-+{
-+	struct urb_priv *urb_priv = td->urb->hcpriv;
-+
-+	return urb_priv->td_cnt == urb_priv->length;
-+}
-+
-+static void inc_td_cnt(struct urb *urb)
-+{
-+	struct urb_priv *urb_priv = urb->hcpriv;
-+
-+	urb_priv->td_cnt++;
-+}
-+
- /* Updates trb to point to the next TRB in the ring, and updates seg if the next
-  * TRB is in a new segment.  This does not skip over link TRBs, and it does not
-  * effect the ring dequeue or enqueue pointers.
-@@ -622,64 +636,28 @@ static void xhci_stop_watchdog_timer_in_
- 		ep->stop_cmds_pending--;
- }
- 
--
--/* Must be called with xhci->lock held in interrupt context */
-+/*
-+ * Must be called with xhci->lock held in interrupt context,
-+ * releases and re-acquires xhci->lock
-+ */
- static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
--		struct xhci_td *cur_td, int status)
-+				     struct xhci_td *cur_td, int status)
- {
--	struct usb_hcd *hcd;
--	struct urb	*urb;
--	struct urb_priv	*urb_priv;
--
--	urb = cur_td->urb;
--	urb_priv = urb->hcpriv;
--	urb_priv->td_cnt++;
--	hcd = bus_to_hcd(urb->dev->bus);
--
--	/* Only giveback urb when this is the last td in urb */
--	if (urb_priv->td_cnt == urb_priv->length) {
--		if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
--			xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
--			if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs	== 0) {
--				if (xhci->quirks & XHCI_AMD_PLL_FIX)
--					usb_amd_quirk_pll_enable();
--			}
-+	struct urb	*urb		= cur_td->urb;
-+	struct urb_priv	*urb_priv	= urb->hcpriv;
-+	struct usb_hcd	*hcd		= bus_to_hcd(urb->dev->bus);
-+
-+	if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
-+		xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
-+		if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs	== 0) {
-+			if (xhci->quirks & XHCI_AMD_PLL_FIX)
-+				usb_amd_quirk_pll_enable();
- 		}
--		usb_hcd_unlink_urb_from_ep(hcd, urb);
--
--		spin_unlock(&xhci->lock);
--		usb_hcd_giveback_urb(hcd, urb, status);
--		xhci_urb_free_priv(urb_priv);
--		spin_lock(&xhci->lock);
- 	}
--}
--
--/*
-- * giveback urb, must be called with xhci->lock held.
-- * releases and re-aquires xhci->lock
-- */
--static void xhci_giveback_urb_locked(struct xhci_hcd *xhci, struct xhci_td *td,
--				     int status)
--{
--	struct urb *urb	= td->urb;
--	struct urb_priv	*urb_priv = urb->hcpriv;
--
- 	xhci_urb_free_priv(urb_priv);
--
--	usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
--	if ((urb->actual_length != urb->transfer_buffer_length &&
--	     (urb->transfer_flags & URB_SHORT_NOT_OK)) ||
--	    (status != 0 && !usb_endpoint_xfer_isoc(&urb->ep->desc)))
--		xhci_dbg(xhci, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
--			 urb, urb->actual_length,
--			 urb->transfer_buffer_length, status);
-+	usb_hcd_unlink_urb_from_ep(hcd, urb);
- 	spin_unlock(&xhci->lock);
--	/* EHCI, UHCI, and OHCI always unconditionally set the
--	 * urb->status of an isochronous endpoint to 0.
--	 */
--	if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
--		status = 0;
--	usb_hcd_giveback_urb(bus_to_hcd(urb->dev->bus), urb, status);
-+	usb_hcd_giveback_urb(hcd, urb, status);
- 	spin_lock(&xhci->lock);
- }
- 
-@@ -830,7 +808,9 @@ remove_finished_td:
- 		ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
- 		if (ep_ring && cur_td->bounce_seg)
- 			xhci_unmap_td_bounce_buffer(xhci, ep_ring, cur_td);
--		xhci_giveback_urb_in_irq(xhci, cur_td, 0);
-+		inc_td_cnt(cur_td->urb);
-+		if (last_td_in_urb(cur_td))
-+			xhci_giveback_urb_in_irq(xhci, cur_td, 0);
- 
- 		/* Stop processing the cancelled list if the watchdog timer is
- 		 * running.
-@@ -855,7 +835,10 @@ static void xhci_kill_ring_urbs(struct x
- 
- 		if (cur_td->bounce_seg)
- 			xhci_unmap_td_bounce_buffer(xhci, ring, cur_td);
--		xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
-+
-+		inc_td_cnt(cur_td->urb);
-+		if (last_td_in_urb(cur_td))
-+			xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
- 	}
- }
- 
-@@ -895,7 +878,10 @@ static void xhci_kill_endpoint_urbs(stru
- 		cur_td = list_first_entry(&ep->cancelled_td_list,
- 				struct xhci_td, cancelled_td_list);
- 		list_del_init(&cur_td->cancelled_td_list);
--		xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
-+
-+		inc_td_cnt(cur_td->urb);
-+		if (last_td_in_urb(cur_td))
-+			xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
- 	}
- }
- 
-@@ -1924,30 +1910,31 @@ td_cleanup:
- 	 * unsigned).  Play it safe and say we didn't transfer anything.
- 	 */
- 	if (urb->actual_length > urb->transfer_buffer_length) {
--		xhci_warn(xhci, "URB transfer length is wrong, xHC issue? req. len = %u, act. len = %u\n",
--			urb->transfer_buffer_length,
--			urb->actual_length);
-+		xhci_warn(xhci, "URB req %u and actual %u transfer length mismatch\n",
-+			  urb->transfer_buffer_length, urb->actual_length);
- 		urb->actual_length = 0;
--			*status = 0;
-+		*status = 0;
- 	}
- 	list_del_init(&td->td_list);
- 	/* Was this TD slated to be cancelled but completed anyway? */
- 	if (!list_empty(&td->cancelled_td_list))
- 		list_del_init(&td->cancelled_td_list);
- 
--	urb_priv->td_cnt++;
-+	inc_td_cnt(urb);
- 	/* Giveback the urb when all the tds are completed */
--	if (urb_priv->td_cnt == urb_priv->length) {
--		if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
--			xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
--			if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
--				if (xhci->quirks & XHCI_AMD_PLL_FIX)
--					usb_amd_quirk_pll_enable();
--			}
--		}
--		xhci_giveback_urb_locked(xhci, td, *status);
--	}
-+	if (last_td_in_urb(td)) {
-+		if ((urb->actual_length != urb->transfer_buffer_length &&
-+		     (urb->transfer_flags & URB_SHORT_NOT_OK)) ||
-+		    (*status != 0 && !usb_endpoint_xfer_isoc(&urb->ep->desc)))
-+			xhci_dbg(xhci, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
-+				 urb, urb->actual_length,
-+				 urb->transfer_buffer_length, *status);
- 
-+		/* set isoc urb status to 0 just as EHCI, UHCI, and OHCI */
-+		if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
-+			*status = 0;
-+		xhci_giveback_urb_in_irq(xhci, td, *status);
-+	}
- 	return 0;
- }
- 
diff --git a/patches.renesas/0289-usb-xhci-clean-up-error_bitmask-usage.patch b/patches.renesas/0289-usb-xhci-clean-up-error_bitmask-usage.patch
deleted file mode 100644
index 418f618b02b324..00000000000000
--- a/patches.renesas/0289-usb-xhci-clean-up-error_bitmask-usage.patch
+++ /dev/null
@@ -1,148 +0,0 @@
-From c7f48384d9c9da834ddb70cdc4d0d276c3ec7cf3 Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:25 +0200
-Subject: [PATCH 289/299] usb: xhci: clean up error_bitmask usage
-
-In xhci_handle_event(), when errors are detected, driver always sets
-a bit in error_bitmask (one member of the xhci private driver data).
-That means users have to retrieve and decode the value of error_bitmask
-in xhci private driver data if they want to know whether those erros
-ever happened in xhci_handle_event(). Otherwise, those errors are just
-ignored silently.
-
-This patch cleans up this by replacing the setting of error_bitmask
-with the kernel print functions, so that users can easily check and
-report the errors happened in xhci_handle_event().
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit f4c8f03ca31a9cf4c122780ea693d145658ba397)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   46 ++++++++++++++++++++-----------------------
- drivers/usb/host/xhci.h      |    2 -
- 2 files changed, 22 insertions(+), 26 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1239,7 +1239,7 @@ static void xhci_handle_cmd_nec_get_fw(s
- 		struct xhci_event_cmd *event)
- {
- 	if (!(xhci->quirks & XHCI_NEC_HOST)) {
--		xhci->error_bitmask |= 1 << 6;
-+		xhci_warn(xhci, "WARN NEC_GET_FW command on non-NEC host\n");
- 		return;
- 	}
- 	xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
-@@ -1342,14 +1342,13 @@ static void handle_cmd_completion(struct
- 	cmd_trb = xhci->cmd_ring->dequeue;
- 	cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
- 			cmd_trb);
--	/* Is the command ring deq ptr out of sync with the deq seg ptr? */
--	if (cmd_dequeue_dma == 0) {
--		xhci->error_bitmask |= 1 << 4;
--		return;
--	}
--	/* Does the DMA address match our internal dequeue pointer address? */
--	if (cmd_dma != (u64) cmd_dequeue_dma) {
--		xhci->error_bitmask |= 1 << 5;
-+	/*
-+	 * Check whether the completion event is for our internal kept
-+	 * command.
-+	 */
-+	if (!cmd_dequeue_dma || cmd_dma != (u64)cmd_dequeue_dma) {
-+		xhci_warn(xhci,
-+			  "ERROR mismatched command completion event\n");
- 		return;
- 	}
- 
-@@ -1438,7 +1437,7 @@ static void handle_cmd_completion(struct
- 		break;
- 	default:
- 		/* Skip over unknown commands on the event ring */
--		xhci->error_bitmask |= 1 << 6;
-+		xhci_info(xhci, "INFO unknown command type %d\n", cmd_type);
- 		break;
- 	}
- 
-@@ -1541,10 +1540,10 @@ static void handle_port_status(struct xh
- 	bool bogus_port_status = false;
- 
- 	/* Port status change events always have a successful completion code */
--	if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS) {
--		xhci_warn(xhci, "WARN: xHC returned failed port status event\n");
--		xhci->error_bitmask |= 1 << 8;
--	}
-+	if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS)
-+		xhci_warn(xhci,
-+			  "WARN: xHC returned failed port status event\n");
-+
- 	port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0]));
- 	xhci_dbg(xhci, "Port Status Change Event for port %d\n", port_id);
- 
-@@ -2547,18 +2546,17 @@ static int xhci_handle_event(struct xhci
- 	int update_ptrs = 1;
- 	int ret;
- 
-+	/* Event ring hasn't been allocated yet. */
- 	if (!xhci->event_ring || !xhci->event_ring->dequeue) {
--		xhci->error_bitmask |= 1 << 1;
--		return 0;
-+		xhci_err(xhci, "ERROR event ring not ready\n");
-+		return -ENOMEM;
- 	}
- 
- 	event = xhci->event_ring->dequeue;
- 	/* Does the HC or OS own the TRB? */
- 	if ((le32_to_cpu(event->event_cmd.flags) & TRB_CYCLE) !=
--	    xhci->event_ring->cycle_state) {
--		xhci->error_bitmask |= 1 << 2;
-+	    xhci->event_ring->cycle_state)
- 		return 0;
--	}
- 
- 	/*
- 	 * Barrier between reading the TRB_CYCLE (valid) flag above and any
-@@ -2566,7 +2564,7 @@ static int xhci_handle_event(struct xhci
- 	 */
- 	rmb();
- 	/* FIXME: Handle more event types. */
--	switch ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK)) {
-+	switch (le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) {
- 	case TRB_TYPE(TRB_COMPLETION):
- 		handle_cmd_completion(xhci, &event->event_cmd);
- 		break;
-@@ -2576,9 +2574,7 @@ static int xhci_handle_event(struct xhci
- 		break;
- 	case TRB_TYPE(TRB_TRANSFER):
- 		ret = handle_tx_event(xhci, &event->trans_event);
--		if (ret < 0)
--			xhci->error_bitmask |= 1 << 9;
--		else
-+		if (ret >= 0)
- 			update_ptrs = 0;
- 		break;
- 	case TRB_TYPE(TRB_DEV_NOTE):
-@@ -2589,7 +2585,9 @@ static int xhci_handle_event(struct xhci
- 		    TRB_TYPE(48))
- 			handle_vendor_event(xhci, event);
- 		else
--			xhci->error_bitmask |= 1 << 3;
-+			xhci_warn(xhci, "ERROR unknown event type %d\n",
-+				  TRB_FIELD_TO_TYPE(
-+				  le32_to_cpu(event->event_cmd.flags)));
- 	}
- 	/* Any of the above functions may drop and re-acquire the lock, so check
- 	 * to make sure a watchdog timer didn't mark the host as non-responsive.
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1618,8 +1618,6 @@ struct xhci_hcd {
- #define XHCI_STATE_DYING	(1 << 0)
- #define XHCI_STATE_HALTED	(1 << 1)
- #define XHCI_STATE_REMOVING	(1 << 2)
--	/* Statistics */
--	int			error_bitmask;
- 	unsigned int		quirks;
- #define	XHCI_LINK_TRB_QUIRK	(1 << 0)
- #define XHCI_RESET_EP_QUIRK	(1 << 1)
diff --git a/patches.renesas/0290-xhci-add-helper-to-get-the-endpoint-state-of-a-endpo.patch b/patches.renesas/0290-xhci-add-helper-to-get-the-endpoint-state-of-a-endpo.patch
deleted file mode 100644
index 2124395582918d..00000000000000
--- a/patches.renesas/0290-xhci-add-helper-to-get-the-endpoint-state-of-a-endpo.patch
+++ /dev/null
@@ -1,106 +0,0 @@
-From 8c420c9fedc7815be7e71feaa2b7b6fed838ada3 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:28 +0200
-Subject: [PATCH 290/299] xhci: add helper to get the endpoint state of a
- endpoint context
-
-define GET_EP_CTX_STATE() macro to get the endpoint state from a
-pointer to a le32 enpoint context structure
-
-No functional changes
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 5071e6b279178f7d25e1aebd23f49f686657a5fb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   18 ++++++------------
- drivers/usb/host/xhci.c      |    3 +--
- drivers/usb/host/xhci.h      |    2 ++
- 3 files changed, 9 insertions(+), 14 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1059,8 +1059,7 @@ static void xhci_handle_cmd_set_deq(stru
- 			break;
- 		case COMP_CTX_STATE:
- 			xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due to incorrect slot or ep state.\n");
--			ep_state = le32_to_cpu(ep_ctx->ep_info);
--			ep_state &= EP_STATE_MASK;
-+			ep_state = GET_EP_CTX_STATE(ep_ctx);
- 			slot_state = le32_to_cpu(slot_ctx->dev_state);
- 			slot_state = GET_SLOT_STATE(slot_state);
- 			xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
-@@ -1819,8 +1818,7 @@ static int xhci_requires_manual_halt_cle
- 		 * endpoint anyway.  Check if a babble halted the
- 		 * endpoint.
- 		 */
--		if ((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
--		    cpu_to_le32(EP_STATE_HALTED))
-+		if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_HALTED)
- 			return 1;
- 
- 	return 0;
-@@ -2269,9 +2267,7 @@ static int handle_tx_event(struct xhci_h
- 	ep = &xdev->eps[ep_index];
- 	ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
- 	ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
--	if (!ep_ring ||
--	    (le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
--	    EP_STATE_DISABLED) {
-+	if (!ep_ring ||  GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) {
- 		xhci_err(xhci, "ERROR Transfer event for disabled endpoint "
- 				"or incorrect stream ring\n");
- 		xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
-@@ -2832,8 +2828,7 @@ static int prepare_transfer(struct xhci_
- 		return -EINVAL;
- 	}
- 
--	ret = prepare_ring(xhci, ep_ring,
--			   le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK,
-+	ret = prepare_ring(xhci, ep_ring, GET_EP_CTX_STATE(ep_ctx),
- 			   num_trbs, mem_flags);
- 	if (ret)
- 		return ret;
-@@ -3729,7 +3724,7 @@ int xhci_queue_isoc_tx_prepare(struct xh
- 	/* Check the ring to guarantee there is enough room for the whole urb.
- 	 * Do not insert any td of the urb to the ring if the check failed.
- 	 */
--	ret = prepare_ring(xhci, ep_ring, le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK,
-+	ret = prepare_ring(xhci, ep_ring, GET_EP_CTX_STATE(ep_ctx),
- 			   num_trbs, mem_flags);
- 	if (ret)
- 		return ret;
-@@ -3742,8 +3737,7 @@ int xhci_queue_isoc_tx_prepare(struct xh
- 
- 	/* Calculate the start frame and put it in urb->start_frame. */
- 	if (HCC_CFC(xhci->hcc_params) && !list_empty(&ep_ring->td_list)) {
--		if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
--				EP_STATE_RUNNING) {
-+		if (GET_EP_CTX_STATE(ep_ctx) ==	EP_STATE_RUNNING) {
- 			urb->start_frame = xep->next_frame_id;
- 			goto skip_start_over;
- 		}
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -1682,8 +1682,7 @@ int xhci_drop_endpoint(struct usb_hcd *h
- 	/* If the HC already knows the endpoint is disabled,
- 	 * or the HCD has noted it is disabled, ignore this request
- 	 */
--	if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
--	     cpu_to_le32(EP_STATE_DISABLED)) ||
-+	if ((GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) ||
- 	    le32_to_cpu(ctrl_ctx->drop_flags) &
- 	    xhci_get_endpoint_flag(&ep->desc)) {
- 		/* Do not warn when called after a usb_device_reset */
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -713,6 +713,8 @@ struct xhci_ep_ctx {
- #define EP_STATE_HALTED		2
- #define EP_STATE_STOPPED	3
- #define EP_STATE_ERROR		4
-+#define GET_EP_CTX_STATE(ctx)	(le32_to_cpu((ctx)->ep_info) & EP_STATE_MASK)
-+
- /* Mult - Max number of burtst within an interval, in EP companion desc. */
- #define EP_MULT(p)		(((p) & 0x3) << 8)
- #define CTX_TO_EP_MULT(p)	(((p) >> 8) & 0x3)
diff --git a/patches.renesas/0291-usb-xhci-cleanup-cmd_completion-in-xhci_virt_device.patch b/patches.renesas/0291-usb-xhci-cleanup-cmd_completion-in-xhci_virt_device.patch
deleted file mode 100644
index 78f3ae9f558b91..00000000000000
--- a/patches.renesas/0291-usb-xhci-cleanup-cmd_completion-in-xhci_virt_device.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 39ecb6b98900bc33b14c7502462c69f48d0e5d61 Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:29 +0200
-Subject: [PATCH 291/299] usb: xhci: cleanup cmd_completion in xhci_virt_device
-
-cmd_completion in struct xhci_virt_device is legacy. With command
-structure and command queue introduced in xhci, cmd_completion is
-not used any more. This patch removes it.
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 228cfaea541824ac9bb0c83d957e8b34d631f58a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-mem.c |    1 -
- drivers/usb/host/xhci.h     |    1 -
- 2 files changed, 2 deletions(-)
-
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -1074,7 +1074,6 @@ int xhci_alloc_virt_device(struct xhci_h
- 		goto fail;
- 	dev->num_rings_cached = 0;
- 
--	init_completion(&dev->cmd_completion);
- 	dev->udev = udev;
- 
- 	/* Point to output device context in dcbaa. */
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -998,7 +998,6 @@ struct xhci_virt_device {
- 	int				num_rings_cached;
- #define	XHCI_MAX_RINGS_CACHED	31
- 	struct xhci_virt_ep		eps[31];
--	struct completion		cmd_completion;
- 	u8				fake_port;
- 	u8				real_port;
- 	struct xhci_interval_bw_table	*bw_table;
diff --git a/patches.renesas/0292-usb-xhci-remove-the-use-of-xhci-addr_dev.patch b/patches.renesas/0292-usb-xhci-remove-the-use-of-xhci-addr_dev.patch
deleted file mode 100644
index 8b846853f31d0a..00000000000000
--- a/patches.renesas/0292-usb-xhci-remove-the-use-of-xhci-addr_dev.patch
+++ /dev/null
@@ -1,122 +0,0 @@
-From b21483a406b1e5d743f73d79fe704f8883eab8a4 Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:30 +0200
-Subject: [PATCH 292/299] usb: xhci: remove the use of xhci->addr_dev
-
-xhci->addr_dev is used for the completion of both address device
-and enable slot commands. It's shared by enumerations of all USB
-devices connected to an xhci host. Hence, it's just a source for
-possible races. Since we've introduced command structure and the
-command queue to xhci driver.  It is time to get rid of addr_dev
-and use the completion in the command structure instead.
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 87e44f2aac8d45c1e48c94017942fa10037daae0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-mem.c |    1 -
- drivers/usb/host/xhci.c     |   18 ++++++++++--------
- drivers/usb/host/xhci.h     |    1 -
- 3 files changed, 10 insertions(+), 10 deletions(-)
-
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -2600,7 +2600,6 @@ int xhci_mem_init(struct xhci_hcd *xhci,
- 	 * something other than the default (~1ms minimum between interrupts).
- 	 * See section 5.5.1.2.
- 	 */
--	init_completion(&xhci->addr_dev);
- 	for (i = 0; i < MAX_HC_SLOTS; ++i)
- 		xhci->devs[i] = NULL;
- 	for (i = 0; i < USB_MAXCHILDREN; ++i) {
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -3719,20 +3719,19 @@ int xhci_alloc_dev(struct usb_hcd *hcd,
- 	int ret, slot_id;
- 	struct xhci_command *command;
- 
--	command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
-+	command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
- 	if (!command)
- 		return 0;
- 
- 	/* xhci->slot_id and xhci->addr_dev are not thread-safe */
- 	mutex_lock(&xhci->mutex);
- 	spin_lock_irqsave(&xhci->lock, flags);
--	command->completion = &xhci->addr_dev;
- 	ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
- 	if (ret) {
- 		spin_unlock_irqrestore(&xhci->lock, flags);
- 		mutex_unlock(&xhci->mutex);
- 		xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
--		kfree(command);
-+		xhci_free_command(xhci, command);
- 		return 0;
- 	}
- 	xhci_ring_cmd_db(xhci);
-@@ -3747,7 +3746,7 @@ int xhci_alloc_dev(struct usb_hcd *hcd,
- 		xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
- 				HCS_MAX_SLOTS(
- 					readl(&xhci->cap_regs->hcs_params1)));
--		kfree(command);
-+		xhci_free_command(xhci, command);
- 		return 0;
- 	}
- 
-@@ -3783,7 +3782,7 @@ int xhci_alloc_dev(struct usb_hcd *hcd,
- #endif
- 
- 
--	kfree(command);
-+	xhci_free_command(xhci, command);
- 	/* Is this a LS or FS device under a HS hub? */
- 	/* Hub or peripherial? */
- 	return 1;
-@@ -3791,6 +3790,7 @@ int xhci_alloc_dev(struct usb_hcd *hcd,
- disable_slot:
- 	/* Disable slot, if we can do it without mem alloc */
- 	spin_lock_irqsave(&xhci->lock, flags);
-+	kfree(command->completion);
- 	command->completion = NULL;
- 	command->status = 0;
- 	if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
-@@ -3854,14 +3854,13 @@ static int xhci_setup_device(struct usb_
- 		}
- 	}
- 
--	command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
-+	command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
- 	if (!command) {
- 		ret = -ENOMEM;
- 		goto out;
- 	}
- 
- 	command->in_ctx = virt_dev->in_ctx;
--	command->completion = &xhci->addr_dev;
- 
- 	slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
- 	ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
-@@ -3979,7 +3978,10 @@ static int xhci_setup_device(struct usb_
- 		       le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
- out:
- 	mutex_unlock(&xhci->mutex);
--	kfree(command);
-+	if (command) {
-+		kfree(command->completion);
-+		kfree(command);
-+	}
- 	return ret;
- }
- 
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1584,7 +1584,6 @@ struct xhci_hcd {
- 	/* slot enabling and address device helpers */
- 	/* these are not thread safe so use mutex */
- 	struct mutex mutex;
--	struct completion	addr_dev;
- 	int slot_id;
- 	/* For USB 3.0 LPM enable/disable. */
- 	struct xhci_command		*lpm_command;
diff --git a/patches.renesas/0293-usb-xhci-move-slot_id-from-xhci_hcd-to-xhci_command-.patch b/patches.renesas/0293-usb-xhci-move-slot_id-from-xhci_hcd-to-xhci_command-.patch
deleted file mode 100644
index 386c4dc1a62f9e..00000000000000
--- a/patches.renesas/0293-usb-xhci-move-slot_id-from-xhci_hcd-to-xhci_command-.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 085624b7b2edbb15ccba15437b5affc400adc1b0 Mon Sep 17 00:00:00 2001
-From: Lu Baolu <baolu.lu@linux.intel.com>
-Date: Fri, 11 Nov 2016 15:13:31 +0200
-Subject: [PATCH 293/299] usb: xhci: move slot_id from xhci_hcd to xhci_command
- structure
-
-xhci->slot_id is used for providing a way to pass slot id from the
-command completion handler to the function waiting for completion.
-It's shared by enumerations of all USB devices connected to an
-xhci host. Hence, it's a source for possible races. Since we've
-introduced command structure and the command queue to xhci driver.
-It's better to move slot_id from xhci_hcd structure to xhci_command
-structure. Hence the race source is removed.
-
-Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit c2d3d49bba0889f42e4753651d103f7ba74fbaf1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    8 ++++----
- drivers/usb/host/xhci.c      |    2 +-
- drivers/usb/host/xhci.h      |    2 +-
- 3 files changed, 6 insertions(+), 6 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1151,12 +1151,12 @@ static void xhci_handle_cmd_reset_ep(str
- }
- 
- static void xhci_handle_cmd_enable_slot(struct xhci_hcd *xhci, int slot_id,
--		u32 cmd_comp_code)
-+		struct xhci_command *command, u32 cmd_comp_code)
- {
- 	if (cmd_comp_code == COMP_SUCCESS)
--		xhci->slot_id = slot_id;
-+		command->slot_id = slot_id;
- 	else
--		xhci->slot_id = 0;
-+		command->slot_id = 0;
- }
- 
- static void xhci_handle_cmd_disable_slot(struct xhci_hcd *xhci, int slot_id)
-@@ -1389,7 +1389,7 @@ static void handle_cmd_completion(struct
- 	cmd_type = TRB_FIELD_TO_TYPE(le32_to_cpu(cmd_trb->generic.field[3]));
- 	switch (cmd_type) {
- 	case TRB_ENABLE_SLOT:
--		xhci_handle_cmd_enable_slot(xhci, slot_id, cmd_comp_code);
-+		xhci_handle_cmd_enable_slot(xhci, slot_id, cmd, cmd_comp_code);
- 		break;
- 	case TRB_DISABLE_SLOT:
- 		xhci_handle_cmd_disable_slot(xhci, slot_id);
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -3738,7 +3738,7 @@ int xhci_alloc_dev(struct usb_hcd *hcd,
- 	spin_unlock_irqrestore(&xhci->lock, flags);
- 
- 	wait_for_completion(command->completion);
--	slot_id = xhci->slot_id;
-+	slot_id = command->slot_id;
- 	mutex_unlock(&xhci->mutex);
- 
- 	if (!slot_id || command->status != COMP_SUCCESS) {
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -790,6 +790,7 @@ struct xhci_command {
- 	/* Input context for changing device state */
- 	struct xhci_container_ctx	*in_ctx;
- 	u32				status;
-+	int				slot_id;
- 	/* If completion is null, no one is waiting on this command
- 	 * and the structure can be freed after the command completes.
- 	 */
-@@ -1584,7 +1585,6 @@ struct xhci_hcd {
- 	/* slot enabling and address device helpers */
- 	/* these are not thread safe so use mutex */
- 	struct mutex mutex;
--	int slot_id;
- 	/* For USB 3.0 LPM enable/disable. */
- 	struct xhci_command		*lpm_command;
- 	/* Internal mirror of the HW's dcbaa */
diff --git a/patches.renesas/0294-xhci-Fix-race-related-to-abort-operation.patch b/patches.renesas/0294-xhci-Fix-race-related-to-abort-operation.patch
deleted file mode 100644
index 29ad938050df73..00000000000000
--- a/patches.renesas/0294-xhci-Fix-race-related-to-abort-operation.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 7879a8a1911d4c1e37a8270363c1a5ddcc6e0df6 Mon Sep 17 00:00:00 2001
-From: OGAWA Hirofumi <hirofumi@mail.parknet.co.jp>
-Date: Tue, 3 Jan 2017 18:28:51 +0200
-Subject: [PATCH 294/299] xhci: Fix race related to abort operation
-
-Current abort operation has race.
-
-    xhci_handle_command_timeout()
-      xhci_abort_cmd_ring()
-        xhci_write_64(CMD_RING_ABORT)
-        xhci_handshake(5s)
-	  do {
-	    check CMD_RING_RUNNING
-            udelay(1)
-					 ...
-					 COMP_CMD_ABORT event
-					 COMP_CMD_STOP event
-					 xhci_handle_stopped_cmd_ring()
-					   restart cmd_ring
-                                           CMD_RING_RUNNING become 1 again
-	  } while ()
-          return -ETIMEDOUT
-        xhci_write_64(CMD_RING_ABORT)
-        /* can abort random command */
-
-To do abort operation correctly, we have to wait both of COMP_CMD_STOP
-event and negation of CMD_RING_RUNNING.
-
-But like above, while timeout handler is waiting negation of
-CMD_RING_RUNNING, event handler can restart cmd_ring. So timeout
-handler never be notice negation of CMD_RING_RUNNING, and retry of
-CMD_RING_ABORT can abort random command (BTW, I guess retry of
-CMD_RING_ABORT was workaround of this race).
-
-To fix this race, this moves xhci_handle_stopped_cmd_ring() to
-xhci_abort_cmd_ring().  And timeout handler waits COMP_CMD_STOP event.
-
-At this point, timeout handler is owner of cmd_ring, and safely
-restart cmd_ring by using xhci_handle_stopped_cmd_ring().
-
-[FWIW, as bonus, this way would be easily extend to add CMD_RING_PAUSE
-operation]
-
-[locks edited as patch is rebased on other locking fixes -Mathias]
-Signed-off-by: OGAWA Hirofumi <hirofumi@mail.parknet.co.jp>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
-(cherry picked from commit 1c111b6c3844a142e03bcfc2fa17bfbdea08e9dc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -392,7 +392,6 @@ static int xhci_abort_cmd_ring(struct xh
- 	} else {
- 		xhci_handle_stopped_cmd_ring(xhci, xhci_next_queued_cmd(xhci));
- 	}
--
- 	return 0;
- }
- 
diff --git a/patches.renesas/0295-usb-host-xhci-handle-COMP_STOP-from-SETUP-phase-too.patch b/patches.renesas/0295-usb-host-xhci-handle-COMP_STOP-from-SETUP-phase-too.patch
deleted file mode 100644
index e7d3b117348c18..00000000000000
--- a/patches.renesas/0295-usb-host-xhci-handle-COMP_STOP-from-SETUP-phase-too.patch
+++ /dev/null
@@ -1,126 +0,0 @@
-From 8d8dd85e33b4672179e1eb06d3d516d6f81d2c46 Mon Sep 17 00:00:00 2001
-From: Felipe Balbi <felipe.balbi@linux.intel.com>
-Date: Tue, 3 Jan 2017 18:28:53 +0200
-Subject: [PATCH 295/299] usb: host: xhci: handle COMP_STOP from SETUP phase
- too
-
-Stop Endpoint command can come at any point and we
-have no control of that. We should make sure to
-handle COMP_STOP on SETUP phase as well, otherwise
-urb->actual_length might be set to negative values
-in some occasions such as below:
-
- urb->length = 4;
- build_control_transfer_td_for(urb, ep);
-
- 					stop_endpoint(ep);
-
-COMP_STOP:
-	[...]
-	urb->actual_length = urb->length - trb->length;
-
-trb->length is 8 for SETUP stage (8 control request
-bytes), so actual_length would be set to -4 in this
-case.
-
-While doing that, also make sure to use TRB_TYPE
-field of the actual TRB instead of matching pointers
-to figure out in which stage of the control transfer
-we got our completion event.
-
-Cc: <stable@vger.kernel.org>
-Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 29fc1aa454d0603493b47a8e2410ae6e9ab20258)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-ring.c |   33 +++++++++++++++++++++------------
- 1 file changed, 21 insertions(+), 12 deletions(-)
-
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1963,8 +1963,9 @@ static int process_ctrl_td(struct xhci_h
- 	struct xhci_ep_ctx *ep_ctx;
- 	u32 trb_comp_code;
- 	u32 remaining, requested;
--	bool on_data_stage;
-+	u32 trb_type;
- 
-+	trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(ep_trb->generic.field[3]));
- 	slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
- 	xdev = xhci->devs[slot_id];
- 	ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
-@@ -1974,14 +1975,11 @@ static int process_ctrl_td(struct xhci_h
- 	requested = td->urb->transfer_buffer_length;
- 	remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
- 
--	/* not setup (dequeue), or status stage means we are at data stage */
--	on_data_stage = (ep_trb != ep_ring->dequeue && ep_trb != td->last_trb);
--
- 	switch (trb_comp_code) {
- 	case COMP_SUCCESS:
--		if (ep_trb != td->last_trb) {
-+		if (trb_type != TRB_STATUS) {
- 			xhci_warn(xhci, "WARN: Success on ctrl %s TRB without IOC set?\n",
--				  on_data_stage ? "data" : "setup");
-+				  (trb_type == TRB_DATA) ? "data" : "setup");
- 			*status = -ESHUTDOWN;
- 			break;
- 		}
-@@ -1991,15 +1989,25 @@ static int process_ctrl_td(struct xhci_h
- 		*status = 0;
- 		break;
- 	case COMP_STOP_SHORT:
--		if (on_data_stage)
-+		if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
- 			td->urb->actual_length = remaining;
- 		else
- 			xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n");
- 		goto finish_td;
- 	case COMP_STOP:
--		if (on_data_stage)
-+		switch (trb_type) {
-+		case TRB_SETUP:
-+			td->urb->actual_length = 0;
-+			goto finish_td;
-+		case TRB_DATA:
-+		case TRB_NORMAL:
- 			td->urb->actual_length = requested - remaining;
--		goto finish_td;
-+			goto finish_td;
-+		default:
-+			xhci_warn(xhci, "WARN: unexpected TRB Type %d\n",
-+				  trb_type);
-+			goto finish_td;
-+		}
- 	case COMP_STOP_INVAL:
- 		goto finish_td;
- 	default:
-@@ -2011,7 +2019,7 @@ static int process_ctrl_td(struct xhci_h
- 		/* else fall through */
- 	case COMP_STALL:
- 		/* Did we transfer part of the data (middle) phase? */
--		if (on_data_stage)
-+		if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
- 			td->urb->actual_length = requested - remaining;
- 		else if (!td->urb_length_set)
- 			td->urb->actual_length = 0;
-@@ -2019,14 +2027,15 @@ static int process_ctrl_td(struct xhci_h
- 	}
- 
- 	/* stopped at setup stage, no data transferred */
--	if (ep_trb == ep_ring->dequeue)
-+	if (trb_type == TRB_SETUP)
- 		goto finish_td;
- 
- 	/*
- 	 * if on data stage then update the actual_length of the URB and flag it
- 	 * as set, so it won't be overwritten in the event for the last TRB.
- 	 */
--	if (on_data_stage) {
-+	if (trb_type == TRB_DATA ||
-+		trb_type == TRB_NORMAL) {
- 		td->urb_length_set = true;
- 		td->urb->actual_length = requested - remaining;
- 		xhci_dbg(xhci, "Waiting for status stage event\n");
diff --git a/patches.renesas/0296-xhci-remove-WARN_ON-if-dma-mask-is-not-set-for-platf.patch b/patches.renesas/0296-xhci-remove-WARN_ON-if-dma-mask-is-not-set-for-platf.patch
deleted file mode 100644
index 5630409e4023ff..00000000000000
--- a/patches.renesas/0296-xhci-remove-WARN_ON-if-dma-mask-is-not-set-for-platf.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 4d561a900c3907ea5bcc9bf8fbce27fd1c2fe5be Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 20 Jan 2017 15:38:24 +0200
-Subject: [PATCH 296/299] xhci: remove WARN_ON if dma mask is not set for
- platform devices
-
-The warn on is a bit too much, we will anyway set the dma mask if not set
-previously.
-
-The main reason for this fix is that 4.10-rc1  has a dwc3 change that
-pass a parent sysdev dev pointer instead of setting the dma mask of
-its xhci platform device. xhci platform driver can then get more
-attributes from the sysdev than just the dma mask.
-
-The usb core and xhci changes are not yet in 4.10, and a fix like
-this was preferred instead of taking those big changes this late in
-the rc-cycle.
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 488dc164914ff5ce5e913abd32048d28fc0d06b8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/xhci-plat.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/usb/host/xhci-plat.c
-+++ b/drivers/usb/host/xhci-plat.c
-@@ -165,7 +165,7 @@ static int xhci_plat_probe(struct platfo
- 		return irq;
- 
- 	/* Try to set 64-bit DMA first */
--	if (WARN_ON(!pdev->dev.dma_mask))
-+	if (!pdev->dev.dma_mask)
- 		/* Platform did not initialize dma_mask */
- 		ret = dma_coerce_mask_and_coherent(&pdev->dev,
- 						   DMA_BIT_MASK(64));
diff --git a/patches.renesas/0297-drm-dw_hdmi-use-of_get_i2c_adapter_by_node-interface.patch b/patches.renesas/0297-drm-dw_hdmi-use-of_get_i2c_adapter_by_node-interface.patch
deleted file mode 100644
index 06c29473d82039..00000000000000
--- a/patches.renesas/0297-drm-dw_hdmi-use-of_get_i2c_adapter_by_node-interface.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From cf2eeafdcd6c58ed5a24bf607d1cc3aec8c1497a Mon Sep 17 00:00:00 2001
-From: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
-Date: Tue, 16 Aug 2016 23:26:43 +0300
-Subject: [PATCH 297/299] drm: dw_hdmi: use of_get_i2c_adapter_by_node
- interface
-
-This change is needed to properly lock I2C bus driver, which serves
-DDC.
-
-The change fixes an overflow over zero of I2C bus driver user counter:
-
-  root@imx6q:~# lsmod
-  Not tainted
-  dw_hdmi_ahb_audio 4082 0 - Live 0xbf02c000
-  dw_hdmi_imx 3498 0 - Live 0xbf00d000
-  dw_hdmi 16398 2 dw_hdmi_ahb_audio,dw_hdmi_imx, Live 0xbf004000
-  i2c_imx 16687 0 - Live 0xbf017000
-
-  root@imx6q:~# rmmod dw_hdmi_imx
-  root@imx6q:~# lsmod
-  Not tainted
-  dw_hdmi_ahb_audio 4082 0 - Live 0xbf02c000
-  dw_hdmi 16398 1 dw_hdmi_ahb_audio, Live 0xbf004000
-  i2c_imx 16687 -1 - Live 0xbf017000
-                ^^
-
-  root@imx6q:~# rmmod i2c_imx
-  rmmod: ERROR: Module i2c_imx is in use
-
-Note that prior to this change put_device() coupled with
-of_find_i2c_adapter_by_node() was missing on error path of
-dw_hdmi_bind(), added i2c_put_adapter() there along with the change.
-
-Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
-Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
-Cc: Fabio Estevam <fabio.estevam@nxp.com>
-Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
-(cherry picked from commit 9f04a1f2b389a656486c1f9f918a3305569fba6a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/dw-hdmi.c |   14 +++++++++-----
- 1 file changed, 9 insertions(+), 5 deletions(-)
-
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -1681,7 +1681,7 @@ int dw_hdmi_bind(struct device *dev, str
- 
- 	ddc_node = of_parse_phandle(np, "ddc-i2c-bus", 0);
- 	if (ddc_node) {
--		hdmi->ddc = of_find_i2c_adapter_by_node(ddc_node);
-+		hdmi->ddc = of_get_i2c_adapter_by_node(ddc_node);
- 		of_node_put(ddc_node);
- 		if (!hdmi->ddc) {
- 			dev_dbg(hdmi->dev, "failed to read ddc node\n");
-@@ -1693,20 +1693,22 @@ int dw_hdmi_bind(struct device *dev, str
- 	}
- 
- 	hdmi->regs = devm_ioremap_resource(dev, iores);
--	if (IS_ERR(hdmi->regs))
--		return PTR_ERR(hdmi->regs);
-+	if (IS_ERR(hdmi->regs)) {
-+		ret = PTR_ERR(hdmi->regs);
-+		goto err_res;
-+	}
- 
- 	hdmi->isfr_clk = devm_clk_get(hdmi->dev, "isfr");
- 	if (IS_ERR(hdmi->isfr_clk)) {
- 		ret = PTR_ERR(hdmi->isfr_clk);
- 		dev_err(hdmi->dev, "Unable to get HDMI isfr clk: %d\n", ret);
--		return ret;
-+		goto err_res;
- 	}
- 
- 	ret = clk_prepare_enable(hdmi->isfr_clk);
- 	if (ret) {
- 		dev_err(hdmi->dev, "Cannot enable HDMI isfr clock: %d\n", ret);
--		return ret;
-+		goto err_res;
- 	}
- 
- 	hdmi->iahb_clk = devm_clk_get(hdmi->dev, "iahb");
-@@ -1792,6 +1794,8 @@ err_iahb:
- 	clk_disable_unprepare(hdmi->iahb_clk);
- err_isfr:
- 	clk_disable_unprepare(hdmi->isfr_clk);
-+err_res:
-+	i2c_put_adapter(hdmi->ddc);
- 
- 	return ret;
- }
diff --git a/patches.renesas/0298-drm-bridge-dw_hdmi-add-dw-hdmi-i2c-bus-adapter-suppo.patch b/patches.renesas/0298-drm-bridge-dw_hdmi-add-dw-hdmi-i2c-bus-adapter-suppo.patch
deleted file mode 100644
index 6dcb0120b5bdda..00000000000000
--- a/patches.renesas/0298-drm-bridge-dw_hdmi-add-dw-hdmi-i2c-bus-adapter-suppo.patch
+++ /dev/null
@@ -1,426 +0,0 @@
-From 72e05d201c4c0873d79ca1b5ebadd4dace751cbc Mon Sep 17 00:00:00 2001
-From: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
-Date: Wed, 24 Aug 2016 08:46:37 +0300
-Subject: [PATCH 298/299] drm: bridge/dw_hdmi: add dw hdmi i2c bus adapter
- support
-
-The change adds support of internal HDMI I2C master controller, this
-subdevice is used by default, if "ddc-i2c-bus" DT property is omitted.
-
-The main purpose of this functionality is to support reading EDID from
-an HDMI monitor on boards, which don't have an I2C bus connected to
-DDC pins.
-
-The current implementation does not support "I2C Master Interface
-Extended Read Mode" to read data addressed by non-zero segment
-pointer, this means that if EDID has more than 1 extension blocks,
-EDID reading operation won't succeed, in my practice all tested HDMI
-monitors have at maximum one extension block.
-
-Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Tested-by: Philipp Zabel <p.zabel@pengutronix.de>
-Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
-(cherry picked from commit 3efc2fa3b777e65e344a7612d38a8278e78a0514)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt |    4 
- drivers/gpu/drm/bridge/dw-hdmi.c                             |  265 ++++++++++-
- drivers/gpu/drm/bridge/dw-hdmi.h                             |   19 
- 3 files changed, 281 insertions(+), 7 deletions(-)
-
---- a/Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt
-+++ b/Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt
-@@ -19,7 +19,9 @@ Required properties:
- 
- Optional properties
- - reg-io-width: the width of the reg:1,4, default set to 1 if not present
--- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
-+- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing,
-+  if the property is omitted, a functionally reduced I2C bus
-+  controller on DW HDMI is probed
- - clocks, clock-names: phandle to the HDMI CEC clock, name should be "cec"
- 
- Example:
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -1,14 +1,15 @@
- /*
-+ * DesignWare High-Definition Multimedia Interface (HDMI) driver
-+ *
-+ * Copyright (C) 2013-2015 Mentor Graphics Inc.
-  * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
-+ * Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-  *
-  * This program is free software; you can redistribute it and/or modify
-  * it under the terms of the GNU General Public License as published by
-  * the Free Software Foundation; either version 2 of the License, or
-  * (at your option) any later version.
-  *
-- * Designware High-Definition Multimedia Interface (HDMI) driver
-- *
-- * Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-  */
- #include <linux/module.h>
- #include <linux/irq.h>
-@@ -101,6 +102,17 @@ struct hdmi_data_info {
- 	struct hdmi_vmode video_mode;
- };
- 
-+struct dw_hdmi_i2c {
-+	struct i2c_adapter	adap;
-+
-+	struct mutex		lock;	/* used to serialize data transfers */
-+	struct completion	cmp;
-+	u8			stat;
-+
-+	u8			slave_reg;
-+	bool			is_regaddr;
-+};
-+
- struct dw_hdmi {
- 	struct drm_connector connector;
- 	struct drm_encoder *encoder;
-@@ -111,6 +123,7 @@ struct dw_hdmi {
- 	struct device *dev;
- 	struct clk *isfr_clk;
- 	struct clk *iahb_clk;
-+	struct dw_hdmi_i2c *i2c;
- 
- 	struct hdmi_data_info hdmi_data;
- 	const struct dw_hdmi_plat_data *plat_data;
-@@ -198,6 +211,201 @@ static void hdmi_mask_writeb(struct dw_h
- 	hdmi_modb(hdmi, data << shift, mask, reg);
- }
- 
-+static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi)
-+{
-+	/* Software reset */
-+	hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
-+
-+	/* Set Standard Mode speed (determined to be 100KHz on iMX6) */
-+	hdmi_writeb(hdmi, 0x00, HDMI_I2CM_DIV);
-+
-+	/* Set done, not acknowledged and arbitration interrupt polarities */
-+	hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
-+	hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL | HDMI_I2CM_CTLINT_ARB_POL,
-+		    HDMI_I2CM_CTLINT);
-+
-+	/* Clear DONE and ERROR interrupts */
-+	hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
-+		    HDMI_IH_I2CM_STAT0);
-+
-+	/* Mute DONE and ERROR interrupts */
-+	hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
-+		    HDMI_IH_MUTE_I2CM_STAT0);
-+}
-+
-+static int dw_hdmi_i2c_read(struct dw_hdmi *hdmi,
-+			    unsigned char *buf, unsigned int length)
-+{
-+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
-+	int stat;
-+
-+	if (!i2c->is_regaddr) {
-+		dev_dbg(hdmi->dev, "set read register address to 0\n");
-+		i2c->slave_reg = 0x00;
-+		i2c->is_regaddr = true;
-+	}
-+
-+	while (length--) {
-+		reinit_completion(&i2c->cmp);
-+
-+		hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
-+		hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ,
-+			    HDMI_I2CM_OPERATION);
-+
-+		stat = wait_for_completion_timeout(&i2c->cmp, HZ / 10);
-+		if (!stat)
-+			return -EAGAIN;
-+
-+		/* Check for error condition on the bus */
-+		if (i2c->stat & HDMI_IH_I2CM_STAT0_ERROR)
-+			return -EIO;
-+
-+		*buf++ = hdmi_readb(hdmi, HDMI_I2CM_DATAI);
-+	}
-+
-+	return 0;
-+}
-+
-+static int dw_hdmi_i2c_write(struct dw_hdmi *hdmi,
-+			     unsigned char *buf, unsigned int length)
-+{
-+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
-+	int stat;
-+
-+	if (!i2c->is_regaddr) {
-+		/* Use the first write byte as register address */
-+		i2c->slave_reg = buf[0];
-+		length--;
-+		buf++;
-+		i2c->is_regaddr = true;
-+	}
-+
-+	while (length--) {
-+		reinit_completion(&i2c->cmp);
-+
-+		hdmi_writeb(hdmi, *buf++, HDMI_I2CM_DATAO);
-+		hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
-+		hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_WRITE,
-+			    HDMI_I2CM_OPERATION);
-+
-+		stat = wait_for_completion_timeout(&i2c->cmp, HZ / 10);
-+		if (!stat)
-+			return -EAGAIN;
-+
-+		/* Check for error condition on the bus */
-+		if (i2c->stat & HDMI_IH_I2CM_STAT0_ERROR)
-+			return -EIO;
-+	}
-+
-+	return 0;
-+}
-+
-+static int dw_hdmi_i2c_xfer(struct i2c_adapter *adap,
-+			    struct i2c_msg *msgs, int num)
-+{
-+	struct dw_hdmi *hdmi = i2c_get_adapdata(adap);
-+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
-+	u8 addr = msgs[0].addr;
-+	int i, ret = 0;
-+
-+	dev_dbg(hdmi->dev, "xfer: num: %d, addr: %#x\n", num, addr);
-+
-+	for (i = 0; i < num; i++) {
-+		if (msgs[i].addr != addr) {
-+			dev_warn(hdmi->dev,
-+				 "unsupported transfer, changed slave address\n");
-+			return -EOPNOTSUPP;
-+		}
-+
-+		if (msgs[i].len == 0) {
-+			dev_dbg(hdmi->dev,
-+				"unsupported transfer %d/%d, no data\n",
-+				i + 1, num);
-+			return -EOPNOTSUPP;
-+		}
-+	}
-+
-+	mutex_lock(&i2c->lock);
-+
-+	/* Unmute DONE and ERROR interrupts */
-+	hdmi_writeb(hdmi, 0x00, HDMI_IH_MUTE_I2CM_STAT0);
-+
-+	/* Set slave device address taken from the first I2C message */
-+	hdmi_writeb(hdmi, addr, HDMI_I2CM_SLAVE);
-+
-+	/* Set slave device register address on transfer */
-+	i2c->is_regaddr = false;
-+
-+	for (i = 0; i < num; i++) {
-+		dev_dbg(hdmi->dev, "xfer: num: %d/%d, len: %d, flags: %#x\n",
-+			i + 1, num, msgs[i].len, msgs[i].flags);
-+
-+		if (msgs[i].flags & I2C_M_RD)
-+			ret = dw_hdmi_i2c_read(hdmi, msgs[i].buf, msgs[i].len);
-+		else
-+			ret = dw_hdmi_i2c_write(hdmi, msgs[i].buf, msgs[i].len);
-+
-+		if (ret < 0)
-+			break;
-+	}
-+
-+	if (!ret)
-+		ret = num;
-+
-+	/* Mute DONE and ERROR interrupts */
-+	hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
-+		    HDMI_IH_MUTE_I2CM_STAT0);
-+
-+	mutex_unlock(&i2c->lock);
-+
-+	return ret;
-+}
-+
-+static u32 dw_hdmi_i2c_func(struct i2c_adapter *adapter)
-+{
-+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
-+}
-+
-+static const struct i2c_algorithm dw_hdmi_algorithm = {
-+	.master_xfer	= dw_hdmi_i2c_xfer,
-+	.functionality	= dw_hdmi_i2c_func,
-+};
-+
-+static struct i2c_adapter *dw_hdmi_i2c_adapter(struct dw_hdmi *hdmi)
-+{
-+	struct i2c_adapter *adap;
-+	struct dw_hdmi_i2c *i2c;
-+	int ret;
-+
-+	i2c = devm_kzalloc(hdmi->dev, sizeof(*i2c), GFP_KERNEL);
-+	if (!i2c)
-+		return ERR_PTR(-ENOMEM);
-+
-+	mutex_init(&i2c->lock);
-+	init_completion(&i2c->cmp);
-+
-+	adap = &i2c->adap;
-+	adap->class = I2C_CLASS_DDC;
-+	adap->owner = THIS_MODULE;
-+	adap->dev.parent = hdmi->dev;
-+	adap->algo = &dw_hdmi_algorithm;
-+	strlcpy(adap->name, "DesignWare HDMI", sizeof(adap->name));
-+	i2c_set_adapdata(adap, hdmi);
-+
-+	ret = i2c_add_adapter(adap);
-+	if (ret) {
-+		dev_warn(hdmi->dev, "cannot add %s I2C adapter\n", adap->name);
-+		devm_kfree(hdmi->dev, i2c);
-+		return ERR_PTR(ret);
-+	}
-+
-+	hdmi->i2c = i2c;
-+
-+	dev_info(hdmi->dev, "registered %s I2C bus driver\n", adap->name);
-+
-+	return adap;
-+}
-+
- static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts,
- 			   unsigned int n)
- {
-@@ -1512,16 +1720,40 @@ static const struct drm_bridge_funcs dw_
- 	.mode_set = dw_hdmi_bridge_mode_set,
- };
- 
-+static irqreturn_t dw_hdmi_i2c_irq(struct dw_hdmi *hdmi)
-+{
-+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
-+	unsigned int stat;
-+
-+	stat = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
-+	if (!stat)
-+		return IRQ_NONE;
-+
-+	hdmi_writeb(hdmi, stat, HDMI_IH_I2CM_STAT0);
-+
-+	i2c->stat = stat;
-+
-+	complete(&i2c->cmp);
-+
-+	return IRQ_HANDLED;
-+}
-+
- static irqreturn_t dw_hdmi_hardirq(int irq, void *dev_id)
- {
- 	struct dw_hdmi *hdmi = dev_id;
- 	u8 intr_stat;
-+	irqreturn_t ret = IRQ_NONE;
-+
-+	if (hdmi->i2c)
-+		ret = dw_hdmi_i2c_irq(hdmi);
- 
- 	intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0);
--	if (intr_stat)
-+	if (intr_stat) {
- 		hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0);
-+		return IRQ_WAKE_THREAD;
-+	}
- 
--	return intr_stat ? IRQ_WAKE_THREAD : IRQ_NONE;
-+	return ret;
- }
- 
- static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
-@@ -1746,6 +1978,13 @@ int dw_hdmi_bind(struct device *dev, str
- 	 */
- 	hdmi_init_clk_regenerator(hdmi);
- 
-+	/* If DDC bus is not specified, try to register HDMI I2C bus */
-+	if (!hdmi->ddc) {
-+		hdmi->ddc = dw_hdmi_i2c_adapter(hdmi);
-+		if (IS_ERR(hdmi->ddc))
-+			hdmi->ddc = NULL;
-+	}
-+
- 	/*
- 	 * Configure registers related to HDMI interrupt
- 	 * generation before registering IRQ.
-@@ -1786,11 +2025,20 @@ int dw_hdmi_bind(struct device *dev, str
- 		hdmi->audio = platform_device_register_full(&pdevinfo);
- 	}
- 
-+	/* Reset HDMI DDC I2C master controller and mute I2CM interrupts */
-+	if (hdmi->i2c)
-+		dw_hdmi_i2c_init(hdmi);
-+
- 	dev_set_drvdata(dev, hdmi);
- 
- 	return 0;
- 
- err_iahb:
-+	if (hdmi->i2c) {
-+		i2c_del_adapter(&hdmi->i2c->adap);
-+		hdmi->ddc = NULL;
-+	}
-+
- 	clk_disable_unprepare(hdmi->iahb_clk);
- err_isfr:
- 	clk_disable_unprepare(hdmi->isfr_clk);
-@@ -1813,13 +2061,18 @@ void dw_hdmi_unbind(struct device *dev,
- 
- 	clk_disable_unprepare(hdmi->iahb_clk);
- 	clk_disable_unprepare(hdmi->isfr_clk);
--	i2c_put_adapter(hdmi->ddc);
-+
-+	if (hdmi->i2c)
-+		i2c_del_adapter(&hdmi->i2c->adap);
-+	else
-+		i2c_put_adapter(hdmi->ddc);
- }
- EXPORT_SYMBOL_GPL(dw_hdmi_unbind);
- 
- MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
- MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
- MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
-+MODULE_AUTHOR("Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>");
- MODULE_DESCRIPTION("DW HDMI transmitter driver");
- MODULE_LICENSE("GPL");
- MODULE_ALIAS("platform:dw-hdmi");
---- a/drivers/gpu/drm/bridge/dw-hdmi.h
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.h
-@@ -566,6 +566,10 @@ enum {
- 	HDMI_IH_PHY_STAT0_TX_PHY_LOCK = 0x2,
- 	HDMI_IH_PHY_STAT0_HPD = 0x1,
- 
-+/* IH_I2CM_STAT0 and IH_MUTE_I2CM_STAT0 field values */
-+	HDMI_IH_I2CM_STAT0_DONE = 0x2,
-+	HDMI_IH_I2CM_STAT0_ERROR = 0x1,
-+
- /* IH_MUTE_I2CMPHY_STAT0 field values */
- 	HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYDONE = 0x2,
- 	HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYERROR = 0x1,
-@@ -1032,6 +1036,21 @@ enum {
- 	HDMI_A_VIDPOLCFG_HSYNCPOL_MASK = 0x2,
- 	HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_HIGH = 0x2,
- 	HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0,
-+
-+/* I2CM_OPERATION field values */
-+	HDMI_I2CM_OPERATION_WRITE = 0x10,
-+	HDMI_I2CM_OPERATION_READ_EXT = 0x2,
-+	HDMI_I2CM_OPERATION_READ = 0x1,
-+
-+/* I2CM_INT field values */
-+	HDMI_I2CM_INT_DONE_POL = 0x8,
-+	HDMI_I2CM_INT_DONE_MASK = 0x4,
-+
-+/* I2CM_CTLINT field values */
-+	HDMI_I2CM_CTLINT_NAC_POL = 0x80,
-+	HDMI_I2CM_CTLINT_NAC_MASK = 0x40,
-+	HDMI_I2CM_CTLINT_ARB_POL = 0x8,
-+	HDMI_I2CM_CTLINT_ARB_MASK = 0x4,
- };
- 
- #endif /* __DW_HDMI_H__ */
diff --git a/patches.renesas/0299-drm-bridge-add-DesignWare-HDMI-I2S-audio-support.patch b/patches.renesas/0299-drm-bridge-add-DesignWare-HDMI-I2S-audio-support.patch
deleted file mode 100644
index 1b3e9b7bf35c86..00000000000000
--- a/patches.renesas/0299-drm-bridge-add-DesignWare-HDMI-I2S-audio-support.patch
+++ /dev/null
@@ -1,303 +0,0 @@
-From e629b8e80ed3dc7817ba8a92d4d8098bc5fdbe65 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 8 Nov 2016 01:00:57 +0000
-Subject: [PATCH 299/299] drm: bridge: add DesignWare HDMI I2S audio support
-
-Current dw-hdmi is supporting sound via AHB bus, but it has
-I2S audio feature too. This patch adds I2S audio support to dw-hdmi.
-This HDMI I2S is supported by using ALSA SoC common HDMI encoder
-driver.
-
-Tested-by: Jose Abreu <joabreu@synopsys.com>
-Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Archit Taneja <architt@codeaurora.org>
-Link: http://patchwork.freedesktop.org/patch/msgid/8737j2bxba.wl%kuninori.morimoto.gx@renesas.com
-(cherry picked from commit 2761ba6c0925ca9c5b917a95f68135d9dce443fb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/bridge/Kconfig             |    8 +
- drivers/gpu/drm/bridge/Makefile            |    1 
- drivers/gpu/drm/bridge/dw-hdmi-audio.h     |    7 +
- drivers/gpu/drm/bridge/dw-hdmi-i2s-audio.c |  141 +++++++++++++++++++++++++++++
- drivers/gpu/drm/bridge/dw-hdmi.c           |   22 ++++
- drivers/gpu/drm/bridge/dw-hdmi.h           |   20 ++++
- 6 files changed, 197 insertions(+), 2 deletions(-)
- create mode 100644 drivers/gpu/drm/bridge/dw-hdmi-i2s-audio.c
-
---- a/drivers/gpu/drm/bridge/Kconfig
-+++ b/drivers/gpu/drm/bridge/Kconfig
-@@ -39,6 +39,14 @@ config DRM_DW_HDMI_AHB_AUDIO
- 	  Designware HDMI block.  This is used in conjunction with
- 	  the i.MX6 HDMI driver.
- 
-+config DRM_DW_HDMI_I2S_AUDIO
-+	tristate "Synopsis Designware I2S Audio interface"
-+	depends on DRM_DW_HDMI
-+	select SND_SOC_HDMI_CODEC
-+	help
-+	  Support the I2S Audio interface which is part of the Synopsis
-+	  Designware HDMI block.
-+
- config DRM_NXP_PTN3460
- 	tristate "NXP PTN3460 DP/LVDS bridge"
- 	depends on OF
---- a/drivers/gpu/drm/bridge/Makefile
-+++ b/drivers/gpu/drm/bridge/Makefile
-@@ -4,6 +4,7 @@ obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += an
- obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
- obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
- obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
-+obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
- obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
- obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
- obj-$(CONFIG_DRM_SII902X) += sii902x.o
---- a/drivers/gpu/drm/bridge/dw-hdmi-audio.h
-+++ b/drivers/gpu/drm/bridge/dw-hdmi-audio.h
-@@ -11,4 +11,11 @@ struct dw_hdmi_audio_data {
- 	u8 *eld;
- };
- 
-+struct dw_hdmi_i2s_audio_data {
-+	struct dw_hdmi *hdmi;
-+
-+	void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
-+	u8 (*read)(struct dw_hdmi *hdmi, int offset);
-+};
-+
- #endif
---- /dev/null
-+++ b/drivers/gpu/drm/bridge/dw-hdmi-i2s-audio.c
-@@ -0,0 +1,141 @@
-+/*
-+ * dw-hdmi-i2s-audio.c
-+ *
-+ * Copyright (c) 2016 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <drm/bridge/dw_hdmi.h>
-+
-+#include <sound/hdmi-codec.h>
-+
-+#include "dw-hdmi.h"
-+#include "dw-hdmi-audio.h"
-+
-+#define DRIVER_NAME "dw-hdmi-i2s-audio"
-+
-+static inline void hdmi_write(struct dw_hdmi_i2s_audio_data *audio,
-+			      u8 val, int offset)
-+{
-+	struct dw_hdmi *hdmi = audio->hdmi;
-+
-+	audio->write(hdmi, val, offset);
-+}
-+
-+static inline u8 hdmi_read(struct dw_hdmi_i2s_audio_data *audio, int offset)
-+{
-+	struct dw_hdmi *hdmi = audio->hdmi;
-+
-+	return audio->read(hdmi, offset);
-+}
-+
-+static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
-+				 struct hdmi_codec_daifmt *fmt,
-+				 struct hdmi_codec_params *hparms)
-+{
-+	struct dw_hdmi_i2s_audio_data *audio = data;
-+	struct dw_hdmi *hdmi = audio->hdmi;
-+	u8 conf0 = 0;
-+	u8 conf1 = 0;
-+	u8 inputclkfs = 0;
-+
-+	/* it cares I2S only */
-+	if ((fmt->fmt != HDMI_I2S) ||
-+	    (fmt->bit_clk_master | fmt->frame_clk_master)) {
-+		dev_err(dev, "unsupported format/settings\n");
-+		return -EINVAL;
-+	}
-+
-+	inputclkfs	= HDMI_AUD_INPUTCLKFS_64FS;
-+	conf0		= HDMI_AUD_CONF0_I2S_ALL_ENABLE;
-+
-+	switch (hparms->sample_width) {
-+	case 16:
-+		conf1 = HDMI_AUD_CONF1_WIDTH_16;
-+		break;
-+	case 24:
-+	case 32:
-+		conf1 = HDMI_AUD_CONF1_WIDTH_24;
-+		break;
-+	}
-+
-+	dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate);
-+
-+	hdmi_write(audio, inputclkfs, HDMI_AUD_INPUTCLKFS);
-+	hdmi_write(audio, conf0, HDMI_AUD_CONF0);
-+	hdmi_write(audio, conf1, HDMI_AUD_CONF1);
-+
-+	dw_hdmi_audio_enable(hdmi);
-+
-+	return 0;
-+}
-+
-+static void dw_hdmi_i2s_audio_shutdown(struct device *dev, void *data)
-+{
-+	struct dw_hdmi_i2s_audio_data *audio = data;
-+	struct dw_hdmi *hdmi = audio->hdmi;
-+
-+	dw_hdmi_audio_disable(hdmi);
-+
-+	hdmi_write(audio, HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0);
-+}
-+
-+static struct hdmi_codec_ops dw_hdmi_i2s_ops = {
-+	.hw_params	= dw_hdmi_i2s_hw_params,
-+	.audio_shutdown	= dw_hdmi_i2s_audio_shutdown,
-+};
-+
-+static int snd_dw_hdmi_probe(struct platform_device *pdev)
-+{
-+	struct dw_hdmi_i2s_audio_data *audio = pdev->dev.platform_data;
-+	struct platform_device_info pdevinfo;
-+	struct hdmi_codec_pdata pdata;
-+	struct platform_device *platform;
-+
-+	pdata.ops		= &dw_hdmi_i2s_ops;
-+	pdata.i2s		= 1;
-+	pdata.max_i2s_channels	= 6;
-+	pdata.data		= audio;
-+
-+	memset(&pdevinfo, 0, sizeof(pdevinfo));
-+	pdevinfo.parent		= pdev->dev.parent;
-+	pdevinfo.id		= PLATFORM_DEVID_AUTO;
-+	pdevinfo.name		= HDMI_CODEC_DRV_NAME;
-+	pdevinfo.data		= &pdata;
-+	pdevinfo.size_data	= sizeof(pdata);
-+	pdevinfo.dma_mask	= DMA_BIT_MASK(32);
-+
-+	platform = platform_device_register_full(&pdevinfo);
-+	if (IS_ERR(platform))
-+		return PTR_ERR(platform);
-+
-+	dev_set_drvdata(&pdev->dev, platform);
-+
-+	return 0;
-+}
-+
-+static int snd_dw_hdmi_remove(struct platform_device *pdev)
-+{
-+	struct platform_device *platform = dev_get_drvdata(&pdev->dev);
-+
-+	platform_device_unregister(platform);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver snd_dw_hdmi_driver = {
-+	.probe	= snd_dw_hdmi_probe,
-+	.remove	= snd_dw_hdmi_remove,
-+	.driver	= {
-+		.name = DRIVER_NAME,
-+		.owner = THIS_MODULE,
-+	},
-+};
-+module_platform_driver(snd_dw_hdmi_driver);
-+
-+MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
-+MODULE_DESCRIPTION("Synopsis Designware HDMI I2S ALSA SoC interface");
-+MODULE_LICENSE("GPL v2");
-+MODULE_ALIAS("platform:" DRIVER_NAME);
---- a/drivers/gpu/drm/bridge/dw-hdmi.c
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
-@@ -1871,10 +1871,11 @@ int dw_hdmi_bind(struct device *dev, str
- 	struct device_node *np = dev->of_node;
- 	struct platform_device_info pdevinfo;
- 	struct device_node *ddc_node;
--	struct dw_hdmi_audio_data audio;
- 	struct dw_hdmi *hdmi;
- 	int ret;
- 	u32 val = 1;
-+	u8 config0;
-+	u8 config1;
- 
- 	hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
- 	if (!hdmi)
-@@ -2011,7 +2012,12 @@ int dw_hdmi_bind(struct device *dev, str
- 	pdevinfo.parent = dev;
- 	pdevinfo.id = PLATFORM_DEVID_AUTO;
- 
--	if (hdmi_readb(hdmi, HDMI_CONFIG1_ID) & HDMI_CONFIG1_AHB) {
-+	config0 = hdmi_readb(hdmi, HDMI_CONFIG0_ID);
-+	config1 = hdmi_readb(hdmi, HDMI_CONFIG1_ID);
-+
-+	if (config1 & HDMI_CONFIG1_AHB) {
-+		struct dw_hdmi_audio_data audio;
-+
- 		audio.phys = iores->start;
- 		audio.base = hdmi->regs;
- 		audio.irq = irq;
-@@ -2022,6 +2028,18 @@ int dw_hdmi_bind(struct device *dev, str
- 		pdevinfo.data = &audio;
- 		pdevinfo.size_data = sizeof(audio);
- 		pdevinfo.dma_mask = DMA_BIT_MASK(32);
-+		hdmi->audio = platform_device_register_full(&pdevinfo);
-+	} else if (config0 & HDMI_CONFIG0_I2S) {
-+		struct dw_hdmi_i2s_audio_data audio;
-+
-+		audio.hdmi	= hdmi;
-+		audio.write	= hdmi_writeb;
-+		audio.read	= hdmi_readb;
-+
-+		pdevinfo.name = "dw-hdmi-i2s-audio";
-+		pdevinfo.data = &audio;
-+		pdevinfo.size_data = sizeof(audio);
-+		pdevinfo.dma_mask = DMA_BIT_MASK(32);
- 		hdmi->audio = platform_device_register_full(&pdevinfo);
- 	}
- 
---- a/drivers/gpu/drm/bridge/dw-hdmi.h
-+++ b/drivers/gpu/drm/bridge/dw-hdmi.h
-@@ -545,6 +545,9 @@
- #define HDMI_I2CM_FS_SCL_LCNT_0_ADDR            0x7E12
- 
- enum {
-+/* CONFIG0_ID field values */
-+	HDMI_CONFIG0_I2S = 0x10,
-+
- /* CONFIG1_ID field values */
- 	HDMI_CONFIG1_AHB = 0x01,
- 
-@@ -891,6 +894,17 @@ enum {
- 	HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08,
- 	HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_MASK = 0x04,
- 
-+/* AUD_CONF0 field values */
-+	HDMI_AUD_CONF0_SW_RESET = 0x80,
-+	HDMI_AUD_CONF0_I2S_ALL_ENABLE = 0x2F,
-+
-+/* AUD_CONF1 field values */
-+	HDMI_AUD_CONF1_MODE_I2S = 0x00,
-+	HDMI_AUD_CONF1_MODE_RIGHT_J = 0x02,
-+	HDMI_AUD_CONF1_MODE_LEFT_J = 0x04,
-+	HDMI_AUD_CONF1_WIDTH_16 = 0x10,
-+	HDMI_AUD_CONF1_WIDTH_24 = 0x18,
-+
- /* AUD_CTS3 field values */
- 	HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5,
- 	HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0,
-@@ -905,6 +919,12 @@ enum {
- 	HDMI_AUD_CTS3_CTS_MANUAL = 0x10,
- 	HDMI_AUD_CTS3_AUDCTS19_16_MASK = 0x0f,
- 
-+/* HDMI_AUD_INPUTCLKFS field values */
-+	HDMI_AUD_INPUTCLKFS_128FS = 0,
-+	HDMI_AUD_INPUTCLKFS_256FS = 1,
-+	HDMI_AUD_INPUTCLKFS_512FS = 2,
-+	HDMI_AUD_INPUTCLKFS_64FS = 4,
-+
- /* AHB_DMA_CONF0 field values */
- 	HDMI_AHB_DMA_CONF0_SW_FIFO_RST_OFFSET = 7,
- 	HDMI_AHB_DMA_CONF0_SW_FIFO_RST_MASK = 0x80,
diff --git a/patches.renesas/clk-cs2000-add-suspend-resume-feature.patch b/patches.renesas/clk-cs2000-add-suspend-resume-feature.patch
deleted file mode 100644
index 2510ac65f637ba..00000000000000
--- a/patches.renesas/clk-cs2000-add-suspend-resume-feature.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From horms@vergenet.net Tue Sep  5 10:07:48 2017
-From: Simon Horman <horms@verge.net.au>
-Date: Tue,  5 Sep 2017 10:06:48 +0200
-Subject: [PATCH 13/13] clk: cs2000: add Suspend/Resume feature
-To: Greg KH <gregkh@linuxfoundation.org>
-Cc: ltsi-dev@lists.linuxfoundation.org, linux-renesas-soc@vger.kernel.org, Magnus Damm <magnus.damm@gmail.com>
-Message-ID: <1504598808-19810-14-git-send-email-horms@verge.net.au>
-
-
-From: Khiem Nguyen <khiem.nguyen.xt@rvc.renesas.com>
-
-CS2000 needs re-setup when redume, otherwise, it can't
-handle correct clock rate.
-
-Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@rvc.renesas.com>
-[Kuninori: cleanup original patch]
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
-(cherry picked from commit c567fb37f123511d752a454fb11d8bcaf46a7895)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clk/clk-cs2000-cp.c |   22 ++++++++++++++++++++++
- 1 file changed, 22 insertions(+)
-
---- a/drivers/clk/clk-cs2000-cp.c
-+++ b/drivers/clk/clk-cs2000-cp.c
-@@ -59,6 +59,10 @@ struct cs2000_priv {
- 	struct i2c_client *client;
- 	struct clk *clk_in;
- 	struct clk *ref_clk;
-+
-+	/* suspend/resume */
-+	unsigned long saved_rate;
-+	unsigned long saved_parent_rate;
- };
- 
- static const struct of_device_id cs2000_of_match[] = {
-@@ -286,6 +290,9 @@ static int __cs2000_set_rate(struct cs20
- 	if (ret < 0)
- 		return ret;
- 
-+	priv->saved_rate	= rate;
-+	priv->saved_parent_rate	= parent_rate;
-+
- 	return 0;
- }
- 
-@@ -489,9 +496,24 @@ probe_err:
- 	return ret;
- }
- 
-+static int cs2000_resume(struct device *dev)
-+{
-+	struct cs2000_priv *priv = dev_get_drvdata(dev);
-+	int ch = 0; /* it uses ch0 only at this point */
-+
-+	return __cs2000_set_rate(priv, ch,
-+				 priv->saved_rate,
-+				 priv->saved_parent_rate);
-+}
-+
-+static const struct dev_pm_ops cs2000_pm_ops = {
-+	.resume_early	= cs2000_resume,
-+};
-+
- static struct i2c_driver cs2000_driver = {
- 	.driver = {
- 		.name = "cs2000-cp",
-+		.pm	= &cs2000_pm_ops,
- 		.of_match_table = cs2000_of_match,
- 	},
- 	.probe		= cs2000_probe,
diff --git a/patches.renesas/thermal-rcar_gen3_thermal-add-delay-in-.thermal_init-on-r8a7796.patch b/patches.renesas/thermal-rcar_gen3_thermal-add-delay-in-.thermal_init-on-r8a7796.patch
deleted file mode 100644
index f983fb6c9c89f4..00000000000000
--- a/patches.renesas/thermal-rcar_gen3_thermal-add-delay-in-.thermal_init-on-r8a7796.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From horms@vergenet.net Tue Sep  5 10:07:31 2017
-From: Simon Horman <horms@verge.net.au>
-Date: Tue,  5 Sep 2017 10:06:38 +0200
-Subject: [PATCH 03/13] thermal: rcar_gen3_thermal: add delay in .thermal_init on r8a7796
-To: Greg KH <gregkh@linuxfoundation.org>
-Cc: ltsi-dev@lists.linuxfoundation.org, linux-renesas-soc@vger.kernel.org, Magnus Damm <magnus.damm@gmail.com>
-Message-ID: <1504598808-19810-4-git-send-email-horms@verge.net.au>
-
-
-From: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-
-The .thermal_init needs to be delayed a short amount of time to allow
-for the TEMP register to contain something useful. If it's not delayed
-these warnings are common during boot:
-
-thermal thermal_zone0: failed to read out thermal zone (-5)
-thermal thermal_zone1: failed to read out thermal zone (-5)
-thermal thermal_zone2: failed to read out thermal zone (-5)
-
-The warnings are triggered by the first call to .get_temp() while the
-TEMP register contains 0 and rcar_gen3_thermal_get_temp() returns -EIO
-since a TEMP value of 0 will result in a temperature reading which is
-out of specifications.
-
-This should have been done in the initial commit which adds the driver
-as the same issue was found and corrected for r8a7795.
-
-Fixes: 564e73d283af9d4c ("thermal: rcar_gen3_thermal: Add R-Car Gen3 thermal driver")
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
-(cherry picked from commit 78aefd2d5911c4e0b5dc0b0578b3b8c7673be1d2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/thermal/rcar_gen3_thermal.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/thermal/rcar_gen3_thermal.c
-+++ b/drivers/thermal/rcar_gen3_thermal.c
-@@ -222,6 +222,8 @@ static void r8a7796_thermal_init(struct
- 	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
- 	reg_val |= THCTR_THSST;
- 	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
-+
-+	usleep_range(1000, 2000);
- }
- 
- static const struct rcar_gen3_thermal_data r8a7795_data = {
diff --git a/patches.renesas/thermal-rcar_gen3_thermal-add-r-car-gen3-thermal-driver.patch b/patches.renesas/thermal-rcar_gen3_thermal-add-r-car-gen3-thermal-driver.patch
deleted file mode 100644
index d79677a9b2c32c..00000000000000
--- a/patches.renesas/thermal-rcar_gen3_thermal-add-r-car-gen3-thermal-driver.patch
+++ /dev/null
@@ -1,398 +0,0 @@
-From horms@vergenet.net Tue Sep  5 10:07:28 2017
-From: Simon Horman <horms@verge.net.au>
-Date: Tue,  5 Sep 2017 10:06:37 +0200
-Subject: [PATCH 02/13] thermal: rcar_gen3_thermal: Add R-Car Gen3 thermal driver
-To: Greg KH <gregkh@linuxfoundation.org>
-Cc: ltsi-dev@lists.linuxfoundation.org, linux-renesas-soc@vger.kernel.org, Magnus Damm <magnus.damm@gmail.com>
-Message-ID: <1504598808-19810-3-git-send-email-horms@verge.net.au>
-
-
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-
-Add support for R-Car Gen3 thermal sensors. Polling only for now,
-interrupts will be added incrementally. Same goes for reading fuses.
-This is documented already, but no hardware available for now.
-
-Signed-off-by: Hien Dang <hien.dang.eb@renesas.com>
-Signed-off-by: Thao Nguyen <thao.nguyen.yb@rvc.renesas.com>
-Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-[Niklas: document and rework temperature calculation]
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
-
-(cherry picked from commit 564e73d283af9d4c1d642079d5c7ac601876162f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/thermal/Kconfig             |    9 
- drivers/thermal/Makefile            |    1 
- drivers/thermal/rcar_gen3_thermal.c |  335 ++++++++++++++++++++++++++++++++++++
- 3 files changed, 345 insertions(+)
- create mode 100644 drivers/thermal/rcar_gen3_thermal.c
-
---- a/drivers/thermal/Kconfig
-+++ b/drivers/thermal/Kconfig
-@@ -243,6 +243,15 @@ config RCAR_THERMAL
- 	  Enable this to plug the R-Car thermal sensor driver into the Linux
- 	  thermal framework.
- 
-+config RCAR_GEN3_THERMAL
-+	tristate "Renesas R-Car Gen3 thermal driver"
-+	depends on ARCH_RENESAS || COMPILE_TEST
-+	depends on HAS_IOMEM
-+	depends on OF
-+	help
-+	  Enable this to plug the R-Car Gen3 thermal sensor driver into the Linux
-+	  thermal framework.
-+
- config KIRKWOOD_THERMAL
- 	tristate "Temperature sensor on Marvell Kirkwood SoCs"
- 	depends on MACH_KIRKWOOD || COMPILE_TEST
---- a/drivers/thermal/Makefile
-+++ b/drivers/thermal/Makefile
-@@ -30,6 +30,7 @@ obj-$(CONFIG_QCOM_SPMI_TEMP_ALARM)	+= qc
- obj-$(CONFIG_SPEAR_THERMAL)	+= spear_thermal.o
- obj-$(CONFIG_ROCKCHIP_THERMAL)	+= rockchip_thermal.o
- obj-$(CONFIG_RCAR_THERMAL)	+= rcar_thermal.o
-+obj-$(CONFIG_RCAR_GEN3_THERMAL)	+= rcar_gen3_thermal.o
- obj-$(CONFIG_KIRKWOOD_THERMAL)  += kirkwood_thermal.o
- obj-y				+= samsung/
- obj-$(CONFIG_DOVE_THERMAL)  	+= dove_thermal.o
---- /dev/null
-+++ b/drivers/thermal/rcar_gen3_thermal.c
-@@ -0,0 +1,335 @@
-+/*
-+ *  R-Car Gen3 THS thermal sensor driver
-+ *  Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
-+ *
-+ * Copyright (C) 2016 Renesas Electronics Corporation.
-+ * Copyright (C) 2016 Sang Engineering
-+ *
-+ *  This program is free software; you can redistribute it and/or modify
-+ *  it under the terms of the GNU General Public License as published by
-+ *  the Free Software Foundation; version 2 of the License.
-+ *
-+ *  This program is distributed in the hope that it will be useful, but
-+ *  WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-+ *  General Public License for more details.
-+ *
-+ */
-+#include <linux/delay.h>
-+#include <linux/err.h>
-+#include <linux/interrupt.h>
-+#include <linux/io.h>
-+#include <linux/module.h>
-+#include <linux/mutex.h>
-+#include <linux/of_device.h>
-+#include <linux/platform_device.h>
-+#include <linux/pm_runtime.h>
-+#include <linux/thermal.h>
-+
-+/* Register offsets */
-+#define REG_GEN3_IRQSTR		0x04
-+#define REG_GEN3_IRQMSK		0x08
-+#define REG_GEN3_IRQCTL		0x0C
-+#define REG_GEN3_IRQEN		0x10
-+#define REG_GEN3_IRQTEMP1	0x14
-+#define REG_GEN3_IRQTEMP2	0x18
-+#define REG_GEN3_IRQTEMP3	0x1C
-+#define REG_GEN3_CTSR		0x20
-+#define REG_GEN3_THCTR		0x20
-+#define REG_GEN3_TEMP		0x28
-+#define REG_GEN3_THCODE1	0x50
-+#define REG_GEN3_THCODE2	0x54
-+#define REG_GEN3_THCODE3	0x58
-+
-+/* CTSR bits */
-+#define CTSR_PONM	BIT(8)
-+#define CTSR_AOUT	BIT(7)
-+#define CTSR_THBGR	BIT(5)
-+#define CTSR_VMEN	BIT(4)
-+#define CTSR_VMST	BIT(1)
-+#define CTSR_THSST	BIT(0)
-+
-+/* THCTR bits */
-+#define THCTR_PONM	BIT(6)
-+#define THCTR_THSST	BIT(0)
-+
-+#define CTEMP_MASK	0xFFF
-+
-+#define MCELSIUS(temp)	((temp) * 1000)
-+#define GEN3_FUSE_MASK	0xFFF
-+
-+#define TSC_MAX_NUM	3
-+
-+/* Structure for thermal temperature calculation */
-+struct equation_coefs {
-+	int a1;
-+	int b1;
-+	int a2;
-+	int b2;
-+};
-+
-+struct rcar_gen3_thermal_tsc {
-+	void __iomem *base;
-+	struct thermal_zone_device *zone;
-+	struct equation_coefs coef;
-+	struct mutex lock;
-+};
-+
-+struct rcar_gen3_thermal_priv {
-+	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
-+};
-+
-+struct rcar_gen3_thermal_data {
-+	void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
-+};
-+
-+static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
-+					 u32 reg)
-+{
-+	return ioread32(tsc->base + reg);
-+}
-+
-+static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
-+					   u32 reg, u32 data)
-+{
-+	iowrite32(data, tsc->base + reg);
-+}
-+
-+/*
-+ * Linear approximation for temperature
-+ *
-+ * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
-+ *
-+ * The constants a and b are calculated using two triplets of int values PTAT
-+ * and THCODE. PTAT and THCODE can either be read from hardware or use hard
-+ * coded values from driver. The formula to calculate a and b are taken from
-+ * BSP and sparsely documented and understood.
-+ *
-+ * Examining the linear formula and the formula used to calculate constants a
-+ * and b while knowing that the span for PTAT and THCODE values are between
-+ * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
-+ * Integer also needs to be signed so that leaves 7 bits for binary
-+ * fixed point scaling.
-+ */
-+
-+#define FIXPT_SHIFT 7
-+#define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
-+#define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
-+#define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
-+
-+#define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
-+
-+/* no idea where these constants come from */
-+#define TJ_1 96
-+#define TJ_3 -41
-+
-+static void rcar_gen3_thermal_calc_coefs(struct equation_coefs *coef,
-+					 int *ptat, int *thcode)
-+{
-+	int tj_2;
-+
-+	/* TODO: Find documentation and document constant calculation formula */
-+
-+	/*
-+	 * Division is not scaled in BSP and if scaled it might overflow
-+	 * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
-+	 */
-+	tj_2 = (FIXPT_INT((ptat[1] - ptat[2]) * 137)
-+		/ (ptat[0] - ptat[2])) - FIXPT_INT(41);
-+
-+	coef->a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
-+			     tj_2 - FIXPT_INT(TJ_3));
-+	coef->b1 = FIXPT_INT(thcode[2]) - coef->a1 * TJ_3;
-+
-+	coef->a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
-+			     tj_2 - FIXPT_INT(TJ_1));
-+	coef->b2 = FIXPT_INT(thcode[0]) - coef->a2 * TJ_1;
-+}
-+
-+static int rcar_gen3_thermal_round(int temp)
-+{
-+	int result, round_offs;
-+
-+	round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
-+		-RCAR3_THERMAL_GRAN / 2;
-+	result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
-+	return result * RCAR3_THERMAL_GRAN;
-+}
-+
-+static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
-+{
-+	struct rcar_gen3_thermal_tsc *tsc = devdata;
-+	int mcelsius, val1, val2;
-+	u32 reg;
-+
-+	/* Read register and convert to mili Celsius */
-+	mutex_lock(&tsc->lock);
-+
-+	reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
-+
-+	val1 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1, tsc->coef.a1);
-+	val2 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2, tsc->coef.a2);
-+	mcelsius = FIXPT_TO_MCELSIUS((val1 + val2) / 2);
-+
-+	mutex_unlock(&tsc->lock);
-+
-+	/* Make sure we are inside specifications */
-+	if ((mcelsius < MCELSIUS(-40)) || (mcelsius > MCELSIUS(125)))
-+		return -EIO;
-+
-+	/* Round value to device granularity setting */
-+	*temp = rcar_gen3_thermal_round(mcelsius);
-+
-+	return 0;
-+}
-+
-+static struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
-+	.get_temp	= rcar_gen3_thermal_get_temp,
-+};
-+
-+static void r8a7795_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
-+{
-+	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  CTSR_THBGR);
-+	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  0x0);
-+
-+	usleep_range(1000, 2000);
-+
-+	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
-+	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
-+	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
-+				CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
-+
-+	usleep_range(100, 200);
-+
-+	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
-+				CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
-+				CTSR_VMST | CTSR_THSST);
-+
-+	usleep_range(1000, 2000);
-+}
-+
-+static void r8a7796_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
-+{
-+	u32 reg_val;
-+
-+	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
-+	reg_val &= ~THCTR_PONM;
-+	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
-+
-+	usleep_range(1000, 2000);
-+
-+	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
-+	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
-+	reg_val |= THCTR_THSST;
-+	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
-+}
-+
-+static const struct rcar_gen3_thermal_data r8a7795_data = {
-+	.thermal_init = r8a7795_thermal_init,
-+};
-+
-+static const struct rcar_gen3_thermal_data r8a7796_data = {
-+	.thermal_init = r8a7796_thermal_init,
-+};
-+
-+static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
-+	{ .compatible = "renesas,r8a7795-thermal", .data = &r8a7795_data},
-+	{ .compatible = "renesas,r8a7796-thermal", .data = &r8a7796_data},
-+	{},
-+};
-+MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
-+
-+static int rcar_gen3_thermal_remove(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+
-+	pm_runtime_put(dev);
-+	pm_runtime_disable(dev);
-+
-+	return 0;
-+}
-+
-+static int rcar_gen3_thermal_probe(struct platform_device *pdev)
-+{
-+	struct rcar_gen3_thermal_priv *priv;
-+	struct device *dev = &pdev->dev;
-+	struct resource *res;
-+	struct thermal_zone_device *zone;
-+	int ret, i;
-+	const struct rcar_gen3_thermal_data *match_data =
-+		of_device_get_match_data(dev);
-+
-+	/* default values if FUSEs are missing */
-+	/* TODO: Read values from hardware on supported platforms */
-+	int ptat[3] = { 2351, 1509, 435 };
-+	int thcode[TSC_MAX_NUM][3] = {
-+		{ 3248, 2800, 2221 },
-+		{ 3245, 2795, 2216 },
-+		{ 3250, 2805, 2237 },
-+	};
-+
-+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	platform_set_drvdata(pdev, priv);
-+
-+	pm_runtime_enable(dev);
-+	pm_runtime_get_sync(dev);
-+
-+	for (i = 0; i < TSC_MAX_NUM; i++) {
-+		struct rcar_gen3_thermal_tsc *tsc;
-+
-+		tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
-+		if (!tsc) {
-+			ret = -ENOMEM;
-+			goto error_unregister;
-+		}
-+
-+		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
-+		if (!res)
-+			break;
-+
-+		tsc->base = devm_ioremap_resource(dev, res);
-+		if (IS_ERR(tsc->base)) {
-+			ret = PTR_ERR(tsc->base);
-+			goto error_unregister;
-+		}
-+
-+		priv->tscs[i] = tsc;
-+		mutex_init(&tsc->lock);
-+
-+		match_data->thermal_init(tsc);
-+		rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);
-+
-+		zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
-+							    &rcar_gen3_tz_of_ops);
-+		if (IS_ERR(zone)) {
-+			dev_err(dev, "Can't register thermal zone\n");
-+			ret = PTR_ERR(zone);
-+			goto error_unregister;
-+		}
-+		tsc->zone = zone;
-+	}
-+
-+	return 0;
-+
-+error_unregister:
-+	rcar_gen3_thermal_remove(pdev);
-+
-+	return ret;
-+}
-+
-+static struct platform_driver rcar_gen3_thermal_driver = {
-+	.driver	= {
-+		.name	= "rcar_gen3_thermal",
-+		.of_match_table = rcar_gen3_thermal_dt_ids,
-+	},
-+	.probe		= rcar_gen3_thermal_probe,
-+	.remove		= rcar_gen3_thermal_remove,
-+};
-+module_platform_driver(rcar_gen3_thermal_driver);
-+
-+MODULE_LICENSE("GPL v2");
-+MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
-+MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");
diff --git a/patches.renesas/thermal-rcar_gen3_thermal-add-suspend-and-resume-support.patch b/patches.renesas/thermal-rcar_gen3_thermal-add-suspend-and-resume-support.patch
deleted file mode 100644
index 877784afc22a6d..00000000000000
--- a/patches.renesas/thermal-rcar_gen3_thermal-add-suspend-and-resume-support.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From horms@vergenet.net Tue Sep  5 10:07:50 2017
-From: Simon Horman <horms@verge.net.au>
-Date: Tue,  5 Sep 2017 10:06:44 +0200
-Subject: [PATCH 09/13] thermal: rcar_gen3_thermal: add suspend and resume support
-To: Greg KH <gregkh@linuxfoundation.org>
-Cc: ltsi-dev@lists.linuxfoundation.org, linux-renesas-soc@vger.kernel.org, Magnus Damm <magnus.damm@gmail.com>
-Message-ID: <1504598808-19810-10-git-send-email-horms@verge.net.au>
-
-
-From: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-
-To restore operation it's easiest to reinitialise all TSCs. In order to
-do this the current trip window needs to be stored in the TSC structure
-so that it can be restored upon resume.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
-(cherry picked from commit 75f78d6d9eb793d141affaa5a76f20ce1d6ae5c9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/thermal/rcar_gen3_thermal.c |   35 +++++++++++++++++++++++++++++++++++
- 1 file changed, 35 insertions(+)
-
---- a/drivers/thermal/rcar_gen3_thermal.c
-+++ b/drivers/thermal/rcar_gen3_thermal.c
-@@ -82,6 +82,8 @@ struct rcar_gen3_thermal_tsc {
- 	void __iomem *base;
- 	struct thermal_zone_device *zone;
- 	struct equation_coefs coef;
-+	int low;
-+	int high;
- };
- 
- struct rcar_gen3_thermal_priv {
-@@ -217,6 +219,9 @@ static int rcar_gen3_thermal_set_trips(v
- 	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
- 				rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
- 
-+	tsc->low = low;
-+	tsc->high = high;
-+
- 	return 0;
- }
- 
-@@ -454,9 +459,39 @@ error_unregister:
- 	return ret;
- }
- 
-+static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
-+{
-+	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
-+
-+	rcar_thermal_irq_set(priv, false);
-+
-+	return 0;
-+}
-+
-+static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
-+{
-+	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
-+	unsigned int i;
-+
-+	for (i = 0; i < priv->num_tscs; i++) {
-+		struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
-+
-+		priv->data->thermal_init(tsc);
-+		rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
-+	}
-+
-+	rcar_thermal_irq_set(priv, true);
-+
-+	return 0;
-+}
-+
-+static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
-+			 rcar_gen3_thermal_resume);
-+
- static struct platform_driver rcar_gen3_thermal_driver = {
- 	.driver	= {
- 		.name	= "rcar_gen3_thermal",
-+		.pm = &rcar_gen3_thermal_pm_ops,
- 		.of_match_table = rcar_gen3_thermal_dt_ids,
- 	},
- 	.probe		= rcar_gen3_thermal_probe,
diff --git a/patches.renesas/thermal-rcar_gen3_thermal-check-that-tsc-exists-before-memory-allocation.patch b/patches.renesas/thermal-rcar_gen3_thermal-check-that-tsc-exists-before-memory-allocation.patch
deleted file mode 100644
index e04184832085fb..00000000000000
--- a/patches.renesas/thermal-rcar_gen3_thermal-check-that-tsc-exists-before-memory-allocation.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From horms@vergenet.net Tue Sep  5 10:07:57 2017
-From: Simon Horman <horms@verge.net.au>
-Date: Tue,  5 Sep 2017 10:06:40 +0200
-Subject: [PATCH 05/13] thermal: rcar_gen3_thermal: check that TSC exists before memory allocation
-To: Greg KH <gregkh@linuxfoundation.org>
-Cc: ltsi-dev@lists.linuxfoundation.org, linux-renesas-soc@vger.kernel.org, Magnus Damm <magnus.damm@gmail.com>
-Message-ID: <1504598808-19810-6-git-send-email-horms@verge.net.au>
-
-
-From: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-
-Move the check for a TSC resource before allocating memory for a new
-TSC. If no TSC is found there is little point in allocating memory for
-it.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
-(cherry picked from commit d51546c0db975a4750161d17eef62dfcf9eedc90)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/thermal/rcar_gen3_thermal.c |    8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/thermal/rcar_gen3_thermal.c
-+++ b/drivers/thermal/rcar_gen3_thermal.c
-@@ -276,16 +276,16 @@ static int rcar_gen3_thermal_probe(struc
- 	for (i = 0; i < TSC_MAX_NUM; i++) {
- 		struct rcar_gen3_thermal_tsc *tsc;
- 
-+		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
-+		if (!res)
-+			break;
-+
- 		tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
- 		if (!tsc) {
- 			ret = -ENOMEM;
- 			goto error_unregister;
- 		}
- 
--		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
--		if (!res)
--			break;
--
- 		tsc->base = devm_ioremap_resource(dev, res);
- 		if (IS_ERR(tsc->base)) {
- 			ret = PTR_ERR(tsc->base);
diff --git a/patches.renesas/thermal-rcar_gen3_thermal-document-the-r-car-gen3.patch b/patches.renesas/thermal-rcar_gen3_thermal-document-the-r-car-gen3.patch
deleted file mode 100644
index afe445312dac4f..00000000000000
--- a/patches.renesas/thermal-rcar_gen3_thermal-document-the-r-car-gen3.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From horms@vergenet.net Tue Sep  5 10:07:30 2017
-From: Simon Horman <horms@verge.net.au>
-Date: Tue,  5 Sep 2017 10:06:36 +0200
-Subject: [PATCH 01/13] thermal: rcar_gen3_thermal: Document the R-Car Gen3
-To: Greg KH <gregkh@linuxfoundation.org>
-Cc: ltsi-dev@lists.linuxfoundation.org, linux-renesas-soc@vger.kernel.org, Magnus Damm <magnus.damm@gmail.com>
-Message-ID: <1504598808-19810-2-git-send-email-horms@verge.net.au>
-
-
-From: Wolfram Sang <wsa+renesas@sang-engineering.com>
-
-Signed-off-by: Hien Dang <hien.dang.eb@renesas.com>
-Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
-(cherry picked from commit b022e9b9d0e67f4cba62bc790bd387e23c29dc6c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.txt |   56 ++++++++++
- 1 file changed, 56 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.txt
-@@ -0,0 +1,56 @@
-+* DT bindings for Renesas R-Car Gen3 Thermal Sensor driver
-+
-+On R-Car Gen3 SoCs, the thermal sensor controllers (TSC) control the thermal
-+sensors (THS) which are the analog circuits for measuring temperature (Tj)
-+inside the LSI.
-+
-+Required properties:
-+- compatible		: "renesas,<soctype>-thermal",
-+			  Examples with soctypes are:
-+			    - "renesas,r8a7795-thermal" (R-Car H3)
-+			    - "renesas,r8a7796-thermal" (R-Car M3-W)
-+- reg			: Address ranges of the thermal registers. Each sensor
-+			  needs one address range. Sorting must be done in
-+			  increasing order according to datasheet, i.e.
-+			  TSC1, TSC2, ...
-+- clocks		: Must contain a reference to the functional clock.
-+- #thermal-sensor-cells : must be <1>.
-+
-+Optional properties:
-+
-+- interrupts           : interrupts routed to the TSC (3 for H3 and M3-W)
-+- power-domain		: Must contain a reference to the power domain. This
-+			  property is mandatory if the thermal sensor instance
-+			  is part of a controllable power domain.
-+
-+Example:
-+
-+	tsc: thermal@e6198000 {
-+		compatible = "renesas,r8a7795-thermal";
-+		reg = <0 0xe6198000 0 0x68>,
-+		      <0 0xe61a0000 0 0x5c>,
-+		      <0 0xe61a8000 0 0x5c>;
-+		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
-+			     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
-+			     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&cpg CPG_MOD 522>;
-+		power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-+		#thermal-sensor-cells = <1>;
-+		status = "okay";
-+	};
-+
-+	thermal-zones {
-+		sensor_thermal1: sensor-thermal1 {
-+			polling-delay-passive = <250>;
-+			polling-delay = <1000>;
-+			thermal-sensors = <&tsc 0>;
-+
-+			trips {
-+				sensor1_crit: sensor1-crit {
-+					temperature = <90000>;
-+					hysteresis = <2000>;
-+					type = "critical";
-+				};
-+			};
-+		};
-+	};
diff --git a/patches.renesas/thermal-rcar_gen3_thermal-enable-hardware-interrupts-for-trip-points.patch b/patches.renesas/thermal-rcar_gen3_thermal-enable-hardware-interrupts-for-trip-points.patch
deleted file mode 100644
index a7e68c8810cc66..00000000000000
--- a/patches.renesas/thermal-rcar_gen3_thermal-enable-hardware-interrupts-for-trip-points.patch
+++ /dev/null
@@ -1,256 +0,0 @@
-From horms@vergenet.net Tue Sep  5 10:07:47 2017
-From: Simon Horman <horms@verge.net.au>
-Date: Tue,  5 Sep 2017 10:06:42 +0200
-Subject: [PATCH 07/13] thermal: rcar_gen3_thermal: enable hardware interrupts for trip points
-To: Greg KH <gregkh@linuxfoundation.org>
-Cc: ltsi-dev@lists.linuxfoundation.org, linux-renesas-soc@vger.kernel.org, Magnus Damm <magnus.damm@gmail.com>
-Message-ID: <1504598808-19810-8-git-send-email-horms@verge.net.au>
-
-
-From: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-
-Enable hardware trip points by implementing the set_trips callback. The
-thermal core will take care of setting the initial trip point window and
-to update it once the driver reports a TSC has moved outside it.
-
-The interrupt structure for this device is a bit odd. There is not a
-dedicated IRQ for each TSC, instead the interrupts are shared between
-all TSCs. IRQn is fired if the temp monitored in IRQTEMPn is reached in
-any of the TSCs, example IRQ3 is fired if temperature in IRQTEMP3 is
-reached in either TSC0, TSC1 or TSC2.
-
-For this reason the usage of interrupts in this driver is an all-on or
-all-off design. When an interrupt happens all TSCs are checked and all
-thermal zones are updated. This could be refined to be more fine grained
-but the thermal core takes care of only updating the thermal zones that
-have left their trip point window.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
-(cherry picked from commit 7d4b269776ec67c1b7d83c6c727a2771e5f39d12)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/thermal/rcar_gen3_thermal.c |  132 +++++++++++++++++++++++++++++++++++-
- 1 file changed, 131 insertions(+), 1 deletion(-)
-
---- a/drivers/thermal/rcar_gen3_thermal.c
-+++ b/drivers/thermal/rcar_gen3_thermal.c
-@@ -23,8 +23,11 @@
- #include <linux/of_device.h>
- #include <linux/platform_device.h>
- #include <linux/pm_runtime.h>
-+#include <linux/spinlock.h>
- #include <linux/thermal.h>
- 
-+#include "thermal_core.h"
-+
- /* Register offsets */
- #define REG_GEN3_IRQSTR		0x04
- #define REG_GEN3_IRQMSK		0x08
-@@ -40,6 +43,14 @@
- #define REG_GEN3_THCODE2	0x54
- #define REG_GEN3_THCODE3	0x58
- 
-+/* IRQ{STR,MSK,EN} bits */
-+#define IRQ_TEMP1		BIT(0)
-+#define IRQ_TEMP2		BIT(1)
-+#define IRQ_TEMP3		BIT(2)
-+#define IRQ_TEMPD1		BIT(3)
-+#define IRQ_TEMPD2		BIT(4)
-+#define IRQ_TEMPD3		BIT(5)
-+
- /* CTSR bits */
- #define CTSR_PONM	BIT(8)
- #define CTSR_AOUT	BIT(7)
-@@ -76,6 +87,7 @@ struct rcar_gen3_thermal_tsc {
- struct rcar_gen3_thermal_priv {
- 	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
- 	unsigned int num_tscs;
-+	spinlock_t lock; /* Protect interrupts on and off */
- };
- 
- struct rcar_gen3_thermal_data {
-@@ -113,6 +125,7 @@ static inline void rcar_gen3_thermal_wri
- 
- #define FIXPT_SHIFT 7
- #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
-+#define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
- #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
- #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
- 
-@@ -178,10 +191,87 @@ static int rcar_gen3_thermal_get_temp(vo
- 	return 0;
- }
- 
-+static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
-+					      int mcelsius)
-+{
-+	int celsius, val1, val2;
-+
-+	celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
-+	val1 = celsius * tsc->coef.a1 + tsc->coef.b1;
-+	val2 = celsius * tsc->coef.a2 + tsc->coef.b2;
-+
-+	return INT_FIXPT((val1 + val2) / 2);
-+}
-+
-+static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
-+{
-+	struct rcar_gen3_thermal_tsc *tsc = devdata;
-+
-+	low = clamp_val(low, -40000, 125000);
-+	high = clamp_val(high, -40000, 125000);
-+
-+	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
-+				rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
-+
-+	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
-+				rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
-+
-+	return 0;
-+}
-+
- static struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
- 	.get_temp	= rcar_gen3_thermal_get_temp,
-+	.set_trips	= rcar_gen3_thermal_set_trips,
- };
- 
-+static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
-+{
-+	unsigned int i;
-+	u32 val = on ? IRQ_TEMPD1 | IRQ_TEMP2 : 0;
-+
-+	for (i = 0; i < priv->num_tscs; i++)
-+		rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
-+}
-+
-+static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
-+{
-+	struct rcar_gen3_thermal_priv *priv = data;
-+	u32 status;
-+	int i, ret = IRQ_HANDLED;
-+
-+	spin_lock(&priv->lock);
-+	for (i = 0; i < priv->num_tscs; i++) {
-+		status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
-+		rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
-+		if (status)
-+			ret = IRQ_WAKE_THREAD;
-+	}
-+
-+	if (ret == IRQ_WAKE_THREAD)
-+		rcar_thermal_irq_set(priv, false);
-+
-+	spin_unlock(&priv->lock);
-+
-+	return ret;
-+}
-+
-+static irqreturn_t rcar_gen3_thermal_irq_thread(int irq, void *data)
-+{
-+	struct rcar_gen3_thermal_priv *priv = data;
-+	unsigned long flags;
-+	int i;
-+
-+	for (i = 0; i < priv->num_tscs; i++)
-+		thermal_zone_device_update(priv->tscs[i]->zone,
-+					   THERMAL_EVENT_UNSPECIFIED);
-+
-+	spin_lock_irqsave(&priv->lock, flags);
-+	rcar_thermal_irq_set(priv, true);
-+	spin_unlock_irqrestore(&priv->lock, flags);
-+
-+	return IRQ_HANDLED;
-+}
-+
- static void r8a7795_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
- {
- 	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  CTSR_THBGR);
-@@ -190,7 +280,11 @@ static void r8a7795_thermal_init(struct
- 	usleep_range(1000, 2000);
- 
- 	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
-+
- 	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
-+	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
-+	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
-+
- 	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
- 				CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
- 
-@@ -214,6 +308,9 @@ static void r8a7796_thermal_init(struct
- 	usleep_range(1000, 2000);
- 
- 	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
-+	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
-+	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
-+
- 	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
- 	reg_val |= THCTR_THSST;
- 	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
-@@ -252,7 +349,8 @@ static int rcar_gen3_thermal_probe(struc
- 	struct device *dev = &pdev->dev;
- 	struct resource *res;
- 	struct thermal_zone_device *zone;
--	int ret, i;
-+	int ret, irq, i;
-+	char *irqname;
- 	const struct rcar_gen3_thermal_data *match_data =
- 		of_device_get_match_data(dev);
- 
-@@ -269,8 +367,32 @@ static int rcar_gen3_thermal_probe(struc
- 	if (!priv)
- 		return -ENOMEM;
- 
-+	spin_lock_init(&priv->lock);
-+
- 	platform_set_drvdata(pdev, priv);
- 
-+	/*
-+	 * Request 2 (of the 3 possible) IRQs, the driver only needs to
-+	 * to trigger on the low and high trip points of the current
-+	 * temp window at this point.
-+	 */
-+	for (i = 0; i < 2; i++) {
-+		irq = platform_get_irq(pdev, i);
-+		if (irq < 0)
-+			return irq;
-+
-+		irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
-+					 dev_name(dev), i);
-+		if (!irqname)
-+			return -ENOMEM;
-+
-+		ret = devm_request_threaded_irq(dev, irq, rcar_gen3_thermal_irq,
-+						rcar_gen3_thermal_irq_thread,
-+						IRQF_SHARED, irqname, priv);
-+		if (ret)
-+			return ret;
-+	}
-+
- 	pm_runtime_enable(dev);
- 	pm_runtime_get_sync(dev);
- 
-@@ -306,6 +428,12 @@ static int rcar_gen3_thermal_probe(struc
- 			goto error_unregister;
- 		}
- 		tsc->zone = zone;
-+
-+		ret = of_thermal_get_ntrips(tsc->zone);
-+		if (ret < 0)
-+			goto error_unregister;
-+
-+		dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
- 	}
- 
- 	priv->num_tscs = i;
-@@ -315,6 +443,8 @@ static int rcar_gen3_thermal_probe(struc
- 		goto error_unregister;
- 	}
- 
-+	rcar_thermal_irq_set(priv, true);
-+
- 	return 0;
- 
- error_unregister:
diff --git a/patches.renesas/thermal-rcar_gen3_thermal-record-and-check-number-of-tscs-found.patch b/patches.renesas/thermal-rcar_gen3_thermal-record-and-check-number-of-tscs-found.patch
deleted file mode 100644
index aa17004144a93a..00000000000000
--- a/patches.renesas/thermal-rcar_gen3_thermal-record-and-check-number-of-tscs-found.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From horms@vergenet.net Tue Sep  5 10:07:56 2017
-From: Simon Horman <horms@verge.net.au>
-Date: Tue,  5 Sep 2017 10:06:41 +0200
-Subject: [PATCH 06/13] thermal: rcar_gen3_thermal: record and check number of TSCs found
-To: Greg KH <gregkh@linuxfoundation.org>
-Cc: ltsi-dev@lists.linuxfoundation.org, linux-renesas-soc@vger.kernel.org, Magnus Damm <magnus.damm@gmail.com>
-Message-ID: <1504598808-19810-7-git-send-email-horms@verge.net.au>
-
-
-From: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-
-Record how many TSCs are found in struct rcar_gen3_thermal_priv, this is
-needed to be able to add hardware interrupts for trip points later. Also
-add a check to make sure at least one TSC is found.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
-(cherry picked from commit 97dad1f1d2b3f2a2a77551849357b7ac38b0b6ff)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/thermal/rcar_gen3_thermal.c |    8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/thermal/rcar_gen3_thermal.c
-+++ b/drivers/thermal/rcar_gen3_thermal.c
-@@ -75,6 +75,7 @@ struct rcar_gen3_thermal_tsc {
- 
- struct rcar_gen3_thermal_priv {
- 	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
-+	unsigned int num_tscs;
- };
- 
- struct rcar_gen3_thermal_data {
-@@ -307,6 +308,13 @@ static int rcar_gen3_thermal_probe(struc
- 		tsc->zone = zone;
- 	}
- 
-+	priv->num_tscs = i;
-+
-+	if (!priv->num_tscs) {
-+		ret = -ENODEV;
-+		goto error_unregister;
-+	}
-+
- 	return 0;
- 
- error_unregister:
diff --git a/patches.renesas/thermal-rcar_gen3_thermal-remove-unneeded-mutex.patch b/patches.renesas/thermal-rcar_gen3_thermal-remove-unneeded-mutex.patch
deleted file mode 100644
index f6a7b1a764f7e7..00000000000000
--- a/patches.renesas/thermal-rcar_gen3_thermal-remove-unneeded-mutex.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From horms@vergenet.net Tue Sep  5 10:07:29 2017
-From: Simon Horman <horms@verge.net.au>
-Date: Tue,  5 Sep 2017 10:06:39 +0200
-Subject: [PATCH 04/13] thermal: rcar_gen3_thermal: remove unneeded mutex
-To: Greg KH <gregkh@linuxfoundation.org>
-Cc: ltsi-dev@lists.linuxfoundation.org, linux-renesas-soc@vger.kernel.org, Magnus Damm <magnus.damm@gmail.com>
-Message-ID: <1504598808-19810-5-git-send-email-horms@verge.net.au>
-
-
-From: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-
-There is no point in protecting a register read with a lock. This is
-most likely a leftover from when the driver was reworked before being
-submitted for upstream.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
-(cherry picked from commit 100cfbcf2580b0605f50af32fefd9c8d1d8357fb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/thermal/rcar_gen3_thermal.c |    7 -------
- 1 file changed, 7 deletions(-)
-
---- a/drivers/thermal/rcar_gen3_thermal.c
-+++ b/drivers/thermal/rcar_gen3_thermal.c
-@@ -20,7 +20,6 @@
- #include <linux/interrupt.h>
- #include <linux/io.h>
- #include <linux/module.h>
--#include <linux/mutex.h>
- #include <linux/of_device.h>
- #include <linux/platform_device.h>
- #include <linux/pm_runtime.h>
-@@ -72,7 +71,6 @@ struct rcar_gen3_thermal_tsc {
- 	void __iomem *base;
- 	struct thermal_zone_device *zone;
- 	struct equation_coefs coef;
--	struct mutex lock;
- };
- 
- struct rcar_gen3_thermal_priv {
-@@ -163,16 +161,12 @@ static int rcar_gen3_thermal_get_temp(vo
- 	u32 reg;
- 
- 	/* Read register and convert to mili Celsius */
--	mutex_lock(&tsc->lock);
--
- 	reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
- 
- 	val1 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1, tsc->coef.a1);
- 	val2 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2, tsc->coef.a2);
- 	mcelsius = FIXPT_TO_MCELSIUS((val1 + val2) / 2);
- 
--	mutex_unlock(&tsc->lock);
--
- 	/* Make sure we are inside specifications */
- 	if ((mcelsius < MCELSIUS(-40)) || (mcelsius > MCELSIUS(125)))
- 		return -EIO;
-@@ -299,7 +293,6 @@ static int rcar_gen3_thermal_probe(struc
- 		}
- 
- 		priv->tscs[i] = tsc;
--		mutex_init(&tsc->lock);
- 
- 		match_data->thermal_init(tsc);
- 		rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);
diff --git a/patches.renesas/thermal-rcar_gen3_thermal-store-device-match-data-in-private-structure.patch b/patches.renesas/thermal-rcar_gen3_thermal-store-device-match-data-in-private-structure.patch
deleted file mode 100644
index f7222a3a6adef8..00000000000000
--- a/patches.renesas/thermal-rcar_gen3_thermal-store-device-match-data-in-private-structure.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From horms@vergenet.net Tue Sep  5 10:07:52 2017
-From: Simon Horman <horms@verge.net.au>
-Date: Tue,  5 Sep 2017 10:06:43 +0200
-Subject: [PATCH 08/13] thermal: rcar_gen3_thermal: store device match data in private structure
-To: Greg KH <gregkh@linuxfoundation.org>
-Cc: ltsi-dev@lists.linuxfoundation.org, linux-renesas-soc@vger.kernel.org, Magnus Damm <magnus.damm@gmail.com>
-Message-ID: <1504598808-19810-9-git-send-email-horms@verge.net.au>
-
-
-From: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-
-The device match data needs to be accessible outside the probe function,
-store it in the private data structure.
-
-Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
-(cherry picked from commit cc4d072b66298716484f5c78d782c64509f4b6d9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/thermal/rcar_gen3_thermal.c |    7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
---- a/drivers/thermal/rcar_gen3_thermal.c
-+++ b/drivers/thermal/rcar_gen3_thermal.c
-@@ -88,6 +88,7 @@ struct rcar_gen3_thermal_priv {
- 	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
- 	unsigned int num_tscs;
- 	spinlock_t lock; /* Protect interrupts on and off */
-+	const struct rcar_gen3_thermal_data *data;
- };
- 
- struct rcar_gen3_thermal_data {
-@@ -351,8 +352,6 @@ static int rcar_gen3_thermal_probe(struc
- 	struct thermal_zone_device *zone;
- 	int ret, irq, i;
- 	char *irqname;
--	const struct rcar_gen3_thermal_data *match_data =
--		of_device_get_match_data(dev);
- 
- 	/* default values if FUSEs are missing */
- 	/* TODO: Read values from hardware on supported platforms */
-@@ -367,6 +366,8 @@ static int rcar_gen3_thermal_probe(struc
- 	if (!priv)
- 		return -ENOMEM;
- 
-+	priv->data = of_device_get_match_data(dev);
-+
- 	spin_lock_init(&priv->lock);
- 
- 	platform_set_drvdata(pdev, priv);
-@@ -417,7 +418,7 @@ static int rcar_gen3_thermal_probe(struc
- 
- 		priv->tscs[i] = tsc;
- 
--		match_data->thermal_init(tsc);
-+		priv->data->thermal_init(tsc);
- 		rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);
- 
- 		zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
diff --git a/patches.renesas/usb-host-ehci-platform-fix-usb-1.1-device-is-not-connected-in-system-resume.patch b/patches.renesas/usb-host-ehci-platform-fix-usb-1.1-device-is-not-connected-in-system-resume.patch
deleted file mode 100644
index 5dd80b2e0aae98..00000000000000
--- a/patches.renesas/usb-host-ehci-platform-fix-usb-1.1-device-is-not-connected-in-system-resume.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From horms@vergenet.net Tue Sep  5 10:07:53 2017
-From: Simon Horman <horms@verge.net.au>
-Date: Tue,  5 Sep 2017 10:06:45 +0200
-Subject: [PATCH 10/13] usb: host: ehci-platform: fix usb 1.1 device is not connected in system resume
-To: Greg KH <gregkh@linuxfoundation.org>
-Cc: ltsi-dev@lists.linuxfoundation.org, linux-renesas-soc@vger.kernel.org, Magnus Damm <magnus.damm@gmail.com>
-Message-ID: <1504598808-19810-11-git-send-email-horms@verge.net.au>
-
-
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-
-This patch fixes an issue that a usb 1.1 device is not connected in
-system resume and then the following message appeared if debug messages
-are enabled:
-	usb 2-1: Waited 2000ms for CONNECT
-
-To resolve this issue, the EHCI controller must be resumed after its
-companion controllers. So, this patch adds such code on the driver.
-
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit d4d75128b8fd727d42c775a16b41634d09409dba)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/ehci-platform.c |    7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/drivers/usb/host/ehci-platform.c
-+++ b/drivers/usb/host/ehci-platform.c
-@@ -34,6 +34,7 @@
- #include <linux/usb.h>
- #include <linux/usb/hcd.h>
- #include <linux/usb/ehci_pdriver.h>
-+#include <linux/usb/of.h>
- 
- #include "ehci.h"
- 
-@@ -297,6 +298,7 @@ static int ehci_platform_probe(struct pl
- 		goto err_power;
- 
- 	device_wakeup_enable(hcd->self.controller);
-+	device_enable_async_suspend(hcd->self.controller);
- 	platform_set_drvdata(dev, hcd);
- 
- 	return err;
-@@ -370,6 +372,7 @@ static int ehci_platform_resume(struct d
- 	struct usb_ehci_pdata *pdata = dev_get_platdata(dev);
- 	struct platform_device *pdev = to_platform_device(dev);
- 	struct ehci_platform_priv *priv = hcd_to_ehci_priv(hcd);
-+	struct device *companion_dev;
- 
- 	if (pdata->power_on) {
- 		int err = pdata->power_on(pdev);
-@@ -377,6 +380,10 @@ static int ehci_platform_resume(struct d
- 			return err;
- 	}
- 
-+	companion_dev = usb_of_get_companion_dev(hcd->self.controller);
-+	if (companion_dev)
-+		device_pm_wait_for_dev(hcd->self.controller, companion_dev);
-+
- 	ehci_resume(hcd, priv->reset_on_resume);
- 	return 0;
- }
diff --git a/patches.renesas/usb-host-ehci-platform-set-hcd-phy-to-avoid-phy_get-in-usb_add_hcd.patch b/patches.renesas/usb-host-ehci-platform-set-hcd-phy-to-avoid-phy_get-in-usb_add_hcd.patch
deleted file mode 100644
index de18f084dce535..00000000000000
--- a/patches.renesas/usb-host-ehci-platform-set-hcd-phy-to-avoid-phy_get-in-usb_add_hcd.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From horms@vergenet.net Tue Sep  5 10:07:49 2017
-From: Simon Horman <horms@verge.net.au>
-Date: Tue,  5 Sep 2017 10:06:46 +0200
-Subject: [PATCH 11/13] usb: host: ehci-platform: set hcd->phy to avoid phy_get() in usb_add_hcd()
-To: Greg KH <gregkh@linuxfoundation.org>
-Cc: ltsi-dev@lists.linuxfoundation.org, linux-renesas-soc@vger.kernel.org, Magnus Damm <magnus.damm@gmail.com>
-Message-ID: <1504598808-19810-12-git-send-email-horms@verge.net.au>
-
-
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-
-This patch sets hcd->phy from own phy context to avoid phy_get()
-in usb_add_hcd(). Since core/hcd.c manages the phy only in
-usb_add_hcd() and usb_remove_hcd(), there is difficult to manage
-the phy in suspend/resume.
-
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Acked-by: Alan Stern <stern@rowland.harvard.edu>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 42a58c9949ddf16e557f5c2e22566f3440e7b60f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/ehci-platform.c |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/drivers/usb/host/ehci-platform.c
-+++ b/drivers/usb/host/ehci-platform.c
-@@ -221,6 +221,9 @@ static int ehci_platform_probe(struct pl
- 			if (IS_ERR(priv->phys[phy_num])) {
- 				err = PTR_ERR(priv->phys[phy_num]);
- 					goto err_put_hcd;
-+			} else if (!hcd->phy) {
-+				/* Avoiding phy_get() in usb_add_hcd() */
-+				hcd->phy = priv->phys[phy_num];
- 			}
- 		}
- 
diff --git a/patches.renesas/usb-host-ohci-platform-set-hcd-phy-to-avoid-phy_get-in-usb_add_hcd.patch b/patches.renesas/usb-host-ohci-platform-set-hcd-phy-to-avoid-phy_get-in-usb_add_hcd.patch
deleted file mode 100644
index 5f6d78afd01c93..00000000000000
--- a/patches.renesas/usb-host-ohci-platform-set-hcd-phy-to-avoid-phy_get-in-usb_add_hcd.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From horms@vergenet.net Tue Sep  5 10:07:51 2017
-From: Simon Horman <horms@verge.net.au>
-Date: Tue,  5 Sep 2017 10:06:47 +0200
-Subject: [PATCH 12/13] usb: host: ohci-platform: set hcd->phy to avoid phy_get() in usb_add_hcd()
-To: Greg KH <gregkh@linuxfoundation.org>
-Cc: ltsi-dev@lists.linuxfoundation.org, linux-renesas-soc@vger.kernel.org, Magnus Damm <magnus.damm@gmail.com>
-Message-ID: <1504598808-19810-13-git-send-email-horms@verge.net.au>
-
-
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-
-This patch sets hcd->phy from own phy context to avoid phy_get()
-in usb_add_hcd(). Since core/hcd.c manages the phy only in
-usb_add_hcd() and usb_remove_hcd(), there is difficult to manage
-the phy in suspend/resume.
-
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Acked-by: Alan Stern <stern@rowland.harvard.edu>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit d3d6ef1fb908b286a610fe063613e519bc50178b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/ohci-platform.c |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/drivers/usb/host/ohci-platform.c
-+++ b/drivers/usb/host/ohci-platform.c
-@@ -183,6 +183,9 @@ static int ohci_platform_probe(struct pl
- 			if (IS_ERR(priv->phys[phy_num])) {
- 				err = PTR_ERR(priv->phys[phy_num]);
- 				goto err_put_hcd;
-+			} else if (!hcd->phy) {
-+				/* Avoiding phy_get() in usb_add_hcd() */
-+				hcd->phy = priv->phys[phy_num];
- 			}
- 		}
- 
diff --git a/patches.renesas/usb-of-add-functions-to-bind-a-companion-controller.patch b/patches.renesas/usb-of-add-functions-to-bind-a-companion-controller.patch
deleted file mode 100644
index 134aa491ac3585..00000000000000
--- a/patches.renesas/usb-of-add-functions-to-bind-a-companion-controller.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From 5095cb89c62acc78b4cfaeb9a4072979d010510a Mon Sep 17 00:00:00 2001
-From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Date: Tue, 21 Feb 2017 19:59:47 +0900
-Subject: [PATCH] usb: of: add functions to bind a companion controller
-
-EHCI controllers will have a companion controller. However, on platform
-bus, there was difficult to bind them in previous code. So, this
-patch adds helper functions to bind them using a "companion" property.
-
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- Documentation/devicetree/bindings/usb/generic.txt |    1 
- drivers/usb/core/of.c                             |   23 ++++++++++++++++++++++
- include/linux/usb/of.h                            |    5 ++++
- 3 files changed, 29 insertions(+)
-
---- a/Documentation/devicetree/bindings/usb/generic.txt
-+++ b/Documentation/devicetree/bindings/usb/generic.txt
-@@ -22,6 +22,7 @@ Optional properties:
- 			property is used if any real OTG features(HNP/SRP/ADP)
- 			is enabled, if ADP is required, otg-rev should be
- 			0x0200 or above.
-+ - companion: phandle of a companion
-  - hnp-disable: tells OTG controllers we want to disable OTG HNP, normally HNP
- 			is the basic function of real OTG except you want it
- 			to be a srp-capable only B device.
---- a/drivers/usb/core/of.c
-+++ b/drivers/usb/core/of.c
-@@ -18,6 +18,7 @@
-  */
- 
- #include <linux/of.h>
-+#include <linux/of_platform.h>
- #include <linux/usb/of.h>
- 
- /**
-@@ -46,3 +47,25 @@ struct device_node *usb_of_get_child_nod
- }
- EXPORT_SYMBOL_GPL(usb_of_get_child_node);
- 
-+/**
-+ * usb_of_get_companion_dev - Find the companion device
-+ * @dev: the device pointer to find a companion
-+ *
-+ * Find the companion device from platform bus.
-+ *
-+ * Return: On success, a pointer to the companion device, %NULL on failure.
-+ */
-+struct device *usb_of_get_companion_dev(struct device *dev)
-+{
-+	struct device_node *node;
-+	struct platform_device *pdev = NULL;
-+
-+	node = of_parse_phandle(dev->of_node, "companion", 0);
-+	if (node)
-+		pdev = of_find_device_by_node(node);
-+
-+	of_node_put(node);
-+
-+	return pdev ? &pdev->dev : NULL;
-+}
-+EXPORT_SYMBOL_GPL(usb_of_get_companion_dev);
---- a/include/linux/usb/of.h
-+++ b/include/linux/usb/of.h
-@@ -18,6 +18,7 @@ int of_usb_update_otg_caps(struct device
- 			struct usb_otg_caps *otg_caps);
- struct device_node *usb_of_get_child_node(struct device_node *parent,
- 			int portnum);
-+struct device *usb_of_get_companion_dev(struct device *dev);
- #else
- static inline enum usb_dr_mode
- of_usb_get_dr_mode_by_phy(struct device_node *np, int arg0)
-@@ -38,6 +39,10 @@ static inline struct device_node *usb_of
- {
- 	return NULL;
- }
-+static inline struct device *usb_of_get_companion_dev(struct device *dev)
-+{
-+	return NULL;
-+}
- #endif
- 
- #if IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_USB_SUPPORT)
diff --git a/patches.socfpga/0001-ARM-dts-socfpga-enable-arm-shared-override-in-the-pl.patch b/patches.socfpga/0001-ARM-dts-socfpga-enable-arm-shared-override-in-the-pl.patch
deleted file mode 100644
index 8304e419c46fb9..00000000000000
--- a/patches.socfpga/0001-ARM-dts-socfpga-enable-arm-shared-override-in-the-pl.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 2e23d6de091f3e5e913086e223ac30eb4aa1f2a2 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@opensource.altera.com>
-Date: Mon, 26 Sep 2016 14:29:30 -0500
-Subject: [PATCH 001/103] ARM: dts: socfpga: enable arm,shared-override in the
- pl310
-
-Enable the bit(22) shared-override bit for the SoCFPGA family. While at it,
-enable the prefetch-data and prefetch-instr settings for the Arria10.
-
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
----
- arch/arm/boot/dts/socfpga.dtsi         |    1 +
- arch/arm/boot/dts/socfpga_arria10.dtsi |    3 +++
- 2 files changed, 4 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga.dtsi
-+++ b/arch/arm/boot/dts/socfpga.dtsi
-@@ -686,6 +686,7 @@
- 			arm,data-latency = <2 1 1>;
- 			prefetch-data = <1>;
- 			prefetch-instr = <1>;
-+			arm,shared-override;
- 		};
- 
- 		mmc: dwmmc0@ff704000 {
---- a/arch/arm/boot/dts/socfpga_arria10.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
-@@ -573,6 +573,9 @@
- 			interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
- 			cache-unified;
- 			cache-level = <2>;
-+			prefetch-data = <1>;
-+			prefetch-instr = <1>;
-+			arm,shared-override;
- 		};
- 
- 		mmc: dwmmc0@ff808000 {
diff --git a/patches.socfpga/0002-ARM-socfpga_defconfig-Enable-HIGHMEM.patch b/patches.socfpga/0002-ARM-socfpga_defconfig-Enable-HIGHMEM.patch
deleted file mode 100644
index 214247eae241fc..00000000000000
--- a/patches.socfpga/0002-ARM-socfpga_defconfig-Enable-HIGHMEM.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From c9d8a75227efb5a538da3f00cc675f20d9191602 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@opensource.altera.com>
-Date: Tue, 25 Oct 2016 10:55:40 -0500
-Subject: [PATCH 002/103] ARM: socfpga_defconfig: Enable HIGHMEM
-
-All of the SoCFPGA boards have at least 1GB of RAM, so enabling HIGHMEM
-is necessary to avoid the following warning:
-
-[    0.000000] Truncating RAM at 0x00000000-0x40000000 to -0x30000000
-[    0.000000] Consider using a HIGHMEM enabled kernel.
-
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
----
- arch/arm/configs/socfpga_defconfig |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/configs/socfpga_defconfig
-+++ b/arch/arm/configs/socfpga_defconfig
-@@ -25,6 +25,7 @@ CONFIG_PCIE_ALTERA_MSI=y
- CONFIG_SMP=y
- CONFIG_NR_CPUS=2
- CONFIG_AEABI=y
-+CONFIG_HIGHMEM=y
- CONFIG_ZBOOT_ROM_TEXT=0x0
- CONFIG_ZBOOT_ROM_BSS=0x0
- CONFIG_VFP=y
diff --git a/patches.socfpga/0003-ARM-dts-socfpga-enable-qspi-on-the-Cyclone5-devkit.patch b/patches.socfpga/0003-ARM-dts-socfpga-enable-qspi-on-the-Cyclone5-devkit.patch
deleted file mode 100644
index 52ced0ce41567f..00000000000000
--- a/patches.socfpga/0003-ARM-dts-socfpga-enable-qspi-on-the-Cyclone5-devkit.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 60dab8bcc4915614d4853861f6a6ff35c2799d57 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@opensource.altera.com>
-Date: Tue, 18 Oct 2016 22:51:42 -0500
-Subject: [PATCH 003/103] ARM: dts: socfpga: enable qspi on the Cyclone5 devkit
-
-Enable the qspi controller on the devkit and add the flash chip.
-
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
----
- arch/arm/boot/dts/socfpga_cyclone5_socdk.dts |   33 +++++++++++++++++++++++++++
- 1 file changed, 33 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
-@@ -87,6 +87,39 @@
- 	status = "okay";
- };
- 
-+&qspi {
-+	status = "okay";
-+
-+	flash0: n25q00@0 {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "n25q00";
-+		reg = <0>;	/* chip select */
-+		spi-max-frequency = <100000000>;
-+
-+		m25p,fast-read;
-+		cdns,page-size = <256>;
-+		cdns,block-size = <16>;
-+		cdns,read-delay = <4>;
-+		cdns,tshsl-ns = <50>;
-+		cdns,tsd2d-ns = <50>;
-+		cdns,tchsh-ns = <4>;
-+		cdns,tslch-ns = <4>;
-+
-+		partition@qspi-boot {
-+			/* 8MB for raw data. */
-+			label = "Flash 0 Raw Data";
-+			reg = <0x0 0x800000>;
-+		};
-+
-+		partition@qspi-rootfs {
-+			/* 120MB for jffs2 data. */
-+			label = "Flash 0 jffs2 Filesystem";
-+			reg = <0x800000 0x7800000>;
-+		};
-+	};
-+};
-+
- &usb1 {
- 	status = "okay";
- };
diff --git a/patches.socfpga/0004-ARM-dts-socfpga-Add-QSPI-node-for-the-Arria10.patch b/patches.socfpga/0004-ARM-dts-socfpga-Add-QSPI-node-for-the-Arria10.patch
deleted file mode 100644
index 7fc973c163f5a9..00000000000000
--- a/patches.socfpga/0004-ARM-dts-socfpga-Add-QSPI-node-for-the-Arria10.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From ab6809e7a5eb396b38f0cee59b1cda615de6cd69 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@opensource.altera.com>
-Date: Wed, 19 Oct 2016 10:56:33 -0500
-Subject: [PATCH 004/103] ARM: dts: socfpga: Add QSPI node for the Arria10
-
-Add the QSPI device node for Arria10 SOC.
-
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
----
- arch/arm/boot/dts/socfpga_arria10.dtsi |   14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_arria10.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
-@@ -660,6 +660,20 @@
- 			};
- 		};
- 
-+		qspi: spi@ff809000 {
-+			compatible = "cdns,qspi-nor";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <0xff809000 0x100>,
-+			      <0xffa00000 0x100000>;
-+			interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
-+			cdns,fifo-depth = <128>;
-+			cdns,fifo-width = <4>;
-+			cdns,trigger-address = <0x00000000>;
-+			clocks = <&qspi_clk>;
-+			status = "disabled";
-+		};
-+
- 		rst: rstmgr@ffd05000 {
- 			#reset-cells = <1>;
- 			compatible = "altr,rst-mgr";
diff --git a/patches.socfpga/0005-ARM-dts-socfpga-Enable-QSPI-in-Arria10-devkit.patch b/patches.socfpga/0005-ARM-dts-socfpga-Enable-QSPI-in-Arria10-devkit.patch
deleted file mode 100644
index d13b676b0062e2..00000000000000
--- a/patches.socfpga/0005-ARM-dts-socfpga-Enable-QSPI-in-Arria10-devkit.patch
+++ /dev/null
@@ -1,76 +0,0 @@
-From 9004406f4a7df7be3ba20eb5299db80ae89a4de8 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@opensource.altera.com>
-Date: Wed, 19 Oct 2016 10:07:48 -0500
-Subject: [PATCH 005/103] ARM: dts: socfpga: Enable QSPI in Arria10 devkit
-
-Enable the QSPI node and add the flash chip.
-
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
----
- arch/arm/boot/dts/Makefile                       |    1 
- arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts |   49 +++++++++++++++++++++++
- 2 files changed, 50 insertions(+)
- create mode 100644 arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -693,6 +693,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
- 	sh73a0-kzm9g.dtb
- dtb-$(CONFIG_ARCH_SOCFPGA) += \
- 	socfpga_arria5_socdk.dtb \
-+	socfpga_arria10_socdk_qspi.dtb \
- 	socfpga_arria10_socdk_sdmmc.dtb \
- 	socfpga_cyclone5_mcvevk.dtb \
- 	socfpga_cyclone5_socdk.dtb \
---- /dev/null
-+++ b/arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts
-@@ -0,0 +1,49 @@
-+/*
-+ * Copyright (C) 2016 Intel. All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+/dts-v1/;
-+#include "socfpga_arria10_socdk.dtsi"
-+
-+&qspi {
-+	status = "okay";
-+
-+	flash0: n25q00@0 {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "n25q00aa";
-+		reg = <0>;
-+		spi-max-frequency = <100000000>;
-+
-+		m25p,fast-read;
-+		cdns,page-size = <256>;
-+		cdns,block-size = <16>;
-+		cdns,read-delay = <4>;
-+		cdns,tshsl-ns = <50>;
-+		cdns,tsd2d-ns = <50>;
-+		cdns,tchsh-ns = <4>;
-+		cdns,tslch-ns = <4>;
-+
-+		partition@qspi-boot {
-+			label = "Boot and fpga data";
-+			reg = <0x0 0x2720000>;
-+		};
-+
-+		partition@qspi-rootfs {
-+			label = "Root Filesystem - JFFS2";
-+			reg = <0x2720000 0x58E0000>;
-+		};
-+	};
-+};
diff --git a/patches.socfpga/0006-ARM-dts-socfpga-Enable-QSPI-on-the-Cyclone5-sockit.patch b/patches.socfpga/0006-ARM-dts-socfpga-Enable-QSPI-on-the-Cyclone5-sockit.patch
deleted file mode 100644
index f6d1e7518e299c..00000000000000
--- a/patches.socfpga/0006-ARM-dts-socfpga-Enable-QSPI-on-the-Cyclone5-sockit.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 72315cbb4c67745c94487884687e469cff71fa88 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@opensource.altera.com>
-Date: Wed, 19 Oct 2016 14:55:54 -0500
-Subject: [PATCH 006/103] ARM: dts: socfpga: Enable QSPI on the Cyclone5 sockit
-
-Enable the QSPI node and add the flash chip.
-
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
----
-v3: Use n25q00 for the compatible entry for the flash part and
-    tested on SoCKit
-v2: Remove partition entries for the SoCKIT
----
- arch/arm/boot/dts/socfpga_cyclone5_sockit.dts |   21 +++++++++++++++++++++
- 1 file changed, 21 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
-@@ -175,6 +175,27 @@
- 	status = "okay";
- };
- 
-+&qspi {
-+	status = "okay";
-+
-+	flash: flash@0 {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "n25q00";
-+		reg = <0>;
-+		spi-max-frequency = <100000000>;
-+
-+		m25p,fast-read;
-+		cdns,page-size = <256>;
-+		cdns,block-size = <16>;
-+		cdns,read-delay = <4>;
-+		cdns,tshsl-ns = <50>;
-+		cdns,tsd2d-ns = <50>;
-+		cdns,tchsh-ns = <4>;
-+		cdns,tslch-ns = <4>;
-+	};
-+};
-+
- &usb1 {
- 	status = "okay";
- };
diff --git a/patches.socfpga/0007-ARM-dts-socfpga-Enable-QSPI-on-the-Arria5-devkit.patch b/patches.socfpga/0007-ARM-dts-socfpga-Enable-QSPI-on-the-Arria5-devkit.patch
deleted file mode 100644
index 4b18dbdcb3f6e2..00000000000000
--- a/patches.socfpga/0007-ARM-dts-socfpga-Enable-QSPI-on-the-Arria5-devkit.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From b6010bd7a8f9436f60f0b07ea629b5607251f0b2 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@opensource.altera.com>
-Date: Wed, 19 Oct 2016 15:48:07 -0500
-Subject: [PATCH 007/103] ARM: dts: socfpga: Enable QSPI on the Arria5 devkit
-
-Enable the QSPI node and add the flash chip.
-
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
----
- arch/arm/boot/dts/socfpga_arria5_socdk.dts |   33 +++++++++++++++++++++++++++++
- 1 file changed, 33 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts
-+++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
-@@ -82,6 +82,39 @@
- 	status = "okay";
- };
- 
-+&qspi {
-+	status = "okay";
-+
-+	flash: flash@0 {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "n25q256a";
-+		reg = <0>;
-+		spi-max-frequency = <100000000>;
-+
-+		m25p,fast-read;
-+		cdns,page-size = <256>;
-+		cdns,block-size = <16>;
-+		cdns,read-delay = <4>;
-+		cdns,tshsl-ns = <50>;
-+		cdns,tsd2d-ns = <50>;
-+		cdns,tchsh-ns = <4>;
-+		cdns,tslch-ns = <4>;
-+
-+		partition@qspi-boot {
-+			/* 8MB for raw data. */
-+			label = "Flash 0 Raw Data";
-+			reg = <0x0 0x800000>;
-+		};
-+
-+		partition@qspi-rootfs {
-+			/* 120MB for jffs2 data. */
-+			label = "Flash 0 jffs2 Filesystem";
-+			reg = <0x800000 0x7800000>;
-+		};
-+	};
-+};
-+
- &usb1 {
- 	status = "okay";
- };
diff --git a/patches.socfpga/0008-ARM-socfpga_defconfig-enable-FS-configs-to-support-A.patch b/patches.socfpga/0008-ARM-socfpga_defconfig-enable-FS-configs-to-support-A.patch
deleted file mode 100644
index aa320e347b5dbc..00000000000000
--- a/patches.socfpga/0008-ARM-socfpga_defconfig-enable-FS-configs-to-support-A.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 81e36c3e01bbc9cbee6a3882b18d836667758d25 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Tue, 8 Nov 2016 15:01:22 -0600
-Subject: [PATCH 008/103] ARM: socfpga_defconfig: enable FS configs to support
- Angstrom filesystem
-
-systemd on the Angstrom root file system expects AUTOFS to be configured
-as a module and NFSD to be statically linked into the kernel. This patch
-adds the necessary configuration to get rid two "FAILED" error messages
-during systemd startup.
-
-Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com>
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
-v2: provide a more descriptive changelog
----
- arch/arm/configs/socfpga_defconfig |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/configs/socfpga_defconfig
-+++ b/arch/arm/configs/socfpga_defconfig
-@@ -107,13 +107,18 @@ CONFIG_EXT2_FS=y
- CONFIG_EXT2_FS_XATTR=y
- CONFIG_EXT2_FS_POSIX_ACL=y
- CONFIG_EXT3_FS=y
-+CONFIG_AUTOFS4_FS=y
- CONFIG_VFAT_FS=y
- CONFIG_NTFS_FS=y
- CONFIG_NTFS_RW=y
- CONFIG_TMPFS=y
- CONFIG_CONFIGFS_FS=y
- CONFIG_NFS_FS=y
-+CONFIG_NFS_V3_ACL=y
- CONFIG_ROOT_NFS=y
-+CONFIG_NFSD=y
-+CONFIG_NFSD_V3_ACL=y
-+CONFIG_NFSD_V4=y
- CONFIG_NLS_CODEPAGE_437=y
- CONFIG_NLS_ISO8859_1=y
- CONFIG_PRINTK_TIME=y
diff --git a/patches.socfpga/0009-dt-bindings-Add-Macnica-Americas-vendor-prefix.patch b/patches.socfpga/0009-dt-bindings-Add-Macnica-Americas-vendor-prefix.patch
deleted file mode 100644
index 695600e51d7d45..00000000000000
--- a/patches.socfpga/0009-dt-bindings-Add-Macnica-Americas-vendor-prefix.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-From fdcef7128b2fcfa244e5b2ae5e2e323a819a2158 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Tue, 1 Nov 2016 10:36:30 -0500
-Subject: [PATCH 009/103] dt-bindings: Add Macnica Americas vendor prefix
-
-Add a vendor prefix for the Macnica company.
-http://http://www.macnica.com
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
-Signed-off-by: Rob Herring <robh@kernel.org>
----
- Documentation/devicetree/bindings/vendor-prefixes.txt |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/Documentation/devicetree/bindings/vendor-prefixes.txt
-+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
-@@ -159,6 +159,7 @@ lg	LG Corporation
- linux	Linux-specific binding
- lltc	Linear Technology Corporation
- lsi	LSI Corp. (LSI Logic)
-+macnica	Macnica Americas
- marvell	Marvell Technology Group Ltd.
- maxim	Maxim Integrated Products
- meas	Measurement Specialties
diff --git a/patches.socfpga/0010-dt-bindings-Add-vendor-prefix-for-Terasic-Inc.patch b/patches.socfpga/0010-dt-bindings-Add-vendor-prefix-for-Terasic-Inc.patch
deleted file mode 100644
index 4ac6b2b5c0076b..00000000000000
--- a/patches.socfpga/0010-dt-bindings-Add-vendor-prefix-for-Terasic-Inc.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 5ae491dadecfd37b8f00965ada793be6c230dddc Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Tue, 1 Nov 2016 10:36:31 -0500
-Subject: [PATCH 010/103] dt-bindings: Add vendor prefix for Terasic Inc.
-
-Add a vendor prefix for Terasic.
-
-http://www.terasic.com
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
-Signed-off-by: Rob Herring <robh@kernel.org>
----
- Documentation/devicetree/bindings/vendor-prefixes.txt |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/Documentation/devicetree/bindings/vendor-prefixes.txt
-+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
-@@ -277,6 +277,7 @@ tcg	Trusted Computing Group
- tcl	Toby Churchill Ltd.
- technexion	TechNexion
- technologic	Technologic Systems
-+terasic	Terasic Inc.
- thine	THine Electronics, Inc.
- ti	Texas Instruments
- tlm	Trusted Logic Mobility
diff --git a/patches.socfpga/0011-dt-bindings-Add-vendor-prefix-for-Samtec.patch b/patches.socfpga/0011-dt-bindings-Add-vendor-prefix-for-Samtec.patch
deleted file mode 100644
index d9522d878a0d23..00000000000000
--- a/patches.socfpga/0011-dt-bindings-Add-vendor-prefix-for-Samtec.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 886e6363f55f9996be2c7f6e122fbd90fc01c85c Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Tue, 1 Nov 2016 10:36:32 -0500
-Subject: [PATCH 011/103] dt-bindings: Add vendor prefix for Samtec
-
-Add a vendor prefix for Samtec, a Softing company.
-
-http://www.samtec.de
-http://www.samtec.org
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
-Signed-off-by: Rob Herring <robh@kernel.org>
----
- Documentation/devicetree/bindings/vendor-prefixes.txt |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/Documentation/devicetree/bindings/vendor-prefixes.txt
-+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
-@@ -233,6 +233,7 @@ richtek	Richtek Technology Corporation
- ricoh	Ricoh Co. Ltd.
- rockchip	Fuzhou Rockchip Electronics Co., Ltd
- samsung	Samsung Semiconductor
-+samtec	Samtec/Softing company
- sandisk	Sandisk Corporation
- sbs	Smart Battery System
- schindler	Schindler
diff --git a/patches.socfpga/0012-ARM-dts-socfpga-enable-GPIO-and-LEDs-for-Cyclone5-an.patch b/patches.socfpga/0012-ARM-dts-socfpga-enable-GPIO-and-LEDs-for-Cyclone5-an.patch
deleted file mode 100644
index 861b7360c49b6c..00000000000000
--- a/patches.socfpga/0012-ARM-dts-socfpga-enable-GPIO-and-LEDs-for-Cyclone5-an.patch
+++ /dev/null
@@ -1,117 +0,0 @@
-From 68ba0c63510af673e2400895aaaa5a6c7c9ec622 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Mon, 12 Dec 2016 22:02:44 -0600
-Subject: [PATCH 012/103] ARM: dts: socfpga: enable GPIO and LEDs for Cyclone5
- and Arria5 devkits
-
-Enable all the GPIO ports and define the GPIO-based leds on the Cyclone5 and
-Arria5 devkits.
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/boot/dts/socfpga_arria5_socdk.dts   |   35 +++++++++++++++++++++++++++
- arch/arm/boot/dts/socfpga_cyclone5_socdk.dts |   31 +++++++++++++++++++++++
- 2 files changed, 66 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts
-+++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
-@@ -39,6 +39,29 @@
- 		ethernet0 = &gmac1;
- 	};
- 
-+	leds {
-+		compatible = "gpio-leds";
-+		hps0 {
-+			label = "hps_led0";
-+			gpios = <&porta 0 1>;
-+		};
-+
-+		hps1 {
-+			label = "hps_led1";
-+			gpios = <&portb 11 1>;
-+		};
-+
-+		hps2 {
-+			label = "hps_led2";
-+			gpios = <&porta 17 1>;
-+		};
-+
-+		hps3 {
-+			label = "hps_led3";
-+			gpios = <&porta 18 1>;
-+		};
-+	};
-+
- 	regulator_3_3v: 3-3-v-regulator {
- 		compatible = "regulator-fixed";
- 		regulator-name = "3.3V";
-@@ -61,6 +84,18 @@
- 	rxc-skew-ps = <2000>;
- };
- 
-+&gpio0 {
-+	status = "okay";
-+};
-+
-+&gpio1 {
-+	status = "okay";
-+};
-+
-+&gpio2 {
-+	status = "okay";
-+};
-+
- &i2c0 {
- 	status = "okay";
- 
---- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
-@@ -39,6 +39,29 @@
- 		ethernet0 = &gmac1;
- 	};
- 
-+	leds {
-+		compatible = "gpio-leds";
-+		hps0 {
-+			label = "hps_led0";
-+			gpios = <&portb 15 1>;
-+		};
-+
-+		hps1 {
-+			label = "hps_led1";
-+			gpios = <&portb 14 1>;
-+		};
-+
-+		hps2 {
-+			label = "hps_led2";
-+			gpios = <&portb 13 1>;
-+		};
-+
-+		hps3 {
-+			label = "hps_led3";
-+			gpios = <&portb 12 1>;
-+		};
-+	};
-+
- 	regulator_3_3v: 3-3-v-regulator {
- 		compatible = "regulator-fixed";
- 		regulator-name = "3.3V";
-@@ -61,10 +84,18 @@
- 	rxc-skew-ps = <2000>;
- };
- 
-+&gpio0 {
-+	status = "okay";
-+};
-+
- &gpio1 {
- 	status = "okay";
- };
- 
-+&gpio2 {
-+	status = "okay";
-+};
-+
- &i2c0 {
- 	status = "okay";
- 
diff --git a/patches.socfpga/0013-ARM-dts-socfpga-set-desired-i2c-clock-on-Cyclone5-an.patch b/patches.socfpga/0013-ARM-dts-socfpga-set-desired-i2c-clock-on-Cyclone5-an.patch
deleted file mode 100644
index ebcff2431c107c..00000000000000
--- a/patches.socfpga/0013-ARM-dts-socfpga-set-desired-i2c-clock-on-Cyclone5-an.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From bae526e301c40e073379cbcf7d8239905ffcaf7f Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Tue, 13 Dec 2016 16:52:11 -0600
-Subject: [PATCH 013/103] ARM: dts: socfpga: set desired i2c clock on Cyclone5
- and Arria5 devkits
-
-The I2C LCD display on the Cyclone5 and Arria5 devkits is only capable of
-the standard 100 kHz clock. Set the "clock-frequency" of the I2C node
-to be 100000.
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/boot/dts/socfpga_arria5_socdk.dts   |    8 ++++++++
- arch/arm/boot/dts/socfpga_cyclone5_socdk.dts |    8 ++++++++
- 2 files changed, 16 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts
-+++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
-@@ -98,6 +98,14 @@
- 
- &i2c0 {
- 	status = "okay";
-+	clock-frequency = <100000>;
-+
-+	/*
-+	 * adjust the falling times to decrease the i2c frequency to 50Khz
-+	 * because the LCD module does not work at the standard 100Khz
-+	 */
-+	i2c-sda-falling-time-ns = <5000>;
-+	i2c-scl-falling-time-ns = <5000>;
- 
- 	eeprom@51 {
- 		compatible = "atmel,24c32";
---- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
-@@ -98,6 +98,14 @@
- 
- &i2c0 {
- 	status = "okay";
-+	clock-frequency = <100000>;
-+
-+	/*
-+	 * adjust the falling times to decrease the i2c frequency to 50Khz
-+	 * because the LCD module does not work at the standard 100Khz
-+	 */
-+	i2c-sda-falling-time-ns = <5000>;
-+	i2c-scl-falling-time-ns = <5000>;
- 
- 	eeprom@51 {
- 		compatible = "atmel,24c32";
diff --git a/patches.socfpga/0014-ARM-dts-socfpga-Add-Rohm-DH2228FV-DAC.patch b/patches.socfpga/0014-ARM-dts-socfpga-Add-Rohm-DH2228FV-DAC.patch
deleted file mode 100644
index 4f3e40f26d38a0..00000000000000
--- a/patches.socfpga/0014-ARM-dts-socfpga-Add-Rohm-DH2228FV-DAC.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 3f5e1bdb1957578c511107b2e4bef7c5d287b1bc Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Thu, 15 Dec 2016 23:30:03 -0600
-Subject: [PATCH 014/103] ARM: dts: socfpga: Add Rohm DH2228FV DAC
-
-Enable the SPI node and add the Rohm DH2228FV DAC.
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/boot/dts/socfpga_cyclone5_socdk.dts |   10 ++++++++++
- 1 file changed, 10 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
-@@ -159,6 +159,16 @@
- 	};
- };
- 
-+&spi0 {
-+	status = "okay";
-+
-+	spidev@0 {
-+		compatible = "rohm,dh2228fv";
-+		reg = <0>;
-+		spi-max-frequency = <1000000>;
-+	};
-+};
-+
- &usb1 {
- 	status = "okay";
- };
diff --git a/patches.socfpga/0015-ARM-dts-socfpga-enable-CAN-on-Cyclone5-devkit.patch b/patches.socfpga/0015-ARM-dts-socfpga-enable-CAN-on-Cyclone5-devkit.patch
deleted file mode 100644
index 38c7c176aa172b..00000000000000
--- a/patches.socfpga/0015-ARM-dts-socfpga-enable-CAN-on-Cyclone5-devkit.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 70fa6f9a9bf3bbdcb24f77876dd3787986c4623a Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Fri, 16 Dec 2016 16:55:44 -0600
-Subject: [PATCH 015/103] ARM: dts: socfpga: enable CAN on Cyclone5 devkit
-
-Enable the CAN node on the Cyclone5 devkit.
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/boot/dts/socfpga_cyclone5_socdk.dts |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
-@@ -70,6 +70,10 @@
- 	};
- };
- 
-+&can0 {
-+	status = "okay";
-+};
-+
- &gmac1 {
- 	status = "okay";
- 	phy-mode = "rgmii";
diff --git a/patches.socfpga/0016-ARM-dts-socfpga-enable-watchdog-timer-on-Arria5-and-.patch b/patches.socfpga/0016-ARM-dts-socfpga-enable-watchdog-timer-on-Arria5-and-.patch
deleted file mode 100644
index 136e3cfedfe762..00000000000000
--- a/patches.socfpga/0016-ARM-dts-socfpga-enable-watchdog-timer-on-Arria5-and-.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 6442fc6873b15415fce505c7dbc3a8e824bb8163 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Fri, 16 Dec 2016 17:15:00 -0600
-Subject: [PATCH 016/103] ARM: dts: socfpga: enable watchdog timer on Arria5
- and Arria10
-
-Enable the watchdog for Arria5 and Arria10.
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/boot/dts/socfpga_arria10_socdk.dtsi |    4 ++++
- arch/arm/boot/dts/socfpga_arria5.dtsi        |    4 ++++
- 2 files changed, 8 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-@@ -105,3 +105,7 @@
- &usb0 {
- 	status = "okay";
- };
-+
-+&watchdog0 {
-+	status = "okay";
-+};
---- a/arch/arm/boot/dts/socfpga_arria5.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
-@@ -42,3 +42,7 @@
- 		};
- 	};
- };
-+
-+&watchdog0 {
-+	status = "okay";
-+};
diff --git a/patches.socfpga/0017-ARM-dts-socfpga-add-the-LTC2977-power-monitor-on-Arr.patch b/patches.socfpga/0017-ARM-dts-socfpga-add-the-LTC2977-power-monitor-on-Arr.patch
deleted file mode 100644
index 656fbdc6a59b84..00000000000000
--- a/patches.socfpga/0017-ARM-dts-socfpga-add-the-LTC2977-power-monitor-on-Arr.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From b8ccfd2af325b1bb2cc3fa70cd688850a32e6a54 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Sat, 17 Dec 2016 21:42:32 -0600
-Subject: [PATCH 017/103] ARM: dts: socfpga: add the LTC2977 power monitor on
- Arria10 devkit
-
-Add the I2C LTC 2977 power monitor that is on the Arria10 devkit.
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/boot/dts/socfpga_arria10_socdk.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-@@ -96,6 +96,11 @@
- 		compatible = "dallas,ds1339";
- 		reg = <0x68>;
- 	};
-+
-+	ltc@5c {
-+		compatible = "ltc2977";
-+		reg = <0x5c>;
-+	};
- };
- 
- &uart1 {
diff --git a/patches.socfpga/0018-ARM-dts-socfpga-add-fpga-manager-node-for-Arria10.patch b/patches.socfpga/0018-ARM-dts-socfpga-add-fpga-manager-node-for-Arria10.patch
deleted file mode 100644
index 252f94d103422d..00000000000000
--- a/patches.socfpga/0018-ARM-dts-socfpga-add-fpga-manager-node-for-Arria10.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From f968f1aa6c67873082498738e7756e2311eac0af Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Sat, 17 Dec 2016 22:45:03 -0600
-Subject: [PATCH 018/103] ARM: dts: socfpga: add fpga-manager node for Arria10
-
-Add the FPGA manger DTS entry for Arria10.
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/boot/dts/socfpga_arria10.dtsi |    9 +++++++++
- 1 file changed, 9 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_arria10.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
-@@ -512,6 +512,15 @@
- 			};
- 		};
- 
-+		fpga_mgr: fpga-mgr@ffd03000 {
-+			compatible = "altr,socfpga-a10-fpga-mgr";
-+			reg = <0xffd03000 0x100
-+			       0xffcfe400 0x20>;
-+			clocks = <&l4_mp_clk>;
-+			resets = <&rst FPGAMGR_RESET>;
-+			reset-names = "fpgamgr";
-+		};
-+
- 		i2c0: i2c@ffc02200 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
diff --git a/patches.socfpga/0019-ARM-dts-socfpga-fpga-manager-data-is-32-bits.patch b/patches.socfpga/0019-ARM-dts-socfpga-fpga-manager-data-is-32-bits.patch
deleted file mode 100644
index 0be678f6503173..00000000000000
--- a/patches.socfpga/0019-ARM-dts-socfpga-fpga-manager-data-is-32-bits.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 5a87081d681bad5b577d1fe2a2a83021cfca989f Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Mon, 19 Dec 2016 22:34:00 -0600
-Subject: [PATCH 019/103] ARM: dts: socfpga: fpga manager data is 32 bits
-
-Adjust regs property for the FPGA manager data register to
-properly reflect that it is a single 32 bit register.
-
-Signed-off-by: Dalon Westergreen <dwesterg@altera.com>
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/boot/dts/socfpga.dtsi |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/socfpga.dtsi
-+++ b/arch/arm/boot/dts/socfpga.dtsi
-@@ -516,7 +516,7 @@
- 		fpgamgr0: fpgamgr@ff706000 {
- 			compatible = "altr,socfpga-fpga-mgr";
- 			reg = <0xff706000 0x1000
--			       0xffb90000 0x1000>;
-+			       0xffb90000 0x4>;
- 			interrupts = <0 175 4>;
- 		};
- 
diff --git a/patches.socfpga/0020-ARM-dts-socfpga-add-fpga-region-support-on-Arria10.patch b/patches.socfpga/0020-ARM-dts-socfpga-add-fpga-region-support-on-Arria10.patch
deleted file mode 100644
index 273ebb6dc89dc5..00000000000000
--- a/patches.socfpga/0020-ARM-dts-socfpga-add-fpga-region-support-on-Arria10.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From f534c9a2d107eb6255532f19decc1dde219a25e7 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Mon, 19 Dec 2016 23:21:27 -0600
-Subject: [PATCH 020/103] ARM: dts: socfpga: add fpga region support on Arria10
-
-Add the base FPGA region for DT overlay support in FPGA programming.
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com>
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/boot/dts/socfpga_arria10.dtsi |    8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_arria10.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
-@@ -83,6 +83,14 @@
- 			};
- 		};
- 
-+		base_fpga_region {
-+			#address-cells = <0x1>;
-+			#size-cells = <0x1>;
-+
-+			compatible = "fpga-region";
-+			fpga-mgr = <&fpga_mgr>;
-+		};
-+
- 		clkmgr@ffd04000 {
- 				compatible = "altr,clk-mgr";
- 				reg = <0xffd04000 0x1000>;
diff --git a/patches.socfpga/0021-ARM-dts-socfpga-add-missing-compatible-string-for-SD.patch b/patches.socfpga/0021-ARM-dts-socfpga-add-missing-compatible-string-for-SD.patch
deleted file mode 100644
index ce6c1806b7400a..00000000000000
--- a/patches.socfpga/0021-ARM-dts-socfpga-add-missing-compatible-string-for-SD.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 36760f8265fe47bc7176a58aa85ca6c3ec59f812 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Tue, 20 Dec 2016 00:01:48 -0600
-Subject: [PATCH 021/103] ARM: dts: socfpga: add missing compatible string for
- SDRAM controller
-
-Add "altr,sdr-ctl" to the SDRAM controller node.
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/boot/dts/socfpga.dtsi         |    2 +-
- arch/arm/boot/dts/socfpga_arria10.dtsi |    2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/socfpga.dtsi
-+++ b/arch/arm/boot/dts/socfpga.dtsi
-@@ -719,7 +719,7 @@
- 		};
- 
- 		sdr: sdr@ffc25000 {
--			compatible = "syscon";
-+			compatible = "altr,sdr-ctl", "syscon";
- 			reg = <0xffc25000 0x1000>;
- 		};
- 
---- a/arch/arm/boot/dts/socfpga_arria10.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
-@@ -580,7 +580,7 @@
- 		};
- 
- 		sdr: sdr@ffc25000 {
--			compatible = "syscon";
-+			compatible = "altr,sdr-ctl", "syscon";
- 			reg = <0xffcfb100 0x80>;
- 		};
- 
diff --git a/patches.socfpga/0022-ARM-dts-watchdog0-cannot-reliably-trigger-reset.patch b/patches.socfpga/0022-ARM-dts-watchdog0-cannot-reliably-trigger-reset.patch
deleted file mode 100644
index 38c6f1ef7c16ae..00000000000000
--- a/patches.socfpga/0022-ARM-dts-watchdog0-cannot-reliably-trigger-reset.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 22f774c2c8c6b463883e3cbada27b5b74155b121 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Wed, 25 Jan 2017 10:01:28 -0600
-Subject: [PATCH 022/103] ARM: dts: watchdog0 cannot reliably trigger reset
-
-On the Arria10, because of hardware bug, watchdog0 cannot reliably trigger
-a reset to the CPU. The workaround would be to use watchdog1 instead.
-
-Also for watchdog1, there is a dependency on the bootloader to enable the
-boot_clk source to be from the cb_intosc_hs_clk/2, versus from EOSC1. This
-corresponds to the (SWCTRLBTCLKEN & SWCTRLBTCLKSEL) bits enabled in the
-control register in the clock manager module of Arria10.
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/boot/dts/socfpga_arria10_socdk.dtsi |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-@@ -111,6 +111,6 @@
- 	status = "okay";
- };
- 
--&watchdog0 {
-+&watchdog1 {
- 	status = "okay";
- };
diff --git a/patches.socfpga/0023-MAINTAINERS-socfpga-update-email-for-Dinh-Nguyen.patch b/patches.socfpga/0023-MAINTAINERS-socfpga-update-email-for-Dinh-Nguyen.patch
deleted file mode 100644
index 0aa0b17e88b5e4..00000000000000
--- a/patches.socfpga/0023-MAINTAINERS-socfpga-update-email-for-Dinh-Nguyen.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From bd1f3567243bb08db75c610e7475968b2dec1373 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Fri, 3 Feb 2017 09:29:07 -0600
-Subject: [PATCH 023/103] MAINTAINERS: socfpga: update email for Dinh Nguyen
-
-My opensource.altera.com email will be going away soon.
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
----
- MAINTAINERS |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -1751,7 +1751,7 @@ F:	drivers/soc/renesas/
- F:	include/linux/soc/renesas/
- 
- ARM/SOCFPGA ARCHITECTURE
--M:	Dinh Nguyen <dinguyen@opensource.altera.com>
-+M:	Dinh Nguyen <dinguyen@kernel.org>
- S:	Maintained
- F:	arch/arm/mach-socfpga/
- F:	arch/arm/boot/dts/socfpga*
-@@ -1761,7 +1761,7 @@ W:	http://www.rocketboards.org
- T:	git git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git
- 
- ARM/SOCFPGA CLOCK FRAMEWORK SUPPORT
--M:	Dinh Nguyen <dinguyen@opensource.altera.com>
-+M:	Dinh Nguyen <dinguyen@kernel.org>
- S:	Maintained
- F:	drivers/clk/socfpga/
- 
diff --git a/patches.socfpga/0024-of-overlay-add-of-overlay-notifications.patch b/patches.socfpga/0024-of-overlay-add-of-overlay-notifications.patch
deleted file mode 100644
index bc47fd3b034c2b..00000000000000
--- a/patches.socfpga/0024-of-overlay-add-of-overlay-notifications.patch
+++ /dev/null
@@ -1,175 +0,0 @@
-From 34c5493a5611f3c1481d98767657ead412c55c18 Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Tue, 1 Nov 2016 14:14:22 -0500
-Subject: [PATCH 024/103] of/overlay: add of overlay notifications
-
-This patch add of overlay notifications.
-
-When DT overlays are being added, some drivers/subsystems
-need to see device tree overlays before the changes go into
-the live tree.
-
-This is distinct from reconfig notifiers that are
-post-apply or post-remove and which issue very granular
-notifications without providing access to the context
-of a whole overlay.
-
-The following 4 notificatons are issued:
-  OF_OVERLAY_PRE_APPLY
-  OF_OVERLAY_POST_APPLY
-  OF_OVERLAY_PRE_REMOVE
-  OF_OVERLAY_POST_REMOVE
-
-In the case of pre-apply notification, if the notifier
-returns error, the overlay will be rejected.
-
-This patch exports two functions for registering/unregistering
-notifications:
-  of_overlay_notifier_register(struct notifier_block *nb)
-  of_overlay_notifier_unregister(struct notifier_block *nb)
-
-The of_mutex is held during these notifications. The
-notification data includes pointers to the overlay target
-and the overlay:
-
-struct of_overlay_notify_data {
-       struct device_node *overlay;
-       struct device_node *target;
-};
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/of/overlay.c |   47 ++++++++++++++++++++++++++++++++++++++++++++++-
- include/linux/of.h   |   25 +++++++++++++++++++++++++
- 2 files changed, 71 insertions(+), 1 deletion(-)
-
---- a/drivers/of/overlay.c
-+++ b/drivers/of/overlay.c
-@@ -58,6 +58,41 @@ struct of_overlay {
- static int of_overlay_apply_one(struct of_overlay *ov,
- 		struct device_node *target, const struct device_node *overlay);
- 
-+static BLOCKING_NOTIFIER_HEAD(of_overlay_chain);
-+
-+int of_overlay_notifier_register(struct notifier_block *nb)
-+{
-+	return blocking_notifier_chain_register(&of_overlay_chain, nb);
-+}
-+EXPORT_SYMBOL_GPL(of_overlay_notifier_register);
-+
-+int of_overlay_notifier_unregister(struct notifier_block *nb)
-+{
-+	return blocking_notifier_chain_unregister(&of_overlay_chain, nb);
-+}
-+EXPORT_SYMBOL_GPL(of_overlay_notifier_unregister);
-+
-+static int of_overlay_notify(struct of_overlay *ov,
-+			     enum of_overlay_notify_action action)
-+{
-+	struct of_overlay_notify_data nd;
-+	int i, ret;
-+
-+	for (i = 0; i < ov->count; i++) {
-+		struct of_overlay_info *ovinfo = &ov->ovinfo_tab[i];
-+
-+		nd.target = ovinfo->target;
-+		nd.overlay = ovinfo->overlay;
-+
-+		ret = blocking_notifier_call_chain(&of_overlay_chain,
-+						   action, &nd);
-+		if (ret)
-+			return notifier_to_errno(ret);
-+	}
-+
-+	return 0;
-+}
-+
- static int of_overlay_apply_single_property(struct of_overlay *ov,
- 		struct device_node *target, struct property *prop)
- {
-@@ -368,6 +403,13 @@ int of_overlay_create(struct device_node
- 		goto err_free_idr;
- 	}
- 
-+	err = of_overlay_notify(ov, OF_OVERLAY_PRE_APPLY);
-+	if (err < 0) {
-+		pr_err("%s: Pre-apply notifier failed (err=%d)\n",
-+		       __func__, err);
-+		goto err_free_idr;
-+	}
-+
- 	/* apply the overlay */
- 	err = of_overlay_apply(ov);
- 	if (err)
-@@ -382,6 +424,8 @@ int of_overlay_create(struct device_node
- 	/* add to the tail of the overlay list */
- 	list_add_tail(&ov->node, &ov_list);
- 
-+	of_overlay_notify(ov, OF_OVERLAY_POST_APPLY);
-+
- 	mutex_unlock(&of_mutex);
- 
- 	return id;
-@@ -498,9 +542,10 @@ int of_overlay_destroy(int id)
- 		goto out;
- 	}
- 
--
-+	of_overlay_notify(ov, OF_OVERLAY_PRE_REMOVE);
- 	list_del(&ov->node);
- 	__of_changeset_revert(&ov->cset);
-+	of_overlay_notify(ov, OF_OVERLAY_POST_REMOVE);
- 	of_free_overlay_info(ov);
- 	idr_remove(&ov_idr, id);
- 	of_changeset_destroy(&ov->cset);
---- a/include/linux/of.h
-+++ b/include/linux/of.h
-@@ -1266,6 +1266,18 @@ static inline bool of_device_is_system_p
-  * Overlay support
-  */
- 
-+enum of_overlay_notify_action {
-+	OF_OVERLAY_PRE_APPLY,
-+	OF_OVERLAY_POST_APPLY,
-+	OF_OVERLAY_PRE_REMOVE,
-+	OF_OVERLAY_POST_REMOVE,
-+};
-+
-+struct of_overlay_notify_data {
-+	struct device_node *overlay;
-+	struct device_node *target;
-+};
-+
- #ifdef CONFIG_OF_OVERLAY
- 
- /* ID based overlays; the API for external users */
-@@ -1273,6 +1285,9 @@ int of_overlay_create(struct device_node
- int of_overlay_destroy(int id);
- int of_overlay_destroy_all(void);
- 
-+int of_overlay_notifier_register(struct notifier_block *nb);
-+int of_overlay_notifier_unregister(struct notifier_block *nb);
-+
- #else
- 
- static inline int of_overlay_create(struct device_node *tree)
-@@ -1290,6 +1305,16 @@ static inline int of_overlay_destroy_all
- 	return -ENOTSUPP;
- }
- 
-+static inline int of_overlay_notifier_register(struct notifier_block *nb)
-+{
-+	return 0;
-+}
-+
-+static inline int of_overlay_notifier_unregister(struct notifier_block *nb)
-+{
-+	return 0;
-+}
-+
- #endif
- 
- #endif /* _LINUX_OF_H */
diff --git a/patches.socfpga/0025-fpga-add-method-to-get-fpga-manager-from-device.patch b/patches.socfpga/0025-fpga-add-method-to-get-fpga-manager-from-device.patch
deleted file mode 100644
index a671185167e684..00000000000000
--- a/patches.socfpga/0025-fpga-add-method-to-get-fpga-manager-from-device.patch
+++ /dev/null
@@ -1,159 +0,0 @@
-From 6cc9e7b146fc8e24e1ca6b7ae0b0e27ca6cc3fae Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Tue, 1 Nov 2016 14:14:23 -0500
-Subject: [PATCH 025/103] fpga: add method to get fpga manager from device
-
-The intent is to provide a non-DT method of getting
-ahold of a FPGA manager to do some FPGA programming.
-
-This patch refactors of_fpga_mgr_get() to reuse most of it
-while adding a new method fpga_mgr_get() for getting a
-pointer to a fpga manager struct, given the device.
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- Documentation/fpga/fpga-mgr.txt |    6 ++-
- drivers/fpga/fpga-mgr.c         |   76 ++++++++++++++++++++++++++++------------
- include/linux/fpga/fpga-mgr.h   |    2 +
- 3 files changed, 60 insertions(+), 24 deletions(-)
-
---- a/Documentation/fpga/fpga-mgr.txt
-+++ b/Documentation/fpga/fpga-mgr.txt
-@@ -38,11 +38,13 @@ To get/put a reference to a FPGA manager
- -----------------------------------------
- 
- 	struct fpga_manager *of_fpga_mgr_get(struct device_node *node);
-+	struct fpga_manager *fpga_mgr_get(struct device *dev);
-+
-+Given a DT node or device, get an exclusive reference to a FPGA manager.
- 
- 	void fpga_mgr_put(struct fpga_manager *mgr);
- 
--Given a DT node, get an exclusive reference to a FPGA manager or release
--the reference.
-+Release the reference.
- 
- 
- To register or unregister the low level FPGA-specific driver:
---- a/drivers/fpga/fpga-mgr.c
-+++ b/drivers/fpga/fpga-mgr.c
-@@ -39,7 +39,8 @@ static struct class *fpga_mgr_class;
-  * Step the low level fpga manager through the device-specific steps of getting
-  * an FPGA ready to be configured, writing the image to it, then doing whatever
-  * post-configuration steps necessary.  This code assumes the caller got the
-- * mgr pointer from of_fpga_mgr_get() and checked that it is not an error code.
-+ * mgr pointer from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is
-+ * not an error code.
-  *
-  * Return: 0 on success, negative error code otherwise.
-  */
-@@ -99,7 +100,8 @@ EXPORT_SYMBOL_GPL(fpga_mgr_buf_load);
-  * Request an FPGA image using the firmware class, then write out to the FPGA.
-  * Update the state before each step to provide info on what step failed if
-  * there is a failure.  This code assumes the caller got the mgr pointer
-- * from of_fpga_mgr_get() and checked that it is not an error code.
-+ * from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is not an error
-+ * code.
-  *
-  * Return: 0 on success, negative error code otherwise.
-  */
-@@ -181,30 +183,11 @@ static struct attribute *fpga_mgr_attrs[
- };
- ATTRIBUTE_GROUPS(fpga_mgr);
- 
--static int fpga_mgr_of_node_match(struct device *dev, const void *data)
--{
--	return dev->of_node == data;
--}
--
--/**
-- * of_fpga_mgr_get - get an exclusive reference to a fpga mgr
-- * @node:	device node
-- *
-- * Given a device node, get an exclusive reference to a fpga mgr.
-- *
-- * Return: fpga manager struct or IS_ERR() condition containing error code.
-- */
--struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
-+struct fpga_manager *__fpga_mgr_get(struct device *dev)
- {
- 	struct fpga_manager *mgr;
--	struct device *dev;
- 	int ret = -ENODEV;
- 
--	dev = class_find_device(fpga_mgr_class, NULL, node,
--				fpga_mgr_of_node_match);
--	if (!dev)
--		return ERR_PTR(-ENODEV);
--
- 	mgr = to_fpga_manager(dev);
- 	if (!mgr)
- 		goto err_dev;
-@@ -226,6 +209,55 @@ err_dev:
- 	put_device(dev);
- 	return ERR_PTR(ret);
- }
-+
-+static int fpga_mgr_dev_match(struct device *dev, const void *data)
-+{
-+	return dev->parent == data;
-+}
-+
-+/**
-+ * fpga_mgr_get - get an exclusive reference to a fpga mgr
-+ * @dev:	parent device that fpga mgr was registered with
-+ *
-+ * Given a device, get an exclusive reference to a fpga mgr.
-+ *
-+ * Return: fpga manager struct or IS_ERR() condition containing error code.
-+ */
-+struct fpga_manager *fpga_mgr_get(struct device *dev)
-+{
-+	struct device *mgr_dev = class_find_device(fpga_mgr_class, NULL, dev,
-+						   fpga_mgr_dev_match);
-+	if (!mgr_dev)
-+		return ERR_PTR(-ENODEV);
-+
-+	return __fpga_mgr_get(mgr_dev);
-+}
-+EXPORT_SYMBOL_GPL(fpga_mgr_get);
-+
-+static int fpga_mgr_of_node_match(struct device *dev, const void *data)
-+{
-+	return dev->of_node == data;
-+}
-+
-+/**
-+ * of_fpga_mgr_get - get an exclusive reference to a fpga mgr
-+ * @node:	device node
-+ *
-+ * Given a device node, get an exclusive reference to a fpga mgr.
-+ *
-+ * Return: fpga manager struct or IS_ERR() condition containing error code.
-+ */
-+struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
-+{
-+	struct device *dev;
-+
-+	dev = class_find_device(fpga_mgr_class, NULL, node,
-+				fpga_mgr_of_node_match);
-+	if (!dev)
-+		return ERR_PTR(-ENODEV);
-+
-+	return __fpga_mgr_get(dev);
-+}
- EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
- 
- /**
---- a/include/linux/fpga/fpga-mgr.h
-+++ b/include/linux/fpga/fpga-mgr.h
-@@ -117,6 +117,8 @@ int fpga_mgr_firmware_load(struct fpga_m
- 
- struct fpga_manager *of_fpga_mgr_get(struct device_node *node);
- 
-+struct fpga_manager *fpga_mgr_get(struct device *dev);
-+
- void fpga_mgr_put(struct fpga_manager *mgr);
- 
- int fpga_mgr_register(struct device *dev, const char *name,
diff --git a/patches.socfpga/0026-doc-fpga-mgr-add-fpga-image-info-to-api.patch b/patches.socfpga/0026-doc-fpga-mgr-add-fpga-image-info-to-api.patch
deleted file mode 100644
index f7b3d359fc48b0..00000000000000
--- a/patches.socfpga/0026-doc-fpga-mgr-add-fpga-image-info-to-api.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From d4a7acc57d114fb9b54dd9dd9a21465393bb90e8 Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Tue, 1 Nov 2016 14:14:24 -0500
-Subject: [PATCH 026/103] doc: fpga-mgr: add fpga image info to api
-
-This patch adds a minor change in the FPGA Manager API
-to hold information that is specific to an FPGA image
-file.  This change is expected to bring little, if any,
-pain.
-
-An FPGA image file will have particulars that affect how the
-image is programmed to the FPGA.  One example is that
-current 'flags' currently has one bit which shows whether the
-FPGA image was built for full reconfiguration or partial
-reconfiguration.  Another example is timeout values for
-enabling or disabling the bridges in the FPGA.  As the
-complexity of the FPGA design increases, the bridges in the
-FPGA may take longer times to enable or disable.
-
-This patch documents the change in the FPGA Manager API
-functions, replacing the 'u32 flag' parameter with a pointer
-to struct fpga_image_info.
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- Documentation/fpga/fpga-mgr.txt |   34 ++++++++++++++++++++++------------
- 1 file changed, 22 insertions(+), 12 deletions(-)
-
---- a/Documentation/fpga/fpga-mgr.txt
-+++ b/Documentation/fpga/fpga-mgr.txt
-@@ -18,21 +18,25 @@ API Functions:
- To program the FPGA from a file or from a buffer:
- -------------------------------------------------
- 
--	int fpga_mgr_buf_load(struct fpga_manager *mgr, u32 flags,
-+	int fpga_mgr_buf_load(struct fpga_manager *mgr,
-+			      struct fpga_image_info *info,
- 		              const char *buf, size_t count);
- 
- Load the FPGA from an image which exists as a buffer in memory.
- 
--	int fpga_mgr_firmware_load(struct fpga_manager *mgr, u32 flags,
-+	int fpga_mgr_firmware_load(struct fpga_manager *mgr,
-+				   struct fpga_image_info *info,
- 		                   const char *image_name);
- 
- Load the FPGA from an image which exists as a file.  The image file must be on
--the firmware search path (see the firmware class documentation).
--
--For both these functions, flags == 0 for normal full reconfiguration or
--FPGA_MGR_PARTIAL_RECONFIG for partial reconfiguration.  If successful, the FPGA
--ends up in operating mode.  Return 0 on success or a negative error code.
--
-+the firmware search path (see the firmware class documentation).  If successful,
-+the FPGA ends up in operating mode.  Return 0 on success or a negative error
-+code.
-+
-+A FPGA design contained in a FPGA image file will likely have particulars that
-+affect how the image is programmed to the FPGA.  These are contained in struct
-+fpga_image_info.  Currently the only such particular is a single flag bit
-+indicating whether the image is for full or partial reconfiguration.
- 
- To get/put a reference to a FPGA manager:
- -----------------------------------------
-@@ -72,8 +76,11 @@ struct device_node *mgr_node = ...
- char *buf = ...
- int count = ...
- 
-+/* struct with information about the FPGA image to program. */
-+struct fpga_image_info info;
-+
- /* flags indicates whether to do full or partial reconfiguration */
--int flags = 0;
-+info.flags = 0;
- 
- int ret;
- 
-@@ -81,7 +88,7 @@ int ret;
- struct fpga_manager *mgr = of_fpga_mgr_get(mgr_node);
- 
- /* Load the buffer to the FPGA */
--ret = fpga_mgr_buf_load(mgr, flags, buf, count);
-+ret = fpga_mgr_buf_load(mgr, &info, buf, count);
- 
- /* Release the FPGA manager */
- fpga_mgr_put(mgr);
-@@ -98,8 +105,11 @@ struct device_node *mgr_node = ...
- /* FPGA image is in this file which is in the firmware search path */
- const char *path = "fpga-image-9.rbf"
- 
-+/* struct with information about the FPGA image to program. */
-+struct fpga_image_info info;
-+
- /* flags indicates whether to do full or partial reconfiguration */
--int flags = 0;
-+info.flags = 0;
- 
- int ret;
- 
-@@ -107,7 +117,7 @@ int ret;
- struct fpga_manager *mgr = of_fpga_mgr_get(mgr_node);
- 
- /* Get the firmware image (path) and load it to the FPGA */
--ret = fpga_mgr_firmware_load(mgr, flags, path);
-+ret = fpga_mgr_firmware_load(mgr, &info, path);
- 
- /* Release the FPGA manager */
- fpga_mgr_put(mgr);
diff --git a/patches.socfpga/0027-fpga-add-bindings-document-for-fpga-region.patch b/patches.socfpga/0027-fpga-add-bindings-document-for-fpga-region.patch
deleted file mode 100644
index 78d970cc6b351f..00000000000000
--- a/patches.socfpga/0027-fpga-add-bindings-document-for-fpga-region.patch
+++ /dev/null
@@ -1,514 +0,0 @@
-From a3f533d02f5643af9679ef50d4a2ea24d4766924 Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Tue, 1 Nov 2016 14:14:25 -0500
-Subject: [PATCH 027/103] fpga: add bindings document for fpga region
-
-New bindings document for FPGA Region to support programming
-FPGA's under Device Tree control
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
-Reviewed-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- Documentation/devicetree/bindings/fpga/fpga-region.txt |  494 +++++++++++++++++
- 1 file changed, 494 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/fpga/fpga-region.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt
-@@ -0,0 +1,494 @@
-+FPGA Region Device Tree Binding
-+
-+Alan Tull 2016
-+
-+ CONTENTS
-+ - Introduction
-+ - Terminology
-+ - Sequence
-+ - FPGA Region
-+ - Supported Use Models
-+ - Device Tree Examples
-+ - Constraints
-+
-+
-+Introduction
-+============
-+
-+FPGA Regions represent FPGA's and partial reconfiguration regions of FPGA's in
-+the Device Tree.  FPGA Regions provide a way to program FPGAs under device tree
-+control.
-+
-+This device tree binding document hits some of the high points of FPGA usage and
-+attempts to include terminology used by both major FPGA manufacturers.  This
-+document isn't a replacement for any manufacturers specifications for FPGA
-+usage.
-+
-+
-+Terminology
-+===========
-+
-+Full Reconfiguration
-+ * The entire FPGA is programmed.
-+
-+Partial Reconfiguration (PR)
-+ * A section of an FPGA is reprogrammed while the rest of the FPGA is not
-+   affected.
-+ * Not all FPGA's support PR.
-+
-+Partial Reconfiguration Region (PRR)
-+ * Also called a "reconfigurable partition"
-+ * A PRR is a specific section of a FPGA reserved for reconfiguration.
-+ * A base (or static) FPGA image may create a set of PRR's that later may
-+   be independently reprogrammed many times.
-+ * The size and specific location of each PRR is fixed.
-+ * The connections at the edge of each PRR are fixed.  The image that is loaded
-+   into a PRR must fit and must use a subset of the region's connections.
-+ * The busses within the FPGA are split such that each region gets its own
-+   branch that may be gated independently.
-+
-+Persona
-+ * Also called a "partial bit stream"
-+ * An FPGA image that is designed to be loaded into a PRR.  There may be
-+   any number of personas designed to fit into a PRR, but only one at at time
-+   may be loaded.
-+ * A persona may create more regions.
-+
-+FPGA Bridge
-+ * FPGA Bridges gate bus signals between a host and FPGA.
-+ * FPGA Bridges should be disabled while the FPGA is being programmed to
-+   prevent spurious signals on the cpu bus and to the soft logic.
-+ * FPGA bridges may be actual hardware or soft logic on an FPGA.
-+ * During Full Reconfiguration, hardware bridges between the host and FPGA
-+   will be disabled.
-+ * During Partial Reconfiguration of a specific region, that region's bridge
-+   will be used to gate the busses.  Traffic to other regions is not affected.
-+ * In some implementations, the FPGA Manager transparantly handles gating the
-+   buses, eliminating the need to show the hardware FPGA bridges in the
-+   device tree.
-+ * An FPGA image may create a set of reprogrammable regions, each having its
-+   own bridge and its own split of the busses in the FPGA.
-+
-+FPGA Manager
-+ * An FPGA Manager is a hardware block that programs an FPGA under the control
-+   of a host processor.
-+
-+Base Image
-+ * Also called the "static image"
-+ * An FPGA image that is designed to do full reconfiguration of the FPGA.
-+ * A base image may set up a set of partial reconfiguration regions that may
-+   later be reprogrammed.
-+
-+    ----------------       ----------------------------------
-+    |  Host CPU    |       |             FPGA               |
-+    |              |       |                                |
-+    |          ----|       |       -----------    --------  |
-+    |          | H |       |   |==>| Bridge0 |<==>| PRR0 |  |
-+    |          | W |       |   |   -----------    --------  |
-+    |          |   |       |   |                            |
-+    |          | B |<=====>|<==|   -----------    --------  |
-+    |          | R |       |   |==>| Bridge1 |<==>| PRR1 |  |
-+    |          | I |       |   |   -----------    --------  |
-+    |          | D |       |   |                            |
-+    |          | G |       |   |   -----------    --------  |
-+    |          | E |       |   |==>| Bridge2 |<==>| PRR2 |  |
-+    |          ----|       |       -----------    --------  |
-+    |              |       |                                |
-+    ----------------       ----------------------------------
-+
-+Figure 1: An FPGA set up with a base image that created three regions.  Each
-+region (PRR0-2) gets its own split of the busses that is independently gated by
-+a soft logic bridge (Bridge0-2) in the FPGA.  The contents of each PRR can be
-+reprogrammed independently while the rest of the system continues to function.
-+
-+
-+Sequence
-+========
-+
-+When a DT overlay that targets a FPGA Region is applied, the FPGA Region will
-+do the following:
-+
-+ 1. Disable appropriate FPGA bridges.
-+ 2. Program the FPGA using the FPGA manager.
-+ 3. Enable the FPGA bridges.
-+ 4. The Device Tree overlay is accepted into the live tree.
-+ 5. Child devices are populated.
-+
-+When the overlay is removed, the child nodes will be removed and the FPGA Region
-+will disable the bridges.
-+
-+
-+FPGA Region
-+===========
-+
-+FPGA Regions represent FPGA's and FPGA PR regions in the device tree.  An FPGA
-+Region brings together the elements needed to program on a running system and
-+add the child devices:
-+
-+ * FPGA Manager
-+ * FPGA Bridges
-+ * image-specific information needed to to the programming.
-+ * child nodes
-+
-+The intended use is that a Device Tree overlay (DTO) can be used to reprogram an
-+FPGA while an operating system is running.
-+
-+An FPGA Region that exists in the live Device Tree reflects the current state.
-+If the live tree shows a "firmware-name" property or child nodes under a FPGA
-+Region, the FPGA already has been programmed.  A DTO that targets a FPGA Region
-+and adds the "firmware-name" property is taken as a request to reprogram the
-+FPGA.  After reprogramming is successful, the overlay is accepted into the live
-+tree.
-+
-+The base FPGA Region in the device tree represents the FPGA and supports full
-+reconfiguration.  It must include a phandle to an FPGA Manager.  The base
-+FPGA region will be the child of one of the hardware bridges (the bridge that
-+allows register access) between the cpu and the FPGA.  If there are more than
-+one bridge to control during FPGA programming, the region will also contain a
-+list of phandles to the additional hardware FPGA Bridges.
-+
-+For partial reconfiguration (PR), each PR region will have an FPGA Region.
-+These FPGA regions are children of FPGA bridges which are then children of the
-+base FPGA region.  The "Full Reconfiguration to add PRR's" example below shows
-+this.
-+
-+If an FPGA Region does not specify a FPGA Manager, it will inherit the FPGA
-+Manager specified by its ancestor FPGA Region.  This supports both the case
-+where the same FPGA Manager is used for all of a FPGA as well the case where
-+a different FPGA Manager is used for each region.
-+
-+FPGA Regions do not inherit their ancestor FPGA regions' bridges.  This prevents
-+shutting down bridges that are upstream from the other active regions while one
-+region is getting reconfigured (see Figure 1 above).  During PR, the FPGA's
-+hardware bridges remain enabled.  The PR regions' bridges will be FPGA bridges
-+within the static image of the FPGA.
-+
-+Required properties:
-+- compatible : should contain "fpga-region"
-+- fpga-mgr : should contain a phandle to an FPGA Manager.  Child FPGA Regions
-+	inherit this property from their ancestor regions.  A fpga-mgr property
-+	in a region will override any inherited FPGA manager.
-+- #address-cells, #size-cells, ranges : must be present to handle address space
-+	mapping for child nodes.
-+
-+Optional properties:
-+- firmware-name : should contain the name of an FPGA image file located on the
-+	firmware search path.  If this property shows up in a live device tree
-+	it indicates that the FPGA has already been programmed with this image.
-+	If this property is in an overlay targeting a FPGA region, it is a
-+	request to program the FPGA with that image.
-+- fpga-bridges : should contain a list of phandles to FPGA Bridges that must be
-+	controlled during FPGA programming along with the parent FPGA bridge.
-+	This property is optional if the FPGA Manager handles the bridges.
-+        If the fpga-region is  the child of a fpga-bridge, the list should not
-+        contain the parent bridge.
-+- partial-fpga-config : boolean, set if partial reconfiguration is to be done,
-+	otherwise full reconfiguration is done.
-+- external-fpga-config : boolean, set if the FPGA has already been configured
-+	prior to OS boot up.
-+- region-unfreeze-timeout-us : The maximum time in microseconds to wait for
-+	bridges to successfully become enabled after the region has been
-+	programmed.
-+- region-freeze-timeout-us : The maximum time in microseconds to wait for
-+	bridges to successfully become disabled before the region has been
-+	programmed.
-+- child nodes : devices in the FPGA after programming.
-+
-+In the example below, when an overlay is applied targeting fpga-region0,
-+fpga_mgr is used to program the FPGA.  Two bridges are controlled during
-+programming: the parent fpga_bridge0 and fpga_bridge1.  Because the region is
-+the child of fpga_bridge0, only fpga_bridge1 needs to be specified in the
-+fpga-bridges property.  During programming, these bridges are disabled, the
-+firmware specified in the overlay is loaded to the FPGA using the FPGA manager
-+specified in the region.  If FPGA programming succeeds, the bridges are
-+reenabled and the overlay makes it into the live device tree.  The child devices
-+are then populated.  If FPGA programming fails, the bridges are left disabled
-+and the overlay is rejected.  The overlay's ranges property maps the lwhps
-+bridge's region (0xff200000) and the hps bridge's region (0xc0000000) for use by
-+the two child devices.
-+
-+Example:
-+Base tree contains:
-+
-+	fpga_mgr: fpga-mgr@ff706000 {
-+		compatible = "altr,socfpga-fpga-mgr";
-+		reg = <0xff706000 0x1000
-+		       0xffb90000 0x20>;
-+		interrupts = <0 175 4>;
-+	};
-+
-+	fpga_bridge0: fpga-bridge@ff400000 {
-+		compatible = "altr,socfpga-lwhps2fpga-bridge";
-+		reg = <0xff400000 0x100000>;
-+		resets = <&rst LWHPS2FPGA_RESET>;
-+		clocks = <&l4_main_clk>;
-+
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		ranges;
-+
-+		fpga_region0: fpga-region0 {
-+			compatible = "fpga-region";
-+			fpga-mgr = <&fpga_mgr>;
-+		};
-+	};
-+
-+	fpga_bridge1: fpga-bridge@ff500000 {
-+		compatible = "altr,socfpga-hps2fpga-bridge";
-+		reg = <0xff500000 0x10000>;
-+		resets = <&rst HPS2FPGA_RESET>;
-+		clocks = <&l4_main_clk>;
-+	};
-+
-+Overlay contains:
-+
-+/dts-v1/ /plugin/;
-+/ {
-+	fragment@0 {
-+		target = <&fpga_region0>;
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			firmware-name = "soc_system.rbf";
-+			fpga-bridges = <&fpga_bridge1>;
-+			ranges = <0x20000 0xff200000 0x100000>,
-+				 <0x0 0xc0000000 0x20000000>;
-+
-+			gpio@10040 {
-+				compatible = "altr,pio-1.0";
-+				reg = <0x10040 0x20>;
-+				altr,gpio-bank-width = <4>;
-+				#gpio-cells = <2>;
-+				clocks = <2>;
-+				gpio-controller;
-+			};
-+
-+			onchip-memory {
-+				device_type = "memory";
-+				compatible = "altr,onchipmem-15.1";
-+				reg = <0x0 0x10000>;
-+			};
-+		};
-+	};
-+};
-+
-+
-+Supported Use Models
-+====================
-+
-+In all cases the live DT must have the FPGA Manager, FPGA Bridges (if any), and
-+a FPGA Region.  The target of the Device Tree Overlay is the FPGA Region.  Some
-+uses are specific to a FPGA device.
-+
-+ * No FPGA Bridges
-+   In this case, the FPGA Manager which programs the FPGA also handles the
-+   bridges behind the scenes.  No FPGA Bridge devices are needed for full
-+   reconfiguration.
-+
-+ * Full reconfiguration with hardware bridges
-+   In this case, there are hardware bridges between the processor and FPGA that
-+   need to be controlled during full reconfiguration.  Before the overlay is
-+   applied, the live DT must include the FPGA Manager, FPGA Bridges, and a
-+   FPGA Region.  The FPGA Region is the child of the bridge that allows
-+   register access to the FPGA.  Additional bridges may be listed in a
-+   fpga-bridges property in the FPGA region or in the device tree overlay.
-+
-+ * Partial reconfiguration with bridges in the FPGA
-+   In this case, the FPGA will have one or more PRR's that may be programmed
-+   separately while the rest of the FPGA can remain active.  To manage this,
-+   bridges need to exist in the FPGA that can gate the buses going to each FPGA
-+   region while the buses are enabled for other sections.  Before any partial
-+   reconfiguration can be done, a base FPGA image must be loaded which includes
-+   PRR's with FPGA bridges.  The device tree should have a FPGA region for each
-+   PRR.
-+
-+Device Tree Examples
-+====================
-+
-+The intention of this section is to give some simple examples, focusing on
-+the placement of the elements detailed above, especially:
-+ * FPGA Manager
-+ * FPGA Bridges
-+ * FPGA Region
-+ * ranges
-+ * target-path or target
-+
-+For the purposes of this section, I'm dividing the Device Tree into two parts,
-+each with its own requirements.  The two parts are:
-+ * The live DT prior to the overlay being added
-+ * The DT overlay
-+
-+The live Device Tree must contain an FPGA Region, an FPGA Manager, and any FPGA
-+Bridges.  The FPGA Region's "fpga-mgr" property specifies the manager by phandle
-+to handle programming the FPGA.  If the FPGA Region is the child of another FPGA
-+Region, the parent's FPGA Manager is used.  If FPGA Bridges need to be involved,
-+they are specified in the FPGA Region by the "fpga-bridges" property.  During
-+FPGA programming, the FPGA Region will disable the bridges that are in its
-+"fpga-bridges" list and will re-enable them after FPGA programming has
-+succeeded.
-+
-+The Device Tree Overlay will contain:
-+ * "target-path" or "target"
-+   The insertion point where the the contents of the overlay will go into the
-+   live tree.  target-path is a full path, while target is a phandle.
-+ * "ranges"
-+    The address space mapping from processor to FPGA bus(ses).
-+ * "firmware-name"
-+   Specifies the name of the FPGA image file on the firmware search
-+   path.  The search path is described in the firmware class documentation.
-+ * "partial-fpga-config"
-+   This binding is a boolean and should be present if partial reconfiguration
-+   is to be done.
-+ * child nodes corresponding to hardware that will be loaded in this region of
-+   the FPGA.
-+
-+Device Tree Example: Full Reconfiguration without Bridges
-+=========================================================
-+
-+Live Device Tree contains:
-+	fpga_mgr0: fpga-mgr@f8007000 {
-+		compatible = "xlnx,zynq-devcfg-1.0";
-+		reg = <0xf8007000 0x100>;
-+		interrupt-parent = <&intc>;
-+		interrupts = <0 8 4>;
-+		clocks = <&clkc 12>;
-+		clock-names = "ref_clk";
-+		syscon = <&slcr>;
-+	};
-+
-+	fpga_region0: fpga-region0 {
-+		compatible = "fpga-region";
-+		fpga-mgr = <&fpga_mgr0>;
-+		#address-cells = <0x1>;
-+		#size-cells = <0x1>;
-+		ranges;
-+	};
-+
-+DT Overlay contains:
-+/dts-v1/ /plugin/;
-+/ {
-+fragment@0 {
-+	target = <&fpga_region0>;
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+	__overlay__ {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+
-+		firmware-name = "zynq-gpio.bin";
-+
-+		gpio1: gpio@40000000 {
-+			compatible = "xlnx,xps-gpio-1.00.a";
-+			reg = <0x40000000 0x10000>;
-+			gpio-controller;
-+			#gpio-cells = <0x2>;
-+			xlnx,gpio-width= <0x6>;
-+		};
-+	};
-+};
-+
-+Device Tree Example: Full Reconfiguration to add PRR's
-+======================================================
-+
-+The base FPGA Region is specified similar to the first example above.
-+
-+This example programs the FPGA to have two regions that can later be partially
-+configured.  Each region has its own bridge in the FPGA fabric.
-+
-+DT Overlay contains:
-+/dts-v1/ /plugin/;
-+/ {
-+	fragment@0 {
-+		target = <&fpga_region0>;
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			firmware-name = "base.rbf";
-+
-+			fpga-bridge@4400 {
-+				compatible = "altr,freeze-bridge";
-+				reg = <0x4400 0x10>;
-+
-+				fpga_region1: fpga-region1 {
-+					compatible = "fpga-region";
-+					#address-cells = <0x1>;
-+					#size-cells = <0x1>;
-+					ranges;
-+				};
-+			};
-+
-+			fpga-bridge@4420 {
-+				compatible = "altr,freeze-bridge";
-+				reg = <0x4420 0x10>;
-+
-+				fpga_region2: fpga-region2 {
-+					compatible = "fpga-region";
-+					#address-cells = <0x1>;
-+					#size-cells = <0x1>;
-+					ranges;
-+				};
-+			};
-+		};
-+	};
-+};
-+
-+Device Tree Example: Partial Reconfiguration
-+============================================
-+
-+This example reprograms one of the PRR's set up in the previous example.
-+
-+The sequence that occurs when this overlay is similar to the above, the only
-+differences are that the FPGA is partially reconfigured due to the
-+"partial-fpga-config" boolean and the only bridge that is controlled during
-+programming is the FPGA based bridge of fpga_region1.
-+
-+/dts-v1/ /plugin/;
-+/ {
-+	fragment@0 {
-+		target = <&fpga_region1>;
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			firmware-name = "soc_image2.rbf";
-+			partial-fpga-config;
-+
-+			gpio@10040 {
-+				compatible = "altr,pio-1.0";
-+				reg = <0x10040 0x20>;
-+				clocks = <0x2>;
-+				altr,gpio-bank-width = <0x4>;
-+				resetvalue = <0x0>;
-+				#gpio-cells = <0x2>;
-+				gpio-controller;
-+			};
-+		};
-+	};
-+};
-+
-+Constraints
-+===========
-+
-+It is beyond the scope of this document to fully describe all the FPGA design
-+constraints required to make partial reconfiguration work[1] [2] [3], but a few
-+deserve quick mention.
-+
-+A persona must have boundary connections that line up with those of the partion
-+or region it is designed to go into.
-+
-+During programming, transactions through those connections must be stopped and
-+the connections must be held at a fixed logic level.  This can be achieved by
-+FPGA Bridges that exist on the FPGA fabric prior to the partial reconfiguration.
-+
-+--
-+[1] www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug_partrecon.pdf
-+[2] tspace.library.utoronto.ca/bitstream/1807/67932/1/Byma_Stuart_A_201411_MAS_thesis.pdf
-+[3] http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_1/ug702.pdf
diff --git a/patches.socfpga/0028-fpga-mgr-add-fpga-image-information-struct.patch b/patches.socfpga/0028-fpga-mgr-add-fpga-image-information-struct.patch
deleted file mode 100644
index c0283f582a8dbb..00000000000000
--- a/patches.socfpga/0028-fpga-mgr-add-fpga-image-information-struct.patch
+++ /dev/null
@@ -1,224 +0,0 @@
-From dcc67124b4337a29ce04452a177953b3ff14b87a Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Tue, 1 Nov 2016 14:14:26 -0500
-Subject: [PATCH 028/103] fpga-mgr: add fpga image information struct
-
-This patch adds a minor change in the FPGA Manager API
-to hold information that is specific to an FPGA image
-file.  This change is expected to bring little, if any,
-pain.  The socfpga and zynq drivers are fixed up in
-this patch.
-
-An FPGA image file will have particulars that affect how the
-image is programmed to the FPGA.  One example is that
-current 'flags' currently has one bit which shows whether the
-FPGA image was built for full reconfiguration or partial
-reconfiguration.  Another example is timeout values for
-enabling or disabling the bridges in the FPGA.  As the
-complexity of the FPGA design increases, the bridges in the
-FPGA may take longer times to enable or disable.
-
-This patch adds a new 'struct fpga_image_info', moves the
-current 'u32 flags' to it.  Two other image-specific u32's
-are added for the bridge enable/disable timeouts.  The FPGA
-Manager API functions are changed, replacing the 'u32 flag'
-parameter with a pointer to struct fpga_image_info.
-Subsequent patches fix the existing low level FPGA manager
-drivers.
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/fpga-mgr.c       |   17 +++++++++--------
- drivers/fpga/socfpga.c        |    7 ++++---
- drivers/fpga/zynq-fpga.c      |   10 ++++++----
- include/linux/fpga/fpga-mgr.h |   23 +++++++++++++++++++----
- 4 files changed, 38 insertions(+), 19 deletions(-)
-
---- a/drivers/fpga/fpga-mgr.c
-+++ b/drivers/fpga/fpga-mgr.c
-@@ -32,7 +32,7 @@ static struct class *fpga_mgr_class;
- /**
-  * fpga_mgr_buf_load - load fpga from image in buffer
-  * @mgr:	fpga manager
-- * @flags:	flags setting fpga confuration modes
-+ * @info:	fpga image specific information
-  * @buf:	buffer contain fpga image
-  * @count:	byte count of buf
-  *
-@@ -44,8 +44,8 @@ static struct class *fpga_mgr_class;
-  *
-  * Return: 0 on success, negative error code otherwise.
-  */
--int fpga_mgr_buf_load(struct fpga_manager *mgr, u32 flags, const char *buf,
--		      size_t count)
-+int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
-+		      const char *buf, size_t count)
- {
- 	struct device *dev = &mgr->dev;
- 	int ret;
-@@ -56,7 +56,7 @@ int fpga_mgr_buf_load(struct fpga_manage
- 	 * ready to receive an FPGA image.
- 	 */
- 	mgr->state = FPGA_MGR_STATE_WRITE_INIT;
--	ret = mgr->mops->write_init(mgr, flags, buf, count);
-+	ret = mgr->mops->write_init(mgr, info, buf, count);
- 	if (ret) {
- 		dev_err(dev, "Error preparing FPGA for writing\n");
- 		mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
-@@ -79,7 +79,7 @@ int fpga_mgr_buf_load(struct fpga_manage
- 	 * steps to finish and set the FPGA into operating mode.
- 	 */
- 	mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
--	ret = mgr->mops->write_complete(mgr, flags);
-+	ret = mgr->mops->write_complete(mgr, info);
- 	if (ret) {
- 		dev_err(dev, "Error after writing image data to FPGA\n");
- 		mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
-@@ -94,7 +94,7 @@ EXPORT_SYMBOL_GPL(fpga_mgr_buf_load);
- /**
-  * fpga_mgr_firmware_load - request firmware and load to fpga
-  * @mgr:	fpga manager
-- * @flags:	flags setting fpga confuration modes
-+ * @info:	fpga image specific information
-  * @image_name:	name of image file on the firmware search path
-  *
-  * Request an FPGA image using the firmware class, then write out to the FPGA.
-@@ -105,7 +105,8 @@ EXPORT_SYMBOL_GPL(fpga_mgr_buf_load);
-  *
-  * Return: 0 on success, negative error code otherwise.
-  */
--int fpga_mgr_firmware_load(struct fpga_manager *mgr, u32 flags,
-+int fpga_mgr_firmware_load(struct fpga_manager *mgr,
-+			   struct fpga_image_info *info,
- 			   const char *image_name)
- {
- 	struct device *dev = &mgr->dev;
-@@ -123,7 +124,7 @@ int fpga_mgr_firmware_load(struct fpga_m
- 		return ret;
- 	}
- 
--	ret = fpga_mgr_buf_load(mgr, flags, fw->data, fw->size);
-+	ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size);
- 
- 	release_firmware(fw);
- 
---- a/drivers/fpga/socfpga.c
-+++ b/drivers/fpga/socfpga.c
-@@ -407,13 +407,14 @@ static int socfpga_fpga_reset(struct fpg
- /*
-  * Prepare the FPGA to receive the configuration data.
-  */
--static int socfpga_fpga_ops_configure_init(struct fpga_manager *mgr, u32 flags,
-+static int socfpga_fpga_ops_configure_init(struct fpga_manager *mgr,
-+					   struct fpga_image_info *info,
- 					   const char *buf, size_t count)
- {
- 	struct socfpga_fpga_priv *priv = mgr->priv;
- 	int ret;
- 
--	if (flags & FPGA_MGR_PARTIAL_RECONFIG) {
-+	if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) {
- 		dev_err(&mgr->dev, "Partial reconfiguration not supported.\n");
- 		return -EINVAL;
- 	}
-@@ -478,7 +479,7 @@ static int socfpga_fpga_ops_configure_wr
- }
- 
- static int socfpga_fpga_ops_configure_complete(struct fpga_manager *mgr,
--					       u32 flags)
-+					       struct fpga_image_info *info)
- {
- 	struct socfpga_fpga_priv *priv = mgr->priv;
- 	u32 status;
---- a/drivers/fpga/zynq-fpga.c
-+++ b/drivers/fpga/zynq-fpga.c
-@@ -175,7 +175,8 @@ static irqreturn_t zynq_fpga_isr(int irq
- 	return IRQ_HANDLED;
- }
- 
--static int zynq_fpga_ops_write_init(struct fpga_manager *mgr, u32 flags,
-+static int zynq_fpga_ops_write_init(struct fpga_manager *mgr,
-+				    struct fpga_image_info *info,
- 				    const char *buf, size_t count)
- {
- 	struct zynq_fpga_priv *priv;
-@@ -189,7 +190,7 @@ static int zynq_fpga_ops_write_init(stru
- 		return err;
- 
- 	/* don't globally reset PL if we're doing partial reconfig */
--	if (!(flags & FPGA_MGR_PARTIAL_RECONFIG)) {
-+	if (!(info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
- 		/* assert AXI interface resets */
- 		regmap_write(priv->slcr, SLCR_FPGA_RST_CTRL_OFFSET,
- 			     FPGA_RST_ALL_MASK);
-@@ -343,7 +344,8 @@ out_free:
- 	return err;
- }
- 
--static int zynq_fpga_ops_write_complete(struct fpga_manager *mgr, u32 flags)
-+static int zynq_fpga_ops_write_complete(struct fpga_manager *mgr,
-+					struct fpga_image_info *info)
- {
- 	struct zynq_fpga_priv *priv = mgr->priv;
- 	int err;
-@@ -364,7 +366,7 @@ static int zynq_fpga_ops_write_complete(
- 		return err;
- 
- 	/* for the partial reconfig case we didn't touch the level shifters */
--	if (!(flags & FPGA_MGR_PARTIAL_RECONFIG)) {
-+	if (!(info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
- 		/* enable level shifters from PL to PS */
- 		regmap_write(priv->slcr, SLCR_LVL_SHFTR_EN_OFFSET,
- 			     LVL_SHFTR_ENABLE_PL_TO_PS);
---- a/include/linux/fpga/fpga-mgr.h
-+++ b/include/linux/fpga/fpga-mgr.h
-@@ -69,6 +69,18 @@ enum fpga_mgr_states {
- #define FPGA_MGR_PARTIAL_RECONFIG	BIT(0)
- 
- /**
-+ * struct fpga_image_info - information specific to a FPGA image
-+ * @flags: boolean flags as defined above
-+ * @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
-+ * @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
-+ */
-+struct fpga_image_info {
-+	u32 flags;
-+	u32 enable_timeout_us;
-+	u32 disable_timeout_us;
-+};
-+
-+/**
-  * struct fpga_manager_ops - ops for low level fpga manager drivers
-  * @state: returns an enum value of the FPGA's state
-  * @write_init: prepare the FPGA to receive confuration data
-@@ -82,10 +94,12 @@ enum fpga_mgr_states {
-  */
- struct fpga_manager_ops {
- 	enum fpga_mgr_states (*state)(struct fpga_manager *mgr);
--	int (*write_init)(struct fpga_manager *mgr, u32 flags,
-+	int (*write_init)(struct fpga_manager *mgr,
-+			  struct fpga_image_info *info,
- 			  const char *buf, size_t count);
- 	int (*write)(struct fpga_manager *mgr, const char *buf, size_t count);
--	int (*write_complete)(struct fpga_manager *mgr, u32 flags);
-+	int (*write_complete)(struct fpga_manager *mgr,
-+			      struct fpga_image_info *info);
- 	void (*fpga_remove)(struct fpga_manager *mgr);
- };
- 
-@@ -109,10 +123,11 @@ struct fpga_manager {
- 
- #define to_fpga_manager(d) container_of(d, struct fpga_manager, dev)
- 
--int fpga_mgr_buf_load(struct fpga_manager *mgr, u32 flags,
-+int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
- 		      const char *buf, size_t count);
- 
--int fpga_mgr_firmware_load(struct fpga_manager *mgr, u32 flags,
-+int fpga_mgr_firmware_load(struct fpga_manager *mgr,
-+			   struct fpga_image_info *info,
- 			   const char *image_name);
- 
- struct fpga_manager *of_fpga_mgr_get(struct device_node *node);
diff --git a/patches.socfpga/0029-add-sysfs-document-for-fpga-bridge-class.patch b/patches.socfpga/0029-add-sysfs-document-for-fpga-bridge-class.patch
deleted file mode 100644
index 9fe70d9c7c4810..00000000000000
--- a/patches.socfpga/0029-add-sysfs-document-for-fpga-bridge-class.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 61dfd4be91d2b0b62631b47d6fe2e775b97ca990 Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Tue, 1 Nov 2016 14:14:27 -0500
-Subject: [PATCH 029/103] add sysfs document for fpga bridge class
-
-Add documentation for new FPGA bridge class's sysfs interface.
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- Documentation/ABI/testing/sysfs-class-fpga-bridge |   11 +++++++++++
- 1 file changed, 11 insertions(+)
- create mode 100644 Documentation/ABI/testing/sysfs-class-fpga-bridge
-
---- /dev/null
-+++ b/Documentation/ABI/testing/sysfs-class-fpga-bridge
-@@ -0,0 +1,11 @@
-+What:		/sys/class/fpga_bridge/<bridge>/name
-+Date:		January 2016
-+KernelVersion:	4.5
-+Contact:	Alan Tull <atull@opensource.altera.com>
-+Description:	Name of low level FPGA bridge driver.
-+
-+What:		/sys/class/fpga_bridge/<bridge>/state
-+Date:		January 2016
-+KernelVersion:	4.5
-+Contact:	Alan Tull <atull@opensource.altera.com>
-+Description:	Show bridge state as "enabled" or "disabled"
diff --git a/patches.socfpga/0030-fpga-add-fpga-bridge-framework.patch b/patches.socfpga/0030-fpga-add-fpga-bridge-framework.patch
deleted file mode 100644
index 5a582d3cc3ac63..00000000000000
--- a/patches.socfpga/0030-fpga-add-fpga-bridge-framework.patch
+++ /dev/null
@@ -1,534 +0,0 @@
-From 2649550bc9bf2246dfe843874012c7cf621bdfca Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Tue, 1 Nov 2016 14:14:28 -0500
-Subject: [PATCH 030/103] fpga: add fpga bridge framework
-
-This framework adds API functions for enabling/
-disabling FPGA bridges under kernel control.
-
-This allows the Linux kernel to disable FPGA bridges
-during FPGA reprogramming and to enable FPGA bridges
-when FPGA reprogramming is done.  This framework is
-be manufacturer-agnostic, allowing it to be used in
-interfaces that use the FPGA Manager Framework to
-reprogram FPGA's.
-
-The functions are:
-* of_fpga_bridge_get
-* fpga_bridge_put
-   Get/put an exclusive reference to a FPGA bridge.
-
-* fpga_bridge_enable
-* fpga_bridge_disable
-   Enable/Disable traffic through a bridge.
-
-* fpga_bridge_register
-* fpga_bridge_unregister
-   Register/unregister a device-specific low level FPGA
-   Bridge driver.
-
-Get an exclusive reference to a bridge and add it to a list:
-* fpga_bridge_get_to_list
-
-To enable/disable/put a set of bridges that are on a list:
-* fpga_bridges_enable
-* fpga_bridges_disable
-* fpga_bridges_put
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/Kconfig             |    7 
- drivers/fpga/Makefile            |    3 
- drivers/fpga/fpga-bridge.c       |  395 +++++++++++++++++++++++++++++++++++++++
- include/linux/fpga/fpga-bridge.h |   60 +++++
- 4 files changed, 465 insertions(+)
- create mode 100644 drivers/fpga/fpga-bridge.c
- create mode 100644 include/linux/fpga/fpga-bridge.h
-
---- a/drivers/fpga/Kconfig
-+++ b/drivers/fpga/Kconfig
-@@ -26,6 +26,13 @@ config FPGA_MGR_ZYNQ_FPGA
- 	help
- 	  FPGA manager driver support for Xilinx Zynq FPGAs.
- 
-+config FPGA_BRIDGE
-+	tristate "FPGA Bridge Framework"
-+	depends on OF
-+	help
-+	  Say Y here if you want to support bridges connected between host
-+	  processors and FPGAs or between FPGAs.
-+
- endif # FPGA
- 
- endmenu
---- a/drivers/fpga/Makefile
-+++ b/drivers/fpga/Makefile
-@@ -8,3 +8,6 @@ obj-$(CONFIG_FPGA)			+= fpga-mgr.o
- # FPGA Manager Drivers
- obj-$(CONFIG_FPGA_MGR_SOCFPGA)		+= socfpga.o
- obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)	+= zynq-fpga.o
-+
-+# FPGA Bridge Drivers
-+obj-$(CONFIG_FPGA_BRIDGE)		+= fpga-bridge.o
---- /dev/null
-+++ b/drivers/fpga/fpga-bridge.c
-@@ -0,0 +1,395 @@
-+/*
-+ * FPGA Bridge Framework Driver
-+ *
-+ *  Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+#include <linux/fpga/fpga-bridge.h>
-+#include <linux/idr.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/of_platform.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+
-+static DEFINE_IDA(fpga_bridge_ida);
-+static struct class *fpga_bridge_class;
-+
-+/* Lock for adding/removing bridges to linked lists*/
-+spinlock_t bridge_list_lock;
-+
-+static int fpga_bridge_of_node_match(struct device *dev, const void *data)
-+{
-+	return dev->of_node == data;
-+}
-+
-+/**
-+ * fpga_bridge_enable - Enable transactions on the bridge
-+ *
-+ * @bridge: FPGA bridge
-+ *
-+ * Return: 0 for success, error code otherwise.
-+ */
-+int fpga_bridge_enable(struct fpga_bridge *bridge)
-+{
-+	dev_dbg(&bridge->dev, "enable\n");
-+
-+	if (bridge->br_ops && bridge->br_ops->enable_set)
-+		return bridge->br_ops->enable_set(bridge, 1);
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL_GPL(fpga_bridge_enable);
-+
-+/**
-+ * fpga_bridge_disable - Disable transactions on the bridge
-+ *
-+ * @bridge: FPGA bridge
-+ *
-+ * Return: 0 for success, error code otherwise.
-+ */
-+int fpga_bridge_disable(struct fpga_bridge *bridge)
-+{
-+	dev_dbg(&bridge->dev, "disable\n");
-+
-+	if (bridge->br_ops && bridge->br_ops->enable_set)
-+		return bridge->br_ops->enable_set(bridge, 0);
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL_GPL(fpga_bridge_disable);
-+
-+/**
-+ * of_fpga_bridge_get - get an exclusive reference to a fpga bridge
-+ *
-+ * @np: node pointer of a FPGA bridge
-+ * @info: fpga image specific information
-+ *
-+ * Return fpga_bridge struct if successful.
-+ * Return -EBUSY if someone already has a reference to the bridge.
-+ * Return -ENODEV if @np is not a FPGA Bridge.
-+ */
-+struct fpga_bridge *of_fpga_bridge_get(struct device_node *np,
-+				       struct fpga_image_info *info)
-+
-+{
-+	struct device *dev;
-+	struct fpga_bridge *bridge;
-+	int ret = -ENODEV;
-+
-+	dev = class_find_device(fpga_bridge_class, NULL, np,
-+				fpga_bridge_of_node_match);
-+	if (!dev)
-+		goto err_dev;
-+
-+	bridge = to_fpga_bridge(dev);
-+	if (!bridge)
-+		goto err_dev;
-+
-+	bridge->info = info;
-+
-+	if (!mutex_trylock(&bridge->mutex)) {
-+		ret = -EBUSY;
-+		goto err_dev;
-+	}
-+
-+	if (!try_module_get(dev->parent->driver->owner))
-+		goto err_ll_mod;
-+
-+	dev_dbg(&bridge->dev, "get\n");
-+
-+	return bridge;
-+
-+err_ll_mod:
-+	mutex_unlock(&bridge->mutex);
-+err_dev:
-+	put_device(dev);
-+	return ERR_PTR(ret);
-+}
-+EXPORT_SYMBOL_GPL(of_fpga_bridge_get);
-+
-+/**
-+ * fpga_bridge_put - release a reference to a bridge
-+ *
-+ * @bridge: FPGA bridge
-+ */
-+void fpga_bridge_put(struct fpga_bridge *bridge)
-+{
-+	dev_dbg(&bridge->dev, "put\n");
-+
-+	bridge->info = NULL;
-+	module_put(bridge->dev.parent->driver->owner);
-+	mutex_unlock(&bridge->mutex);
-+	put_device(&bridge->dev);
-+}
-+EXPORT_SYMBOL_GPL(fpga_bridge_put);
-+
-+/**
-+ * fpga_bridges_enable - enable bridges in a list
-+ * @bridge_list: list of FPGA bridges
-+ *
-+ * Enable each bridge in the list.  If list is empty, do nothing.
-+ *
-+ * Return 0 for success or empty bridge list; return error code otherwise.
-+ */
-+int fpga_bridges_enable(struct list_head *bridge_list)
-+{
-+	struct fpga_bridge *bridge;
-+	struct list_head *node;
-+	int ret;
-+
-+	list_for_each(node, bridge_list) {
-+		bridge = list_entry(node, struct fpga_bridge, node);
-+		ret = fpga_bridge_enable(bridge);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL_GPL(fpga_bridges_enable);
-+
-+/**
-+ * fpga_bridges_disable - disable bridges in a list
-+ *
-+ * @bridge_list: list of FPGA bridges
-+ *
-+ * Disable each bridge in the list.  If list is empty, do nothing.
-+ *
-+ * Return 0 for success or empty bridge list; return error code otherwise.
-+ */
-+int fpga_bridges_disable(struct list_head *bridge_list)
-+{
-+	struct fpga_bridge *bridge;
-+	struct list_head *node;
-+	int ret;
-+
-+	list_for_each(node, bridge_list) {
-+		bridge = list_entry(node, struct fpga_bridge, node);
-+		ret = fpga_bridge_disable(bridge);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL_GPL(fpga_bridges_disable);
-+
-+/**
-+ * fpga_bridges_put - put bridges
-+ *
-+ * @bridge_list: list of FPGA bridges
-+ *
-+ * For each bridge in the list, put the bridge and remove it from the list.
-+ * If list is empty, do nothing.
-+ */
-+void fpga_bridges_put(struct list_head *bridge_list)
-+{
-+	struct fpga_bridge *bridge;
-+	struct list_head *node, *next;
-+	unsigned long flags;
-+
-+	list_for_each_safe(node, next, bridge_list) {
-+		bridge = list_entry(node, struct fpga_bridge, node);
-+
-+		fpga_bridge_put(bridge);
-+
-+		spin_lock_irqsave(&bridge_list_lock, flags);
-+		list_del(&bridge->node);
-+		spin_unlock_irqrestore(&bridge_list_lock, flags);
-+	}
-+}
-+EXPORT_SYMBOL_GPL(fpga_bridges_put);
-+
-+/**
-+ * fpga_bridges_get_to_list - get a bridge, add it to a list
-+ *
-+ * @np: node pointer of a FPGA bridge
-+ * @info: fpga image specific information
-+ * @bridge_list: list of FPGA bridges
-+ *
-+ * Get an exclusive reference to the bridge and and it to the list.
-+ *
-+ * Return 0 for success, error code from of_fpga_bridge_get() othewise.
-+ */
-+int fpga_bridge_get_to_list(struct device_node *np,
-+			    struct fpga_image_info *info,
-+			    struct list_head *bridge_list)
-+{
-+	struct fpga_bridge *bridge;
-+	unsigned long flags;
-+
-+	bridge = of_fpga_bridge_get(np, info);
-+	if (IS_ERR(bridge))
-+		return PTR_ERR(bridge);
-+
-+	spin_lock_irqsave(&bridge_list_lock, flags);
-+	list_add(&bridge->node, bridge_list);
-+	spin_unlock_irqrestore(&bridge_list_lock, flags);
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL_GPL(fpga_bridge_get_to_list);
-+
-+static ssize_t name_show(struct device *dev,
-+			 struct device_attribute *attr, char *buf)
-+{
-+	struct fpga_bridge *bridge = to_fpga_bridge(dev);
-+
-+	return sprintf(buf, "%s\n", bridge->name);
-+}
-+
-+static ssize_t state_show(struct device *dev,
-+			  struct device_attribute *attr, char *buf)
-+{
-+	struct fpga_bridge *bridge = to_fpga_bridge(dev);
-+	int enable = 1;
-+
-+	if (bridge->br_ops && bridge->br_ops->enable_show)
-+		enable = bridge->br_ops->enable_show(bridge);
-+
-+	return sprintf(buf, "%s\n", enable ? "enabled" : "disabled");
-+}
-+
-+static DEVICE_ATTR_RO(name);
-+static DEVICE_ATTR_RO(state);
-+
-+static struct attribute *fpga_bridge_attrs[] = {
-+	&dev_attr_name.attr,
-+	&dev_attr_state.attr,
-+	NULL,
-+};
-+ATTRIBUTE_GROUPS(fpga_bridge);
-+
-+/**
-+ * fpga_bridge_register - register a fpga bridge driver
-+ * @dev:	FPGA bridge device from pdev
-+ * @name:	FPGA bridge name
-+ * @br_ops:	pointer to structure of fpga bridge ops
-+ * @priv:	FPGA bridge private data
-+ *
-+ * Return: 0 for success, error code otherwise.
-+ */
-+int fpga_bridge_register(struct device *dev, const char *name,
-+			 const struct fpga_bridge_ops *br_ops, void *priv)
-+{
-+	struct fpga_bridge *bridge;
-+	int id, ret = 0;
-+
-+	if (!name || !strlen(name)) {
-+		dev_err(dev, "Attempt to register with no name!\n");
-+		return -EINVAL;
-+	}
-+
-+	bridge = kzalloc(sizeof(*bridge), GFP_KERNEL);
-+	if (!bridge)
-+		return -ENOMEM;
-+
-+	id = ida_simple_get(&fpga_bridge_ida, 0, 0, GFP_KERNEL);
-+	if (id < 0) {
-+		ret = id;
-+		goto error_kfree;
-+	}
-+
-+	mutex_init(&bridge->mutex);
-+	INIT_LIST_HEAD(&bridge->node);
-+
-+	bridge->name = name;
-+	bridge->br_ops = br_ops;
-+	bridge->priv = priv;
-+
-+	device_initialize(&bridge->dev);
-+	bridge->dev.class = fpga_bridge_class;
-+	bridge->dev.parent = dev;
-+	bridge->dev.of_node = dev->of_node;
-+	bridge->dev.id = id;
-+	dev_set_drvdata(dev, bridge);
-+
-+	ret = dev_set_name(&bridge->dev, "br%d", id);
-+	if (ret)
-+		goto error_device;
-+
-+	ret = device_add(&bridge->dev);
-+	if (ret)
-+		goto error_device;
-+
-+	of_platform_populate(dev->of_node, NULL, NULL, dev);
-+
-+	dev_info(bridge->dev.parent, "fpga bridge [%s] registered\n",
-+		 bridge->name);
-+
-+	return 0;
-+
-+error_device:
-+	ida_simple_remove(&fpga_bridge_ida, id);
-+error_kfree:
-+	kfree(bridge);
-+
-+	return ret;
-+}
-+EXPORT_SYMBOL_GPL(fpga_bridge_register);
-+
-+/**
-+ * fpga_bridge_unregister - unregister a fpga bridge driver
-+ * @dev: FPGA bridge device from pdev
-+ */
-+void fpga_bridge_unregister(struct device *dev)
-+{
-+	struct fpga_bridge *bridge = dev_get_drvdata(dev);
-+
-+	/*
-+	 * If the low level driver provides a method for putting bridge into
-+	 * a desired state upon unregister, do it.
-+	 */
-+	if (bridge->br_ops && bridge->br_ops->fpga_bridge_remove)
-+		bridge->br_ops->fpga_bridge_remove(bridge);
-+
-+	device_unregister(&bridge->dev);
-+}
-+EXPORT_SYMBOL_GPL(fpga_bridge_unregister);
-+
-+static void fpga_bridge_dev_release(struct device *dev)
-+{
-+	struct fpga_bridge *bridge = to_fpga_bridge(dev);
-+
-+	ida_simple_remove(&fpga_bridge_ida, bridge->dev.id);
-+	kfree(bridge);
-+}
-+
-+static int __init fpga_bridge_dev_init(void)
-+{
-+	spin_lock_init(&bridge_list_lock);
-+
-+	fpga_bridge_class = class_create(THIS_MODULE, "fpga_bridge");
-+	if (IS_ERR(fpga_bridge_class))
-+		return PTR_ERR(fpga_bridge_class);
-+
-+	fpga_bridge_class->dev_groups = fpga_bridge_groups;
-+	fpga_bridge_class->dev_release = fpga_bridge_dev_release;
-+
-+	return 0;
-+}
-+
-+static void __exit fpga_bridge_dev_exit(void)
-+{
-+	class_destroy(fpga_bridge_class);
-+	ida_destroy(&fpga_bridge_ida);
-+}
-+
-+MODULE_DESCRIPTION("FPGA Bridge Driver");
-+MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
-+MODULE_LICENSE("GPL v2");
-+
-+subsys_initcall(fpga_bridge_dev_init);
-+module_exit(fpga_bridge_dev_exit);
---- /dev/null
-+++ b/include/linux/fpga/fpga-bridge.h
-@@ -0,0 +1,60 @@
-+#include <linux/device.h>
-+#include <linux/fpga/fpga-mgr.h>
-+
-+#ifndef _LINUX_FPGA_BRIDGE_H
-+#define _LINUX_FPGA_BRIDGE_H
-+
-+struct fpga_bridge;
-+
-+/**
-+ * struct fpga_bridge_ops - ops for low level FPGA bridge drivers
-+ * @enable_show: returns the FPGA bridge's status
-+ * @enable_set: set a FPGA bridge as enabled or disabled
-+ * @fpga_bridge_remove: set FPGA into a specific state during driver remove
-+ */
-+struct fpga_bridge_ops {
-+	int (*enable_show)(struct fpga_bridge *bridge);
-+	int (*enable_set)(struct fpga_bridge *bridge, bool enable);
-+	void (*fpga_bridge_remove)(struct fpga_bridge *bridge);
-+};
-+
-+/**
-+ * struct fpga_bridge - FPGA bridge structure
-+ * @name: name of low level FPGA bridge
-+ * @dev: FPGA bridge device
-+ * @mutex: enforces exclusive reference to bridge
-+ * @br_ops: pointer to struct of FPGA bridge ops
-+ * @info: fpga image specific information
-+ * @node: FPGA bridge list node
-+ * @priv: low level driver private date
-+ */
-+struct fpga_bridge {
-+	const char *name;
-+	struct device dev;
-+	struct mutex mutex; /* for exclusive reference to bridge */
-+	const struct fpga_bridge_ops *br_ops;
-+	struct fpga_image_info *info;
-+	struct list_head node;
-+	void *priv;
-+};
-+
-+#define to_fpga_bridge(d) container_of(d, struct fpga_bridge, dev)
-+
-+struct fpga_bridge *of_fpga_bridge_get(struct device_node *node,
-+				       struct fpga_image_info *info);
-+void fpga_bridge_put(struct fpga_bridge *bridge);
-+int fpga_bridge_enable(struct fpga_bridge *bridge);
-+int fpga_bridge_disable(struct fpga_bridge *bridge);
-+
-+int fpga_bridges_enable(struct list_head *bridge_list);
-+int fpga_bridges_disable(struct list_head *bridge_list);
-+void fpga_bridges_put(struct list_head *bridge_list);
-+int fpga_bridge_get_to_list(struct device_node *np,
-+			    struct fpga_image_info *info,
-+			    struct list_head *bridge_list);
-+
-+int fpga_bridge_register(struct device *dev, const char *name,
-+			 const struct fpga_bridge_ops *br_ops, void *priv);
-+void fpga_bridge_unregister(struct device *dev);
-+
-+#endif /* _LINUX_FPGA_BRIDGE_H */
diff --git a/patches.socfpga/0031-fpga-fpga-region-device-tree-control-for-FPGA.patch b/patches.socfpga/0031-fpga-fpga-region-device-tree-control-for-FPGA.patch
deleted file mode 100644
index e69a9ba70e42be..00000000000000
--- a/patches.socfpga/0031-fpga-fpga-region-device-tree-control-for-FPGA.patch
+++ /dev/null
@@ -1,662 +0,0 @@
-From 1959ad1708f7ec01af7377787b9e117e2eae61f8 Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Tue, 1 Nov 2016 14:14:29 -0500
-Subject: [PATCH 031/103] fpga: fpga-region: device tree control for FPGA
-
-FPGA Regions support programming FPGA under control of the Device
-Tree.
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/Kconfig          |    7 
- drivers/fpga/Makefile         |    3 
- drivers/fpga/fpga-region.c    |  603 ++++++++++++++++++++++++++++++++++++++++++
- include/linux/fpga/fpga-mgr.h |    2 
- 4 files changed, 615 insertions(+)
- create mode 100644 drivers/fpga/fpga-region.c
-
---- a/drivers/fpga/Kconfig
-+++ b/drivers/fpga/Kconfig
-@@ -13,6 +13,13 @@ config FPGA
- 
- if FPGA
- 
-+config FPGA_REGION
-+	tristate "FPGA Region"
-+	depends on OF && FPGA_BRIDGE
-+	help
-+	  FPGA Regions allow loading FPGA images under control of
-+	  the Device Tree.
-+
- config FPGA_MGR_SOCFPGA
- 	tristate "Altera SOCFPGA FPGA Manager"
- 	depends on ARCH_SOCFPGA
---- a/drivers/fpga/Makefile
-+++ b/drivers/fpga/Makefile
-@@ -11,3 +11,6 @@ obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)	+= zynq
- 
- # FPGA Bridge Drivers
- obj-$(CONFIG_FPGA_BRIDGE)		+= fpga-bridge.o
-+
-+# High Level Interfaces
-+obj-$(CONFIG_FPGA_REGION)		+= fpga-region.o
---- /dev/null
-+++ b/drivers/fpga/fpga-region.c
-@@ -0,0 +1,603 @@
-+/*
-+ * FPGA Region - Device Tree support for FPGA programming under Linux
-+ *
-+ *  Copyright (C) 2013-2016 Altera Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#include <linux/fpga/fpga-bridge.h>
-+#include <linux/fpga/fpga-mgr.h>
-+#include <linux/idr.h>
-+#include <linux/kernel.h>
-+#include <linux/list.h>
-+#include <linux/module.h>
-+#include <linux/of_platform.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+
-+/**
-+ * struct fpga_region - FPGA Region structure
-+ * @dev: FPGA Region device
-+ * @mutex: enforces exclusive reference to region
-+ * @bridge_list: list of FPGA bridges specified in region
-+ * @info: fpga image specific information
-+ */
-+struct fpga_region {
-+	struct device dev;
-+	struct mutex mutex; /* for exclusive reference to region */
-+	struct list_head bridge_list;
-+	struct fpga_image_info *info;
-+};
-+
-+#define to_fpga_region(d) container_of(d, struct fpga_region, dev)
-+
-+static DEFINE_IDA(fpga_region_ida);
-+static struct class *fpga_region_class;
-+
-+static const struct of_device_id fpga_region_of_match[] = {
-+	{ .compatible = "fpga-region", },
-+	{},
-+};
-+MODULE_DEVICE_TABLE(of, fpga_region_of_match);
-+
-+static int fpga_region_of_node_match(struct device *dev, const void *data)
-+{
-+	return dev->of_node == data;
-+}
-+
-+/**
-+ * fpga_region_find - find FPGA region
-+ * @np: device node of FPGA Region
-+ * Caller will need to put_device(&region->dev) when done.
-+ * Returns FPGA Region struct or NULL
-+ */
-+static struct fpga_region *fpga_region_find(struct device_node *np)
-+{
-+	struct device *dev;
-+
-+	dev = class_find_device(fpga_region_class, NULL, np,
-+				fpga_region_of_node_match);
-+	if (!dev)
-+		return NULL;
-+
-+	return to_fpga_region(dev);
-+}
-+
-+/**
-+ * fpga_region_get - get an exclusive reference to a fpga region
-+ * @region: FPGA Region struct
-+ *
-+ * Caller should call fpga_region_put() when done with region.
-+ *
-+ * Return fpga_region struct if successful.
-+ * Return -EBUSY if someone already has a reference to the region.
-+ * Return -ENODEV if @np is not a FPGA Region.
-+ */
-+static struct fpga_region *fpga_region_get(struct fpga_region *region)
-+{
-+	struct device *dev = &region->dev;
-+
-+	if (!mutex_trylock(&region->mutex)) {
-+		dev_dbg(dev, "%s: FPGA Region already in use\n", __func__);
-+		return ERR_PTR(-EBUSY);
-+	}
-+
-+	get_device(dev);
-+	of_node_get(dev->of_node);
-+	if (!try_module_get(dev->parent->driver->owner)) {
-+		of_node_put(dev->of_node);
-+		put_device(dev);
-+		mutex_unlock(&region->mutex);
-+		return ERR_PTR(-ENODEV);
-+	}
-+
-+	dev_dbg(&region->dev, "get\n");
-+
-+	return region;
-+}
-+
-+/**
-+ * fpga_region_put - release a reference to a region
-+ *
-+ * @region: FPGA region
-+ */
-+static void fpga_region_put(struct fpga_region *region)
-+{
-+	struct device *dev = &region->dev;
-+
-+	dev_dbg(&region->dev, "put\n");
-+
-+	module_put(dev->parent->driver->owner);
-+	of_node_put(dev->of_node);
-+	put_device(dev);
-+	mutex_unlock(&region->mutex);
-+}
-+
-+/**
-+ * fpga_region_get_manager - get exclusive reference for FPGA manager
-+ * @region: FPGA region
-+ *
-+ * Get FPGA Manager from "fpga-mgr" property or from ancestor region.
-+ *
-+ * Caller should call fpga_mgr_put() when done with manager.
-+ *
-+ * Return: fpga manager struct or IS_ERR() condition containing error code.
-+ */
-+static struct fpga_manager *fpga_region_get_manager(struct fpga_region *region)
-+{
-+	struct device *dev = &region->dev;
-+	struct device_node *np = dev->of_node;
-+	struct device_node  *mgr_node;
-+	struct fpga_manager *mgr;
-+
-+	of_node_get(np);
-+	while (np) {
-+		if (of_device_is_compatible(np, "fpga-region")) {
-+			mgr_node = of_parse_phandle(np, "fpga-mgr", 0);
-+			if (mgr_node) {
-+				mgr = of_fpga_mgr_get(mgr_node);
-+				of_node_put(np);
-+				return mgr;
-+			}
-+		}
-+		np = of_get_next_parent(np);
-+	}
-+	of_node_put(np);
-+
-+	return ERR_PTR(-EINVAL);
-+}
-+
-+/**
-+ * fpga_region_get_bridges - create a list of bridges
-+ * @region: FPGA region
-+ * @overlay: device node of the overlay
-+ *
-+ * Create a list of bridges including the parent bridge and the bridges
-+ * specified by "fpga-bridges" property.  Note that the
-+ * fpga_bridges_enable/disable/put functions are all fine with an empty list
-+ * if that happens.
-+ *
-+ * Caller should call fpga_bridges_put(&region->bridge_list) when
-+ * done with the bridges.
-+ *
-+ * Return 0 for success (even if there are no bridges specified)
-+ * or -EBUSY if any of the bridges are in use.
-+ */
-+static int fpga_region_get_bridges(struct fpga_region *region,
-+				   struct device_node *overlay)
-+{
-+	struct device *dev = &region->dev;
-+	struct device_node *region_np = dev->of_node;
-+	struct device_node *br, *np, *parent_br = NULL;
-+	int i, ret;
-+
-+	/* If parent is a bridge, add to list */
-+	ret = fpga_bridge_get_to_list(region_np->parent, region->info,
-+				      &region->bridge_list);
-+	if (ret == -EBUSY)
-+		return ret;
-+
-+	if (!ret)
-+		parent_br = region_np->parent;
-+
-+	/* If overlay has a list of bridges, use it. */
-+	if (of_parse_phandle(overlay, "fpga-bridges", 0))
-+		np = overlay;
-+	else
-+		np = region_np;
-+
-+	for (i = 0; ; i++) {
-+		br = of_parse_phandle(np, "fpga-bridges", i);
-+		if (!br)
-+			break;
-+
-+		/* If parent bridge is in list, skip it. */
-+		if (br == parent_br)
-+			continue;
-+
-+		/* If node is a bridge, get it and add to list */
-+		ret = fpga_bridge_get_to_list(br, region->info,
-+					      &region->bridge_list);
-+
-+		/* If any of the bridges are in use, give up */
-+		if (ret == -EBUSY) {
-+			fpga_bridges_put(&region->bridge_list);
-+			return -EBUSY;
-+		}
-+	}
-+
-+	return 0;
-+}
-+
-+/**
-+ * fpga_region_program_fpga - program FPGA
-+ * @region: FPGA region
-+ * @firmware_name: name of FPGA image firmware file
-+ * @overlay: device node of the overlay
-+ * Program an FPGA using information in the device tree.
-+ * Function assumes that there is a firmware-name property.
-+ * Return 0 for success or negative error code.
-+ */
-+static int fpga_region_program_fpga(struct fpga_region *region,
-+				    const char *firmware_name,
-+				    struct device_node *overlay)
-+{
-+	struct fpga_manager *mgr;
-+	int ret;
-+
-+	region = fpga_region_get(region);
-+	if (IS_ERR(region)) {
-+		pr_err("failed to get fpga region\n");
-+		return PTR_ERR(region);
-+	}
-+
-+	mgr = fpga_region_get_manager(region);
-+	if (IS_ERR(mgr)) {
-+		pr_err("failed to get fpga region manager\n");
-+		return PTR_ERR(mgr);
-+	}
-+
-+	ret = fpga_region_get_bridges(region, overlay);
-+	if (ret) {
-+		pr_err("failed to get fpga region bridges\n");
-+		goto err_put_mgr;
-+	}
-+
-+	ret = fpga_bridges_disable(&region->bridge_list);
-+	if (ret) {
-+		pr_err("failed to disable region bridges\n");
-+		goto err_put_br;
-+	}
-+
-+	ret = fpga_mgr_firmware_load(mgr, region->info, firmware_name);
-+	if (ret) {
-+		pr_err("failed to load fpga image\n");
-+		goto err_put_br;
-+	}
-+
-+	ret = fpga_bridges_enable(&region->bridge_list);
-+	if (ret) {
-+		pr_err("failed to enable region bridges\n");
-+		goto err_put_br;
-+	}
-+
-+	fpga_mgr_put(mgr);
-+	fpga_region_put(region);
-+
-+	return 0;
-+
-+err_put_br:
-+	fpga_bridges_put(&region->bridge_list);
-+err_put_mgr:
-+	fpga_mgr_put(mgr);
-+	fpga_region_put(region);
-+
-+	return ret;
-+}
-+
-+/**
-+ * child_regions_with_firmware
-+ * @overlay: device node of the overlay
-+ *
-+ * If the overlay adds child FPGA regions, they are not allowed to have
-+ * firmware-name property.
-+ *
-+ * Return 0 for OK or -EINVAL if child FPGA region adds firmware-name.
-+ */
-+static int child_regions_with_firmware(struct device_node *overlay)
-+{
-+	struct device_node *child_region;
-+	const char *child_firmware_name;
-+	int ret = 0;
-+
-+	of_node_get(overlay);
-+
-+	child_region = of_find_matching_node(overlay, fpga_region_of_match);
-+	while (child_region) {
-+		if (!of_property_read_string(child_region, "firmware-name",
-+					     &child_firmware_name)) {
-+			ret = -EINVAL;
-+			break;
-+		}
-+		child_region = of_find_matching_node(child_region,
-+						     fpga_region_of_match);
-+	}
-+
-+	of_node_put(child_region);
-+
-+	if (ret)
-+		pr_err("firmware-name not allowed in child FPGA region: %s",
-+		       child_region->full_name);
-+
-+	return ret;
-+}
-+
-+/**
-+ * fpga_region_notify_pre_apply - pre-apply overlay notification
-+ *
-+ * @region: FPGA region that the overlay was applied to
-+ * @nd: overlay notification data
-+ *
-+ * Called after when an overlay targeted to a FPGA Region is about to be
-+ * applied.  Function will check the properties that will be added to the FPGA
-+ * region.  If the checks pass, it will program the FPGA.
-+ *
-+ * The checks are:
-+ * The overlay must add either firmware-name or external-fpga-config property
-+ * to the FPGA Region.
-+ *
-+ *   firmware-name        : program the FPGA
-+ *   external-fpga-config : FPGA is already programmed
-+ *
-+ * The overlay can add other FPGA regions, but child FPGA regions cannot have a
-+ * firmware-name property since those regions don't exist yet.
-+ *
-+ * If the overlay that breaks the rules, notifier returns an error and the
-+ * overlay is rejected before it goes into the main tree.
-+ *
-+ * Returns 0 for success or negative error code for failure.
-+ */
-+static int fpga_region_notify_pre_apply(struct fpga_region *region,
-+					struct of_overlay_notify_data *nd)
-+{
-+	const char *firmware_name = NULL;
-+	struct fpga_image_info *info;
-+	int ret;
-+
-+	info = devm_kzalloc(&region->dev, sizeof(*info), GFP_KERNEL);
-+	if (!info)
-+		return -ENOMEM;
-+
-+	region->info = info;
-+
-+	/* Reject overlay if child FPGA Regions have firmware-name property */
-+	ret = child_regions_with_firmware(nd->overlay);
-+	if (ret)
-+		return ret;
-+
-+	/* Read FPGA region properties from the overlay */
-+	if (of_property_read_bool(nd->overlay, "partial-fpga-config"))
-+		info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
-+
-+	if (of_property_read_bool(nd->overlay, "external-fpga-config"))
-+		info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
-+
-+	of_property_read_string(nd->overlay, "firmware-name", &firmware_name);
-+
-+	of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us",
-+			     &info->enable_timeout_us);
-+
-+	of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
-+			     &info->disable_timeout_us);
-+
-+	/* If FPGA was externally programmed, don't specify firmware */
-+	if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) {
-+		pr_err("error: specified firmware and external-fpga-config");
-+		return -EINVAL;
-+	}
-+
-+	/* FPGA is already configured externally.  We're done. */
-+	if (info->flags & FPGA_MGR_EXTERNAL_CONFIG)
-+		return 0;
-+
-+	/* If we got this far, we should be programming the FPGA */
-+	if (!firmware_name) {
-+		pr_err("should specify firmware-name or external-fpga-config\n");
-+		return -EINVAL;
-+	}
-+
-+	return fpga_region_program_fpga(region, firmware_name, nd->overlay);
-+}
-+
-+/**
-+ * fpga_region_notify_post_remove - post-remove overlay notification
-+ *
-+ * @region: FPGA region that was targeted by the overlay that was removed
-+ * @nd: overlay notification data
-+ *
-+ * Called after an overlay has been removed if the overlay's target was a
-+ * FPGA region.
-+ */
-+static void fpga_region_notify_post_remove(struct fpga_region *region,
-+					   struct of_overlay_notify_data *nd)
-+{
-+	fpga_bridges_disable(&region->bridge_list);
-+	fpga_bridges_put(&region->bridge_list);
-+	devm_kfree(&region->dev, region->info);
-+	region->info = NULL;
-+}
-+
-+/**
-+ * of_fpga_region_notify - reconfig notifier for dynamic DT changes
-+ * @nb:		notifier block
-+ * @action:	notifier action
-+ * @arg:	reconfig data
-+ *
-+ * This notifier handles programming a FPGA when a "firmware-name" property is
-+ * added to a fpga-region.
-+ *
-+ * Returns NOTIFY_OK or error if FPGA programming fails.
-+ */
-+static int of_fpga_region_notify(struct notifier_block *nb,
-+				 unsigned long action, void *arg)
-+{
-+	struct of_overlay_notify_data *nd = arg;
-+	struct fpga_region *region;
-+	int ret;
-+
-+	switch (action) {
-+	case OF_OVERLAY_PRE_APPLY:
-+		pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__);
-+		break;
-+	case OF_OVERLAY_POST_APPLY:
-+		pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__);
-+		return NOTIFY_OK;       /* not for us */
-+	case OF_OVERLAY_PRE_REMOVE:
-+		pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__);
-+		return NOTIFY_OK;       /* not for us */
-+	case OF_OVERLAY_POST_REMOVE:
-+		pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__);
-+		break;
-+	default:			/* should not happen */
-+		return NOTIFY_OK;
-+	}
-+
-+	region = fpga_region_find(nd->target);
-+	if (!region)
-+		return NOTIFY_OK;
-+
-+	ret = 0;
-+	switch (action) {
-+	case OF_OVERLAY_PRE_APPLY:
-+		ret = fpga_region_notify_pre_apply(region, nd);
-+		break;
-+
-+	case OF_OVERLAY_POST_REMOVE:
-+		fpga_region_notify_post_remove(region, nd);
-+		break;
-+	}
-+
-+	put_device(&region->dev);
-+
-+	if (ret)
-+		return notifier_from_errno(ret);
-+
-+	return NOTIFY_OK;
-+}
-+
-+static struct notifier_block fpga_region_of_nb = {
-+	.notifier_call = of_fpga_region_notify,
-+};
-+
-+static int fpga_region_probe(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+	struct device_node *np = dev->of_node;
-+	struct fpga_region *region;
-+	int id, ret = 0;
-+
-+	region = kzalloc(sizeof(*region), GFP_KERNEL);
-+	if (!region)
-+		return -ENOMEM;
-+
-+	id = ida_simple_get(&fpga_region_ida, 0, 0, GFP_KERNEL);
-+	if (id < 0) {
-+		ret = id;
-+		goto err_kfree;
-+	}
-+
-+	mutex_init(&region->mutex);
-+	INIT_LIST_HEAD(&region->bridge_list);
-+
-+	device_initialize(&region->dev);
-+	region->dev.class = fpga_region_class;
-+	region->dev.parent = dev;
-+	region->dev.of_node = np;
-+	region->dev.id = id;
-+	dev_set_drvdata(dev, region);
-+
-+	ret = dev_set_name(&region->dev, "region%d", id);
-+	if (ret)
-+		goto err_remove;
-+
-+	ret = device_add(&region->dev);
-+	if (ret)
-+		goto err_remove;
-+
-+	of_platform_populate(np, fpga_region_of_match, NULL, &region->dev);
-+
-+	dev_info(dev, "FPGA Region probed\n");
-+
-+	return 0;
-+
-+err_remove:
-+	ida_simple_remove(&fpga_region_ida, id);
-+err_kfree:
-+	kfree(region);
-+
-+	return ret;
-+}
-+
-+static int fpga_region_remove(struct platform_device *pdev)
-+{
-+	struct fpga_region *region = platform_get_drvdata(pdev);
-+
-+	device_unregister(&region->dev);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver fpga_region_driver = {
-+	.probe = fpga_region_probe,
-+	.remove = fpga_region_remove,
-+	.driver = {
-+		.name	= "fpga-region",
-+		.of_match_table = of_match_ptr(fpga_region_of_match),
-+	},
-+};
-+
-+static void fpga_region_dev_release(struct device *dev)
-+{
-+	struct fpga_region *region = to_fpga_region(dev);
-+
-+	ida_simple_remove(&fpga_region_ida, region->dev.id);
-+	kfree(region);
-+}
-+
-+/**
-+ * fpga_region_init - init function for fpga_region class
-+ * Creates the fpga_region class and registers a reconfig notifier.
-+ */
-+static int __init fpga_region_init(void)
-+{
-+	int ret;
-+
-+	fpga_region_class = class_create(THIS_MODULE, "fpga_region");
-+	if (IS_ERR(fpga_region_class))
-+		return PTR_ERR(fpga_region_class);
-+
-+	fpga_region_class->dev_release = fpga_region_dev_release;
-+
-+	ret = of_overlay_notifier_register(&fpga_region_of_nb);
-+	if (ret)
-+		goto err_class;
-+
-+	ret = platform_driver_register(&fpga_region_driver);
-+	if (ret)
-+		goto err_plat;
-+
-+	return 0;
-+
-+err_plat:
-+	of_overlay_notifier_unregister(&fpga_region_of_nb);
-+err_class:
-+	class_destroy(fpga_region_class);
-+	ida_destroy(&fpga_region_ida);
-+	return ret;
-+}
-+
-+static void __exit fpga_region_exit(void)
-+{
-+	platform_driver_unregister(&fpga_region_driver);
-+	of_overlay_notifier_unregister(&fpga_region_of_nb);
-+	class_destroy(fpga_region_class);
-+	ida_destroy(&fpga_region_ida);
-+}
-+
-+subsys_initcall(fpga_region_init);
-+module_exit(fpga_region_exit);
-+
-+MODULE_DESCRIPTION("FPGA Region");
-+MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
-+MODULE_LICENSE("GPL v2");
---- a/include/linux/fpga/fpga-mgr.h
-+++ b/include/linux/fpga/fpga-mgr.h
-@@ -65,8 +65,10 @@ enum fpga_mgr_states {
- /*
-  * FPGA Manager flags
-  * FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported
-+ * FPGA_MGR_EXTERNAL_CONFIG: FPGA has been configured prior to Linux booting
-  */
- #define FPGA_MGR_PARTIAL_RECONFIG	BIT(0)
-+#define FPGA_MGR_EXTERNAL_CONFIG	BIT(1)
- 
- /**
-  * struct fpga_image_info - information specific to a FPGA image
diff --git a/patches.socfpga/0032-ARM-socfpga-fpga-bridge-driver-support.patch b/patches.socfpga/0032-ARM-socfpga-fpga-bridge-driver-support.patch
deleted file mode 100644
index c5a8ca92fec067..00000000000000
--- a/patches.socfpga/0032-ARM-socfpga-fpga-bridge-driver-support.patch
+++ /dev/null
@@ -1,473 +0,0 @@
-From ffe325ed88d349106ded4459366514e91fd1a175 Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Tue, 1 Nov 2016 14:14:30 -0500
-Subject: [PATCH 032/103] ARM: socfpga: fpga bridge driver support
-
-Supports Altera SOCFPGA bridges:
- * fpga2sdram
- * fpga2hps
- * hps2fpga
- * lwhps2fpga
-
-Allows enabling/disabling the bridges through the FPGA
-Bridge Framework API functions.
-
-The fpga2sdram driver only supports enabling and disabling
-of the ports that been configured early on.  This is due to
-a hardware limitation where the read, write, and command
-ports on the fpga2sdram bridge can only be reconfigured
-while there are no transactions to the sdram, i.e. when
-running out of OCRAM before the kernel boots.
-
-Device tree property 'init-val' configures the driver to
-enable or disable the bridge during probe.  If the property
-does not exist, the driver will leave the bridge in its
-current state.
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Matthew Gerlach <mgerlach@altera.com>
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/Kconfig             |    7 +
- drivers/fpga/Makefile            |    1 
- drivers/fpga/altera-fpga2sdram.c |  180 +++++++++++++++++++++++++++++++
- drivers/fpga/altera-hps2fpga.c   |  222 +++++++++++++++++++++++++++++++++++++++
- 4 files changed, 410 insertions(+)
- create mode 100644 drivers/fpga/altera-fpga2sdram.c
- create mode 100644 drivers/fpga/altera-hps2fpga.c
-
---- a/drivers/fpga/Kconfig
-+++ b/drivers/fpga/Kconfig
-@@ -40,6 +40,13 @@ config FPGA_BRIDGE
- 	  Say Y here if you want to support bridges connected between host
- 	  processors and FPGAs or between FPGAs.
- 
-+config SOCFPGA_FPGA_BRIDGE
-+	tristate "Altera SoCFPGA FPGA Bridges"
-+	depends on ARCH_SOCFPGA && FPGA_BRIDGE
-+	help
-+	  Say Y to enable drivers for FPGA bridges for Altera SOCFPGA
-+	  devices.
-+
- endif # FPGA
- 
- endmenu
---- a/drivers/fpga/Makefile
-+++ b/drivers/fpga/Makefile
-@@ -11,6 +11,7 @@ obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)	+= zynq
- 
- # FPGA Bridge Drivers
- obj-$(CONFIG_FPGA_BRIDGE)		+= fpga-bridge.o
-+obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE)	+= altera-hps2fpga.o altera-fpga2sdram.o
- 
- # High Level Interfaces
- obj-$(CONFIG_FPGA_REGION)		+= fpga-region.o
---- /dev/null
-+++ b/drivers/fpga/altera-fpga2sdram.c
-@@ -0,0 +1,180 @@
-+/*
-+ * FPGA to SDRAM Bridge Driver for Altera SoCFPGA Devices
-+ *
-+ *  Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+/*
-+ * This driver manages a bridge between an FPGA and the SDRAM used by the ARM
-+ * host processor system (HPS).
-+ *
-+ * The bridge contains 4 read ports, 4 write ports, and 6 command ports.
-+ * Reconfiguring these ports requires that no SDRAM transactions occur during
-+ * reconfiguration.  The code reconfiguring the ports cannot run out of SDRAM
-+ * nor can the FPGA access the SDRAM during reconfiguration.  This driver does
-+ * not support reconfiguring the ports.  The ports are configured by code
-+ * running out of on chip ram before Linux is started and the configuration
-+ * is passed in a handoff register in the system manager.
-+ *
-+ * This driver supports enabling and disabling of the configured ports, which
-+ * allows for safe reprogramming of the FPGA, assuming that the new FPGA image
-+ * uses the same port configuration.  Bridges must be disabled before
-+ * reprogramming the FPGA and re-enabled after the FPGA has been programmed.
-+ */
-+
-+#include <linux/fpga/fpga-bridge.h>
-+#include <linux/kernel.h>
-+#include <linux/mfd/syscon.h>
-+#include <linux/module.h>
-+#include <linux/of_platform.h>
-+#include <linux/regmap.h>
-+
-+#define ALT_SDR_CTL_FPGAPORTRST_OFST		0x80
-+#define ALT_SDR_CTL_FPGAPORTRST_PORTRSTN_MSK	0x00003fff
-+#define ALT_SDR_CTL_FPGAPORTRST_RD_SHIFT	0
-+#define ALT_SDR_CTL_FPGAPORTRST_WR_SHIFT	4
-+#define ALT_SDR_CTL_FPGAPORTRST_CTRL_SHIFT	8
-+
-+/*
-+ * From the Cyclone V HPS Memory Map document:
-+ *   These registers are used to store handoff information between the
-+ *   preloader and the OS. These 8 registers can be used to store any
-+ *   information. The contents of these registers have no impact on
-+ *   the state of the HPS hardware.
-+ */
-+#define SYSMGR_ISWGRP_HANDOFF3          (0x8C)
-+
-+#define F2S_BRIDGE_NAME "fpga2sdram"
-+
-+struct alt_fpga2sdram_data {
-+	struct device *dev;
-+	struct regmap *sdrctl;
-+	int mask;
-+};
-+
-+static int alt_fpga2sdram_enable_show(struct fpga_bridge *bridge)
-+{
-+	struct alt_fpga2sdram_data *priv = bridge->priv;
-+	int value;
-+
-+	regmap_read(priv->sdrctl, ALT_SDR_CTL_FPGAPORTRST_OFST, &value);
-+
-+	return (value & priv->mask) == priv->mask;
-+}
-+
-+static inline int _alt_fpga2sdram_enable_set(struct alt_fpga2sdram_data *priv,
-+					     bool enable)
-+{
-+	return regmap_update_bits(priv->sdrctl, ALT_SDR_CTL_FPGAPORTRST_OFST,
-+				  priv->mask, enable ? priv->mask : 0);
-+}
-+
-+static int alt_fpga2sdram_enable_set(struct fpga_bridge *bridge, bool enable)
-+{
-+	return _alt_fpga2sdram_enable_set(bridge->priv, enable);
-+}
-+
-+struct prop_map {
-+	char *prop_name;
-+	u32 *prop_value;
-+	u32 prop_max;
-+};
-+
-+static const struct fpga_bridge_ops altera_fpga2sdram_br_ops = {
-+	.enable_set = alt_fpga2sdram_enable_set,
-+	.enable_show = alt_fpga2sdram_enable_show,
-+};
-+
-+static const struct of_device_id altera_fpga_of_match[] = {
-+	{ .compatible = "altr,socfpga-fpga2sdram-bridge" },
-+	{},
-+};
-+
-+static int alt_fpga_bridge_probe(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+	struct alt_fpga2sdram_data *priv;
-+	u32 enable;
-+	struct regmap *sysmgr;
-+	int ret = 0;
-+
-+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	priv->dev = dev;
-+
-+	priv->sdrctl = syscon_regmap_lookup_by_compatible("altr,sdr-ctl");
-+	if (IS_ERR(priv->sdrctl)) {
-+		dev_err(dev, "regmap for altr,sdr-ctl lookup failed.\n");
-+		return PTR_ERR(priv->sdrctl);
-+	}
-+
-+	sysmgr = syscon_regmap_lookup_by_compatible("altr,sys-mgr");
-+	if (IS_ERR(priv->sdrctl)) {
-+		dev_err(dev, "regmap for altr,sys-mgr lookup failed.\n");
-+		return PTR_ERR(sysmgr);
-+	}
-+
-+	/* Get f2s bridge configuration saved in handoff register */
-+	regmap_read(sysmgr, SYSMGR_ISWGRP_HANDOFF3, &priv->mask);
-+
-+	ret = fpga_bridge_register(dev, F2S_BRIDGE_NAME,
-+				   &altera_fpga2sdram_br_ops, priv);
-+	if (ret)
-+		return ret;
-+
-+	dev_info(dev, "driver initialized with handoff %08x\n", priv->mask);
-+
-+	if (!of_property_read_u32(dev->of_node, "bridge-enable", &enable)) {
-+		if (enable > 1) {
-+			dev_warn(dev, "invalid bridge-enable %u > 1\n", enable);
-+		} else {
-+			dev_info(dev, "%s bridge\n",
-+				 (enable ? "enabling" : "disabling"));
-+			ret = _alt_fpga2sdram_enable_set(priv, enable);
-+			if (ret) {
-+				fpga_bridge_unregister(&pdev->dev);
-+				return ret;
-+			}
-+		}
-+	}
-+
-+	return ret;
-+}
-+
-+static int alt_fpga_bridge_remove(struct platform_device *pdev)
-+{
-+	fpga_bridge_unregister(&pdev->dev);
-+
-+	return 0;
-+}
-+
-+MODULE_DEVICE_TABLE(of, altera_fpga_of_match);
-+
-+static struct platform_driver altera_fpga_driver = {
-+	.probe = alt_fpga_bridge_probe,
-+	.remove = alt_fpga_bridge_remove,
-+	.driver = {
-+		.name	= "altera_fpga2sdram_bridge",
-+		.of_match_table = of_match_ptr(altera_fpga_of_match),
-+	},
-+};
-+
-+module_platform_driver(altera_fpga_driver);
-+
-+MODULE_DESCRIPTION("Altera SoCFPGA FPGA to SDRAM Bridge");
-+MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
-+MODULE_LICENSE("GPL v2");
---- /dev/null
-+++ b/drivers/fpga/altera-hps2fpga.c
-@@ -0,0 +1,222 @@
-+/*
-+ * FPGA to/from HPS Bridge Driver for Altera SoCFPGA Devices
-+ *
-+ *  Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
-+ *
-+ * Includes this patch from the mailing list:
-+ *   fpga: altera-hps2fpga: fix HPS2FPGA bridge visibility to L3 masters
-+ *   Signed-off-by: Anatolij Gustschin <agust@denx.de>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+/*
-+ * This driver manages bridges on a Altera SOCFPGA between the ARM host
-+ * processor system (HPS) and the embedded FPGA.
-+ *
-+ * This driver supports enabling and disabling of the configured ports, which
-+ * allows for safe reprogramming of the FPGA, assuming that the new FPGA image
-+ * uses the same port configuration.  Bridges must be disabled before
-+ * reprogramming the FPGA and re-enabled after the FPGA has been programmed.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/fpga/fpga-bridge.h>
-+#include <linux/kernel.h>
-+#include <linux/mfd/syscon.h>
-+#include <linux/module.h>
-+#include <linux/of_platform.h>
-+#include <linux/regmap.h>
-+#include <linux/reset.h>
-+#include <linux/spinlock.h>
-+
-+#define ALT_L3_REMAP_OFST			0x0
-+#define ALT_L3_REMAP_MPUZERO_MSK		0x00000001
-+#define ALT_L3_REMAP_H2F_MSK			0x00000008
-+#define ALT_L3_REMAP_LWH2F_MSK			0x00000010
-+
-+#define HPS2FPGA_BRIDGE_NAME			"hps2fpga"
-+#define LWHPS2FPGA_BRIDGE_NAME			"lwhps2fpga"
-+#define FPGA2HPS_BRIDGE_NAME			"fpga2hps"
-+
-+struct altera_hps2fpga_data {
-+	const char *name;
-+	struct reset_control *bridge_reset;
-+	struct regmap *l3reg;
-+	unsigned int remap_mask;
-+	struct clk *clk;
-+};
-+
-+static int alt_hps2fpga_enable_show(struct fpga_bridge *bridge)
-+{
-+	struct altera_hps2fpga_data *priv = bridge->priv;
-+
-+	return reset_control_status(priv->bridge_reset);
-+}
-+
-+/* The L3 REMAP register is write only, so keep a cached value. */
-+static unsigned int l3_remap_shadow;
-+static spinlock_t l3_remap_lock;
-+
-+static int _alt_hps2fpga_enable_set(struct altera_hps2fpga_data *priv,
-+				    bool enable)
-+{
-+	unsigned long flags;
-+	int ret;
-+
-+	/* bring bridge out of reset */
-+	if (enable)
-+		ret = reset_control_deassert(priv->bridge_reset);
-+	else
-+		ret = reset_control_assert(priv->bridge_reset);
-+	if (ret)
-+		return ret;
-+
-+	/* Allow bridge to be visible to L3 masters or not */
-+	if (priv->remap_mask) {
-+		spin_lock_irqsave(&l3_remap_lock, flags);
-+		l3_remap_shadow |= ALT_L3_REMAP_MPUZERO_MSK;
-+
-+		if (enable)
-+			l3_remap_shadow |= priv->remap_mask;
-+		else
-+			l3_remap_shadow &= ~priv->remap_mask;
-+
-+		ret = regmap_write(priv->l3reg, ALT_L3_REMAP_OFST,
-+				   l3_remap_shadow);
-+		spin_unlock_irqrestore(&l3_remap_lock, flags);
-+	}
-+
-+	return ret;
-+}
-+
-+static int alt_hps2fpga_enable_set(struct fpga_bridge *bridge, bool enable)
-+{
-+	return _alt_hps2fpga_enable_set(bridge->priv, enable);
-+}
-+
-+static const struct fpga_bridge_ops altera_hps2fpga_br_ops = {
-+	.enable_set = alt_hps2fpga_enable_set,
-+	.enable_show = alt_hps2fpga_enable_show,
-+};
-+
-+static struct altera_hps2fpga_data hps2fpga_data  = {
-+	.name = HPS2FPGA_BRIDGE_NAME,
-+	.remap_mask = ALT_L3_REMAP_H2F_MSK,
-+};
-+
-+static struct altera_hps2fpga_data lwhps2fpga_data  = {
-+	.name = LWHPS2FPGA_BRIDGE_NAME,
-+	.remap_mask = ALT_L3_REMAP_LWH2F_MSK,
-+};
-+
-+static struct altera_hps2fpga_data fpga2hps_data  = {
-+	.name = FPGA2HPS_BRIDGE_NAME,
-+};
-+
-+static const struct of_device_id altera_fpga_of_match[] = {
-+	{ .compatible = "altr,socfpga-hps2fpga-bridge",
-+	  .data = &hps2fpga_data },
-+	{ .compatible = "altr,socfpga-lwhps2fpga-bridge",
-+	  .data = &lwhps2fpga_data },
-+	{ .compatible = "altr,socfpga-fpga2hps-bridge",
-+	  .data = &fpga2hps_data },
-+	{},
-+};
-+
-+static int alt_fpga_bridge_probe(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+	struct altera_hps2fpga_data *priv;
-+	const struct of_device_id *of_id;
-+	u32 enable;
-+	int ret;
-+
-+	of_id = of_match_device(altera_fpga_of_match, dev);
-+	priv = (struct altera_hps2fpga_data *)of_id->data;
-+
-+	priv->bridge_reset = of_reset_control_get_by_index(dev->of_node, 0);
-+	if (IS_ERR(priv->bridge_reset)) {
-+		dev_err(dev, "Could not get %s reset control\n", priv->name);
-+		return PTR_ERR(priv->bridge_reset);
-+	}
-+
-+	if (priv->remap_mask) {
-+		priv->l3reg = syscon_regmap_lookup_by_compatible("altr,l3regs");
-+		if (IS_ERR(priv->l3reg)) {
-+			dev_err(dev, "regmap for altr,l3regs lookup failed\n");
-+			return PTR_ERR(priv->l3reg);
-+		}
-+	}
-+
-+	priv->clk = devm_clk_get(dev, NULL);
-+	if (IS_ERR(priv->clk)) {
-+		dev_err(dev, "no clock specified\n");
-+		return PTR_ERR(priv->clk);
-+	}
-+
-+	ret = clk_prepare_enable(priv->clk);
-+	if (ret) {
-+		dev_err(dev, "could not enable clock\n");
-+		return -EBUSY;
-+	}
-+
-+	spin_lock_init(&l3_remap_lock);
-+
-+	if (!of_property_read_u32(dev->of_node, "bridge-enable", &enable)) {
-+		if (enable > 1) {
-+			dev_warn(dev, "invalid bridge-enable %u > 1\n", enable);
-+		} else {
-+			dev_info(dev, "%s bridge\n",
-+				 (enable ? "enabling" : "disabling"));
-+
-+			ret = _alt_hps2fpga_enable_set(priv, enable);
-+			if (ret) {
-+				fpga_bridge_unregister(&pdev->dev);
-+				return ret;
-+			}
-+		}
-+	}
-+
-+	return fpga_bridge_register(dev, priv->name, &altera_hps2fpga_br_ops,
-+				    priv);
-+}
-+
-+static int alt_fpga_bridge_remove(struct platform_device *pdev)
-+{
-+	struct fpga_bridge *bridge = platform_get_drvdata(pdev);
-+	struct altera_hps2fpga_data *priv = bridge->priv;
-+
-+	fpga_bridge_unregister(&pdev->dev);
-+
-+	clk_disable_unprepare(priv->clk);
-+
-+	return 0;
-+}
-+
-+MODULE_DEVICE_TABLE(of, altera_fpga_of_match);
-+
-+static struct platform_driver alt_fpga_bridge_driver = {
-+	.probe = alt_fpga_bridge_probe,
-+	.remove = alt_fpga_bridge_remove,
-+	.driver = {
-+		.name	= "altera_hps2fpga_bridge",
-+		.of_match_table = of_match_ptr(altera_fpga_of_match),
-+	},
-+};
-+
-+module_platform_driver(alt_fpga_bridge_driver);
-+
-+MODULE_DESCRIPTION("Altera SoCFPGA HPS to FPGA Bridge");
-+MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
-+MODULE_LICENSE("GPL v2");
diff --git a/patches.socfpga/0033-fpga-add-altera-freeze-bridge-support.patch b/patches.socfpga/0033-fpga-add-altera-freeze-bridge-support.patch
deleted file mode 100644
index f63baf12e02da1..00000000000000
--- a/patches.socfpga/0033-fpga-add-altera-freeze-bridge-support.patch
+++ /dev/null
@@ -1,324 +0,0 @@
-From cd1d46154270d9ee1e740b310999ae0bb7449e21 Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Tue, 1 Nov 2016 14:14:31 -0500
-Subject: [PATCH 033/103] fpga: add altera freeze bridge support
-
-Add a low level driver for Altera Freeze Bridges to the FPGA Bridge
-framework.  A freeze bridge is a bridge that exists in the FPGA
-fabric to isolate one region of the FPGA from the busses while that
-one region is being reprogrammed.
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/Kconfig                |    9 +
- drivers/fpga/Makefile               |    1 
- drivers/fpga/altera-freeze-bridge.c |  273 ++++++++++++++++++++++++++++++++++++
- 3 files changed, 283 insertions(+)
- create mode 100644 drivers/fpga/altera-freeze-bridge.c
-
---- a/drivers/fpga/Kconfig
-+++ b/drivers/fpga/Kconfig
-@@ -47,6 +47,15 @@ config SOCFPGA_FPGA_BRIDGE
- 	  Say Y to enable drivers for FPGA bridges for Altera SOCFPGA
- 	  devices.
- 
-+config ALTERA_FREEZE_BRIDGE
-+	tristate "Altera FPGA Freeze Bridge"
-+	depends on ARCH_SOCFPGA && FPGA_BRIDGE
-+	help
-+	  Say Y to enable drivers for Altera FPGA Freeze bridges.  A
-+	  freeze bridge is a bridge that exists in the FPGA fabric to
-+	  isolate one region of the FPGA from the busses while that
-+	  region is being reprogrammed.
-+
- endif # FPGA
- 
- endmenu
---- a/drivers/fpga/Makefile
-+++ b/drivers/fpga/Makefile
-@@ -12,6 +12,7 @@ obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)	+= zynq
- # FPGA Bridge Drivers
- obj-$(CONFIG_FPGA_BRIDGE)		+= fpga-bridge.o
- obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE)	+= altera-hps2fpga.o altera-fpga2sdram.o
-+obj-$(CONFIG_ALTERA_FREEZE_BRIDGE)	+= altera-freeze-bridge.o
- 
- # High Level Interfaces
- obj-$(CONFIG_FPGA_REGION)		+= fpga-region.o
---- /dev/null
-+++ b/drivers/fpga/altera-freeze-bridge.c
-@@ -0,0 +1,273 @@
-+/*
-+ * FPGA Freeze Bridge Controller
-+ *
-+ *  Copyright (C) 2016 Altera Corporation. All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+#include <linux/delay.h>
-+#include <linux/io.h>
-+#include <linux/kernel.h>
-+#include <linux/of_device.h>
-+#include <linux/module.h>
-+#include <linux/fpga/fpga-bridge.h>
-+
-+#define FREEZE_CSR_STATUS_OFFSET		0
-+#define FREEZE_CSR_CTRL_OFFSET			4
-+#define FREEZE_CSR_ILLEGAL_REQ_OFFSET		8
-+#define FREEZE_CSR_REG_VERSION			12
-+
-+#define FREEZE_CSR_SUPPORTED_VERSION		2
-+
-+#define FREEZE_CSR_STATUS_FREEZE_REQ_DONE	BIT(0)
-+#define FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE	BIT(1)
-+
-+#define FREEZE_CSR_CTRL_FREEZE_REQ		BIT(0)
-+#define FREEZE_CSR_CTRL_RESET_REQ		BIT(1)
-+#define FREEZE_CSR_CTRL_UNFREEZE_REQ		BIT(2)
-+
-+#define FREEZE_BRIDGE_NAME			"freeze"
-+
-+struct altera_freeze_br_data {
-+	struct device *dev;
-+	void __iomem *base_addr;
-+	bool enable;
-+};
-+
-+/*
-+ * Poll status until status bit is set or we have a timeout.
-+ */
-+static int altera_freeze_br_req_ack(struct altera_freeze_br_data *priv,
-+				    u32 timeout, u32 req_ack)
-+{
-+	struct device *dev = priv->dev;
-+	void __iomem *csr_illegal_req_addr = priv->base_addr +
-+					     FREEZE_CSR_ILLEGAL_REQ_OFFSET;
-+	u32 status, illegal, ctrl;
-+	int ret = -ETIMEDOUT;
-+
-+	do {
-+		illegal = readl(csr_illegal_req_addr);
-+		if (illegal) {
-+			dev_err(dev, "illegal request detected 0x%x", illegal);
-+
-+			writel(1, csr_illegal_req_addr);
-+
-+			illegal = readl(csr_illegal_req_addr);
-+			if (illegal)
-+				dev_err(dev, "illegal request not cleared 0x%x",
-+					illegal);
-+
-+			ret = -EINVAL;
-+			break;
-+		}
-+
-+		status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET);
-+		dev_dbg(dev, "%s %x %x\n", __func__, status, req_ack);
-+		status &= req_ack;
-+		if (status) {
-+			ctrl = readl(priv->base_addr + FREEZE_CSR_CTRL_OFFSET);
-+			dev_dbg(dev, "%s request %x acknowledged %x %x\n",
-+				__func__, req_ack, status, ctrl);
-+			ret = 0;
-+			break;
-+		}
-+
-+		udelay(1);
-+	} while (timeout--);
-+
-+	if (ret == -ETIMEDOUT)
-+		dev_err(dev, "%s timeout waiting for 0x%x\n",
-+			__func__, req_ack);
-+
-+	return ret;
-+}
-+
-+static int altera_freeze_br_do_freeze(struct altera_freeze_br_data *priv,
-+				      u32 timeout)
-+{
-+	struct device *dev = priv->dev;
-+	void __iomem *csr_ctrl_addr = priv->base_addr +
-+				      FREEZE_CSR_CTRL_OFFSET;
-+	u32 status;
-+	int ret;
-+
-+	status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET);
-+
-+	dev_dbg(dev, "%s %d %d\n", __func__, status, readl(csr_ctrl_addr));
-+
-+	if (status & FREEZE_CSR_STATUS_FREEZE_REQ_DONE) {
-+		dev_dbg(dev, "%s bridge already disabled %d\n",
-+			__func__, status);
-+		return 0;
-+	} else if (!(status & FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE)) {
-+		dev_err(dev, "%s bridge not enabled %d\n", __func__, status);
-+		return -EINVAL;
-+	}
-+
-+	writel(FREEZE_CSR_CTRL_FREEZE_REQ, csr_ctrl_addr);
-+
-+	ret = altera_freeze_br_req_ack(priv, timeout,
-+				       FREEZE_CSR_STATUS_FREEZE_REQ_DONE);
-+
-+	if (ret)
-+		writel(0, csr_ctrl_addr);
-+	else
-+		writel(FREEZE_CSR_CTRL_RESET_REQ, csr_ctrl_addr);
-+
-+	return ret;
-+}
-+
-+static int altera_freeze_br_do_unfreeze(struct altera_freeze_br_data *priv,
-+					u32 timeout)
-+{
-+	struct device *dev = priv->dev;
-+	void __iomem *csr_ctrl_addr = priv->base_addr +
-+				      FREEZE_CSR_CTRL_OFFSET;
-+	u32 status;
-+	int ret;
-+
-+	writel(0, csr_ctrl_addr);
-+
-+	status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET);
-+
-+	dev_dbg(dev, "%s %d %d\n", __func__, status, readl(csr_ctrl_addr));
-+
-+	if (status & FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE) {
-+		dev_dbg(dev, "%s bridge already enabled %d\n",
-+			__func__, status);
-+		return 0;
-+	} else if (!(status & FREEZE_CSR_STATUS_FREEZE_REQ_DONE)) {
-+		dev_err(dev, "%s bridge not frozen %d\n", __func__, status);
-+		return -EINVAL;
-+	}
-+
-+	writel(FREEZE_CSR_CTRL_UNFREEZE_REQ, csr_ctrl_addr);
-+
-+	ret = altera_freeze_br_req_ack(priv, timeout,
-+				       FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE);
-+
-+	status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET);
-+
-+	dev_dbg(dev, "%s %d %d\n", __func__, status, readl(csr_ctrl_addr));
-+
-+	writel(0, csr_ctrl_addr);
-+
-+	return ret;
-+}
-+
-+/*
-+ * enable = 1 : allow traffic through the bridge
-+ * enable = 0 : disable traffic through the bridge
-+ */
-+static int altera_freeze_br_enable_set(struct fpga_bridge *bridge,
-+				       bool enable)
-+{
-+	struct altera_freeze_br_data *priv = bridge->priv;
-+	struct fpga_image_info *info = bridge->info;
-+	u32 timeout = 0;
-+	int ret;
-+
-+	if (enable) {
-+		if (info)
-+			timeout = info->enable_timeout_us;
-+
-+		ret = altera_freeze_br_do_unfreeze(bridge->priv, timeout);
-+	} else {
-+		if (info)
-+			timeout = info->disable_timeout_us;
-+
-+		ret = altera_freeze_br_do_freeze(bridge->priv, timeout);
-+	}
-+
-+	if (!ret)
-+		priv->enable = enable;
-+
-+	return ret;
-+}
-+
-+static int altera_freeze_br_enable_show(struct fpga_bridge *bridge)
-+{
-+	struct altera_freeze_br_data *priv = bridge->priv;
-+
-+	return priv->enable;
-+}
-+
-+static struct fpga_bridge_ops altera_freeze_br_br_ops = {
-+	.enable_set = altera_freeze_br_enable_set,
-+	.enable_show = altera_freeze_br_enable_show,
-+};
-+
-+static const struct of_device_id altera_freeze_br_of_match[] = {
-+	{ .compatible = "altr,freeze-bridge-controller", },
-+	{},
-+};
-+MODULE_DEVICE_TABLE(of, altera_freeze_br_of_match);
-+
-+static int altera_freeze_br_probe(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+	struct device_node *np = pdev->dev.of_node;
-+	struct altera_freeze_br_data *priv;
-+	struct resource *res;
-+	u32 status, revision;
-+
-+	if (!np)
-+		return -ENODEV;
-+
-+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	priv->dev = dev;
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	priv->base_addr = devm_ioremap_resource(dev, res);
-+	if (IS_ERR(priv->base_addr))
-+		return PTR_ERR(priv->base_addr);
-+
-+	status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET);
-+	if (status & FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE)
-+		priv->enable = 1;
-+
-+	revision = readl(priv->base_addr + FREEZE_CSR_REG_VERSION);
-+	if (revision != FREEZE_CSR_SUPPORTED_VERSION)
-+		dev_warn(dev,
-+			 "%s Freeze Controller unexpected revision %d != %d\n",
-+			 __func__, revision, FREEZE_CSR_SUPPORTED_VERSION);
-+
-+	return fpga_bridge_register(dev, FREEZE_BRIDGE_NAME,
-+				    &altera_freeze_br_br_ops, priv);
-+}
-+
-+static int altera_freeze_br_remove(struct platform_device *pdev)
-+{
-+	fpga_bridge_unregister(&pdev->dev);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver altera_freeze_br_driver = {
-+	.probe = altera_freeze_br_probe,
-+	.remove = altera_freeze_br_remove,
-+	.driver = {
-+		.name	= "altera_freeze_br",
-+		.of_match_table = of_match_ptr(altera_freeze_br_of_match),
-+	},
-+};
-+
-+module_platform_driver(altera_freeze_br_driver);
-+
-+MODULE_DESCRIPTION("Altera Freeze Bridge");
-+MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
-+MODULE_LICENSE("GPL v2");
diff --git a/patches.socfpga/0034-fpga-manager-Add-Socfpga-Arria10-support.patch b/patches.socfpga/0034-fpga-manager-Add-Socfpga-Arria10-support.patch
deleted file mode 100644
index 7eed0ffbb38b86..00000000000000
--- a/patches.socfpga/0034-fpga-manager-Add-Socfpga-Arria10-support.patch
+++ /dev/null
@@ -1,602 +0,0 @@
-From d2d6523f3ef50daee666b364d8438de62ed5a40b Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Tue, 1 Nov 2016 14:14:32 -0500
-Subject: [PATCH 034/103] fpga-manager: Add Socfpga Arria10 support
-
-Add low level driver to support reprogramming FPGAs for Altera
-SoCFPGA Arria10.
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/Kconfig       |    6 
- drivers/fpga/Makefile      |    1 
- drivers/fpga/socfpga-a10.c |  556 +++++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 563 insertions(+)
- create mode 100644 drivers/fpga/socfpga-a10.c
-
---- a/drivers/fpga/Kconfig
-+++ b/drivers/fpga/Kconfig
-@@ -26,6 +26,12 @@ config FPGA_MGR_SOCFPGA
- 	help
- 	  FPGA manager driver support for Altera SOCFPGA.
- 
-+config FPGA_MGR_SOCFPGA_A10
-+	tristate "Altera SoCFPGA Arria10"
-+	depends on ARCH_SOCFPGA
-+	help
-+	  FPGA manager driver support for Altera Arria10 SoCFPGA.
-+
- config FPGA_MGR_ZYNQ_FPGA
- 	tristate "Xilinx Zynq FPGA"
- 	depends on ARCH_ZYNQ || COMPILE_TEST
---- a/drivers/fpga/Makefile
-+++ b/drivers/fpga/Makefile
-@@ -7,6 +7,7 @@ obj-$(CONFIG_FPGA)			+= fpga-mgr.o
- 
- # FPGA Manager Drivers
- obj-$(CONFIG_FPGA_MGR_SOCFPGA)		+= socfpga.o
-+obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10)	+= socfpga-a10.o
- obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)	+= zynq-fpga.o
- 
- # FPGA Bridge Drivers
---- /dev/null
-+++ b/drivers/fpga/socfpga-a10.c
-@@ -0,0 +1,556 @@
-+/*
-+ * FPGA Manager Driver for Altera Arria10 SoCFPGA
-+ *
-+ * Copyright (C) 2015-2016 Altera Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/device.h>
-+#include <linux/delay.h>
-+#include <linux/fpga/fpga-mgr.h>
-+#include <linux/io.h>
-+#include <linux/module.h>
-+#include <linux/of_address.h>
-+#include <linux/regmap.h>
-+
-+#define A10_FPGAMGR_DCLKCNT_OFST				0x08
-+#define A10_FPGAMGR_DCLKSTAT_OFST				0x0c
-+#define A10_FPGAMGR_IMGCFG_CTL_00_OFST				0x70
-+#define A10_FPGAMGR_IMGCFG_CTL_01_OFST				0x74
-+#define A10_FPGAMGR_IMGCFG_CTL_02_OFST				0x78
-+#define A10_FPGAMGR_IMGCFG_STAT_OFST				0x80
-+
-+#define A10_FPGAMGR_DCLKSTAT_DCLKDONE				BIT(0)
-+
-+#define A10_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_NCONFIG		BIT(0)
-+#define A10_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_NSTATUS		BIT(1)
-+#define A10_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_CONDONE		BIT(2)
-+#define A10_FPGAMGR_IMGCFG_CTL_00_S2F_NCONFIG			BIT(8)
-+#define A10_FPGAMGR_IMGCFG_CTL_00_S2F_NSTATUS_OE		BIT(16)
-+#define A10_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE		BIT(24)
-+
-+#define A10_FPGAMGR_IMGCFG_CTL_01_S2F_NENABLE_CONFIG		BIT(0)
-+#define A10_FPGAMGR_IMGCFG_CTL_01_S2F_PR_REQUEST		BIT(16)
-+#define A10_FPGAMGR_IMGCFG_CTL_01_S2F_NCE			BIT(24)
-+
-+#define A10_FPGAMGR_IMGCFG_CTL_02_EN_CFG_CTRL			BIT(0)
-+#define A10_FPGAMGR_IMGCFG_CTL_02_CDRATIO_MASK		(BIT(16) | BIT(17))
-+#define A10_FPGAMGR_IMGCFG_CTL_02_CDRATIO_SHIFT			16
-+#define A10_FPGAMGR_IMGCFG_CTL_02_CFGWIDTH			BIT(24)
-+#define A10_FPGAMGR_IMGCFG_CTL_02_CFGWIDTH_SHIFT		24
-+
-+#define A10_FPGAMGR_IMGCFG_STAT_F2S_CRC_ERROR			BIT(0)
-+#define A10_FPGAMGR_IMGCFG_STAT_F2S_EARLY_USERMODE		BIT(1)
-+#define A10_FPGAMGR_IMGCFG_STAT_F2S_USERMODE			BIT(2)
-+#define A10_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN			BIT(4)
-+#define A10_FPGAMGR_IMGCFG_STAT_F2S_CONDONE_PIN			BIT(6)
-+#define A10_FPGAMGR_IMGCFG_STAT_F2S_PR_READY			BIT(9)
-+#define A10_FPGAMGR_IMGCFG_STAT_F2S_PR_DONE			BIT(10)
-+#define A10_FPGAMGR_IMGCFG_STAT_F2S_PR_ERROR			BIT(11)
-+#define A10_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN			BIT(12)
-+#define A10_FPGAMGR_IMGCFG_STAT_F2S_MSEL_MASK	(BIT(16) | BIT(17) | BIT(18))
-+#define A10_FPGAMGR_IMGCFG_STAT_F2S_MSEL_SHIFT		        16
-+
-+/* FPGA CD Ratio Value */
-+#define CDRATIO_x1						0x0
-+#define CDRATIO_x2						0x1
-+#define CDRATIO_x4						0x2
-+#define CDRATIO_x8						0x3
-+
-+/* Configuration width 16/32 bit */
-+#define CFGWDTH_32						1
-+#define CFGWDTH_16						0
-+
-+/*
-+ * struct a10_fpga_priv - private data for fpga manager
-+ * @regmap: regmap for register access
-+ * @fpga_data_addr: iomap for single address data register to FPGA
-+ * @clk: clock
-+ */
-+struct a10_fpga_priv {
-+	struct regmap *regmap;
-+	void __iomem *fpga_data_addr;
-+	struct clk *clk;
-+};
-+
-+static bool socfpga_a10_fpga_writeable_reg(struct device *dev, unsigned int reg)
-+{
-+	switch (reg) {
-+	case A10_FPGAMGR_DCLKCNT_OFST:
-+	case A10_FPGAMGR_DCLKSTAT_OFST:
-+	case A10_FPGAMGR_IMGCFG_CTL_00_OFST:
-+	case A10_FPGAMGR_IMGCFG_CTL_01_OFST:
-+	case A10_FPGAMGR_IMGCFG_CTL_02_OFST:
-+		return true;
-+	}
-+	return false;
-+}
-+
-+static bool socfpga_a10_fpga_readable_reg(struct device *dev, unsigned int reg)
-+{
-+	switch (reg) {
-+	case A10_FPGAMGR_DCLKCNT_OFST:
-+	case A10_FPGAMGR_DCLKSTAT_OFST:
-+	case A10_FPGAMGR_IMGCFG_CTL_00_OFST:
-+	case A10_FPGAMGR_IMGCFG_CTL_01_OFST:
-+	case A10_FPGAMGR_IMGCFG_CTL_02_OFST:
-+	case A10_FPGAMGR_IMGCFG_STAT_OFST:
-+		return true;
-+	}
-+	return false;
-+}
-+
-+static const struct regmap_config socfpga_a10_fpga_regmap_config = {
-+	.reg_bits = 32,
-+	.reg_stride = 4,
-+	.val_bits = 32,
-+	.writeable_reg = socfpga_a10_fpga_writeable_reg,
-+	.readable_reg = socfpga_a10_fpga_readable_reg,
-+	.max_register = A10_FPGAMGR_IMGCFG_STAT_OFST,
-+	.cache_type = REGCACHE_NONE,
-+};
-+
-+/*
-+ * from the register map description of cdratio in imgcfg_ctrl_02:
-+ *  Normal Configuration    : 32bit Passive Parallel
-+ *  Partial Reconfiguration : 16bit Passive Parallel
-+ */
-+static void socfpga_a10_fpga_set_cfg_width(struct a10_fpga_priv *priv,
-+					   int width)
-+{
-+	width <<= A10_FPGAMGR_IMGCFG_CTL_02_CFGWIDTH_SHIFT;
-+
-+	regmap_update_bits(priv->regmap, A10_FPGAMGR_IMGCFG_CTL_02_OFST,
-+			   A10_FPGAMGR_IMGCFG_CTL_02_CFGWIDTH, width);
-+}
-+
-+static void socfpga_a10_fpga_generate_dclks(struct a10_fpga_priv *priv,
-+					    u32 count)
-+{
-+	u32 val;
-+
-+	/* Clear any existing DONE status. */
-+	regmap_write(priv->regmap, A10_FPGAMGR_DCLKSTAT_OFST,
-+		     A10_FPGAMGR_DCLKSTAT_DCLKDONE);
-+
-+	/* Issue the DCLK regmap. */
-+	regmap_write(priv->regmap, A10_FPGAMGR_DCLKCNT_OFST, count);
-+
-+	/* wait till the dclkcnt done */
-+	regmap_read_poll_timeout(priv->regmap, A10_FPGAMGR_DCLKSTAT_OFST, val,
-+				 val, 1, 100);
-+
-+	/* Clear DONE status. */
-+	regmap_write(priv->regmap, A10_FPGAMGR_DCLKSTAT_OFST,
-+		     A10_FPGAMGR_DCLKSTAT_DCLKDONE);
-+}
-+
-+#define RBF_ENCRYPTION_MODE_OFFSET		69
-+#define RBF_DECOMPRESS_OFFSET			229
-+
-+static int socfpga_a10_fpga_encrypted(u32 *buf32, size_t buf32_size)
-+{
-+	if (buf32_size < RBF_ENCRYPTION_MODE_OFFSET + 1)
-+		return -EINVAL;
-+
-+	/* Is the bitstream encrypted? */
-+	return ((buf32[RBF_ENCRYPTION_MODE_OFFSET] >> 2) & 3) != 0;
-+}
-+
-+static int socfpga_a10_fpga_compressed(u32 *buf32, size_t buf32_size)
-+{
-+	if (buf32_size < RBF_DECOMPRESS_OFFSET + 1)
-+		return -EINVAL;
-+
-+	/* Is the bitstream compressed? */
-+	return !((buf32[RBF_DECOMPRESS_OFFSET] >> 1) & 1);
-+}
-+
-+static unsigned int socfpga_a10_fpga_get_cd_ratio(unsigned int cfg_width,
-+						  bool encrypt, bool compress)
-+{
-+	unsigned int cd_ratio;
-+
-+	/*
-+	 * cd ratio is dependent on cfg width and whether the bitstream
-+	 * is encrypted and/or compressed.
-+	 *
-+	 * | width | encr. | compr. | cd ratio |
-+	 * |  16   |   0   |   0    |     1    |
-+	 * |  16   |   0   |   1    |     4    |
-+	 * |  16   |   1   |   0    |     2    |
-+	 * |  16   |   1   |   1    |     4    |
-+	 * |  32   |   0   |   0    |     1    |
-+	 * |  32   |   0   |   1    |     8    |
-+	 * |  32   |   1   |   0    |     4    |
-+	 * |  32   |   1   |   1    |     8    |
-+	 */
-+	if (!compress && !encrypt)
-+		return CDRATIO_x1;
-+
-+	if (compress)
-+		cd_ratio = CDRATIO_x4;
-+	else
-+		cd_ratio = CDRATIO_x2;
-+
-+	/* If 32 bit, double the cd ratio by incrementing the field  */
-+	if (cfg_width == CFGWDTH_32)
-+		cd_ratio += 1;
-+
-+	return cd_ratio;
-+}
-+
-+static int socfpga_a10_fpga_set_cdratio(struct fpga_manager *mgr,
-+					unsigned int cfg_width,
-+					const char *buf, size_t count)
-+{
-+	struct a10_fpga_priv *priv = mgr->priv;
-+	unsigned int cd_ratio;
-+	int encrypt, compress;
-+
-+	encrypt = socfpga_a10_fpga_encrypted((u32 *)buf, count / 4);
-+	if (encrypt < 0)
-+		return -EINVAL;
-+
-+	compress = socfpga_a10_fpga_compressed((u32 *)buf, count / 4);
-+	if (compress < 0)
-+		return -EINVAL;
-+
-+	cd_ratio = socfpga_a10_fpga_get_cd_ratio(cfg_width, encrypt, compress);
-+
-+	regmap_update_bits(priv->regmap, A10_FPGAMGR_IMGCFG_CTL_02_OFST,
-+			   A10_FPGAMGR_IMGCFG_CTL_02_CDRATIO_MASK,
-+			   cd_ratio << A10_FPGAMGR_IMGCFG_CTL_02_CDRATIO_SHIFT);
-+
-+	return 0;
-+}
-+
-+static u32 socfpga_a10_fpga_read_stat(struct a10_fpga_priv *priv)
-+{
-+	u32 val;
-+
-+	regmap_read(priv->regmap, A10_FPGAMGR_IMGCFG_STAT_OFST, &val);
-+
-+	return val;
-+}
-+
-+static int socfpga_a10_fpga_wait_for_pr_ready(struct a10_fpga_priv *priv)
-+{
-+	u32 reg, i;
-+
-+	for (i = 0; i < 10 ; i++) {
-+		reg = socfpga_a10_fpga_read_stat(priv);
-+
-+		if (reg & A10_FPGAMGR_IMGCFG_STAT_F2S_PR_ERROR)
-+			return -EINVAL;
-+
-+		if (reg & A10_FPGAMGR_IMGCFG_STAT_F2S_PR_READY)
-+			return 0;
-+	}
-+
-+	return -ETIMEDOUT;
-+}
-+
-+static int socfpga_a10_fpga_wait_for_pr_done(struct a10_fpga_priv *priv)
-+{
-+	u32 reg, i;
-+
-+	for (i = 0; i < 10 ; i++) {
-+		reg = socfpga_a10_fpga_read_stat(priv);
-+
-+		if (reg & A10_FPGAMGR_IMGCFG_STAT_F2S_PR_ERROR)
-+			return -EINVAL;
-+
-+		if (reg & A10_FPGAMGR_IMGCFG_STAT_F2S_PR_DONE)
-+			return 0;
-+	}
-+
-+	return -ETIMEDOUT;
-+}
-+
-+/* Start the FPGA programming by initialize the FPGA Manager */
-+static int socfpga_a10_fpga_write_init(struct fpga_manager *mgr,
-+				       struct fpga_image_info *info,
-+				       const char *buf, size_t count)
-+{
-+	struct a10_fpga_priv *priv = mgr->priv;
-+	unsigned int cfg_width;
-+	u32 msel, stat, mask;
-+	int ret;
-+
-+	if (info->flags & FPGA_MGR_PARTIAL_RECONFIG)
-+		cfg_width = CFGWDTH_16;
-+	else
-+		return -EINVAL;
-+
-+	/* Check for passive parallel (msel == 000 or 001) */
-+	msel = socfpga_a10_fpga_read_stat(priv);
-+	msel &= A10_FPGAMGR_IMGCFG_STAT_F2S_MSEL_MASK;
-+	msel >>= A10_FPGAMGR_IMGCFG_STAT_F2S_MSEL_SHIFT;
-+	if ((msel != 0) && (msel != 1)) {
-+		dev_dbg(&mgr->dev, "Fail: invalid msel=%d\n", msel);
-+		return -EINVAL;
-+	}
-+
-+	/* Make sure no external devices are interfering */
-+	stat = socfpga_a10_fpga_read_stat(priv);
-+	mask = A10_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN |
-+	       A10_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN;
-+	if ((stat & mask) != mask)
-+		return -EINVAL;
-+
-+	/* Set cfg width */
-+	socfpga_a10_fpga_set_cfg_width(priv, cfg_width);
-+
-+	/* Determine cd ratio from bitstream header and set cd ratio */
-+	ret = socfpga_a10_fpga_set_cdratio(mgr, cfg_width, buf, count);
-+	if (ret)
-+		return ret;
-+
-+	/*
-+	 * Clear s2f_nce to enable chip select.  Leave pr_request
-+	 * unasserted and override disabled.
-+	 */
-+	regmap_write(priv->regmap, A10_FPGAMGR_IMGCFG_CTL_01_OFST,
-+		     A10_FPGAMGR_IMGCFG_CTL_01_S2F_NENABLE_CONFIG);
-+
-+	/* Set cfg_ctrl to enable s2f dclk and data */
-+	regmap_update_bits(priv->regmap, A10_FPGAMGR_IMGCFG_CTL_02_OFST,
-+			   A10_FPGAMGR_IMGCFG_CTL_02_EN_CFG_CTRL,
-+			   A10_FPGAMGR_IMGCFG_CTL_02_EN_CFG_CTRL);
-+
-+	/*
-+	 * Disable overrides not needed for pr.
-+	 * s2f_config==1 leaves reset deasseted.
-+	 */
-+	regmap_write(priv->regmap, A10_FPGAMGR_IMGCFG_CTL_00_OFST,
-+		     A10_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_NCONFIG |
-+		     A10_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_NSTATUS |
-+		     A10_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_CONDONE |
-+		     A10_FPGAMGR_IMGCFG_CTL_00_S2F_NCONFIG);
-+
-+	/* Enable override for data, dclk, nce, and pr_request to CSS */
-+	regmap_update_bits(priv->regmap, A10_FPGAMGR_IMGCFG_CTL_01_OFST,
-+			   A10_FPGAMGR_IMGCFG_CTL_01_S2F_NENABLE_CONFIG, 0);
-+
-+	/* Send some clocks to clear out any errors */
-+	socfpga_a10_fpga_generate_dclks(priv, 256);
-+
-+	/* Assert pr_request */
-+	regmap_update_bits(priv->regmap, A10_FPGAMGR_IMGCFG_CTL_01_OFST,
-+			   A10_FPGAMGR_IMGCFG_CTL_01_S2F_PR_REQUEST,
-+			   A10_FPGAMGR_IMGCFG_CTL_01_S2F_PR_REQUEST);
-+
-+	/* Provide 2048 DCLKs before starting the config data streaming. */
-+	socfpga_a10_fpga_generate_dclks(priv, 0x7ff);
-+
-+	/* Wait for pr_ready */
-+	return socfpga_a10_fpga_wait_for_pr_ready(priv);
-+}
-+
-+/*
-+ * write data to the FPGA data register
-+ */
-+static int socfpga_a10_fpga_write(struct fpga_manager *mgr, const char *buf,
-+				  size_t count)
-+{
-+	struct a10_fpga_priv *priv = mgr->priv;
-+	u32 *buffer_32 = (u32 *)buf;
-+	size_t i = 0;
-+
-+	if (count <= 0)
-+		return -EINVAL;
-+
-+	/* Write out the complete 32-bit chunks */
-+	while (count >= sizeof(u32)) {
-+		writel(buffer_32[i++], priv->fpga_data_addr);
-+		count -= sizeof(u32);
-+	}
-+
-+	/* Write out remaining non 32-bit chunks */
-+	switch (count) {
-+	case 3:
-+		writel(buffer_32[i++] & 0x00ffffff, priv->fpga_data_addr);
-+		break;
-+	case 2:
-+		writel(buffer_32[i++] & 0x0000ffff, priv->fpga_data_addr);
-+		break;
-+	case 1:
-+		writel(buffer_32[i++] & 0x000000ff, priv->fpga_data_addr);
-+		break;
-+	case 0:
-+		break;
-+	default:
-+		/* This will never happen */
-+		return -EFAULT;
-+	}
-+
-+	return 0;
-+}
-+
-+static int socfpga_a10_fpga_write_complete(struct fpga_manager *mgr,
-+					   struct fpga_image_info *info)
-+{
-+	struct a10_fpga_priv *priv = mgr->priv;
-+	u32 reg;
-+	int ret;
-+
-+	/* Wait for pr_done */
-+	ret = socfpga_a10_fpga_wait_for_pr_done(priv);
-+
-+	/* Clear pr_request */
-+	regmap_update_bits(priv->regmap, A10_FPGAMGR_IMGCFG_CTL_01_OFST,
-+			   A10_FPGAMGR_IMGCFG_CTL_01_S2F_PR_REQUEST, 0);
-+
-+	/* Send some clocks to clear out any errors */
-+	socfpga_a10_fpga_generate_dclks(priv, 256);
-+
-+	/* Disable s2f dclk and data */
-+	regmap_update_bits(priv->regmap, A10_FPGAMGR_IMGCFG_CTL_02_OFST,
-+			   A10_FPGAMGR_IMGCFG_CTL_02_EN_CFG_CTRL, 0);
-+
-+	/* Deassert chip select */
-+	regmap_update_bits(priv->regmap, A10_FPGAMGR_IMGCFG_CTL_01_OFST,
-+			   A10_FPGAMGR_IMGCFG_CTL_01_S2F_NCE,
-+			   A10_FPGAMGR_IMGCFG_CTL_01_S2F_NCE);
-+
-+	/* Disable data, dclk, nce, and pr_request override to CSS */
-+	regmap_update_bits(priv->regmap, A10_FPGAMGR_IMGCFG_CTL_01_OFST,
-+			   A10_FPGAMGR_IMGCFG_CTL_01_S2F_NENABLE_CONFIG,
-+			   A10_FPGAMGR_IMGCFG_CTL_01_S2F_NENABLE_CONFIG);
-+
-+	/* Return any errors regarding pr_done or pr_error */
-+	if (ret)
-+		return ret;
-+
-+	/* Final check */
-+	reg = socfpga_a10_fpga_read_stat(priv);
-+
-+	if (((reg & A10_FPGAMGR_IMGCFG_STAT_F2S_USERMODE) == 0) ||
-+	    ((reg & A10_FPGAMGR_IMGCFG_STAT_F2S_CONDONE_PIN) == 0) ||
-+	    ((reg & A10_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN) == 0)) {
-+		dev_dbg(&mgr->dev,
-+			"Timeout in final check. Status=%08xf\n", reg);
-+		return -ETIMEDOUT;
-+	}
-+
-+	return 0;
-+}
-+
-+static enum fpga_mgr_states socfpga_a10_fpga_state(struct fpga_manager *mgr)
-+{
-+	struct a10_fpga_priv *priv = mgr->priv;
-+	u32 reg = socfpga_a10_fpga_read_stat(priv);
-+
-+	if (reg & A10_FPGAMGR_IMGCFG_STAT_F2S_USERMODE)
-+		return FPGA_MGR_STATE_OPERATING;
-+
-+	if (reg & A10_FPGAMGR_IMGCFG_STAT_F2S_PR_READY)
-+		return FPGA_MGR_STATE_WRITE;
-+
-+	if (reg & A10_FPGAMGR_IMGCFG_STAT_F2S_CRC_ERROR)
-+		return FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
-+
-+	if ((reg & A10_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN) == 0)
-+		return FPGA_MGR_STATE_RESET;
-+
-+	return FPGA_MGR_STATE_UNKNOWN;
-+}
-+
-+static const struct fpga_manager_ops socfpga_a10_fpga_mgr_ops = {
-+	.state = socfpga_a10_fpga_state,
-+	.write_init = socfpga_a10_fpga_write_init,
-+	.write = socfpga_a10_fpga_write,
-+	.write_complete = socfpga_a10_fpga_write_complete,
-+};
-+
-+static int socfpga_a10_fpga_probe(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+	struct a10_fpga_priv *priv;
-+	void __iomem *reg_base;
-+	struct resource *res;
-+	int ret;
-+
-+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	/* First mmio base is for register access */
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	reg_base = devm_ioremap_resource(dev, res);
-+	if (IS_ERR(reg_base))
-+		return PTR_ERR(reg_base);
-+
-+	/* Second mmio base is for writing FPGA image data */
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-+	priv->fpga_data_addr = devm_ioremap_resource(dev, res);
-+	if (IS_ERR(priv->fpga_data_addr))
-+		return PTR_ERR(priv->fpga_data_addr);
-+
-+	/* regmap for register access */
-+	priv->regmap = devm_regmap_init_mmio(dev, reg_base,
-+					     &socfpga_a10_fpga_regmap_config);
-+	if (IS_ERR(priv->regmap))
-+		return -ENODEV;
-+
-+	priv->clk = devm_clk_get(dev, NULL);
-+	if (IS_ERR(priv->clk)) {
-+		dev_err(dev, "no clock specified\n");
-+		return PTR_ERR(priv->clk);
-+	}
-+
-+	ret = clk_prepare_enable(priv->clk);
-+	if (ret) {
-+		dev_err(dev, "could not enable clock\n");
-+		return -EBUSY;
-+	}
-+
-+	return fpga_mgr_register(dev, "SoCFPGA Arria10 FPGA Manager",
-+				 &socfpga_a10_fpga_mgr_ops, priv);
-+}
-+
-+static int socfpga_a10_fpga_remove(struct platform_device *pdev)
-+{
-+	struct fpga_manager *mgr = platform_get_drvdata(pdev);
-+	struct a10_fpga_priv *priv = mgr->priv;
-+
-+	fpga_mgr_unregister(&pdev->dev);
-+	clk_disable_unprepare(priv->clk);
-+
-+	return 0;
-+}
-+
-+static const struct of_device_id socfpga_a10_fpga_of_match[] = {
-+	{ .compatible = "altr,socfpga-a10-fpga-mgr", },
-+	{},
-+};
-+
-+MODULE_DEVICE_TABLE(of, socfpga_a10_fpga_of_match);
-+
-+static struct platform_driver socfpga_a10_fpga_driver = {
-+	.probe = socfpga_a10_fpga_probe,
-+	.remove = socfpga_a10_fpga_remove,
-+	.driver = {
-+		.name	= "socfpga_a10_fpga_manager",
-+		.of_match_table = socfpga_a10_fpga_of_match,
-+	},
-+};
-+
-+module_platform_driver(socfpga_a10_fpga_driver);
-+
-+MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
-+MODULE_DESCRIPTION("SoCFPGA Arria10 FPGA Manager");
-+MODULE_LICENSE("GPL v2");
diff --git a/patches.socfpga/0035-ARM-socfpga-checking-the-wrong-variable.patch b/patches.socfpga/0035-ARM-socfpga-checking-the-wrong-variable.patch
deleted file mode 100644
index 91fbf4400d6d9b..00000000000000
--- a/patches.socfpga/0035-ARM-socfpga-checking-the-wrong-variable.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 66990794c5c8e372ef07dd76272f5ac550e5be74 Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Wed, 16 Nov 2016 19:54:40 -0600
-Subject: [PATCH 035/103] ARM: socfpga: checking the wrong variable
-
-This is a cut and paste bug.  We had intended to check "sysmgr".
-
-Fixes: e5f8efa5c8bf ("ARM: socfpga: fpga bridge driver support")
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
-Acked-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/altera-fpga2sdram.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/fpga/altera-fpga2sdram.c
-+++ b/drivers/fpga/altera-fpga2sdram.c
-@@ -123,7 +123,7 @@ static int alt_fpga_bridge_probe(struct
- 	}
- 
- 	sysmgr = syscon_regmap_lookup_by_compatible("altr,sys-mgr");
--	if (IS_ERR(priv->sdrctl)) {
-+	if (IS_ERR(sysmgr)) {
- 		dev_err(dev, "regmap for altr,sys-mgr lookup failed.\n");
- 		return PTR_ERR(sysmgr);
- 	}
diff --git a/patches.socfpga/0036-fpga-Add-COMPILE_TEST-to-all-drivers.patch b/patches.socfpga/0036-fpga-Add-COMPILE_TEST-to-all-drivers.patch
deleted file mode 100644
index be90b9b133be09..00000000000000
--- a/patches.socfpga/0036-fpga-Add-COMPILE_TEST-to-all-drivers.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 9ab5031fea8fa46c96663d537ad0652d944cf880 Mon Sep 17 00:00:00 2001
-From: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Date: Mon, 21 Nov 2016 22:26:42 +0000
-Subject: [PATCH 036/103] fpga: Add COMPILE_TEST to all drivers
-
-Like Zynq the Altera drivers compile fine on x86 and others too,
-so make it easier to compile test this stuff.
-
-A10 requires REGMAP_MMIO to compile, so be explicit rather than
-relying on it via ARCH_SOCFPGA.
-
-Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Acked-by: Alan Tull <atull@opensource.altera.com>
----
- drivers/fpga/Kconfig |    5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
---- a/drivers/fpga/Kconfig
-+++ b/drivers/fpga/Kconfig
-@@ -22,13 +22,14 @@ config FPGA_REGION
- 
- config FPGA_MGR_SOCFPGA
- 	tristate "Altera SOCFPGA FPGA Manager"
--	depends on ARCH_SOCFPGA
-+	depends on ARCH_SOCFPGA || COMPILE_TEST
- 	help
- 	  FPGA manager driver support for Altera SOCFPGA.
- 
- config FPGA_MGR_SOCFPGA_A10
- 	tristate "Altera SoCFPGA Arria10"
--	depends on ARCH_SOCFPGA
-+	depends on ARCH_SOCFPGA || COMPILE_TEST
-+	select REGMAP_MMIO
- 	help
- 	  FPGA manager driver support for Altera Arria10 SoCFPGA.
- 
diff --git a/patches.socfpga/0037-fpga-zynq-Add-missing-n-to-messages.patch b/patches.socfpga/0037-fpga-zynq-Add-missing-n-to-messages.patch
deleted file mode 100644
index 0a8a31a845a4d6..00000000000000
--- a/patches.socfpga/0037-fpga-zynq-Add-missing-n-to-messages.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From 5dc43314ce4663a705a0a91a3ad6e9aba3457de1 Mon Sep 17 00:00:00 2001
-From: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Date: Mon, 21 Nov 2016 22:26:43 +0000
-Subject: [PATCH 037/103] fpga zynq: Add missing \n to messages
-
-Function dev_err doesn't add a newline at the end of the string. This will
-lead to a hard to read kernel log.
-
-Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
-Reviewed-by: Matthias Brugger <mbrugger@suse.com>
-Acked-by: Alan Tull <atull@opensource.altera.com>
----
- drivers/fpga/zynq-fpga.c |   22 +++++++++++-----------
- 1 file changed, 11 insertions(+), 11 deletions(-)
-
---- a/drivers/fpga/zynq-fpga.c
-+++ b/drivers/fpga/zynq-fpga.c
-@@ -218,7 +218,7 @@ static int zynq_fpga_ops_write_init(stru
- 					     INIT_POLL_DELAY,
- 					     INIT_POLL_TIMEOUT);
- 		if (err) {
--			dev_err(priv->dev, "Timeout waiting for PCFG_INIT");
-+			dev_err(priv->dev, "Timeout waiting for PCFG_INIT\n");
- 			goto out_err;
- 		}
- 
-@@ -232,7 +232,7 @@ static int zynq_fpga_ops_write_init(stru
- 					     INIT_POLL_DELAY,
- 					     INIT_POLL_TIMEOUT);
- 		if (err) {
--			dev_err(priv->dev, "Timeout waiting for !PCFG_INIT");
-+			dev_err(priv->dev, "Timeout waiting for !PCFG_INIT\n");
- 			goto out_err;
- 		}
- 
-@@ -246,7 +246,7 @@ static int zynq_fpga_ops_write_init(stru
- 					     INIT_POLL_DELAY,
- 					     INIT_POLL_TIMEOUT);
- 		if (err) {
--			dev_err(priv->dev, "Timeout waiting for PCFG_INIT");
-+			dev_err(priv->dev, "Timeout waiting for PCFG_INIT\n");
- 			goto out_err;
- 		}
- 	}
-@@ -263,7 +263,7 @@ static int zynq_fpga_ops_write_init(stru
- 	/* check that we have room in the command queue */
- 	status = zynq_fpga_read(priv, STATUS_OFFSET);
- 	if (status & STATUS_DMA_Q_F) {
--		dev_err(priv->dev, "DMA command queue full");
-+		dev_err(priv->dev, "DMA command queue full\n");
- 		err = -EBUSY;
- 		goto out_err;
- 	}
-@@ -332,7 +332,7 @@ static int zynq_fpga_ops_write(struct fp
- 	zynq_fpga_write(priv, INT_STS_OFFSET, intr_status);
- 
- 	if (!((intr_status & IXR_D_P_DONE_MASK) == IXR_D_P_DONE_MASK)) {
--		dev_err(priv->dev, "Error configuring FPGA");
-+		dev_err(priv->dev, "Error configuring FPGA\n");
- 		err = -EFAULT;
- 	}
- 
-@@ -428,7 +428,7 @@ static int zynq_fpga_probe(struct platfo
- 	priv->slcr = syscon_regmap_lookup_by_phandle(dev->of_node,
- 		"syscon");
- 	if (IS_ERR(priv->slcr)) {
--		dev_err(dev, "unable to get zynq-slcr regmap");
-+		dev_err(dev, "unable to get zynq-slcr regmap\n");
- 		return PTR_ERR(priv->slcr);
- 	}
- 
-@@ -436,26 +436,26 @@ static int zynq_fpga_probe(struct platfo
- 
- 	priv->irq = platform_get_irq(pdev, 0);
- 	if (priv->irq < 0) {
--		dev_err(dev, "No IRQ available");
-+		dev_err(dev, "No IRQ available\n");
- 		return priv->irq;
- 	}
- 
- 	err = devm_request_irq(dev, priv->irq, zynq_fpga_isr, 0,
- 			       dev_name(dev), priv);
- 	if (err) {
--		dev_err(dev, "unable to request IRQ");
-+		dev_err(dev, "unable to request IRQ\n");
- 		return err;
- 	}
- 
- 	priv->clk = devm_clk_get(dev, "ref_clk");
- 	if (IS_ERR(priv->clk)) {
--		dev_err(dev, "input clock not found");
-+		dev_err(dev, "input clock not found\n");
- 		return PTR_ERR(priv->clk);
- 	}
- 
- 	err = clk_prepare_enable(priv->clk);
- 	if (err) {
--		dev_err(dev, "unable to enable clock");
-+		dev_err(dev, "unable to enable clock\n");
- 		return err;
- 	}
- 
-@@ -467,7 +467,7 @@ static int zynq_fpga_probe(struct platfo
- 	err = fpga_mgr_register(dev, "Xilinx Zynq FPGA Manager",
- 				&zynq_fpga_ops, priv);
- 	if (err) {
--		dev_err(dev, "unable to register FPGA manager");
-+		dev_err(dev, "unable to register FPGA manager\n");
- 		clk_unprepare(priv->clk);
- 		return err;
- 	}
diff --git a/patches.socfpga/0038-fpga-zynq-Remove-priv-dev.patch b/patches.socfpga/0038-fpga-zynq-Remove-priv-dev.patch
deleted file mode 100644
index 869b493871fe86..00000000000000
--- a/patches.socfpga/0038-fpga-zynq-Remove-priv-dev.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-From df7528d1c3d7c2151dfe9419c7b3eed183860b8f Mon Sep 17 00:00:00 2001
-From: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Date: Mon, 21 Nov 2016 22:26:44 +0000
-Subject: [PATCH 038/103] fpga zynq: Remove priv->dev
-
-socfpga uses mgr->dev for debug prints, there should be consistency
-here, so standardize on that. The only other use was for dma
-which can be replaced with mgr->dev.parent.
-
-Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Acked-by: Alan Tull <atull@opensource.altera.com>
-Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
----
- drivers/fpga/zynq-fpga.c |   19 ++++++++-----------
- 1 file changed, 8 insertions(+), 11 deletions(-)
-
---- a/drivers/fpga/zynq-fpga.c
-+++ b/drivers/fpga/zynq-fpga.c
-@@ -118,7 +118,6 @@
- #define FPGA_RST_NONE_MASK		0x0
- 
- struct zynq_fpga_priv {
--	struct device *dev;
- 	int irq;
- 	struct clk *clk;
- 
-@@ -218,7 +217,7 @@ static int zynq_fpga_ops_write_init(stru
- 					     INIT_POLL_DELAY,
- 					     INIT_POLL_TIMEOUT);
- 		if (err) {
--			dev_err(priv->dev, "Timeout waiting for PCFG_INIT\n");
-+			dev_err(&mgr->dev, "Timeout waiting for PCFG_INIT\n");
- 			goto out_err;
- 		}
- 
-@@ -232,7 +231,7 @@ static int zynq_fpga_ops_write_init(stru
- 					     INIT_POLL_DELAY,
- 					     INIT_POLL_TIMEOUT);
- 		if (err) {
--			dev_err(priv->dev, "Timeout waiting for !PCFG_INIT\n");
-+			dev_err(&mgr->dev, "Timeout waiting for !PCFG_INIT\n");
- 			goto out_err;
- 		}
- 
-@@ -246,7 +245,7 @@ static int zynq_fpga_ops_write_init(stru
- 					     INIT_POLL_DELAY,
- 					     INIT_POLL_TIMEOUT);
- 		if (err) {
--			dev_err(priv->dev, "Timeout waiting for PCFG_INIT\n");
-+			dev_err(&mgr->dev, "Timeout waiting for PCFG_INIT\n");
- 			goto out_err;
- 		}
- 	}
-@@ -263,7 +262,7 @@ static int zynq_fpga_ops_write_init(stru
- 	/* check that we have room in the command queue */
- 	status = zynq_fpga_read(priv, STATUS_OFFSET);
- 	if (status & STATUS_DMA_Q_F) {
--		dev_err(priv->dev, "DMA command queue full\n");
-+		dev_err(&mgr->dev, "DMA command queue full\n");
- 		err = -EBUSY;
- 		goto out_err;
- 	}
-@@ -296,7 +295,8 @@ static int zynq_fpga_ops_write(struct fp
- 	in_count = count;
- 	priv = mgr->priv;
- 
--	kbuf = dma_alloc_coherent(priv->dev, count, &dma_addr, GFP_KERNEL);
-+	kbuf =
-+	    dma_alloc_coherent(mgr->dev.parent, count, &dma_addr, GFP_KERNEL);
- 	if (!kbuf)
- 		return -ENOMEM;
- 
-@@ -332,15 +332,14 @@ static int zynq_fpga_ops_write(struct fp
- 	zynq_fpga_write(priv, INT_STS_OFFSET, intr_status);
- 
- 	if (!((intr_status & IXR_D_P_DONE_MASK) == IXR_D_P_DONE_MASK)) {
--		dev_err(priv->dev, "Error configuring FPGA\n");
-+		dev_err(&mgr->dev, "Error configuring FPGA\n");
- 		err = -EFAULT;
- 	}
- 
- 	clk_disable(priv->clk);
- 
- out_free:
--	dma_free_coherent(priv->dev, in_count, kbuf, dma_addr);
--
-+	dma_free_coherent(mgr->dev.parent, count, kbuf, dma_addr);
- 	return err;
- }
- 
-@@ -418,8 +417,6 @@ static int zynq_fpga_probe(struct platfo
- 	if (!priv)
- 		return -ENOMEM;
- 
--	priv->dev = dev;
--
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	priv->io_base = devm_ioremap_resource(dev, res);
- 	if (IS_ERR(priv->io_base))
diff --git a/patches.socfpga/0039-fpga-zynq-Fix-incorrect-ISR-state-on-bootup.patch b/patches.socfpga/0039-fpga-zynq-Fix-incorrect-ISR-state-on-bootup.patch
deleted file mode 100644
index 21d94e81c9517f..00000000000000
--- a/patches.socfpga/0039-fpga-zynq-Fix-incorrect-ISR-state-on-bootup.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From fb85a83e56bbe1a3899b8293a2db442696aa7631 Mon Sep 17 00:00:00 2001
-From: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Date: Mon, 21 Nov 2016 22:26:45 +0000
-Subject: [PATCH 039/103] fpga zynq: Fix incorrect ISR state on bootup
-
-It is best practice to clear and mask all interrupts before
-associating the IRQ, and this should be done after the clock
-is enabled.
-
-This corrects a bad result from zynq_fpga_ops_state on bootup
-where left over latched values in INT_STS_OFFSET caused it to
-report an unconfigured FPGA as configured.
-
-After this change the boot up operating state for an unconfigured
-FPGA reports 'unknown'.
-
-Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Acked-by: Alan Tull <atull@opensource.altera.com>
-Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
----
- drivers/fpga/zynq-fpga.c |   17 ++++++++++-------
- 1 file changed, 10 insertions(+), 7 deletions(-)
-
---- a/drivers/fpga/zynq-fpga.c
-+++ b/drivers/fpga/zynq-fpga.c
-@@ -437,13 +437,6 @@ static int zynq_fpga_probe(struct platfo
- 		return priv->irq;
- 	}
- 
--	err = devm_request_irq(dev, priv->irq, zynq_fpga_isr, 0,
--			       dev_name(dev), priv);
--	if (err) {
--		dev_err(dev, "unable to request IRQ\n");
--		return err;
--	}
--
- 	priv->clk = devm_clk_get(dev, "ref_clk");
- 	if (IS_ERR(priv->clk)) {
- 		dev_err(dev, "input clock not found\n");
-@@ -459,6 +452,16 @@ static int zynq_fpga_probe(struct platfo
- 	/* unlock the device */
- 	zynq_fpga_write(priv, UNLOCK_OFFSET, UNLOCK_MASK);
- 
-+	zynq_fpga_write(priv, INT_MASK_OFFSET, 0xFFFFFFFF);
-+	zynq_fpga_write(priv, INT_STS_OFFSET, IXR_ALL_MASK);
-+	err = devm_request_irq(dev, priv->irq, zynq_fpga_isr, 0, dev_name(dev),
-+			       priv);
-+	if (err) {
-+		dev_err(dev, "unable to request IRQ\n");
-+		clk_disable_unprepare(priv->clk);
-+		return err;
-+	}
-+
- 	clk_disable(priv->clk);
- 
- 	err = fpga_mgr_register(dev, "Xilinx Zynq FPGA Manager",
diff --git a/patches.socfpga/0040-fpga-Clarify-how-write_init-works-streaming-modes.patch b/patches.socfpga/0040-fpga-Clarify-how-write_init-works-streaming-modes.patch
deleted file mode 100644
index b5e5f0cb277afc..00000000000000
--- a/patches.socfpga/0040-fpga-Clarify-how-write_init-works-streaming-modes.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From 66eb655c5286bd01e7fbe9db237ed4cbde6c4857 Mon Sep 17 00:00:00 2001
-From: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Date: Tue, 22 Nov 2016 18:22:09 +0000
-Subject: [PATCH 040/103] fpga: Clarify how write_init works streaming modes
-
-This interface was designed for streaming, but write_init's buf
-argument has an unclear purpose. Define it to be the first bytes
-of the bitstream. Each driver gets to set how many bytes (at most)
-it wants to see. Short bitstreams will be passed through as-is, while
-long ones will be truncated.
-
-The intent is to allow drivers to peek at the header before the transfer
-actually starts.
-
-Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Acked-by: Alan Tull <atull@opensource.altera.com>
----
- Documentation/fpga/fpga-mgr.txt |    5 ++++-
- drivers/fpga/fpga-mgr.c         |    6 ++++--
- drivers/fpga/socfpga-a10.c      |    1 +
- include/linux/fpga/fpga-mgr.h   |    2 ++
- 4 files changed, 11 insertions(+), 3 deletions(-)
-
---- a/Documentation/fpga/fpga-mgr.txt
-+++ b/Documentation/fpga/fpga-mgr.txt
-@@ -169,7 +169,10 @@ The programming sequence is:
-  2. .write (may be called once or multiple times)
-  3. .write_complete
- 
--The .write_init function will prepare the FPGA to receive the image data.
-+The .write_init function will prepare the FPGA to receive the image data.  The
-+buffer passed into .write_init will be atmost .initial_header_size bytes long,
-+if the whole bitstream is not immediately available then the core code will
-+buffer up at least this much before starting.
- 
- The .write function writes a buffer to the FPGA. The buffer may be contain the
- whole FPGA image or may be a smaller chunk of an FPGA image.  In the latter
---- a/drivers/fpga/fpga-mgr.c
-+++ b/drivers/fpga/fpga-mgr.c
-@@ -53,10 +53,12 @@ int fpga_mgr_buf_load(struct fpga_manage
- 	/*
- 	 * Call the low level driver's write_init function.  This will do the
- 	 * device-specific things to get the FPGA into the state where it is
--	 * ready to receive an FPGA image.
-+	 * ready to receive an FPGA image. The low level driver only gets to
-+	 * see the first initial_header_size bytes in the buffer.
- 	 */
- 	mgr->state = FPGA_MGR_STATE_WRITE_INIT;
--	ret = mgr->mops->write_init(mgr, info, buf, count);
-+	ret = mgr->mops->write_init(mgr, info, buf,
-+				    min(mgr->mops->initial_header_size, count));
- 	if (ret) {
- 		dev_err(dev, "Error preparing FPGA for writing\n");
- 		mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
---- a/drivers/fpga/socfpga-a10.c
-+++ b/drivers/fpga/socfpga-a10.c
-@@ -470,6 +470,7 @@ static enum fpga_mgr_states socfpga_a10_
- }
- 
- static const struct fpga_manager_ops socfpga_a10_fpga_mgr_ops = {
-+	.initial_header_size = (RBF_DECOMPRESS_OFFSET + 1) * 4,
- 	.state = socfpga_a10_fpga_state,
- 	.write_init = socfpga_a10_fpga_write_init,
- 	.write = socfpga_a10_fpga_write,
---- a/include/linux/fpga/fpga-mgr.h
-+++ b/include/linux/fpga/fpga-mgr.h
-@@ -84,6 +84,7 @@ struct fpga_image_info {
- 
- /**
-  * struct fpga_manager_ops - ops for low level fpga manager drivers
-+ * @initial_header_size: Maximum number of bytes that should be passed into write_init
-  * @state: returns an enum value of the FPGA's state
-  * @write_init: prepare the FPGA to receive confuration data
-  * @write: write count bytes of configuration data to the FPGA
-@@ -95,6 +96,7 @@ struct fpga_image_info {
-  * called, so leaving them out is fine.
-  */
- struct fpga_manager_ops {
-+	size_t initial_header_size;
- 	enum fpga_mgr_states (*state)(struct fpga_manager *mgr);
- 	int (*write_init)(struct fpga_manager *mgr,
- 			  struct fpga_image_info *info,
diff --git a/patches.socfpga/0041-fpga-zynq-Check-for-errors-after-completing-DMA.patch b/patches.socfpga/0041-fpga-zynq-Check-for-errors-after-completing-DMA.patch
deleted file mode 100644
index 2a0f8b5a428172..00000000000000
--- a/patches.socfpga/0041-fpga-zynq-Check-for-errors-after-completing-DMA.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From 5340a4560aaaaa7807b8e0070d6ee6541ee5fb3b Mon Sep 17 00:00:00 2001
-From: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Date: Wed, 1 Feb 2017 12:48:42 -0700
-Subject: [PATCH 041/103] fpga zynq: Check for errors after completing DMA
-
-The completion did not check the interrupt status to see if any error
-bits were asserted, check error bits and dump some registers if things
-went wrong.
-
-A few fixes are needed to make this work, the IXR_ERROR_FLAGS_MASK was
-wrong, it included the done bits, which shows a bug in mask/unmask_irqs
-which were using the wrong bits, simplify all of this stuff.
-
-Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
-Acked-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/zynq-fpga.c |   54 +++++++++++++++++++++++++++--------------------
- 1 file changed, 32 insertions(+), 22 deletions(-)
-
---- a/drivers/fpga/zynq-fpga.c
-+++ b/drivers/fpga/zynq-fpga.c
-@@ -89,7 +89,7 @@
- #define IXR_D_P_DONE_MASK		BIT(12)
-  /* FPGA programmed */
- #define IXR_PCFG_DONE_MASK		BIT(2)
--#define IXR_ERROR_FLAGS_MASK		0x00F0F860
-+#define IXR_ERROR_FLAGS_MASK		0x00F0C860
- #define IXR_ALL_MASK			0xF8F7F87F
- 
- /* Miscellaneous constant values */
-@@ -143,23 +143,10 @@ static inline u32 zynq_fpga_read(const s
- 	readl_poll_timeout(priv->io_base + addr, val, cond, sleep_us, \
- 			   timeout_us)
- 
--static void zynq_fpga_mask_irqs(struct zynq_fpga_priv *priv)
-+/* Cause the specified irq mask bits to generate IRQs */
-+static inline void zynq_fpga_set_irq(struct zynq_fpga_priv *priv, u32 enable)
- {
--	u32 intr_mask;
--
--	intr_mask = zynq_fpga_read(priv, INT_MASK_OFFSET);
--	zynq_fpga_write(priv, INT_MASK_OFFSET,
--			intr_mask | IXR_DMA_DONE_MASK | IXR_ERROR_FLAGS_MASK);
--}
--
--static void zynq_fpga_unmask_irqs(struct zynq_fpga_priv *priv)
--{
--	u32 intr_mask;
--
--	intr_mask = zynq_fpga_read(priv, INT_MASK_OFFSET);
--	zynq_fpga_write(priv, INT_MASK_OFFSET,
--			intr_mask
--			& ~(IXR_D_P_DONE_MASK | IXR_ERROR_FLAGS_MASK));
-+	zynq_fpga_write(priv, INT_MASK_OFFSET, ~enable);
- }
- 
- static irqreturn_t zynq_fpga_isr(int irq, void *data)
-@@ -167,7 +154,7 @@ static irqreturn_t zynq_fpga_isr(int irq
- 	struct zynq_fpga_priv *priv = data;
- 
- 	/* disable DMA and error IRQs */
--	zynq_fpga_mask_irqs(priv);
-+	zynq_fpga_set_irq(priv, 0);
- 
- 	complete(&priv->dma_done);
- 
-@@ -285,6 +272,7 @@ static int zynq_fpga_ops_write(struct fp
- 			       const char *buf, size_t count)
- {
- 	struct zynq_fpga_priv *priv;
-+	const char *why;
- 	int err;
- 	char *kbuf;
- 	size_t in_count;
-@@ -312,7 +300,7 @@ static int zynq_fpga_ops_write(struct fp
- 	reinit_completion(&priv->dma_done);
- 
- 	/* enable DMA and error IRQs */
--	zynq_fpga_unmask_irqs(priv);
-+	zynq_fpga_set_irq(priv, IXR_D_P_DONE_MASK | IXR_ERROR_FLAGS_MASK);
- 
- 	/* the +1 in the src addr is used to hold off on DMA_DONE IRQ
- 	 * until both AXI and PCAP are done ...
-@@ -331,11 +319,33 @@ static int zynq_fpga_ops_write(struct fp
- 	intr_status = zynq_fpga_read(priv, INT_STS_OFFSET);
- 	zynq_fpga_write(priv, INT_STS_OFFSET, intr_status);
- 
-+	if (intr_status & IXR_ERROR_FLAGS_MASK) {
-+		why = "DMA reported error";
-+		err = -EIO;
-+		goto out_report;
-+	}
-+
- 	if (!((intr_status & IXR_D_P_DONE_MASK) == IXR_D_P_DONE_MASK)) {
--		dev_err(&mgr->dev, "Error configuring FPGA\n");
--		err = -EFAULT;
-+		why = "DMA did not complete";
-+		err = -EIO;
-+		goto out_report;
- 	}
- 
-+	err = 0;
-+	goto out_clk;
-+
-+out_report:
-+	dev_err(&mgr->dev,
-+		"%s: INT_STS:0x%x CTRL:0x%x LOCK:0x%x INT_MASK:0x%x STATUS:0x%x MCTRL:0x%x\n",
-+		why,
-+		intr_status,
-+		zynq_fpga_read(priv, CTRL_OFFSET),
-+		zynq_fpga_read(priv, LOCK_OFFSET),
-+		zynq_fpga_read(priv, INT_MASK_OFFSET),
-+		zynq_fpga_read(priv, STATUS_OFFSET),
-+		zynq_fpga_read(priv, MCTRL_OFFSET));
-+
-+out_clk:
- 	clk_disable(priv->clk);
- 
- out_free:
-@@ -452,7 +462,7 @@ static int zynq_fpga_probe(struct platfo
- 	/* unlock the device */
- 	zynq_fpga_write(priv, UNLOCK_OFFSET, UNLOCK_MASK);
- 
--	zynq_fpga_write(priv, INT_MASK_OFFSET, 0xFFFFFFFF);
-+	zynq_fpga_set_irq(priv, 0);
- 	zynq_fpga_write(priv, INT_STS_OFFSET, IXR_ALL_MASK);
- 	err = devm_request_irq(dev, priv->irq, zynq_fpga_isr, 0, dev_name(dev),
- 			       priv);
diff --git a/patches.socfpga/0042-fpga-zynq-Check-the-bitstream-for-validity.patch b/patches.socfpga/0042-fpga-zynq-Check-the-bitstream-for-validity.patch
deleted file mode 100644
index b5a3ac8f3f46d4..00000000000000
--- a/patches.socfpga/0042-fpga-zynq-Check-the-bitstream-for-validity.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 1e390eb9365008a5f3713e390ffe4484f078468c Mon Sep 17 00:00:00 2001
-From: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Date: Wed, 1 Feb 2017 12:48:43 -0700
-Subject: [PATCH 042/103] fpga zynq: Check the bitstream for validity
-
-There is no sense in sending a bitstream we know will not work, and
-with the variety of options for bitstream generation in Xilinx tools
-it is not terribly clear what the correct input should be.
-
-This is particularly important for Zynq since auto-correction was
-removed from the driver and the Zynq hardware only accepts a bitstream
-format that is different from what the Xilinx tools typically produce.
-
-Worse, the hardware provides no indication why the bitstream fails,
-it simply times out if the input is wrong.
-
-The best option here is to have the kernel print a message informing
-the user they are using a malformed bistream and programming failure
-isn't for any of the myriad of other reasons.
-
-Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
-Acked-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/zynq-fpga.c |   21 +++++++++++++++++++++
- 1 file changed, 21 insertions(+)
-
---- a/drivers/fpga/zynq-fpga.c
-+++ b/drivers/fpga/zynq-fpga.c
-@@ -161,6 +161,19 @@ static irqreturn_t zynq_fpga_isr(int irq
- 	return IRQ_HANDLED;
- }
- 
-+/* Sanity check the proposed bitstream. It must start with the sync word in
-+ * the correct byte order, and be dword aligned. The input is a Xilinx .bin
-+ * file with every 32 bit quantity swapped.
-+ */
-+static bool zynq_fpga_has_sync(const u8 *buf, size_t count)
-+{
-+	for (; count >= 4; buf += 4, count -= 4)
-+		if (buf[0] == 0x66 && buf[1] == 0x55 && buf[2] == 0x99 &&
-+		    buf[3] == 0xaa)
-+			return true;
-+	return false;
-+}
-+
- static int zynq_fpga_ops_write_init(struct fpga_manager *mgr,
- 				    struct fpga_image_info *info,
- 				    const char *buf, size_t count)
-@@ -177,6 +190,13 @@ static int zynq_fpga_ops_write_init(stru
- 
- 	/* don't globally reset PL if we're doing partial reconfig */
- 	if (!(info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
-+		if (!zynq_fpga_has_sync(buf, count)) {
-+			dev_err(&mgr->dev,
-+				"Invalid bitstream, could not find a sync word. Bitstream must be a byte swapped .bin file\n");
-+			err = -EINVAL;
-+			goto out_err;
-+		}
-+
- 		/* assert AXI interface resets */
- 		regmap_write(priv->slcr, SLCR_FPGA_RST_CTRL_OFFSET,
- 			     FPGA_RST_ALL_MASK);
-@@ -410,6 +430,7 @@ static enum fpga_mgr_states zynq_fpga_op
- }
- 
- static const struct fpga_manager_ops zynq_fpga_ops = {
-+	.initial_header_size = 128,
- 	.state = zynq_fpga_ops_state,
- 	.write_init = zynq_fpga_ops_write_init,
- 	.write = zynq_fpga_ops_write,
diff --git a/patches.socfpga/0043-fpga-Add-scatterlist-based-programming.patch b/patches.socfpga/0043-fpga-Add-scatterlist-based-programming.patch
deleted file mode 100644
index b2b44e9b930878..00000000000000
--- a/patches.socfpga/0043-fpga-Add-scatterlist-based-programming.patch
+++ /dev/null
@@ -1,396 +0,0 @@
-From 5b97663f81233b359315a0e26af540ad11e24171 Mon Sep 17 00:00:00 2001
-From: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Date: Wed, 1 Feb 2017 12:48:44 -0700
-Subject: [PATCH 043/103] fpga: Add scatterlist based programming
-
-Requiring contiguous kernel memory is not a good idea, this is a limited
-resource and allocation can fail under normal work loads.
-
-This introduces a .write_sg op that supporting drivers can provide
-to DMA directly from dis-contiguous memory and a new entry point
-fpga_mgr_buf_load_sg that users can call to directly provide page
-lists.
-
-The full matrix of compatibility is provided, either the linear or sg
-interface can be used by the user with a driver supporting either
-interface.
-
-A notable change for drivers is that the .write op can now be called
-multiple times.
-
-Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Acked-by: Alan Tull <atull@opensource.altera.com>
-Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- Documentation/fpga/fpga-mgr.txt |   19 ++-
- drivers/fpga/fpga-mgr.c         |  236 ++++++++++++++++++++++++++++++++++------
- include/linux/fpga/fpga-mgr.h   |    5 
- 3 files changed, 227 insertions(+), 33 deletions(-)
-
---- a/Documentation/fpga/fpga-mgr.txt
-+++ b/Documentation/fpga/fpga-mgr.txt
-@@ -22,7 +22,16 @@ To program the FPGA from a file or from
- 			      struct fpga_image_info *info,
- 		              const char *buf, size_t count);
- 
--Load the FPGA from an image which exists as a buffer in memory.
-+Load the FPGA from an image which exists as a contiguous buffer in
-+memory. Allocating contiguous kernel memory for the buffer should be avoided,
-+users are encouraged to use the _sg interface instead of this.
-+
-+        int fpga_mgr_buf_load_sg(struct fpga_manager *mgr,
-+				 struct fpga_image_info *info,
-+				 struct sg_table *sgt);
-+
-+Load the FPGA from an image from non-contiguous in memory. Callers can
-+construct a sg_table using alloc_page backed memory.
- 
- 	int fpga_mgr_firmware_load(struct fpga_manager *mgr,
- 				   struct fpga_image_info *info,
-@@ -166,7 +175,7 @@ success or negative error codes otherwis
- 
- The programming sequence is:
-  1. .write_init
-- 2. .write (may be called once or multiple times)
-+ 2. .write or .write_sg (may be called once or multiple times)
-  3. .write_complete
- 
- The .write_init function will prepare the FPGA to receive the image data.  The
-@@ -176,7 +185,11 @@ buffer up at least this much before star
- 
- The .write function writes a buffer to the FPGA. The buffer may be contain the
- whole FPGA image or may be a smaller chunk of an FPGA image.  In the latter
--case, this function is called multiple times for successive chunks.
-+case, this function is called multiple times for successive chunks. This interface
-+is suitable for drivers which use PIO.
-+
-+The .write_sg version behaves the same as .write except the input is a sg_table
-+scatter list. This interface is suitable for drivers which use DMA.
- 
- The .write_complete function is called after all the image has been written
- to put the FPGA into operating mode.
---- a/drivers/fpga/fpga-mgr.c
-+++ b/drivers/fpga/fpga-mgr.c
-@@ -25,16 +25,106 @@
- #include <linux/of.h>
- #include <linux/mutex.h>
- #include <linux/slab.h>
-+#include <linux/scatterlist.h>
-+#include <linux/highmem.h>
- 
- static DEFINE_IDA(fpga_mgr_ida);
- static struct class *fpga_mgr_class;
- 
-+/*
-+ * Call the low level driver's write_init function.  This will do the
-+ * device-specific things to get the FPGA into the state where it is ready to
-+ * receive an FPGA image. The low level driver only gets to see the first
-+ * initial_header_size bytes in the buffer.
-+ */
-+static int fpga_mgr_write_init_buf(struct fpga_manager *mgr,
-+				   struct fpga_image_info *info,
-+				   const char *buf, size_t count)
-+{
-+	int ret;
-+
-+	mgr->state = FPGA_MGR_STATE_WRITE_INIT;
-+	if (!mgr->mops->initial_header_size)
-+		ret = mgr->mops->write_init(mgr, info, NULL, 0);
-+	else
-+		ret = mgr->mops->write_init(
-+		    mgr, info, buf, min(mgr->mops->initial_header_size, count));
-+
-+	if (ret) {
-+		dev_err(&mgr->dev, "Error preparing FPGA for writing\n");
-+		mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
-+		return ret;
-+	}
-+
-+	return 0;
-+}
-+
-+static int fpga_mgr_write_init_sg(struct fpga_manager *mgr,
-+				  struct fpga_image_info *info,
-+				  struct sg_table *sgt)
-+{
-+	struct sg_mapping_iter miter;
-+	size_t len;
-+	char *buf;
-+	int ret;
-+
-+	if (!mgr->mops->initial_header_size)
-+		return fpga_mgr_write_init_buf(mgr, info, NULL, 0);
-+
-+	/*
-+	 * First try to use miter to map the first fragment to access the
-+	 * header, this is the typical path.
-+	 */
-+	sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
-+	if (sg_miter_next(&miter) &&
-+	    miter.length >= mgr->mops->initial_header_size) {
-+		ret = fpga_mgr_write_init_buf(mgr, info, miter.addr,
-+					      miter.length);
-+		sg_miter_stop(&miter);
-+		return ret;
-+	}
-+	sg_miter_stop(&miter);
-+
-+	/* Otherwise copy the fragments into temporary memory. */
-+	buf = kmalloc(mgr->mops->initial_header_size, GFP_KERNEL);
-+	if (!buf)
-+		return -ENOMEM;
-+
-+	len = sg_copy_to_buffer(sgt->sgl, sgt->nents, buf,
-+				mgr->mops->initial_header_size);
-+	ret = fpga_mgr_write_init_buf(mgr, info, buf, len);
-+
-+	kfree(buf);
-+
-+	return ret;
-+}
-+
-+/*
-+ * After all the FPGA image has been written, do the device specific steps to
-+ * finish and set the FPGA into operating mode.
-+ */
-+static int fpga_mgr_write_complete(struct fpga_manager *mgr,
-+				   struct fpga_image_info *info)
-+{
-+	int ret;
-+
-+	mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
-+	ret = mgr->mops->write_complete(mgr, info);
-+	if (ret) {
-+		dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
-+		mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
-+		return ret;
-+	}
-+	mgr->state = FPGA_MGR_STATE_OPERATING;
-+
-+	return 0;
-+}
-+
- /**
-- * fpga_mgr_buf_load - load fpga from image in buffer
-+ * fpga_mgr_buf_load_sg - load fpga from image in buffer from a scatter list
-  * @mgr:	fpga manager
-  * @info:	fpga image specific information
-- * @buf:	buffer contain fpga image
-- * @count:	byte count of buf
-+ * @sgt:	scatterlist table
-  *
-  * Step the low level fpga manager through the device-specific steps of getting
-  * an FPGA ready to be configured, writing the image to it, then doing whatever
-@@ -42,54 +132,139 @@ static struct class *fpga_mgr_class;
-  * mgr pointer from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is
-  * not an error code.
-  *
-+ * This is the preferred entry point for FPGA programming, it does not require
-+ * any contiguous kernel memory.
-+ *
-  * Return: 0 on success, negative error code otherwise.
-  */
--int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
--		      const char *buf, size_t count)
-+int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, struct fpga_image_info *info,
-+			 struct sg_table *sgt)
- {
--	struct device *dev = &mgr->dev;
- 	int ret;
- 
--	/*
--	 * Call the low level driver's write_init function.  This will do the
--	 * device-specific things to get the FPGA into the state where it is
--	 * ready to receive an FPGA image. The low level driver only gets to
--	 * see the first initial_header_size bytes in the buffer.
--	 */
--	mgr->state = FPGA_MGR_STATE_WRITE_INIT;
--	ret = mgr->mops->write_init(mgr, info, buf,
--				    min(mgr->mops->initial_header_size, count));
-+	ret = fpga_mgr_write_init_sg(mgr, info, sgt);
-+	if (ret)
-+		return ret;
-+
-+	/* Write the FPGA image to the FPGA. */
-+	mgr->state = FPGA_MGR_STATE_WRITE;
-+	if (mgr->mops->write_sg) {
-+		ret = mgr->mops->write_sg(mgr, sgt);
-+	} else {
-+		struct sg_mapping_iter miter;
-+
-+		sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
-+		while (sg_miter_next(&miter)) {
-+			ret = mgr->mops->write(mgr, miter.addr, miter.length);
-+			if (ret)
-+				break;
-+		}
-+		sg_miter_stop(&miter);
-+	}
-+
- 	if (ret) {
--		dev_err(dev, "Error preparing FPGA for writing\n");
--		mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
-+		dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
-+		mgr->state = FPGA_MGR_STATE_WRITE_ERR;
- 		return ret;
- 	}
- 
-+	return fpga_mgr_write_complete(mgr, info);
-+}
-+EXPORT_SYMBOL_GPL(fpga_mgr_buf_load_sg);
-+
-+static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr,
-+				    struct fpga_image_info *info,
-+				    const char *buf, size_t count)
-+{
-+	int ret;
-+
-+	ret = fpga_mgr_write_init_buf(mgr, info, buf, count);
-+	if (ret)
-+		return ret;
-+
- 	/*
- 	 * Write the FPGA image to the FPGA.
- 	 */
- 	mgr->state = FPGA_MGR_STATE_WRITE;
- 	ret = mgr->mops->write(mgr, buf, count);
- 	if (ret) {
--		dev_err(dev, "Error while writing image data to FPGA\n");
-+		dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
- 		mgr->state = FPGA_MGR_STATE_WRITE_ERR;
- 		return ret;
- 	}
- 
-+	return fpga_mgr_write_complete(mgr, info);
-+}
-+
-+/**
-+ * fpga_mgr_buf_load - load fpga from image in buffer
-+ * @mgr:	fpga manager
-+ * @flags:	flags setting fpga confuration modes
-+ * @buf:	buffer contain fpga image
-+ * @count:	byte count of buf
-+ *
-+ * Step the low level fpga manager through the device-specific steps of getting
-+ * an FPGA ready to be configured, writing the image to it, then doing whatever
-+ * post-configuration steps necessary.  This code assumes the caller got the
-+ * mgr pointer from of_fpga_mgr_get() and checked that it is not an error code.
-+ *
-+ * Return: 0 on success, negative error code otherwise.
-+ */
-+int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
-+		      const char *buf, size_t count)
-+{
-+	struct page **pages;
-+	struct sg_table sgt;
-+	const void *p;
-+	int nr_pages;
-+	int index;
-+	int rc;
-+
- 	/*
--	 * After all the FPGA image has been written, do the device specific
--	 * steps to finish and set the FPGA into operating mode.
-+	 * This is just a fast path if the caller has already created a
-+	 * contiguous kernel buffer and the driver doesn't require SG, non-SG
-+	 * drivers will still work on the slow path.
- 	 */
--	mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
--	ret = mgr->mops->write_complete(mgr, info);
--	if (ret) {
--		dev_err(dev, "Error after writing image data to FPGA\n");
--		mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
--		return ret;
-+	if (mgr->mops->write)
-+		return fpga_mgr_buf_load_mapped(mgr, info, buf, count);
-+
-+	/*
-+	 * Convert the linear kernel pointer into a sg_table of pages for use
-+	 * by the driver.
-+	 */
-+	nr_pages = DIV_ROUND_UP((unsigned long)buf + count, PAGE_SIZE) -
-+		   (unsigned long)buf / PAGE_SIZE;
-+	pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL);
-+	if (!pages)
-+		return -ENOMEM;
-+
-+	p = buf - offset_in_page(buf);
-+	for (index = 0; index < nr_pages; index++) {
-+		if (is_vmalloc_addr(p))
-+			pages[index] = vmalloc_to_page(p);
-+		else
-+			pages[index] = kmap_to_page((void *)p);
-+		if (!pages[index]) {
-+			kfree(pages);
-+			return -EFAULT;
-+		}
-+		p += PAGE_SIZE;
- 	}
--	mgr->state = FPGA_MGR_STATE_OPERATING;
- 
--	return 0;
-+	/*
-+	 * The temporary pages list is used to code share the merging algorithm
-+	 * in sg_alloc_table_from_pages
-+	 */
-+	rc = sg_alloc_table_from_pages(&sgt, pages, index, offset_in_page(buf),
-+				       count, GFP_KERNEL);
-+	kfree(pages);
-+	if (rc)
-+		return rc;
-+
-+	rc = fpga_mgr_buf_load_sg(mgr, info, &sgt);
-+	sg_free_table(&sgt);
-+
-+	return rc;
- }
- EXPORT_SYMBOL_GPL(fpga_mgr_buf_load);
- 
-@@ -291,8 +466,9 @@ int fpga_mgr_register(struct device *dev
- 	struct fpga_manager *mgr;
- 	int id, ret;
- 
--	if (!mops || !mops->write_init || !mops->write ||
--	    !mops->write_complete || !mops->state) {
-+	if (!mops || !mops->write_complete || !mops->state ||
-+	    !mops->write_init || (!mops->write && !mops->write_sg) ||
-+	    (mops->write && mops->write_sg)) {
- 		dev_err(dev, "Attempt to register without fpga_manager_ops\n");
- 		return -EINVAL;
- 	}
---- a/include/linux/fpga/fpga-mgr.h
-+++ b/include/linux/fpga/fpga-mgr.h
-@@ -22,6 +22,7 @@
- #define _LINUX_FPGA_MGR_H
- 
- struct fpga_manager;
-+struct sg_table;
- 
- /**
-  * enum fpga_mgr_states - fpga framework states
-@@ -88,6 +89,7 @@ struct fpga_image_info {
-  * @state: returns an enum value of the FPGA's state
-  * @write_init: prepare the FPGA to receive confuration data
-  * @write: write count bytes of configuration data to the FPGA
-+ * @write_sg: write the scatter list of configuration data to the FPGA
-  * @write_complete: set FPGA to operating state after writing is done
-  * @fpga_remove: optional: Set FPGA into a specific state during driver remove
-  *
-@@ -102,6 +104,7 @@ struct fpga_manager_ops {
- 			  struct fpga_image_info *info,
- 			  const char *buf, size_t count);
- 	int (*write)(struct fpga_manager *mgr, const char *buf, size_t count);
-+	int (*write_sg)(struct fpga_manager *mgr, struct sg_table *sgt);
- 	int (*write_complete)(struct fpga_manager *mgr,
- 			      struct fpga_image_info *info);
- 	void (*fpga_remove)(struct fpga_manager *mgr);
-@@ -129,6 +132,8 @@ struct fpga_manager {
- 
- int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
- 		      const char *buf, size_t count);
-+int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, struct fpga_image_info *info,
-+			 struct sg_table *sgt);
- 
- int fpga_mgr_firmware_load(struct fpga_manager *mgr,
- 			   struct fpga_image_info *info,
diff --git a/patches.socfpga/0044-fpga-zynq-Use-the-scatterlist-interface.patch b/patches.socfpga/0044-fpga-zynq-Use-the-scatterlist-interface.patch
deleted file mode 100644
index f14aebdac17660..00000000000000
--- a/patches.socfpga/0044-fpga-zynq-Use-the-scatterlist-interface.patch
+++ /dev/null
@@ -1,304 +0,0 @@
-From d8b26435b18259639f39aab9ff96cfbf5fdd1076 Mon Sep 17 00:00:00 2001
-From: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Date: Wed, 1 Feb 2017 12:48:45 -0700
-Subject: [PATCH 044/103] fpga zynq: Use the scatterlist interface
-
-This allows the driver to avoid a high order coherent DMA allocation
-and memory copy. With this patch it can DMA directly from the kernel
-pages that the bitfile is stored in.
-
-Since this is now a gather DMA operation the driver uses the ISR
-to feed the chips DMA queue with each entry from the SGL.
-
-Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/zynq-fpga.c |  174 ++++++++++++++++++++++++++++++++++++-----------
- 1 file changed, 135 insertions(+), 39 deletions(-)
-
---- a/drivers/fpga/zynq-fpga.c
-+++ b/drivers/fpga/zynq-fpga.c
-@@ -30,6 +30,7 @@
- #include <linux/pm.h>
- #include <linux/regmap.h>
- #include <linux/string.h>
-+#include <linux/scatterlist.h>
- 
- /* Offsets into SLCR regmap */
- 
-@@ -80,6 +81,7 @@
- 
- /* FPGA init status */
- #define STATUS_DMA_Q_F			BIT(31)
-+#define STATUS_DMA_Q_E			BIT(30)
- #define STATUS_PCFG_INIT_MASK		BIT(4)
- 
- /* Interrupt Status/Mask Register Bit definitions */
-@@ -98,12 +100,16 @@
- #define DMA_INVALID_ADDRESS		GENMASK(31, 0)
- /* Used to unlock the dev */
- #define UNLOCK_MASK			0x757bdf0d
--/* Timeout for DMA to complete */
--#define DMA_DONE_TIMEOUT		msecs_to_jiffies(1000)
- /* Timeout for polling reset bits */
- #define INIT_POLL_TIMEOUT		2500000
- /* Delay for polling reset bits */
- #define INIT_POLL_DELAY			20
-+/* Signal this is the last DMA transfer, wait for the AXI and PCAP before
-+ * interrupting
-+ */
-+#define DMA_SRC_LAST_TRANSFER		1
-+/* Timeout for DMA completion */
-+#define DMA_TIMEOUT_MS			5000
- 
- /* Masks for controlling stuff in SLCR */
- /* Disable all Level shifters */
-@@ -124,6 +130,11 @@ struct zynq_fpga_priv {
- 	void __iomem *io_base;
- 	struct regmap *slcr;
- 
-+	spinlock_t dma_lock;
-+	unsigned int dma_elm;
-+	unsigned int dma_nelms;
-+	struct scatterlist *cur_sg;
-+
- 	struct completion dma_done;
- };
- 
-@@ -149,13 +160,80 @@ static inline void zynq_fpga_set_irq(str
- 	zynq_fpga_write(priv, INT_MASK_OFFSET, ~enable);
- }
- 
-+/* Must be called with dma_lock held */
-+static void zynq_step_dma(struct zynq_fpga_priv *priv)
-+{
-+	u32 addr;
-+	u32 len;
-+	bool first;
-+
-+	first = priv->dma_elm == 0;
-+	while (priv->cur_sg) {
-+		/* Feed the DMA queue until it is full. */
-+		if (zynq_fpga_read(priv, STATUS_OFFSET) & STATUS_DMA_Q_F)
-+			break;
-+
-+		addr = sg_dma_address(priv->cur_sg);
-+		len = sg_dma_len(priv->cur_sg);
-+		if (priv->dma_elm + 1 == priv->dma_nelms) {
-+			/* The last transfer waits for the PCAP to finish too,
-+			 * notice this also changes the irq_mask to ignore
-+			 * IXR_DMA_DONE_MASK which ensures we do not trigger
-+			 * the completion too early.
-+			 */
-+			addr |= DMA_SRC_LAST_TRANSFER;
-+			priv->cur_sg = NULL;
-+		} else {
-+			priv->cur_sg = sg_next(priv->cur_sg);
-+			priv->dma_elm++;
-+		}
-+
-+		zynq_fpga_write(priv, DMA_SRC_ADDR_OFFSET, addr);
-+		zynq_fpga_write(priv, DMA_DST_ADDR_OFFSET, DMA_INVALID_ADDRESS);
-+		zynq_fpga_write(priv, DMA_SRC_LEN_OFFSET, len / 4);
-+		zynq_fpga_write(priv, DMA_DEST_LEN_OFFSET, 0);
-+	}
-+
-+	/* Once the first transfer is queued we can turn on the ISR, future
-+	 * calls to zynq_step_dma will happen from the ISR context. The
-+	 * dma_lock spinlock guarentees this handover is done coherently, the
-+	 * ISR enable is put at the end to avoid another CPU spinning in the
-+	 * ISR on this lock.
-+	 */
-+	if (first && priv->cur_sg) {
-+		zynq_fpga_set_irq(priv,
-+				  IXR_DMA_DONE_MASK | IXR_ERROR_FLAGS_MASK);
-+	} else if (!priv->cur_sg) {
-+		/* The last transfer changes to DMA & PCAP mode since we do
-+		 * not want to continue until everything has been flushed into
-+		 * the PCAP.
-+		 */
-+		zynq_fpga_set_irq(priv,
-+				  IXR_D_P_DONE_MASK | IXR_ERROR_FLAGS_MASK);
-+	}
-+}
-+
- static irqreturn_t zynq_fpga_isr(int irq, void *data)
- {
- 	struct zynq_fpga_priv *priv = data;
-+	u32 intr_status;
- 
--	/* disable DMA and error IRQs */
--	zynq_fpga_set_irq(priv, 0);
-+	/* If anything other than DMA completion is reported stop and hand
-+	 * control back to zynq_fpga_ops_write, something went wrong,
-+	 * otherwise progress the DMA.
-+	 */
-+	spin_lock(&priv->dma_lock);
-+	intr_status = zynq_fpga_read(priv, INT_STS_OFFSET);
-+	if (!(intr_status & IXR_ERROR_FLAGS_MASK) &&
-+	    (intr_status & IXR_DMA_DONE_MASK) && priv->cur_sg) {
-+		zynq_fpga_write(priv, INT_STS_OFFSET, IXR_DMA_DONE_MASK);
-+		zynq_step_dma(priv);
-+		spin_unlock(&priv->dma_lock);
-+		return IRQ_HANDLED;
-+	}
-+	spin_unlock(&priv->dma_lock);
- 
-+	zynq_fpga_set_irq(priv, 0);
- 	complete(&priv->dma_done);
- 
- 	return IRQ_HANDLED;
-@@ -266,10 +344,11 @@ static int zynq_fpga_ops_write_init(stru
- 	zynq_fpga_write(priv, CTRL_OFFSET,
- 			(CTRL_PCAP_PR_MASK | CTRL_PCAP_MODE_MASK | ctrl));
- 
--	/* check that we have room in the command queue */
-+	/* We expect that the command queue is empty right now. */
- 	status = zynq_fpga_read(priv, STATUS_OFFSET);
--	if (status & STATUS_DMA_Q_F) {
--		dev_err(&mgr->dev, "DMA command queue full\n");
-+	if ((status & STATUS_DMA_Q_F) ||
-+	    (status & STATUS_DMA_Q_E) != STATUS_DMA_Q_E) {
-+		dev_err(&mgr->dev, "DMA command queue not right\n");
- 		err = -EBUSY;
- 		goto out_err;
- 	}
-@@ -288,27 +367,36 @@ out_err:
- 	return err;
- }
- 
--static int zynq_fpga_ops_write(struct fpga_manager *mgr,
--			       const char *buf, size_t count)
-+static int zynq_fpga_ops_write(struct fpga_manager *mgr, struct sg_table *sgt)
- {
- 	struct zynq_fpga_priv *priv;
- 	const char *why;
- 	int err;
--	char *kbuf;
--	size_t in_count;
--	dma_addr_t dma_addr;
--	u32 transfer_length;
- 	u32 intr_status;
-+	unsigned long timeout;
-+	unsigned long flags;
-+	struct scatterlist *sg;
-+	int i;
- 
--	in_count = count;
- 	priv = mgr->priv;
- 
--	kbuf =
--	    dma_alloc_coherent(mgr->dev.parent, count, &dma_addr, GFP_KERNEL);
--	if (!kbuf)
--		return -ENOMEM;
-+	/* The hardware can only DMA multiples of 4 bytes, and it requires the
-+	 * starting addresses to be aligned to 64 bits (UG585 pg 212).
-+	 */
-+	for_each_sg(sgt->sgl, sg, sgt->nents, i) {
-+		if ((sg->offset % 8) || (sg->length % 4)) {
-+			dev_err(&mgr->dev,
-+			    "Invalid bitstream, chunks must be aligned\n");
-+			return -EINVAL;
-+		}
-+	}
- 
--	memcpy(kbuf, buf, count);
-+	priv->dma_nelms =
-+	    dma_map_sg(mgr->dev.parent, sgt->sgl, sgt->nents, DMA_TO_DEVICE);
-+	if (priv->dma_nelms == 0) {
-+		dev_err(&mgr->dev, "Unable to DMA map (TO_DEVICE)\n");
-+		return -ENOMEM;
-+	}
- 
- 	/* enable clock */
- 	err = clk_enable(priv->clk);
-@@ -316,28 +404,31 @@ static int zynq_fpga_ops_write(struct fp
- 		goto out_free;
- 
- 	zynq_fpga_write(priv, INT_STS_OFFSET, IXR_ALL_MASK);
--
- 	reinit_completion(&priv->dma_done);
- 
--	/* enable DMA and error IRQs */
--	zynq_fpga_set_irq(priv, IXR_D_P_DONE_MASK | IXR_ERROR_FLAGS_MASK);
--
--	/* the +1 in the src addr is used to hold off on DMA_DONE IRQ
--	 * until both AXI and PCAP are done ...
--	 */
--	zynq_fpga_write(priv, DMA_SRC_ADDR_OFFSET, (u32)(dma_addr) + 1);
--	zynq_fpga_write(priv, DMA_DST_ADDR_OFFSET, (u32)DMA_INVALID_ADDRESS);
--
--	/* convert #bytes to #words */
--	transfer_length = (count + 3) / 4;
-+	/* zynq_step_dma will turn on interrupts */
-+	spin_lock_irqsave(&priv->dma_lock, flags);
-+	priv->dma_elm = 0;
-+	priv->cur_sg = sgt->sgl;
-+	zynq_step_dma(priv);
-+	spin_unlock_irqrestore(&priv->dma_lock, flags);
- 
--	zynq_fpga_write(priv, DMA_SRC_LEN_OFFSET, transfer_length);
--	zynq_fpga_write(priv, DMA_DEST_LEN_OFFSET, 0);
-+	timeout = wait_for_completion_timeout(&priv->dma_done,
-+					      msecs_to_jiffies(DMA_TIMEOUT_MS));
- 
--	wait_for_completion(&priv->dma_done);
-+	spin_lock_irqsave(&priv->dma_lock, flags);
-+	zynq_fpga_set_irq(priv, 0);
-+	priv->cur_sg = NULL;
-+	spin_unlock_irqrestore(&priv->dma_lock, flags);
- 
- 	intr_status = zynq_fpga_read(priv, INT_STS_OFFSET);
--	zynq_fpga_write(priv, INT_STS_OFFSET, intr_status);
-+	zynq_fpga_write(priv, INT_STS_OFFSET, IXR_ALL_MASK);
-+
-+	/* There doesn't seem to be a way to force cancel any DMA, so if
-+	 * something went wrong we are relying on the hardware to have halted
-+	 * the DMA before we get here, if there was we could use
-+	 * wait_for_completion_interruptible too.
-+	 */
- 
- 	if (intr_status & IXR_ERROR_FLAGS_MASK) {
- 		why = "DMA reported error";
-@@ -345,8 +436,12 @@ static int zynq_fpga_ops_write(struct fp
- 		goto out_report;
- 	}
- 
--	if (!((intr_status & IXR_D_P_DONE_MASK) == IXR_D_P_DONE_MASK)) {
--		why = "DMA did not complete";
-+	if (priv->cur_sg ||
-+	    !((intr_status & IXR_D_P_DONE_MASK) == IXR_D_P_DONE_MASK)) {
-+		if (timeout == 0)
-+			why = "DMA timed out";
-+		else
-+			why = "DMA did not complete";
- 		err = -EIO;
- 		goto out_report;
- 	}
-@@ -369,7 +464,7 @@ out_clk:
- 	clk_disable(priv->clk);
- 
- out_free:
--	dma_free_coherent(mgr->dev.parent, count, kbuf, dma_addr);
-+	dma_unmap_sg(mgr->dev.parent, sgt->sgl, sgt->nents, DMA_TO_DEVICE);
- 	return err;
- }
- 
-@@ -433,7 +528,7 @@ static const struct fpga_manager_ops zyn
- 	.initial_header_size = 128,
- 	.state = zynq_fpga_ops_state,
- 	.write_init = zynq_fpga_ops_write_init,
--	.write = zynq_fpga_ops_write,
-+	.write_sg = zynq_fpga_ops_write,
- 	.write_complete = zynq_fpga_ops_write_complete,
- };
- 
-@@ -447,6 +542,7 @@ static int zynq_fpga_probe(struct platfo
- 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- 	if (!priv)
- 		return -ENOMEM;
-+	spin_lock_init(&priv->dma_lock);
- 
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	priv->io_base = devm_ioremap_resource(dev, res);
diff --git a/patches.socfpga/0045-fpga-fix-sparse-warnings-in-fpga-mgr-and-fpga-bridge.patch b/patches.socfpga/0045-fpga-fix-sparse-warnings-in-fpga-mgr-and-fpga-bridge.patch
deleted file mode 100644
index 8c9fde3740934f..00000000000000
--- a/patches.socfpga/0045-fpga-fix-sparse-warnings-in-fpga-mgr-and-fpga-bridge.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From e465a0699c040d68ea3790af91f6e73cd4797ea7 Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Mon, 27 Feb 2017 09:18:59 -0600
-Subject: [PATCH 045/103] fpga: fix sparse warnings in fpga-mgr and fpga-bridge
-
-Fix up these sparse warnings:
-
-drivers/fpga/fpga-mgr.c:189:21: warning: symbol '__fpga_mgr_get' was not declared. Should it be static?
-drivers/fpga/fpga-bridge.c:30:12: warning: symbol 'bridge_list_lock' was not declared. Should it be static?
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
-Acked-by: Moritz Fischer <mdf@kernel.org>
-Signed-off-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/fpga-bridge.c |    2 +-
- drivers/fpga/fpga-mgr.c    |    2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/fpga/fpga-bridge.c
-+++ b/drivers/fpga/fpga-bridge.c
-@@ -27,7 +27,7 @@ static DEFINE_IDA(fpga_bridge_ida);
- static struct class *fpga_bridge_class;
- 
- /* Lock for adding/removing bridges to linked lists*/
--spinlock_t bridge_list_lock;
-+static spinlock_t bridge_list_lock;
- 
- static int fpga_bridge_of_node_match(struct device *dev, const void *data)
- {
---- a/drivers/fpga/fpga-mgr.c
-+++ b/drivers/fpga/fpga-mgr.c
-@@ -361,7 +361,7 @@ static struct attribute *fpga_mgr_attrs[
- };
- ATTRIBUTE_GROUPS(fpga_mgr);
- 
--struct fpga_manager *__fpga_mgr_get(struct device *dev)
-+static struct fpga_manager *__fpga_mgr_get(struct device *dev)
- {
- 	struct fpga_manager *mgr;
- 	int ret = -ENODEV;
diff --git a/patches.socfpga/0046-fpga-Add-flag-to-indicate-bitstream-needs-decrypting.patch b/patches.socfpga/0046-fpga-Add-flag-to-indicate-bitstream-needs-decrypting.patch
deleted file mode 100644
index f2327b0ac2f078..00000000000000
--- a/patches.socfpga/0046-fpga-Add-flag-to-indicate-bitstream-needs-decrypting.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 52ae233165163bb6c71e8be8ee703a1eb0fa3e25 Mon Sep 17 00:00:00 2001
-From: Moritz Fischer <mdf@kernel.org>
-Date: Mon, 27 Feb 2017 09:19:00 -0600
-Subject: [PATCH 046/103] fpga: Add flag to indicate bitstream needs decrypting
-
-Add a flag that is passed to the write_init() callback, indicating
-that the bitstream is encrypted.
-
-The low-level driver will deal with the flag, or return an error,
-if encrypted bitstreams are not supported.
-
-Signed-off-by: Moritz Fischer <mdf@kernel.org>
-Acked-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- include/linux/fpga/fpga-mgr.h |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/include/linux/fpga/fpga-mgr.h
-+++ b/include/linux/fpga/fpga-mgr.h
-@@ -70,6 +70,7 @@ enum fpga_mgr_states {
-  */
- #define FPGA_MGR_PARTIAL_RECONFIG	BIT(0)
- #define FPGA_MGR_EXTERNAL_CONFIG	BIT(1)
-+#define FPGA_MGR_ENCRYPTED_BITSTREAM	BIT(2)
- 
- /**
-  * struct fpga_image_info - information specific to a FPGA image
diff --git a/patches.socfpga/0047-fpga-zynq-Add-support-for-encrypted-bitstreams.patch b/patches.socfpga/0047-fpga-zynq-Add-support-for-encrypted-bitstreams.patch
deleted file mode 100644
index db09d001f49ea9..00000000000000
--- a/patches.socfpga/0047-fpga-zynq-Add-support-for-encrypted-bitstreams.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From 478e30d8b329c3c6212e903e6ba68997e2f0582a Mon Sep 17 00:00:00 2001
-From: Moritz Fischer <mdf@kernel.org>
-Date: Mon, 27 Feb 2017 09:19:01 -0600
-Subject: [PATCH 047/103] fpga: zynq: Add support for encrypted bitstreams
-
-Add support for encrypted bitstreams. For this to work the system
-must be booted in secure mode.
-
-In order for on-the-fly decryption to work, the PCAP clock rate
-needs to be lowered via the PCAP_RATE_EN bit.
-
-Signed-off-by: Moritz Fischer <mdf@kernel.org>
-Acked-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/zynq-fpga.c |   28 +++++++++++++++++++++++++---
- 1 file changed, 25 insertions(+), 3 deletions(-)
-
---- a/drivers/fpga/zynq-fpga.c
-+++ b/drivers/fpga/zynq-fpga.c
-@@ -72,6 +72,10 @@
- #define CTRL_PCAP_PR_MASK		BIT(27)
- /* Enable PCAP */
- #define CTRL_PCAP_MODE_MASK		BIT(26)
-+/* Lower rate to allow decrypt on the fly */
-+#define CTRL_PCAP_RATE_EN_MASK		BIT(25)
-+/* System booted in secure mode */
-+#define CTRL_SEC_EN_MASK		BIT(7)
- 
- /* Miscellaneous Control Register bit definitions */
- /* Internal PCAP loopback */
-@@ -266,6 +270,17 @@ static int zynq_fpga_ops_write_init(stru
- 	if (err)
- 		return err;
- 
-+	/* check if bitstream is encrypted & and system's still secure */
-+	if (info->flags & FPGA_MGR_ENCRYPTED_BITSTREAM) {
-+		ctrl = zynq_fpga_read(priv, CTRL_OFFSET);
-+		if (!(ctrl & CTRL_SEC_EN_MASK)) {
-+			dev_err(&mgr->dev,
-+				"System not secure, can't use crypted bitstreams\n");
-+			err = -EINVAL;
-+			goto out_err;
-+		}
-+	}
-+
- 	/* don't globally reset PL if we're doing partial reconfig */
- 	if (!(info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
- 		if (!zynq_fpga_has_sync(buf, count)) {
-@@ -337,12 +352,19 @@ static int zynq_fpga_ops_write_init(stru
- 
- 	/* set configuration register with following options:
- 	 * - enable PCAP interface
--	 * - set throughput for maximum speed
-+	 * - set throughput for maximum speed (if bistream not crypted)
- 	 * - set CPU in user mode
- 	 */
- 	ctrl = zynq_fpga_read(priv, CTRL_OFFSET);
--	zynq_fpga_write(priv, CTRL_OFFSET,
--			(CTRL_PCAP_PR_MASK | CTRL_PCAP_MODE_MASK | ctrl));
-+	if (info->flags & FPGA_MGR_ENCRYPTED_BITSTREAM)
-+		zynq_fpga_write(priv, CTRL_OFFSET,
-+				(CTRL_PCAP_PR_MASK | CTRL_PCAP_MODE_MASK
-+				 | CTRL_PCAP_RATE_EN_MASK | ctrl));
-+	else
-+		zynq_fpga_write(priv, CTRL_OFFSET,
-+				(CTRL_PCAP_PR_MASK | CTRL_PCAP_MODE_MASK
-+				 | ctrl));
-+
- 
- 	/* We expect that the command queue is empty right now. */
- 	status = zynq_fpga_read(priv, STATUS_OFFSET);
diff --git a/patches.socfpga/0048-fpga-region-Add-fpga-region-property-encrypted-fpga-.patch b/patches.socfpga/0048-fpga-region-Add-fpga-region-property-encrypted-fpga-.patch
deleted file mode 100644
index 2b425ec38a57e7..00000000000000
--- a/patches.socfpga/0048-fpga-region-Add-fpga-region-property-encrypted-fpga-.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 273c66a75fbbc3ca0afc73fc39c36932da94b37f Mon Sep 17 00:00:00 2001
-From: Moritz Fischer <mdf@kernel.org>
-Date: Mon, 27 Feb 2017 09:19:02 -0600
-Subject: [PATCH 048/103] fpga: region: Add fpga-region property
- 'encrypted-fpga-config'
-
-Add fpga-region property to allow passing the fact that the bitstream is
-encrypted to the fpga-region and ultimately to the low-level driver.
-
-Signed-off-by: Moritz Fischer <mdf@kernel.org>
-Acked-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- Documentation/devicetree/bindings/fpga/fpga-region.txt |    1 +
- drivers/fpga/fpga-region.c                             |    8 ++++++--
- 2 files changed, 7 insertions(+), 2 deletions(-)
-
---- a/Documentation/devicetree/bindings/fpga/fpga-region.txt
-+++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt
-@@ -186,6 +186,7 @@ Optional properties:
- 	otherwise full reconfiguration is done.
- - external-fpga-config : boolean, set if the FPGA has already been configured
- 	prior to OS boot up.
-+- encrypted-fpga-config : boolean, set if the bitstream is encrypted
- - region-unfreeze-timeout-us : The maximum time in microseconds to wait for
- 	bridges to successfully become enabled after the region has been
- 	programmed.
---- a/drivers/fpga/fpga-region.c
-+++ b/drivers/fpga/fpga-region.c
-@@ -337,8 +337,9 @@ static int child_regions_with_firmware(s
-  * The overlay must add either firmware-name or external-fpga-config property
-  * to the FPGA Region.
-  *
-- *   firmware-name        : program the FPGA
-- *   external-fpga-config : FPGA is already programmed
-+ *   firmware-name         : program the FPGA
-+ *   external-fpga-config  : FPGA is already programmed
-+ *   encrypted-fpga-config : FPGA bitstream is encrypted
-  *
-  * The overlay can add other FPGA regions, but child FPGA regions cannot have a
-  * firmware-name property since those regions don't exist yet.
-@@ -373,6 +374,9 @@ static int fpga_region_notify_pre_apply(
- 	if (of_property_read_bool(nd->overlay, "external-fpga-config"))
- 		info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
- 
-+	if (of_property_read_bool(nd->overlay, "encrypted-fpga-config"))
-+		info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
-+
- 	of_property_read_string(nd->overlay, "firmware-name", &firmware_name);
- 
- 	of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us",
diff --git a/patches.socfpga/0049-FPGA-Add-TS-7300-FPGA-manager.patch b/patches.socfpga/0049-FPGA-Add-TS-7300-FPGA-manager.patch
deleted file mode 100644
index 6dbc86a5629fc5..00000000000000
--- a/patches.socfpga/0049-FPGA-Add-TS-7300-FPGA-manager.patch
+++ /dev/null
@@ -1,211 +0,0 @@
-From bed35874b4fe30165188c479341d04fdb7d74230 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <f.fainelli@gmail.com>
-Date: Mon, 27 Feb 2017 16:14:22 -0600
-Subject: [PATCH 049/103] FPGA: Add TS-7300 FPGA manager
-
-Add support for loading bitstreams on the Altera Cyclone II FPGA
-populated on the TS-7300 board. This is done through the configuration
-and data registers offered through a memory interface between the EP93xx
-SoC and the FPGA via an intermediate CPLD device.
-
-The EP93xx SoC on the TS-7300 does not have direct means of configuring
-the on-board FPGA other than by using the special memory mapped
-interface to the CPLD. No other entity on the system can control the
-FPGA bitstream.
-
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
-Acked-by: Alan Tull <atull@opensource.altera.com>
-Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/Kconfig       |    7 ++
- drivers/fpga/Makefile      |    1 
- drivers/fpga/ts73xx-fpga.c |  156 +++++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 164 insertions(+)
- create mode 100644 drivers/fpga/ts73xx-fpga.c
-
---- a/drivers/fpga/Kconfig
-+++ b/drivers/fpga/Kconfig
-@@ -33,6 +33,13 @@ config FPGA_MGR_SOCFPGA_A10
- 	help
- 	  FPGA manager driver support for Altera Arria10 SoCFPGA.
- 
-+config FPGA_MGR_TS73XX
-+	tristate "Technologic Systems TS-73xx SBC FPGA Manager"
-+	depends on ARCH_EP93XX && MACH_TS72XX
-+	help
-+	  FPGA manager driver support for the Altera Cyclone II FPGA
-+	  present on the TS-73xx SBC boards.
-+
- config FPGA_MGR_ZYNQ_FPGA
- 	tristate "Xilinx Zynq FPGA"
- 	depends on ARCH_ZYNQ || COMPILE_TEST
---- a/drivers/fpga/Makefile
-+++ b/drivers/fpga/Makefile
-@@ -8,6 +8,7 @@ obj-$(CONFIG_FPGA)			+= fpga-mgr.o
- # FPGA Manager Drivers
- obj-$(CONFIG_FPGA_MGR_SOCFPGA)		+= socfpga.o
- obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10)	+= socfpga-a10.o
-+obj-$(CONFIG_FPGA_MGR_TS73XX)		+= ts73xx-fpga.o
- obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)	+= zynq-fpga.o
- 
- # FPGA Bridge Drivers
---- /dev/null
-+++ b/drivers/fpga/ts73xx-fpga.c
-@@ -0,0 +1,156 @@
-+/*
-+ * Technologic Systems TS-73xx SBC FPGA loader
-+ *
-+ * Copyright (C) 2016 Florian Fainelli <f.fainelli@gmail.com>
-+ *
-+ * FPGA Manager Driver for the on-board Altera Cyclone II FPGA found on
-+ * TS-7300, heavily based on load_fpga.c in their vendor tree.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/delay.h>
-+#include <linux/io.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/string.h>
-+#include <linux/iopoll.h>
-+#include <linux/fpga/fpga-mgr.h>
-+
-+#define TS73XX_FPGA_DATA_REG		0
-+#define TS73XX_FPGA_CONFIG_REG		1
-+
-+#define TS73XX_FPGA_WRITE_DONE		0x1
-+#define TS73XX_FPGA_WRITE_DONE_TIMEOUT	1000	/* us */
-+#define TS73XX_FPGA_RESET		0x2
-+#define TS73XX_FPGA_RESET_LOW_DELAY	30	/* us */
-+#define TS73XX_FPGA_RESET_HIGH_DELAY	80	/* us */
-+#define TS73XX_FPGA_LOAD_OK		0x4
-+#define TS73XX_FPGA_CONFIG_LOAD		0x8
-+
-+struct ts73xx_fpga_priv {
-+	void __iomem	*io_base;
-+	struct device	*dev;
-+};
-+
-+static enum fpga_mgr_states ts73xx_fpga_state(struct fpga_manager *mgr)
-+{
-+	return FPGA_MGR_STATE_UNKNOWN;
-+}
-+
-+static int ts73xx_fpga_write_init(struct fpga_manager *mgr,
-+				  struct fpga_image_info *info,
-+				  const char *buf, size_t count)
-+{
-+	struct ts73xx_fpga_priv *priv = mgr->priv;
-+
-+	/* Reset the FPGA */
-+	writeb(0, priv->io_base + TS73XX_FPGA_CONFIG_REG);
-+	udelay(TS73XX_FPGA_RESET_LOW_DELAY);
-+	writeb(TS73XX_FPGA_RESET, priv->io_base + TS73XX_FPGA_CONFIG_REG);
-+	udelay(TS73XX_FPGA_RESET_HIGH_DELAY);
-+
-+	return 0;
-+}
-+
-+static int ts73xx_fpga_write(struct fpga_manager *mgr, const char *buf,
-+			     size_t count)
-+{
-+	struct ts73xx_fpga_priv *priv = mgr->priv;
-+	size_t i = 0;
-+	int ret;
-+	u8 reg;
-+
-+	while (count--) {
-+		ret = readb_poll_timeout(priv->io_base + TS73XX_FPGA_CONFIG_REG,
-+					 reg, !(reg & TS73XX_FPGA_WRITE_DONE),
-+					 1, TS73XX_FPGA_WRITE_DONE_TIMEOUT);
-+		if (ret < 0)
-+			return ret;
-+
-+		writeb(buf[i], priv->io_base + TS73XX_FPGA_DATA_REG);
-+		i++;
-+	}
-+
-+	return 0;
-+}
-+
-+static int ts73xx_fpga_write_complete(struct fpga_manager *mgr,
-+				      struct fpga_image_info *info)
-+{
-+	struct ts73xx_fpga_priv *priv = mgr->priv;
-+	u8 reg;
-+
-+	usleep_range(1000, 2000);
-+	reg = readb(priv->io_base + TS73XX_FPGA_CONFIG_REG);
-+	reg |= TS73XX_FPGA_CONFIG_LOAD;
-+	writeb(reg, priv->io_base + TS73XX_FPGA_CONFIG_REG);
-+
-+	usleep_range(1000, 2000);
-+	reg = readb(priv->io_base + TS73XX_FPGA_CONFIG_REG);
-+	reg &= ~TS73XX_FPGA_CONFIG_LOAD;
-+	writeb(reg, priv->io_base + TS73XX_FPGA_CONFIG_REG);
-+
-+	reg = readb(priv->io_base + TS73XX_FPGA_CONFIG_REG);
-+	if ((reg & TS73XX_FPGA_LOAD_OK) != TS73XX_FPGA_LOAD_OK)
-+		return -ETIMEDOUT;
-+
-+	return 0;
-+}
-+
-+static const struct fpga_manager_ops ts73xx_fpga_ops = {
-+	.state		= ts73xx_fpga_state,
-+	.write_init	= ts73xx_fpga_write_init,
-+	.write		= ts73xx_fpga_write,
-+	.write_complete	= ts73xx_fpga_write_complete,
-+};
-+
-+static int ts73xx_fpga_probe(struct platform_device *pdev)
-+{
-+	struct device *kdev = &pdev->dev;
-+	struct ts73xx_fpga_priv *priv;
-+	struct resource *res;
-+
-+	priv = devm_kzalloc(kdev, sizeof(*priv), GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	priv->dev = kdev;
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	priv->io_base = devm_ioremap_resource(kdev, res);
-+	if (IS_ERR(priv->io_base)) {
-+		dev_err(kdev, "unable to remap registers\n");
-+		return PTR_ERR(priv->io_base);
-+	}
-+
-+	return fpga_mgr_register(kdev, "TS-73xx FPGA Manager",
-+				 &ts73xx_fpga_ops, priv);
-+}
-+
-+static int ts73xx_fpga_remove(struct platform_device *pdev)
-+{
-+	fpga_mgr_unregister(&pdev->dev);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver ts73xx_fpga_driver = {
-+	.driver	= {
-+		.name	= "ts73xx-fpga-mgr",
-+	},
-+	.probe	= ts73xx_fpga_probe,
-+	.remove	= ts73xx_fpga_remove,
-+};
-+module_platform_driver(ts73xx_fpga_driver);
-+
-+MODULE_AUTHOR("Florian Fainelli <f.fainelli@gmail.com>");
-+MODULE_DESCRIPTION("TS-73xx FPGA Manager driver");
-+MODULE_LICENSE("GPL v2");
diff --git a/patches.socfpga/0050-Documentation-Add-binding-document-for-Lattice-iCE40.patch b/patches.socfpga/0050-Documentation-Add-binding-document-for-Lattice-iCE40.patch
deleted file mode 100644
index c933e57f6ce25f..00000000000000
--- a/patches.socfpga/0050-Documentation-Add-binding-document-for-Lattice-iCE40.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 17e3c8974a87f231c91825ff809988797a001f35 Mon Sep 17 00:00:00 2001
-From: Joel Holdsworth <joel@airwebreathe.org.uk>
-Date: Mon, 27 Feb 2017 16:14:25 -0600
-Subject: [PATCH 050/103] Documentation: Add binding document for Lattice iCE40
- FPGA manager
-
-This adds documentation of the device tree bindings of the Lattice iCE40
-FPGA driver for the FPGA manager framework.
-
-Signed-off-by: Joel Holdsworth <joel@airwebreathe.org.uk>
-Acked-by: Rob Herring <robh@kernel.org>
-Acked-by: Alan Tull <atull@opensource.altera.com>
-Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
-Acked-by: Marek Vasut <marex@denx.de>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt |   21 ++++++++++
- 1 file changed, 21 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt
-@@ -0,0 +1,21 @@
-+Lattice iCE40 FPGA Manager
-+
-+Required properties:
-+- compatible:		Should contain "lattice,ice40-fpga-mgr"
-+- reg:			SPI chip select
-+- spi-max-frequency:	Maximum SPI frequency (>=1000000, <=25000000)
-+- cdone-gpios:		GPIO input connected to CDONE pin
-+- reset-gpios:		Active-low GPIO output connected to CRESET_B pin. Note
-+			that unless the GPIO is held low during startup, the
-+			FPGA will enter Master SPI mode and drive SCK with a
-+			clock signal potentially jamming other devices on the
-+			bus until the firmware is loaded.
-+
-+Example:
-+	fpga: fpga@0 {
-+		compatible = "lattice,ice40-fpga-mgr";
-+		reg = <0>;
-+		spi-max-frequency = <1000000>;
-+		cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
-+		reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
-+	};
diff --git a/patches.socfpga/0051-fpga-Add-support-for-Lattice-iCE40-FPGAs.patch b/patches.socfpga/0051-fpga-Add-support-for-Lattice-iCE40-FPGAs.patch
deleted file mode 100644
index afe02a501f2687..00000000000000
--- a/patches.socfpga/0051-fpga-Add-support-for-Lattice-iCE40-FPGAs.patch
+++ /dev/null
@@ -1,256 +0,0 @@
-From dea9de651d978f61922c8cebd01a3089c0acfd04 Mon Sep 17 00:00:00 2001
-From: Joel Holdsworth <joel@airwebreathe.org.uk>
-Date: Mon, 27 Feb 2017 16:14:26 -0600
-Subject: [PATCH 051/103] fpga: Add support for Lattice iCE40 FPGAs
-
-This patch adds support to the FPGA manager for configuring the SRAM of
-iCE40LM, iCE40LP, iCE40HX, iCE40 Ultra, iCE40 UltraLite and iCE40
-UltraPlus devices, through slave SPI.
-
-Signed-off-by: Joel Holdsworth <joel@airwebreathe.org.uk>
-Reviewed-by: Marek Vasut <marex@denx.de>
-Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
-Acked-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/Kconfig     |    6 +
- drivers/fpga/Makefile    |    1 
- drivers/fpga/ice40-spi.c |  207 +++++++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 214 insertions(+)
- create mode 100644 drivers/fpga/ice40-spi.c
-
---- a/drivers/fpga/Kconfig
-+++ b/drivers/fpga/Kconfig
-@@ -20,6 +20,12 @@ config FPGA_REGION
- 	  FPGA Regions allow loading FPGA images under control of
- 	  the Device Tree.
- 
-+config FPGA_MGR_ICE40_SPI
-+	tristate "Lattice iCE40 SPI"
-+	depends on OF && SPI
-+	help
-+	  FPGA manager driver support for Lattice iCE40 FPGAs over SPI.
-+
- config FPGA_MGR_SOCFPGA
- 	tristate "Altera SOCFPGA FPGA Manager"
- 	depends on ARCH_SOCFPGA || COMPILE_TEST
---- a/drivers/fpga/Makefile
-+++ b/drivers/fpga/Makefile
-@@ -6,6 +6,7 @@
- obj-$(CONFIG_FPGA)			+= fpga-mgr.o
- 
- # FPGA Manager Drivers
-+obj-$(CONFIG_FPGA_MGR_ICE40_SPI)	+= ice40-spi.o
- obj-$(CONFIG_FPGA_MGR_SOCFPGA)		+= socfpga.o
- obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10)	+= socfpga-a10.o
- obj-$(CONFIG_FPGA_MGR_TS73XX)		+= ts73xx-fpga.o
---- /dev/null
-+++ b/drivers/fpga/ice40-spi.c
-@@ -0,0 +1,207 @@
-+/*
-+ * FPGA Manager Driver for Lattice iCE40.
-+ *
-+ *  Copyright (c) 2016 Joel Holdsworth
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This driver adds support to the FPGA manager for configuring the SRAM of
-+ * Lattice iCE40 FPGAs through slave SPI.
-+ */
-+
-+#include <linux/fpga/fpga-mgr.h>
-+#include <linux/gpio/consumer.h>
-+#include <linux/module.h>
-+#include <linux/of_gpio.h>
-+#include <linux/spi/spi.h>
-+#include <linux/stringify.h>
-+
-+#define ICE40_SPI_MAX_SPEED 25000000 /* Hz */
-+#define ICE40_SPI_MIN_SPEED 1000000 /* Hz */
-+
-+#define ICE40_SPI_RESET_DELAY 1 /* us (>200ns) */
-+#define ICE40_SPI_HOUSEKEEPING_DELAY 1200 /* us */
-+
-+#define ICE40_SPI_NUM_ACTIVATION_BYTES DIV_ROUND_UP(49, 8)
-+
-+struct ice40_fpga_priv {
-+	struct spi_device *dev;
-+	struct gpio_desc *reset;
-+	struct gpio_desc *cdone;
-+};
-+
-+static enum fpga_mgr_states ice40_fpga_ops_state(struct fpga_manager *mgr)
-+{
-+	struct ice40_fpga_priv *priv = mgr->priv;
-+
-+	return gpiod_get_value(priv->cdone) ? FPGA_MGR_STATE_OPERATING :
-+		FPGA_MGR_STATE_UNKNOWN;
-+}
-+
-+static int ice40_fpga_ops_write_init(struct fpga_manager *mgr,
-+				     struct fpga_image_info *info,
-+				     const char *buf, size_t count)
-+{
-+	struct ice40_fpga_priv *priv = mgr->priv;
-+	struct spi_device *dev = priv->dev;
-+	struct spi_message message;
-+	struct spi_transfer assert_cs_then_reset_delay = {
-+		.cs_change   = 1,
-+		.delay_usecs = ICE40_SPI_RESET_DELAY
-+	};
-+	struct spi_transfer housekeeping_delay_then_release_cs = {
-+		.delay_usecs = ICE40_SPI_HOUSEKEEPING_DELAY
-+	};
-+	int ret;
-+
-+	if ((info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
-+		dev_err(&dev->dev,
-+			"Partial reconfiguration is not supported\n");
-+		return -ENOTSUPP;
-+	}
-+
-+	/* Lock the bus, assert CRESET_B and SS_B and delay >200ns */
-+	spi_bus_lock(dev->master);
-+
-+	gpiod_set_value(priv->reset, 1);
-+
-+	spi_message_init(&message);
-+	spi_message_add_tail(&assert_cs_then_reset_delay, &message);
-+	ret = spi_sync_locked(dev, &message);
-+
-+	/* Come out of reset */
-+	gpiod_set_value(priv->reset, 0);
-+
-+	/* Abort if the chip-select failed */
-+	if (ret)
-+		goto fail;
-+
-+	/* Check CDONE is de-asserted i.e. the FPGA is reset */
-+	if (gpiod_get_value(priv->cdone)) {
-+		dev_err(&dev->dev, "Device reset failed, CDONE is asserted\n");
-+		ret = -EIO;
-+		goto fail;
-+	}
-+
-+	/* Wait for the housekeeping to complete, and release SS_B */
-+	spi_message_init(&message);
-+	spi_message_add_tail(&housekeeping_delay_then_release_cs, &message);
-+	ret = spi_sync_locked(dev, &message);
-+
-+fail:
-+	spi_bus_unlock(dev->master);
-+
-+	return ret;
-+}
-+
-+static int ice40_fpga_ops_write(struct fpga_manager *mgr,
-+				const char *buf, size_t count)
-+{
-+	struct ice40_fpga_priv *priv = mgr->priv;
-+
-+	return spi_write(priv->dev, buf, count);
-+}
-+
-+static int ice40_fpga_ops_write_complete(struct fpga_manager *mgr,
-+					 struct fpga_image_info *info)
-+{
-+	struct ice40_fpga_priv *priv = mgr->priv;
-+	struct spi_device *dev = priv->dev;
-+	const u8 padding[ICE40_SPI_NUM_ACTIVATION_BYTES] = {0};
-+
-+	/* Check CDONE is asserted */
-+	if (!gpiod_get_value(priv->cdone)) {
-+		dev_err(&dev->dev,
-+			"CDONE was not asserted after firmware transfer\n");
-+		return -EIO;
-+	}
-+
-+	/* Send of zero-padding to activate the firmware */
-+	return spi_write(dev, padding, sizeof(padding));
-+}
-+
-+static const struct fpga_manager_ops ice40_fpga_ops = {
-+	.state = ice40_fpga_ops_state,
-+	.write_init = ice40_fpga_ops_write_init,
-+	.write = ice40_fpga_ops_write,
-+	.write_complete = ice40_fpga_ops_write_complete,
-+};
-+
-+static int ice40_fpga_probe(struct spi_device *spi)
-+{
-+	struct device *dev = &spi->dev;
-+	struct ice40_fpga_priv *priv;
-+	int ret;
-+
-+	priv = devm_kzalloc(&spi->dev, sizeof(*priv), GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	priv->dev = spi;
-+
-+	/* Check board setup data. */
-+	if (spi->max_speed_hz > ICE40_SPI_MAX_SPEED) {
-+		dev_err(dev, "SPI speed is too high, maximum speed is "
-+			__stringify(ICE40_SPI_MAX_SPEED) "\n");
-+		return -EINVAL;
-+	}
-+
-+	if (spi->max_speed_hz < ICE40_SPI_MIN_SPEED) {
-+		dev_err(dev, "SPI speed is too low, minimum speed is "
-+			__stringify(ICE40_SPI_MIN_SPEED) "\n");
-+		return -EINVAL;
-+	}
-+
-+	if (spi->mode & SPI_CPHA) {
-+		dev_err(dev, "Bad SPI mode, CPHA not supported\n");
-+		return -EINVAL;
-+	}
-+
-+	/* Set up the GPIOs */
-+	priv->cdone = devm_gpiod_get(dev, "cdone", GPIOD_IN);
-+	if (IS_ERR(priv->cdone)) {
-+		ret = PTR_ERR(priv->cdone);
-+		dev_err(dev, "Failed to get CDONE GPIO: %d\n", ret);
-+		return ret;
-+	}
-+
-+	priv->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
-+	if (IS_ERR(priv->reset)) {
-+		ret = PTR_ERR(priv->reset);
-+		dev_err(dev, "Failed to get CRESET_B GPIO: %d\n", ret);
-+		return ret;
-+	}
-+
-+	/* Register with the FPGA manager */
-+	return fpga_mgr_register(dev, "Lattice iCE40 FPGA Manager",
-+				 &ice40_fpga_ops, priv);
-+}
-+
-+static int ice40_fpga_remove(struct spi_device *spi)
-+{
-+	fpga_mgr_unregister(&spi->dev);
-+	return 0;
-+}
-+
-+static const struct of_device_id ice40_fpga_of_match[] = {
-+	{ .compatible = "lattice,ice40-fpga-mgr", },
-+	{},
-+};
-+MODULE_DEVICE_TABLE(of, ice40_fpga_of_match);
-+
-+static struct spi_driver ice40_fpga_driver = {
-+	.probe = ice40_fpga_probe,
-+	.remove = ice40_fpga_remove,
-+	.driver = {
-+		.name = "ice40spi",
-+		.of_match_table = of_match_ptr(ice40_fpga_of_match),
-+	},
-+};
-+
-+module_spi_driver(ice40_fpga_driver);
-+
-+MODULE_AUTHOR("Joel Holdsworth <joel@airwebreathe.org.uk>");
-+MODULE_DESCRIPTION("Lattice iCE40 FPGA Manager");
-+MODULE_LICENSE("GPL v2");
diff --git a/patches.socfpga/0052-fpga-bridge-Replace-open-coded-list_for_each-list_en.patch b/patches.socfpga/0052-fpga-bridge-Replace-open-coded-list_for_each-list_en.patch
deleted file mode 100644
index a218c13f57d425..00000000000000
--- a/patches.socfpga/0052-fpga-bridge-Replace-open-coded-list_for_each-list_en.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 65107537be49563835a6accd0a7ef0dd078020cb Mon Sep 17 00:00:00 2001
-From: Moritz Fischer <mdf@kernel.org>
-Date: Fri, 10 Mar 2017 12:47:11 -0800
-Subject: [PATCH 052/103] fpga: bridge: Replace open-coded list_for_each +
- list_entry
-
-Replaces open-coded list_for_each() + list_entry() with macro
-list_for_each_entry()
-
-Signed-off-by: Moritz Fischer <mdf@kernel.org>
-Cc: linux-fpga@vger.kernel.org
-Cc: linux-kernel@vger.kernel.org
-Acked-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/fpga-bridge.c |   15 ++++-----------
- 1 file changed, 4 insertions(+), 11 deletions(-)
-
---- a/drivers/fpga/fpga-bridge.c
-+++ b/drivers/fpga/fpga-bridge.c
-@@ -146,11 +146,9 @@ EXPORT_SYMBOL_GPL(fpga_bridge_put);
- int fpga_bridges_enable(struct list_head *bridge_list)
- {
- 	struct fpga_bridge *bridge;
--	struct list_head *node;
- 	int ret;
- 
--	list_for_each(node, bridge_list) {
--		bridge = list_entry(node, struct fpga_bridge, node);
-+	list_for_each_entry(bridge, bridge_list, node) {
- 		ret = fpga_bridge_enable(bridge);
- 		if (ret)
- 			return ret;
-@@ -172,11 +170,9 @@ EXPORT_SYMBOL_GPL(fpga_bridges_enable);
- int fpga_bridges_disable(struct list_head *bridge_list)
- {
- 	struct fpga_bridge *bridge;
--	struct list_head *node;
- 	int ret;
- 
--	list_for_each(node, bridge_list) {
--		bridge = list_entry(node, struct fpga_bridge, node);
-+	list_for_each_entry(bridge, bridge_list, node) {
- 		ret = fpga_bridge_disable(bridge);
- 		if (ret)
- 			return ret;
-@@ -196,13 +192,10 @@ EXPORT_SYMBOL_GPL(fpga_bridges_disable);
-  */
- void fpga_bridges_put(struct list_head *bridge_list)
- {
--	struct fpga_bridge *bridge;
--	struct list_head *node, *next;
-+	struct fpga_bridge *bridge, *next;
- 	unsigned long flags;
- 
--	list_for_each_safe(node, next, bridge_list) {
--		bridge = list_entry(node, struct fpga_bridge, node);
--
-+	list_for_each_entry_safe(bridge, next, bridge_list, node) {
- 		fpga_bridge_put(bridge);
- 
- 		spin_lock_irqsave(&bridge_list_lock, flags);
diff --git a/patches.socfpga/0053-fpga-altera_freeze_bridge-Constify-ops.patch b/patches.socfpga/0053-fpga-altera_freeze_bridge-Constify-ops.patch
deleted file mode 100644
index 2747428eae44fc..00000000000000
--- a/patches.socfpga/0053-fpga-altera_freeze_bridge-Constify-ops.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From a55d3c2ff9848a13ccd78a45551bd38c390426fb Mon Sep 17 00:00:00 2001
-From: Moritz Fischer <mdf@kernel.org>
-Date: Thu, 23 Mar 2017 19:34:24 -0500
-Subject: [PATCH 053/103] fpga: altera_freeze_bridge: Constify ops
-
-The ops are not changing, make them const.
-
-Signed-off-by: Moritz Fischer <mdf@kernel.org>
-Cc: Alan Tull <atull@kernel.org>
-Cc: linux-kernel@vger.kernel.org
-Cc: linux-fpga@vger.kernel.org
-Acked-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/altera-freeze-bridge.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/fpga/altera-freeze-bridge.c
-+++ b/drivers/fpga/altera-freeze-bridge.c
-@@ -203,7 +203,7 @@ static int altera_freeze_br_enable_show(
- 	return priv->enable;
- }
- 
--static struct fpga_bridge_ops altera_freeze_br_br_ops = {
-+static const struct fpga_bridge_ops altera_freeze_br_br_ops = {
- 	.enable_set = altera_freeze_br_enable_set,
- 	.enable_show = altera_freeze_br_enable_show,
- };
diff --git a/patches.socfpga/0054-dt-bindings-fpga-add-xilinx-slave-serial-binding-des.patch b/patches.socfpga/0054-dt-bindings-fpga-add-xilinx-slave-serial-binding-des.patch
deleted file mode 100644
index 1c4bcc622e2f77..00000000000000
--- a/patches.socfpga/0054-dt-bindings-fpga-add-xilinx-slave-serial-binding-des.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From bad33a7dfec8bc8eb393519a9b2348d009a2fa6d Mon Sep 17 00:00:00 2001
-From: Anatolij Gustschin <agust@denx.de>
-Date: Thu, 23 Mar 2017 19:34:25 -0500
-Subject: [PATCH 054/103] dt: bindings: fpga: add xilinx slave-serial binding
- description
-
-Add dt binding documentation details for Xilinx FPGA configuration
-over slave serial interface.
-
-Signed-off-by: Anatolij Gustschin <agust@denx.de>
-Acked-by: Moritz Fischer <mdf@kernel.org>
-Acked-by: Rob Herring <robh@kernel.org>
-Acked-by: Michal Simek <michal.simek@xilinx.com>
-Acked-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt |   44 ++++++++++
- 1 file changed, 44 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt
-@@ -0,0 +1,44 @@
-+Xilinx Slave Serial SPI FPGA Manager
-+
-+Xilinx Spartan-6 FPGAs support a method of loading the bitstream over
-+what is referred to as "slave serial" interface.
-+The slave serial link is not technically SPI, and might require extra
-+circuits in order to play nicely with other SPI slaves on the same bus.
-+
-+See https://www.xilinx.com/support/documentation/user_guides/ug380.pdf
-+
-+Required properties:
-+- compatible: should contain "xlnx,fpga-slave-serial"
-+- reg: spi chip select of the FPGA
-+- prog_b-gpios: config pin (referred to as PROGRAM_B in the manual)
-+- done-gpios: config status pin (referred to as DONE in the manual)
-+
-+Example for full FPGA configuration:
-+
-+	fpga-region0 {
-+		compatible = "fpga-region";
-+		fpga-mgr = <&fpga_mgr_spi>;
-+		#address-cells = <0x1>;
-+		#size-cells = <0x1>;
-+	};
-+
-+	spi1: spi@10680 {
-+		compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
-+		pinctrl-0 = <&spi0_pins>;
-+		pinctrl-names = "default";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		cell-index = <1>;
-+		interrupts = <92>;
-+		clocks = <&coreclk 0>;
-+		status = "okay";
-+
-+		fpga_mgr_spi: fpga-mgr@0 {
-+			compatible = "xlnx,fpga-slave-serial";
-+			spi-max-frequency = <60000000>;
-+			spi-cpha;
-+			reg = <0>;
-+			done-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
-+			prog_b-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
-+		};
-+	};
diff --git a/patches.socfpga/0055-fpga-manager-Add-Xilinx-slave-serial-SPI-driver.patch b/patches.socfpga/0055-fpga-manager-Add-Xilinx-slave-serial-SPI-driver.patch
deleted file mode 100644
index 0f10393c3f504d..00000000000000
--- a/patches.socfpga/0055-fpga-manager-Add-Xilinx-slave-serial-SPI-driver.patch
+++ /dev/null
@@ -1,247 +0,0 @@
-From d4cd4955c34d18b9849d52ddfe6ca83f9f04e5a5 Mon Sep 17 00:00:00 2001
-From: Anatolij Gustschin <agust@denx.de>
-Date: Thu, 23 Mar 2017 19:34:26 -0500
-Subject: [PATCH 055/103] fpga manager: Add Xilinx slave serial SPI driver
-
-The driver loads FPGA firmware over SPI, using the "slave serial"
-configuration interface on Xilinx FPGAs.
-
-Signed-off-by: Anatolij Gustschin <agust@denx.de>
-Acked-by: Michal Simek <michal.simek@xilinx.com>
-Reviewed-by: Moritz Fischer <mdf@kernel.org>
-Acked-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/Kconfig      |    7 +
- drivers/fpga/Makefile     |    1 
- drivers/fpga/xilinx-spi.c |  198 ++++++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 206 insertions(+)
- create mode 100644 drivers/fpga/xilinx-spi.c
-
---- a/drivers/fpga/Kconfig
-+++ b/drivers/fpga/Kconfig
-@@ -46,6 +46,13 @@ config FPGA_MGR_TS73XX
- 	  FPGA manager driver support for the Altera Cyclone II FPGA
- 	  present on the TS-73xx SBC boards.
- 
-+config FPGA_MGR_XILINX_SPI
-+	tristate "Xilinx Configuration over Slave Serial (SPI)"
-+	depends on SPI
-+	help
-+	  FPGA manager driver support for Xilinx FPGA configuration
-+	  over slave serial interface.
-+
- config FPGA_MGR_ZYNQ_FPGA
- 	tristate "Xilinx Zynq FPGA"
- 	depends on ARCH_ZYNQ || COMPILE_TEST
---- a/drivers/fpga/Makefile
-+++ b/drivers/fpga/Makefile
-@@ -10,6 +10,7 @@ obj-$(CONFIG_FPGA_MGR_ICE40_SPI)	+= ice4
- obj-$(CONFIG_FPGA_MGR_SOCFPGA)		+= socfpga.o
- obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10)	+= socfpga-a10.o
- obj-$(CONFIG_FPGA_MGR_TS73XX)		+= ts73xx-fpga.o
-+obj-$(CONFIG_FPGA_MGR_XILINX_SPI)	+= xilinx-spi.o
- obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)	+= zynq-fpga.o
- 
- # FPGA Bridge Drivers
---- /dev/null
-+++ b/drivers/fpga/xilinx-spi.c
-@@ -0,0 +1,198 @@
-+/*
-+ * Xilinx Spartan6 Slave Serial SPI Driver
-+ *
-+ * Copyright (C) 2017 DENX Software Engineering
-+ *
-+ * Anatolij Gustschin <agust@denx.de>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * Manage Xilinx FPGA firmware that is loaded over SPI using
-+ * the slave serial configuration interface.
-+ */
-+
-+#include <linux/delay.h>
-+#include <linux/device.h>
-+#include <linux/fpga/fpga-mgr.h>
-+#include <linux/gpio/consumer.h>
-+#include <linux/module.h>
-+#include <linux/mod_devicetable.h>
-+#include <linux/of.h>
-+#include <linux/spi/spi.h>
-+#include <linux/sizes.h>
-+
-+struct xilinx_spi_conf {
-+	struct spi_device *spi;
-+	struct gpio_desc *prog_b;
-+	struct gpio_desc *done;
-+};
-+
-+static enum fpga_mgr_states xilinx_spi_state(struct fpga_manager *mgr)
-+{
-+	struct xilinx_spi_conf *conf = mgr->priv;
-+
-+	if (!gpiod_get_value(conf->done))
-+		return FPGA_MGR_STATE_RESET;
-+
-+	return FPGA_MGR_STATE_UNKNOWN;
-+}
-+
-+static int xilinx_spi_write_init(struct fpga_manager *mgr,
-+				 struct fpga_image_info *info,
-+				 const char *buf, size_t count)
-+{
-+	struct xilinx_spi_conf *conf = mgr->priv;
-+	const size_t prog_latency_7500us = 7500;
-+	const size_t prog_pulse_1us = 1;
-+
-+	if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) {
-+		dev_err(&mgr->dev, "Partial reconfiguration not supported.\n");
-+		return -EINVAL;
-+	}
-+
-+	gpiod_set_value(conf->prog_b, 1);
-+
-+	udelay(prog_pulse_1us); /* min is 500 ns */
-+
-+	gpiod_set_value(conf->prog_b, 0);
-+
-+	if (gpiod_get_value(conf->done)) {
-+		dev_err(&mgr->dev, "Unexpected DONE pin state...\n");
-+		return -EIO;
-+	}
-+
-+	/* program latency */
-+	usleep_range(prog_latency_7500us, prog_latency_7500us + 100);
-+	return 0;
-+}
-+
-+static int xilinx_spi_write(struct fpga_manager *mgr, const char *buf,
-+			    size_t count)
-+{
-+	struct xilinx_spi_conf *conf = mgr->priv;
-+	const char *fw_data = buf;
-+	const char *fw_data_end = fw_data + count;
-+
-+	while (fw_data < fw_data_end) {
-+		size_t remaining, stride;
-+		int ret;
-+
-+		remaining = fw_data_end - fw_data;
-+		stride = min_t(size_t, remaining, SZ_4K);
-+
-+		ret = spi_write(conf->spi, fw_data, stride);
-+		if (ret) {
-+			dev_err(&mgr->dev, "SPI error in firmware write: %d\n",
-+				ret);
-+			return ret;
-+		}
-+		fw_data += stride;
-+	}
-+
-+	return 0;
-+}
-+
-+static int xilinx_spi_apply_cclk_cycles(struct xilinx_spi_conf *conf)
-+{
-+	struct spi_device *spi = conf->spi;
-+	const u8 din_data[1] = { 0xff };
-+	int ret;
-+
-+	ret = spi_write(conf->spi, din_data, sizeof(din_data));
-+	if (ret)
-+		dev_err(&spi->dev, "applying CCLK cycles failed: %d\n", ret);
-+
-+	return ret;
-+}
-+
-+static int xilinx_spi_write_complete(struct fpga_manager *mgr,
-+				     struct fpga_image_info *info)
-+{
-+	struct xilinx_spi_conf *conf = mgr->priv;
-+	unsigned long timeout;
-+	int ret;
-+
-+	if (gpiod_get_value(conf->done))
-+		return xilinx_spi_apply_cclk_cycles(conf);
-+
-+	timeout = jiffies + usecs_to_jiffies(info->config_complete_timeout_us);
-+
-+	while (time_before(jiffies, timeout)) {
-+
-+		ret = xilinx_spi_apply_cclk_cycles(conf);
-+		if (ret)
-+			return ret;
-+
-+		if (gpiod_get_value(conf->done))
-+			return xilinx_spi_apply_cclk_cycles(conf);
-+	}
-+
-+	dev_err(&mgr->dev, "Timeout after config data transfer.\n");
-+	return -ETIMEDOUT;
-+}
-+
-+static const struct fpga_manager_ops xilinx_spi_ops = {
-+	.state = xilinx_spi_state,
-+	.write_init = xilinx_spi_write_init,
-+	.write = xilinx_spi_write,
-+	.write_complete = xilinx_spi_write_complete,
-+};
-+
-+static int xilinx_spi_probe(struct spi_device *spi)
-+{
-+	struct xilinx_spi_conf *conf;
-+
-+	conf = devm_kzalloc(&spi->dev, sizeof(*conf), GFP_KERNEL);
-+	if (!conf)
-+		return -ENOMEM;
-+
-+	conf->spi = spi;
-+
-+	/* PROGRAM_B is active low */
-+	conf->prog_b = devm_gpiod_get(&spi->dev, "prog_b", GPIOD_OUT_LOW);
-+	if (IS_ERR(conf->prog_b)) {
-+		dev_err(&spi->dev, "Failed to get PROGRAM_B gpio: %ld\n",
-+			PTR_ERR(conf->prog_b));
-+		return PTR_ERR(conf->prog_b);
-+	}
-+
-+	conf->done = devm_gpiod_get(&spi->dev, "done", GPIOD_IN);
-+	if (IS_ERR(conf->done)) {
-+		dev_err(&spi->dev, "Failed to get DONE gpio: %ld\n",
-+			PTR_ERR(conf->done));
-+		return PTR_ERR(conf->done);
-+	}
-+
-+	return fpga_mgr_register(&spi->dev, "Xilinx Slave Serial FPGA Manager",
-+				 &xilinx_spi_ops, conf);
-+}
-+
-+static int xilinx_spi_remove(struct spi_device *spi)
-+{
-+	fpga_mgr_unregister(&spi->dev);
-+
-+	return 0;
-+}
-+
-+static const struct of_device_id xlnx_spi_of_match[] = {
-+	{ .compatible = "xlnx,fpga-slave-serial", },
-+	{}
-+};
-+MODULE_DEVICE_TABLE(of, xlnx_spi_of_match);
-+
-+static struct spi_driver xilinx_slave_spi_driver = {
-+	.driver = {
-+		.name = "xlnx-slave-spi",
-+		.of_match_table = of_match_ptr(xlnx_spi_of_match),
-+	},
-+	.probe = xilinx_spi_probe,
-+	.remove = xilinx_spi_remove,
-+};
-+
-+module_spi_driver(xilinx_slave_spi_driver)
-+
-+MODULE_LICENSE("GPL v2");
-+MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
-+MODULE_DESCRIPTION("Load Xilinx FPGA firmware over SPI");
diff --git a/patches.socfpga/0056-ARM-socfpga-add-bindings-document-for-fpga-bridge-dr.patch b/patches.socfpga/0056-ARM-socfpga-add-bindings-document-for-fpga-bridge-dr.patch
deleted file mode 100644
index 36657182d49ae7..00000000000000
--- a/patches.socfpga/0056-ARM-socfpga-add-bindings-document-for-fpga-bridge-dr.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From be625b6c7234e180a34bcee690d64bfd52ae116d Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Tue, 12 Jul 2016 14:36:41 -0500
-Subject: [PATCH 056/103] ARM: socfpga: add bindings document for fpga bridge
- drivers
-
-Add bindings documentation for Altera SOCFPGA bridges:
- * fpga2sdram
- * fpga2hps
- * hps2fpga
- * lwhps2fpga
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Matthew Gerlach <mgerlach@altera.com>
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Rob Herring <robh@kernel.org>
----
- Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt |   16 ++++
- Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt   |   39 ++++++++++
- 2 files changed, 55 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt
- create mode 100644 Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt
-@@ -0,0 +1,16 @@
-+Altera FPGA To SDRAM Bridge Driver
-+
-+Required properties:
-+- compatible		: Should contain "altr,socfpga-fpga2sdram-bridge"
-+
-+Optional properties:
-+- bridge-enable		: 0 if driver should disable bridge at startup
-+			  1 if driver should enable bridge at startup
-+			  Default is to leave bridge in current state.
-+
-+Example:
-+	fpga_bridge3: fpga-bridge@ffc25080 {
-+		compatible = "altr,socfpga-fpga2sdram-bridge";
-+		reg = <0xffc25080 0x4>;
-+		bridge-enable = <0>;
-+	};
---- /dev/null
-+++ b/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
-@@ -0,0 +1,39 @@
-+Altera FPGA/HPS Bridge Driver
-+
-+Required properties:
-+- regs		: base address and size for AXI bridge module
-+- compatible	: Should contain one of:
-+		  "altr,socfpga-lwhps2fpga-bridge",
-+		  "altr,socfpga-hps2fpga-bridge", or
-+		  "altr,socfpga-fpga2hps-bridge"
-+- resets	: Phandle and reset specifier for this bridge's reset
-+- clocks	: Clocks used by this module.
-+
-+Optional properties:
-+- bridge-enable	: 0 if driver should disable bridge at startup.
-+		  1 if driver should enable bridge at startup.
-+		  Default is to leave bridge in its current state.
-+
-+Example:
-+	fpga_bridge0: fpga-bridge@ff400000 {
-+		compatible = "altr,socfpga-lwhps2fpga-bridge";
-+		reg = <0xff400000 0x100000>;
-+		resets = <&rst LWHPS2FPGA_RESET>;
-+		clocks = <&l4_main_clk>;
-+		bridge-enable = <0>;
-+	};
-+
-+	fpga_bridge1: fpga-bridge@ff500000 {
-+		compatible = "altr,socfpga-hps2fpga-bridge";
-+		reg = <0xff500000 0x10000>;
-+		resets = <&rst HPS2FPGA_RESET>;
-+		clocks = <&l4_main_clk>;
-+		bridge-enable = <1>;
-+	};
-+
-+	fpga_bridge2: fpga-bridge@ff600000 {
-+		compatible = "altr,socfpga-fpga2hps-bridge";
-+		reg = <0xff600000 0x100000>;
-+		resets = <&rst FPGA2HPS_RESET>;
-+		clocks = <&l4_main_clk>;
-+	};
diff --git a/patches.socfpga/0057-ARM-socfpga-add-bindings-doc-for-arria10-fpga-manage.patch b/patches.socfpga/0057-ARM-socfpga-add-bindings-doc-for-arria10-fpga-manage.patch
deleted file mode 100644
index a7a2904bc33bfb..00000000000000
--- a/patches.socfpga/0057-ARM-socfpga-add-bindings-doc-for-arria10-fpga-manage.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 94068d8c8be80b81e019683b4997a46627e3dd86 Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Tue, 12 Jul 2016 14:07:08 -0500
-Subject: [PATCH 057/103] ARM: socfpga: add bindings doc for arria10 fpga
- manager
-
-Add a device tree bindings document for the SoCFPGA Arria10
-FPGA Manager driver.
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Acked-By: Moritz Fischer <moritz.fischer@ettus.com>
-Signed-off-by: Rob Herring <robh@kernel.org>
----
- Documentation/devicetree/bindings/fpga/altera-socfpga-a10-fpga-mgr.txt |   19 ++++++++++
- 1 file changed, 19 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
-@@ -0,0 +1,19 @@
-+Altera SOCFPGA Arria10 FPGA Manager
-+
-+Required properties:
-+- compatible : should contain "altr,socfpga-a10-fpga-mgr"
-+- reg        : base address and size for memory mapped io.
-+               - The first index is for FPGA manager register access.
-+               - The second index is for writing FPGA configuration data.
-+- resets     : Phandle and reset specifier for the device's reset.
-+- clocks     : Clocks used by the device.
-+
-+Example:
-+
-+	fpga_mgr: fpga-mgr@ffd03000 {
-+		compatible = "altr,socfpga-a10-fpga-mgr";
-+		reg = <0xffd03000 0x100
-+		       0xffcfe400 0x20>;
-+		clocks = <&l4_mp_clk>;
-+		resets = <&rst FPGAMGR_RESET>;
-+	};
diff --git a/patches.socfpga/0058-add-bindings-document-for-altera-freeze-bridge.patch b/patches.socfpga/0058-add-bindings-document-for-altera-freeze-bridge.patch
deleted file mode 100644
index 8863758a0c5ca0..00000000000000
--- a/patches.socfpga/0058-add-bindings-document-for-altera-freeze-bridge.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 48e56f16d7bc13665e037dc17935a23dc440e0df Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Mon, 17 Oct 2016 11:09:34 -0500
-Subject: [PATCH 058/103] add bindings document for altera freeze bridge
-
-Add bindings document for the Altera Freeze Bridge.  A Freeze
-Bridge is used to gate traffic to/from a region of a FPGA
-such that that region can be reprogrammed.  The Freeze Bridge
-exist in FPGA fabric that is not currently being reconfigured.
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Rob Herring <robh@kernel.org>
----
- Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt |   23 ++++++++++
- 1 file changed, 23 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
-@@ -0,0 +1,23 @@
-+Altera Freeze Bridge Controller Driver
-+
-+The Altera Freeze Bridge Controller manages one or more freeze bridges.
-+The controller can freeze/disable the bridges which prevents signal
-+changes from passing through the bridge.  The controller can also
-+unfreeze/enable the bridges which allows traffic to pass through the
-+bridge normally.
-+
-+Required properties:
-+- compatible		: Should contain "altr,freeze-bridge-controller"
-+- regs			: base address and size for freeze bridge module
-+
-+Optional properties:
-+- bridge-enable		: 0 if driver should disable bridge at startup
-+			  1 if driver should enable bridge at startup
-+			  Default is to leave bridge in current state.
-+
-+Example:
-+	freeze-controller@100000450 {
-+		compatible = "altr,freeze-bridge-controller";
-+		regs = <0x1000 0x10>;
-+		bridge-enable = <0>;
-+	};
diff --git a/patches.socfpga/0059-MAINTAINERS-add-git-url-for-fpga.patch b/patches.socfpga/0059-MAINTAINERS-add-git-url-for-fpga.patch
deleted file mode 100644
index e7a92866f8beb4..00000000000000
--- a/patches.socfpga/0059-MAINTAINERS-add-git-url-for-fpga.patch
+++ /dev/null
@@ -1,22 +0,0 @@
-From c642ff14e89edf9cb54008765c97e75e505545b7 Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Tue, 29 Nov 2016 15:15:45 -0600
-Subject: [PATCH 059/103] MAINTAINERS: add git url for fpga
-
-Add git url for fpga stuff.
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
----
- MAINTAINERS |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -4959,6 +4959,7 @@ FPGA MANAGER FRAMEWORK
- M:	Alan Tull <atull@opensource.altera.com>
- R:	Moritz Fischer <moritz.fischer@ettus.com>
- S:	Maintained
-+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/atull/linux-fpga.git
- F:	drivers/fpga/
- F:	include/linux/fpga/fpga-mgr.h
- W:	http://www.rocketboards.org
diff --git a/patches.socfpga/0060-ARM-dts-socfpga-add-base-fpga-region-and-fpga-bridge.patch b/patches.socfpga/0060-ARM-dts-socfpga-add-base-fpga-region-and-fpga-bridge.patch
deleted file mode 100644
index 704a2dc20006cf..00000000000000
--- a/patches.socfpga/0060-ARM-dts-socfpga-add-base-fpga-region-and-fpga-bridge.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From d063b52520c412dccb99b0737b5e2b462d83dd8a Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Fri, 26 Feb 2016 14:21:04 -0600
-Subject: [PATCH 060/103] ARM: dts: socfpga: add base fpga region and fpga
- bridges
-
-Add h2f and lwh2f bridges.
-Add base FPGA Region to support DT overlays for FPGA programming.
-Add l3regs.
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
-v2: removed fpga-bridges, ranges, and reset-names
----
- arch/arm/boot/dts/socfpga.dtsi |   27 +++++++++++++++++++++++++++
- 1 file changed, 27 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga.dtsi
-+++ b/arch/arm/boot/dts/socfpga.dtsi
-@@ -93,6 +93,14 @@
- 			};
- 		};
- 
-+		base_fpga_region {
-+			compatible = "fpga-region";
-+			fpga-mgr = <&fpgamgr0>;
-+
-+			#address-cells = <0x1>;
-+			#size-cells = <0x1>;
-+		};
-+
- 		can0: can@ffc00000 {
- 			compatible = "bosch,d_can";
- 			reg = <0xffc00000 0x1000>;
-@@ -513,6 +521,20 @@
- 				};
- 		};
- 
-+		fpga_bridge0: fpga_bridge@ff400000 {
-+			compatible = "altr,socfpga-lwhps2fpga-bridge";
-+			reg = <0xff400000 0x100000>;
-+			resets = <&rst LWHPS2FPGA_RESET>;
-+			clocks = <&l4_main_clk>;
-+		};
-+
-+		fpga_bridge1: fpga_bridge@ff500000 {
-+			compatible = "altr,socfpga-hps2fpga-bridge";
-+			reg = <0xff500000 0x10000>;
-+			resets = <&rst HPS2FPGA_RESET>;
-+			clocks = <&l4_main_clk>;
-+		};
-+
- 		fpgamgr0: fpgamgr@ff706000 {
- 			compatible = "altr,socfpga-fpga-mgr";
- 			reg = <0xff706000 0x1000
-@@ -689,6 +711,11 @@
- 			arm,shared-override;
- 		};
- 
-+		l3regs@0xff800000 {
-+			compatible = "altr,l3regs", "syscon";
-+			reg = <0xff800000 0x1000>;
-+		};
-+
- 		mmc: dwmmc0@ff704000 {
- 			compatible = "altr,socfpga-dw-mshc";
- 			reg = <0xff704000 0x1000>;
diff --git a/patches.socfpga/0061-fpga-add-config-complete-timeout.patch b/patches.socfpga/0061-fpga-add-config-complete-timeout.patch
deleted file mode 100644
index b3594a46e98e5b..00000000000000
--- a/patches.socfpga/0061-fpga-add-config-complete-timeout.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 3871c39c6683965dbafdedc7b9f9b558cf620f0f Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Thu, 23 Mar 2017 19:34:27 -0500
-Subject: [PATCH 061/103] fpga: add config complete timeout
-
-Adding timeout for maximum allowed time for FPGA to go to
-operating mode after a FPGA region has been programmed.
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/fpga-region.c    |    3 +++
- include/linux/fpga/fpga-mgr.h |    3 +++
- 2 files changed, 6 insertions(+)
-
---- a/drivers/fpga/fpga-region.c
-+++ b/drivers/fpga/fpga-region.c
-@@ -385,6 +385,9 @@ static int fpga_region_notify_pre_apply(
- 	of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
- 			     &info->disable_timeout_us);
- 
-+	of_property_read_u32(nd->overlay, "config-complete-timeout-us",
-+			     &info->config_complete_timeout_us);
-+
- 	/* If FPGA was externally programmed, don't specify firmware */
- 	if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) {
- 		pr_err("error: specified firmware and external-fpga-config");
---- a/include/linux/fpga/fpga-mgr.h
-+++ b/include/linux/fpga/fpga-mgr.h
-@@ -77,11 +77,14 @@ enum fpga_mgr_states {
-  * @flags: boolean flags as defined above
-  * @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
-  * @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
-+ * @config_complete_timeout_us: maximum time for FPGA to switch to operating
-+ *	   status in the write_complete op.
-  */
- struct fpga_image_info {
- 	u32 flags;
- 	u32 enable_timeout_us;
- 	u32 disable_timeout_us;
-+	u32 config_complete_timeout_us;
- };
- 
- /**
diff --git a/patches.socfpga/0062-MAINTAINERS-Add-file-patterns-for-fpga-device-tree-b.patch b/patches.socfpga/0062-MAINTAINERS-Add-file-patterns-for-fpga-device-tree-b.patch
deleted file mode 100644
index 5180d45b407e83..00000000000000
--- a/patches.socfpga/0062-MAINTAINERS-Add-file-patterns-for-fpga-device-tree-b.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From f2e9e7db072f6445f9fea325f93f3406b78edc11 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert@linux-m68k.org>
-Date: Thu, 23 Mar 2017 19:34:31 -0500
-Subject: [PATCH 062/103] MAINTAINERS: Add file patterns for fpga device tree
- bindings
-
-Submitters of device tree binding documentation may forget to CC
-the subsystem maintainer if this is missing.
-
-Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
-Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
-Cc: Alan Tull <atull@opensource.altera.com>
-Cc: Moritz Fischer <moritz.fischer@ettus.com>
-Cc: linux-fpga@vger.kernel.org
-Acked-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- MAINTAINERS |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -4960,6 +4960,7 @@ M:	Alan Tull <atull@opensource.altera.co
- R:	Moritz Fischer <moritz.fischer@ettus.com>
- S:	Maintained
- T:	git git://git.kernel.org/pub/scm/linux/kernel/git/atull/linux-fpga.git
-+F:	Documentation/devicetree/bindings/fpga/
- F:	drivers/fpga/
- F:	include/linux/fpga/fpga-mgr.h
- W:	http://www.rocketboards.org
diff --git a/patches.socfpga/0063-MAINTAINERS-fpga-update-email-and-directory-paths.patch b/patches.socfpga/0063-MAINTAINERS-fpga-update-email-and-directory-paths.patch
deleted file mode 100644
index 499db058492d88..00000000000000
--- a/patches.socfpga/0063-MAINTAINERS-fpga-update-email-and-directory-paths.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From efcf802e63e2d545f6695ed386a3737ed9f1d77e Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@kernel.org>
-Date: Thu, 30 Mar 2017 13:23:12 -0500
-Subject: [PATCH 063/103] MAINTAINERS: fpga: update email and directory paths
-
-A few updates:
-* Updating my email address
-* Adding another docs directory: Documentation/fpga
-* Making the include path not specific to fpga-mgr.h only
-
-Signed-off-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- MAINTAINERS |    5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -4956,13 +4956,14 @@ F:	include/linux/ipmi-fru.h
- K:	fmc_d.*register
- 
- FPGA MANAGER FRAMEWORK
--M:	Alan Tull <atull@opensource.altera.com>
-+M:	Alan Tull <atull@kernel.org>
- R:	Moritz Fischer <moritz.fischer@ettus.com>
- S:	Maintained
- T:	git git://git.kernel.org/pub/scm/linux/kernel/git/atull/linux-fpga.git
-+F:	Documentation/fpga/
- F:	Documentation/devicetree/bindings/fpga/
- F:	drivers/fpga/
--F:	include/linux/fpga/fpga-mgr.h
-+F:	include/linux/fpga/
- W:	http://www.rocketboards.org
- 
- FPU EMULATOR
diff --git a/patches.socfpga/0064-spi-Add-Flag-to-Enable-Slave-Select-with-GPIO-Chip-S.patch b/patches.socfpga/0064-spi-Add-Flag-to-Enable-Slave-Select-with-GPIO-Chip-S.patch
deleted file mode 100644
index b64e9d522758a8..00000000000000
--- a/patches.socfpga/0064-spi-Add-Flag-to-Enable-Slave-Select-with-GPIO-Chip-S.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From d500a6439c32092db46195c550ef617ce3a3ffc2 Mon Sep 17 00:00:00 2001
-From: Thor Thayer <tthayer@opensource.altera.com>
-Date: Mon, 10 Oct 2016 09:25:24 -0500
-Subject: [PATCH 064/103] spi: Add Flag to Enable Slave Select with GPIO Chip
- Select.
-
-Some SPI masters require slave selection before the transfer
-can begin [1]. The SPI framework currently selects the chip using
-either 1) the internal CS mechanism or 2) the GPIO CS, but not both.
-
-This patch adds a new master->flags define to indicate both the GPIO
-CS and the internal chip select mechanism should be used.
-
-Tested On:
-    Altera CycloneV development kit
-    Compile tested for build errors on x86_64 (allyesconfigs)
-
-[1] DesignWare dw_apb_ssi Databook, Version 3.20a (page 39)
-
-Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
----
- drivers/spi/spi.c       |    9 +++++++--
- include/linux/spi/spi.h |    1 +
- 2 files changed, 8 insertions(+), 2 deletions(-)
-
---- a/drivers/spi/spi.c
-+++ b/drivers/spi/spi.c
-@@ -699,10 +699,15 @@ static void spi_set_cs(struct spi_device
- 	if (spi->mode & SPI_CS_HIGH)
- 		enable = !enable;
- 
--	if (gpio_is_valid(spi->cs_gpio))
-+	if (gpio_is_valid(spi->cs_gpio)) {
- 		gpio_set_value(spi->cs_gpio, !enable);
--	else if (spi->master->set_cs)
-+		/* Some SPI masters need both GPIO CS & slave_select */
-+		if ((spi->master->flags & SPI_MASTER_GPIO_SS) &&
-+		    spi->master->set_cs)
-+			spi->master->set_cs(spi, !enable);
-+	} else if (spi->master->set_cs) {
- 		spi->master->set_cs(spi, !enable);
-+	}
- }
- 
- #ifdef CONFIG_HAS_DMA
---- a/include/linux/spi/spi.h
-+++ b/include/linux/spi/spi.h
-@@ -442,6 +442,7 @@ struct spi_master {
- #define SPI_MASTER_NO_TX	BIT(2)		/* can't do buffer write */
- #define SPI_MASTER_MUST_RX      BIT(3)		/* requires rx */
- #define SPI_MASTER_MUST_TX      BIT(4)		/* requires tx */
-+#define SPI_MASTER_GPIO_SS      BIT(5)		/* GPIO CS must select slave */
- 
- 	/*
- 	 * on some hardware transfer / message size may be constrained
diff --git a/patches.socfpga/0065-spi-dw-Set-GPIO_SS-flag-to-toggle-Slave-Select-on-GP.patch b/patches.socfpga/0065-spi-dw-Set-GPIO_SS-flag-to-toggle-Slave-Select-on-GP.patch
deleted file mode 100644
index f66d7cdb2436fa..00000000000000
--- a/patches.socfpga/0065-spi-dw-Set-GPIO_SS-flag-to-toggle-Slave-Select-on-GP.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 1d1b6b573a601464ca8ec40ace560a30fa00bdf4 Mon Sep 17 00:00:00 2001
-From: Thor Thayer <tthayer@opensource.altera.com>
-Date: Mon, 10 Oct 2016 09:25:25 -0500
-Subject: [PATCH 065/103] spi: dw: Set GPIO_SS flag to toggle Slave Select on
- GPIO CS
-
-The Designware SPI master requires slave selection before the transfer
-can begin [1].
-
-This patch uses the new master flag to indicate both the GPIO CS and
-the internal chip select should be used.
-
-Tested On:
-    Altera CycloneV development kit
-    Compile tested for build errors on x86_64 (allyesconfigs)
-
-[1] DesignWare dw_apb_ssi Databook, Version 3.20a (page 39)
-
-Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
----
- drivers/spi/spi-dw.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/spi/spi-dw.c
-+++ b/drivers/spi/spi-dw.c
-@@ -505,6 +505,7 @@ int dw_spi_add_host(struct device *dev,
- 	master->handle_err = dw_spi_handle_err;
- 	master->max_speed_hz = dws->max_freq;
- 	master->dev.of_node = dev->of_node;
-+	master->flags = SPI_MASTER_GPIO_SS;
- 
- 	/* Basic HW init */
- 	spi_hw_init(dev, dws);
diff --git a/patches.socfpga/0066-ARM-dts-socfpga-Add-SPI-Master1-for-Arria10-SR-chip.patch b/patches.socfpga/0066-ARM-dts-socfpga-Add-SPI-Master1-for-Arria10-SR-chip.patch
deleted file mode 100644
index a6a2449a4e97c4..00000000000000
--- a/patches.socfpga/0066-ARM-dts-socfpga-Add-SPI-Master1-for-Arria10-SR-chip.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 591692b01bed97f524daa7623e58543276e32abd Mon Sep 17 00:00:00 2001
-From: Thor Thayer <tthayer@opensource.altera.com>
-Date: Thu, 2 Jun 2016 17:52:25 +0000
-Subject: [PATCH 066/103] ARM: dts: socfpga: Add SPI Master1 for Arria10 SR
- chip
-
-Add the Altera Arria10 SPI Master Node in preparation for
-the A10SR MFD node.
-
-Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
----
- arch/arm/boot/dts/socfpga_arria10.dtsi |   15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_arria10.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
-@@ -579,6 +579,21 @@
- 			status = "disabled";
- 		};
- 
-+		spi1: spi@ffda5000 {
-+			compatible = "snps,dw-apb-ssi";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <0xffda5000 0x100>;
-+			interrupts = <0 102 4>;
-+			num-chipselect = <4>;
-+			bus-num = <0>;
-+			/*32bit_access;*/
-+			tx-dma-channel = <&pdma 16>;
-+			rx-dma-channel = <&pdma 17>;
-+			clocks = <&spi_m_clk>;
-+			status = "disabled";
-+		};
-+
- 		sdr: sdr@ffc25000 {
- 			compatible = "altr,sdr-ctl", "syscon";
- 			reg = <0xffcfb100 0x80>;
diff --git a/patches.socfpga/0067-ARM-dts-socfpga-Add-Devkit-A10-SR-fields-for-Arria10.patch b/patches.socfpga/0067-ARM-dts-socfpga-Add-Devkit-A10-SR-fields-for-Arria10.patch
deleted file mode 100644
index 4797dfc4096e83..00000000000000
--- a/patches.socfpga/0067-ARM-dts-socfpga-Add-Devkit-A10-SR-fields-for-Arria10.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From dd696cdcf4973ec6ba54ed24283548c1e57948cf Mon Sep 17 00:00:00 2001
-From: Thor Thayer <tthayer@opensource.altera.com>
-Date: Thu, 2 Jun 2016 17:52:26 +0000
-Subject: [PATCH 067/103] ARM: dts: socfpga: Add Devkit A10-SR fields for
- Arria10
-
-Add the Altera Arria10 System Resource node. This is a Multi-Function
-device with GPIO expander support.
-
-Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
----
- arch/arm/boot/dts/socfpga_arria10_socdk.dtsi |   21 +++++++++++++++++++++
- 1 file changed, 21 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-@@ -75,6 +75,27 @@
- 	status = "okay";
- };
- 
-+&spi1 {
-+	status = "okay";
-+
-+	resource-manager@0 {
-+		compatible = "altr,a10sr";
-+		reg = <0>;
-+		spi-max-frequency = <100000>;
-+		/* low-level active IRQ at GPIO1_5 */
-+		interrupt-parent = <&portb>;
-+		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
-+		interrupt-controller;
-+		#interrupt-cells = <2>;
-+
-+		a10sr_gpio: gpio-controller {
-+			compatible = "altr,a10sr-gpio";
-+			gpio-controller;
-+			#gpio-cells = <2>;
-+		};
-+	};
-+};
-+
- &i2c1 {
- 	speed-mode = <0>;
- 	status = "okay";
diff --git a/patches.socfpga/0068-ARM-dts-socfpga-Enable-GPIO-parent-for-Arria10-SR-ch.patch b/patches.socfpga/0068-ARM-dts-socfpga-Enable-GPIO-parent-for-Arria10-SR-ch.patch
deleted file mode 100644
index d24d027ded66ae..00000000000000
--- a/patches.socfpga/0068-ARM-dts-socfpga-Enable-GPIO-parent-for-Arria10-SR-ch.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From a672d36e350129ca4b0d5fd127d2672c6484100d Mon Sep 17 00:00:00 2001
-From: Thor Thayer <tthayer@opensource.altera.com>
-Date: Thu, 2 Jun 2016 17:52:27 +0000
-Subject: [PATCH 068/103] ARM: dts: socfpga: Enable GPIO parent for Arria10 SR
- chip
-
-Enable the Altera Arria10 GPIO parent for MFD operation.
-
-Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
----
- arch/arm/boot/dts/socfpga_arria10_socdk.dtsi |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-@@ -75,6 +75,10 @@
- 	status = "okay";
- };
- 
-+&gpio1 {
-+	status = "okay";
-+};
-+
- &spi1 {
- 	status = "okay";
- 
diff --git a/patches.socfpga/0069-ARM-dts-socfpga-Add-LED-framework-to-A10-SR-GPIO.patch b/patches.socfpga/0069-ARM-dts-socfpga-Add-LED-framework-to-A10-SR-GPIO.patch
deleted file mode 100644
index 0a3341b0d97ba1..00000000000000
--- a/patches.socfpga/0069-ARM-dts-socfpga-Add-LED-framework-to-A10-SR-GPIO.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 40c6c417eabe97c7a3364f418880e00e9da7b420 Mon Sep 17 00:00:00 2001
-From: Thor Thayer <tthayer@opensource.altera.com>
-Date: Thu, 2 Jun 2016 17:52:28 +0000
-Subject: [PATCH 069/103] ARM: dts: socfpga: Add LED framework to A10-SR GPIO
-
-Add the LED framework to the Arria10 System Resource chip GPIO hooks.
-
-Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
----
- arch/arm/boot/dts/socfpga_arria10_socdk.dtsi |   24 ++++++++++++++++++++++++
- 1 file changed, 24 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-@@ -36,6 +36,30 @@
- 		reg = <0x0 0x40000000>; /* 1GB */
- 	};
- 
-+	a10leds {
-+		compatible = "gpio-leds";
-+
-+		a10sr_led0 {
-+			label = "a10sr-led0";
-+			gpios = <&a10sr_gpio 0 1>;
-+		};
-+
-+		a10sr_led1 {
-+			label = "a10sr-led1";
-+			gpios = <&a10sr_gpio 1 1>;
-+		};
-+
-+		a10sr_led2 {
-+			label = "a10sr-led2";
-+			gpios = <&a10sr_gpio 2 1>;
-+		};
-+
-+		a10sr_led3 {
-+			label = "a10sr-led3";
-+			gpios = <&a10sr_gpio 3 1>;
-+		};
-+	};
-+
- 	soc {
- 		clkmgr@ffd04000 {
- 			clocks {
diff --git a/patches.socfpga/0070-EDAC-altera-Disable-IRQs-while-injecting-SDRAM-error.patch b/patches.socfpga/0070-EDAC-altera-Disable-IRQs-while-injecting-SDRAM-error.patch
deleted file mode 100644
index 6edb8831857602..00000000000000
--- a/patches.socfpga/0070-EDAC-altera-Disable-IRQs-while-injecting-SDRAM-error.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From ea62c7b1bf6a7fa765bddfc710a279e233ead67c Mon Sep 17 00:00:00 2001
-From: Thor Thayer <tthayer@opensource.altera.com>
-Date: Wed, 19 Oct 2016 14:53:47 -0500
-Subject: [PATCH 070/103] EDAC, altera: Disable IRQs while injecting SDRAM
- errors
-
-Disable IRQs while injecting SDRAM errors. The RT patches exposed
-a spinlock deadlock where the spinlock taken for the regmap write
-deadlocked with the IRQ clear regmap write.
-
-Error injection is not normally enabled for ECC but only for testing.
-
-Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
-Cc: linux-edac <linux-edac@vger.kernel.org>
-Link: http://lkml.kernel.org/r/1476906827-9412-1-git-send-email-tthayer@opensource.altera.com
-Signed-off-by: Borislav Petkov <bp@suse.de>
----
- drivers/edac/altera_edac.c |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/edac/altera_edac.c
-+++ b/drivers/edac/altera_edac.c
-@@ -153,13 +153,17 @@ static ssize_t altr_sdr_mc_err_inject_wr
- 	if (count == 3) {
- 		edac_printk(KERN_ALERT, EDAC_MC,
- 			    "Inject Double bit error\n");
-+		local_irq_disable();
- 		regmap_write(drvdata->mc_vbase, priv->ce_ue_trgr_offset,
- 			     (read_reg | priv->ue_set_mask));
-+		local_irq_enable();
- 	} else {
- 		edac_printk(KERN_ALERT, EDAC_MC,
- 			    "Inject Single bit error\n");
-+		local_irq_disable();
- 		regmap_write(drvdata->mc_vbase,	priv->ce_ue_trgr_offset,
- 			     (read_reg | priv->ce_set_mask));
-+		local_irq_enable();
- 	}
- 
- 	ptemp[0] = 0x5A5A5A5A;
diff --git a/patches.socfpga/0071-gpio-altera-a10sr-Add-A10-System-Resource-Chip-GPIO-.patch b/patches.socfpga/0071-gpio-altera-a10sr-Add-A10-System-Resource-Chip-GPIO-.patch
deleted file mode 100644
index 29332fa707cd7d..00000000000000
--- a/patches.socfpga/0071-gpio-altera-a10sr-Add-A10-System-Resource-Chip-GPIO-.patch
+++ /dev/null
@@ -1,190 +0,0 @@
-From 26b18f6bff88d437c9949a2251c5bc62de427311 Mon Sep 17 00:00:00 2001
-From: Thor Thayer <tthayer@opensource.altera.com>
-Date: Thu, 2 Jun 2016 12:52:24 -0500
-Subject: [PATCH 071/103] gpio: altera-a10sr: Add A10 System Resource Chip GPIO
- support.
-
-Add the GPIO functionality for the Altera Arria10 MAX5 System Resource
-Chip. The A10 MAX5 has 12 bits of GPIO assigned to switches, buttons,
-and LEDs as a GPIO extender on the SPI bus.
-
-Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>i
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/gpio/Kconfig             |    8 ++
- drivers/gpio/Makefile            |    1 
- drivers/gpio/gpio-altera-a10sr.c |  140 +++++++++++++++++++++++++++++++++++++++
- 3 files changed, 149 insertions(+)
- create mode 100644 drivers/gpio/gpio-altera-a10sr.c
-
---- a/drivers/gpio/Kconfig
-+++ b/drivers/gpio/Kconfig
-@@ -814,6 +814,14 @@ config GPIO_ADP5520
- 	  This option enables support for on-chip GPIO found
- 	  on Analog Devices ADP5520 PMICs.
- 
-+config GPIO_ALTERA_A10SR
-+	tristate "Altera Arria10 System Resource GPIO"
-+	depends on MFD_ALTERA_A10SR
-+	help
-+	  Driver for Arria10 Development Kit GPIO expansion which
-+	  includes reads of pushbuttons and DIP switches as well
-+	  as writes to LEDs.
-+
- config GPIO_ARIZONA
- 	tristate "Wolfson Microelectronics Arizona class devices"
- 	depends on MFD_ARIZONA
---- a/drivers/gpio/Makefile
-+++ b/drivers/gpio/Makefile
-@@ -24,6 +24,7 @@ obj-$(CONFIG_GPIO_ADNP)		+= gpio-adnp.o
- obj-$(CONFIG_GPIO_ADP5520)	+= gpio-adp5520.o
- obj-$(CONFIG_GPIO_ADP5588)	+= gpio-adp5588.o
- obj-$(CONFIG_GPIO_ALTERA)  	+= gpio-altera.o
-+obj-$(CONFIG_GPIO_ALTERA_A10SR)	+= gpio-altera-a10sr.o
- obj-$(CONFIG_GPIO_AMD8111)	+= gpio-amd8111.o
- obj-$(CONFIG_GPIO_AMDPT)	+= gpio-amdpt.o
- obj-$(CONFIG_GPIO_ARIZONA)	+= gpio-arizona.o
---- /dev/null
-+++ b/drivers/gpio/gpio-altera-a10sr.c
-@@ -0,0 +1,140 @@
-+/*
-+ *  Copyright Intel Corporation (C) 2014-2016. All Rights Reserved
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * GPIO driver for  Altera Arria10 MAX5 System Resource Chip
-+ *
-+ * Adapted from gpio-tps65910.c
-+ */
-+
-+#include <linux/gpio/driver.h>
-+#include <linux/mfd/altera-a10sr.h>
-+#include <linux/module.h>
-+
-+/**
-+ * struct altr_a10sr_gpio - Altera Max5 GPIO device private data structure
-+ * @gp:   : instance of the gpio_chip
-+ * @regmap: the regmap from the parent device.
-+ */
-+struct altr_a10sr_gpio {
-+	struct gpio_chip gp;
-+	struct regmap *regmap;
-+};
-+
-+static int altr_a10sr_gpio_get(struct gpio_chip *chip, unsigned int offset)
-+{
-+	struct altr_a10sr_gpio *gpio = gpiochip_get_data(chip);
-+	int ret, val;
-+
-+	ret = regmap_read(gpio->regmap, ALTR_A10SR_PBDSW_REG, &val);
-+	if (ret < 0)
-+		return ret;
-+
-+	return !!(val & BIT(offset - ALTR_A10SR_LED_VALID_SHIFT));
-+}
-+
-+static void altr_a10sr_gpio_set(struct gpio_chip *chip, unsigned int offset,
-+				int value)
-+{
-+	struct altr_a10sr_gpio *gpio = gpiochip_get_data(chip);
-+
-+	regmap_update_bits(gpio->regmap, ALTR_A10SR_LED_REG,
-+			   BIT(ALTR_A10SR_LED_VALID_SHIFT + offset),
-+			   value ? BIT(ALTR_A10SR_LED_VALID_SHIFT + offset)
-+			   : 0);
-+}
-+
-+static int altr_a10sr_gpio_direction_input(struct gpio_chip *gc,
-+					   unsigned int nr)
-+{
-+	if (nr >= (ALTR_A10SR_IN_VALID_RANGE_LO - ALTR_A10SR_LED_VALID_SHIFT))
-+		return 0;
-+	return -EINVAL;
-+}
-+
-+static int altr_a10sr_gpio_direction_output(struct gpio_chip *gc,
-+					    unsigned int nr, int value)
-+{
-+	if (nr <= (ALTR_A10SR_OUT_VALID_RANGE_HI - ALTR_A10SR_LED_VALID_SHIFT))
-+		return 0;
-+	return -EINVAL;
-+}
-+
-+static struct gpio_chip altr_a10sr_gc = {
-+	.label = "altr_a10sr_gpio",
-+	.owner = THIS_MODULE,
-+	.get = altr_a10sr_gpio_get,
-+	.set = altr_a10sr_gpio_set,
-+	.direction_input = altr_a10sr_gpio_direction_input,
-+	.direction_output = altr_a10sr_gpio_direction_output,
-+	.can_sleep = true,
-+	.ngpio = 12,
-+	.base = -1,
-+};
-+
-+static int altr_a10sr_gpio_probe(struct platform_device *pdev)
-+{
-+	struct altr_a10sr_gpio *gpio;
-+	int ret;
-+	struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent);
-+
-+	gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
-+	if (!gpio)
-+		return -ENOMEM;
-+
-+	gpio->regmap = a10sr->regmap;
-+
-+	gpio->gp = altr_a10sr_gc;
-+
-+	gpio->gp.of_node = pdev->dev.of_node;
-+
-+	ret = devm_gpiochip_add_data(&pdev->dev, &gpio->gp, gpio);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
-+		return ret;
-+	}
-+
-+	platform_set_drvdata(pdev, gpio);
-+
-+	return 0;
-+}
-+
-+static int altr_a10sr_gpio_remove(struct platform_device *pdev)
-+{
-+	struct altr_a10sr_gpio *gpio = platform_get_drvdata(pdev);
-+
-+	gpiochip_remove(&gpio->gp);
-+
-+	return 0;
-+}
-+
-+static const struct of_device_id altr_a10sr_gpio_of_match[] = {
-+	{ .compatible = "altr,a10sr-gpio" },
-+	{ },
-+};
-+MODULE_DEVICE_TABLE(of, altr_a10sr_gpio_of_match);
-+
-+static struct platform_driver altr_a10sr_gpio_driver = {
-+	.probe = altr_a10sr_gpio_probe,
-+	.remove = altr_a10sr_gpio_remove,
-+	.driver = {
-+		.name	= "altr_a10sr_gpio",
-+		.of_match_table = of_match_ptr(altr_a10sr_gpio_of_match),
-+	},
-+};
-+module_platform_driver(altr_a10sr_gpio_driver);
-+
-+MODULE_LICENSE("GPL v2");
-+MODULE_AUTHOR("Thor Thayer <tthayer@opensource.altera.com>");
-+MODULE_DESCRIPTION("Altera Arria10 System Resource Chip GPIO");
diff --git a/patches.socfpga/0072-dt-bindings-mfd-Add-Altera-Arria10-System-Resource-C.patch b/patches.socfpga/0072-dt-bindings-mfd-Add-Altera-Arria10-System-Resource-C.patch
deleted file mode 100644
index 48faa04dfee82c..00000000000000
--- a/patches.socfpga/0072-dt-bindings-mfd-Add-Altera-Arria10-System-Resource-C.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From e9ea91f657e4f88cbedf1e93a19176d45d47548e Mon Sep 17 00:00:00 2001
-From: Thor Thayer <tthayer@opensource.altera.com>
-Date: Thu, 2 Jun 2016 12:52:21 -0500
-Subject: [PATCH 072/103] dt-bindings: mfd: Add Altera Arria10 System Resource
- Chip bindings
-
-The Altera Arria10 Devkit System Resource chip is a Multi-Function
-Device with a GPIO expander.
-
-This patch adds documentation for the Altera A10-SR DT bindings.
-
-Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
-Signed-off-by: Lee Jones <lee.jones@linaro.org>
----
- Documentation/devicetree/bindings/mfd/altera-a10sr.txt |   46 +++++++++++++++++
- 1 file changed, 46 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/mfd/altera-a10sr.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
-@@ -0,0 +1,46 @@
-+* Altera Arria10 Development Kit System Resource Chip
-+
-+Required parent device properties:
-+- compatible		: "altr,a10sr"
-+- spi-max-frequency	: Maximum SPI frequency.
-+- reg			: The SPI Chip Select address for the Arria10
-+			  System Resource chip
-+- interrupt-parent	: The parent interrupt controller.
-+- interrupts		: The interrupt line the device is connected to.
-+- interrupt-controller	: Marks the device node as an interrupt controller.
-+- #interrupt-cells	: The number of cells to describe an IRQ, should be 2.
-+			    The first cell is the IRQ number.
-+			    The second cell is the flags, encoded as trigger
-+			    masks from ../interrupt-controller/interrupts.txt.
-+
-+The A10SR consists of these sub-devices:
-+
-+Device                   Description
-+------                   ----------
-+a10sr_gpio               GPIO Controller
-+
-+Arria10 GPIO
-+Required Properties:
-+- compatible        : Should be "altr,a10sr-gpio"
-+- gpio-controller   : Marks the device node as a GPIO Controller.
-+- #gpio-cells       : Should be two.  The first cell is the pin number and
-+                      the second cell is used to specify flags.
-+                      See ../gpio/gpio.txt for more information.
-+
-+Example:
-+
-+        resource-manager@0 {
-+		compatible = "altr,a10sr";
-+		reg = <0>;
-+		spi-max-frequency = <100000>;
-+		interrupt-parent = <&portb>;
-+		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
-+		interrupt-controller;
-+		#interrupt-cells = <2>;
-+
-+		a10sr_gpio: gpio-controller {
-+			compatible = "altr,a10sr-gpio";
-+			gpio-controller;
-+			#gpio-cells = <2>;
-+		};
-+	};
diff --git a/patches.socfpga/0073-ARM-dts-Add-EMAC-AXI-settings-for-Arria10.patch b/patches.socfpga/0073-ARM-dts-Add-EMAC-AXI-settings-for-Arria10.patch
deleted file mode 100644
index a721ede04dedde..00000000000000
--- a/patches.socfpga/0073-ARM-dts-Add-EMAC-AXI-settings-for-Arria10.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 0484444cbff352dc6c1882ed5a6f9ac502875ad7 Mon Sep 17 00:00:00 2001
-From: Thor Thayer <thor.thayer@linux.intel.com>
-Date: Thu, 2 Feb 2017 16:05:21 -0600
-Subject: [PATCH 073/103] ARM: dts: Add EMAC AXI settings for Arria10
-
-Add the device tree entries needed to support the EMAC AXI
-bus settings on the Arria10 SoCFPGA chip.
-
-Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/boot/dts/socfpga_arria10.dtsi |    9 +++++++++
- 1 file changed, 9 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_arria10.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
-@@ -408,6 +408,12 @@
- 				};
- 		};
- 
-+		socfpga_axi_setup: stmmac-axi-config {
-+			snps,wr_osr_lmt = <0xf>;
-+			snps,rd_osr_lmt = <0xf>;
-+			snps,blen = <0 0 0 0 16 0 0>;
-+		};
-+
- 		gmac0: ethernet@ff800000 {
- 			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
- 			altr,sysmgr-syscon = <&sysmgr 0x44 0>;
-@@ -424,6 +430,7 @@
- 			clock-names = "stmmaceth";
- 			resets = <&rst EMAC0_RESET>;
- 			reset-names = "stmmaceth";
-+			snps,axi-config = <&socfpga_axi_setup>;
- 			status = "disabled";
- 		};
- 
-@@ -443,6 +450,7 @@
- 			clock-names = "stmmaceth";
- 			resets = <&rst EMAC1_RESET>;
- 			reset-names = "stmmaceth";
-+			snps,axi-config = <&socfpga_axi_setup>;
- 			status = "disabled";
- 		};
- 
-@@ -460,6 +468,7 @@
- 			rx-fifo-depth = <16384>;
- 			clocks = <&l4_mp_clk>;
- 			clock-names = "stmmaceth";
-+			snps,axi-config = <&socfpga_axi_setup>;
- 			status = "disabled";
- 		};
- 
diff --git a/patches.socfpga/0074-MAINTAINERS-EDAC-Update-email-for-Thor-Thayer.patch b/patches.socfpga/0074-MAINTAINERS-EDAC-Update-email-for-Thor-Thayer.patch
deleted file mode 100644
index 2a20ff53b526d1..00000000000000
--- a/patches.socfpga/0074-MAINTAINERS-EDAC-Update-email-for-Thor-Thayer.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 46436c057d4b2210fe487f76a51fdfe7eb9c3d15 Mon Sep 17 00:00:00 2001
-From: Thor Thayer <thor.thayer@linux.intel.com>
-Date: Mon, 13 Feb 2017 13:30:41 -0600
-Subject: [PATCH 074/103] MAINTAINERS, EDAC: Update email for Thor Thayer
-
-My opensource.altera.com email will be going away soon. Switch to new
-email address (linux.intel.com).
-
-Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
-Cc: linux-edac <linux-edac@vger.kernel.org>
-Link: http://lkml.kernel.org/r/1487014241-3771-1-git-send-email-thor.thayer@linux.intel.com
-Signed-off-by: Borislav Petkov <bp@suse.de>
----
- MAINTAINERS |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -628,7 +628,7 @@ S:	Maintained
- F:	drivers/gpio/gpio-altera.c
- 
- ALTERA SYSTEM RESOURCE DRIVER FOR ARRIA10 DEVKIT
--M:	Thor Thayer <tthayer@opensource.altera.com>
-+M:	Thor Thayer <thor.thayer@linux.intel.com>
- S:	Maintained
- F:	drivers/gpio/gpio-altera-a10sr.c
- F:	drivers/mfd/altera-a10sr.c
-@@ -1766,7 +1766,7 @@ S:	Maintained
- F:	drivers/clk/socfpga/
- 
- ARM/SOCFPGA EDAC SUPPORT
--M:	Thor Thayer <tthayer@opensource.altera.com>
-+M:	Thor Thayer <thor.thayer@linux.intel.com>
- S:	Maintained
- F:	drivers/edac/altera_edac.
- 
diff --git a/patches.socfpga/0075-gpio-altera-a10sr-Set-gpio_chip-parent-property.patch b/patches.socfpga/0075-gpio-altera-a10sr-Set-gpio_chip-parent-property.patch
deleted file mode 100644
index 22a0a2e79a0de8..00000000000000
--- a/patches.socfpga/0075-gpio-altera-a10sr-Set-gpio_chip-parent-property.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 53c9bf5edfe4359a3baa2e42da49dabcc25d789a Mon Sep 17 00:00:00 2001
-From: Thor Thayer <thor.thayer@linux.intel.com>
-Date: Mon, 13 Feb 2017 13:49:58 -0600
-Subject: [PATCH 075/103] gpio: altera-a10sr: Set gpio_chip parent property
-
-Set the gpio_chip parent property since some recent functions
-such as devprop_gpiochip_set_names() can use it.
-
-Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/gpio/gpio-altera-a10sr.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpio/gpio-altera-a10sr.c
-+++ b/drivers/gpio/gpio-altera-a10sr.c
-@@ -96,7 +96,7 @@ static int altr_a10sr_gpio_probe(struct
- 	gpio->regmap = a10sr->regmap;
- 
- 	gpio->gp = altr_a10sr_gc;
--
-+	gpio->gp.parent = pdev->dev.parent;
- 	gpio->gp.of_node = pdev->dev.of_node;
- 
- 	ret = devm_gpiochip_add_data(&pdev->dev, &gpio->gp, gpio);
diff --git a/patches.socfpga/0076-dt-bindings-reset-a10sr-Add-Arria10-SR-Reset-Control.patch b/patches.socfpga/0076-dt-bindings-reset-a10sr-Add-Arria10-SR-Reset-Control.patch
deleted file mode 100644
index 343c5d36a23124..00000000000000
--- a/patches.socfpga/0076-dt-bindings-reset-a10sr-Add-Arria10-SR-Reset-Control.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 472534014030a4dc7abfa55952e6fdcb60d12f55 Mon Sep 17 00:00:00 2001
-From: Thor Thayer <thor.thayer@linux.intel.com>
-Date: Wed, 22 Feb 2017 11:10:16 -0600
-Subject: [PATCH 076/103] dt-bindings: reset: a10sr: Add Arria10 SR Reset
- Controller offsets
-
-The Arria10 System Resource Chip reset controller handles the
-Arria10 peripheral PHYs. This patch adds the offsets for
-these PHYs.
-
-Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
-Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
----
- MAINTAINERS                                    |    1 
- include/dt-bindings/reset/altr,rst-mgr-a10sr.h |   33 +++++++++++++++++++++++++
- 2 files changed, 34 insertions(+)
- create mode 100644 include/dt-bindings/reset/altr,rst-mgr-a10sr.h
-
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -633,6 +633,7 @@ S:	Maintained
- F:	drivers/gpio/gpio-altera-a10sr.c
- F:	drivers/mfd/altera-a10sr.c
- F:	include/linux/mfd/altera-a10sr.h
-+F:	include/dt-bindings/reset/altr,rst-mgr-a10sr.h
- 
- ALTERA TRIPLE SPEED ETHERNET DRIVER
- M:	Vince Bridgers <vbridger@opensource.altera.com>
---- /dev/null
-+++ b/include/dt-bindings/reset/altr,rst-mgr-a10sr.h
-@@ -0,0 +1,33 @@
-+/*
-+ *  Copyright Intel Corporation (C) 2017. All Rights Reserved
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * Reset binding definitions for Altera Arria10 MAX5 System Resource Chip
-+ *
-+ * Adapted from altr,rst-mgr-a10.h
-+ */
-+
-+#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
-+#define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
-+
-+/* Peripheral PHY resets */
-+#define A10SR_RESET_ENET_HPS	0
-+#define A10SR_RESET_PCIE	1
-+#define A10SR_RESET_FILE	2
-+#define A10SR_RESET_BQSPI	3
-+#define A10SR_RESET_USB		4
-+
-+#define A10SR_RESET_NUM		5
-+
-+#endif
diff --git a/patches.socfpga/0077-reset-Add-Altera-Arria10-SR-Reset-Controller.patch b/patches.socfpga/0077-reset-Add-Altera-Arria10-SR-Reset-Controller.patch
deleted file mode 100644
index e845232369dd3f..00000000000000
--- a/patches.socfpga/0077-reset-Add-Altera-Arria10-SR-Reset-Controller.patch
+++ /dev/null
@@ -1,199 +0,0 @@
-From 5d4c070628323b330cd36b4013d373ed0433a4eb Mon Sep 17 00:00:00 2001
-From: Thor Thayer <thor.thayer@linux.intel.com>
-Date: Wed, 22 Feb 2017 11:10:17 -0600
-Subject: [PATCH 077/103] reset: Add Altera Arria10 SR Reset Controller
-
-This patch adds the reset controller functionality for
-Peripheral PHYs to the Arria10 System Resource Chip.
-
-Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
-Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
-
-Conflicts:
-
-	drivers/reset/Makefile
----
- MAINTAINERS                 |    1 
- drivers/reset/Kconfig       |    7 ++
- drivers/reset/Makefile      |    1 
- drivers/reset/reset-a10sr.c |  138 ++++++++++++++++++++++++++++++++++++++++++++
- 4 files changed, 147 insertions(+)
- create mode 100644 drivers/reset/reset-a10sr.c
-
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -632,6 +632,7 @@ M:	Thor Thayer <thor.thayer@linux.intel.
- S:	Maintained
- F:	drivers/gpio/gpio-altera-a10sr.c
- F:	drivers/mfd/altera-a10sr.c
-+F:	drivers/reset/reset-a10sr.c
- F:	include/linux/mfd/altera-a10sr.h
- F:	include/dt-bindings/reset/altr,rst-mgr-a10sr.h
- 
---- a/drivers/reset/Kconfig
-+++ b/drivers/reset/Kconfig
-@@ -14,6 +14,13 @@ menuconfig RESET_CONTROLLER
- 
- if RESET_CONTROLLER
- 
-+config RESET_A10SR
-+	tristate "Altera Arria10 System Resource Reset"
-+	depends on MFD_ALTERA_A10SR
-+	help
-+	  This option enables support for the external reset functions for
-+	  peripheral PHYs on the Altera Arria10 System Resource Chip.
-+
- config RESET_ATH79
- 	bool "AR71xx Reset Driver" if COMPILE_TEST
- 	default ATH79
---- a/drivers/reset/Makefile
-+++ b/drivers/reset/Makefile
-@@ -1,6 +1,7 @@
- obj-y += core.o
- obj-y += hisilicon/
- obj-$(CONFIG_ARCH_STI) += sti/
-+obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
- obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
- obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
- obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
---- /dev/null
-+++ b/drivers/reset/reset-a10sr.c
-@@ -0,0 +1,138 @@
-+/*
-+ *  Copyright Intel Corporation (C) 2017. All Rights Reserved
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * Reset driver for Altera Arria10 MAX5 System Resource Chip
-+ *
-+ * Adapted from reset-socfpga.c
-+ */
-+
-+#include <linux/err.h>
-+#include <linux/mfd/altera-a10sr.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/platform_device.h>
-+#include <linux/reset-controller.h>
-+
-+#include <dt-bindings/reset/altr,rst-mgr-a10sr.h>
-+
-+struct a10sr_reset {
-+	struct reset_controller_dev     rcdev;
-+	struct regmap *regmap;
-+};
-+
-+static inline struct a10sr_reset *to_a10sr_rst(struct reset_controller_dev *rc)
-+{
-+	return container_of(rc, struct a10sr_reset, rcdev);
-+}
-+
-+static inline int a10sr_reset_shift(unsigned long id)
-+{
-+	switch (id) {
-+	case A10SR_RESET_ENET_HPS:
-+		return 1;
-+	case A10SR_RESET_PCIE:
-+	case A10SR_RESET_FILE:
-+	case A10SR_RESET_BQSPI:
-+	case A10SR_RESET_USB:
-+		return id + 11;
-+	default:
-+		return -EINVAL;
-+	}
-+}
-+
-+static int a10sr_reset_update(struct reset_controller_dev *rcdev,
-+			      unsigned long id, bool assert)
-+{
-+	struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
-+	int offset = a10sr_reset_shift(id);
-+	u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
-+	int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
-+
-+	return regmap_update_bits(a10r->regmap, index, mask, assert ? 0 : mask);
-+}
-+
-+static int a10sr_reset_assert(struct reset_controller_dev *rcdev,
-+			      unsigned long id)
-+{
-+	return a10sr_reset_update(rcdev, id, true);
-+}
-+
-+static int a10sr_reset_deassert(struct reset_controller_dev *rcdev,
-+				unsigned long id)
-+{
-+	return a10sr_reset_update(rcdev, id, false);
-+}
-+
-+static int a10sr_reset_status(struct reset_controller_dev *rcdev,
-+			      unsigned long id)
-+{
-+	int ret;
-+	struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
-+	int offset = a10sr_reset_shift(id);
-+	u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
-+	int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
-+	unsigned int value;
-+
-+	ret = regmap_read(a10r->regmap, index, &value);
-+	if (ret < 0)
-+		return ret;
-+
-+	return !!(value & mask);
-+}
-+
-+static const struct reset_control_ops a10sr_reset_ops = {
-+	.assert		= a10sr_reset_assert,
-+	.deassert	= a10sr_reset_deassert,
-+	.status		= a10sr_reset_status,
-+};
-+
-+static int a10sr_reset_probe(struct platform_device *pdev)
-+{
-+	struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent);
-+	struct a10sr_reset *a10r;
-+
-+	a10r = devm_kzalloc(&pdev->dev, sizeof(struct a10sr_reset),
-+			    GFP_KERNEL);
-+	if (!a10r)
-+		return -ENOMEM;
-+
-+	a10r->rcdev.owner = THIS_MODULE;
-+	a10r->rcdev.nr_resets = A10SR_RESET_NUM;
-+	a10r->rcdev.ops = &a10sr_reset_ops;
-+	a10r->rcdev.of_node = pdev->dev.of_node;
-+	a10r->regmap = a10sr->regmap;
-+
-+	platform_set_drvdata(pdev, a10r);
-+
-+	return devm_reset_controller_register(&pdev->dev, &a10r->rcdev);
-+}
-+
-+static const struct of_device_id a10sr_reset_of_match[] = {
-+	{ .compatible = "altr,a10sr-reset" },
-+	{ },
-+};
-+MODULE_DEVICE_TABLE(of, a10sr_reset_of_match);
-+
-+static struct platform_driver a10sr_reset_driver = {
-+	.probe	= a10sr_reset_probe,
-+	.driver = {
-+		.name		= "altr_a10sr_reset",
-+	},
-+};
-+module_platform_driver(a10sr_reset_driver);
-+
-+MODULE_AUTHOR("Thor Thayer <thor.thayer@linux.intel.com>");
-+MODULE_DESCRIPTION("Altera Arria10 System Resource Reset Controller Driver");
-+MODULE_LICENSE("GPL v2");
diff --git a/patches.socfpga/0078-ARM-dts-socfpga-Add-Devkit-A10-SR-Reset-Controller.patch b/patches.socfpga/0078-ARM-dts-socfpga-Add-Devkit-A10-SR-Reset-Controller.patch
deleted file mode 100644
index bbbafba61f42ba..00000000000000
--- a/patches.socfpga/0078-ARM-dts-socfpga-Add-Devkit-A10-SR-Reset-Controller.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From c948058fb2a34b35c935b947f4c4f07c3d3e7d24 Mon Sep 17 00:00:00 2001
-From: Thor Thayer <thor.thayer@linux.intel.com>
-Date: Thu, 16 Mar 2017 07:57:16 -0500
-Subject: [PATCH 078/103] ARM: dts: socfpga: Add Devkit A10-SR Reset Controller
-
-Add the Altera Arria10 System Resource Reset Controller to the MFD
-
-Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
-v2  change commit header to ARM: dts: socfpga.
----
- arch/arm/boot/dts/socfpga_arria10_socdk.dtsi |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-@@ -121,6 +121,11 @@
- 			gpio-controller;
- 			#gpio-cells = <2>;
- 		};
-+
-+		a10sr_rst: reset-controller {
-+			compatible = "altr,a10sr-reset";
-+			#reset-cells = <1>;
-+		};
- 	};
- };
- 
diff --git a/patches.socfpga/0080-mfd-altr_a10sr-Add-Arria10-DevKit-Reset-Controller.patch b/patches.socfpga/0080-mfd-altr_a10sr-Add-Arria10-DevKit-Reset-Controller.patch
deleted file mode 100644
index 8da8b04d0cb386..00000000000000
--- a/patches.socfpga/0080-mfd-altr_a10sr-Add-Arria10-DevKit-Reset-Controller.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 3c7b3fce2cf21f284518116f77bff9d6c7f4b327 Mon Sep 17 00:00:00 2001
-From: Thor Thayer <thor.thayer@linux.intel.com>
-Date: Wed, 22 Feb 2017 11:10:18 -0600
-Subject: [PATCH 080/103] mfd: altr_a10sr: Add Arria10 DevKit Reset Controller
-
-Add Peripheral PHY Reset Controller to the Arria10
-Development Kit System Resource Chip's MFD.
-
-Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
-Signed-off-by: Lee Jones <lee.jones@linaro.org>
----
- drivers/mfd/altera-a10sr.c |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/mfd/altera-a10sr.c
-+++ b/drivers/mfd/altera-a10sr.c
-@@ -33,6 +33,10 @@ static const struct mfd_cell altr_a10sr_
- 		.name = "altr_a10sr_gpio",
- 		.of_compatible = "altr,a10sr-gpio",
- 	},
-+	{
-+		.name = "altr_a10sr_reset",
-+		.of_compatible = "altr,a10sr-reset",
-+	},
- };
- 
- static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)
diff --git a/patches.socfpga/0081-dt-bindings-mfd-Add-Altera-Arria10-SR-Reset-Controll.patch b/patches.socfpga/0081-dt-bindings-mfd-Add-Altera-Arria10-SR-Reset-Controll.patch
deleted file mode 100644
index 2541f56a8da66a..00000000000000
--- a/patches.socfpga/0081-dt-bindings-mfd-Add-Altera-Arria10-SR-Reset-Controll.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From f12e2e73318394511538aa49c150a864d4f1a91a Mon Sep 17 00:00:00 2001
-From: Thor Thayer <thor.thayer@linux.intel.com>
-Date: Wed, 22 Feb 2017 11:10:15 -0600
-Subject: [PATCH 081/103] dt-bindings: mfd: Add Altera Arria10 SR Reset
- Controller bindings
-
-This patch adds documentation for the Altera A10-SR Reset
-Controller DT bindings.
-
-Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Lee Jones <lee.jones@linaro.org>
----
- Documentation/devicetree/bindings/mfd/altera-a10sr.txt |   11 +++++++++++
- 1 file changed, 11 insertions(+)
-
---- a/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
-+++ b/Documentation/devicetree/bindings/mfd/altera-a10sr.txt
-@@ -18,6 +18,7 @@ The A10SR consists of these sub-devices:
- Device                   Description
- ------                   ----------
- a10sr_gpio               GPIO Controller
-+a10sr_rst                Reset Controller
- 
- Arria10 GPIO
- Required Properties:
-@@ -27,6 +28,11 @@ Required Properties:
-                       the second cell is used to specify flags.
-                       See ../gpio/gpio.txt for more information.
- 
-+Arria10 Peripheral PHY Reset
-+Required Properties:
-+- compatible        : Should be "altr,a10sr-reset"
-+- #reset-cells      : Should be one.
-+
- Example:
- 
-         resource-manager@0 {
-@@ -43,4 +49,9 @@ Example:
- 			gpio-controller;
- 			#gpio-cells = <2>;
- 		};
-+
-+		a10sr_rst: reset-controller {
-+			compatible = "altr,a10sr-reset";
-+			#reset-cells = <1>;
-+		};
- 	};
diff --git a/patches.socfpga/0082-ARM-socfpga-defconfig-enable-qspi.patch b/patches.socfpga/0082-ARM-socfpga-defconfig-enable-qspi.patch
deleted file mode 100644
index 406f4072673e75..00000000000000
--- a/patches.socfpga/0082-ARM-socfpga-defconfig-enable-qspi.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From fa54ece4ad77749237745ea23796f8a2a368cbfc Mon Sep 17 00:00:00 2001
-From: Steffen Trumtrar <s.trumtrar@pengutronix.de>
-Date: Tue, 18 Oct 2016 07:43:04 +0000
-Subject: [PATCH 082/103] ARM: socfpga: defconfig: enable qspi
-
-Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
----
- arch/arm/configs/socfpga_defconfig |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/arch/arm/configs/socfpga_defconfig
-+++ b/arch/arm/configs/socfpga_defconfig
-@@ -51,6 +51,9 @@ CONFIG_CAN_DEBUG_DEVICES=y
- CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
- CONFIG_DEVTMPFS=y
- CONFIG_DEVTMPFS_MOUNT=y
-+CONFIG_MTD=y
-+CONFIG_MTD_SPI_NOR=y
-+CONFIG_SPI_CADENCE_QUADSPI=y
- CONFIG_BLK_DEV_RAM=y
- CONFIG_BLK_DEV_RAM_COUNT=2
- CONFIG_BLK_DEV_RAM_SIZE=8192
diff --git a/patches.socfpga/0083-ARM-socfpga-updates-for-socfpga_defconfig.patch b/patches.socfpga/0083-ARM-socfpga-updates-for-socfpga_defconfig.patch
deleted file mode 100644
index 3fc4ef2288e72d..00000000000000
--- a/patches.socfpga/0083-ARM-socfpga-updates-for-socfpga_defconfig.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From b7e82058125354c24224ef475ffed4a8f30d025c Mon Sep 17 00:00:00 2001
-From: Alan Tull <atull@opensource.altera.com>
-Date: Wed, 2 Nov 2016 16:22:36 -0500
-Subject: [PATCH 083/103] ARM: socfpga: updates for socfpga_defconfig
-
-This patch enables the following in the
-socfpga_defconfig:
-
-+CONFIG_OF_OVERLAY=y
-  Enable support for Device Tree Overlays
-
-+CONFIG_FPGA_REGION=y
-  Enable device tree overlay support for FPGA
-  programming
-
-+CONFIG_FPGA_MGR_SOCFPGA_A10=y
-  Enable partial reconfiguration for Altera
-  Arria 10 FPGA
-
-+CONFIG_FPGA_BRIDGE=y
-  Enable the FPGA Bridges framework
-
-+CONFIG_SOCFPGA_FPGA_BRIDGE=y
-  Enable support for SoCFPGA hardware
-  bridges
-
-+CONFIG_ALTERA_FREEZE_BRIDGE=y
-  Enable support for the Altera Soft IP
-  Freeze bridges
-
-Signed-off-by: Alan Tull <atull@opensource.altera.com>
----
- arch/arm/configs/socfpga_defconfig |    6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/arch/arm/configs/socfpga_defconfig
-+++ b/arch/arm/configs/socfpga_defconfig
-@@ -54,6 +54,7 @@ CONFIG_DEVTMPFS_MOUNT=y
- CONFIG_MTD=y
- CONFIG_MTD_SPI_NOR=y
- CONFIG_SPI_CADENCE_QUADSPI=y
-+CONFIG_OF_OVERLAY=y
- CONFIG_BLK_DEV_RAM=y
- CONFIG_BLK_DEV_RAM_COUNT=2
- CONFIG_BLK_DEV_RAM_SIZE=8192
-@@ -105,7 +106,12 @@ CONFIG_DMADEVICES=y
- CONFIG_PL330_DMA=y
- CONFIG_DMATEST=m
- CONFIG_FPGA=y
-+CONFIG_FPGA_REGION=y
- CONFIG_FPGA_MGR_SOCFPGA=y
-+CONFIG_FPGA_MGR_SOCFPGA_A10=y
-+CONFIG_FPGA_BRIDGE=y
-+CONFIG_SOCFPGA_FPGA_BRIDGE=y
-+CONFIG_ALTERA_FREEZE_BRIDGE=y
- CONFIG_EXT2_FS=y
- CONFIG_EXT2_FS_XATTR=y
- CONFIG_EXT2_FS_POSIX_ACL=y
diff --git a/patches.socfpga/0084-ARM-socfpga_defconfig-update-defconfig-for-SoCFPGA.patch b/patches.socfpga/0084-ARM-socfpga_defconfig-update-defconfig-for-SoCFPGA.patch
deleted file mode 100644
index 89303586e3d4d4..00000000000000
--- a/patches.socfpga/0084-ARM-socfpga_defconfig-update-defconfig-for-SoCFPGA.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From b0068141c565214d7682a9fa95c1673648ab159d Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Wed, 14 Dec 2016 04:25:54 -0600
-Subject: [PATCH 084/103] ARM: socfpga_defconfig: update defconfig for SoCFPGA
-
-MARVELL_PHY - support for the Marvell PHY that is on most of the devkits
-EEPROM_AT24 - support for I2C EEPROMs on the devkits
-GPIO_ALTERA - support for Altera's GPIO driver
-NAND - support for the Denali NAND controller along with MTD subsystem
-SPI_DESIGNWARE - support for SPI that is on SoCFPGA
-SPI_DW_MMIO - support for the memory-mapped io interface for the DW SPI core
-OF_CONFIGFS - SoCFPGA makes use of DT overlays using configfs, enable it
-GPIO_ALTERA_A10SR - support for the newly added Altera HWMON driver
-LEDS - support for the GPIO LEDs on the SoCFPGA devkits
-RTC - support for the DS1307 RTC
-JFFS2_FS - support for the JFFS2 filesystem
-NFS_V4 - supports for v4 NFS
-FUNCTION_TRACER - supports debug function tracing
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/configs/socfpga_defconfig |   28 ++++++++++++++++++++++++++--
- 1 file changed, 26 insertions(+), 2 deletions(-)
-
---- a/arch/arm/configs/socfpga_defconfig
-+++ b/arch/arm/configs/socfpga_defconfig
-@@ -52,14 +52,20 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug
- CONFIG_DEVTMPFS=y
- CONFIG_DEVTMPFS_MOUNT=y
- CONFIG_MTD=y
-+CONFIG_MTD_BLOCK=y
-+CONFIG_MTD_M25P80=y
-+CONFIG_MTD_NAND=y
-+CONFIG_MTD_NAND_DENALI_DT=y
- CONFIG_MTD_SPI_NOR=y
- CONFIG_SPI_CADENCE_QUADSPI=y
- CONFIG_OF_OVERLAY=y
-+CONFIG_OF_CONFIGFS=y
- CONFIG_BLK_DEV_RAM=y
- CONFIG_BLK_DEV_RAM_COUNT=2
- CONFIG_BLK_DEV_RAM_SIZE=8192
- CONFIG_BLK_DEV_NVME=m
- CONFIG_SRAM=y
-+CONFIG_EEPROM_AT24=y
- CONFIG_SCSI=y
- # CONFIG_SCSI_PROC_FS is not set
- CONFIG_BLK_DEV_SD=y
-@@ -69,6 +75,7 @@ CONFIG_E1000E=m
- CONFIG_IGB=m
- CONFIG_IXGBE=m
- CONFIG_STMMAC_ETH=y
-+CONFIG_MARVELL_PHY=y
- CONFIG_MICREL_PHY=y
- CONFIG_INPUT_EVDEV=y
- CONFIG_INPUT_TOUCHSCREEN=y
-@@ -84,14 +91,22 @@ CONFIG_SERIAL_8250_DW=y
- CONFIG_I2C=y
- CONFIG_I2C_CHARDEV=y
- CONFIG_I2C_DESIGNWARE_PLATFORM=y
-+CONFIG_SPI=y
-+CONFIG_SPI_DESIGNWARE=y
-+CONFIG_SPI_DW_MMIO=y
-+CONFIG_SPI_SPIDEV=y
- CONFIG_GPIOLIB=y
- CONFIG_GPIO_SYSFS=y
-+CONFIG_GPIO_ALTERA=y
- CONFIG_GPIO_DWAPB=y
-+CONFIG_GPIO_ALTERA_A10SR=y
-+CONFIG_SENSORS_MAX1619=y
- CONFIG_PMBUS=y
- CONFIG_SENSORS_LTC2978=y
- CONFIG_SENSORS_LTC2978_REGULATOR=y
- CONFIG_WATCHDOG=y
- CONFIG_DW_WATCHDOG=y
-+CONFIG_MFD_ALTERA_A10SR=y
- CONFIG_MFD_STMPE=y
- CONFIG_REGULATOR=y
- CONFIG_REGULATOR_FIXED_VOLTAGE=y
-@@ -102,6 +117,14 @@ CONFIG_NOP_USB_XCEIV=y
- CONFIG_USB_GADGET=y
- CONFIG_MMC=y
- CONFIG_MMC_DW=y
-+CONFIG_NEW_LEDS=y
-+CONFIG_LEDS_CLASS=y
-+CONFIG_LEDS_GPIO=y
-+CONFIG_LEDS_TRIGGERS=y
-+CONFIG_LEDS_TRIGGER_TIMER=y
-+CONFIG_LEDS_TRIGGER_CPU=y
-+CONFIG_RTC_CLASS=y
-+CONFIG_RTC_DRV_DS1307=y
- CONFIG_DMADEVICES=y
- CONFIG_PL330_DMA=y
- CONFIG_DMATEST=m
-@@ -121,9 +144,10 @@ CONFIG_VFAT_FS=y
- CONFIG_NTFS_FS=y
- CONFIG_NTFS_RW=y
- CONFIG_TMPFS=y
--CONFIG_CONFIGFS_FS=y
-+CONFIG_JFFS2_FS=y
- CONFIG_NFS_FS=y
- CONFIG_NFS_V3_ACL=y
-+CONFIG_NFS_V4=y
- CONFIG_ROOT_NFS=y
- CONFIG_NFSD=y
- CONFIG_NFSD_V3_ACL=y
-@@ -135,5 +159,5 @@ CONFIG_DEBUG_INFO=y
- CONFIG_MAGIC_SYSRQ=y
- CONFIG_DETECT_HUNG_TASK=y
- # CONFIG_SCHED_DEBUG is not set
--CONFIG_ENABLE_DEFAULT_TRACERS=y
-+CONFIG_FUNCTION_TRACER=y
- CONFIG_DEBUG_USER=y
diff --git a/patches.socfpga/0085-ARM-socfpga-updates-for-socfpga_defconfig.patch b/patches.socfpga/0085-ARM-socfpga-updates-for-socfpga_defconfig.patch
deleted file mode 100644
index 022150af48be64..00000000000000
--- a/patches.socfpga/0085-ARM-socfpga-updates-for-socfpga_defconfig.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From 6dd0a8c7a2e167fd63ef04f038b0e1cbf6e33188 Mon Sep 17 00:00:00 2001
-From: Jia Jie Ho <ho.jia.jie@intel.com>
-Date: Thu, 16 Mar 2017 08:05:46 -0500
-Subject: [PATCH 085/103] ARM: socfpga: updates for socfpga_defconfig
-
-This patch enables Altera TSE support in socfpga_defconfig
-
-Signed-off-by: Jia Jie Ho <ho.jia.jie@intel.com>
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/configs/socfpga_defconfig |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/configs/socfpga_defconfig
-+++ b/arch/arm/configs/socfpga_defconfig
-@@ -71,6 +71,7 @@ CONFIG_SCSI=y
- CONFIG_BLK_DEV_SD=y
- # CONFIG_SCSI_LOWLEVEL is not set
- CONFIG_NETDEVICES=y
-+CONFIG_ALTERA_TSE=m
- CONFIG_E1000E=m
- CONFIG_IGB=m
- CONFIG_IXGBE=m
diff --git a/patches.socfpga/0086-ARM-dts-socfpga-Add-new-MCVEVK-manufacturer-compat.patch b/patches.socfpga/0086-ARM-dts-socfpga-Add-new-MCVEVK-manufacturer-compat.patch
deleted file mode 100644
index f5c7e4e37c8d4a..00000000000000
--- a/patches.socfpga/0086-ARM-dts-socfpga-Add-new-MCVEVK-manufacturer-compat.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 3bf20e590278aeae0493d36dead11207a5a3b6d7 Mon Sep 17 00:00:00 2001
-From: Marek Vasut <marex@denx.de>
-Date: Mon, 19 Sep 2016 21:40:43 +0000
-Subject: [PATCH 086/103] ARM: dts: socfpga: Add new MCVEVK manufacturer compat
-
-The board is now manufactured by Aries Embedded GmbH, update compat string.
-
-Signed-off-by: Marek Vasut <marex@denx.de>
-Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
----
- arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi   |    2 +-
- arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts |    2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
-@@ -18,7 +18,7 @@
- #include "socfpga_cyclone5.dtsi"
- 
- / {
--	model = "DENX MCV";
-+	model = "Aries/DENX MCV";
- 	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
- 
- 	memory {
---- a/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts
-@@ -18,7 +18,7 @@
- #include "socfpga_cyclone5_mcv.dtsi"
- 
- / {
--	model = "DENX MCV EVK";
-+	model = "Aries/DENX MCV EVK";
- 	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
- 
- 	aliases {
diff --git a/patches.socfpga/0087-ARM-dts-socfpga-Add-Macnica-sodia-board.patch b/patches.socfpga/0087-ARM-dts-socfpga-Add-Macnica-sodia-board.patch
deleted file mode 100644
index f004121699f14f..00000000000000
--- a/patches.socfpga/0087-ARM-dts-socfpga-Add-Macnica-sodia-board.patch
+++ /dev/null
@@ -1,162 +0,0 @@
-From 3cd00779ac5363f30cccb685ae6ca56990d363b1 Mon Sep 17 00:00:00 2001
-From: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-Date: Sat, 24 Sep 2016 23:59:45 +0000
-Subject: [PATCH 087/103] ARM: dts: socfpga: Add Macnica sodia board
-
-Add support for board based on the Altera Cyclone V SoC.
-This board has the following functions:
-    - 1 GiB of DRAM
-    - 1 Gigabit ethernet
-    - 1 SD card slot
-    - 1 USB gadget port
-    - QSPI NOR Flash
-    - I2C EEPROMs and I2C RTC
-    - DVI output
-    - Audio port
-
-This commit supports without QSPI, DVI and Audio.
-
-Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
----
- arch/arm/boot/dts/Makefile                   |    1 
- arch/arm/boot/dts/socfpga_cyclone5_sodia.dts |  123 +++++++++++++++++++++++++++
- 2 files changed, 124 insertions(+)
- create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -700,6 +700,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
- 	socfpga_cyclone5_de0_sockit.dtb \
- 	socfpga_cyclone5_sockit.dtb \
- 	socfpga_cyclone5_socrates.dtb \
-+	socfpga_cyclone5_sodia.dtb \
- 	socfpga_cyclone5_vining_fpga.dtb \
- 	socfpga_vt.dtb
- dtb-$(CONFIG_ARCH_SPEAR13XX) += \
---- /dev/null
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
-@@ -0,0 +1,123 @@
-+/*
-+ *  Copyright (C) 2016 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#include "socfpga_cyclone5.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+
-+/ {
-+	model = "Altera SOCFPGA Cyclone V SoC Macnica Sodia board";
-+	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
-+
-+	chosen {
-+		bootargs = "earlyprintk";
-+		stdout-path = "serial0:115200n8";
-+	};
-+
-+	memory {
-+		name = "memory";
-+		device_type = "memory";
-+		reg = <0x0 0x40000000>;
-+	};
-+
-+	aliases {
-+		ethernet0 = &gmac1;
-+	};
-+
-+	regulator_3_3v: 3-3-v-regulator {
-+		compatible = "regulator-fixed";
-+		regulator-name = "3.3V";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+	};
-+
-+	leds: gpio-leds {
-+		compatible = "gpio-leds";
-+
-+		hps_led0 {
-+			label = "hps:green:led0";
-+			gpios = <&portb 12 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		hps_led1 {
-+			label = "hps:green:led1";
-+			gpios = <&portb 13 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		hps_led2 {
-+			label = "hps:green:led2";
-+			gpios = <&portb 14 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		hps_led3 {
-+			label = "hps:green:led3";
-+			gpios = <&portb 15 GPIO_ACTIVE_LOW>;
-+		};
-+	};
-+};
-+
-+&gmac1 {
-+	status = "okay";
-+	phy-mode = "rgmii";
-+	phy = <&phy0>;
-+
-+	mdio0 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		phy0: ethernet-phy@0 {
-+			reg = <0>;
-+			rxd0-skew-ps = <0>;
-+			rxd1-skew-ps = <0>;
-+			rxd2-skew-ps = <0>;
-+			rxd3-skew-ps = <0>;
-+			rxdv-skew-ps = <0>;
-+			rxc-skew-ps = <3000>;
-+			txen-skew-ps = <0>;
-+			txc-skew-ps = <3000>;
-+		};
-+	};
-+};
-+
-+&gpio1 {
-+	status = "okay";
-+};
-+
-+&i2c0 {
-+	status = "okay";
-+
-+	eeprom@51 {
-+		compatible = "atmel,24c32";
-+		reg = <0x51>;
-+		pagesize = <32>;
-+	};
-+
-+	rtc@68 {
-+		compatible = "dallas,ds1339";
-+		reg = <0x68>;
-+	};
-+};
-+
-+&mmc0 {
-+	cd-gpios = <&portb 18 0>;
-+	vmmc-supply = <&regulator_3_3v>;
-+	vqmmc-supply = <&regulator_3_3v>;
-+	status = "okay";
-+};
-+
-+&usb1 {
-+	status = "okay";
-+};
diff --git a/patches.socfpga/0088-ARM-dts-socfpga-add-specific-compatible-strings-for-.patch b/patches.socfpga/0088-ARM-dts-socfpga-add-specific-compatible-strings-for-.patch
deleted file mode 100644
index 4a87d3bbb77c85..00000000000000
--- a/patches.socfpga/0088-ARM-dts-socfpga-add-specific-compatible-strings-for-.patch
+++ /dev/null
@@ -1,89 +0,0 @@
-From d5b1b034ae10a0fcbd24a3af638558c93e17ca4a Mon Sep 17 00:00:00 2001
-From: Dinh Nguyen <dinguyen@kernel.org>
-Date: Tue, 1 Nov 2016 09:57:06 -0500
-Subject: [PATCH 088/103] ARM: dts: socfpga: add specific compatible strings
- for boards
-
-Add a more specific board compatible entry for all of the SOCFPGA
-Cyclone 5 based boards.
-
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
-v3: Be a bit more specific with the c5 dk and sockit, use
-    "altr,socfpga-cyclone5-socdk" and "terasic,socfpga-cyclone5-sockit"
-v2: remove extra space and add a comma between compatible entries
----
- arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts  |    2 +-
- arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts      |    2 +-
- arch/arm/boot/dts/socfpga_cyclone5_socdk.dts       |    2 +-
- arch/arm/boot/dts/socfpga_cyclone5_sockit.dts      |    2 +-
- arch/arm/boot/dts/socfpga_cyclone5_sodia.dts       |    2 +-
- arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts |    2 +-
- 6 files changed, 6 insertions(+), 6 deletions(-)
-
---- a/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
-@@ -18,7 +18,7 @@
- 
- / {
- 	model = "Terasic DE-0(Atlas)";
--	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
-+	compatible = "terasic,de0-atlas", "altr,socfpga-cyclone5", "altr,socfpga";
- 
- 	chosen {
- 		bootargs = "earlyprintk";
---- a/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts
-@@ -19,7 +19,7 @@
- 
- / {
- 	model = "Aries/DENX MCV EVK";
--	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
-+	compatible = "denx,mcvevk", "altr,socfpga-cyclone5", "altr,socfpga";
- 
- 	aliases {
- 		ethernet0 = &gmac0;
---- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
-@@ -19,7 +19,7 @@
- 
- / {
- 	model = "Altera SOCFPGA Cyclone V SoC Development Kit";
--	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
-+	compatible = "altr,socfpga-cyclone5-socdk", "altr,socfpga-cyclone5", "altr,socfpga";
- 
- 	chosen {
- 		bootargs = "earlyprintk";
---- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
-@@ -19,7 +19,7 @@
- 
- / {
- 	model = "Terasic SoCkit";
--	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
-+	compatible = "terasic,socfpga-cyclone5-sockit", "altr,socfpga-cyclone5", "altr,socfpga";
- 
- 	chosen {
- 		bootargs = "earlyprintk";
---- a/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
-@@ -21,7 +21,7 @@
- 
- / {
- 	model = "Altera SOCFPGA Cyclone V SoC Macnica Sodia board";
--	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
-+	compatible = "macnica,sodia", "altr,socfpga-cyclone5", "altr,socfpga";
- 
- 	chosen {
- 		bootargs = "earlyprintk";
---- a/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
-@@ -51,7 +51,7 @@
- 
- / {
- 	model = "samtec VIN|ING FPGA";
--	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
-+	compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
- 
- 	chosen {
- 		bootargs = "console=ttyS0,115200";
diff --git a/patches.socfpga/0089-ARM-dts-socfpga-Add-unit-name-to-memory-nodes.patch b/patches.socfpga/0089-ARM-dts-socfpga-Add-unit-name-to-memory-nodes.patch
deleted file mode 100644
index c89c1521defa55..00000000000000
--- a/patches.socfpga/0089-ARM-dts-socfpga-Add-unit-name-to-memory-nodes.patch
+++ /dev/null
@@ -1,138 +0,0 @@
-From 053c4886aa63bf59091841b2a7635ce14921fb37 Mon Sep 17 00:00:00 2001
-From: Florian Vaussard <florian.vaussard@gmail.com>
-Date: Mon, 27 Feb 2017 10:38:39 -0600
-Subject: [PATCH 089/103] ARM: dts: socfpga: Add unit name to memory nodes
-
-Memory nodes in Arria5, Cyclone5 and Arria10 do not have a unit name.
-This will trigger several warnings like this one (when compiled with
-W=1):
-
-Node /memory has a reg or ranges property, but no unit name
-
-Add the corresponding unit name to each node.
-
-Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/boot/dts/socfpga_arria10_socdk.dtsi       |    2 +-
- arch/arm/boot/dts/socfpga_arria5_socdk.dts         |    2 +-
- arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts  |    2 +-
- arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi        |    2 +-
- arch/arm/boot/dts/socfpga_cyclone5_socdk.dts       |    2 +-
- arch/arm/boot/dts/socfpga_cyclone5_sockit.dts      |    2 +-
- arch/arm/boot/dts/socfpga_cyclone5_socrates.dts    |    2 +-
- arch/arm/boot/dts/socfpga_cyclone5_sodia.dts       |    2 +-
- arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts |    2 +-
- arch/arm/boot/dts/socfpga_vt.dts                   |    2 +-
- 10 files changed, 10 insertions(+), 10 deletions(-)
-
---- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
-@@ -30,7 +30,7 @@
- 		stdout-path = "serial0:115200n8";
- 	};
- 
--	memory {
-+	memory@0 {
- 		name = "memory";
- 		device_type = "memory";
- 		reg = <0x0 0x40000000>; /* 1GB */
---- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts
-+++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
-@@ -26,7 +26,7 @@
- 		stdout-path = "serial0:115200n8";
- 	};
- 
--	memory {
-+	memory@0 {
- 		name = "memory";
- 		device_type = "memory";
- 		reg = <0x0 0x40000000>; /* 1GB */
---- a/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
-@@ -25,7 +25,7 @@
- 		stdout-path = "serial0:115200n8";
- 	};
- 
--	memory {
-+	memory@0 {
- 		name = "memory";
- 		device_type = "memory";
- 		reg = <0x0 0x40000000>; /* 1GB */
---- a/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
-@@ -21,7 +21,7 @@
- 	model = "Aries/DENX MCV";
- 	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
- 
--	memory {
-+	memory@0 {
- 		name = "memory";
- 		device_type = "memory";
- 		reg = <0x0 0x40000000>; /* 1 GiB */
---- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
-@@ -26,7 +26,7 @@
- 		stdout-path = "serial0:115200n8";
- 	};
- 
--	memory {
-+	memory@0 {
- 		name = "memory";
- 		device_type = "memory";
- 		reg = <0x0 0x40000000>; /* 1GB */
---- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
-@@ -26,7 +26,7 @@
- 		stdout-path = "serial0:115200n8";
- 	};
- 
--	memory {
-+	memory@0 {
- 		name = "memory";
- 		device_type = "memory";
- 		reg = <0x0 0x40000000>; /* 1GB */
---- a/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
-@@ -25,7 +25,7 @@
- 		bootargs = "console=ttyS0,115200";
- 	};
- 
--	memory {
-+	memory@0 {
- 		name = "memory";
- 		device_type = "memory";
- 		reg = <0x0 0x40000000>; /* 1GB */
---- a/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
-@@ -28,7 +28,7 @@
- 		stdout-path = "serial0:115200n8";
- 	};
- 
--	memory {
-+	memory@0 {
- 		name = "memory";
- 		device_type = "memory";
- 		reg = <0x0 0x40000000>;
---- a/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
-@@ -57,7 +57,7 @@
- 		bootargs = "console=ttyS0,115200";
- 	};
- 
--	memory {
-+	memory@0 {
- 		name = "memory";
- 		device_type = "memory";
- 		reg = <0x0 0x40000000>; /* 1GB */
---- a/arch/arm/boot/dts/socfpga_vt.dts
-+++ b/arch/arm/boot/dts/socfpga_vt.dts
-@@ -26,7 +26,7 @@
- 		bootargs = "console=ttyS0,57600";
- 	};
- 
--	memory {
-+	memory@0 {
- 		name = "memory";
- 		device_type = "memory";
- 		reg = <0x0 0x40000000>; /* 1 GB */
diff --git a/patches.socfpga/0090-ARM-dts-socfpga-sodia-enable-qspi.patch b/patches.socfpga/0090-ARM-dts-socfpga-sodia-enable-qspi.patch
deleted file mode 100644
index 9d3cdf35d287ad..00000000000000
--- a/patches.socfpga/0090-ARM-dts-socfpga-sodia-enable-qspi.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From d59a294e24214c1d45314e38eac346256973f389 Mon Sep 17 00:00:00 2001
-From: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-Date: Fri, 10 Feb 2017 11:21:33 -0600
-Subject: [PATCH 090/103] ARM: dts: socfpga: sodia: enable qspi
-
-Enable the qspi controller on sodia board and add the flash chip
-(n25q512a).
-
-Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
- arch/arm/boot/dts/socfpga_cyclone5_sodia.dts |   21 +++++++++++++++++++++
- 1 file changed, 21 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
-+++ b/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
-@@ -121,3 +121,24 @@
- &usb1 {
- 	status = "okay";
- };
-+
-+&qspi {
-+        status = "okay";
-+
-+        flash0: n25q512a@0 {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "n25q512a";
-+		reg = <0>;
-+		spi-max-frequency = <100000000>;
-+
-+		m25p,fast-read;
-+		cdns,page-size = <256>;
-+		cdns,block-size = <16>;
-+		cdns,read-delay = <4>;
-+		cdns,tshsl-ns = <50>;
-+		cdns,tsd2d-ns = <50>;
-+		cdns,tchsh-ns = <4>;
-+		cdns,tslch-ns = <4>;
-+	};
-+};
diff --git a/patches.socfpga/0091-ARM-dts-socfpga-add-qspi-node.patch b/patches.socfpga/0091-ARM-dts-socfpga-add-qspi-node.patch
deleted file mode 100644
index f07477c406f3a7..00000000000000
--- a/patches.socfpga/0091-ARM-dts-socfpga-add-qspi-node.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 5420a09156d6bc2cb61aad87b1277c6c9e3ba788 Mon Sep 17 00:00:00 2001
-From: Steffen Trumtrar <s.trumtrar@pengutronix.de>
-Date: Tue, 18 Oct 2016 07:43:02 +0000
-Subject: [PATCH 091/103] ARM: dts: socfpga: add qspi node
-
-Add the qspi node to the socfpga dtsi file.
-
-Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
-Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
----
- arch/arm/boot/dts/socfpga.dtsi |   14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
---- a/arch/arm/boot/dts/socfpga.dtsi
-+++ b/arch/arm/boot/dts/socfpga.dtsi
-@@ -733,6 +733,20 @@
- 			reg = <0xffff0000 0x10000>;
- 		};
- 
-+		qspi: spi@ff705000 {
-+			compatible = "cdns,qspi-nor";
-+                        #address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <0xff705000 0x1000>,
-+			      <0xffa00000 0x1000>;
-+			interrupts = <0 151 4>;
-+			cdns,fifo-depth = <128>;
-+			cdns,fifo-width = <4>;
-+			cdns,trigger-address = <0x00000000>;
-+			clocks = <&qspi_clk>;
-+			status = "disabled";
-+		};
-+
- 		rst: rstmgr@ffd05000 {
- 			#reset-cells = <1>;
- 			compatible = "altr,rst-mgr";
diff --git a/patches.socfpga/0092-fpga-pr-ip-Core-driver-support-for-Altera-Partial-Re.patch b/patches.socfpga/0092-fpga-pr-ip-Core-driver-support-for-Altera-Partial-Re.patch
deleted file mode 100644
index 6d6a33500d45b9..00000000000000
--- a/patches.socfpga/0092-fpga-pr-ip-Core-driver-support-for-Altera-Partial-Re.patch
+++ /dev/null
@@ -1,302 +0,0 @@
-From dee4f9e2e4dd5ee90ad2910be5546ff32f42aa55 Mon Sep 17 00:00:00 2001
-From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
-Date: Thu, 23 Mar 2017 19:34:28 -0500
-Subject: [PATCH 092/103] fpga pr ip: Core driver support for Altera Partial
- Reconfiguration IP.
-
-Adding the core functions necessary for a fpga-mgr driver
-for the Altera Partial IP component.  It is intended for
-these functions to be used by the various bus implementations
-like the platform bus or the PCIe bus.
-
-Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
-Acked-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/Kconfig                   |    5 
- drivers/fpga/Makefile                  |    1 
- drivers/fpga/altera-pr-ip-core.c       |  220 +++++++++++++++++++++++++++++++++
- include/linux/fpga/altera-pr-ip-core.h |   29 ++++
- 4 files changed, 255 insertions(+)
- create mode 100644 drivers/fpga/altera-pr-ip-core.c
- create mode 100644 include/linux/fpga/altera-pr-ip-core.h
-
---- a/drivers/fpga/Kconfig
-+++ b/drivers/fpga/Kconfig
-@@ -83,6 +83,11 @@ config ALTERA_FREEZE_BRIDGE
- 	  isolate one region of the FPGA from the busses while that
- 	  region is being reprogrammed.
- 
-+config ALTERA_PR_IP_CORE
-+        tristate "Altera Partial Reconfiguration IP Core"
-+        help
-+          Core driver support for Altera Partial Reconfiguration IP component
-+
- endif # FPGA
- 
- endmenu
---- a/drivers/fpga/Makefile
-+++ b/drivers/fpga/Makefile
-@@ -12,6 +12,7 @@ obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10)	+= so
- obj-$(CONFIG_FPGA_MGR_TS73XX)		+= ts73xx-fpga.o
- obj-$(CONFIG_FPGA_MGR_XILINX_SPI)	+= xilinx-spi.o
- obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)	+= zynq-fpga.o
-+obj-$(CONFIG_ALTERA_PR_IP_CORE)         += altera-pr-ip-core.o
- 
- # FPGA Bridge Drivers
- obj-$(CONFIG_FPGA_BRIDGE)		+= fpga-bridge.o
---- /dev/null
-+++ b/drivers/fpga/altera-pr-ip-core.c
-@@ -0,0 +1,220 @@
-+/*
-+ * Driver for Altera Partial Reconfiguration IP Core
-+ *
-+ * Copyright (C) 2016-2017 Intel Corporation
-+ *
-+ * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation
-+ *  by Alan Tull <atull@opensource.altera.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+#include <linux/delay.h>
-+#include <linux/fpga/altera-pr-ip-core.h>
-+#include <linux/fpga/fpga-mgr.h>
-+#include <linux/module.h>
-+
-+#define ALT_PR_DATA_OFST		0x00
-+#define ALT_PR_CSR_OFST			0x04
-+
-+#define ALT_PR_CSR_PR_START		BIT(0)
-+#define ALT_PR_CSR_STATUS_SFT		2
-+#define ALT_PR_CSR_STATUS_MSK		(7 << ALT_PR_CSR_STATUS_SFT)
-+#define ALT_PR_CSR_STATUS_NRESET	(0 << ALT_PR_CSR_STATUS_SFT)
-+#define ALT_PR_CSR_STATUS_PR_ERR	(1 << ALT_PR_CSR_STATUS_SFT)
-+#define ALT_PR_CSR_STATUS_CRC_ERR	(2 << ALT_PR_CSR_STATUS_SFT)
-+#define ALT_PR_CSR_STATUS_BAD_BITS	(3 << ALT_PR_CSR_STATUS_SFT)
-+#define ALT_PR_CSR_STATUS_PR_IN_PROG	(4 << ALT_PR_CSR_STATUS_SFT)
-+#define ALT_PR_CSR_STATUS_PR_SUCCESS	(5 << ALT_PR_CSR_STATUS_SFT)
-+
-+struct alt_pr_priv {
-+	void __iomem *reg_base;
-+};
-+
-+static enum fpga_mgr_states alt_pr_fpga_state(struct fpga_manager *mgr)
-+{
-+	struct alt_pr_priv *priv = mgr->priv;
-+	const char *err = "unknown";
-+	enum fpga_mgr_states ret = FPGA_MGR_STATE_UNKNOWN;
-+	u32 val;
-+
-+	val = readl(priv->reg_base + ALT_PR_CSR_OFST);
-+
-+	val &= ALT_PR_CSR_STATUS_MSK;
-+
-+	switch (val) {
-+	case ALT_PR_CSR_STATUS_NRESET:
-+		return FPGA_MGR_STATE_RESET;
-+
-+	case ALT_PR_CSR_STATUS_PR_ERR:
-+		err = "pr error";
-+		ret = FPGA_MGR_STATE_WRITE_ERR;
-+		break;
-+
-+	case ALT_PR_CSR_STATUS_CRC_ERR:
-+		err = "crc error";
-+		ret = FPGA_MGR_STATE_WRITE_ERR;
-+		break;
-+
-+	case ALT_PR_CSR_STATUS_BAD_BITS:
-+		err = "bad bits";
-+		ret = FPGA_MGR_STATE_WRITE_ERR;
-+		break;
-+
-+	case ALT_PR_CSR_STATUS_PR_IN_PROG:
-+		return FPGA_MGR_STATE_WRITE;
-+
-+	case ALT_PR_CSR_STATUS_PR_SUCCESS:
-+		return FPGA_MGR_STATE_OPERATING;
-+
-+	default:
-+		break;
-+	}
-+
-+	dev_err(&mgr->dev, "encountered error code %d (%s) in %s()\n",
-+		val, err, __func__);
-+	return ret;
-+}
-+
-+static int alt_pr_fpga_write_init(struct fpga_manager *mgr,
-+				  struct fpga_image_info *info,
-+				  const char *buf, size_t count)
-+{
-+	struct alt_pr_priv *priv = mgr->priv;
-+	u32 val;
-+
-+	if (!(info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
-+		dev_err(&mgr->dev, "%s Partial Reconfiguration flag not set\n",
-+			__func__);
-+		return -EINVAL;
-+	}
-+
-+	val = readl(priv->reg_base + ALT_PR_CSR_OFST);
-+
-+	if (val & ALT_PR_CSR_PR_START) {
-+		dev_err(&mgr->dev,
-+			"%s Partial Reconfiguration already started\n",
-+		       __func__);
-+		return -EINVAL;
-+	}
-+
-+	writel(val | ALT_PR_CSR_PR_START, priv->reg_base + ALT_PR_CSR_OFST);
-+
-+	return 0;
-+}
-+
-+static int alt_pr_fpga_write(struct fpga_manager *mgr, const char *buf,
-+			     size_t count)
-+{
-+	struct alt_pr_priv *priv = mgr->priv;
-+	u32 *buffer_32 = (u32 *)buf;
-+	size_t i = 0;
-+
-+	if (count <= 0)
-+		return -EINVAL;
-+
-+	/* Write out the complete 32-bit chunks */
-+	while (count >= sizeof(u32)) {
-+		writel(buffer_32[i++], priv->reg_base);
-+		count -= sizeof(u32);
-+	}
-+
-+	/* Write out remaining non 32-bit chunks */
-+	switch (count) {
-+	case 3:
-+		writel(buffer_32[i++] & 0x00ffffff, priv->reg_base);
-+		break;
-+	case 2:
-+		writel(buffer_32[i++] & 0x0000ffff, priv->reg_base);
-+		break;
-+	case 1:
-+		writel(buffer_32[i++] & 0x000000ff, priv->reg_base);
-+		break;
-+	case 0:
-+		break;
-+	default:
-+		/* This will never happen */
-+		return -EFAULT;
-+	}
-+
-+	if (alt_pr_fpga_state(mgr) == FPGA_MGR_STATE_WRITE_ERR)
-+		return -EIO;
-+
-+	return 0;
-+}
-+
-+static int alt_pr_fpga_write_complete(struct fpga_manager *mgr,
-+				      struct fpga_image_info *info)
-+{
-+	u32 i = 0;
-+
-+	do {
-+		switch (alt_pr_fpga_state(mgr)) {
-+		case FPGA_MGR_STATE_WRITE_ERR:
-+			return -EIO;
-+
-+		case FPGA_MGR_STATE_OPERATING:
-+			dev_info(&mgr->dev,
-+				 "successful partial reconfiguration\n");
-+			return 0;
-+
-+		default:
-+			break;
-+		}
-+		udelay(1);
-+	} while (info->config_complete_timeout_us > i++);
-+
-+	dev_err(&mgr->dev, "timed out waiting for write to complete\n");
-+	return -ETIMEDOUT;
-+}
-+
-+static const struct fpga_manager_ops alt_pr_ops = {
-+	.state = alt_pr_fpga_state,
-+	.write_init = alt_pr_fpga_write_init,
-+	.write = alt_pr_fpga_write,
-+	.write_complete = alt_pr_fpga_write_complete,
-+};
-+
-+int alt_pr_register(struct device *dev, void __iomem *reg_base)
-+{
-+	struct alt_pr_priv *priv;
-+	u32 val;
-+
-+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	priv->reg_base = reg_base;
-+
-+	val = readl(priv->reg_base + ALT_PR_CSR_OFST);
-+
-+	dev_dbg(dev, "%s status=%d start=%d\n", __func__,
-+		(val & ALT_PR_CSR_STATUS_MSK) >> ALT_PR_CSR_STATUS_SFT,
-+		(int)(val & ALT_PR_CSR_PR_START));
-+
-+	return fpga_mgr_register(dev, dev_name(dev), &alt_pr_ops, priv);
-+}
-+EXPORT_SYMBOL_GPL(alt_pr_register);
-+
-+int alt_pr_unregister(struct device *dev)
-+{
-+	dev_dbg(dev, "%s\n", __func__);
-+
-+	fpga_mgr_unregister(dev);
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL_GPL(alt_pr_unregister);
-+
-+MODULE_AUTHOR("Matthew Gerlach <matthew.gerlach@linux.intel.com>");
-+MODULE_DESCRIPTION("Altera Partial Reconfiguration IP Core");
-+MODULE_LICENSE("GPL v2");
---- /dev/null
-+++ b/include/linux/fpga/altera-pr-ip-core.h
-@@ -0,0 +1,29 @@
-+/*
-+ * Driver for Altera Partial Reconfiguration IP Core
-+ *
-+ * Copyright (C) 2016 Intel Corporation
-+ *
-+ * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation
-+ *  by Alan Tull <atull@opensource.altera.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef _ALT_PR_IP_CORE_H
-+#define _ALT_PR_IP_CORE_H
-+#include <linux/io.h>
-+
-+int alt_pr_register(struct device *dev, void __iomem *reg_base);
-+int alt_pr_unregister(struct device *dev);
-+
-+#endif /* _ALT_PR_IP_CORE_H */
diff --git a/patches.socfpga/0093-fpga-dt-bindings-for-Altera-Partial-Reconfiguration-.patch b/patches.socfpga/0093-fpga-dt-bindings-for-Altera-Partial-Reconfiguration-.patch
deleted file mode 100644
index b394e1eb58125a..00000000000000
--- a/patches.socfpga/0093-fpga-dt-bindings-for-Altera-Partial-Reconfiguration-.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 4d9e84bcd82101758a0c21563d7740c1be578631 Mon Sep 17 00:00:00 2001
-From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
-Date: Thu, 23 Mar 2017 19:34:29 -0500
-Subject: [PATCH 093/103] fpga dt: bindings for Altera Partial Reconfiguration
- IP.
-
-Device Tree bindings for Altera Partial Reconfiguration IP.
-
-Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Acked-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- Documentation/devicetree/bindings/fpga/altera-pr-ip.txt |   12 ++++++++++++
- 1 file changed, 12 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
-@@ -0,0 +1,12 @@
-+Altera Arria10 Partial Reconfiguration IP
-+
-+Required properties:
-+- compatible : should contain "altr,a10-pr-ip"
-+- reg        : base address and size for memory mapped io.
-+
-+Example:
-+
-+	fpga_mgr: fpga-mgr@ff20c000 {
-+		compatible = "altr,a10-pr-ip";
-+		reg = <0xff20c000 0x10>;
-+	};
diff --git a/patches.socfpga/0094-fpga-pr-ip-Platform-driver-for-Altera-Partial-Reconf.patch b/patches.socfpga/0094-fpga-pr-ip-Platform-driver-for-Altera-Partial-Reconf.patch
deleted file mode 100644
index 0a1454748fe7de..00000000000000
--- a/patches.socfpga/0094-fpga-pr-ip-Platform-driver-for-Altera-Partial-Reconf.patch
+++ /dev/null
@@ -1,116 +0,0 @@
-From 78ffcb1fd105ec0289d496df641c391d87e3c773 Mon Sep 17 00:00:00 2001
-From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
-Date: Thu, 23 Mar 2017 19:34:30 -0500
-Subject: [PATCH 094/103] fpga pr ip: Platform driver for Altera Partial
- Reconfiguration IP.
-
-This adds a platform bus driver for a fpga-mgr driver
-that uses the Altera Partial Reconfiguration IP component.
-
-Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
-Acked-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/Kconfig                  |    7 +++
- drivers/fpga/Makefile                 |    1 
- drivers/fpga/altera-pr-ip-core-plat.c |   68 ++++++++++++++++++++++++++++++++++
- 3 files changed, 76 insertions(+)
- create mode 100644 drivers/fpga/altera-pr-ip-core-plat.c
-
---- a/drivers/fpga/Kconfig
-+++ b/drivers/fpga/Kconfig
-@@ -88,6 +88,13 @@ config ALTERA_PR_IP_CORE
-         help
-           Core driver support for Altera Partial Reconfiguration IP component
- 
-+config ALTERA_PR_IP_CORE_PLAT
-+	tristate "Platform support of Altera Partial Reconfiguration IP Core"
-+	depends on ALTERA_PR_IP_CORE && OF && HAS_IOMEM
-+	help
-+	  Platform driver support for Altera Partial Reconfiguration IP
-+	  component
-+
- endif # FPGA
- 
- endmenu
---- a/drivers/fpga/Makefile
-+++ b/drivers/fpga/Makefile
-@@ -13,6 +13,7 @@ obj-$(CONFIG_FPGA_MGR_TS73XX)		+= ts73xx
- obj-$(CONFIG_FPGA_MGR_XILINX_SPI)	+= xilinx-spi.o
- obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)	+= zynq-fpga.o
- obj-$(CONFIG_ALTERA_PR_IP_CORE)         += altera-pr-ip-core.o
-+obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT)    += altera-pr-ip-core-plat.o
- 
- # FPGA Bridge Drivers
- obj-$(CONFIG_FPGA_BRIDGE)		+= fpga-bridge.o
---- /dev/null
-+++ b/drivers/fpga/altera-pr-ip-core-plat.c
-@@ -0,0 +1,68 @@
-+/*
-+ * Driver for Altera Partial Reconfiguration IP Core
-+ *
-+ * Copyright (C) 2016-2017 Intel Corporation
-+ *
-+ * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation
-+ *  by Alan Tull <atull@opensource.altera.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+#include <linux/fpga/altera-pr-ip-core.h>
-+#include <linux/module.h>
-+#include <linux/of_device.h>
-+
-+static int alt_pr_platform_probe(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+	void __iomem *reg_base;
-+	struct resource *res;
-+
-+	/* First mmio base is for register access */
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+
-+	reg_base = devm_ioremap_resource(dev, res);
-+
-+	if (IS_ERR(reg_base))
-+		return PTR_ERR(reg_base);
-+
-+	return alt_pr_register(dev, reg_base);
-+}
-+
-+static int alt_pr_platform_remove(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+
-+	return alt_pr_unregister(dev);
-+}
-+
-+static const struct of_device_id alt_pr_of_match[] = {
-+	{ .compatible = "altr,a10-pr-ip", },
-+	{},
-+};
-+
-+MODULE_DEVICE_TABLE(of, alt_pr_of_match);
-+
-+static struct platform_driver alt_pr_platform_driver = {
-+	.probe = alt_pr_platform_probe,
-+	.remove = alt_pr_platform_remove,
-+	.driver = {
-+		.name	= "alt_a10_pr_ip",
-+		.of_match_table = alt_pr_of_match,
-+	},
-+};
-+
-+module_platform_driver(alt_pr_platform_driver);
-+MODULE_AUTHOR("Matthew Gerlach <matthew.gerlach@linux.intel.com>");
-+MODULE_DESCRIPTION("Altera Partial Reconfiguration IP Platform Driver");
-+MODULE_LICENSE("GPL v2");
diff --git a/patches.socfpga/0095-fpga-Add-support-for-Xilinx-LogiCORE-PR-Decoupler.patch b/patches.socfpga/0095-fpga-Add-support-for-Xilinx-LogiCORE-PR-Decoupler.patch
deleted file mode 100644
index 496db77680c4af..00000000000000
--- a/patches.socfpga/0095-fpga-Add-support-for-Xilinx-LogiCORE-PR-Decoupler.patch
+++ /dev/null
@@ -1,219 +0,0 @@
-From f978b7b1a45263dc1cfc46e6e0df91c608764910 Mon Sep 17 00:00:00 2001
-From: Moritz Fischer <mdf@kernel.org>
-Date: Fri, 24 Mar 2017 10:33:21 -0500
-Subject: [PATCH 095/103] fpga: Add support for Xilinx LogiCORE PR Decoupler
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This adds support for the Xilinx LogiCORE PR Decoupler
-soft-ip that does decoupling of PR regions in the FPGA
-fabric during partial reconfiguration.
-
-Signed-off-by: Moritz Fischer <mdf@kernel.org>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Cc: Sören Brinkmann <soren.brinkmann@xilinx.com>
-Cc: linux-kernel@vger.kernel.org
-Cc: devicetree@vger.kernel.org
-Acked-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/Kconfig               |   10 ++
- drivers/fpga/Makefile              |    1 
- drivers/fpga/xilinx-pr-decoupler.c |  161 +++++++++++++++++++++++++++++++++++++
- 3 files changed, 172 insertions(+)
- create mode 100644 drivers/fpga/xilinx-pr-decoupler.c
-
---- a/drivers/fpga/Kconfig
-+++ b/drivers/fpga/Kconfig
-@@ -95,6 +95,16 @@ config ALTERA_PR_IP_CORE_PLAT
- 	  Platform driver support for Altera Partial Reconfiguration IP
- 	  component
- 
-+config XILINX_PR_DECOUPLER
-+	tristate "Xilinx LogiCORE PR Decoupler"
-+	depends on FPGA_BRIDGE
-+	depends on HAS_IOMEM
-+	help
-+	  Say Y to enable drivers for Xilinx LogiCORE PR Decoupler.
-+	  The PR Decoupler exists in the FPGA fabric to isolate one
-+	  region of the FPGA from the busses while that region is
-+	  being reprogrammed during partial reconfig.
-+
- endif # FPGA
- 
- endmenu
---- a/drivers/fpga/Makefile
-+++ b/drivers/fpga/Makefile
-@@ -19,6 +19,7 @@ obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT)
- obj-$(CONFIG_FPGA_BRIDGE)		+= fpga-bridge.o
- obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE)	+= altera-hps2fpga.o altera-fpga2sdram.o
- obj-$(CONFIG_ALTERA_FREEZE_BRIDGE)	+= altera-freeze-bridge.o
-+obj-$(CONFIG_XILINX_PR_DECOUPLER)	+= xilinx-pr-decoupler.o
- 
- # High Level Interfaces
- obj-$(CONFIG_FPGA_REGION)		+= fpga-region.o
---- /dev/null
-+++ b/drivers/fpga/xilinx-pr-decoupler.c
-@@ -0,0 +1,161 @@
-+/*
-+ * Copyright (c) 2017, National Instruments Corp.
-+ * Copyright (c) 2017, Xilix Inc
-+ *
-+ * FPGA Bridge Driver for the Xilinx LogiCORE Partial Reconfiguration
-+ * Decoupler IP Core.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/io.h>
-+#include <linux/kernel.h>
-+#include <linux/of_device.h>
-+#include <linux/module.h>
-+#include <linux/fpga/fpga-bridge.h>
-+
-+#define CTRL_CMD_DECOUPLE	BIT(0)
-+#define CTRL_CMD_COUPLE		0
-+#define CTRL_OFFSET		0
-+
-+struct xlnx_pr_decoupler_data {
-+	void __iomem *io_base;
-+	struct clk *clk;
-+};
-+
-+static inline void xlnx_pr_decoupler_write(struct xlnx_pr_decoupler_data *d,
-+					   u32 offset, u32 val)
-+{
-+	writel(val, d->io_base + offset);
-+}
-+
-+static inline u32 xlnx_pr_decouple_read(const struct xlnx_pr_decoupler_data *d,
-+					u32 offset)
-+{
-+	return readl(d->io_base + offset);
-+}
-+
-+static int xlnx_pr_decoupler_enable_set(struct fpga_bridge *bridge, bool enable)
-+{
-+	int err;
-+	struct xlnx_pr_decoupler_data *priv = bridge->priv;
-+
-+	err = clk_enable(priv->clk);
-+	if (err)
-+		return err;
-+
-+	if (enable)
-+		xlnx_pr_decoupler_write(priv, CTRL_OFFSET, CTRL_CMD_COUPLE);
-+	else
-+		xlnx_pr_decoupler_write(priv, CTRL_OFFSET, CTRL_CMD_DECOUPLE);
-+
-+	clk_disable(priv->clk);
-+
-+	return 0;
-+}
-+
-+static int xlnx_pr_decoupler_enable_show(struct fpga_bridge *bridge)
-+{
-+	const struct xlnx_pr_decoupler_data *priv = bridge->priv;
-+	u32 status;
-+	int err;
-+
-+	err = clk_enable(priv->clk);
-+	if (err)
-+		return err;
-+
-+	status = readl(priv->io_base);
-+
-+	clk_disable(priv->clk);
-+
-+	return !status;
-+}
-+
-+static struct fpga_bridge_ops xlnx_pr_decoupler_br_ops = {
-+	.enable_set = xlnx_pr_decoupler_enable_set,
-+	.enable_show = xlnx_pr_decoupler_enable_show,
-+};
-+
-+static const struct of_device_id xlnx_pr_decoupler_of_match[] = {
-+	{ .compatible = "xlnx,pr-decoupler-1.00", },
-+	{ .compatible = "xlnx,pr-decoupler", },
-+	{},
-+};
-+MODULE_DEVICE_TABLE(of, xlnx_pr_decoupler_of_match);
-+
-+static int xlnx_pr_decoupler_probe(struct platform_device *pdev)
-+{
-+	struct xlnx_pr_decoupler_data *priv;
-+	int err;
-+	struct resource *res;
-+
-+	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	priv->io_base = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(priv->io_base))
-+		return PTR_ERR(priv->io_base);
-+
-+	priv->clk = devm_clk_get(&pdev->dev, "aclk");
-+	if (IS_ERR(priv->clk)) {
-+		dev_err(&pdev->dev, "input clock not found\n");
-+		return PTR_ERR(priv->clk);
-+	}
-+
-+	err = clk_prepare_enable(priv->clk);
-+	if (err) {
-+		dev_err(&pdev->dev, "unable to enable clock\n");
-+		return err;
-+	}
-+
-+	clk_disable(priv->clk);
-+
-+	err = fpga_bridge_register(&pdev->dev, "Xilinx PR Decoupler",
-+				   &xlnx_pr_decoupler_br_ops, priv);
-+
-+	if (err) {
-+		dev_err(&pdev->dev, "unable to register Xilinx PR Decoupler");
-+		clk_unprepare(priv->clk);
-+		return err;
-+	}
-+
-+	return 0;
-+}
-+
-+static int xlnx_pr_decoupler_remove(struct platform_device *pdev)
-+{
-+	struct fpga_bridge *bridge = platform_get_drvdata(pdev);
-+	struct xlnx_pr_decoupler_data *p = bridge->priv;
-+
-+	fpga_bridge_unregister(&pdev->dev);
-+
-+	clk_unprepare(p->clk);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver xlnx_pr_decoupler_driver = {
-+	.probe = xlnx_pr_decoupler_probe,
-+	.remove = xlnx_pr_decoupler_remove,
-+	.driver = {
-+		.name = "xlnx_pr_decoupler",
-+		.of_match_table = of_match_ptr(xlnx_pr_decoupler_of_match),
-+	},
-+};
-+
-+module_platform_driver(xlnx_pr_decoupler_driver);
-+
-+MODULE_DESCRIPTION("Xilinx Partial Reconfiguration Decoupler");
-+MODULE_AUTHOR("Moritz Fischer <mdf@kernel.org>");
-+MODULE_AUTHOR("Michal Simek <michal.simek@xilinx.com>");
-+MODULE_LICENSE("GPL v2");
diff --git a/patches.socfpga/0096-fpga-altera-hps2fpga-disable-unprepare-clock-on-erro.patch b/patches.socfpga/0096-fpga-altera-hps2fpga-disable-unprepare-clock-on-erro.patch
deleted file mode 100644
index d117a939a23417..00000000000000
--- a/patches.socfpga/0096-fpga-altera-hps2fpga-disable-unprepare-clock-on-erro.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From fa2e7c7a675e9523bd558009e966661e0ba50ddd Mon Sep 17 00:00:00 2001
-From: Tobias Klauser <tklauser@distanz.ch>
-Date: Mon, 24 Apr 2017 16:34:20 -0500
-Subject: [PATCH 096/103] fpga altera-hps2fpga: disable/unprepare clock on
- error in alt_fpga_bridge_probe()
-
-If either _alt_hps2fpga_enable_set() or fpga_bridge_register() fail in
-alt_fpga_bridge_probe(), the clock remains enabled and prepared. Also,
-in the error path for _alt_hps2fpga_enable_set() a call to
-fpga_bridge_unregister() is made even though the bridge was not
-registered yet.
-
-Remove the unnecessary call to fpga_bridge_unregister() and call
-clk_disable_unprepare() in both error paths in order to make sure the
-clock gets properly disabled and unprepared.
-
-Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
-Acked-by: Moritz Fischer <mdf@kernel.org>
-Signed-off-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/altera-hps2fpga.c |   15 +++++++++------
- 1 file changed, 9 insertions(+), 6 deletions(-)
-
---- a/drivers/fpga/altera-hps2fpga.c
-+++ b/drivers/fpga/altera-hps2fpga.c
-@@ -181,15 +181,18 @@ static int alt_fpga_bridge_probe(struct
- 				 (enable ? "enabling" : "disabling"));
- 
- 			ret = _alt_hps2fpga_enable_set(priv, enable);
--			if (ret) {
--				fpga_bridge_unregister(&pdev->dev);
--				return ret;
--			}
-+			if (ret)
-+				goto err;
- 		}
- 	}
- 
--	return fpga_bridge_register(dev, priv->name, &altera_hps2fpga_br_ops,
--				    priv);
-+	ret = fpga_bridge_register(dev, priv->name, &altera_hps2fpga_br_ops,
-+				   priv);
-+err:
-+	if (ret)
-+		clk_disable_unprepare(priv->clk);
-+
-+	return ret;
- }
- 
- static int alt_fpga_bridge_remove(struct platform_device *pdev)
diff --git a/patches.socfpga/0097-fpga-region-release-FPGA-region-reference-in-error-p.patch b/patches.socfpga/0097-fpga-region-release-FPGA-region-reference-in-error-p.patch
deleted file mode 100644
index 44666661629fe3..00000000000000
--- a/patches.socfpga/0097-fpga-region-release-FPGA-region-reference-in-error-p.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From d5363219287e11386f82638a6bd4ad78a8ba7071 Mon Sep 17 00:00:00 2001
-From: Tobias Klauser <tklauser@distanz.ch>
-Date: Mon, 24 Apr 2017 16:34:21 -0500
-Subject: [PATCH 097/103] fpga: region: release FPGA region reference in error
- path
-
-If fpga_region_get_manager() fails in fpga_region_program_fpga(), a
-reference to the fpga_manager instance previously acquired through
-fpga_region_get() is retained. Make sure to properly release it in the
-error case by using a separate jump label which will call
-fpga_region_put() in before returning.
-
-Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
-Acked-by: Moritz Fischer <mdf@kernel.org>
-Signed-off-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/fpga-region.c |    4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
---- a/drivers/fpga/fpga-region.c
-+++ b/drivers/fpga/fpga-region.c
-@@ -245,7 +245,8 @@ static int fpga_region_program_fpga(stru
- 	mgr = fpga_region_get_manager(region);
- 	if (IS_ERR(mgr)) {
- 		pr_err("failed to get fpga region manager\n");
--		return PTR_ERR(mgr);
-+		ret = PTR_ERR(mgr);
-+		goto err_put_region;
- 	}
- 
- 	ret = fpga_region_get_bridges(region, overlay);
-@@ -281,6 +282,7 @@ err_put_br:
- 	fpga_bridges_put(&region->bridge_list);
- err_put_mgr:
- 	fpga_mgr_put(mgr);
-+err_put_region:
- 	fpga_region_put(region);
- 
- 	return ret;
diff --git a/patches.socfpga/0098-fpga-fr-br-update-supported-version-numbers.patch b/patches.socfpga/0098-fpga-fr-br-update-supported-version-numbers.patch
deleted file mode 100644
index 13a32098d13b87..00000000000000
--- a/patches.socfpga/0098-fpga-fr-br-update-supported-version-numbers.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From 1ac2b755e3a514fb74fbe7574042364c97a8e572 Mon Sep 17 00:00:00 2001
-From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
-Date: Mon, 24 Apr 2017 16:34:22 -0500
-Subject: [PATCH 098/103] fpga fr br: update supported version numbers
-
-The value in the version register of the altera freeze bridge
-controller changed from the beta value of 2 to the
-value of 0xad000003 in the official release of the IP.
-This patch supports the old and new version numbers, and the
-driver's probe function will fail if neither of the supported
-versions is found.
-
-Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
-Reviewed-by: Moritz Fischer <mdf@kernel.org>
-Signed-off-by: Alan Tull <atull@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/fpga/altera-freeze-bridge.c |   30 +++++++++++++++++++-----------
- 1 file changed, 19 insertions(+), 11 deletions(-)
-
---- a/drivers/fpga/altera-freeze-bridge.c
-+++ b/drivers/fpga/altera-freeze-bridge.c
-@@ -28,6 +28,7 @@
- #define FREEZE_CSR_REG_VERSION			12
- 
- #define FREEZE_CSR_SUPPORTED_VERSION		2
-+#define FREEZE_CSR_OFFICIAL_VERSION		0xad000003
- 
- #define FREEZE_CSR_STATUS_FREEZE_REQ_DONE	BIT(0)
- #define FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE	BIT(1)
-@@ -218,6 +219,7 @@ static int altera_freeze_br_probe(struct
- {
- 	struct device *dev = &pdev->dev;
- 	struct device_node *np = pdev->dev.of_node;
-+	void __iomem *base_addr;
- 	struct altera_freeze_br_data *priv;
- 	struct resource *res;
- 	u32 status, revision;
-@@ -225,26 +227,32 @@ static int altera_freeze_br_probe(struct
- 	if (!np)
- 		return -ENODEV;
- 
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	base_addr = devm_ioremap_resource(dev, res);
-+	if (IS_ERR(base_addr))
-+		return PTR_ERR(base_addr);
-+
-+	revision = readl(base_addr + FREEZE_CSR_REG_VERSION);
-+	if ((revision != FREEZE_CSR_SUPPORTED_VERSION) &&
-+	    (revision != FREEZE_CSR_OFFICIAL_VERSION)) {
-+		dev_err(dev,
-+			"%s unexpected revision 0x%x != 0x%x != 0x%x\n",
-+			__func__, revision, FREEZE_CSR_SUPPORTED_VERSION,
-+			FREEZE_CSR_OFFICIAL_VERSION);
-+		return -EINVAL;
-+	}
-+
- 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- 	if (!priv)
- 		return -ENOMEM;
- 
- 	priv->dev = dev;
- 
--	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	priv->base_addr = devm_ioremap_resource(dev, res);
--	if (IS_ERR(priv->base_addr))
--		return PTR_ERR(priv->base_addr);
--
--	status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET);
-+	status = readl(base_addr + FREEZE_CSR_STATUS_OFFSET);
- 	if (status & FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE)
- 		priv->enable = 1;
- 
--	revision = readl(priv->base_addr + FREEZE_CSR_REG_VERSION);
--	if (revision != FREEZE_CSR_SUPPORTED_VERSION)
--		dev_warn(dev,
--			 "%s Freeze Controller unexpected revision %d != %d\n",
--			 __func__, revision, FREEZE_CSR_SUPPORTED_VERSION);
-+	priv->base_addr = base_addr;
- 
- 	return fpga_bridge_register(dev, FREEZE_BRIDGE_NAME,
- 				    &altera_freeze_br_br_ops, priv);
diff --git a/patches.socfpga/0099-ARM-dts-socfpga-Add-NAND-device-tree-for-Arria10.patch b/patches.socfpga/0099-ARM-dts-socfpga-Add-NAND-device-tree-for-Arria10.patch
deleted file mode 100644
index b0255ad6c9108b..00000000000000
--- a/patches.socfpga/0099-ARM-dts-socfpga-Add-NAND-device-tree-for-Arria10.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From 969f7218e1e460db033b6c1c04300a47c0cab279 Mon Sep 17 00:00:00 2001
-From: Graham Moore <grmoore@opensource.altera.com>
-Date: Tue, 7 Jul 2015 09:58:36 -0500
-Subject: [PATCH 099/103] ARM: dts: socfpga: Add NAND device tree for Arria10
-
-Add socfpga_arria10_socdk_nand.dts board file for supporting NAND.
-
-Signed-off-by: Graham Moore <grmoore@opensource.altera.com>
-Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
----
-v2: move nand dts node to socfpga_arria10.dtsi
----
- arch/arm/boot/dts/Makefile                       |    1 
- arch/arm/boot/dts/socfpga_arria10.dtsi           |   13 +++++++++
- arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts |   31 +++++++++++++++++++++++
- 3 files changed, 45 insertions(+)
- create mode 100644 arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -693,6 +693,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
- 	sh73a0-kzm9g.dtb
- dtb-$(CONFIG_ARCH_SOCFPGA) += \
- 	socfpga_arria5_socdk.dtb \
-+	socfpga_arria10_socdk_nand.dtb \
- 	socfpga_arria10_socdk_qspi.dtb \
- 	socfpga_arria10_socdk_sdmmc.dtb \
- 	socfpga_cyclone5_mcvevk.dtb \
---- a/arch/arm/boot/dts/socfpga_arria10.dtsi
-+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
-@@ -631,6 +631,19 @@
- 			status = "disabled";
- 		};
- 
-+		nand: nand@ffb90000 {
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+			compatible = "denali,denali-nand-dt", "altr,socfpga-denali-nand";
-+			reg = <0xffb90000 0x72000>,
-+			      <0xffb80000 0x10000>;
-+			reg-names = "nand_data", "denali_reg";
-+			interrupts = <0 99 4>;
-+			dma-mask = <0xffffffff>;
-+			clocks = <&nand_clk>;
-+			status = "disabled";
-+		};
-+
- 		ocram: sram@ffe00000 {
- 			compatible = "mmio-sram";
- 			reg = <0xffe00000 0x40000>;
---- /dev/null
-+++ b/arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts
-@@ -0,0 +1,31 @@
-+/*
-+ * Copyright (C) 2015 Altera Corporation. All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+/dts-v1/;
-+#include "socfpga_arria10_socdk.dtsi"
-+
-+&nand {
-+	status = "okay";
-+
-+	partition@nand-boot {
-+		label = "Boot and fpga data";
-+		reg = <0x0 0x1C00000>;
-+	};
-+	partition@nand-rootfs {
-+		label = "Root Filesystem - JFFS2";
-+		reg = <0x1C00000 0x6400000>;
-+	};
-+};
diff --git a/patches.socfpga/0100-dt-bindings-reset-Add-reset-manager-offsets-for-Stra.patch b/patches.socfpga/0100-dt-bindings-reset-Add-reset-manager-offsets-for-Stra.patch
deleted file mode 100644
index 899840650b03c2..00000000000000
--- a/patches.socfpga/0100-dt-bindings-reset-Add-reset-manager-offsets-for-Stra.patch
+++ /dev/null
@@ -1,127 +0,0 @@
-From 5cfbeefdedaa7850b4e4cd121df2352947af0556 Mon Sep 17 00:00:00 2001
-From: Richard Gong <richard.gong@intel.com>
-Date: Thu, 1 Jun 2017 09:23:59 -0500
-Subject: [PATCH 100/103] dt-bindings: reset: Add reset manager offsets for
- Stratix10
-
-There are several changes in reset manager offsets from Arria10 to
-Stratix10. This patch is based on one from Arria10 and adds offset
-updates for Stratix10
-
-Signed-off-by: Richard Gong <richard.gong@intel.com>
----
- include/dt-bindings/reset/altr,rst-mgr-s10.h |  108 +++++++++++++++++++++++++++
- 1 file changed, 108 insertions(+)
- create mode 100644 include/dt-bindings/reset/altr,rst-mgr-s10.h
-
---- /dev/null
-+++ b/include/dt-bindings/reset/altr,rst-mgr-s10.h
-@@ -0,0 +1,108 @@
-+/*
-+ * Copyright (C) 2016 Intel Corporation. All rights reserved
-+ * Copyright (C) 2016 Altera Corporation. All rights reserved
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * derived from Steffen Trumtrar's "altr,rst-mgr-a10.h"
-+ */
-+
-+#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_S10_H
-+#define _DT_BINDINGS_RESET_ALTR_RST_MGR_S10_H
-+
-+/* MPUMODRST */
-+#define CPU0_RESET		0
-+#define CPU1_RESET		1
-+#define CPU2_RESET		2
-+#define CPU3_RESET		3
-+
-+/* PER0MODRST */
-+#define EMAC0_RESET		32
-+#define EMAC1_RESET		33
-+#define EMAC2_RESET		34
-+#define USB0_RESET		35
-+#define USB1_RESET		36
-+#define NAND_RESET		37
-+/* 38 is empty */
-+#define SDMMC_RESET		39
-+#define EMAC0_OCP_RESET		40
-+#define EMAC1_OCP_RESET		41
-+#define EMAC2_OCP_RESET		42
-+#define USB0_OCP_RESET		43
-+#define USB1_OCP_RESET		44
-+#define NAND_OCP_RESET		45
-+/* 46 is empty */
-+#define SDMMC_OCP_RESET		47
-+#define DMA_RESET		48
-+#define SPIM0_RESET		49
-+#define SPIM1_RESET		50
-+#define SPIS0_RESET		51
-+#define SPIS1_RESET		52
-+#define DMA_OCP_RESET		53
-+#define EMAC_PTP_RESET		54
-+/* 55 is empty*/
-+#define DMAIF0_RESET		56
-+#define DMAIF1_RESET		57
-+#define DMAIF2_RESET		58
-+#define DMAIF3_RESET		59
-+#define DMAIF4_RESET		60
-+#define DMAIF5_RESET		61
-+#define DMAIF6_RESET		62
-+#define DMAIF7_RESET		63
-+
-+/* PER1MODRST */
-+#define WATCHDOG0_RESET		64
-+#define WATCHDOG1_RESET		65
-+#define WATCHDOG2_RESET		66
-+#define WATCHDOG3_RESET		67
-+#define L4SYSTIMER0_RESET	68
-+#define L4SYSTIMER1_RESET	69
-+#define SPTIMER0_RESET		70
-+#define SPTIMER1_RESET		71
-+#define I2C0_RESET		72
-+#define I2C1_RESET		73
-+#define I2C2_RESET		74
-+#define I2C3_RESET		75
-+#define I2C4_RESET		76
-+/* 77-79 is empty */
-+#define UART0_RESET		80
-+#define UART1_RESET		81
-+/* 82-87 is empty */
-+#define GPIO0_RESET		88
-+#define GPIO1_RESET		89
-+
-+/* BRGMODRST */
-+#define SOC2FPGA_RESET		96
-+#define LWHPS2FPGA_RESET	97
-+#define FPGA2SOC_RESET		98
-+#define F2SSDRAM0_RESET		99
-+#define F2SSDRAM1_RESET		100
-+#define F2SSDRAM2_RESET		101
-+#define DDRSCH_RESET		102
-+
-+/* COLDMODRST */
-+#define CPUPO0_RESET		160
-+#define CPUPO1_RESET		161
-+#define CPUPO2_RESET		162
-+#define CPUPO3_RESET		163
-+/* 164-167 is empty */
-+#define L2_RESET		168
-+
-+/* DBGMODRST */
-+#define DBG_RESET		224
-+#define CSDAP_RESET		225
-+
-+/* TAPMODRST */
-+#define TAP_RESET		256
-+
-+#endif
diff --git a/patches.socfpga/0101-nios2-add-screen_info.patch b/patches.socfpga/0101-nios2-add-screen_info.patch
deleted file mode 100644
index 6e33cf1129ccb3..00000000000000
--- a/patches.socfpga/0101-nios2-add-screen_info.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From b3e0ba2525523283d68e8a8f7a464faf8662a632 Mon Sep 17 00:00:00 2001
-From: Ley Foon Tan <ley.foon.tan@intel.com>
-Date: Wed, 7 Dec 2016 15:44:19 +0800
-Subject: [PATCH 101/103] nios2: add screen_info
-
-Fix build error when enable VGA console.
-
-drivers/video/console/vgacon.c:586: undefined reference to `screen_info'
-
-Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
----
- arch/nios2/kernel/setup.c |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/nios2/kernel/setup.c
-+++ b/arch/nios2/kernel/setup.c
-@@ -18,6 +18,7 @@
- #include <linux/bootmem.h>
- #include <linux/initrd.h>
- #include <linux/of_fdt.h>
-+#include <linux/screen_info.h>
- 
- #include <asm/mmu_context.h>
- #include <asm/sections.h>
-@@ -36,6 +37,10 @@ static struct pt_regs fake_regs = { 0, 0
- 					0, 0, 0, 0, 0, 0,
- 					0};
- 
-+#ifdef CONFIG_VT
-+struct screen_info screen_info;
-+#endif
-+
- /* Copy a short hook instruction sequence to the exception address */
- static inline void copy_exception_handler(unsigned int addr)
- {
diff --git a/patches.socfpga/0102-nios2-switch-to-RAW_COPY_USER.patch b/patches.socfpga/0102-nios2-switch-to-RAW_COPY_USER.patch
deleted file mode 100644
index 09391d9a83682a..00000000000000
--- a/patches.socfpga/0102-nios2-switch-to-RAW_COPY_USER.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 0b5d6273491a3b5dc69b794b0e6c678884f68157 Mon Sep 17 00:00:00 2001
-From: Al Viro <viro@zeniv.linux.org.uk>
-Date: Wed, 22 Mar 2017 13:08:32 -0400
-Subject: [PATCH 102/103] nios2: switch to RAW_COPY_USER
-
-Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
----
- arch/nios2/Kconfig               |    1 +
- arch/nios2/include/asm/uaccess.h |   31 ++++++-------------------------
- arch/nios2/mm/uaccess.c          |   16 ++++++++--------
- 3 files changed, 15 insertions(+), 33 deletions(-)
-
---- a/arch/nios2/Kconfig
-+++ b/arch/nios2/Kconfig
-@@ -16,6 +16,7 @@ config NIOS2
- 	select SPARSE_IRQ
- 	select USB_ARCH_HAS_HCD if USB_SUPPORT
- 	select CPU_NO_EFFICIENT_FFS
-+	select ARCH_HAS_RAW_COPY_USER
- 
- config GENERIC_CSUM
- 	def_bool y
---- a/arch/nios2/include/asm/uaccess.h
-+++ b/arch/nios2/include/asm/uaccess.h
-@@ -95,36 +95,17 @@ static inline unsigned long __must_check
- 	return __clear_user(to, n);
- }
- 
--extern long __copy_from_user(void *to, const void __user *from,
--				unsigned long n);
--extern long __copy_to_user(void __user *to, const void *from, unsigned long n);
--
--static inline long copy_from_user(void *to, const void __user *from,
--				unsigned long n)
--{
--	unsigned long res = n;
--	if (access_ok(VERIFY_READ, from, n))
--		res = __copy_from_user(to, from, n);
--	if (unlikely(res))
--		memset(to + (n - res), 0, res);
--	return res;
--}
--
--static inline long copy_to_user(void __user *to, const void *from,
--				unsigned long n)
--{
--	if (!access_ok(VERIFY_WRITE, to, n))
--		return n;
--	return __copy_to_user(to, from, n);
--}
-+extern unsigned long
-+raw_copy_from_user(void *to, const void __user *from, unsigned long n);
-+extern unsigned long
-+raw_copy_to_user(void __user *to, const void *from, unsigned long n);
-+#define INLINE_COPY_FROM_USER
-+#define INLINE_COPY_TO_USER
- 
- extern long strncpy_from_user(char *__to, const char __user *__from,
- 				long __len);
- extern long strnlen_user(const char __user *s, long n);
- 
--#define __copy_from_user_inatomic	__copy_from_user
--#define __copy_to_user_inatomic		__copy_to_user
--
- /* Optimized macros */
- #define __get_user_asm(val, insn, addr, err)				\
- {									\
---- a/arch/nios2/mm/uaccess.c
-+++ b/arch/nios2/mm/uaccess.c
-@@ -10,9 +10,9 @@
- #include <linux/export.h>
- #include <linux/uaccess.h>
- 
--asm(".global	__copy_from_user\n"
--	"   .type __copy_from_user, @function\n"
--	"__copy_from_user:\n"
-+asm(".global	raw_copy_from_user\n"
-+	"   .type raw_copy_from_user, @function\n"
-+	"raw_copy_from_user:\n"
- 	"   movi  r2,7\n"
- 	"   mov   r3,r4\n"
- 	"   bge   r2,r6,1f\n"
-@@ -65,12 +65,12 @@ asm(".global	__copy_from_user\n"
- 	".word 7b,13b\n"
- 	".previous\n"
- 	);
--EXPORT_SYMBOL(__copy_from_user);
-+EXPORT_SYMBOL(raw_copy_from_user);
- 
- asm(
--	"   .global __copy_to_user\n"
--	"   .type __copy_to_user, @function\n"
--	"__copy_to_user:\n"
-+	"   .global raw_copy_to_user\n"
-+	"   .type raw_copy_to_user, @function\n"
-+	"raw_copy_to_user:\n"
- 	"   movi  r2,7\n"
- 	"   mov   r3,r4\n"
- 	"   bge   r2,r6,1f\n"
-@@ -127,7 +127,7 @@ asm(
- 	".word 11b,13b\n"
- 	".word 12b,13b\n"
- 	".previous\n");
--EXPORT_SYMBOL(__copy_to_user);
-+EXPORT_SYMBOL(raw_copy_to_user);
- 
- long strncpy_from_user(char *__to, const char __user *__from, long __len)
- {
diff --git a/patches.socfpga/0103-nios2-use-generic-strncpy_from_user-and-strnlen_user.patch b/patches.socfpga/0103-nios2-use-generic-strncpy_from_user-and-strnlen_user.patch
deleted file mode 100644
index 8701cfaacfbd3b..00000000000000
--- a/patches.socfpga/0103-nios2-use-generic-strncpy_from_user-and-strnlen_user.patch
+++ /dev/null
@@ -1,88 +0,0 @@
-From 1e114cbc9496ee8376e0ad899890a1eff7e58230 Mon Sep 17 00:00:00 2001
-From: Ley Foon Tan <ley.foon.tan@intel.com>
-Date: Mon, 8 May 2017 17:14:14 +0800
-Subject: [PATCH 103/103] nios2: use generic strncpy_from_user() and
- strnlen_user()
-
-This change enables the generic strncpy_from_user() and strnlen_user()
-
-Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
----
- arch/nios2/Kconfig               |    2 ++
- arch/nios2/include/asm/uaccess.h |    7 +++++--
- arch/nios2/mm/uaccess.c          |   33 ---------------------------------
- 3 files changed, 7 insertions(+), 35 deletions(-)
-
---- a/arch/nios2/Kconfig
-+++ b/arch/nios2/Kconfig
-@@ -6,6 +6,8 @@ config NIOS2
- 	select GENERIC_CPU_DEVICES
- 	select GENERIC_IRQ_PROBE
- 	select GENERIC_IRQ_SHOW
-+	select GENERIC_STRNCPY_FROM_USER
-+	select GENERIC_STRNLEN_USER
- 	select HAVE_ARCH_TRACEHOOK
- 	select HAVE_ARCH_KGDB
- 	select IRQ_DOMAIN
---- a/arch/nios2/include/asm/uaccess.h
-+++ b/arch/nios2/include/asm/uaccess.h
-@@ -64,6 +64,8 @@ extern int fixup_exception(struct pt_reg
- 
- # define __EX_TABLE_SECTION	".section __ex_table,\"a\"\n"
- 
-+#define user_addr_max() (uaccess_kernel() ? ~0UL : TASK_SIZE)
-+
- /*
-  * Zero Userspace
-  */
-@@ -103,8 +105,9 @@ raw_copy_to_user(void __user *to, const
- #define INLINE_COPY_TO_USER
- 
- extern long strncpy_from_user(char *__to, const char __user *__from,
--				long __len);
--extern long strnlen_user(const char __user *s, long n);
-+			      long __len);
-+extern __must_check long strlen_user(const char __user *str);
-+extern __must_check long strnlen_user(const char __user *s, long n);
- 
- /* Optimized macros */
- #define __get_user_asm(val, insn, addr, err)				\
---- a/arch/nios2/mm/uaccess.c
-+++ b/arch/nios2/mm/uaccess.c
-@@ -128,36 +128,3 @@ asm(
- 	".word 12b,13b\n"
- 	".previous\n");
- EXPORT_SYMBOL(raw_copy_to_user);
--
--long strncpy_from_user(char *__to, const char __user *__from, long __len)
--{
--	int l = strnlen_user(__from, __len);
--	int is_zt = 1;
--
--	if (l > __len) {
--		is_zt = 0;
--		l = __len;
--	}
--
--	if (l == 0 || copy_from_user(__to, __from, l))
--		return -EFAULT;
--
--	if (is_zt)
--		l--;
--	return l;
--}
--
--long strnlen_user(const char __user *s, long n)
--{
--	long i;
--
--	for (i = 0; i < n; i++) {
--		char c;
--
--		if (get_user(c, s + i) == -EFAULT)
--			return 0;
--		if (c == 0)
--			return i + 1;
--	}
--	return n + 1;
--}
diff --git a/series b/series
index cf7b909f15b2fb..51efefb250c5a3 100644
--- a/series
+++ b/series
@@ -17,926 +17,3 @@ patches.ltsi/ltsi-makefile-addition.patch
 #
 
 
-#############################################################################
-# Renesas patches
-#
-patches.renesas/0001-drm-bridge-adv7511-Add-Audio-support.patch
-patches.renesas/0002-drm-bridge-adv7511-Enable-the-audio-data-and-clock-p.patch
-patches.renesas/0003-media-cec-pass-parent-device-in-register-not-allocat.patch
-patches.renesas/0004-ASoC-rsnd-depends-on-OF.patch
-patches.renesas/0005-ASoC-rsnd-enable-COMPILE_TEST.patch
-patches.renesas/0006-arm64-dts-r8a7795-salvator-x-enable-UHS-for-SDHI-0-3.patch
-patches.renesas/0007-arm64-dts-r8a7796-salvator-x-Populate-EXTALR.patch
-patches.renesas/0008-arm64-dts-r8a7795-salvator-x-Add-DU-LVDS-output-endp.patch
-patches.renesas/0009-arm64-defconfig-Enable-DRM-DU-and-V4L2-FCP-VSP-modul.patch
-patches.renesas/0010-arm64-dts-r8a7795-Remove-FCP-SoC-specific-compatible.patch
-patches.renesas/0011-arm64-dts-r8a7796-add-SDHI-nodes.patch
-patches.renesas/0012-arm64-Enable-HIBERNATION-in-defconfig.patch
-patches.renesas/0013-Input-gpio_keys_polled-keep-button-data-constant.patch
-patches.renesas/0014-Input-gpio_keys-annotate-PM-methods-as-__maybe_unuse.patch
-patches.renesas/0015-Input-gpio_keys-fix-leaking-DT-node-references.patch
-patches.renesas/0016-Input-gpio_keys-switch-to-using-generic-device-prope.patch
-patches.renesas/0017-Input-gpio_keys-set-input-direction-explicitly.patch
-patches.renesas/0018-regulator-gpio-properly-check-return-value-of-of_get.patch
-patches.renesas/0019-i2c-rcar-Add-per-Generation-fallback-bindings.patch
-patches.renesas/0020-i2c-sh_mobile-Add-per-Generation-fallback-bindings.patch
-patches.renesas/0021-base-soc-Early-register-bus-when-needed.patch
-patches.renesas/0022-base-soc-Introduce-soc_device_match-interface.patch
-patches.renesas/0023-base-soc-Check-for-NULL-SoC-device-attributes.patch
-patches.renesas/0024-base-soc-Provide-a-dummy-implementation-of-soc_devic.patch
-patches.renesas/0025-ARM-shmobile-Document-DT-bindings-for-Product-Regist.patch
-patches.renesas/0026-soc-renesas-Identify-SoC-and-register-with-the-SoC-b.patch
-patches.renesas/0027-ARM-shmobile-r8a7743-add-power-domain-index-macros.patch
-patches.renesas/0028-soc-renesas-rcar-sysc-add-R8A7743-support.patch
-patches.renesas/0029-ARM-shmobile-r8a7745-add-power-domain-index-macros.patch
-patches.renesas/0030-soc-renesas-rcar-sysc-add-R8A7745-support.patch
-patches.renesas/0031-PCI-rcar-gen2-Use-gen2-fallback-compatibility-last.patch
-patches.renesas/0032-PCI-rcar-Use-gen2-fallback-compatibility-last.patch
-patches.renesas/0033-PCI-rcar-Add-gen3-fallback-compatibility-string-for-.patch
-patches.renesas/0034-net-phy-phy-drivers-should-not-set-SUPPORTED_-Asym_-.patch
-patches.renesas/0036-phy-rcar-gen3-usb2-add-sysfs-for-usb-role-swap.patch
-patches.renesas/0037-can-rcar_can-Add-r8a7796-support.patch
-patches.renesas/0038-can-rcar_canfd-Add-r8a7796-support.patch
-patches.renesas/0039-can-rcar_canfd-Correct-order-of-interrupt-specifiers.patch
-patches.renesas/0040-dmaengine-rcar-dmac-Document-R-Car-M3-W-bindings.patch
-patches.renesas/0041-drm-Add-reference-counting-to-drm_atomic_state.patch
-patches.renesas/0042-drm-define-drm_compat_ioctl-NULL-on-CONFIG_COMPAT-n-.patch
-patches.renesas/0043-drm-Make-the-connector-.detect-callback-optional.patch
-patches.renesas/0044-drm-rcar-du-Constify-node-argument-to-rcar_du_lvds_c.patch
-patches.renesas/0045-drm-rcar-du-Bring-HDMI-encoder-comments-in-line-with.patch
-patches.renesas/0046-drm-rcar-du-Remove-test-for-impossible-error-conditi.patch
-patches.renesas/0047-drm-rcar-du-Remove-memory-allocation-error-message.patch
-patches.renesas/0050-drm-rcar-du-Add-R8A7792-support.patch
-patches.renesas/0051-drm-rcar-du-Add-R8A7796-support.patch
-patches.renesas/0052-drm-rcar-du-Fix-dot-clock-routing-configuration.patch
-patches.renesas/0055-drm-rcar-du-Fix-LVDS-start-sequence-on-Gen3.patch
-patches.renesas/0056-dt-bindings-media-renesas-fcp-Remove-SoC-specific-co.patch
-patches.renesas/0057-media-v4l-rcar-fcp-Fix-module-autoload-for-OF-regist.patch
-patches.renesas/0058-reset-Add-renesas-rst-DT-bindings.patch
-patches.renesas/0059-soc-renesas-Add-R-Car-RST-driver.patch
-patches.renesas/0060-ASoC-rsnd-remove-duplicate-define-of-rsnd_dvc_of_nod.patch
-patches.renesas/0061-ASoC-rsnd-amend-.probe-.remove-call-for-DPCM.patch
-patches.renesas/0062-ASoC-rsnd-add-rsnd_mod_next-for-for_each_rsnd_mod_xx.patch
-patches.renesas/0063-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_dai_call.patch
-patches.renesas/0064-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_rdai_con.patch
-patches.renesas/0065-ASoC-rsnd-add-rsnd_parse_of_node-and-integrate-rsnd_.patch
-patches.renesas/0066-ASoC-rsnd-remove-non-DT-support-for-DMA.patch
-patches.renesas/0067-ASoC-rsnd-don-t-use-devm_request_irq-for-SSI.patch
-patches.renesas/0068-ASoC-rsnd-remove-rsnd_dma_detach.patch
-patches.renesas/0069-ASoC-rsnd-don-t-call-unneeded-of_node_put-on-dma.c.patch
-patches.renesas/0070-ASoC-rsnd-add-nolock_start-stop-callback.patch
-patches.renesas/0071-ASoC-rsnd-remove-Gen2-only-comment.patch
-patches.renesas/0072-ASoC-rsnd-rsnd_reg-cleanup-for-SSIU.patch
-patches.renesas/0073-ASoC-rsnd-fixup-SCU_SYS_STATUSx-access.patch
-patches.renesas/0074-ASoC-rsnd-clear-SSI_SYS_STATUSx-every-time.patch
-patches.renesas/0075-ASoC-rsnd-enable-SRC-sync-even-FIN-FOUT.patch
-patches.renesas/0076-ASoC-rsnd-use-BRGCKR-instead-of-SSICKR.patch
-patches.renesas/0077-ASoC-rsnd-Request-Release-DMA-channel-each-time.patch
-patches.renesas/0078-ASoC-rsnd-use-dma_sync_single_for_xxx-for-IOMMU.patch
-patches.renesas/0079-ASoC-rsnd-rsnd_get_dalign-needs-to-care-SSIU-not-SSI.patch
-patches.renesas/0080-ASoC-rsnd-tidyup-ssi-usrcnt-counter-check-in-hw_para.patch
-patches.renesas/0081-ASoC-rsnd-enable-disable-ADG-when-suspend-resume-tim.patch
-patches.renesas/0082-ASoC-rsnd-setup-BRGCKR-BRRA-BRRB-when-starting.patch
-patches.renesas/0084-spi-rspi-supports-32bytes-buffer-for-DUAL-and-QUAD.patch
-patches.renesas/0085-spi-rspi-avoid-uninitialized-variable-access.patch
-patches.renesas/0086-mmc-sh_mmcif-Document-r8a73a4-r8a7778-and-sh73a0-DT-.patch
-patches.renesas/0087-mmc-sh_mobile_sdhi-add-ocr_mask-option.patch
-patches.renesas/0088-mmc-tmio-mmc-add-support-for-32bit-data-port.patch
-patches.renesas/0089-mmc-sh_mobile_sdhi-Add-r7s72100-support.patch
-patches.renesas/0090-spi-sh-msiof-Add-support-for-R-Car-M3-W.patch
-patches.renesas/0091-spi-sh-msiof-Add-R-Car-Gen-2-and-3-fallback-bindings.patch
-patches.renesas/0092-spi-sh-msiof-Do-not-use-C-style-comment.patch
-patches.renesas/0093-pinctrl-sh-pfc-r8a7796-Add-I2C-pin-support.patch
-patches.renesas/0094-pinctrl-sh-pfc-r8a7796-Add-DRIF-support.patch
-patches.renesas/0095-pinctrl-sh-pfc-r8a7796-Fix-GPSR-definitions-for-SDHI.patch
-patches.renesas/0096-pinctrl-sh-pfc-r8a7796-Add-EtherAVB-pins-groups-and-.patch
-patches.renesas/0097-pinctrl-sh-pfc-r8a7796-Add-DU-support.patch
-patches.renesas/0098-pinctrl-sh-pfc-r8a7795-Simplify-get-bias-logic.patch
-patches.renesas/0099-pinctrl-sh-pfc-r8a7778-Use-lookup-function-for-bias-.patch
-patches.renesas/0100-pinctrl-sh-pfc-Support-named-pins-with-custom-config.patch
-patches.renesas/0101-pinctrl-sh-pfc-r8a7795-Support-none-GPIO-pins-with-c.patch
-patches.renesas/0102-pinctrl-sh-pfc-r8a7795-Add-group-for-AVB-MDIO-and-MI.patch
-patches.renesas/0103-pinctrl-sh-pfc-r8a7795-Add-group-for-QSPI0-and-QSPI1.patch
-patches.renesas/0104-serial-sh-sci-Fix-deadlock-caused-by-serial-output-r.patch
-patches.renesas/0105-ASoC-constify-snd_soc_ops-structures.patch
-patches.renesas/0106-ASoC-simple-scu-card-code-sync-follow-to-simple-fami.patch
-patches.renesas/0107-ASoC-simple-scu-card-code-sync-rename-asoc_simple_ca.patch
-patches.renesas/0108-ASoC-simple-scu-card-code-sync-tidyup-props-link-nam.patch
-patches.renesas/0109-usb-renesas_usbhs-cleanup-with-list_first_entry_or_n.patch
-patches.renesas/0110-media-v4l-vsp1-Add-support-for-capture-and-output-in.patch
-patches.renesas/0111-media-v4l-vsp1-Fix-module-autoload-for-OF-registrati.patch
-patches.renesas/0112-ASoC-wm8978-Adjust-clock-indices-so-that-simple-card.patch
-patches.renesas/0113-usb-host-xhci-rcar-add-a-new-firmware-version-for-r8.patch
-patches.renesas/0114-usb-host-xhci-plat-add-support-for-Renesas-r8a7796-S.patch
-patches.renesas/0115-sh_eth-fix-branch-prediction-in-sh_eth_interrupt.patch
-patches.renesas/0119-arm64-dts-r8a7796-salvator-x-enable-SDHI0-3.patch
-patches.renesas/0120-arm64-dts-r8a7796-salvator-x-enable-UHS-for-SDHI-0-3.patch
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-patches.renesas/0283-ARM-dts-rskrza1-add-rtc-DT-support.patch
-patches.renesas/0284-ARM-dts-genmai-Enable-rtc-and-rtc_x1-clock.patch
-patches.renesas/0285-ARM-dts-r8a7790-Drop-_clk-suffix-from-external-CAN-c.patch
-patches.renesas/0286-ARM-dts-r8a7791-Drop-_clk-suffix-from-external-CAN-c.patch
-
-patches.renesas/thermal-rcar_gen3_thermal-document-the-r-car-gen3.patch
-patches.renesas/thermal-rcar_gen3_thermal-add-r-car-gen3-thermal-driver.patch
-patches.renesas/thermal-rcar_gen3_thermal-add-delay-in-.thermal_init-on-r8a7796.patch
-patches.renesas/thermal-rcar_gen3_thermal-remove-unneeded-mutex.patch
-patches.renesas/thermal-rcar_gen3_thermal-check-that-tsc-exists-before-memory-allocation.patch
-patches.renesas/thermal-rcar_gen3_thermal-record-and-check-number-of-tscs-found.patch
-patches.renesas/thermal-rcar_gen3_thermal-enable-hardware-interrupts-for-trip-points.patch
-patches.renesas/thermal-rcar_gen3_thermal-store-device-match-data-in-private-structure.patch
-patches.renesas/thermal-rcar_gen3_thermal-add-suspend-and-resume-support.patch
-patches.renesas/usb-host-ehci-platform-fix-usb-1.1-device-is-not-connected-in-system-resume.patch
-patches.renesas/usb-of-add-functions-to-bind-a-companion-controller.patch
-patches.renesas/usb-host-ehci-platform-set-hcd-phy-to-avoid-phy_get-in-usb_add_hcd.patch
-patches.renesas/usb-host-ohci-platform-set-hcd-phy-to-avoid-phy_get-in-usb_add_hcd.patch
-patches.renesas/clk-cs2000-add-suspend-resume-feature.patch
-
-#############################################################################
-# SoCFPGA patches
-patches.socfpga/0001-ARM-dts-socfpga-enable-arm-shared-override-in-the-pl.patch
-patches.socfpga/0002-ARM-socfpga_defconfig-Enable-HIGHMEM.patch
-patches.socfpga/0003-ARM-dts-socfpga-enable-qspi-on-the-Cyclone5-devkit.patch
-patches.socfpga/0004-ARM-dts-socfpga-Add-QSPI-node-for-the-Arria10.patch
-patches.socfpga/0005-ARM-dts-socfpga-Enable-QSPI-in-Arria10-devkit.patch
-patches.socfpga/0006-ARM-dts-socfpga-Enable-QSPI-on-the-Cyclone5-sockit.patch
-patches.socfpga/0007-ARM-dts-socfpga-Enable-QSPI-on-the-Arria5-devkit.patch
-patches.socfpga/0008-ARM-socfpga_defconfig-enable-FS-configs-to-support-A.patch
-patches.socfpga/0009-dt-bindings-Add-Macnica-Americas-vendor-prefix.patch
-patches.socfpga/0010-dt-bindings-Add-vendor-prefix-for-Terasic-Inc.patch
-patches.socfpga/0011-dt-bindings-Add-vendor-prefix-for-Samtec.patch
-patches.socfpga/0012-ARM-dts-socfpga-enable-GPIO-and-LEDs-for-Cyclone5-an.patch
-patches.socfpga/0013-ARM-dts-socfpga-set-desired-i2c-clock-on-Cyclone5-an.patch
-patches.socfpga/0014-ARM-dts-socfpga-Add-Rohm-DH2228FV-DAC.patch
-patches.socfpga/0015-ARM-dts-socfpga-enable-CAN-on-Cyclone5-devkit.patch
-patches.socfpga/0016-ARM-dts-socfpga-enable-watchdog-timer-on-Arria5-and-.patch
-patches.socfpga/0017-ARM-dts-socfpga-add-the-LTC2977-power-monitor-on-Arr.patch
-patches.socfpga/0018-ARM-dts-socfpga-add-fpga-manager-node-for-Arria10.patch
-patches.socfpga/0019-ARM-dts-socfpga-fpga-manager-data-is-32-bits.patch
-patches.socfpga/0020-ARM-dts-socfpga-add-fpga-region-support-on-Arria10.patch
-patches.socfpga/0021-ARM-dts-socfpga-add-missing-compatible-string-for-SD.patch
-patches.socfpga/0022-ARM-dts-watchdog0-cannot-reliably-trigger-reset.patch
-patches.socfpga/0023-MAINTAINERS-socfpga-update-email-for-Dinh-Nguyen.patch
-patches.socfpga/0024-of-overlay-add-of-overlay-notifications.patch
-patches.socfpga/0025-fpga-add-method-to-get-fpga-manager-from-device.patch
-patches.socfpga/0026-doc-fpga-mgr-add-fpga-image-info-to-api.patch
-patches.socfpga/0027-fpga-add-bindings-document-for-fpga-region.patch
-patches.socfpga/0028-fpga-mgr-add-fpga-image-information-struct.patch
-patches.socfpga/0029-add-sysfs-document-for-fpga-bridge-class.patch
-patches.socfpga/0030-fpga-add-fpga-bridge-framework.patch
-patches.socfpga/0031-fpga-fpga-region-device-tree-control-for-FPGA.patch
-patches.socfpga/0032-ARM-socfpga-fpga-bridge-driver-support.patch
-patches.socfpga/0033-fpga-add-altera-freeze-bridge-support.patch
-patches.socfpga/0034-fpga-manager-Add-Socfpga-Arria10-support.patch
-patches.socfpga/0035-ARM-socfpga-checking-the-wrong-variable.patch
-patches.socfpga/0036-fpga-Add-COMPILE_TEST-to-all-drivers.patch
-patches.socfpga/0037-fpga-zynq-Add-missing-n-to-messages.patch
-patches.socfpga/0038-fpga-zynq-Remove-priv-dev.patch
-patches.socfpga/0039-fpga-zynq-Fix-incorrect-ISR-state-on-bootup.patch
-patches.socfpga/0040-fpga-Clarify-how-write_init-works-streaming-modes.patch
-patches.socfpga/0041-fpga-zynq-Check-for-errors-after-completing-DMA.patch
-patches.socfpga/0042-fpga-zynq-Check-the-bitstream-for-validity.patch
-patches.socfpga/0043-fpga-Add-scatterlist-based-programming.patch
-patches.socfpga/0044-fpga-zynq-Use-the-scatterlist-interface.patch
-patches.socfpga/0045-fpga-fix-sparse-warnings-in-fpga-mgr-and-fpga-bridge.patch
-patches.socfpga/0046-fpga-Add-flag-to-indicate-bitstream-needs-decrypting.patch
-patches.socfpga/0047-fpga-zynq-Add-support-for-encrypted-bitstreams.patch
-patches.socfpga/0048-fpga-region-Add-fpga-region-property-encrypted-fpga-.patch
-patches.socfpga/0049-FPGA-Add-TS-7300-FPGA-manager.patch
-patches.socfpga/0050-Documentation-Add-binding-document-for-Lattice-iCE40.patch
-patches.socfpga/0051-fpga-Add-support-for-Lattice-iCE40-FPGAs.patch
-patches.socfpga/0052-fpga-bridge-Replace-open-coded-list_for_each-list_en.patch
-patches.socfpga/0053-fpga-altera_freeze_bridge-Constify-ops.patch
-patches.socfpga/0054-dt-bindings-fpga-add-xilinx-slave-serial-binding-des.patch
-patches.socfpga/0055-fpga-manager-Add-Xilinx-slave-serial-SPI-driver.patch
-patches.socfpga/0056-ARM-socfpga-add-bindings-document-for-fpga-bridge-dr.patch
-patches.socfpga/0057-ARM-socfpga-add-bindings-doc-for-arria10-fpga-manage.patch
-patches.socfpga/0058-add-bindings-document-for-altera-freeze-bridge.patch
-patches.socfpga/0059-MAINTAINERS-add-git-url-for-fpga.patch
-patches.socfpga/0060-ARM-dts-socfpga-add-base-fpga-region-and-fpga-bridge.patch
-patches.socfpga/0061-fpga-add-config-complete-timeout.patch
-patches.socfpga/0062-MAINTAINERS-Add-file-patterns-for-fpga-device-tree-b.patch
-patches.socfpga/0063-MAINTAINERS-fpga-update-email-and-directory-paths.patch
-patches.socfpga/0064-spi-Add-Flag-to-Enable-Slave-Select-with-GPIO-Chip-S.patch
-patches.socfpga/0065-spi-dw-Set-GPIO_SS-flag-to-toggle-Slave-Select-on-GP.patch
-patches.socfpga/0066-ARM-dts-socfpga-Add-SPI-Master1-for-Arria10-SR-chip.patch
-patches.socfpga/0067-ARM-dts-socfpga-Add-Devkit-A10-SR-fields-for-Arria10.patch
-patches.socfpga/0068-ARM-dts-socfpga-Enable-GPIO-parent-for-Arria10-SR-ch.patch
-patches.socfpga/0069-ARM-dts-socfpga-Add-LED-framework-to-A10-SR-GPIO.patch
-patches.socfpga/0070-EDAC-altera-Disable-IRQs-while-injecting-SDRAM-error.patch
-patches.socfpga/0071-gpio-altera-a10sr-Add-A10-System-Resource-Chip-GPIO-.patch
-patches.socfpga/0072-dt-bindings-mfd-Add-Altera-Arria10-System-Resource-C.patch
-patches.socfpga/0073-ARM-dts-Add-EMAC-AXI-settings-for-Arria10.patch
-patches.socfpga/0074-MAINTAINERS-EDAC-Update-email-for-Thor-Thayer.patch
-patches.socfpga/0075-gpio-altera-a10sr-Set-gpio_chip-parent-property.patch
-patches.socfpga/0076-dt-bindings-reset-a10sr-Add-Arria10-SR-Reset-Control.patch
-patches.socfpga/0077-reset-Add-Altera-Arria10-SR-Reset-Controller.patch
-patches.socfpga/0078-ARM-dts-socfpga-Add-Devkit-A10-SR-Reset-Controller.patch
-patches.socfpga/0080-mfd-altr_a10sr-Add-Arria10-DevKit-Reset-Controller.patch
-patches.socfpga/0081-dt-bindings-mfd-Add-Altera-Arria10-SR-Reset-Controll.patch
-patches.socfpga/0082-ARM-socfpga-defconfig-enable-qspi.patch
-patches.socfpga/0083-ARM-socfpga-updates-for-socfpga_defconfig.patch
-patches.socfpga/0084-ARM-socfpga_defconfig-update-defconfig-for-SoCFPGA.patch
-patches.socfpga/0085-ARM-socfpga-updates-for-socfpga_defconfig.patch
-patches.socfpga/0086-ARM-dts-socfpga-Add-new-MCVEVK-manufacturer-compat.patch
-patches.socfpga/0087-ARM-dts-socfpga-Add-Macnica-sodia-board.patch
-patches.socfpga/0088-ARM-dts-socfpga-add-specific-compatible-strings-for-.patch
-patches.socfpga/0089-ARM-dts-socfpga-Add-unit-name-to-memory-nodes.patch
-patches.socfpga/0090-ARM-dts-socfpga-sodia-enable-qspi.patch
-patches.socfpga/0091-ARM-dts-socfpga-add-qspi-node.patch
-patches.socfpga/0092-fpga-pr-ip-Core-driver-support-for-Altera-Partial-Re.patch
-patches.socfpga/0093-fpga-dt-bindings-for-Altera-Partial-Reconfiguration-.patch
-patches.socfpga/0094-fpga-pr-ip-Platform-driver-for-Altera-Partial-Reconf.patch
-patches.socfpga/0095-fpga-Add-support-for-Xilinx-LogiCORE-PR-Decoupler.patch
-patches.socfpga/0096-fpga-altera-hps2fpga-disable-unprepare-clock-on-erro.patch
-patches.socfpga/0097-fpga-region-release-FPGA-region-reference-in-error-p.patch
-patches.socfpga/0098-fpga-fr-br-update-supported-version-numbers.patch
-patches.socfpga/0099-ARM-dts-socfpga-Add-NAND-device-tree-for-Arria10.patch
-patches.socfpga/0100-dt-bindings-reset-Add-reset-manager-offsets-for-Stra.patch
-patches.socfpga/0101-nios2-add-screen_info.patch
-patches.socfpga/0102-nios2-switch-to-RAW_COPY_USER.patch
-patches.socfpga/0103-nios2-use-generic-strncpy_from_user-and-strnlen_user.patch
-
-#############################################################################
-# Misc patches
-
-##############################################################################
-# fixes that go after all of the above
-#
-