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| author | Tarek BOCHKATI <tarek.bouchkati@gmail.com> | 2020-03-09 19:10:56 +0100 |
|---|---|---|
| committer | Tomas Vanek <vanekt@fbl.cz> | 2020-05-03 21:43:13 +0100 |
| commit | 880508f68fc58aa00ce5b7005e06221dba89c69e (patch) | |
| tree | 5c219047bc2a5e2f11765830ea726f9fc260c440 | |
| parent | f6cf18556420cd2d7fb747866392b118ec71c036 (diff) | |
| download | openocd-jz4730-880508f68fc58aa00ce5b7005e06221dba89c69e.tar.gz | |
flash/stm32l4x: always use stm32l4_get_flash_reg
this change is a preparation for STM32L5 support on top of L4 driver
STM32L5 flash is quite similar to L4 flash, mainly register names
and offsets and some bits are changed.
a table with register offset will be introduced, thus correct register
addresses will be obtained using this table and the driver internal
function 'stm32l4_get_flash_reg' will be responsible of this.
Change-Id: I74bf61a83fe53575623640af0328b3253ecc796f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5508
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Michael Jung <mijung@gmx.net>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
| -rw-r--r-- | src/flash/nor/stm32l4x.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c index 74fba35c1..38f8b3b99 100644 --- a/src/flash/nor/stm32l4x.c +++ b/src/flash/nor/stm32l4x.c @@ -671,7 +671,6 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count) { struct target *target = bank->target; - struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; uint32_t buffer_size; struct working_area *write_algorithm; struct working_area *source; @@ -727,8 +726,8 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer, buf_set_u32(reg_params[1].value, 0, 32, source->address + source->size); buf_set_u32(reg_params[2].value, 0, 32, address); buf_set_u32(reg_params[3].value, 0, 32, count); - buf_set_u32(reg_params[4].value, 0, 32, stm32l4_info->part_info->flash_regs_base + STM32_FLASH_SR); - buf_set_u32(reg_params[5].value, 0, 32, stm32l4_info->part_info->flash_regs_base + STM32_FLASH_CR); + buf_set_u32(reg_params[4].value, 0, 32, stm32l4_get_flash_reg(bank, STM32_FLASH_SR)); + buf_set_u32(reg_params[5].value, 0, 32, stm32l4_get_flash_reg(bank, STM32_FLASH_CR)); retval = target_run_flash_async_algorithm(target, buffer, count, 8, 0, NULL, @@ -1144,7 +1143,7 @@ static int stm32l4_mass_erase(struct flash_bank *bank) if (retval != ERROR_OK) goto err_lock; - retval = stm32l4_wait_status_busy(bank, FLASH_ERASE_TIMEOUT); + retval = stm32l4_wait_status_busy(bank, FLASH_ERASE_TIMEOUT); err_lock: retval2 = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_LOCK); |