diff options
author | dipen <dpatel@marvell.com> | 2012-08-24 16:47:12 -0400 |
---|---|---|
committer | Lubomir Rintel <lkundrak@v3.sk> | 2019-07-22 19:40:00 +0200 |
commit | 8481ec78b9d72432a4ec019db0bd9ffcea259716 (patch) | |
tree | 3bcf7aafe5d2532a537bc7d50188ece7dbc6dd90 | |
parent | e045066c74e97bcb0fdfbd5dc432fb5b6653686e (diff) | |
download | linux-mmp3-dell-ariel-8481ec78b9d72432a4ec019db0bd9ffcea259716.tar.gz |
QSEVEN: Create callback for platform specific USB Host initialization
not defined by EHCI Spec. Bits 31:30 of USB_PORTSC not defined
in EHCI Spec. These bits are used to select ULPI Mode for FSIC.
Signed-off-by: dipen <dpatel@marvell.com>
Signed-off-by: Kiran Vedere <kvedere@marvell.com>
-rw-r--r-- | arch/arm/mach-mmp/devices.c | 30 | ||||
-rw-r--r-- | arch/arm/mach-mmp/qseven.c | 1 | ||||
-rw-r--r-- | arch/arm/plat-pxa/include/plat/usb.h | 2 | ||||
-rw-r--r-- | drivers/usb/host/ehci-mv.c | 9 |
4 files changed, 25 insertions, 17 deletions
diff --git a/arch/arm/mach-mmp/devices.c b/arch/arm/mach-mmp/devices.c index 3689f13297a40b..c35e05d2863210 100644 --- a/arch/arm/mach-mmp/devices.c +++ b/arch/arm/mach-mmp/devices.c @@ -675,7 +675,7 @@ void mmp3_hsic_phy_deinit(unsigned int base) #ifdef CONFIG_USB_EHCI_PXA_U2H_FSIC #ifdef CONFIG_CPU_MMP3 -#define PORTSC 0x184 +#define PORTSC 0x084 int mmp3_ulpi_init(unsigned int base) { u32 val; @@ -693,25 +693,11 @@ int mmp3_ulpi_init(unsigned int base) val |= 1<<27; __raw_writel(val, base + FSIC_MISC); - /* select ULPI interface in SPH usb controller */ - pr_info(" select ULPI interface in SPH usb controller\n"); - val = __raw_readl(MMP3_FSIC_REGBASE + PORTSC); - val &= ~(0x3<<30); - val |= 2<<30; - val &= 0xfdffffff; - __raw_writel(val, MMP3_FSIC_REGBASE + PORTSC); - - /* switch back to ULPI clock (disable PMU 60MHz) - * after writing to PORTSC */ + /* Use ULPI clock (disable PMU 60MHz) */ val = __raw_readl(base + FSIC_CTRL); val &= ~(1<<8); __raw_writel(val, base + FSIC_CTRL); - pr_debug("%s FSIC_MISC 0x%x FSIC_CTRL 0x%x sph 0x%x portsc 0x%x\n", - __func__, __raw_readl(base + FSIC_MISC), - __raw_readl(base + FSIC_CTRL), __raw_readl(MMP3_FSIC_REGBASE + 0x100), - __raw_readl(MMP3_FSIC_REGBASE + PORTSC)); - return 0; } @@ -730,6 +716,18 @@ int mmp3_fsic_phy_init(unsigned int base) return 0; } +int mmp3_fsic_p_init(unsigned int base) +{ + u32 val; + pr_info(" select ULPI interface in SPH usb controller\n"); + val = __raw_readl(base + PORTSC); + val &= ~(0x3<<30); + val |= 2<<30; + val &= 0xfdffffff; + __raw_writel(val, base + PORTSC); + return 0; +} + #endif #endif diff --git a/arch/arm/mach-mmp/qseven.c b/arch/arm/mach-mmp/qseven.c index a341c8be5be9c3..a455f4692d7038 100644 --- a/arch/arm/mach-mmp/qseven.c +++ b/arch/arm/mach-mmp/qseven.c @@ -538,6 +538,7 @@ static struct mv_usb_platform_data mmp3_fsic_pdata = { .vbus = NULL, .mode = MV_USB_MODE_HOST, .phy_init = mmp3_fsic_phy_init, + .p_init = mmp3_fsic_p_init, }; #endif diff --git a/arch/arm/plat-pxa/include/plat/usb.h b/arch/arm/plat-pxa/include/plat/usb.h index f6b18a7483f0cf..634aad41201a1a 100644 --- a/arch/arm/plat-pxa/include/plat/usb.h +++ b/arch/arm/plat-pxa/include/plat/usb.h @@ -70,6 +70,7 @@ struct mv_usb_platform_data { unsigned int otg_force_a_bus_req:1; int (*phy_init)(unsigned int regbase); + int (*p_init)(unsigned int regbase); void (*phy_deinit)(unsigned int regbase); int (*set_vbus)(unsigned int vbus); int (*private_init)(struct mv_op_regs *opregs, @@ -88,5 +89,6 @@ extern int mmp3_hsic_private_init(struct mv_op_regs *opregs, #ifdef CONFIG_USB_EHCI_PXA_U2H_FSIC extern int mmp3_fsic_phy_init(unsigned int base); +extern int mmp3_fsic_p_init(unsigned int base); #endif #endif diff --git a/drivers/usb/host/ehci-mv.c b/drivers/usb/host/ehci-mv.c index c85c0abb9a9e7b..446c86baf12970 100644 --- a/drivers/usb/host/ehci-mv.c +++ b/drivers/usb/host/ehci-mv.c @@ -76,7 +76,14 @@ static int mv_ehci_enable(struct ehci_hcd_mv *ehci_mv) return retval; } } - + if (ehci_mv->pdata->p_init) { + retval = ehci_mv->pdata->p_init(ehci_mv->cap_regs); + if (retval) { + pr_err("Host: Platform initialization error %d\n", retval); + ehci_clock_disable(ehci_mv); + return retval; + } + } ehci_mv->active = 1; return 0; |